strago: Added servo and INA support for Strago.
BUG=none
TEST=Verified servod can start with Strago as board.
BRANCH=none
Change-Id: I47ec6546d914448e05aad705b7be62ee2072614d
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/238560
Reviewed-by: Roy Mingi Park <roy.mingi.park@intel.com>
Commit-Queue: Roy Mingi Park <roy.mingi.park@intel.com>
Reviewed-by: Todd Broch <tbroch@chromium.org>
diff --git a/servo/data/Makefile b/servo/data/Makefile
index a6735fa..aaf198e 100644
--- a/servo/data/Makefile
+++ b/servo/data/Makefile
@@ -12,7 +12,8 @@
pi.xml pit.xml falco.xml peppy.xml rambi.xml nyan.xml \
samus_p1.xml rambi_1v5_r0_loc.xml rambi_2v0_r0_loc.xml \
skate.xml big.xml whale_samus_larvae.xml storm.xml \
- veyron_p0.xml veyron_p1.xml veyron_r2.xml samus_evt_v1.xml
+ veyron_p0.xml veyron_p1.xml veyron_r2.xml samus_evt_v1.xml \
+ strago_proto.xml
INA231 = samus.xml whale_samus_dut.xml
diff --git a/servo/data/servo_strago_overlay.xml b/servo/data/servo_strago_overlay.xml
new file mode 100644
index 0000000..2c95cd0
--- /dev/null
+++ b/servo/data/servo_strago_overlay.xml
@@ -0,0 +1,14 @@
+<root>
+ <include>
+ <name>servoflex_v2_r0_p50.xml</name>
+ </include>
+ <include>
+ <name>x86_ec_common.xml</name>
+ </include>
+ <control>
+ <name>power_state</name>
+ <doc>Used to turn the DUT off and on</doc>
+ <params drv="cros_ec_softrec_power" clobber_ok=""
+ shutdown_delay="11.0" />
+ </control>
+</root>
diff --git a/servo/data/strago_proto.py b/servo/data/strago_proto.py
new file mode 100644
index 0000000..1d39a25
--- /dev/null
+++ b/servo/data/strago_proto.py
@@ -0,0 +1,17 @@
+# Copyright 2015 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+inas = [(0x40, 'ina_v5a', 5.0, 0.002, 'rem', True),
+ (0x41, 'ina_v3p3a', 3.3, 0.002, 'rem', True),
+ (0x42, 'ina_vcc0_cpu', 7.5, 0.002, 'rem', True),
+ (0x43, 'ina_vddq', 7.5, 0.002, 'rem', True),
+ (0x44, 'ina_vbata', 7.5, 0.002, 'rem', True),
+ (0x45, 'ina_vgg', 7.5, 0.002, 'rem', True),
+ (0x46, 'ina_vnn', 7.5, 0.002, 'rem', True),
+ (0x47, 'ina_v1p05a', 1.05, 0.002, 'rem', True),
+ (0x48, 'ina_vddq_vtt', 7.5, 0.01, 'rem', True),
+ (0x49, 'ina_v1p15a', 1.15, 0.002, 'rem', True),
+ (0x4a, 'ina_v1p24a', 1.24, 0.002, 'rem', True),
+ (0x4b, 'ina_v1p8a', 1.8, 0.002, 'rem', True),
+ (0x4c, 'ina_v3p3a_prime', 3.3, 0.002, 'rem', True),
+ ]
