commit 3d8b6df93cbc70a6a4149b0b4044ac7151530fec
author Bryan Freed <bfreed@chromium.org> Thu Nov 14 19:18:33 2013
committer chrome-internal-fetch <chrome-internal-fetch@google.com> Fri Nov 15 01:39:30 2013
tree 6bef70715e75018b82236782aeef80e0b3260889
parent 8423d771c68ad623c399c326eef0a1b73516a6ab

Nyan: Update sense resistor values to rework recommended by vendor.

This has been reworked on my venice2 board, but others still have the
old values.  I think the norrin boards will have these values.

BUG=chrome-os-partner:23860
TEST='servod -b nyan -c nyan.xml' works for power measurements.

Change-Id: Ie4d94a1db7e2cedc757028dd6d17c20571e535ea
Reviewed-on: https://chromium-review.googlesource.com/176748
Tested-by: Bryan Freed <bfreed@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Bryan Freed <bfreed@chromium.org>

servo/data/nyan.py

diff --git a/servo/data/nyan.py b/servo/data/nyan.py
index 0b64e19..430af90 100644
--- a/servo/data/nyan.py
+++ b/servo/data/nyan.py
@@ -24,18 +24,18 @@
 #  5v_stby (not listed here)
 #   3.3v_stby
 
-inas = [(0x40, 'vdd_mux', 7.4, 0.001, 'rem', True),
-        (0x41, '5v_sys', 5, 0.005, 'rem', True),
-        (0x42, '3_3v_sys', 3.3, 0.005, 'rem', True),
-        (0x44, '1_8v_vddio', 1.8, 0.002, 'rem', True),
-        (0x45, 'vdd_mux_core', 7.4, 0.002, 'rem', True),
+inas = [(0x40, 'vdd_mux', 7.4, 0.02, 'rem', True),
+        (0x41, '5v_sys', 5, 0.01, 'rem', True),
+        (0x42, '3_3v_sys', 3.3, 0.01, 'rem', True),
+        (0x44, '1_8v_vddio', 1.8, 0.01, 'rem', True),
+        (0x45, 'vdd_mux_core', 7.4, 0.01, 'rem', True),
         (0x46, 'vdd_mux_cpu', 7.4, 0.01, 'rem', True),
-        (0x48, 'vddio_ddr_ap', 1.35, 0.002, 'rem', True),
-        (0x49, 'vddio_dram', 1.35, 0.002, 'rem', True),
-        (0x4A, 'vdd_lcd_bl', 7.4, 0.010, 'rem', True),
-        (0x4B, '3_3v_panel', 3.3, 0.010, 'rem', True),
-        (0x4C, 'vdd_mux_gpu', 7.4, 0.002, 'rem', True),
-        (0x4D, '1_8v_vdd_wf', 1.8, 0.200, 'rem', True),
-        (0x4E, '3_3v_vdd_wf', 3.3, 0.010, 'rem', True),
-        (0x4F, '3_3v_stby', 3.3, 0.010, 'rem', True)]
+        (0x48, 'vddio_ddr_ap', 1.35, 0.01, 'rem', True),
+        (0x49, 'vddio_dram', 1.35, 0.01, 'rem', True),
+        (0x4A, 'vdd_lcd_bl', 7.4, 0.01, 'rem', True),
+        (0x4B, '3_3v_panel', 3.3, 0.01, 'rem', True),
+        (0x4C, 'vdd_mux_gpu', 7.4, 0.01, 'rem', True),
+        (0x4D, '1_8v_vdd_wf', 1.8, 0.2, 'rem', True),
+        (0x4E, '3_3v_vdd_wf', 3.3, 0.01, 'rem', True),
+        (0x4F, '3_3v_stby', 3.3, 0.2, 'rem', True)]