From 39f69df93a19e6db51adce71b630bbedfb0c4718 Mon Sep 17 00:00:00 2001
From: Kevin Chowski <chowski@google.com>
Date: Fri, 11 Sep 2020 14:56:51 -0600
Subject: [PATCH] REVERT-ME: Introduce quirk for shifting eDP brightness.
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Currently, we have observed the Pixelbook having these issues. I
obtained the device/subsystem_vendor/subsystem_device in this CL from
the Eve DUT I have at home.

I used `/sys/kernel/debug/dri/0/eDP-1/i915_dpcd` on the DUT to verify
that the registers were being set correctly; I also observe the
backlight being much brighter than before.

This patch will be reverted once the final version is submitted
upstream (link https://patchwork.freedesktop.org/series/81809/)

BUG=b:166145499
TEST=emerge-eve-kernelnext sys-kernel/chromeos-kernel-5_4 && \
   ./update_kernel.sh --remote=$IP

Change-Id: I3cdd7a45c67b982afb5d1f9ea82e006a8d16a85e
Signed-off-by: Kevin Chowski <chowski@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2406616
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Puthikorn Voravootivat <puthik@chromium.org>
---
 .../drm/i915/display/intel_dp_aux_backlight.c | 44 ++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_quirks.c   | 13 ++++++
 drivers/gpu/drm/i915/i915_drv.h               |  1 +
 3 files changed, 57 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -272,15 +272,57 @@ intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum pipe pi
 /* VESA backlight callbacks */
 static u32 intel_dp_aux_vesa_get_backlight(struct intel_connector *connector, enum pipe unused)
 {
-	return connector->panel.backlight.level;
+	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	struct intel_dp *intel_dp = intel_attached_dp(connector);
+	u8 read_val = 0x0;
+	u16 level;
+
+	level = connector->panel.backlight.level;
+	if (dev_priv->quirks & QUIRK_SHIFT_EDP_BACKLIGHT_BRIGHTNESS) {
+		if (!drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_PWMGEN_BIT_COUNT,
+						&read_val)) {
+			DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n",
+					DP_EDP_PWMGEN_BIT_COUNT);
+			return 0;
+		}
+		// Only bits 4:0 are used, 7:5 are reserved.
+		read_val = read_val & 0x1F;
+		if (read_val > 16) {
+			DRM_DEBUG_KMS("Invalid DP_EDP_PWNGEN_BIT_COUNT 0x%X, expected at most 16\n",
+						read_val);
+			return 0;
+		}
+		level >>= 16 - read_val;
+	}	
+
+	return level;
 }
 
 static void
 intel_dp_aux_vesa_set_backlight(const struct drm_connector_state *conn_state, u32 level)
 {
 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);	
 	struct intel_panel *panel = &connector->panel;
 	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
+	u8 val = 0x0;
+
+	if (dev_priv->quirks & QUIRK_SHIFT_EDP_BACKLIGHT_BRIGHTNESS) {
+		if (!drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_PWMGEN_BIT_COUNT,
+						&val)) {
+			DRM_DEBUG_KMS("Failed to write aux backlight level: Failed to read DPCD register 0x%x\n",
+					  DP_EDP_PWMGEN_BIT_COUNT);
+			return;
+		}
+		// Only bits 4:0 are used, 7:5 are reserved.
+		val = val & 0x1F;
+		if (val > 16) {
+			DRM_DEBUG_KMS("Failed to write aux backlight level: Invalid DP_EDP_PWNGEN_BIT_COUNT 0x%X, expected at most 16\n",
+						val);
+			return;
+		}
+		level <<= (16 - val) & 0xFFFF;
+	}
 
 	drm_edp_backlight_set_level(&intel_dp->aux, &panel->backlight.edp.vesa.info, level);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c b/drivers/gpu/drm/i915/display/intel_quirks.c
--- a/drivers/gpu/drm/i915/display/intel_quirks.c
+++ b/drivers/gpu/drm/i915/display/intel_quirks.c
@@ -59,6 +59,16 @@ static void quirk_no_pps_backlight_power_hook(struct drm_i915_private *i915)
 	drm_info(&i915->drm, "Applying no pps backlight power quirk\n");
 }
 
+/*
+ * Some eDP backlight hardware uses the most-significant bits of the brightness
+ * register, so brightness values must be shifted first.
+ */
+static void quirk_shift_edp_backlight_brightness(struct drm_i915_private *i915)
+{
+	i915->quirks |= QUIRK_SHIFT_EDP_BACKLIGHT_BRIGHTNESS;
+	DRM_INFO("Applying shift eDP backlight brightness quirk\n");
+}
+
 struct intel_quirk {
 	int device;
 	int subsystem_vendor;
@@ -190,6 +200,9 @@ static struct intel_quirk intel_quirks[] = {
 	/* ASRock ITX*/
 	{ 0x3185, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
 	{ 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
+
+	/* Google Pixelbook */
+	{ 0x591E, 0x8086, 0x2212, quirk_shift_edp_backlight_brightness },
 };
 
 void intel_init_quirks(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -524,6 +524,7 @@ struct i915_drrs {
 #define QUIRK_INCREASE_T12_DELAY (1<<6)
 #define QUIRK_INCREASE_DDI_DISABLED_TIME (1<<7)
 #define QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK (1<<8)
+#define QUIRK_SHIFT_EDP_BACKLIGHT_BRIGHTNESS (1<<9)
 
 struct intel_fbdev;
 struct intel_fbc_work;
-- 
2.33.0.685.g46640cef36-goog