From 5fbe6e99dda8a30e3fa532457250ec270c1811e8 Mon Sep 17 00:00:00 2001
From: Akshu Agrawal <akshu.agrawal@amd.com>
Date: Mon, 11 Dec 2017 17:25:10 +0530
Subject: [PATCH] FROMLIST: ASoC: amd: Adds rate and channel constraints for
 capture in Stoney rt5645

Constraints are added as we support 48Khz and dual channels.

(am from https://patchwork.kernel.org/patch/10118237/)

BUG=b:70697665
TEST=
localhost ~ # arecord -D hw:0,1 --dump-hw-params /dev/zero
Recording WAVE '/dev/zero' : Unsigned 8 bit, Rate 8000 Hz, Mono
HW Params of device "hw:0,1":
--------------------
ACCESS:  MMAP_INTERLEAVED RW_INTERLEAVED
FORMAT:  S16_LE
SUBFORMAT:  STD
SAMPLE_BITS: 16
FRAME_BITS: 32
CHANNELS: 2
RATE: 48000
PERIOD_TIME: (5333 42667)
PERIOD_SIZE: [256 2048]
PERIOD_BYTES: [1024 8192]
PERIODS: 2
BUFFER_TIME: (10666 85334)
BUFFER_SIZE: [512 4096]
BUFFER_BYTES: [2048 16384]
TICK_TIME: ALL

Change-Id: Ib705f1101f5e2ab5c04f9526b10795a45a32debc
Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
Reviewed-on: https://chromium-review.googlesource.com/831770
Reviewed-by: Jason Clinton <jclinton@chromium.org>
[rebase54(groeck): Context conflicts]
Signed-off-by: Guenter Roeck <groeck@chromium.org>
---
 sound/soc/amd/acp-rt5645.c | 49 +++++++++++++++++++++++++++++++++++---
 1 file changed, 46 insertions(+), 3 deletions(-)

diff --git a/sound/soc/amd/acp-rt5645.c b/sound/soc/amd/acp-rt5645.c
--- a/sound/soc/amd/acp-rt5645.c
+++ b/sound/soc/amd/acp-rt5645.c
@@ -40,6 +40,7 @@
 #include "../codecs/rt5645.h"
 
 #define CZ_PLAT_CLK 24000000
+#define DUAL_CHANNEL		2
 
 static struct snd_soc_jack cz_jack;
 
@@ -91,8 +92,50 @@ static int cz_init(struct snd_soc_pcm_runtime *rtd)
 	return 0;
 }
 
-static const struct snd_soc_ops cz_aif1_ops = {
+static const unsigned int channels[] = {
+	DUAL_CHANNEL,
+};
+
+static const unsigned int rates[] = {
+	48000,
+};
+
+static const struct snd_pcm_hw_constraint_list constraints_rates = {
+	.count = ARRAY_SIZE(rates),
+	.list  = rates,
+	.mask = 0,
+};
+
+static const struct snd_pcm_hw_constraint_list constraints_channels = {
+	.count = ARRAY_SIZE(channels),
+	.list = channels,
+	.mask = 0,
+};
+
+static int cz_fe_startup(struct snd_pcm_substream *substream)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+
+	/*
+	 * On this platform for PCM device we support stereo
+	 */
+
+	runtime->hw.channels_max = DUAL_CHANNEL;
+	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
+				   &constraints_channels);
+	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
+				   &constraints_rates);
+
+	return 0;
+}
+
+static struct snd_soc_ops cz_aif1_play_ops = {
+	.hw_params = cz_aif1_hw_params,
+};
+
+static struct snd_soc_ops cz_aif1_cap_ops = {
 	.hw_params = cz_aif1_hw_params,
+	.startup = cz_fe_startup,
 };
 
 SND_SOC_DAILINK_DEF(designware1,
@@ -113,7 +156,7 @@ static struct snd_soc_dai_link cz_dai_rt5650[] = {
 		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
 				| SND_SOC_DAIFMT_CBM_CFM,
 		.init = cz_init,
-		.ops = &cz_aif1_ops,
+		.ops = &cz_aif1_play_ops,
 		SND_SOC_DAILINK_REG(designware1, codec, platform),
 	},
 	{
@@ -121,7 +164,7 @@ static struct snd_soc_dai_link cz_dai_rt5650[] = {
 		.stream_name = "RT5645_AIF1",
 		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
 				| SND_SOC_DAIFMT_CBM_CFM,
-		.ops = &cz_aif1_ops,
+		.ops = &cz_aif1_cap_ops,
 		SND_SOC_DAILINK_REG(designware2, codec, platform),
 	},
 };
-- 
2.34.0.rc2.393.gf8c9666880-goog