CHROMIUM: arm64: dts: rockchip: fix P1.8V_SPI leakage for rk3399 gru

The P1.8V_SPI has the 660mv leakage during s3, that come from the
CPU1_SPI_CLK, CPU1_SPI_MOSI, CPU1_SPI_MISO and CPU1_SPI_CS.

The CPU1_SPI_* pins are configured as pullup while the interface is
active; we can define a "sleep" configuration, to pull them down before
suspending and avoid leakage.

BUG=chrome-os-partner:57262
TEST=run powerd_dbus_suspend to measure the voltage on kevin, the
     leakage is gone.
TEST=check dev_dbg() messages for pinctrl driver

Change-Id: Iec8108089eaf431da86e2aa68fb3c7e2825b6dcb
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/414794
Reviewed-by: Douglas Anderson <dianders@chromium.org>
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 32477a1..3ccc701 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -849,6 +849,9 @@
 &spi1 {
 	status = "okay";
 
+	pinctrl-names = "default", "sleep";
+	pinctrl-1 = <&spi1_sleep>;
+
 	spiflash@0 {
 		compatible = "jedec,spi-nor";
 
@@ -1180,6 +1183,19 @@
 		};
 	};
 
+	spi1 {
+		spi1_sleep: spi1-sleep {
+			/*
+			 * Pull down SPI1 CLK/CS/RX/TX during suspend, to
+			 * prevent leakage.
+			 */
+			rockchip,pins = <1 9 RK_FUNC_GPIO &pcfg_pull_down>,
+					<1 10 RK_FUNC_GPIO &pcfg_pull_down>,
+					<1 7 RK_FUNC_GPIO &pcfg_pull_down>,
+					<1 8 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+
 	trackpad {
 		ap_i2c_tp_pu_en: ap-i2c-tp-pu-en {
 			rockchip,pins = <3 12 RK_FUNC_GPIO &pcfg_output_high>;