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/*
* Google Gru-scarlet board device tree source
*
* Copyright 2017 Google, Inc
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "rk3399-gru.dtsi"
/{
/* REGULATORS */
/* ppvar_sys children, sorted by name */
pp1250_s3: pp1250-s3 {
compatible = "regulator-fixed";
regulator-name = "pp1250_s3";
/* EC turns on w/ pp1250_s3_en; always on for AP */
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <1250000>;
vin-supply = <&ppvar_sys>;
};
pp1250_cam: pp1250-dvdd {
compatible = "regulator-fixed";
regulator-name = "pp1250_dvdd";
pinctrl-names = "default";
pinctrl-0 = <&pp1250_cam_en>;
enable-active-high;
gpio = <&gpio2 4 GPIO_ACTIVE_HIGH>;
/* 740us delay from gpio output high to pp1250 stable,
* rounding up to 1ms for safety.
*/
startup-delay-us = <1000>;
vin-supply = <&pp1250_s3>;
};
pp900_s0: pp900-s0 {
compatible = "regulator-fixed";
regulator-name = "pp900_s0";
/* EC turns on w/ pp900_s0_en; always on for AP */
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&ppvar_sys>;
};
ppvarn_lcd: ppvarn-lcd {
compatible = "regulator-fixed";
regulator-name = "ppvarn_lcd";
pinctrl-names = "default";
pinctrl-0 = <&ppvarn_lcd_en>;
enable-active-high;
gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
vin-supply = <&ppvar_sys>;
};
ppvarp_lcd: ppvarp-lcd {
compatible = "regulator-fixed";
regulator-name = "ppvarp_lcd";
pinctrl-names = "default";
pinctrl-0 = <&ppvarp_lcd_en>;
enable-active-high;
gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
vin-supply = <&ppvar_sys>;
};
/* pp1800 children, sorted by name */
pp900_s3: pp900-s3 {
compatible = "regulator-fixed";
regulator-name = "pp900_s3";
/* EC turns on w/ pp900_s3_en; always on for AP */
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&pp1800>;
};
/* EC turns on pp1800_s3_en */
pp1800_s3: pp1800 {
};
/* pp3300 children, sorted by name */
pp2800_cam: pp2800-avdd {
compatible = "regulator-fixed";
regulator-name = "pp2800_avdd";
pinctrl-names = "default";
pinctrl-0 = <&pp2800_cam_en>;
enable-active-high;
gpio = <&gpio2 24 GPIO_ACTIVE_HIGH>;
startup-delay-us = <100>;
vin-supply = <&pp3300>;
};
/* EC turns on pp3300_s0_en */
pp3300_s0: pp3300 {
};
/* EC turns on pp3300_s3_en */
pp3300_s3: pp3300 {
};
/*
* See b/66922012
*
* This is a hack to make sure the Bluetooth part of the QCA6174A
* is reset at boot by toggling BT_EN. At boot BT_EN is first set
* to low through pinctrl (see bt_en_1v8_l). The fake bt_3v3
* regulator is configured as a supply of the wlan_3v3 regulator
* below. When wlan_3v3 is enabled early in the boot process it
* also enables its supply regulator bt_3v3, which changes BT_EN
* to high.
*/
bt_3v3: bt-3v3 {
compatible = "regulator-fixed";
regulator-name = "bt_3v3";
/* Note the bt_en_1v8_l pinctrl */
enable-active-high;
gpio = <&gpio0 8 GPIO_ACTIVE_HIGH>;
vin-supply = <&pp3300_s3>;
};
wlan_3v3: wlan-3v3 {
compatible = "regulator-fixed";
regulator-name = "wlan_3v3";
/* Note the wlan_pd_1v8_l pinctrl */
enable-active-high;
gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
/*
* Require minimum 10ms from power-on (e.g., PD#) to init PCIe.
* TODO (b/64444991): how long to assert PD#?
*/
regulator-enable-ramp-delay = <10000>;
/* See bt_3v3 hack above */
vin-supply = <&bt_3v3>;
};
/* END REGULATORS */
/* MISC */
backlight: backlight {
compatible = "pwm-backlight";
brightness-levels-scale = <0x10000>;
default-brightness-level = <0x828f>; /* arbitrary, ~51% */
enable-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwms = <&pwm1 0 1000000 0>;
pwm-delay-us = <10000>;
};
dmic: dmic {
compatible = "dmic-codec";
pinctrl-names = "default";
pinctrl-0 = <&dmic_en>;
dmicen-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
};
};
/* REGULATOR OVERRIDES (node deletions first) */
/* On scarlet there's no exact pp900_ap; instead there is pp900_s0 / pp900_s3 */
/delete-node/ &pp900_ap;
/* Scarlet doesn't have variable centerlogic; folded into pp900_s0 */
/delete-node/ &ppvar_centerlogic;
/* No more "logic en" pin for turning this on; folded into pp900_s0 */
/delete-node/ &ppvar_logic;
/delete-node/ &pp1800_audio;
/delete-node/ &pp1800_pcie;
/delete-node/ &pp3000;
/delete-node/ &pp1500_ap_io;
/delete-node/ &pp3300_disp;
/delete-node/ &pp3300_wifi_bt;
/delete-node/ &wlan_pd_n;
/* pp900_s0 aliases */
pp900_pcie: &pp900_s0 {
};
pp900_usb: &pp900_s0 {
};
pp900_ddrpll_ap: &pp900_s0 {
};
/* pp900_s3 aliases */
pp900_emmcpll: &pp900_s3 {
};
/* EC turns on; alias for pp1800_s0 */
pp1800_pcie: &pp1800_s0 {
};
/* On scarlet PPVAR(big_cpu, lit_cpu, gpu) need to adjust voltage ranges */
&ppvar_bigcpu {
/* No pesky OVP here. */
/delete-property/ slowest-decay-rate;
/delete-property/ safe-fall-percent;
/* On scarlet ppvar big cpu use pwm3 */
pwms = <&pwm3 0 3337 0>;
regulator-min-microvolt = <800074>;
regulator-max-microvolt = <1299226>;
};
&ppvar_gpu {
/* No pesky OVP here. */
/delete-property/ slowest-decay-rate;
/delete-property/ safe-fall-percent;
regulator-min-microvolt = <799600>;
regulator-max-microvolt = <1099600>;
};
&ppvar_litcpu {
/* No pesky OVP here. */
/delete-property/ slowest-decay-rate;
/delete-property/ safe-fall-percent;
regulator-min-microvolt = <802122>;
regulator-max-microvolt = <1199620>;
};
&ppvar_sd_card_io {
states = <1800000 0x0 3300000 0x1>;
regulator-max-microvolt = <3300000>;
};
&pp3000_sd_slot {
vin-supply = <&pp3300>;
};
/* MISC OVERRIDES (node deletions first) */
/delete-node/ &cros_ec_pwm;
/* No rt5514 */
/delete-node/ &headsetcodec;
/* No rt5514 */
/delete-node/ &wacky_spi_audio;
/delete-node/ &mvl_wifi;
ap_i2c_dig: &i2c2 {
status = "okay";
clock-frequency = <400000>;
/* These are relatively safe rise/fall times. */
i2c-scl-falling-time-ns = <50>;
i2c-scl-rising-time-ns = <300>;
digitizer: digitizer@9 {
compatible = "hid-over-i2c";
reg = <0x9>;
pinctrl-names = "default";
pinctrl-0 = <&pen_int_odl &pen_reset_l>;
interrupt-parent = <&gpio1>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
assert-reset-us = <1000>;
deassert-reset-us = <30000>;
hid-descr-addr = <0x1>;
};
};
&ap_i2c_mic {
status = "disabled";
};
&ap_i2c_tp {
status = "disabled";
};
&ap_i2c_ts {
touchscreen: touchscreen@10 {
compatible = "elan,ekth3500";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&touch_int_l &touch_reset_l>;
interrupt-parent = <&gpio1>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
};
};
camera: &i2c7 {
status = "okay";
/* 24M mclk is shared between world and user cameras */
pinctrl-0 = <&i2c7_xfer &test_clkout1>;
clock-frequency = <400000>;
/* These are relatively safe rise/fall times; TODO: measure */
i2c-scl-falling-time-ns = <50>;
i2c-scl-rising-time-ns = <300>;
wcam: camera@36 {
compatible = "ovti,ov5695";
reg = <0x36>;
pinctrl-names = "default";
pinctrl-0 = <&wcam_rst>;
clocks = <&cru SCLK_TESTCLKOUT1>;
clock-names = "xvclk";
avdd-supply = <&pp2800_cam>;
dvdd-supply = <&pp1250_cam>;
dovdd-supply = <&pp1800_s0>;
reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
port {
wcam_out: endpoint {
remote-endpoint = <&mipi_in_wcam>;
data-lanes = <1 2>;
};
};
};
ucam: camera@3c {
compatible = "ovti,ov2685";
reg = <0x3c>;
pinctrl-names = "default";
pinctrl-0 = <&ucam_rst>;
clocks = <&cru SCLK_TESTCLKOUT1>;
clock-names = "xvclk";
avdd-supply = <&pp2800_cam>;
dovdd-supply = <&pp1800_s0>;
dvdd-supply = <&pp1800_s0>;
reset-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
port {
ucam_out: endpoint {
remote-endpoint = <&mipi_in_ucam>;
data-lanes = <1>;
};
};
};
};
&cdn_dp {
extcon = <&usbc_extcon0>;
phys = <&tcphy0_dp>;
};
&cros_ec {
interrupt-parent = <&gpio1>;
interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
};
/* The center supply is fixed to .9V on scarlet */
&dmc {
center-supply = <&pp900_s0>;
};
/* We don't need .925 V for 928 MHz on scarlet */
&dmc_opp_table {
opp03 {
opp-microvolt = <900000>;
};
};
&ec_ap_int_l {
rockchip,pins = <1 18 RK_FUNC_GPIO &pcfg_pull_up>;
};
&firmware {
chromeos {
write-protect-gpio = <&gpio0 13 GPIO_ACTIVE_LOW>;
};
};
&gpio_keys {
pinctrl-names = "default";
pinctrl-0 = <&bt_host_wake_l>, <&pen_eject_odl>;
pen-insert {
label = "Pen Insert";
/* Insert = low, eject = high */
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
linux,code = <SW_PEN_INSERTED>;
linux,input-type = <EV_SW>;
wakeup-source;
};
};
&i2c_tunnel {
google,remote-bus = <0>;
};
&io_domains {
bt656-supply = <&pp1800_s0>; /* APIO2_VDD; 2a 2b */
audio-supply = <&pp1800_s0>; /* APIO5_VDD; 3d 4a */
gpio1830-supply = <&pp1800_s0>; /* APIO4_VDD; 4c 4d */
};
&isp0 {
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
isp0_mipi_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&dphy_rx0_out>;
};
};
};
&isp0_mmu {
status = "okay";
};
&its {
reset-on-suspend;
};
&max98357a {
sdmode-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
};
&mipi_dphy_rx0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_in_wcam: endpoint@0 {
reg = <0>;
remote-endpoint = <&wcam_out>;
data-lanes = <1 2>;
};
mipi_in_ucam: endpoint@1 {
reg = <1>;
remote-endpoint = <&ucam_out>;
data-lanes = <1>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
dphy_rx0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0_mipi_in>;
};
};
};
};
&mipi_dsi {
status = "okay";
rockchip,dual-channel = <&mipi_dsi1>;
ports {
mipi_out: port@1 {
reg = <1>;
mipi_out_panel: endpoint {
remote-endpoint = <&mipi_in_panel>;
};
};
};
mipi_panel: panel@0 {
compatible = "kingdisplay,kd097d04";
reg = <0>;
backlight = <&backlight>;
pinctrl-names = "default";
pinctrl-0 = <&display_rst_l>;
enable-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
power-supply = <&pp3300_s0>;
port {
mipi_in_panel: endpoint {
remote-endpoint = <&mipi_out_panel>;
};
};
};
};
&mipi_dsi1 {
status = "okay";
};
&pcie0 {
ep-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
/* PERST# asserted in S3 */
pcie-reset-suspend = <1>;
vpcie3v3-supply = <&wlan_3v3>;
vpcie1v8-supply = <&pp1800_pcie>;
};
&sdmmc {
cd-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
};
&soc_thermal {
sustainable-power = <2000>; /* milliwatts */
};
&sound {
rockchip,codec = <&max98357a &dmic &codec &cdn_dp>;
};
&spi2 {
status = "okay";
cr50@0 {
compatible = "google,cr50";
interrupt-parent = <&gpio1>;
interrupts = <17 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&h1_int_od_l>;
reg = <0>;
spi-max-frequency = <800000>;
};
};
&target {
temperature = <71000>;
};
&tcphy1 {
status = "disabled";
};
&threshold {
temperature = <66000>;
};
&usbc_extcon1 {
status = "disabled";
};
&usbdrd3_1 {
status = "disabled";
};
&usbdrd_dwc3_1 {
status = "disabled";
};
&wake_on_bt {
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
};
/* PINCTRL OVERRIDES */
&ap_fw_wp {
rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
};
&bl_en {
rockchip,pins = <4 21 RK_FUNC_GPIO &pcfg_pull_none>;
};
&bt_host_wake_l {
rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
};
&ec_ap_int_l {
rockchip,pins = <1 18 RK_FUNC_GPIO &pcfg_pull_up>;
};
&h1_int_od_l {
rockchip,pins = <1 17 RK_FUNC_GPIO &pcfg_pull_up>;
};
&headset_int_l {
rockchip,pins = <1 23 RK_FUNC_GPIO &pcfg_pull_up>;
};
/* there is no external pull up, so need to set this pin pull up */
&sdmmc_cd_gpio {
rockchip,pins = <1 11 RK_FUNC_GPIO &pcfg_pull_up>;
};
&sd_pwr_1800_sel {
rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_up>;
};
&sdmode_en {
rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_down>;
};
&touch_reset_l {
rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_down>;
};
&touch_int_l {
rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_down>;
};
&wlan_host_wake_l {
rockchip,pins = <1 3 RK_FUNC_GPIO &pcfg_pull_up>;
};
&wifi_perst_l {
rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
};
/delete-node/ &pp1800_audio_en;
/delete-node/ &pp1500_en;
/delete-node/ &pp3300_disp_en;
/delete-node/ &pp3000_en;
/delete-node/ &wlan_module_pd_l;
&pinctrl {
pinctrl-0 = <
&ap_pwroff /* AP will auto-assert this when in S3 */
&bt_en_1v8_l
&clk_32k /* This pin is always 32k on gru boards */
&wlan_pd_1v8_l /* Drive this low ASAP */
&wlan_rf_kill_1v8_l
>;
pcfg_pull_none_6ma: pcfg-pull-none-6ma {
bias-disable;
drive-strength = <6>;
};
camera {
pp1250_cam_en: pp1250-dvdd {
rockchip,pins = <2 4 RK_FUNC_GPIO &pcfg_pull_none>;
};
pp2800_cam_en: pp2800-avdd {
rockchip,pins = <2 24 RK_FUNC_GPIO &pcfg_pull_none>;
};
ucam_rst: ucam_rst {
rockchip,pins = <2 3 RK_FUNC_GPIO &pcfg_pull_none>;
};
wcam_rst: wcam_rst {
rockchip,pins = <2 5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
digitizer {
pen_int_odl: pen-int-odl {
rockchip,pins = <1 0 RK_FUNC_GPIO &pcfg_pull_up>;
};
pen_reset_l: pen-reset-l {
rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
dmic {
dmic_en: dmic-en {
rockchip,pins = <4 3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pen {
pen_eject_odl: pen-eject-odl {
rockchip,pins = <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&discrete_regulators {
display_rst_l: display-rst-l {
rockchip,pins = <4 25 RK_FUNC_GPIO &pcfg_pull_down>;
};
ppvarp_lcd_en: ppvarp-lcd-en {
rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
};
ppvarn_lcd_en: ppvarn-lcd-en {
rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
&i2s0_8ch_bus {
rockchip,pins =
<3 24 RK_FUNC_1 &pcfg_pull_none_6ma>,
<3 25 RK_FUNC_1 &pcfg_pull_none_6ma>,
<3 26 RK_FUNC_1 &pcfg_pull_none_6ma>,
<3 27 RK_FUNC_1 &pcfg_pull_none_6ma>,
<3 31 RK_FUNC_1 &pcfg_pull_none_6ma>,
<4 0 RK_FUNC_1 &pcfg_pull_none_6ma>;
};
&wifi {
bt_en_1v8_l: bt-en-1v8-l {
rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_output_low>;
};
wlan_pd_1v8_l: wlan-pd-1v8-l {
rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_output_low>;
};
/* Default pull-up, but just to be clear */
wlan_rf_kill_1v8_l: wlan-rf-kill-1v8-l {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};