FROMLIST: pinctrl: intel: Do pin translation in other GPIO operations as well
For some reason I thought GPIOLIB handles translation from GPIO ranges
to pinctrl pins but it turns out not to be the case. This means that
when GPIOs operations are performed for a pin controller having a custom
GPIO base such as Cannon Lake and Ice Lake incorrect pin number gets
used internally.
Fix this in the same way we did for lock/unlock IRQ operations and
translate the GPIO number to pin before using it.
Fixes: a60eac3239f0 ("pinctrl: intel: Allow custom GPIO base for pad groups")
Reported-by: Rajat Jain <rajatja@google.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
(am from https://lore.kernel.org/patchwork/patch/988007/)
BUG=b:112056767
TEST=verify that the driver starts writing to correct offset.
Change-Id: I6f7621351e53826f40a95028e1cf9e62b6417062
Reviewed-on: https://chromium-review.googlesource.com/1232322
Tested-by: Rajat Jain <rajatja@chromium.org>
Tested-by: Casey G Bowman <casey.g.bowman@intel.com>
Reviewed-by: Matthew S Atwood <matthew.s.atwood@intel.corp-partner.google.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Commit-Queue: Rajat Jain <rajatja@chromium.org>
Trybot-Ready: Rajat Jain <rajatja@chromium.org>
1 file changed
