Makefile: fix dependencies generation

This patch was inspired by crrev.com/c/2091999, the goal is to help
Cr50 makefiles (the main users of the tpm2 library) to avoid
unnecessary compilations.

Here is the description from the above patch slightly edited for
clarity and to match the tpm2 use case.

vvvvvvv
The main goal of this is to fix "make --question -C tpm2" behavior
for the Cr50 project which depends on this library.

Without this fix, when invoking make with the --question flag,
a build of all *.o was triggered.

This was because the "-include $(DEPS)" make step depended on *.d
files. That would then trigger the primary

"$(obj)/$(OBJ_PREFIX)%.d $(obj)/$(OBJ_PREFIX)%.o:"

rule, which [yes generated .d files, but also] generated the objects.

The following article explains the art of makefile depends quite well:
http://make.mad-scientist.net/papers/advanced-auto-dependency-generation
^^^^^^^

On top of that this patch does the following:

 - add -MP to the compiler invocation to address the problem of
   moving/deleted .h files.

 - add a target to print the list of updated object files, this allows
   the user (the Cr50 makefile) to know exactly what needs to be
   linked in, instead of globbing.

 - add a dummy file target depending on all updated object files, this
   simplifies Cr50 makefiles.

BUG=None
TEST=make clean; make -q && echo Fail
    # No CC builds should occur and no Fail was emitted
    # Before this change, the make -q would trigger a build
    make clean; make || echo Fail; make -q || echo Fail
    # No Fail should be emitted
    make
    touch tpm_manufacture.h
    make
    # See endorsement.o, tpm_manufacture.o, and libtpm2.a
    # being remade.
    make
    mv tpm_manufacture.h new_tpm_manufacture.h
    sed -i 's/tpm_manufacture.h/new_tpm_manufacture.h/' \
       endorsement.c tpm_manufacture.c
    make
    # See endorsement.o, tpm_manufacture.o, and libtpm2.a
    # being remade and no complaints about missing .h files.
    make build/.copied_objs
    # See the set of *.co.o and .copied_objs generated.

Change-Id: Ie492c08caec82b3de29a9e067aa7a3225110a50d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/tpm2/+/2606746
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org>
diff --git a/Makefile b/Makefile
index 4f25d39..2b80299 100644
--- a/Makefile
+++ b/Makefile
@@ -343,16 +343,25 @@
 	@echo "  AR      $(notdir $@)"
 	$(Q)$(AR) scr $@ $^
 
-copied_objs: $(COPIED_OBJS)
+# A helper target allowing the Cr50 Makefile to determine the exact list of
+# the updated object files to link in.
+list_copied_objs:
+	@echo $(COPIED_OBJS)
+
+# To keep things simple lets use a dummy file as a target depending on the
+# updated object files. This will allow to invoke this Makefile with a single
+# target to rebuild all updated object files.
+$(obj)/.copied_objs: $(COPIED_OBJS)
+	@touch $@
 
 $(obj):
 	@echo "  MKDIR   $(obj)"
 	$(Q)mkdir -p $(obj)
 
-$(obj)/$(OBJ_PREFIX)%.d $(obj)/$(OBJ_PREFIX)%.o: %.c | $(obj)
+$(obj)/$(OBJ_PREFIX)%.o: %.c | $(obj)
 	@echo "  CC      $(notdir $<)"
 	$(Q)$(CC) $(CFLAGS) -c -MMD -MF $(basename $@).d -MT $(basename $@).o \
-		-o $(basename $@).o $<
+		-MP -o $(basename $@).o $<
 
 %.cp.o: %.o
 	$(Q)$(OBJCOPY) --rename-section .bss=.bss.Tpm2_common $< $@
@@ -362,6 +371,14 @@
 	@echo "  RM      $(obj)"
 	$(Q)rm -rf $(obj)
 
-ifneq ($(MAKECMDGOALS),clean)
+.PHONY: $(DEPS)
+
+# Do not provide an explicit rule for *.d targets, otherwise this include
+# could trigger an unnecessary build for various reasons:
+#
+# - some compilers generate .d files with timestamps more recent than the
+#   corresponding .o files;
+#
+# - when make is invoked with -q, it rebuilds the required includes before
+#   deciding if anything else is needed.
 -include $(DEPS)
-endif