exynos: Support old SPL clocking mechanism

Recently exynos5 moved from using BPLL and and a divide-by-two to get
its memory clock, to a direct method. This saves power and is simpler.

This is set up in SPL.

However, if an older SPL ran, then the old BPLL method might be used.
U-Boot assumes that SPL used the direct method in setting up memory.

Instead, check which method was used and return the correct clock in
either case.

This is a minor issue, and only affects devs, since others will not see the console output. Still it is annoying.
(This is a somewhat obsure issue and should only affect devs, since others
do not want a console).

Build an image that uses .90 for RO and this commit for RW. Enable
console in the RW one, by leaving off the '--add-config-int silent_console 1'
option in the fdt.

Boot it and see that there is no longer jibberish coming from the RW U-Boot.

Change-Id: Ia060d091e75e1f3458fb2b8dcc953275a2f8a635
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/37751
Reviewed-by: Gabe Black <gabeblack@chromium.org>
1 file changed