i#1551 port to ARM: varying operand position support
Adds an additional argument to instr_create_Ndst_Msrc_vardst(),
and instr_create_Ndst_Msrc_varsrc() indicating at what position the varying
list of operands should be inserted, supporting more than just having them
at the end.
git-svn-id: https://dynamorio.googlecode.com/svn/trunk@3023 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6
diff --git a/api/docs/release.dox b/api/docs/release.dox
index f0ad3ba..1d3b87c 100644
--- a/api/docs/release.dox
+++ b/api/docs/release.dox
@@ -175,7 +175,9 @@
- Added opnd_create_reg_ex() and opnd_get_flags().
- Added opnd_create_base_disp_arm().
- Added reg_is_simd().
- - Added instr_create_1dst_4src().
+ - Added instr_create_0dst_4src(), instr_create_1dst_4src(),
+ instr_create_2dst_5src(), instr_create_Ndst_Msrc_vardst(),
+ and instr_create_Ndst_Msrc_varsrc().
**************************************************
<hr>
diff --git a/core/arch/arm/instr_create.h b/core/arch/arm/instr_create.h
index 7fdebd7..c26dbeb 100644
--- a/core/arch/arm/instr_create.h
+++ b/core/arch/arm/instr_create.h
@@ -1846,75 +1846,75 @@
* \param ... The register list as separate opnd_t arguments.
*/
#define INSTR_CREATE_ldm(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldm, 0, 1, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldm, 0, 1, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_ldm_priv(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldm_priv, 0, 1, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldm_priv, 0, 1, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_ldm_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldm, 1, 2, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldm, 1, 2, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_ldmda(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldmda, 0, 1, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldmda, 0, 1, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_ldmda_priv(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldmda_priv, 0, 1, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldmda_priv, 0, 1, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_ldmda_priv_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldmda_priv, 1, 2, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldmda_priv, 1, 2, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_ldmda_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldmda, 1, 2, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldmda, 1, 2, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_ldmdb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldmdb, 0, 1, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldmdb, 0, 1, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_ldmdb_priv(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldmdb_priv, 0, 1, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldmdb_priv, 0, 1, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_ldmdb_priv_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldmdb_priv, 1, 2, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldmdb_priv, 1, 2, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_ldmdb_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldmdb, 1, 2, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldmdb, 1, 2, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_ldmia_priv_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldmia_priv, 1, 2, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldmia_priv, 1, 2, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_ldmib(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldmib, 0, 1, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldmib, 0, 1, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_ldmib_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_ldmib, 1, 2, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_ldmib, 1, 2, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_stm(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_stm, 1, 0, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_stm, 1, 0, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_stm_priv(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_stm_priv, 1, 0, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_stm_priv, 1, 0, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_stm_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_stm, 2, 1, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_stm, 2, 1, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_stmda(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_stmda, 1, 0, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_stmda, 1, 0, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_stmda_priv(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_stmda_priv, 1, 0, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_stmda_priv, 1, 0, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_stmda_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_stmda, 2, 1, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_stmda, 2, 1, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_stmdb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_stmdb, 1, 0, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_stmdb, 1, 0, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_stmdb_priv(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_stmdb_priv, 1, 0, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_stmdb_priv, 1, 0, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_stmdb_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_stmdb, 2, 1, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_stmdb, 2, 1, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_stmib(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_stmib, 1, 0, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_stmib, 1, 0, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_stmib_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_stmib, 2, 1, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_stmib, 2, 1, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld1_dup_8(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_8, 0, 1, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_8, 0, 1, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_vld1_dup_8_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_8, 1, 2, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_8, 1, 2, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_dup_8(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_8, 0, 1, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_8, 0, 1, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_vld2_dup_8_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_8, 1, 2, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_8, 1, 2, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_dup_8(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_8, 0, 1, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_8, 0, 1, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_vld3_dup_8_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_8, 1, 2, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_8, 1, 2, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_dup_8(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_8, 0, 1, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_8, 0, 1, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_vld4_dup_8_wb(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_8, 1, 2, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_8, 1, 2, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vldmia(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vldmia, 0, 1, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vldmia, 0, 1, list_len, 0, (mem), __VA_ARGS__)
#define INSTR_CREATE_vstmia(dc, mem, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vstmia, 1, 0, list_len, (mem), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vstmia, 1, 0, list_len, 0, (mem), __VA_ARGS__)
/* @} */ /* end doxygen group */
/** @name Signature: (mem, Rm, list_len, ...) */
@@ -1932,13 +1932,13 @@
* \param ... The register list as separate opnd_t arguments.
*/
#define INSTR_CREATE_vld1_dup_8_wbreg(dc, mem, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_8, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_8, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_dup_8_wbreg(dc, mem, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_8, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_8, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_dup_8_wbreg(dc, mem, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_8, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_8, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_dup_8_wbreg(dc, mem, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_8, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_8, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
/* @} */ /* end doxygen group */
/** @name Signature: (mem, imm, list_len, ...) */
@@ -1956,165 +1956,165 @@
* \param ... The register list as separate opnd_t arguments.
*/
#define INSTR_CREATE_vld1_16(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_16, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_16, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld1_16_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_16, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_16, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld1_32(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_32, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_32, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld1_32_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_32, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_32, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld1_64(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_64, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_64, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld1_64_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_64, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_64, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld1_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_8, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_8, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld1_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_8, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_8, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld1_dup_16(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_16, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_16, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld1_dup_16_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_16, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_16, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld1_dup_32(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_32, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_32, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld1_dup_32_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_32, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_32, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_16(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_16, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_16, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld2_16_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_16, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_16, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_32(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_32, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_32, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld2_32_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_32, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_32, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_8, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_8, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld2_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_8, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_8, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_dup_16(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_16, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_16, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld2_dup_16_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_16, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_16, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_dup_32(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_32, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_32, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld2_dup_32_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_32, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_32, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_lane_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_8, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_8, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld2_lane_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_8, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_8, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_16(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_16, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_16, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld3_16_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_16, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_16, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_32(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_32, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_32, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld3_32_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_32, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_32, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_8, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_8, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld3_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_8, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_8, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_dup_16(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_16, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_16, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld3_dup_16_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_16, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_16, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_dup_32(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_32, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_32, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld3_dup_32_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_32, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_32, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_lane_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_8, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_8, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld3_lane_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_8, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_8, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_16(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_16, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_16, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld4_16_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_16, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_16, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_32(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_32, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_32, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld4_32_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_32, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_32, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_8, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_8, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld4_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_8, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_8, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_dup_16(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_16, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_16, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld4_dup_16_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_16, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_16, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_dup_32(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_32, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_32, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld4_dup_32_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_32, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_32, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_lane_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_8, 0, 2, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_8, 0, 2, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vld4_lane_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_8, 1, 3, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_8, 1, 3, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst1_16(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_16, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_16, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst1_16_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_16, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_16, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst1_32(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_32, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_32, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst1_32_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_32, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_32, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst1_64(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_64, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_64, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst1_64_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_64, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_64, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst1_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_8, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_8, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst1_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_8, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_8, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst2_16(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_16, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_16, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst2_16_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_16, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_16, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst2_32(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_32, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_32, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst2_32_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_32, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_32, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst2_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_8, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_8, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst2_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_8, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_8, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst2_lane_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_8, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_8, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst2_lane_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_8, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_8, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst3_16(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_16, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_16, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst3_16_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_16, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_16, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst3_32(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_32, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_32, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst3_32_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_32, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_32, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst3_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_8, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_8, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst3_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_8, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_8, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst3_lane_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_8, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_8, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst3_lane_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_8, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_8, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst4_16(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_16, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_16, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst4_16_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_16, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_16, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst4_32(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_32, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_32, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst4_32_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_32, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_32, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst4_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_8, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_8, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst4_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_8, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_8, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst4_lane_8(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_8, 1, 1, list_len, (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_8, 1, 1, list_len, 0, (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vst4_lane_8_wbimm(dc, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_8, 2, 2, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_8, 2, 2, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
/* @} */ /* end doxygen group */
/** @name Signature: (Rd, mem, imm, list_len, ...) */
@@ -2133,9 +2133,9 @@
* \param ... The register list as separate opnd_t arguments.
*/
#define INSTR_CREATE_vldmdb(dc, Rd, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vldmdb, 1, 2, list_len, (Rd), (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vldmdb, 1, 2, list_len, 0, (Rd), (mem), (imm), __VA_ARGS__)
#define INSTR_CREATE_vldmia_imm(dc, Rd, mem, imm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vldmia, 1, 2, list_len, (Rd), (mem), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vldmia, 1, 2, list_len, 0, (Rd), (mem), (imm), __VA_ARGS__)
/* @} */ /* end doxygen group */
/** @name Signature: (mem, Rd, imm, list_len, ...) */
@@ -2154,9 +2154,9 @@
* \param ... The register list as separate opnd_t arguments.
*/
#define INSTR_CREATE_vstmdb(dc, mem, Rd, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vstmdb, 2, 1, list_len, (mem), (Rd), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vstmdb, 2, 1, list_len, 0, (mem), (Rd), (imm), __VA_ARGS__)
#define INSTR_CREATE_vstmia_imm(dc, mem, Rd, imm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vstmia, 2, 1, list_len, (mem), (Rd), (imm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vstmia, 2, 1, list_len, 0, (mem), (Rd), (imm), __VA_ARGS__)
/* @} */ /* end doxygen group */
/** @name Signature: (mem, imm, Rm, list_len, ...) */
@@ -2175,85 +2175,85 @@
* \param ... The register list as separate opnd_t arguments.
*/
#define INSTR_CREATE_vld1_16_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_16, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_16, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld1_32_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_32, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_32, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld1_64_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_64, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_64, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld1_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_8, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_8, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld1_dup_16_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_16, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_16, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld1_dup_32_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_32, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld1_dup_32, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_16_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_16, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_16, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_32_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_32, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_32, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_8, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_8, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_dup_16_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_16, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_16, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_dup_32_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_32, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_dup_32, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_lane_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_8, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_8, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_16_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_16, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_16, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_32_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_32, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_32, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_8, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_8, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_dup_16_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_16, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_16, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_dup_32_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_32, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_dup_32, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_lane_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_8, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_8, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_16_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_16, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_16, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_32_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_32, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_32, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_8, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_8, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_dup_16_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_16, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_16, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_dup_32_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_32, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_dup_32, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_lane_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_8, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_8, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst1_16_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_16, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_16, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst1_32_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_32, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_32, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst1_64_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_64, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_64, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst1_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_8, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst1_8, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst2_16_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_16, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_16, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst2_32_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_32, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_32, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst2_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_8, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_8, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst2_lane_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_8, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_8, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst3_16_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_16, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_16, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst3_32_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_32, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_32, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst3_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_8, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_8, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst3_lane_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_8, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_8, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst4_16_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_16, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_16, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst4_32_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_32, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_32, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst4_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_8, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_8, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst4_lane_8_wbreg(dc, mem, imm, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_8, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_8, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
/* @} */ /* end doxygen group */
/** @name Signature: (mem, imm, imm2, list_len, ...) */
@@ -2272,53 +2272,53 @@
* \param ... The register list as separate opnd_t arguments.
*/
#define INSTR_CREATE_vld2_lane_16(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_16, 0, 3, list_len, (mem), (imm), (imm2), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_16, 0, 3, list_len, 0, (mem), (imm), (imm2), __VA_ARGS__)
#define INSTR_CREATE_vld2_lane_16_wbimm(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_16, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_16, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_lane_32(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_32, 0, 3, list_len, (mem), (imm), (imm2), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_32, 0, 3, list_len, 0, (mem), (imm), (imm2), __VA_ARGS__)
#define INSTR_CREATE_vld2_lane_32_wbimm(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_32, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_32, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_lane_16(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_16, 0, 3, list_len, (mem), (imm), (imm2), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_16, 0, 3, list_len, 0, (mem), (imm), (imm2), __VA_ARGS__)
#define INSTR_CREATE_vld3_lane_16_wbimm(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_16, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_16, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_lane_32(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_32, 0, 3, list_len, (mem), (imm), (imm2), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_32, 0, 3, list_len, 0, (mem), (imm), (imm2), __VA_ARGS__)
#define INSTR_CREATE_vld3_lane_32_wbimm(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_32, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_32, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_lane_16(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_16, 0, 3, list_len, (mem), (imm), (imm2), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_16, 0, 3, list_len, 0, (mem), (imm), (imm2), __VA_ARGS__)
#define INSTR_CREATE_vld4_lane_16_wbimm(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_16, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_16, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_lane_32(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_32, 0, 3, list_len, (mem), (imm), (imm2), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_32, 0, 3, list_len, 0, (mem), (imm), (imm2), __VA_ARGS__)
#define INSTR_CREATE_vld4_lane_32_wbimm(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_32, 1, 4, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_32, 1, 4, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst2_lane_16(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_16, 1, 2, list_len, (mem), (imm), (imm2), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_16, 1, 2, list_len, 0, (mem), (imm), (imm2), __VA_ARGS__)
#define INSTR_CREATE_vst2_lane_16_wbimm(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_16, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_16, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst2_lane_32(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_32, 1, 2, list_len, (mem), (imm), (imm2), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_32, 1, 2, list_len, 0, (mem), (imm), (imm2), __VA_ARGS__)
#define INSTR_CREATE_vst2_lane_32_wbimm(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_32, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_32, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst3_lane_16(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_16, 1, 2, list_len, (mem), (imm), (imm2), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_16, 1, 2, list_len, 0, (mem), (imm), (imm2), __VA_ARGS__)
#define INSTR_CREATE_vst3_lane_16_wbimm(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_16, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_16, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst3_lane_32(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_32, 1, 2, list_len, (mem), (imm), (imm2), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_32, 1, 2, list_len, 0, (mem), (imm), (imm2), __VA_ARGS__)
#define INSTR_CREATE_vst3_lane_32_wbimm(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_32, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_32, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst4_lane_16(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_16, 1, 2, list_len, (mem), (imm), (imm2), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_16, 1, 2, list_len, 0, (mem), (imm), (imm2), __VA_ARGS__)
#define INSTR_CREATE_vst4_lane_16_wbimm(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_16, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_16, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst4_lane_32(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_32, 1, 2, list_len, (mem), (imm), (imm2), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_32, 1, 2, list_len, 0, (mem), (imm), (imm2), __VA_ARGS__)
#define INSTR_CREATE_vst4_lane_32_wbimm(dc, mem, imm, imm2, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_32, 2, 3, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_32, 2, 3, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
/* @} */ /* end doxygen group */
/** @name Signature: (mem, imm, imm2, Rm, list_len, ...) */
@@ -2338,29 +2338,29 @@
* \param ... The register list as separate opnd_t arguments.
*/
#define INSTR_CREATE_vld2_lane_16_wbreg(dc, mem, imm, imm2, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_16, 1, 5, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_16, 1, 5, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld2_lane_32_wbreg(dc, mem, imm, imm2, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_32, 1, 5, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld2_lane_32, 1, 5, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_lane_16_wbreg(dc, mem, imm, imm2, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_16, 1, 5, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_16, 1, 5, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld3_lane_32_wbreg(dc, mem, imm, imm2, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_32, 1, 5, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld3_lane_32, 1, 5, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_lane_16_wbreg(dc, mem, imm, imm2, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_16, 1, 5, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_16, 1, 5, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vld4_lane_32_wbreg(dc, mem, imm, imm2, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_32, 1, 5, list_len, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_vardst((dc), OP_vld4_lane_32, 1, 5, list_len, 0, opnd_create_reg(opnd_get_base(mem)), (mem), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst2_lane_16_wbreg(dc, mem, imm, imm2, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_16, 2, 4, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_16, 2, 4, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst2_lane_32_wbreg(dc, mem, imm, imm2, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_32, 2, 4, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst2_lane_32, 2, 4, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst3_lane_16_wbreg(dc, mem, imm, imm2, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_16, 2, 4, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_16, 2, 4, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst3_lane_32_wbreg(dc, mem, imm, imm2, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_32, 2, 4, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst3_lane_32, 2, 4, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst4_lane_16_wbreg(dc, mem, imm, imm2, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_16, 2, 4, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_16, 2, 4, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
#define INSTR_CREATE_vst4_lane_32_wbreg(dc, mem, imm, imm2, Rm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_32, 2, 4, list_len, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vst4_lane_32, 2, 4, list_len, 0, (mem), opnd_create_reg(opnd_get_base(mem)), (imm), (imm2), (Rm), opnd_create_reg(opnd_get_base(mem)), __VA_ARGS__)
/* @} */ /* end doxygen group */
/** @name Signature: (Ra, Rd, imm, imm2, cpreg) */
@@ -4231,9 +4231,9 @@
* \param ... The register list as separate opnd_t arguments.
*/
#define INSTR_CREATE_vtbl_8(dc, Vd, Vm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vtbl_8, 1, 1, list_len, (Vd), (Vm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vtbl_8, 1, 1, list_len, 0, (Vd), (Vm), __VA_ARGS__)
#define INSTR_CREATE_vtbx_8(dc, Vd, Vm, list_len, ...) \
- instr_create_Ndst_Msrc_varsrc((dc), OP_vtbx_8, 1, 1, list_len, (Vd), (Vm), __VA_ARGS__)
+ instr_create_Ndst_Msrc_varsrc((dc), OP_vtbx_8, 1, 1, list_len, 0, (Vd), (Vm), __VA_ARGS__)
/* @} */ /* end doxygen group */
diff --git a/core/arch/instr.h b/core/arch/instr.h
index 1fafa21..feb6c2f 100644
--- a/core/arch/instr.h
+++ b/core/arch/instr.h
@@ -2356,11 +2356,14 @@
* thread-local heap with opcode \p opcode, \p fixed_dsts destination operands,
* and \p fixed_srcs plus \p var_srcs source operands. The variable arguments
* must start with the (fixed) destinations, followed by the fixed sources,
- * followed by the variable sources.
+ * followed by the variable sources. The \p var_ord parameter specifies the
+ * (0-based) ordinal position within the resulting instruction's source array
+ * at which the variable sources should be placed, allowing them to be inserted
+ * in the middle of the fixed sources.
*/
instr_t *
instr_create_Ndst_Msrc_varsrc(dcontext_t *dcontext, int opcode, uint fixed_dsts,
- uint fixed_srcs, uint var_srcs, ...);
+ uint fixed_srcs, uint var_srcs, uint var_ord, ...);
DR_API
/**
@@ -2368,11 +2371,14 @@
* thread-local heap with opcode \p opcode, \p fixed_dsts plus \p var_dsts
* destination operands, and \p fixed_srcs source operands. The variable
* arguments must start with the fixed destinations, followed by the (fixed)
- * sources, followed by the variable destinations.
+ * sources, followed by the variable destinations. The \p var_ord parameter
+ * specifies the (0-based) ordinal position within the resulting instruction's
+ * destination array at which the variable destinations should be placed,
+ * allowing them to be inserted in the middle of the fixed destinations.
*/
instr_t *
instr_create_Ndst_Msrc_vardst(dcontext_t *dcontext, int opcode, uint fixed_dsts,
- uint fixed_srcs, uint var_dsts, ...);
+ uint fixed_srcs, uint var_dsts, uint var_ord, ...);
DR_API
/** Convenience routine that returns an initialized instr_t for OP_popa. */
diff --git a/core/arch/instr_shared.c b/core/arch/instr_shared.c
index c200f64..60ec635 100644
--- a/core/arch/instr_shared.c
+++ b/core/arch/instr_shared.c
@@ -2596,36 +2596,40 @@
instr_t *
instr_create_Ndst_Msrc_varsrc(dcontext_t *dcontext, int opcode, uint fixed_dsts,
- uint fixed_srcs, uint var_srcs, ...)
+ uint fixed_srcs, uint var_srcs, uint var_ord, ...)
{
va_list ap;
instr_t *in = instr_build(dcontext, opcode, fixed_dsts, fixed_srcs + var_srcs);
uint i;
- va_start(ap, var_srcs);
+ va_start(ap, var_ord);
for (i = 0; i < fixed_dsts; i++)
instr_set_dst(in, i, va_arg(ap, opnd_t));
- for (i = 0; i < fixed_srcs; i++)
+ for (i = 0; i < MIN(var_ord, fixed_srcs); i++)
instr_set_src(in, i, va_arg(ap, opnd_t));
+ for (i = var_ord; i < fixed_srcs; i++)
+ instr_set_src(in, var_srcs + i, va_arg(ap, opnd_t));
for (i = 0; i < var_srcs; i++)
- instr_set_src(in, fixed_srcs + i, va_arg(ap, opnd_t));
+ instr_set_src(in, var_ord + i, va_arg(ap, opnd_t));
va_end(ap);
return in;
}
instr_t *
instr_create_Ndst_Msrc_vardst(dcontext_t *dcontext, int opcode, uint fixed_dsts,
- uint fixed_srcs, uint var_dsts, ...)
+ uint fixed_srcs, uint var_dsts, uint var_ord, ...)
{
va_list ap;
instr_t *in = instr_build(dcontext, opcode, fixed_dsts + var_dsts, fixed_srcs);
uint i;
- va_start(ap, var_dsts);
- for (i = 0; i < fixed_dsts; i++)
+ va_start(ap, var_ord);
+ for (i = 0; i < MIN(var_ord, fixed_dsts); i++)
instr_set_dst(in, i, va_arg(ap, opnd_t));
+ for (i = var_ord; i < fixed_dsts; i++)
+ instr_set_dst(in, var_dsts + i, va_arg(ap, opnd_t));
for (i = 0; i < fixed_srcs; i++)
instr_set_src(in, i, va_arg(ap, opnd_t));
for (i = 0; i < var_dsts; i++)
- instr_set_dst(in, fixed_dsts + i, va_arg(ap, opnd_t));
+ instr_set_dst(in, var_ord + i, va_arg(ap, opnd_t));
va_end(ap);
return in;
}
diff --git a/tools/arm_macros_gen.pl b/tools/arm_macros_gen.pl
index a8394f8..6c090f5 100755
--- a/tools/arm_macros_gen.pl
+++ b/tools/arm_macros_gen.pl
@@ -430,6 +430,14 @@
# List => vararg with list at end of course
if ($sig =~ /\bL/) {
+ # Figure out at which index in src/dst list the vararg should be inserted
+ my $idx = 0;
+ my @ops = split(' ', $sig);
+ for (my $i = 0; $i <= $#ops; $i++) {
+ last if ($ops[$i] =~ /^L/);
+ $idx++;
+ $idx = 0 if ($ops[$i] =~ /;$/);
+ }
$arg_str =~ s/, L\w+//;
$call_str =~ s/, \(L\w+\)//;
$arg_str .= ", list_len, ...";
@@ -441,7 +449,7 @@
$func_sfx = '_vardst';
$opc_str .= ", ".($num_tot_dsts-1).", $num_tot_srcs";
}
- $opc_str .= ", list_len";
+ $opc_str .= ", list_len, $idx";
$num_tot_dsts = 'N';
$num_tot_srcs = 'M';
}
