)]}' { "log": [ { "commit": "464fdba223dac532404d217bd6f687fb46af9a43", "tree": "bad731649a2170fd2ee806b65e0f80c9390cced0", "parents": [ "943803169438bfb21cc82c52f9b141574bb4b249" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 26 18:17:21 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 26 18:17:21 2014" }, "message": "i#1551 Port DynamoRIO to ARM: split arch/proc.c\n- move core/arch/proc.c to core/arch/x86/proc.c\n- extract common code from proc.c to core/arch/proc_shared.c\n- add core/arch/arm/proc.c\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/180200043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3024 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "943803169438bfb21cc82c52f9b141574bb4b249", "tree": "396b81e725ec2a28a5370ad055570858c66149c4", "parents": [ "1d0b9451537ca047afd01b982d4b585039895031" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 26 18:01:17 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 26 18:01:17 2014" }, "message": "i#1551 port to ARM: varying operand position support\n\nAdds an additional argument to instr_create_Ndst_Msrc_vardst(),\nand instr_create_Ndst_Msrc_varsrc() indicating at what position the varying\nlist of operands should be inserted, supporting more than just having them\nat the end.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3023 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "1d0b9451537ca047afd01b982d4b585039895031", "tree": "85cad0720897183e1d3f223b9c3478baa3eba518", "parents": [ "3ac4d2f63381c77f93f046012a6d891db2d2f889" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 26 18:00:56 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 26 18:00:56 2014" }, "message": "i#1551 port to ARM: add more debug sanity checks for the decoder and encoder\n\nRefactors the existing reg_check_reg_fixer() into a general\ndecode_debug_checks() which calls into the encoder and decoder to verify\nthe sizes of various arrays and sanity check the decoding tables.\n\nFor ARM, adds checks of the encoder chains and checks that register lists\nobey certain limitations to make decoding and encoding simpler.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3022 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "3ac4d2f63381c77f93f046012a6d891db2d2f889", "tree": "f9b691b0a784dba99306e5e2d5276a206f6d568d", "parents": [ "b1dc09963c94ab9e3dc693ede28a00737590c742" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 26 18:00:46 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 26 18:00:46 2014" }, "message": "i#1551 port to ARM: initial encoder implementation\n\nShifts top-level encoding routines to encode_shared.c with the single core\nroutine arch-specific.\n\nAdds an end-to-end implementation of the ARM encoder but only fills in\noperand-type-specific code for registers. Immediates, register lists, and\nmemory operands will be added later.\n\nAdds an encoding error message feature on ARM as an attempt to provide more\nspecific error messages, as figuring out why encoding failed was always\ndifficult with our x86 encoder.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3021 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "b1dc09963c94ab9e3dc693ede28a00737590c742", "tree": "36f47a26e71a0ef0bbb54eb57f041e248f2cacfe", "parents": [ "eaba712168a6a5fd4e888e79ffe2ff7a682903c3" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 26 18:00:35 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 26 18:00:35 2014" }, "message": "i#1551 port to ARM: decoder fixes\n\nFixes an off-by-one predicate check error.\nFixes some build errors when using a different version of gcc.\nAdds DR_REG_CR* to reg_get_size().\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3020 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "eaba712168a6a5fd4e888e79ffe2ff7a682903c3", "tree": "f8832f25f0cdf24cd983dcaf60ae34048a92a4ba", "parents": [ "c071b3c80ff4acf7f577253ad9ae7e1a9fd2b22f" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Tue Nov 25 17:54:53 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Tue Nov 25 17:54:53 2014" }, "message": "TBR i#1551 Port DynamoRIO to ARM: add EM_ARM in ELF header check\n\nTBR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/175670043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3019 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "c071b3c80ff4acf7f577253ad9ae7e1a9fd2b22f", "tree": "26d6a82668ed3319955b13067dd328d4e7b2c7e8", "parents": [ "3d4cffbe9e218b1d5e75a80a65b66bee7d9a642d" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Mon Nov 24 16:30:15 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Mon Nov 24 16:30:15 2014" }, "message": "i#1551 Port DynamoRIO to ARM: rename segment_register to thread_register\n- rename is_segment_register_initialized to is_thread_register_initialized\n- rename read_selector to read_thread_register\n- implement read_thread_register on ARM\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/176140043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3018 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "3d4cffbe9e218b1d5e75a80a65b66bee7d9a642d", "tree": "b51b079b743b4a1c857895f3ac0c0d8a0e08f2ef", "parents": [ "e30d0f4a7d3b1f3dabfe5e76ca906c34f4909f42" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Fri Nov 21 22:09:58 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Fri Nov 21 22:09:58 2014" }, "message": "TBR i#1551 Port DynamoRIO to ARM: fix minor ATOMIC_COMPARE_EXCHANGE_suffix bug\n\nTBR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/181830043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3016 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "e30d0f4a7d3b1f3dabfe5e76ca906c34f4909f42", "tree": "c66928647ed52b8603babb9d8c31a8ced4378140", "parents": [ "ee7429b260973e9a88ce6002457fec8f8e0d3384" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 21 18:09:58 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 21 18:09:58 2014" }, "message": "i#1551 port to ARM: add INSTR_CREATE_ macros for aliases\n\nAdds macros for pop, pop_list, push, push_list, and neg.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3015 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "ee7429b260973e9a88ce6002457fec8f8e0d3384", "tree": "1b06d743a53a7b7f566f43df1af8573410f348c7", "parents": [ "309a9a1b5fcdcb2b83cb5bac7dd0697e34242295" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 21 18:09:53 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 21 18:09:53 2014" }, "message": "i#1551 port to ARM: implement instr creation backend for macros\n\nImplements routines needed for the ARM INSTR_CREATE_ macros:\n+ instr_create_0dst_4src()\n+ instr_create_2dst_5src()\n+ instr_create_Ndst_Msrc_vardst()\n+ instr_create_Ndst_Msrc_varsrc()\n\nChanges the macro script to add a parameter to the var-arg routines giving\nthe number of registers in the register list as there\u0027s no way to determine\nthat automatically.\n\nAlso fixes the macro script to add a missing opnd_create_reg() around\nopnd_get_base().\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3014 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "309a9a1b5fcdcb2b83cb5bac7dd0697e34242295", "tree": "f6eeffe768b72b64efe3bd7296d6ea28671bbef1", "parents": [ "bf9d316ce177d8434a951e73f0c809d60ecbd6c9" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 21 18:09:50 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 21 18:09:50 2014" }, "message": "i#1551 port to ARM: add ARM_32 and ARM_64 for clients\n\nClients now have to set one of X86_32, X86_64, ARM_32, or ARM_64 (or use\nfind_package which will do that for them).\nOur headers, from those, then auto-set X86, ARM, X64.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3013 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "bf9d316ce177d8434a951e73f0c809d60ecbd6c9", "tree": "6aadef64cbff991772246db3815762fe2ed11f37", "parents": [ "f6ee4c411174796119c55d64d70af7e9603ce6e9" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 21 18:09:46 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 21 18:09:46 2014" }, "message": "i#58 MacOS: properly mark BSD syscall in dynamorio_sys_exit for 64-bit.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3012 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "f6ee4c411174796119c55d64d70af7e9603ce6e9", "tree": "b32ff2dfda02bd57734a37fb3c164376592f8f92", "parents": [ "f750c8d76d865ffbf0493e931ecb31bf6fff74f6" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Fri Nov 21 16:53:03 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Fri Nov 21 16:53:03 2014" }, "message": "i#1551 Port DynamoRIO to ARM: fix link error for ARM build\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/175430044\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3011 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "f750c8d76d865ffbf0493e931ecb31bf6fff74f6", "tree": "db983f451ebc221cba805d53691629df032b3c26", "parents": [ "4194fd7f34e0aaa81731e6601f92f2aef3a9d1ce" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Fri Nov 21 04:02:32 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Fri Nov 21 04:02:32 2014" }, "message": "i#1551 Port DynamoRIO to ARM: fixed dynamorio_syscall\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/179060043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3010 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "4194fd7f34e0aaa81731e6601f92f2aef3a9d1ce", "tree": "452e563031a81b912eaf0e18e32e303ece6bd98f", "parents": [ "294c7f57f10fa262c434aedb7cbf288c2b1ec9ef" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Fri Nov 21 03:28:01 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Fri Nov 21 03:28:01 2014" }, "message": "i#1551 Port DynamoRIO to ARM: adjust dynamorio preferred base on ARM\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/179080043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3009 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "294c7f57f10fa262c434aedb7cbf288c2b1ec9ef", "tree": "ce350897252b47aea9450a79320f2d9de5931dd7", "parents": [ "5d1f5d2ae5c9e7f86a135ccb6b432a71ba524392" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Thu Nov 20 17:09:55 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Thu Nov 20 17:09:55 2014" }, "message": "i#1512: mark startstop flaky\n\nR\u003dbruening@google.com\nBUG\u003d1512\n\nReview URL: https://codereview.appspot.com/175390043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3008 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "5d1f5d2ae5c9e7f86a135ccb6b432a71ba524392", "tree": "2fa7a57adbf4818c30fa2ffeb4262dc335a385b8", "parents": [ "f46da596498eb185572b4b65ec878337468e9f5c" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 20 05:29:48 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 20 05:29:48 2014" }, "message": "runsuite feature: adds a variable extra_ctest_args which can be defined to\npass extra args to ctest_test(), such as INCLUDE_LABEL.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3007 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "f46da596498eb185572b4b65ec878337468e9f5c", "tree": "3497cf169ce739f54343107abdd534e5e7c3532f", "parents": [ "f4eaad844089ed8422fb47fba1a2518dfcfd7fbb" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 20 05:29:44 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 20 05:29:44 2014" }, "message": "MacOS Yosemite support\n\nIncreases -max_supported_os_version to 14.\n\nDowngrades a too-recent version violation to a non-fatal SYSLOG_WARNING as\nwe have a decent chance of running just fine on a new OSX release.\n\nFixes a couple build errors about unused functions from the new clang.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3006 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "f4eaad844089ed8422fb47fba1a2518dfcfd7fbb", "tree": "01e0bdbc5a4e64750069a6e4286acbc3d8308df8", "parents": [ "5cc0e31e4bcc92e8cd2fd06bfa725894ed434899" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 19 23:40:35 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 19 23:40:35 2014" }, "message": "i#1551 Port DynamoRIO to ARM: add empty functions in arm.asm for ARM build\n- add empty functions in arm.asm to for ARM build\n- update os.c for ARM build\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/179910043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3005 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "5cc0e31e4bcc92e8cd2fd06bfa725894ed434899", "tree": "1a522eaa2852bef3f5d717acaa6a93e50641e6fb", "parents": [ "7220526b8e28df5ae3e13d2db1a9938fbb5ab754" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 19 23:14:01 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 19 23:14:01 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update emit_utils to build on ARM\n- move x86-specific code into x86/emit_utils.c\n\nBUG\u003d1551\nR\u003dbruening@google.com\n\nReview URL: https://codereview.appspot.com/175180043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3004 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "7220526b8e28df5ae3e13d2db1a9938fbb5ab754", "tree": "265f6446596d926a4aba136e8922ba21fddd60ae", "parents": [ "f9eef12cfa580b19f707808fd1b9621636691578" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 21:37:38 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 21:37:38 2014" }, "message": "i#1551 port to ARM: fix OP_cmp, OP_cmn, OP_tst: no dst, all srcs\n\nFixes the decoding table for OP_cmp, OP_cmn, OP_tst and re-generates their\nINSTR_CREATE_ macros.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3003 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "f9eef12cfa580b19f707808fd1b9621636691578", "tree": "7479a7bb15d8669eb498d512a121278aec5da96d", "parents": [ "2e0d89c78a19dbad6857c50d31b1c22032dfc344" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 21:37:32 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 21:37:32 2014" }, "message": "i#1551 port to ARM: implement XINST_CREATE_ macros\n\nPuts in place the proper implementation of the existing XINST_CREATE_\nmacros for ARM, including OP_mvn vs OP_movw for XINST_CREATE_load_int().\nAdds instr_create_1dst_4src() which is needed for XINST_CREATE_add().\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3002 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "2e0d89c78a19dbad6857c50d31b1c22032dfc344", "tree": "a88d3574c17f4b9fa0dcb1cf9e92f22c578a703e", "parents": [ "850b0f8fe821935a304c148201c6fd5f38cfd4ab" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 21:37:28 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 21:37:28 2014" }, "message": "i#1551 port to ARM: proper macro type collapsing\n\nFinishes the attempted macro type collapsing for \"Rm_or_imm\" that was\nnot properly put in place before: the immeds must be wrapped in opnd_t, and\nthe sub-reg removal pattern must leave the _or_imm.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3001 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "850b0f8fe821935a304c148201c6fd5f38cfd4ab", "tree": "9d88c3fb3596b4b4a76c662a45cd50809d2197ea", "parents": [ "009cf37fa0a2472b1d93335e22e49acd28768d55" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 18:24:33 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 18:24:33 2014" }, "message": "i#1551 port to ARM: add INSTR_CREATE_ macros for all A32 instrs\n\nAdds INSTR_CREATE_ macros for all A32 instrs. These were generated from\ntools/arm_macros_gen.pl.\n\nAdds OPND_CREATE_INT_MSR_{NZCVQ,G,NZCVQG}() for easier use of OP_msr.\nAdds special-case OP_msr docs to tools/arm_macros_gen.pl to xref these\nmacros for INSTR_CREATE_msr.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@3000 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "009cf37fa0a2472b1d93335e22e49acd28768d55", "tree": "e5fde35c1455137b3aee12c60e940d0005a88881", "parents": [ "ee50812e31c3565e46a287d950db773c5cc3ceb3" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 18:24:29 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 18:24:29 2014" }, "message": "i#1551 port to ARM: split OP_msr_priv and OP_mrs_priv\n\nSplits off _priv versions of OP_msr and OP_mrs to avoid having instruction\nencodings that only differ in the size of the immediate.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2999 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "ee50812e31c3565e46a287d950db773c5cc3ceb3", "tree": "6235f416e61594aca6507a68728a2bafa474b0eb", "parents": [ "0d64d8f11e60551780aab0dd8277faf6f006545a" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 18:24:25 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 18:24:25 2014" }, "message": "i#1551 port to ARM: add OPND_CREATE_NEG_REG\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2998 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "0d64d8f11e60551780aab0dd8277faf6f006545a", "tree": "c4e5098efd8b0e9185f678effa3836fb62de28a5", "parents": [ "e148584d09dd726040443e63c8ed1895fe743c9e" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 18:24:19 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 18:24:19 2014" }, "message": "i#1551 port to ARM: fix OP_teq\n\nFix OP_teq\u0027s entries in the decoding tables: it has no dsts and all srcs.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2997 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "e148584d09dd726040443e63c8ed1895fe743c9e", "tree": "2effe8bdff1f4dea71a8f3611d2fe4f8c99636d3", "parents": [ "a616e1fa801eac054cf17ff27e223ba12af15730" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 18:24:09 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Wed Nov 19 18:24:09 2014" }, "message": "i#1551 port to ARM: improve instr creation macros by merging types\n\nChanges the instr creation macro generator script to combine signatures\nthat differ only in whether an opnd is a register or immed, replacing with\na single macro that takes in something like \u0027Rm_or_immed\u0027.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2996 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "a616e1fa801eac054cf17ff27e223ba12af15730", "tree": "9a744db2109e6fcc124c86242cd4ce5dab79687a", "parents": [ "af702fab047f703e1ba30397da3c55dd54ded2dd" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 19 17:28:58 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 19 17:28:58 2014" }, "message": "i#1551: Port DynamoRIO to ARM: add native_elf.c in ARM build\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/175300043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2995 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "af702fab047f703e1ba30397da3c55dd54ded2dd", "tree": "0bb3087c3eaebc303e373b3b5c7af96ae8312a45", "parents": [ "646802389a519b6c1c9aff3554cc8616f89b141b" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 19 16:52:31 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 19 16:52:31 2014" }, "message": "TBR i#1551 Port DynamoRIO to ARM: rename XINST_CREATE_jmp to XINST_CREATE_jump\n- rename XINST_CREATE_jmp_ind_mem to XINST_CREATE_jump_mem\n- rename XINST_CREATE_jmp to XINST_CREATE_jump\n\nBUG\u003d1551\nTBR\u003dbruening@google.com\n\nReview URL: https://codereview.appspot.com/175980043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2994 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "646802389a519b6c1c9aff3554cc8616f89b141b", "tree": "497f1c04fb69267c424f7158f1444a8a617719c3", "parents": [ "3b0f89e363874fe4575a57d73d369cdca7b5e926" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 19 16:30:39 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 19 16:30:39 2014" }, "message": "i#1551 Port DynamoRIO to ARM: rename TLS_REG_R and SCRATCH_REG\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/172700043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2993 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "3b0f89e363874fe4575a57d73d369cdca7b5e926", "tree": "3ecf1d945e7f133da626662ca56ab79ebcbaf455", "parents": [ "2a94f5c11f6b4546eeab424054c3a66c85e6b83a" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 20:58:47 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 20:58:47 2014" }, "message": "i#1551 port to ARM: INSTR_CREATE_ macro generation script\n\nAdds a new script that reads the decoding tables, normalizes types to base\ntypes that the user cares about (currently SIMD are all mapped to one\ntype), constructs macro signatures for every form of every instruction,\nadds suffixes to the macro names to make them unique, transforms registers\ninto the assembly names \"Rd\", \"Rn\", etc., groups the macros by common\nsignatures, adds Doxygen comments for each, and outputs the result.\n\nCurrently some aspects of the macros do not match the assembly format, such\nas dsts always preceding srcs (except for varargs). i#1563 covers\nimproving that.\n\nMacros for aliases like OP_push are still missing and will be manually added.\n\nAs mentioned, the script creates separate routines for each set of types,\nbut we may want to collapse more of them: e.g., this version of the script\nhas separate INSTR_CREATE_add(dc, Rd, Rn, Rm) and INSTR_CREATE_add_imm(dc,\nRd, Rn, imm) macros.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2992 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "2a94f5c11f6b4546eeab424054c3a66c85e6b83a", "tree": "c23efbcada7165085bbb213b25fd53271db849da", "parents": [ "33e5fc2870db3c7b9aae1e28b2abb4aaa5e85e21" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 20:58:41 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 20:58:41 2014" }, "message": "i#1551 port to ARM: add cross-platform add and sub w/ and w/o flags\n\nAdds XINST_CREATE_{add,sub}(), which do *not* touch status flags, and\nXINST_CREATE_{add,sub}_s(), which *do* touch status flags. On x86, the\nformer are implemented with OP_lea.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2991 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "33e5fc2870db3c7b9aae1e28b2abb4aaa5e85e21", "tree": "cc3aed1fd72964f0a9266102099396f669915ba8", "parents": [ "ece4286bc6f5e2e23985232d08264a05ea31718d" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 19:43:59 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 19:43:59 2014" }, "message": "i#1551 port to ARM: prepare for automatically generated macros\n\nShifts instr_create.h around to prepare for pasting in automatically\ngenerated macros.\n\nFixes INSTR_CREATE_pop() on ARM to use outward-facing DR_REG_ enum values.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2990 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "ece4286bc6f5e2e23985232d08264a05ea31718d", "tree": "3bd5cb49e06a2ebc546029c709da93cef3957967", "parents": [ "246395a07a46b8916e39b80f23f59db0188a9bbb" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 19:43:50 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 19:43:50 2014" }, "message": "i#1551 port to ARM: dr_ir_macros_{arm,x86}.h\n\nGenerates both the ARM and x86 instruction creation macros into two\nseparate headers dr_ir_macros_{arm,x86}.h, with one included from the\ntop-level dr_ir_macros.h.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2989 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "246395a07a46b8916e39b80f23f59db0188a9bbb", "tree": "8eb947e3be8c4164f7d7f9d7fe997e06b9672dc7", "parents": [ "b09f0a00a79a42b1b93ccb1173bc48e8133e38ef" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 19:43:46 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 19:43:46 2014" }, "message": "i#1551 port to ARM: {load,store}_mm \u003d\u003e {load,store}_simd\n\nRenames XINST_CREATE_{load,store}_mm() to XINST_CREATE_{load,store}_simd().\nUpdates the release notes to include other additional macros that have been\nadded.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2988 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "b09f0a00a79a42b1b93ccb1173bc48e8133e38ef", "tree": "0576ea0bb7e5a316a97982ce15e452e25d48c8c5", "parents": [ "fd324da950fc6c0e909366ebcd7ae2a8828afdbf" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 19:43:39 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 19:43:39 2014" }, "message": "i#1551 port to ARM: new namespace for cross-platform instr creation macros\n\nChanges the names of the cross-platform instruction creation macros to\nXINST_CREATE_* to avoid conflicts with arch-specific opcodes.\nChanges all the uses as well. Changes _mov() to _move().\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2987 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "fd324da950fc6c0e909366ebcd7ae2a8828afdbf", "tree": "708d73f58f6566f52e08515c8bc52a0de71e967c", "parents": [ "64b934efb51686afe5d5e8b4e3b275ede4483546" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Tue Nov 18 16:27:55 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Tue Nov 18 16:27:55 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update mangle to build on ARM\n- move core/arch/mangle.c to core/arch/x86/mangle.c\n- add core/arch/arm/mangle.c\n- extract shared code from mangle.c to core/arch/mangle_shared.c\n- extract clean call optimization code x86/clean_call_opt.c\n- add arm/clean_call_opt.c\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/176880043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2986 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "64b934efb51686afe5d5e8b4e3b275ede4483546", "tree": "efe5e313072e475dd9073597b4ac60535cdfb381", "parents": [ "9269a6dedf1eb2a572b32f013519b93b3e50b6bb" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Tue Nov 18 16:10:49 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Tue Nov 18 16:10:49 2014" }, "message": "i#1551 Port DynamoRIO to ARM: rename tls_linux.c to tls_linux_x86.c\n- rename tls_linux.c to tls_linux_x86.c\n- add tls_linux_arm.c\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/174280043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2985 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "9269a6dedf1eb2a572b32f013519b93b3e50b6bb", "tree": "1e8aaeac1e5c724a766c1e20250ab6c0bc2a568e", "parents": [ "e812477427046eb7d3cf8c5c75fe2706bbcb4b08" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 15:34:33 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 15:34:33 2014" }, "message": "i#1551 port to ARM: add implicit 0 immeds\n\nAdd implicit 0 immeds for OP_vc{eq,ge,gt,le,lt} forms that take only 2\nregisters.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2984 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "e812477427046eb7d3cf8c5c75fe2706bbcb4b08", "tree": "e38b7ed632724139aed63d6b3973f255dd2b0bdd", "parents": [ "478606f5bfff50dd8a6e79ceeef0375076252228" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 15:34:29 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 15:34:29 2014" }, "message": "i#1551 port to ARM: fix misc decoding table errors\n\nFixes a number of decoding table errors discovered by the INSTR_CREATE_\nmacro generation script.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2983 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "478606f5bfff50dd8a6e79ceeef0375076252228", "tree": "5c5a31b2541c9cedc47a8edba09135fb041a4628", "parents": [ "2cce220be0265b8a1872ddef1f9825930beadaaf" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 15:34:25 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 15:34:25 2014" }, "message": "i#1551 port to ARM: tweak opcodes for crc32, vmrs, and pkhbt\n\nTweaks some opcodes to more closely match asm and other opcodes:\n+ Adds the b, h, and w size suffixes to the OP_crc32{,c} opcode\n+ Removes the OP_vmrs_apsr opcode, leaving just OP_vmrs distinguished\n by its destination\n+ Separates OP_pkhtb from OP_pkhbt\n+ Adds DR_REG_APSR aliased to DR_REG_CPSR\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2982 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "2cce220be0265b8a1872ddef1f9825930beadaaf", "tree": "95367296c05794b981bc19233f1f82e528eb44b6", "parents": [ "47857c168bcee12ec711f69a27b502ec67f9e51e" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 15:34:21 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 15:34:21 2014" }, "message": "i#1551 port to ARM: fix operand orderings to match asm\n\nFixes the orderings to match assembly for OP_umaal, OP_mlsa, and OP_mla.\n\nFixes a bug in xop_wb2.\n\nAdds a missing base reg as a src in the writeback forms of stm and ldm.\n\nFixes swapped src-dest order of OP_ldrd PUW\u003d100 operands.\nRemoves erroneous xop_wb on an OP_ldrd and an OP_strd entry.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2981 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "47857c168bcee12ec711f69a27b502ec67f9e51e", "tree": "209dfac0f7b73346b06432bf760b08d629161384", "parents": [ "d11a593954a52dfac12c3d3d41836a17a0322818" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 15:34:17 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 15:34:17 2014" }, "message": "i#1551 port to ARM: fix offset reg for OP_{vld,vst}N*\n\nThe OP_vldN* and OP_vstN* opcodes incorrectly had RC listed when it should\nbe RD for the post-indexed forms.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2980 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "d11a593954a52dfac12c3d3d41836a17a0322818", "tree": "7de3f1b7f800f02baab15c1428a678516dbb23e2", "parents": [ "e268e530b2c9fd6d8cc4f1c03a44a0ef2428f653" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 15:34:08 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 18 15:34:08 2014" }, "message": "i#1551 port to ARM: reinstate extra op links\n\nReinstate extra operand links accidentally removed by the chaining script\nin r2953. Fixes the chaining script to avoid this problem in the future.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2979 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "e268e530b2c9fd6d8cc4f1c03a44a0ef2428f653", "tree": "476d8a3c467e45287b34c8922215bf59c7065c4f", "parents": [ "cb4334e04500d2bb8f4bc04bc273e44da0c00b2f" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 17 17:34:24 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 17 17:34:24 2014" }, "message": "Improve robustness of back_from_native_retstubs:\nOn MacOS the XCode-installed assembler is the old nasm pre-1.0 and it won\u0027t\ngenerate the push or jmp encoding we want in back_from_native_retstubs, so\nthis commit forces the small push via raw bytes and the short jump via the\n\"short\" keyword.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2978 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "cb4334e04500d2bb8f4bc04bc273e44da0c00b2f", "tree": "c059644e2ed1155a8a19342bfb859cadafde5f89", "parents": [ "dc394f52b768e96956d6bfc03e51c2d56e2394ea" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 17 17:34:19 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 17 17:34:19 2014" }, "message": "Fix bug in r2975 that broke the build on MacOSX\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2977 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "dc394f52b768e96956d6bfc03e51c2d56e2394ea", "tree": "39c33c0fc770189e9be957ce17722c31fb476f96", "parents": [ "df7841743c2fe1bc187b48603f23926beed2384d" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 17 17:34:13 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 17 17:34:13 2014" }, "message": "Fix MacOSX build issues on Yosemite\n\nFixes several build minor issues from the newer compiler on Yosemite and\nfrom Yosemite itself.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2976 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "df7841743c2fe1bc187b48603f23926beed2384d", "tree": "6649869c8aa8ce4b7d715b2dd5656820187cb1e9", "parents": [ "f469ebb4ef3be65f2a4845026ecaa4da21e6eeed" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Fri Nov 14 19:37:39 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Fri Nov 14 19:37:39 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update signal_linux.c to build on ARM\n- rename sigcontext_to_mcontext_mm to sigcontext_to_mcontext_simd\n rename mcontext_to_sigcontext_mm to mcontext_to_sigcontext_simd\n- add signal_linux_x86.c and signal_linux_arm.c\n- move x86-specific code from signal_linux.c to signal_linux_x86.c\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/166710043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2975 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "f469ebb4ef3be65f2a4845026ecaa4da21e6eeed", "tree": "4a1badfcc8a552755e9ddb97bd4c771af5cb6737", "parents": [ "f5ad6d1753902b3506e46b032d8ee60a59a14cc5" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:27:04 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:27:04 2014" }, "message": "i#1551 port to ARM: opnd_same()\n\nMoves opnd_same_sizes_ok() to arch-specific files as x86 has variable sizes\nto resolve depending on prefixes while on ARM we can do direct equality checks.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2974 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "f5ad6d1753902b3506e46b032d8ee60a59a14cc5", "tree": "aa0df05075bc2a50aed00dd032bb084a9b7ea276", "parents": [ "f477e231d4cf68bbc9e29fb3187d670c108dfbb5" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:27:00 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:27:00 2014" }, "message": "i#1551 port to ARM: fix register enum values\n\nFixes the broken register enum values by moving all the aliases to the\nbottom to preserve the implied increments.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2973 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "f477e231d4cf68bbc9e29fb3187d670c108dfbb5", "tree": "602ef3fc2ca87543b646669b2a0ee1e6a2684f34", "parents": [ "939d8f3c4c6eb960ac168a29256600ce36096d83" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:26:58 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:26:58 2014" }, "message": "i#1551 port to ARM: register list decoding\n\nAdds the missing rules for decoding the various register list formats\non ARM.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2972 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "939d8f3c4c6eb960ac168a29256600ce36096d83", "tree": "4268987a3d642c8b25f69962fa2eca1ef29950ff", "parents": [ "069d93b7897f4075f7b48155605da97bb30beba3" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:26:54 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:26:54 2014" }, "message": "i#1551 port to ARM: partial general-purpose registers\n\nExtends opnd_create_partial_reg() to support GPR\u0027s.\n\nAdds decoding of partial GPR and SIMD registers to ARM.\nAdds all the missing register decoding rules.\nAdds new DR_REG_CR0 through DR_REG_CR15 constants for the coprocessor\nregisters.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2971 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "069d93b7897f4075f7b48155605da97bb30beba3", "tree": "149041f9ca02c570f14a1f03304d8c253eb5130b", "parents": [ "7af0451e0da16ecafca30198a63f33bf2775c01e" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:26:50 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:26:50 2014" }, "message": "i#1551 port to ARM: immediate decoding\n\nFinishes base decoding for all of the immediate types.\nNormalizes the type names to have the highest bit first.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2970 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "7af0451e0da16ecafca30198a63f33bf2775c01e", "tree": "c77fc55f625a62753293e6dc8e8cba0e17ec0f70", "parents": [ "e1e45b94b8aeb22691ee9b312f377c6a72f51891" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:26:47 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:26:47 2014" }, "message": "i#1551 port to ARM: fix decoding rule errors\n\nFixes two table index computation errors\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2969 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "e1e45b94b8aeb22691ee9b312f377c6a72f51891", "tree": "ebdb173e7fae4354b0c065756b1731ca7e141ac6", "parents": [ "72ca84dc9e296fb4478a33e2ad0a6ae99eee5adb" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:26:40 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:26:40 2014" }, "message": "i#1551 port to ARM: share encoder code\n\nRefactors instr_is_encoding_possible() and get_encoding_info() to be shared\nin a new file core/arch/encode_shared.c.\n\nAdds implementations for ARM along with the start of per-type operand\nencoding checks.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2968 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "72ca84dc9e296fb4478a33e2ad0a6ae99eee5adb", "tree": "3a7936ca47bb33f14a743e4f4e0e2facec02d97a", "parents": [ "476716f989ef2cbdc0616fdadc73312c32c9b3fc" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:26:33 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 14 00:26:33 2014" }, "message": "i#1551 port to ARM: reg_is_simd()\n\nAdded reg_is_simd() for a cross-platform method to query the type of reg.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2967 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "476716f989ef2cbdc0616fdadc73312c32c9b3fc", "tree": "8dd4e93b63855d8677b839590ac21bdb554d0c5b", "parents": [ "55c733a14a417706448624f2e79bc66d54a4789f" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Thu Nov 13 23:33:39 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Thu Nov 13 23:33:39 2014" }, "message": "i#1551 Port DynamoRIO to ARM: split fcache_enter and fcache_return gencode\n- rename core/arch/emit_utils.c to core/arch/emit_utils_shared.c\n- add core/arch/{x86/arm}/emit_utils.c\n- split fcache_enter and fcache_return gencode\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/173880043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2966 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "55c733a14a417706448624f2e79bc66d54a4789f", "tree": "1236ac052d0d6bbaa1045dc4f18acab819a1554a", "parents": [ "910247d97d59a647475f3ce00410c0a31eea4dfc" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Thu Nov 13 17:57:03 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Thu Nov 13 17:57:03 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update interp.c to build on ARM\n- add INSTR_CREATE_ret and INSTR_CREATE_jmp on ARM\n- add EFLAGS_WRITE_TO_READ and EFLAGS_READ_TO_WRITE on ARM\n- update interp.c to build on ARM\n\nR\u003dbruening@google.com, brueing@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/171530045\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2965 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "910247d97d59a647475f3ce00410c0a31eea4dfc", "tree": "8767cd773003d8b19712c91790c8023a627bf82c", "parents": [ "6cc6810da007f88cfc0539868f29db3b1a91ab4e" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:34 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:34 2014" }, "message": "i#1551 port to ARM: disassembly of modified registers\n\nAdds support for printing out negated registers and index registers using\nthe new operand flags.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2964 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "6cc6810da007f88cfc0539868f29db3b1a91ab4e", "tree": "9ebd87aea95e3b776cf9ba20043679af261bb0ef", "parents": [ "87f596dc30514315ccd434c7388d7c37b418b17e" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:29 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:29 2014" }, "message": "i#1551 port to ARM: add negated index/disp support\n\nAdds sharing of the register operand flags to also indicate modifications\n(negation and shifting) to an index register or displacement in a base-disp\nmemory reference. Renames the flags for this. Adds documentation that the\nshift flag is for informational purposes only and is not guaranteed to be\nsynchronized with the real shift fields.\n\nChanges the signature for opnd_set_index_shift() as it is no longer needed\nfor chaining and it is easier to share with opnd_create_base_disp_arm() if\nit operates on a pointer.\n\nFor ARM, anytime a base-disp opnd_t is created, the disp is automatically\nmade non-negative and the new flag is set appropriately.\n\nAdds a new routine opnd_create_base_disp_arm() to avoid changing core\nroutines like opnd_create_base_disp() or even opnd_create_base_disp_ex().\n\nAdds documentation and checks that only one of the index reg versus disp\nare set for ARM in any base-disp routine.\n\nAdds support to the ARM decoder.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2963 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "87f596dc30514315ccd434c7388d7c37b418b17e", "tree": "8d8f2d5b395033cf2640e65c25f8a5c6985cf7b0", "parents": [ "02a016e5385e290bde0d2fea0cad9097e5ce57d4" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:25 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:25 2014" }, "message": "i#1551 port to ARM: register operand flags\n\nAdds a new type, dr_register_flags_t, for representing additional\nproperties of a register operand. The two flags now present are\nDR_REGMOD_VALUE_NEGATED and DR_REGMOD_VALUE_SHIFTED which indicate changes\nto a register\u0027s value when used in an instruction. The negation is\nnecessary for addressing mode writeback and post-indexing, as we did not\nsplit the opcodes. The shift is a nice hint.\n\nRenames opnd_t.seg to opnd_t.aux.\nAdds opnd_create_reg_ex() and opnd_get_flags().\nAdds ARM decoding of negated registers.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2962 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "02a016e5385e290bde0d2fea0cad9097e5ce57d4", "tree": "79bc1581b540ef0562242f6bb375d75015ea224e", "parents": [ "f90243dfbf007accd4f5137fa8222f8e3ca928f7" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:17 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:17 2014" }, "message": "i#1551 port to ARM: shifted index registers\n\nAdds support for shifted index registers in base-disp operands by storing\nthe shift type and amount as a union versus the x86 scale field. Adjusts\nall references, and makes opnd_get_scale() invalid on ARM.\n\nAdds conversion of a scale to an LSL shift in existing base-disp creation\nroutines.\n\nMakes all code referencing opnd_t.seg.segment invalid on ARM.\n\nAdds ARM decoding of shifted index registers.\n\nAdds disassembly by shifting the scale printing to x86/disassemble.c and\nadding ARM shift printing to arm/disassemble.c.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2961 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "f90243dfbf007accd4f5137fa8222f8e3ca928f7", "tree": "4aa684a4982545a9c004803cb15c12bfca067a03", "parents": [ "96927150e61887476fc3aadfd7cb2f62755e33e4" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:13 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:13 2014" }, "message": "i#1551 port to ARM: remove sub-GPR enums\n\nWe decided to throw out DR_REG_RN_TH (top half), DR_REG_RN_BH (bottom half\nfor 32-bit as we have the W versions for 64-bit), and DR_REG_RN_BB (bottom\nbyte) as they are not available in the ISA and which portion of a GPR is\nselected purely by the opcode. Our decoder will create a partial register\nfor these to help tools, but it won\u0027t specify which part of the register,\njust like for SIMD regs on x86.\n\nThis makes reg_32_to_16() and reg_32_to_8() x86-only.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2960 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "96927150e61887476fc3aadfd7cb2f62755e33e4", "tree": "944d0ba7ac9db7db77958ee816557a9c29212552", "parents": [ "0d2f31b8256e81fa15057f56cf05b39a43a7ffc8" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:10 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:10 2014" }, "message": "i#1551 port to ARM: adjust shift register sizes\n\nAdjust shift register sizes to reflect that only the bottom byte is\nactually read.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2959 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "0d2f31b8256e81fa15057f56cf05b39a43a7ffc8", "tree": "8e4876b7c400ebf861a91f249b2674bab1cbcdff", "parents": [ "f10474c2ce0d9b4b2fe0586d752c391d232d6db3" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:07 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Thu Nov 13 17:33:07 2014" }, "message": "i#1551 port to ARM: SIMD sub-reg mappings\n\nPut in proper reg_fixer mappings for the AArch32 SIMD sub-reg mappings,\nwhich double-up rather than just representing the bottom portion of the\nsame-numbered larger register.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2958 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "f10474c2ce0d9b4b2fe0586d752c391d232d6db3", "tree": "e16f23248bc54cfff6ef79fa7fc1ee7c8ceaa340", "parents": [ "db1358b46d3244aef7d573dc1661c1dea17eb64a" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 12 16:12:17 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Wed Nov 12 16:12:17 2014" }, "message": "i#1551 Port DynamoRIO to ARM: exclude native_elf.c from arm build\n- exclude native_elf.c from arm build\n- remove redundant WRITE_DR_SEG in os.c\n- update os.c, loader.c, and tls_linux.c to build on ARM\n\nBUG\u003d1551\nR\u003dbruening@google.com\n\nReview URL: https://codereview.appspot.com/168570043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2957 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "db1358b46d3244aef7d573dc1661c1dea17eb64a", "tree": "eba5fe31a65b5691bce0f6277974fcad2e736c6c", "parents": [ "9190d0693b7f8385072be1c69ab4caac140eac75" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 10 18:00:48 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 10 18:00:48 2014" }, "message": "i#1551 port to ARM: add opcode docs\n\nUpdates the x86opnums.pl script to add a prefix and remove the encoding\ntable. Adds \"IA-32/AMD64\" prefix to the x86 opcode doxygen comments, and\nadds ARM doxygen comments to the ARM opcode enum.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2956 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "9190d0693b7f8385072be1c69ab4caac140eac75", "tree": "cd02cc425d6002a9f3ab78f69b46cfce93c554ef", "parents": [ "dc3b35ed761f5c1f7311f1a3dc721b933c224158" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 10 18:00:44 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 10 18:00:44 2014" }, "message": "i#1551 port to ARM: fix i3_21\n\nThe \"i3_21\" immed in OP_mcr and OP_mrc was incorrectly put swapping the\nsize with the bit position. This fixes that and removes OPSZ_21b which is\nno longer needed.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2955 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "dc3b35ed761f5c1f7311f1a3dc721b933c224158", "tree": "29ec3410fbd3fcbf9097d257c0e5ea9674df1d6c", "parents": [ "aee141ad9f7ccaeb5f1d9ccfdab66c5241a27c71" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 10 18:00:38 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 10 18:00:38 2014" }, "message": "i#1551 port to ARM: add missing A32 instructions\n\nAdds A32 instructions missed by earlier steps:\n+ OP_vcvt{b,t}_f{16,32,64}_f{16,32,64}\n+ OP_udf\n+ OP_ldrexb\n+ OP_smc\n+ OP_smmlar: this was present but missed the \"r\" suffix\n+ Several official opcode aliases that were present as comments\n (adr, cpy, neg, smmul{,r}, smuad{,x}, smusd{,x}, sxtb{,16}, sxth,\n usad8, uxtb{,16}, uxth)\n\nAdded opcodes for the Thumb-only instructions though other support is not\nyet present:\n+ OP_it, OP_cbnz, OP_dcps{1,2,3}, OP_orn, OP_tb{b,h}\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2954 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "aee141ad9f7ccaeb5f1d9ccfdab66c5241a27c71", "tree": "2c924f27c81955c5ea05cde3977bce7c3e8fdd01", "parents": [ "c812f173269dd94f17ed1b414bc8f8c8590f6a3d" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 10 18:00:31 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Mon Nov 10 18:00:31 2014" }, "message": "i#1551 port to ARM: improve encoding chains\n\nImproves the encoding chain script to better handle duplicates. Fixes\nerrors in the script where it didn\u0027t increment the minor number on\nduplicates. Adds forcible END_LIST writes, which are now necessary.\nChanges the priorities to try and reduce chain shifts due to perl hash\norders.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2953 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "c812f173269dd94f17ed1b414bc8f8c8590f6a3d", "tree": "f6c024edcfd168ed37bc216925a3786b4588b8db", "parents": [ "8594c8f62c06aa8e7222c69cd06f14e7e5855428" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Sat Nov 08 00:00:18 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Sat Nov 08 00:00:18 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update several files to build on ARM\n- update dynamo.c, x86_code.c, and proc.c to build on ARM\n- move optimize.c to arch-specific direcotries\n- add LD_FLAGS -marmelf_linux_eabi\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/170950043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2952 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "8594c8f62c06aa8e7222c69cd06f14e7e5855428", "tree": "598b4ab5581e0cc41355fb38dc1b1b4f7a359dad", "parents": [ "1043c20738de522d048eb9bbf366de94da55737a" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Fri Nov 07 23:47:12 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Fri Nov 07 23:47:12 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update os.c to build on ARM\n- add DR_REG_TPIDRURW, DR_REG_TPIDRURO, DR_REG_TPIDR_EL0, and DR_REG_TPIDRRO_EL0\n- add WRITE_TLS_SLOT_IMM etc. for ARM\n- add MCXT_SYSCALL_RES\n- update os.c to build on ARM\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/169940043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2951 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "1043c20738de522d048eb9bbf366de94da55737a", "tree": "746d103bcff68b95694383d17cb665362b9398dd", "parents": [ "99747340dcb774b27da04db42324cdf5621db77e" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 21:49:15 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 21:49:15 2014" }, "message": "i#1551 port to ARM: unpredicated A32 part 3: encoding chains\n\nPart 3 of adding unpredicated A32 support:\n+ Extend the chain generation script to handle separate files\n and to set priorities for SIMD registers\n+ Add shorthands for the new unpred tables\n+ Add the encoding chains to both tables and the now-separate\n encoding array\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2950 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "99747340dcb774b27da04db42324cdf5621db77e", "tree": "a13dd489d514b6a9a7b849a859ac7310e4a3d9f3", "parents": [ "9f0a8acdbb9dfa8b8ca5777083dd297567136502" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 21:49:10 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 21:49:10 2014" }, "message": "i#1551 port to ARM: unpredicated A32 part 2: tables\n\nPart 2 of adding unpredicated A32 decoding support:\n+ Extend the manual parsing script to identify these new instrs.\n However, the complexity of these instrs still required a lot of\n manual modification of the generated output.\n+ Add the data for all of the new instrs organized into hierarchical\n tables arranged for density and fewest decoding steps.\n It took 18 (!) new tables to add them all.\n+ Add the shorthands for the new types for use in the tables.\n+ Require full template bits to match, to simplify tables and allow\n placing entries that require other bits without putting in a whole\n new table.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2949 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "9f0a8acdbb9dfa8b8ca5777083dd297567136502", "tree": "eb0ee34d32b75d9e7c52cd850f5d695d87347e7d", "parents": [ "e4be01db2c472788f2b6aeaec17352ec4fbda8ae" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 21:49:04 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 21:49:04 2014" }, "message": "i#1551 port to ARM: unpredicated A32 part 1: types + opcodes\n\nPart 1 of adding unpredicated A32 decoding support:\n+ Adds new decoding types\n+ Adds new decoding sizes\n+ Adds new opcodes\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2948 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "e4be01db2c472788f2b6aeaec17352ec4fbda8ae", "tree": "99b39b218e6139c912f713382ad30948f95e371e", "parents": [ "d43e16e837e90be35d1bd461f2ba6d8c7a317777" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 21:49:00 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 21:49:00 2014" }, "message": "i#1551 port to ARM: refactor a32 table file\n\nIn preparation for adding the unpredicated instrs in their own file:\n+ Move the encoding chain into its own separate file\n+ Rename table_a32.c to table_a32_pred.c\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2947 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "d43e16e837e90be35d1bd461f2ba6d8c7a317777", "tree": "8a00156c926110315b3c64d305cdfabbf5bf9c8c", "parents": [ "a66a36ca64547252146d113bca783d54de1ceaf4" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 21:48:57 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 21:48:57 2014" }, "message": "i#1551 port to ARM: fix inconsistent load memory size labels\n\nThe OP_ldrd and OP_strd instructions access 8 memory bytes, which were\nincorrectly encoded using \u0027d\u0027 instead of \u0027q\u0027.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2946 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "a66a36ca64547252146d113bca783d54de1ceaf4", "tree": "bc218c9e4e3fa63015692e85ed865b59296e9cd3", "parents": [ "33f8ab4c55811fd3cfc36011ff34049fbd850cae" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 16:13:59 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 16:13:59 2014" }, "message": "i#1551 port to ARM: switch table spacing\n\nChange spacing of table entries to put spaces after commas for easier\nsearching and scripting.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2945 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "33f8ab4c55811fd3cfc36011ff34049fbd850cae", "tree": "24bf6e5385ef2722888d1570aa55d21c4a66cd1d", "parents": [ "a7c43e19dbc1a49e6c3fbec206a4d9578e52e5b9" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 16:13:55 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 16:13:55 2014" }, "message": "i#1551 port to ARM: use consistent case in mnemonics\n\nSwitch to using lower-case for type and size specifiers on OP_ constants\nand mnemonics to match the opcode proper.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2944 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "a7c43e19dbc1a49e6c3fbec206a4d9578e52e5b9", "tree": "d64e10d9d2dfda131a32723717f71cd62f05d52a", "parents": [ "970547a8532f750c5ef6f239f166afaac932e553" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 16:13:52 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 16:13:52 2014" }, "message": "i#1551 port to ARM: add built-in support for 5+ wb sources\n\nAdd DECODE_EXTRA_WRITEBACK2 to more easily manage extra operands for instrs\nwith encoding chains, for writeback where we have extra sources of the base\nreg and index reg.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2943 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "970547a8532f750c5ef6f239f166afaac932e553", "tree": "daae993de7b87c1a4f1d4c68fa92aa7d020b09b5", "parents": [ "97bc7690df9345228d3f47b3243970db8b8d6a25" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 16:13:50 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 16:13:50 2014" }, "message": "i#1551 port to ARM: add DR_REG_{SL,FP,IP} aliases\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2942 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "97bc7690df9345228d3f47b3243970db8b8d6a25", "tree": "56d3034850e3271db91baa22910ce1603b452556", "parents": [ "8a2cdb9d16da569039873c0c6987bab481817fb8" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 16:13:46 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 16:13:46 2014" }, "message": "i#1551 port to ARM: add varying-location sub-multimedia-reg sizes\n\nJust like on x86 we\u0027ll represent sub-multimedia-reg sizes, when location is\nvariable, as things like OPSZ_1_of_8. We will not store the location. For\nnon-variable sub-sizes in the lower registers we can use the alternate\nsmaller register names instead.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2941 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "8a2cdb9d16da569039873c0c6987bab481817fb8", "tree": "c206133c1b6293aa9213f6f0d8c5fd8f4c2afb29", "parents": [ "1c5be30824a64bce655c7749a7fbd37125675d86" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 16:13:42 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Nov 07 16:13:42 2014" }, "message": "i#1551 port to ARM: fill in branches in decoding table\n\nAdds OP_b to the A32 table and fixes the operands for the other branches.\nAdds OP_jmp as an alias for OP_b.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2940 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "1c5be30824a64bce655c7749a7fbd37125675d86", "tree": "809ee16b230a9301313397a92dd138ccb1cfd9ae", "parents": [ "3ec351ffe46f6f80c8ea7415c78dc8250919745f" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Thu Nov 06 16:18:47 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Thu Nov 06 16:18:47 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update signal.c to build on ARM\n- add sigcontext on ARM\n- add SC_* on ARM\n- update signal.c to build on ARM\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/165430043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2939 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "3ec351ffe46f6f80c8ea7415c78dc8250919745f", "tree": "bd592f855db68ec9976bf83642d203d4b24cb12f", "parents": [ "538f36dca6dd0c8202ecf8dad4e1944479987152" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Tue Nov 04 21:07:27 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Tue Nov 04 21:07:27 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update arch.c to build for ARM\n- add SYSCALL_METHOD_SVC\n- add MCXT_FIRST_REG_FIELD\n- add xflag as alias to apsr on ARM in mcontext\n- update arch.c to build for ARM\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/168060043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2938 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "538f36dca6dd0c8202ecf8dad4e1944479987152", "tree": "94685e06e0b88f1ed4b8efc7f0d4358bd079b3b5", "parents": [ "a145bd0be04bc7207adb5a4908b15b780900816b" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Tue Nov 04 20:46:21 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Tue Nov 04 20:46:21 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update instr_shared.c to build for ARM\n- add INSTR_CREATE_mov(), INSTR_CREATE_load_mm(),\n INSTR_CREATE_store_mm(), and INSTR_CREATE_jmp_ind_mem().\n- add OP_load and OP_store\n- update instr_shared.c to build for ARM\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/165330043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2937 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "a145bd0be04bc7207adb5a4908b15b780900816b", "tree": "0c7a5af270c1523ece8a83bd175231e59585f125", "parents": [ "b67525a4b37da429fa37cf7d0819f1e2c6faf454" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Tue Nov 04 19:06:16 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Tue Nov 04 19:06:16 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update opnd_shared.c to build for ARM\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/165320043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2936 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "b67525a4b37da429fa37cf7d0819f1e2c6faf454", "tree": "d77bf4826b66b26da60142b96948c4884b15e727", "parents": [ "598579132b3e6bd8be7305fd03fc1bc648bc2101" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 04 04:31:06 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 04 04:31:06 2014" }, "message": "i#1559: robustly handle double slashes in Windows paths.\n\nThe kernel refuses double slashes in paths passed to system calls. We go\nto the trouble of eliminating them for more robust behavior.\n\nFixes issue 1559\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2934 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "598579132b3e6bd8be7305fd03fc1bc648bc2101", "tree": "2c335859ab2bde462fcdf879faceb1edd6a8d5a9", "parents": [ "74f8672650f77dd21882116f60c3add4eaf91b01" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 04 04:31:00 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 04 04:31:00 2014" }, "message": "i#1557, i#1558: suppress cmake 3.x policy warnings\n\nSuppress policy warnings from recent cmake versions by choosing the old\npolicy, at least until we take the time to modify our sources\nfor the new policies. Adds a new shared file make/policies.cmake.\n\nRemoves double slashes from the location property of drrun which cmake 3.x\nseems to be adding.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2933 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "74f8672650f77dd21882116f60c3add4eaf91b01", "tree": "98940de34000273dbf078ca1220294aafd1cab91", "parents": [ "bd025188d7bcaeac8fbf3af941175130bb23c9e6" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 04 04:30:57 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Tue Nov 04 04:30:57 2014" }, "message": "Fix cmake code that violated CMP0045: non-existent targets are no longer\nallowed to be queried for properties.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2932 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "bd025188d7bcaeac8fbf3af941175130bb23c9e6", "tree": "57176f99379b82aa9b89110aff5302f086890d43", "parents": [ "7a7f6c4e0e5a3f6101acbafe6ed0ef0f0d3760fb" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Mon Nov 03 18:28:54 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Mon Nov 03 18:28:54 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update disassemble_shared.c to build on ARM\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/170930043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2931 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "7a7f6c4e0e5a3f6101acbafe6ed0ef0f0d3760fb", "tree": "21581a4299007d07c7d0e658a2183a324cefe1ed", "parents": [ "9e36ebd035636135f29b861c9d769b31661882be" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Oct 31 03:28:48 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Oct 31 03:28:48 2014" }, "message": "i#1551 port to ARM: predicated SIMD/FP, part 5: operand decoding\n\nAdds decoding implementations for SIMD/FP registers, consecutive register\nlists, a certain split immed, and fpscr.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2929 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "9e36ebd035636135f29b861c9d769b31661882be", "tree": "c3394709be74c5ba26bd0044336ebc30d8ea4715", "parents": [ "be114ea68cf0fe80d1d7d9b3f3055e0b522124c0" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Oct 31 03:28:45 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Oct 31 03:28:45 2014" }, "message": "i#1551 port to ARM: predicated SIMD/FP, part 4: encoding chains\n\nFills in the new opcode encoding chains and updates the table-shifted old\nopcodes.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2928 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "be114ea68cf0fe80d1d7d9b3f3055e0b522124c0", "tree": "27d4af0450b93b095cdd3c9ef6282a9eeb4f4f7d", "parents": [ "fad7c8306f411a04d35e37519ddaa115e70570cf" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Oct 31 03:28:42 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Oct 31 03:28:42 2014" }, "message": "i#1551 port to ARM: predicated SIMD/FP, part 3: encoding dups\n\nAdds skipping of duplicate encodings to the encoding chain generation\nscript.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2927 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "fad7c8306f411a04d35e37519ddaa115e70570cf", "tree": "6e8a901f887c061ae85a06db8767a9eb54d921ad", "parents": [ "e06bec300806a4ebfa4fa67c9e5c0358e2b03f88" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Oct 31 03:28:38 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Oct 31 03:28:38 2014" }, "message": "i#1551 port to ARM: predicated SIMD/FP, part 2: table\n\nAdd predicated SIMD/FP instruction entries into the decoder tables. There\nare quite a few of these and they require several new layers of tables.\n\nModifies the generator script to improve PUW output and handle multimedia\nencodings better. Still, far too much manual work is required to create\nthese tables.\n\nAdds decoding rules for the new tables.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2926 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "e06bec300806a4ebfa4fa67c9e5c0358e2b03f88", "tree": "5f4190ce005e505e25a7f0577a0398376ae2f93c", "parents": [ "6104d373a1863e0dab13494b706f200a06240f14" ], "author": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Oct 31 03:28:31 2014" }, "committer": { "name": "derek.bruening", "email": "derek.bruening", "time": "Fri Oct 31 03:28:31 2014" }, "message": "i#1551 port to ARM: predicated SIMD/FP, part 1: types + opcodes\n\nAdd new decoding types and opcodes for all of the predicated SIMD/FP\ninstructions. Updates the type name and other locations.\n\nAdds new register DR_REG_FPSCR and updates the reg arrays.\n\nAdds various notes and comments for later improvements.\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2925 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "6104d373a1863e0dab13494b706f200a06240f14", "tree": "3feda2f541788d7ae6713335879b9bb8e47a8227", "parents": [ "08e6b2c454cbf6378c408a3a193f11ebca4bc4fd" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Thu Oct 30 18:13:29 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Thu Oct 30 18:13:29 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update translate.c for build on ARM\n\nR\u003dbruening@google.com, bruening@googl.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/163620043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2924 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "08e6b2c454cbf6378c408a3a193f11ebca4bc4fd", "tree": "b5eed0b57014bed76b5609356698d5fba466e812", "parents": [ "dfe3f7ee931184bbf8a7287f85341d4d72690dcf" ], "author": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Thu Oct 30 17:47:40 2014" }, "committer": { "name": "zhaoqin@google.com", "email": "zhaoqin@google.com", "time": "Thu Oct 30 17:47:40 2014" }, "message": "i#1551 Port DynamoRIO to ARM: update instrument.c to build on ARM\n- add TLS_SLOT_R* and TLS_REG_R*\n- add INSTR_CREATE_load and INSTR_CREATE_store\n- replace DR_REG_STACK_PTR with DR_REG_XSP for cross-platform stack pointer\n- add dr_save_arith_flags_to_reg and dr_restore_arith_flags_from_reg\n- update instrument.c to build on ARM\n\nR\u003dbruening@google.com\nBUG\u003d1551\n\nReview URL: https://codereview.appspot.com/166810043\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2923 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" }, { "commit": "dfe3f7ee931184bbf8a7287f85341d4d72690dcf", "tree": "26c7b1776bc8d039faa1d3cece991df7d449f6e3", "parents": [ "f12337ef08779e28418a6a01eb5f37bd71b8dba7" ], "author": { "name": "qin.zhao@gmail.com", "email": "qin.zhao@gmail.com", "time": "Thu Oct 30 02:00:54 2014" }, "committer": { "name": "qin.zhao@gmail.com", "email": "qin.zhao@gmail.com", "time": "Thu Oct 30 02:00:54 2014" }, "message": "i#1551 Port DynamoRIO to ARM: fixed build failure on chromebook\n- replace movcc with bcc, predicated move is not supported in thumb\n\nBUG\u003d1551\nR\u003dbruening@google.com\n\ngit-svn-id: https://dynamorio.googlecode.com/svn/trunk@2922 49cc7528-f6fd-11dd-9d1a-b59b2e1864b6\n" } ], "next": "f12337ef08779e28418a6a01eb5f37bd71b8dba7" }