i#7832: Add random layout drmemtrace scheduler feature (#7833)

Adds a new drmemtrace scheduler option and command-line flag to use a
random assignment of inputs to outputs instead of the default round
robin, to provide more variety in scheduling.

Adds a unit test of the option. The command-line flag was tested
manually (it is not easy to make automated tests of randomness).

Run round-robin default:

```
$ bin64/drrun -t drmemtrace -indir ../src/clients/drcachesim/tests/drmemtrace.threadsig.x64.tracedir -cores 6 -tool schedule_stats
Core #0 schedule: CB_____CB______
Core #1 schedule: DF_____D_F_D_F
Core #2 schedule: EA__A_A__A_A_E_A______
Core #3 schedule: G____________________________________
Core #4 schedule: H__H______________________________
Core #5 schedule: I_____________________________________
```

Now run twice with a clock seed, showing the varying layout each time:
```
$ bin64/drrun -t drmemtrace -indir ../src/clients/drcachesim/tests/drmemtrace.threadsig.x64.tracedir -cores 6 -tool schedule_stats -sched_random_initial_layout 0
Core #0 schedule: A__A_A__A_A__A______________
Core #1 schedule: CB_____CB
Core #2 schedule: HI__H__________________________
Core #3 schedule: E_____E______________
Core #4 schedule: GF_____F__F_________
Core #5 schedule: D_____D_D_______________
$ bin64/drrun -t drmemtrace -indir ../src/clients/drcachesim/tests/drmemtrace.threadsig.x64.tracedir -cores 6 -tool schedule_stats -sched_random_initial_layout 0
Core #0 schedule: C_____C_____________________
Core #1 schedule: H__H________________________________
Core #2 schedule: A__A_A__A_A__A__________________
Core #3 schedule: EI_____E____________________
Core #4 schedule: DF_____D_F_D_F
Core #5 schedule: GB_____B________________________
```

Now run twice with the same seed, showing repeatable randomness (though
we have record-replay for repeating the entire scheme, there can be
times where we want to fix a particular random outcome while varying
other unrelated parameters, so it is useful to be able to set the seed):
```
$ bin64/drrun -t drmemtrace -indir ../src/clients/drcachesim/tests/drmemtrace.threadsig.x64.tracedir -cores 6 -tool schedule_stats -sched_random_initial_layout 1
Core #0 schedule: DE_____D_E_D
Core #1 schedule: CG_____C________________
Core #2 schedule: HF__H____F__F______
Core #3 schedule: A__A_A__A_A__A______________
Core #4 schedule: I______________________________
Core #5 schedule: B_____B__________________
$ bin64/drrun -t drmemtrace -indir ../src/clients/drcachesim/tests/drmemtrace.threadsig.x64.tracedir -cores 6 -tool schedule_stats -sched_random_initial_layout 1
Core #0 schedule: DE_____D_E_D
Core #1 schedule: CG_____C_______________
Core #2 schedule: HF__H____F__F________
Core #3 schedule: A__A_A__A_A__A______________
Core #4 schedule: I______________________________
Core #5 schedule: B_____B__________________
```

Fixes #7832