arch/arm/boot/dts/atlas6-evb.dts

/*
 * DTS file for CSR SiRFatlas6 Evaluation Board
 *
 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
 *
 * Licensed under GPLv2 or later.
 */

/dts-v1/;

/include/ "atlas6.dtsi"

/ {
	model = "CSR SiRFatlas6 Evaluation Board";
	compatible = "sirf,atlas6-cb", "sirf,atlas6";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>;
	};

	axi {
		peri-iobg {
			uart@b0060000 {
				pinctrl-names = "default";
				pinctrl-0 = <&uart1_pins_a>;
			};
			spi@b00d0000 {
				status = "okay";
				pinctrl-names = "default";
				pinctrl-0 = <&spi0_pins_a>;
				spi@0 {
					compatible = "spidev";
					reg = <0>;
					spi-max-frequency = <1000000>;
				};
			};
			spi@b0170000 {
				pinctrl-names = "default";
				pinctrl-0 = <&spi1_pins_a>;
			};
			i2c0: i2c@b00e0000 {
				status = "okay";
				pinctrl-names = "default";
				pinctrl-0 = <&i2c0_pins_a>;
				lcd@40 {
					compatible = "sirf,lcd";
					reg = <0x40>;
				};
			};

		};
		disp-iobg {
			lcd@90010000 {
				status = "okay";
				pinctrl-names = "default";
				pinctrl-0 = <&lcd_24pins_a>;
			};
		};
	};
	display: display@0 {
	    panels {
		panel0: panel@0 {
			panel-name = "Innolux TFT";
			hactive = <800>;
			vactive = <480>;
			left_margin = <20>;
			right_margin = <234>;
			upper_margin = <3>;
			lower_margin = <41>;
			hsync_len = <3>;
			vsync_len = <2>;
			pixclock = <33264000>;
			sync = <3>;
			timing = <0x88>;
			};
	    };
	};
};