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.\" ========================================================================
.IX Title "TBLGEN 1"
.TH TBLGEN 1 "2006-06-02" "CVS" "LLVM Command Guide"
tblgen \- Target Description To C++ Code Generator
\&\fBtblgen\fR [\fIoptions\fR] [\fIfilename\fR]
\&\fBtblgen\fR translates from target description (.td) files into \*(C+ code that can
be included in the definition of an \s-1LLVM\s0 target library. Most users of \s-1LLVM\s0 will
not need to use this program. It is only for assisting with writing an \s-1LLVM\s0
target backend.
The input and output of \fBtblgen\fR is beyond the scope of this short
introduction. Please see the \fICodeGeneration\fR page in the \s-1LLVM\s0 documentation.
The \fIfilename\fR argument specifies the name of a Target Description (.td) file
to read as input.
.IX Header "OPTIONS"
.IP "\fB\-\-help\fR" 4
.IX Item "--help"
Print a summary of command line options.
.IP "\fB\-o\fR \fIfilename\fR" 4
.IX Item "-o filename"
Specify the output file name. If \fIfilename\fR is \f(CW\*(C`\-\*(C'\fR, then \fBtblgen\fR
sends its output to standard output.
.IP "\fB\-I\fR \fIdirectory\fR" 4
.IX Item "-I directory"
Specify where to find other target description files for inclusion. The
\&\fIdirectory\fR value should be a full or partial path to a directory that contains
target description files.
.IP "\fB\-asmwriternum\fR \fIN\fR" 4
.IX Item "-asmwriternum N"
Make \-gen\-asm\-writer emit assembly writer number \fIN\fR.
.IP "\fB\-class\fR \fIclass Name\fR" 4
.IX Item "-class class Name"
Print the enumeration list for this class.
.IP "\fB\-print\-records\fR" 4
.IX Item "-print-records"
Print all records to standard output (default).
.IP "\fB\-print\-enums\fR" 4
.IX Item "-print-enums"
Print enumeration values for a class
.IP "\fB\-gen\-emitter\fR" 4
.IX Item "-gen-emitter"
Generate machine code emitter.
.IP "\fB\-gen\-register\-enums\fR" 4
.IX Item "-gen-register-enums"
Generate the enumeration values for all registers.
.IP "\fB\-gen\-register\-desc\fR" 4
.IX Item "-gen-register-desc"
Generate a register info description for each register.
.IP "\fB\-gen\-register\-desc\-header\fR" 4
.IX Item "-gen-register-desc-header"
Generate a register info description header for each register.
.IP "\fB\-gen\-instr\-enums\fR" 4
.IX Item "-gen-instr-enums"
Generate enumeration values for instructions.
.IP "\fB\-gen\-instr\-desc\fR" 4
.IX Item "-gen-instr-desc"
Generate instruction descriptions.
.IP "\fB\-gen\-asm\-writer\fR" 4
.IX Item "-gen-asm-writer"
Generate the assembly writer.
.IP "\fB\-gen\-dag\-isel\fR" 4
.IX Item "-gen-dag-isel"
Generate a \s-1DAG\s0 (Directed Acycle Graph) instruction selector.
.IP "\fB\-gen\-subtarget\fR" 4
.IX Item "-gen-subtarget"
Generate subtarget enumerations.
.IP "\fB\-gen\-intrinsic\fR" 4
.IX Item "-gen-intrinsic"
Generate intrinsic information.
.IP "\fB\-version\fR" 4
.IX Item "-version"
Show the version number of this program.
If \fBtblgen\fR succeeds, it will exit with 0. Otherwise, if an error
occurs, it will exit with a non-zero value.
.IX Header "AUTHORS"
Maintained by The \s-1LLVM\s0 Team (<>).