[ARM] Implement TTI::isHardwareLoopProfitable
Implement the backend target hook to drive the HardwareLoops pass.
The low-overhead branch extension for Arm M-class cores is flexible
enough that we don't have to ensure correctness at this point, except
checking that the loop counter variable can be stored in LR - a
32-bit register. For it to be profitable, we want to avoid loops that
contain function calls, or any other instruction that alters the PC.
This implementation uses TargetLoweringInfo, to query type and
operation actions, looks at intrinsic calls and also performs some
manual checks for remainder/division and FP operations.
I think this should be a good base to start and extra details can be
filled out later.

Differential Revision: https://reviews.llvm.org/D62907

llvm-svn: 363149
8 files changed
tree: 11f6ae6c24a193eae3affa584ca3d02c244845b6
  1. .arcconfig
  2. .clang-format
  3. .clang-tidy
  4. .gitignore
  5. README.md
  6. clang-tools-extra/
  7. clang/
  8. compiler-rt/
  9. debuginfo-tests/
  10. libclc/
  11. libcxx/
  12. libcxxabi/
  13. libunwind/
  14. lld/
  15. lldb/
  16. llgo/
  17. llvm/
  18. openmp/
  19. parallel-libs/
  20. polly/
  21. pstl/

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