[AMDGPU] Fix for branch offset hardware workaround

This fixes a hardware bug that makes a branch offset of 0x3f unsafe.
This replaces the 32 bit branch with offset 0x3f to a 64 bit
instruction that includes the same 32 bit branch and the encoding
for a s_nop 0 to follow. The relaxer than modifies the offsets

Change-Id: I10b7aed99d651f8159401b01bb421f105fa6288e

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63494

llvm-svn: 364451
10 files changed
tree: 1b9439a3630c4fcf053184b1e3d54c61bf7acd66
  1. .arcconfig
  2. .clang-format
  3. .clang-tidy
  4. .github/
  5. .gitignore
  6. README.md
  7. clang-tools-extra/
  8. clang/
  9. compiler-rt/
  10. debuginfo-tests/
  11. libclc/
  12. libcxx/
  13. libcxxabi/
  14. libunwind/
  15. lld/
  16. lldb/
  17. llgo/
  18. llvm/
  19. openmp/
  20. parallel-libs/
  21. polly/
  22. pstl/

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