[AMDGPU] Divergence driven ISel. Assign register class for cross block values according to the divergence.

Details: To make instruction selection really divergence driven it is necessary to assign
         the correct register classes to the cross block values beforehand. For the divergent targets
         same value type requires different register classes dependent on the value divergence.

Reviewers: rampitec, nhaehnle

Differential Revision: https://reviews.llvm.org/D59990

llvm-svn: 361644
49 files changed
tree: c33731ec57ab929a5ec75f6adc7cdba1007ddc7d
  1. .arcconfig
  2. .clang-format
  3. .clang-tidy
  4. .gitignore
  5. README.md
  6. clang-tools-extra/
  7. clang/
  8. compiler-rt/
  9. debuginfo-tests/
  10. libclc/
  11. libcxx/
  12. libcxxabi/
  13. libunwind/
  14. lld/
  15. lldb/
  16. llgo/
  17. llvm/
  18. openmp/
  19. parallel-libs/
  20. polly/
  21. pstl/

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