)]}' { "commit": "ed4cd4487082d0e6bc44e5b42ee7b5e2451cec8a", "tree": "0d7bb9d70366f1e2d41aef39f45b10b09684eae4", "parents": [ "8a529f3ceae15a9100b8ace0ab9439719fba61a2" ], "author": { "name": "Craig Topper", "email": "craig.topper@intel.com", "time": "Wed Jun 12 06:29:53 2019" }, "committer": { "name": "Craig Topper", "email": "craig.topper@intel.com", "time": "Wed Jun 12 06:29:53 2019" }, "message": "[X86] Add VCMPSSZrr_Intk and VCMPSDZrr_Intk to isNonFoldablePartialRegisterLoad.\n\nThe non-masked versions are already in there. I\u0027m having some\ntrouble coming up with a way to test this right now. Most load\nfolding should happen during isel so I\u0027m not sure how to get\npeephole pass to do it.\n\nllvm-svn: 363125\n", "tree_diff": [ { "type": "modify", "old_id": "2fe438e3def9dcc2b4e5da99fc215195aa4b34d1", "old_mode": 33188, "old_path": "llvm/lib/Target/X86/X86InstrInfo.cpp", "new_id": "d1ccb5c4af1f38291a363367e5a4c6e216ea53e3", "new_mode": 33188, "new_path": "llvm/lib/Target/X86/X86InstrInfo.cpp" } ] }