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// Copyright 2012 the V8 project authors. All rights reserved.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:
//
// * Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
// * Redistributions in binary form must reproduce the above
// copyright notice, this list of conditions and the following
// disclaimer in the documentation and/or other materials provided
// with the distribution.
// * Neither the name of Google Inc. nor the names of its
// contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include "v8.h"
#if defined(V8_TARGET_ARCH_MIPS)
#include "bootstrapper.h"
#include "code-stubs.h"
#include "codegen.h"
#include "regexp-macro-assembler.h"
#include "stub-cache.h"
namespace v8 {
namespace internal {
void KeyedLoadFastElementStub::InitializeInterfaceDescriptor(
Isolate* isolate,
CodeStubInterfaceDescriptor* descriptor) {
static Register registers[] = { a1, a0 };
descriptor->register_param_count_ = 2;
descriptor->register_params_ = registers;
descriptor->deoptimization_handler_ =
FUNCTION_ADDR(KeyedLoadIC_MissFromStubFailure);
}
void TransitionElementsKindStub::InitializeInterfaceDescriptor(
Isolate* isolate,
CodeStubInterfaceDescriptor* descriptor) {
static Register registers[] = { a0, a1 };
descriptor->register_param_count_ = 2;
descriptor->register_params_ = registers;
Address entry =
Runtime::FunctionForId(Runtime::kTransitionElementsKind)->entry;
descriptor->deoptimization_handler_ = FUNCTION_ADDR(entry);
}
#define __ ACCESS_MASM(masm)
static void EmitIdenticalObjectComparison(MacroAssembler* masm,
Label* slow,
Condition cc);
static void EmitSmiNonsmiComparison(MacroAssembler* masm,
Register lhs,
Register rhs,
Label* rhs_not_nan,
Label* slow,
bool strict);
static void EmitTwoNonNanDoubleComparison(MacroAssembler* masm, Condition cc);
static void EmitStrictTwoHeapObjectCompare(MacroAssembler* masm,
Register lhs,
Register rhs);
// Check if the operand is a heap number.
static void EmitCheckForHeapNumber(MacroAssembler* masm, Register operand,
Register scratch1, Register scratch2,
Label* not_a_heap_number) {
__ lw(scratch1, FieldMemOperand(operand, HeapObject::kMapOffset));
__ LoadRoot(scratch2, Heap::kHeapNumberMapRootIndex);
__ Branch(not_a_heap_number, ne, scratch1, Operand(scratch2));
}
void ToNumberStub::Generate(MacroAssembler* masm) {
// The ToNumber stub takes one argument in a0.
Label check_heap_number, call_builtin;
__ JumpIfNotSmi(a0, &check_heap_number);
__ Ret(USE_DELAY_SLOT);
__ mov(v0, a0);
__ bind(&check_heap_number);
EmitCheckForHeapNumber(masm, a0, a1, t0, &call_builtin);
__ Ret(USE_DELAY_SLOT);
__ mov(v0, a0);
__ bind(&call_builtin);
__ push(a0);
__ InvokeBuiltin(Builtins::TO_NUMBER, JUMP_FUNCTION);
}
void FastNewClosureStub::Generate(MacroAssembler* masm) {
// Create a new closure from the given function info in new
// space. Set the context to the current context in cp.
Counters* counters = masm->isolate()->counters();
Label gc;
// Pop the function info from the stack.
__ pop(a3);
// Attempt to allocate new JSFunction in new space.
__ AllocateInNewSpace(JSFunction::kSize,
v0,
a1,
a2,
&gc,
TAG_OBJECT);
__ IncrementCounter(counters->fast_new_closure_total(), 1, t2, t3);
int map_index = (language_mode_ == CLASSIC_MODE)
? Context::FUNCTION_MAP_INDEX
: Context::STRICT_MODE_FUNCTION_MAP_INDEX;
// Compute the function map in the current native context and set that
// as the map of the allocated object.
__ lw(a2, MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
__ lw(a2, FieldMemOperand(a2, GlobalObject::kNativeContextOffset));
__ lw(t1, MemOperand(a2, Context::SlotOffset(map_index)));
__ sw(t1, FieldMemOperand(v0, HeapObject::kMapOffset));
// Initialize the rest of the function. We don't have to update the
// write barrier because the allocated object is in new space.
__ LoadRoot(a1, Heap::kEmptyFixedArrayRootIndex);
__ LoadRoot(t1, Heap::kTheHoleValueRootIndex);
__ sw(a1, FieldMemOperand(v0, JSObject::kPropertiesOffset));
__ sw(a1, FieldMemOperand(v0, JSObject::kElementsOffset));
__ sw(t1, FieldMemOperand(v0, JSFunction::kPrototypeOrInitialMapOffset));
__ sw(a3, FieldMemOperand(v0, JSFunction::kSharedFunctionInfoOffset));
__ sw(cp, FieldMemOperand(v0, JSFunction::kContextOffset));
__ sw(a1, FieldMemOperand(v0, JSFunction::kLiteralsOffset));
// Initialize the code pointer in the function to be the one
// found in the shared function info object.
// But first check if there is an optimized version for our context.
Label check_optimized;
Label install_unoptimized;
if (FLAG_cache_optimized_code) {
__ lw(a1,
FieldMemOperand(a3, SharedFunctionInfo::kOptimizedCodeMapOffset));
__ And(at, a1, a1);
__ Branch(&check_optimized, ne, at, Operand(zero_reg));
}
__ bind(&install_unoptimized);
__ LoadRoot(t0, Heap::kUndefinedValueRootIndex);
__ sw(t0, FieldMemOperand(v0, JSFunction::kNextFunctionLinkOffset));
__ lw(a3, FieldMemOperand(a3, SharedFunctionInfo::kCodeOffset));
__ Addu(a3, a3, Operand(Code::kHeaderSize - kHeapObjectTag));
// Return result. The argument function info has been popped already.
__ sw(a3, FieldMemOperand(v0, JSFunction::kCodeEntryOffset));
__ Ret();
__ bind(&check_optimized);
__ IncrementCounter(counters->fast_new_closure_try_optimized(), 1, t2, t3);
// a2 holds native context, a1 points to fixed array of 3-element entries
// (native context, optimized code, literals).
// The optimized code map must never be empty, so check the first elements.
Label install_optimized;
// Speculatively move code object into t0.
__ lw(t0, FieldMemOperand(a1, FixedArray::kHeaderSize + kPointerSize));
__ lw(t1, FieldMemOperand(a1, FixedArray::kHeaderSize));
__ Branch(&install_optimized, eq, a2, Operand(t1));
// Iterate through the rest of map backwards. t0 holds an index as a Smi.
Label loop;
__ lw(t0, FieldMemOperand(a1, FixedArray::kLengthOffset));
__ bind(&loop);
// Do not double check first entry.
__ Branch(&install_unoptimized, eq, t0,
Operand(Smi::FromInt(SharedFunctionInfo::kEntryLength)));
__ Subu(t0, t0, Operand(
Smi::FromInt(SharedFunctionInfo::kEntryLength))); // Skip an entry.
__ Addu(t1, a1, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
__ sll(at, t0, kPointerSizeLog2 - kSmiTagSize);
__ Addu(t1, t1, Operand(at));
__ lw(t1, MemOperand(t1));
__ Branch(&loop, ne, a2, Operand(t1));
// Hit: fetch the optimized code.
__ Addu(t1, a1, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
__ sll(at, t0, kPointerSizeLog2 - kSmiTagSize);
__ Addu(t1, t1, Operand(at));
__ Addu(t1, t1, Operand(kPointerSize));
__ lw(t0, MemOperand(t1));
__ bind(&install_optimized);
__ IncrementCounter(counters->fast_new_closure_install_optimized(),
1, t2, t3);
// TODO(fschneider): Idea: store proper code pointers in the map and either
// unmangle them on marking or do nothing as the whole map is discarded on
// major GC anyway.
__ Addu(t0, t0, Operand(Code::kHeaderSize - kHeapObjectTag));
__ sw(t0, FieldMemOperand(v0, JSFunction::kCodeEntryOffset));
// Now link a function into a list of optimized functions.
__ lw(t0, ContextOperand(a2, Context::OPTIMIZED_FUNCTIONS_LIST));
__ sw(t0, FieldMemOperand(v0, JSFunction::kNextFunctionLinkOffset));
// No need for write barrier as JSFunction (eax) is in the new space.
__ sw(v0, ContextOperand(a2, Context::OPTIMIZED_FUNCTIONS_LIST));
// Store JSFunction (eax) into edx before issuing write barrier as
// it clobbers all the registers passed.
__ mov(t0, v0);
__ RecordWriteContextSlot(
a2,
Context::SlotOffset(Context::OPTIMIZED_FUNCTIONS_LIST),
t0,
a1,
kRAHasNotBeenSaved,
kDontSaveFPRegs);
// Return result. The argument function info has been popped already.
__ Ret();
// Create a new closure through the slower runtime call.
__ bind(&gc);
__ LoadRoot(t0, Heap::kFalseValueRootIndex);
__ Push(cp, a3, t0);
__ TailCallRuntime(Runtime::kNewClosure, 3, 1);
}
void FastNewContextStub::Generate(MacroAssembler* masm) {
// Try to allocate the context in new space.
Label gc;
int length = slots_ + Context::MIN_CONTEXT_SLOTS;
// Attempt to allocate the context in new space.
__ AllocateInNewSpace(FixedArray::SizeFor(length),
v0,
a1,
a2,
&gc,
TAG_OBJECT);
// Load the function from the stack.
__ lw(a3, MemOperand(sp, 0));
// Set up the object header.
__ LoadRoot(a1, Heap::kFunctionContextMapRootIndex);
__ li(a2, Operand(Smi::FromInt(length)));
__ sw(a2, FieldMemOperand(v0, FixedArray::kLengthOffset));
__ sw(a1, FieldMemOperand(v0, HeapObject::kMapOffset));
// Set up the fixed slots, copy the global object from the previous context.
__ lw(a2, MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
__ li(a1, Operand(Smi::FromInt(0)));
__ sw(a3, MemOperand(v0, Context::SlotOffset(Context::CLOSURE_INDEX)));
__ sw(cp, MemOperand(v0, Context::SlotOffset(Context::PREVIOUS_INDEX)));
__ sw(a1, MemOperand(v0, Context::SlotOffset(Context::EXTENSION_INDEX)));
__ sw(a2, MemOperand(v0, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
// Initialize the rest of the slots to undefined.
__ LoadRoot(a1, Heap::kUndefinedValueRootIndex);
for (int i = Context::MIN_CONTEXT_SLOTS; i < length; i++) {
__ sw(a1, MemOperand(v0, Context::SlotOffset(i)));
}
// Remove the on-stack argument and return.
__ mov(cp, v0);
__ DropAndRet(1);
// Need to collect. Call into runtime system.
__ bind(&gc);
__ TailCallRuntime(Runtime::kNewFunctionContext, 1, 1);
}
void FastNewBlockContextStub::Generate(MacroAssembler* masm) {
// Stack layout on entry:
//
// [sp]: function.
// [sp + kPointerSize]: serialized scope info
// Try to allocate the context in new space.
Label gc;
int length = slots_ + Context::MIN_CONTEXT_SLOTS;
__ AllocateInNewSpace(FixedArray::SizeFor(length),
v0, a1, a2, &gc, TAG_OBJECT);
// Load the function from the stack.
__ lw(a3, MemOperand(sp, 0));
// Load the serialized scope info from the stack.
__ lw(a1, MemOperand(sp, 1 * kPointerSize));
// Set up the object header.
__ LoadRoot(a2, Heap::kBlockContextMapRootIndex);
__ sw(a2, FieldMemOperand(v0, HeapObject::kMapOffset));
__ li(a2, Operand(Smi::FromInt(length)));
__ sw(a2, FieldMemOperand(v0, FixedArray::kLengthOffset));
// If this block context is nested in the native context we get a smi
// sentinel instead of a function. The block context should get the
// canonical empty function of the native context as its closure which
// we still have to look up.
Label after_sentinel;
__ JumpIfNotSmi(a3, &after_sentinel);
if (FLAG_debug_code) {
const char* message = "Expected 0 as a Smi sentinel";
__ Assert(eq, message, a3, Operand(zero_reg));
}
__ lw(a3, GlobalObjectOperand());
__ lw(a3, FieldMemOperand(a3, GlobalObject::kNativeContextOffset));
__ lw(a3, ContextOperand(a3, Context::CLOSURE_INDEX));
__ bind(&after_sentinel);
// Set up the fixed slots, copy the global object from the previous context.
__ lw(a2, ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX));
__ sw(a3, ContextOperand(v0, Context::CLOSURE_INDEX));
__ sw(cp, ContextOperand(v0, Context::PREVIOUS_INDEX));
__ sw(a1, ContextOperand(v0, Context::EXTENSION_INDEX));
__ sw(a2, ContextOperand(v0, Context::GLOBAL_OBJECT_INDEX));
// Initialize the rest of the slots to the hole value.
__ LoadRoot(a1, Heap::kTheHoleValueRootIndex);
for (int i = 0; i < slots_; i++) {
__ sw(a1, ContextOperand(v0, i + Context::MIN_CONTEXT_SLOTS));
}
// Remove the on-stack argument and return.
__ mov(cp, v0);
__ DropAndRet(2);
// Need to collect. Call into runtime system.
__ bind(&gc);
__ TailCallRuntime(Runtime::kPushBlockContext, 2, 1);
}
static void GenerateFastCloneShallowArrayCommon(
MacroAssembler* masm,
int length,
FastCloneShallowArrayStub::Mode mode,
AllocationSiteMode allocation_site_mode,
Label* fail) {
// Registers on entry:
// a3: boilerplate literal array.
ASSERT(mode != FastCloneShallowArrayStub::CLONE_ANY_ELEMENTS);
// All sizes here are multiples of kPointerSize.
int elements_size = 0;
if (length > 0) {
elements_size = mode == FastCloneShallowArrayStub::CLONE_DOUBLE_ELEMENTS
? FixedDoubleArray::SizeFor(length)
: FixedArray::SizeFor(length);
}
int size = JSArray::kSize;
int allocation_info_start = size;
if (allocation_site_mode == TRACK_ALLOCATION_SITE) {
size += AllocationSiteInfo::kSize;
}
size += elements_size;
// Allocate both the JS array and the elements array in one big
// allocation. This avoids multiple limit checks.
__ AllocateInNewSpace(size,
v0,
a1,
a2,
fail,
TAG_OBJECT);
if (allocation_site_mode == TRACK_ALLOCATION_SITE) {
__ li(a2, Operand(Handle<Map>(masm->isolate()->heap()->
allocation_site_info_map())));
__ sw(a2, FieldMemOperand(v0, allocation_info_start));
__ sw(a3, FieldMemOperand(v0, allocation_info_start + kPointerSize));
}
// Copy the JS array part.
for (int i = 0; i < JSArray::kSize; i += kPointerSize) {
if ((i != JSArray::kElementsOffset) || (length == 0)) {
__ lw(a1, FieldMemOperand(a3, i));
__ sw(a1, FieldMemOperand(v0, i));
}
}
if (length > 0) {
// Get hold of the elements array of the boilerplate and setup the
// elements pointer in the resulting object.
__ lw(a3, FieldMemOperand(a3, JSArray::kElementsOffset));
if (allocation_site_mode == TRACK_ALLOCATION_SITE) {
__ Addu(a2, v0, Operand(JSArray::kSize + AllocationSiteInfo::kSize));
} else {
__ Addu(a2, v0, Operand(JSArray::kSize));
}
__ sw(a2, FieldMemOperand(v0, JSArray::kElementsOffset));
// Copy the elements array.
ASSERT((elements_size % kPointerSize) == 0);
__ CopyFields(a2, a3, a1.bit(), elements_size / kPointerSize);
}
}
void FastCloneShallowArrayStub::Generate(MacroAssembler* masm) {
// Stack layout on entry:
//
// [sp]: constant elements.
// [sp + kPointerSize]: literal index.
// [sp + (2 * kPointerSize)]: literals array.
// Load boilerplate object into r3 and check if we need to create a
// boilerplate.
Label slow_case;
__ lw(a3, MemOperand(sp, 2 * kPointerSize));
__ lw(a0, MemOperand(sp, 1 * kPointerSize));
__ Addu(a3, a3, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
__ sll(t0, a0, kPointerSizeLog2 - kSmiTagSize);
__ Addu(t0, a3, t0);
__ lw(a3, MemOperand(t0));
__ LoadRoot(t1, Heap::kUndefinedValueRootIndex);
__ Branch(&slow_case, eq, a3, Operand(t1));
FastCloneShallowArrayStub::Mode mode = mode_;
if (mode == CLONE_ANY_ELEMENTS) {
Label double_elements, check_fast_elements;
__ lw(v0, FieldMemOperand(a3, JSArray::kElementsOffset));
__ lw(v0, FieldMemOperand(v0, HeapObject::kMapOffset));
__ LoadRoot(t1, Heap::kFixedCOWArrayMapRootIndex);
__ Branch(&check_fast_elements, ne, v0, Operand(t1));
GenerateFastCloneShallowArrayCommon(masm, 0, COPY_ON_WRITE_ELEMENTS,
allocation_site_mode_,
&slow_case);
// Return and remove the on-stack parameters.
__ DropAndRet(3);
__ bind(&check_fast_elements);
__ LoadRoot(t1, Heap::kFixedArrayMapRootIndex);
__ Branch(&double_elements, ne, v0, Operand(t1));
GenerateFastCloneShallowArrayCommon(masm, length_, CLONE_ELEMENTS,
allocation_site_mode_,
&slow_case);
// Return and remove the on-stack parameters.
__ DropAndRet(3);
__ bind(&double_elements);
mode = CLONE_DOUBLE_ELEMENTS;
// Fall through to generate the code to handle double elements.
}
if (FLAG_debug_code) {
const char* message;
Heap::RootListIndex expected_map_index;
if (mode == CLONE_ELEMENTS) {
message = "Expected (writable) fixed array";
expected_map_index = Heap::kFixedArrayMapRootIndex;
} else if (mode == CLONE_DOUBLE_ELEMENTS) {
message = "Expected (writable) fixed double array";
expected_map_index = Heap::kFixedDoubleArrayMapRootIndex;
} else {
ASSERT(mode == COPY_ON_WRITE_ELEMENTS);
message = "Expected copy-on-write fixed array";
expected_map_index = Heap::kFixedCOWArrayMapRootIndex;
}
__ push(a3);
__ lw(a3, FieldMemOperand(a3, JSArray::kElementsOffset));
__ lw(a3, FieldMemOperand(a3, HeapObject::kMapOffset));
__ LoadRoot(at, expected_map_index);
__ Assert(eq, message, a3, Operand(at));
__ pop(a3);
}
GenerateFastCloneShallowArrayCommon(masm, length_, mode,
allocation_site_mode_,
&slow_case);
// Return and remove the on-stack parameters.
__ DropAndRet(3);
__ bind(&slow_case);
__ TailCallRuntime(Runtime::kCreateArrayLiteralShallow, 3, 1);
}
void FastCloneShallowObjectStub::Generate(MacroAssembler* masm) {
// Stack layout on entry:
//
// [sp]: object literal flags.
// [sp + kPointerSize]: constant properties.
// [sp + (2 * kPointerSize)]: literal index.
// [sp + (3 * kPointerSize)]: literals array.
// Load boilerplate object into a3 and check if we need to create a
// boilerplate.
Label slow_case;
__ lw(a3, MemOperand(sp, 3 * kPointerSize));
__ lw(a0, MemOperand(sp, 2 * kPointerSize));
__ Addu(a3, a3, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
__ sll(t0, a0, kPointerSizeLog2 - kSmiTagSize);
__ Addu(a3, t0, a3);
__ lw(a3, MemOperand(a3));
__ LoadRoot(t0, Heap::kUndefinedValueRootIndex);
__ Branch(&slow_case, eq, a3, Operand(t0));
// Check that the boilerplate contains only fast properties and we can
// statically determine the instance size.
int size = JSObject::kHeaderSize + length_ * kPointerSize;
__ lw(a0, FieldMemOperand(a3, HeapObject::kMapOffset));
__ lbu(a0, FieldMemOperand(a0, Map::kInstanceSizeOffset));
__ Branch(&slow_case, ne, a0, Operand(size >> kPointerSizeLog2));
// Allocate the JS object and copy header together with all in-object
// properties from the boilerplate.
__ AllocateInNewSpace(size, v0, a1, a2, &slow_case, TAG_OBJECT);
for (int i = 0; i < size; i += kPointerSize) {
__ lw(a1, FieldMemOperand(a3, i));
__ sw(a1, FieldMemOperand(v0, i));
}
// Return and remove the on-stack parameters.
__ DropAndRet(4);
__ bind(&slow_case);
__ TailCallRuntime(Runtime::kCreateObjectLiteralShallow, 4, 1);
}
// Takes a Smi and converts to an IEEE 64 bit floating point value in two
// registers. The format is 1 sign bit, 11 exponent bits (biased 1023) and
// 52 fraction bits (20 in the first word, 32 in the second). Zeros is a
// scratch register. Destroys the source register. No GC occurs during this
// stub so you don't have to set up the frame.
class ConvertToDoubleStub : public PlatformCodeStub {
public:
ConvertToDoubleStub(Register result_reg_1,
Register result_reg_2,
Register source_reg,
Register scratch_reg)
: result1_(result_reg_1),
result2_(result_reg_2),
source_(source_reg),
zeros_(scratch_reg) { }
private:
Register result1_;
Register result2_;
Register source_;
Register zeros_;
// Minor key encoding in 16 bits.
class ModeBits: public BitField<OverwriteMode, 0, 2> {};
class OpBits: public BitField<Token::Value, 2, 14> {};
Major MajorKey() { return ConvertToDouble; }
int MinorKey() {
// Encode the parameters in a unique 16 bit value.
return result1_.code() +
(result2_.code() << 4) +
(source_.code() << 8) +
(zeros_.code() << 12);
}
void Generate(MacroAssembler* masm);
};
void ConvertToDoubleStub::Generate(MacroAssembler* masm) {
#ifndef BIG_ENDIAN_FLOATING_POINT
Register exponent = result1_;
Register mantissa = result2_;
#else
Register exponent = result2_;
Register mantissa = result1_;
#endif
Label not_special;
// Convert from Smi to integer.
__ sra(source_, source_, kSmiTagSize);
// Move sign bit from source to destination. This works because the sign bit
// in the exponent word of the double has the same position and polarity as
// the 2's complement sign bit in a Smi.
STATIC_ASSERT(HeapNumber::kSignMask == 0x80000000u);
__ And(exponent, source_, Operand(HeapNumber::kSignMask));
// Subtract from 0 if source was negative.
__ subu(at, zero_reg, source_);
__ Movn(source_, at, exponent);
// We have -1, 0 or 1, which we treat specially. Register source_ contains
// absolute value: it is either equal to 1 (special case of -1 and 1),
// greater than 1 (not a special case) or less than 1 (special case of 0).
__ Branch(&not_special, gt, source_, Operand(1));
// For 1 or -1 we need to or in the 0 exponent (biased to 1023).
const uint32_t exponent_word_for_1 =
HeapNumber::kExponentBias << HeapNumber::kExponentShift;
// Safe to use 'at' as dest reg here.
__ Or(at, exponent, Operand(exponent_word_for_1));
__ Movn(exponent, at, source_); // Write exp when source not 0.
// 1, 0 and -1 all have 0 for the second word.
__ Ret(USE_DELAY_SLOT);
__ mov(mantissa, zero_reg);
__ bind(&not_special);
// Count leading zeros.
// Gets the wrong answer for 0, but we already checked for that case above.
__ Clz(zeros_, source_);
// Compute exponent and or it into the exponent register.
// We use mantissa as a scratch register here.
__ li(mantissa, Operand(31 + HeapNumber::kExponentBias));
__ subu(mantissa, mantissa, zeros_);
__ sll(mantissa, mantissa, HeapNumber::kExponentShift);
__ Or(exponent, exponent, mantissa);
// Shift up the source chopping the top bit off.
__ Addu(zeros_, zeros_, Operand(1));
// This wouldn't work for 1.0 or -1.0 as the shift would be 32 which means 0.
__ sllv(source_, source_, zeros_);
// Compute lower part of fraction (last 12 bits).
__ sll(mantissa, source_, HeapNumber::kMantissaBitsInTopWord);
// And the top (top 20 bits).
__ srl(source_, source_, 32 - HeapNumber::kMantissaBitsInTopWord);
__ Ret(USE_DELAY_SLOT);
__ or_(exponent, exponent, source_);
}
void FloatingPointHelper::LoadSmis(MacroAssembler* masm,
FloatingPointHelper::Destination destination,
Register scratch1,
Register scratch2) {
if (CpuFeatures::IsSupported(FPU)) {
CpuFeatures::Scope scope(FPU);
__ sra(scratch1, a0, kSmiTagSize);
__ mtc1(scratch1, f14);
__ cvt_d_w(f14, f14);
__ sra(scratch1, a1, kSmiTagSize);
__ mtc1(scratch1, f12);
__ cvt_d_w(f12, f12);
if (destination == kCoreRegisters) {
__ Move(a2, a3, f14);
__ Move(a0, a1, f12);
}
} else {
ASSERT(destination == kCoreRegisters);
// Write Smi from a0 to a3 and a2 in double format.
__ mov(scratch1, a0);
ConvertToDoubleStub stub1(a3, a2, scratch1, scratch2);
__ push(ra);
__ Call(stub1.GetCode());
// Write Smi from a1 to a1 and a0 in double format.
__ mov(scratch1, a1);
ConvertToDoubleStub stub2(a1, a0, scratch1, scratch2);
__ Call(stub2.GetCode());
__ pop(ra);
}
}
void FloatingPointHelper::LoadNumber(MacroAssembler* masm,
Destination destination,
Register object,
FPURegister dst,
Register dst1,
Register dst2,
Register heap_number_map,
Register scratch1,
Register scratch2,
Label* not_number) {
__ AssertRootValue(heap_number_map,
Heap::kHeapNumberMapRootIndex,
"HeapNumberMap register clobbered.");
Label is_smi, done;
// Smi-check
__ UntagAndJumpIfSmi(scratch1, object, &is_smi);
// Heap number check
__ JumpIfNotHeapNumber(object, heap_number_map, scratch1, not_number);
// Handle loading a double from a heap number.
if (CpuFeatures::IsSupported(FPU) &&
destination == kFPURegisters) {
CpuFeatures::Scope scope(FPU);
// Load the double from tagged HeapNumber to double register.
// ARM uses a workaround here because of the unaligned HeapNumber
// kValueOffset. On MIPS this workaround is built into ldc1 so there's no
// point in generating even more instructions.
__ ldc1(dst, FieldMemOperand(object, HeapNumber::kValueOffset));
} else {
ASSERT(destination == kCoreRegisters);
// Load the double from heap number to dst1 and dst2 in double format.
__ lw(dst1, FieldMemOperand(object, HeapNumber::kValueOffset));
__ lw(dst2, FieldMemOperand(object,
HeapNumber::kValueOffset + kPointerSize));
}
__ Branch(&done);
// Handle loading a double from a smi.
__ bind(&is_smi);
if (CpuFeatures::IsSupported(FPU)) {
CpuFeatures::Scope scope(FPU);
// Convert smi to double using FPU instructions.
__ mtc1(scratch1, dst);
__ cvt_d_w(dst, dst);
if (destination == kCoreRegisters) {
// Load the converted smi to dst1 and dst2 in double format.
__ Move(dst1, dst2, dst);
}
} else {
ASSERT(destination == kCoreRegisters);
// Write smi to dst1 and dst2 double format.
__ mov(scratch1, object);
ConvertToDoubleStub stub(dst2, dst1, scratch1, scratch2);
__ push(ra);
__ Call(stub.GetCode());
__ pop(ra);
}
__ bind(&done);
}
void FloatingPointHelper::ConvertNumberToInt32(MacroAssembler* masm,
Register object,
Register dst,
Register heap_number_map,
Register scratch1,
Register scratch2,
Register scratch3,
FPURegister double_scratch,
Label* not_number) {
__ AssertRootValue(heap_number_map,
Heap::kHeapNumberMapRootIndex,
"HeapNumberMap register clobbered.");
Label done;
Label not_in_int32_range;
__ UntagAndJumpIfSmi(dst, object, &done);
__ lw(scratch1, FieldMemOperand(object, HeapNumber::kMapOffset));
__ Branch(not_number, ne, scratch1, Operand(heap_number_map));
__ ConvertToInt32(object,
dst,
scratch1,
scratch2,
double_scratch,
&not_in_int32_range);
__ jmp(&done);
__ bind(&not_in_int32_range);
__ lw(scratch1, FieldMemOperand(object, HeapNumber::kExponentOffset));
__ lw(scratch2, FieldMemOperand(object, HeapNumber::kMantissaOffset));
__ EmitOutOfInt32RangeTruncate(dst,
scratch1,
scratch2,
scratch3);
__ bind(&done);
}
void FloatingPointHelper::ConvertIntToDouble(MacroAssembler* masm,
Register int_scratch,
Destination destination,
FPURegister double_dst,
Register dst_mantissa,
Register dst_exponent,
Register scratch2,
FPURegister single_scratch) {
ASSERT(!int_scratch.is(scratch2));
ASSERT(!int_scratch.is(dst_mantissa));
ASSERT(!int_scratch.is(dst_exponent));
Label done;
if (CpuFeatures::IsSupported(FPU)) {
CpuFeatures::Scope scope(FPU);
__ mtc1(int_scratch, single_scratch);
__ cvt_d_w(double_dst, single_scratch);
if (destination == kCoreRegisters) {
__ Move(dst_mantissa, dst_exponent, double_dst);
}
} else {
Label fewer_than_20_useful_bits;
// Expected output:
// | dst_exponent | dst_mantissa |
// | s | exp | mantissa |
// Check for zero.
__ mov(dst_exponent, int_scratch);
__ mov(dst_mantissa, int_scratch);
__ Branch(&done, eq, int_scratch, Operand(zero_reg));
// Preload the sign of the value.
__ And(dst_exponent, int_scratch, Operand(HeapNumber::kSignMask));
// Get the absolute value of the object (as an unsigned integer).
Label skip_sub;
__ Branch(&skip_sub, ge, dst_exponent, Operand(zero_reg));
__ Subu(int_scratch, zero_reg, int_scratch);
__ bind(&skip_sub);
// Get mantissa[51:20].
// Get the position of the first set bit.
__ Clz(dst_mantissa, int_scratch);
__ li(scratch2, 31);
__ Subu(dst_mantissa, scratch2, dst_mantissa);
// Set the exponent.
__ Addu(scratch2, dst_mantissa, Operand(HeapNumber::kExponentBias));
__ Ins(dst_exponent, scratch2,
HeapNumber::kExponentShift, HeapNumber::kExponentBits);
// Clear the first non null bit.
__ li(scratch2, Operand(1));
__ sllv(scratch2, scratch2, dst_mantissa);
__ li(at, -1);
__ Xor(scratch2, scratch2, at);
__ And(int_scratch, int_scratch, scratch2);
// Get the number of bits to set in the lower part of the mantissa.
__ Subu(scratch2, dst_mantissa,
Operand(HeapNumber::kMantissaBitsInTopWord));
__ Branch(&fewer_than_20_useful_bits, lt, scratch2, Operand(zero_reg));
// Set the higher 20 bits of the mantissa.
__ srlv(at, int_scratch, scratch2);
__ or_(dst_exponent, dst_exponent, at);
__ li(at, 32);
__ subu(scratch2, at, scratch2);
__ sllv(dst_mantissa, int_scratch, scratch2);
__ Branch(&done);
__ bind(&fewer_than_20_useful_bits);
__ li(at, HeapNumber::kMantissaBitsInTopWord);
__ subu(scratch2, at, dst_mantissa);
__ sllv(scratch2, int_scratch, scratch2);
__ Or(dst_exponent, dst_exponent, scratch2);
// Set dst_mantissa to 0.
__ mov(dst_mantissa, zero_reg);
}
__ bind(&done);
}
void FloatingPointHelper::LoadNumberAsInt32Double(MacroAssembler* masm,
Register object,
Destination destination,
DoubleRegister double_dst,
DoubleRegister double_scratch,
Register dst_mantissa,
Register dst_exponent,
Register heap_number_map,
Register scratch1,
Register scratch2,
FPURegister single_scratch,
Label* not_int32) {
ASSERT(!scratch1.is(object) && !scratch2.is(object));
ASSERT(!scratch1.is(scratch2));
ASSERT(!heap_number_map.is(object) &&
!heap_number_map.is(scratch1) &&
!heap_number_map.is(scratch2));
Label done, obj_is_not_smi;
__ JumpIfNotSmi(object, &obj_is_not_smi);
__ SmiUntag(scratch1, object);
ConvertIntToDouble(masm, scratch1, destination, double_dst, dst_mantissa,
dst_exponent, scratch2, single_scratch);
__ Branch(&done);
__ bind(&obj_is_not_smi);
__ AssertRootValue(heap_number_map,
Heap::kHeapNumberMapRootIndex,
"HeapNumberMap register clobbered.");
__ JumpIfNotHeapNumber(object, heap_number_map, scratch1, not_int32);
// Load the number.
if (CpuFeatures::IsSupported(FPU)) {
CpuFeatures::Scope scope(FPU);
// Load the double value.
__ ldc1(double_dst, FieldMemOperand(object, HeapNumber::kValueOffset));
Register except_flag = scratch2;
__ EmitFPUTruncate(kRoundToZero,
scratch1,
double_dst,
at,
double_scratch,
except_flag,
kCheckForInexactConversion);
// Jump to not_int32 if the operation did not succeed.
__ Branch(not_int32, ne, except_flag, Operand(zero_reg));
if (destination == kCoreRegisters) {
__ Move(dst_mantissa, dst_exponent, double_dst);
}
} else {
ASSERT(!scratch1.is(object) && !scratch2.is(object));
// Load the double value in the destination registers.
bool save_registers = object.is(dst_mantissa) || object.is(dst_exponent);
if (save_registers) {
// Save both output registers, because the other one probably holds
// an important value too.
__ Push(dst_exponent, dst_mantissa);
}
__ lw(dst_exponent, FieldMemOperand(object, HeapNumber::kExponentOffset));
__ lw(dst_mantissa, FieldMemOperand(object, HeapNumber::kMantissaOffset));
// Check for 0 and -0.
Label zero;
__ And(scratch1, dst_exponent, Operand(~HeapNumber::kSignMask));
__ Or(scratch1, scratch1, Operand(dst_mantissa));
__ Branch(&zero, eq, scratch1, Operand(zero_reg));
// Check that the value can be exactly represented by a 32-bit integer.
// Jump to not_int32 if that's not the case.
Label restore_input_and_miss;
DoubleIs32BitInteger(masm, dst_exponent, dst_mantissa, scratch1, scratch2,
&restore_input_and_miss);
// dst_* were trashed. Reload the double value.
if (save_registers) {
__ Pop(dst_exponent, dst_mantissa);
}
__ lw(dst_exponent, FieldMemOperand(object, HeapNumber::kExponentOffset));
__ lw(dst_mantissa, FieldMemOperand(object, HeapNumber::kMantissaOffset));
__ Branch(&done);
__ bind(&restore_input_and_miss);
if (save_registers) {
__ Pop(dst_exponent, dst_mantissa);
}
__ Branch(not_int32);
__ bind(&zero);
if (save_registers) {
__ Drop(2);
}
}
__ bind(&done);
}
void FloatingPointHelper::LoadNumberAsInt32(MacroAssembler* masm,
Register object,
Register dst,
Register heap_number_map,
Register scratch1,
Register scratch2,
Register scratch3,
DoubleRegister double_scratch0,
DoubleRegister double_scratch1,
Label* not_int32) {
ASSERT(!dst.is(object));
ASSERT(!scratch1.is(object) && !scratch2.is(object) && !scratch3.is(object));
ASSERT(!scratch1.is(scratch2) &&
!scratch1.is(scratch3) &&
!scratch2.is(scratch3));
Label done, maybe_undefined;
__ UntagAndJumpIfSmi(dst, object, &done);
__ AssertRootValue(heap_number_map,
Heap::kHeapNumberMapRootIndex,
"HeapNumberMap register clobbered.");
__ JumpIfNotHeapNumber(object, heap_number_map, scratch1, &maybe_undefined);
// Object is a heap number.
// Convert the floating point value to a 32-bit integer.
if (CpuFeatures::IsSupported(FPU)) {
CpuFeatures::Scope scope(FPU);
// Load the double value.
__ ldc1(double_scratch0, FieldMemOperand(object, HeapNumber::kValueOffset));
Register except_flag = scratch2;
__ EmitFPUTruncate(kRoundToZero,
dst,
double_scratch0,
scratch1,
double_scratch1,
except_flag,
kCheckForInexactConversion);
// Jump to not_int32 if the operation did not succeed.
__ Branch(not_int32, ne, except_flag, Operand(zero_reg));
} else {
// Load the double value in the destination registers.
__ lw(scratch2, FieldMemOperand(object, HeapNumber::kExponentOffset));
__ lw(scratch1, FieldMemOperand(object, HeapNumber::kMantissaOffset));
// Check for 0 and -0.
__ And(dst, scratch1, Operand(~HeapNumber::kSignMask));
__ Or(dst, scratch2, Operand(dst));
__ Branch(&done, eq, dst, Operand(zero_reg));
DoubleIs32BitInteger(masm, scratch1, scratch2, dst, scratch3, not_int32);
// Registers state after DoubleIs32BitInteger.
// dst: mantissa[51:20].
// scratch2: 1
// Shift back the higher bits of the mantissa.
__ srlv(dst, dst, scratch3);
// Set the implicit first bit.
__ li(at, 32);
__ subu(scratch3, at, scratch3);
__ sllv(scratch2, scratch2, scratch3);
__ Or(dst, dst, scratch2);
// Set the sign.
__ lw(scratch1, FieldMemOperand(object, HeapNumber::kExponentOffset));
__ And(scratch1, scratch1, Operand(HeapNumber::kSignMask));
Label skip_sub;
__ Branch(&skip_sub, ge, scratch1, Operand(zero_reg));
__ Subu(dst, zero_reg, dst);
__ bind(&skip_sub);
}
__ Branch(&done);
__ bind(&maybe_undefined);
__ LoadRoot(at, Heap::kUndefinedValueRootIndex);
__ Branch(not_int32, ne, object, Operand(at));
// |undefined| is truncated to 0.
__ li(dst, Operand(Smi::FromInt(0)));
// Fall through.
__ bind(&done);
}
void FloatingPointHelper::DoubleIs32BitInteger(MacroAssembler* masm,
Register src_exponent,
Register src_mantissa,
Register dst,
Register scratch,
Label* not_int32) {
// Get exponent alone in scratch.
__ Ext(scratch,
src_exponent,
HeapNumber::kExponentShift,
HeapNumber::kExponentBits);
// Substract the bias from the exponent.
__ Subu(scratch, scratch, Operand(HeapNumber::kExponentBias));
// src1: higher (exponent) part of the double value.
// src2: lower (mantissa) part of the double value.
// scratch: unbiased exponent.
// Fast cases. Check for obvious non 32-bit integer values.
// Negative exponent cannot yield 32-bit integers.
__ Branch(not_int32, lt, scratch, Operand(zero_reg));
// Exponent greater than 31 cannot yield 32-bit integers.
// Also, a positive value with an exponent equal to 31 is outside of the
// signed 32-bit integer range.
// Another way to put it is that if (exponent - signbit) > 30 then the
// number cannot be represented as an int32.
Register tmp = dst;
__ srl(at, src_exponent, 31);
__ subu(tmp, scratch, at);
__ Branch(not_int32, gt, tmp, Operand(30));
// - Bits [21:0] in the mantissa are not null.
__ And(tmp, src_mantissa, 0x3fffff);
__ Branch(not_int32, ne, tmp, Operand(zero_reg));
// Otherwise the exponent needs to be big enough to shift left all the
// non zero bits left. So we need the (30 - exponent) last bits of the
// 31 higher bits of the mantissa to be null.
// Because bits [21:0] are null, we can check instead that the
// (32 - exponent) last bits of the 32 higher bits of the mantissa are null.
// Get the 32 higher bits of the mantissa in dst.
__ Ext(dst,
src_mantissa,
HeapNumber::kMantissaBitsInTopWord,
32 - HeapNumber::kMantissaBitsInTopWord);
__ sll(at, src_exponent, HeapNumber::kNonMantissaBitsInTopWord);
__ or_(dst, dst, at);
// Create the mask and test the lower bits (of the higher bits).
__ li(at, 32);
__ subu(scratch, at, scratch);
__ li(src_mantissa, 1);
__ sllv(src_exponent, src_mantissa, scratch);
__ Subu(src_exponent, src_exponent, Operand(1));
__ And(src_exponent, dst, src_exponent);
__ Branch(not_int32, ne, src_exponent, Operand(zero_reg));
}
void FloatingPointHelper::CallCCodeForDoubleOperation(
MacroAssembler* masm,
Token::Value op,
Register heap_number_result,
Register scratch) {
// Using core registers:
// a0: Left value (least significant part of mantissa).
// a1: Left value (sign, exponent, top of mantissa).
// a2: Right value (least significant part of mantissa).
// a3: Right value (sign, exponent, top of mantissa).
// Assert that heap_number_result is saved.
// We currently always use s0 to pass it.
ASSERT(heap_number_result.is(s0));
// Push the current return address before the C call.
__ push(ra);
__ PrepareCallCFunction(4, scratch); // Two doubles are 4 arguments.
if (!IsMipsSoftFloatABI) {
CpuFeatures::Scope scope(FPU);
// We are not using MIPS FPU instructions, and parameters for the runtime
// function call are prepaired in a0-a3 registers, but function we are
// calling is compiled with hard-float flag and expecting hard float ABI
// (parameters in f12/f14 registers). We need to copy parameters from
// a0-a3 registers to f12/f14 register pairs.
__ Move(f12, a0, a1);
__ Move(f14, a2, a3);
}
{
AllowExternalCallThatCantCauseGC scope(masm);
__ CallCFunction(
ExternalReference::double_fp_operation(op, masm->isolate()), 0, 2);
}
// Store answer in the overwritable heap number.
if (!IsMipsSoftFloatABI) {
CpuFeatures::Scope scope(FPU);
// Double returned in register f0.
__ sdc1(f0, FieldMemOperand(heap_number_result, HeapNumber::kValueOffset));
} else {
// Double returned in registers v0 and v1.
__ sw(v1, FieldMemOperand(heap_number_result, HeapNumber::kExponentOffset));
__ sw(v0, FieldMemOperand(heap_number_result, HeapNumber::kMantissaOffset));
}
// Place heap_number_result in v0 and return to the pushed return address.
__ pop(ra);
__ Ret(USE_DELAY_SLOT);
__ mov(v0, heap_number_result);
}
bool WriteInt32ToHeapNumberStub::IsPregenerated() {
// These variants are compiled ahead of time. See next method.
if (the_int_.is(a1) &&
the_heap_number_.is(v0) &&
scratch_.is(a2) &&
sign_.is(a3)) {
return true;
}
if (the_int_.is(a2) &&
the_heap_number_.is(v0) &&
scratch_.is(a3) &&
sign_.is(a0)) {
return true;
}
// Other register combinations are generated as and when they are needed,
// so it is unsafe to call them from stubs (we can't generate a stub while
// we are generating a stub).
return false;
}
void WriteInt32ToHeapNumberStub::GenerateFixedRegStubsAheadOfTime() {
WriteInt32ToHeapNumberStub stub1(a1, v0, a2, a3);
WriteInt32ToHeapNumberStub stub2(a2, v0, a3, a0);
stub1.GetCode()->set_is_pregenerated(true);
stub2.GetCode()->set_is_pregenerated(true);
}
// See comment for class, this does NOT work for int32's that are in Smi range.
void WriteInt32ToHeapNumberStub::Generate(MacroAssembler* masm) {
Label max_negative_int;
// the_int_ has the answer which is a signed int32 but not a Smi.
// We test for the special value that has a different exponent.
STATIC_ASSERT(HeapNumber::kSignMask == 0x80000000u);
// Test sign, and save for later conditionals.
__ And(sign_, the_int_, Operand(0x80000000u));
__ Branch(&max_negative_int, eq, the_int_, Operand(0x80000000u));
// Set up the correct exponent in scratch_. All non-Smi int32s have the same.
// A non-Smi integer is 1.xxx * 2^30 so the exponent is 30 (biased).
uint32_t non_smi_exponent =
(HeapNumber::kExponentBias + 30) << HeapNumber::kExponentShift;
__ li(scratch_, Operand(non_smi_exponent));
// Set the sign bit in scratch_ if the value was negative.
__ or_(scratch_, scratch_, sign_);
// Subtract from 0 if the value was negative.
__ subu(at, zero_reg, the_int_);
__ Movn(the_int_, at, sign_);
// We should be masking the implict first digit of the mantissa away here,
// but it just ends up combining harmlessly with the last digit of the
// exponent that happens to be 1. The sign bit is 0 so we shift 10 to get
// the most significant 1 to hit the last bit of the 12 bit sign and exponent.
ASSERT(((1 << HeapNumber::kExponentShift) & non_smi_exponent) != 0);
const int shift_distance = HeapNumber::kNonMantissaBitsInTopWord - 2;
__ srl(at, the_int_, shift_distance);
__ or_(scratch_, scratch_, at);
__ sw(scratch_, FieldMemOperand(the_heap_number_,
HeapNumber::kExponentOffset));
__ sll(scratch_, the_int_, 32 - shift_distance);
__ sw(scratch_, FieldMemOperand(the_heap_number_,
HeapNumber::kMantissaOffset));
__ Ret();
__ bind(&max_negative_int);
// The max negative int32 is stored as a positive number in the mantissa of
// a double because it uses a sign bit instead of using two's complement.
// The actual mantissa bits stored are all 0 because the implicit most
// significant 1 bit is not stored.
non_smi_exponent += 1 << HeapNumber::kExponentShift;
__ li(scratch_, Operand(HeapNumber::kSignMask | non_smi_exponent));
__ sw(scratch_,
FieldMemOperand(the_heap_number_, HeapNumber::kExponentOffset));
__ mov(scratch_, zero_reg);
__ sw(scratch_,
FieldMemOperand(the_heap_number_, HeapNumber::kMantissaOffset));
__ Ret();
}
// Handle the case where the lhs and rhs are the same object.
// Equality is almost reflexive (everything but NaN), so this is a test
// for "identity and not NaN".
static void EmitIdenticalObjectComparison(MacroAssembler* masm,
Label* slow,
Condition cc) {
Label not_identical;
Label heap_number, return_equal;
Register exp_mask_reg = t5;
__ Branch(&not_identical, ne, a0, Operand(a1));
__ li(exp_mask_reg, Operand(HeapNumber::kExponentMask));
// Test for NaN. Sadly, we can't just compare to factory->nan_value(),
// so we do the second best thing - test it ourselves.
// They are both equal and they are not both Smis so both of them are not
// Smis. If it's not a heap number, then return equal.
if (cc == less || cc == greater) {
__ GetObjectType(a0, t4, t4);
__ Branch(slow, greater, t4, Operand(FIRST_SPEC_OBJECT_TYPE));
} else {
__ GetObjectType(a0, t4, t4);
__ Branch(&heap_number, eq, t4, Operand(HEAP_NUMBER_TYPE));
// Comparing JS objects with <=, >= is complicated.
if (cc != eq) {
__ Branch(slow, greater, t4, Operand(FIRST_SPEC_OBJECT_TYPE));
// Normally here we fall through to return_equal, but undefined is
// special: (undefined == undefined) == true, but
// (undefined <= undefined) == false! See ECMAScript 11.8.5.
if (cc == less_equal || cc == greater_equal) {
__ Branch(&return_equal, ne, t4, Operand(ODDBALL_TYPE));
__ LoadRoot(t2, Heap::kUndefinedValueRootIndex);
__ Branch(&return_equal, ne, a0, Operand(t2));
if (cc == le) {
// undefined <= undefined should fail.
__ li(v0, Operand(GREATER));
} else {
// undefined >= undefined should fail.
__ li(v0, Operand(LESS));
}
__ Ret();
}
}
}
__ bind(&return_equal);
if (cc == less) {
__ li(v0, Operand(GREATER)); // Things aren't less than themselves.
} else if (cc == greater) {
__ li(v0, Operand(LESS)); // Things aren't greater than themselves.
} else {
__ mov(v0, zero_reg); // Things are <=, >=, ==, === themselves.
}
__ Ret();
// For less and greater we don't have to check for NaN since the result of
// x < x is false regardless. For the others here is some code to check
// for NaN.
if (cc != lt && cc != gt) {
__ bind(&heap_number);
// It is a heap number, so return non-equal if it's NaN and equal if it's
// not NaN.
// The representation of NaN values has all exponent bits (52..62) set,
// and not all mantissa bits (0..51) clear.
// Read top bits of double representation (second word of value).
__ lw(t2, FieldMemOperand(a0, HeapNumber::kExponentOffset));
// Test that exponent bits are all set.
__ And(t3, t2, Operand(exp_mask_reg));
// If all bits not set (ne cond), then not a NaN, objects are equal.
__ Branch(&return_equal, ne, t3, Operand(exp_mask_reg));
// Shift out flag and all exponent bits, retaining only mantissa.
__ sll(t2, t2, HeapNumber::kNonMantissaBitsInTopWord);
// Or with all low-bits of mantissa.
__ lw(t3, FieldMemOperand(a0, HeapNumber::kMantissaOffset));
__ Or(v0, t3, Operand(t2));
// For equal we already have the right value in v0: Return zero (equal)
// if all bits in mantissa are zero (it's an Infinity) and non-zero if
// not (it's a NaN). For <= and >= we need to load v0 with the failing
// value if it's a NaN.
if (cc != eq) {
// All-zero means Infinity means equal.
__ Ret(eq, v0, Operand(zero_reg));
if (cc == le) {
__ li(v0, Operand(GREATER)); // NaN <= NaN should fail.
} else {
__ li(v0, Operand(LESS)); // NaN >= NaN should fail.
}
}
__ Ret();
}
// No fall through here.
__ bind(&not_identical);
}
static void EmitSmiNonsmiComparison(MacroAssembler* masm,
Register lhs,
Register rhs,
Label* both_loaded_as_doubles,
Label* slow,
bool strict) {
ASSERT((lhs.is(a0) && rhs.is(a1)) ||
(lhs.is(a1) && rhs.is(a0)));
Label lhs_is_smi;
__ JumpIfSmi(lhs, &lhs_is_smi);
// Rhs is a Smi.
// Check whether the non-smi is a heap number.
__ GetObjectType(lhs, t4, t4);
if (strict) {
// If lhs was not a number and rhs was a Smi then strict equality cannot
// succeed. Return non-equal (lhs is already not zero).
__ Ret(USE_DELAY_SLOT, ne, t4, Operand(HEAP_NUMBER_TYPE));
__ mov(v0, lhs);
} else {
// Smi compared non-strictly with a non-Smi non-heap-number. Call
// the runtime.
__ Branch(slow, ne, t4, Operand(HEAP_NUMBER_TYPE));
}
// Rhs is a smi, lhs is a number.
// Convert smi rhs to double.
if (CpuFeatures::IsSupported(FPU)) {
CpuFeatures::Scope scope(FPU);
__ sra(at, rhs, kSmiTagSize);
__ mtc1(at, f14);
__ cvt_d_w(f14, f14);
__ ldc1(f12, FieldMemOperand(lhs, HeapNumber::kValueOffset));
} else {
// Load lhs to a double in a2, a3.
__ lw(a3, FieldMemOperand(lhs, HeapNumber::kValueOffset + 4));
__ lw(a2, FieldMemOperand(lhs, HeapNumber::kValueOffset));
// Write Smi from rhs to a1 and a0 in double format. t5 is scratch.
__ mov(t6, rhs);
ConvertToDoubleStub stub1(a1, a0, t6, t5);
__ push(ra);
__ Call(stub1.GetCode());
__ pop(ra);
}
// We now have both loaded as doubles.
__ jmp(both_loaded_as_doubles);
__ bind(&lhs_is_smi);
// Lhs is a Smi. Check whether the non-smi is a heap number.
__ GetObjectType(rhs, t4, t4);
if (strict) {
// If lhs was not a number and rhs was a Smi then strict equality cannot
// succeed. Return non-equal.
__ Ret(USE_DELAY_SLOT, ne, t4, Operand(HEAP_NUMBER_TYPE));
__ li(v0, Operand(1));
} else {
// Smi compared non-strictly with a non-Smi non-heap-number. Call
// the runtime.
__ Branch(slow, ne, t4, Operand(HEAP_NUMBER_TYPE));
}
// Lhs is a smi, rhs is a number.
// Convert smi lhs to double.
if (CpuFeatures::IsSupported(FPU)) {
CpuFeatures::Scope scope(FPU);
__ sra(at, lhs, kSmiTagSize);
__ mtc1(at, f12);
__ cvt_d_w(f12, f12);
__ ldc1(f14, FieldMemOperand(rhs, HeapNumber::kValueOffset));
} else {
// Convert lhs to a double format. t5 is scratch.
__ mov(t6, lhs);
ConvertToDoubleStub stub2(a3, a2, t6, t5);
__ push(ra);
__ Call(stub2.GetCode());
__ pop(ra);
// Load rhs to a double in a1, a0.
if (rhs.is(a0)) {
__ lw(a1, FieldMemOperand(rhs, HeapNumber::kValueOffset + 4));
__ lw(a0, FieldMemOperand(rhs, HeapNumber::kValueOffset));
} else {
__ lw(a0, FieldMemOperand(rhs, HeapNumber::kValueOffset));
__ lw(a1, FieldMemOperand(rhs, HeapNumber::kValueOffset + 4));
}
}
// Fall through to both_loaded_as_doubles.
}
void EmitNanCheck(MacroAssembler* masm, Condition cc) {
bool exp_first = (HeapNumber::kExponentOffset == HeapNumber::kValueOffset);
if (CpuFeatures::IsSupported(FPU)) {
CpuFeatures::Scope scope(FPU);
// Lhs and rhs are already loaded to f12 and f14 register pairs.
__ Move(t0, t1, f14);
__ Move(t2, t3, f12);
} else {
// Lhs and rhs are already loaded to GP registers.
__ mov(t0, a0); // a0 has LS 32 bits of rhs.
__ mov(t1, a1); // a1 has MS 32 bits of rhs.
__ mov(t2, a2); // a2 has LS 32 bits of lhs.
__ mov(t3, a3); // a3 has MS 32 bits of lhs.
}
Register rhs_exponent = exp_first ? t0 : t1;
Register lhs_exponent = exp_first ? t2 : t3;
Register rhs_mantissa = exp_first ? t1 : t0;
Register lhs_mantissa = exp_first ? t3 : t2;
Label one_is_nan, neither_is_nan;
Label lhs_not_nan_exp_mask_is_loaded;
Register exp_mask_reg = t4;
__ li(exp_mask_reg, HeapNumber::kExponentMask);
__ and_(t5, lhs_exponent, exp_mask_reg);
__ Branch(&lhs_not_nan_exp_mask_is_loaded, ne, t5, Operand(exp_mask_reg));
__ sll(t5, lhs_exponent, HeapNumber::kNonMantissaBitsInTopWord);
__ Branch(&one_is_nan, ne, t5, Operand(zero_reg));
__ Branch(&one_is_nan, ne, lhs_mantissa, Operand(zero_reg));
__ li(exp_mask_reg, HeapNumber::kExponentMask);
__ bind(&lhs_not_nan_exp_mask_is_loaded);
__ and_(t5, rhs_exponent, exp_mask_reg);
__ Branch(&neither_is_nan, ne, t5, Operand(exp_mask_reg));
__ sll(t5, rhs_exponent, HeapNumber::kNonMantissaBitsInTopWord);
__ Branch(&one_is_nan, ne, t5, Operand(zero_reg));
__ Branch(&neither_is_nan, eq, rhs_mantissa, Operand(zero_reg));
__ bind(&one_is_nan);
// NaN comparisons always fail.
// Load whatever we need in v0 to make the comparison fail.
if (cc == lt || cc == le) {
__ li(v0, Operand(GREATER));
} else {
__ li(v0, Operand(LESS));
}
__ Ret();
__ bind(&neither_is_nan);
}
static void EmitTwoNonNanDoubleComparison(MacroAssembler* masm, Condition cc) {
// f12 and f14 have the two doubles. Neither is a NaN.
// Call a native function to do a comparison between two non-NaNs.
// Call C routine that may not cause GC or other trouble.
// We use a call_was and return manually because we need arguments slots to
// be freed.
Label return_result_not_equal, return_result_equal;
if (cc == eq) {
// Doubles are not equal unless they have the same bit pattern.
// Exception: 0 and -0.
bool exp_first = (HeapNumber::kExponentOffset == HeapNumber::kValueOffset);
if (CpuFeatures::IsSupported(FPU)) {
CpuFeatures::Scope scope(FPU);
// Lhs and rhs are already loaded to f12 and f14 register pairs.
__ Move(t0, t1, f14);
__ Move(t2, t3, f12);
} else {
// Lhs and rhs are already loaded to GP registers.
__ mov(t0, a0); // a0 has LS 32 bits of rhs.
__ mov(t1, a1); // a1 has MS 32 bits of rhs.
__ mov(t2, a2); // a2 has LS 32 bits of lhs.
__ mov(t3, a3); // a3 has MS 32 bits of lhs.
}
Register rhs_exponent = exp_first ? t0 : t1;
Register lhs_exponent = exp_first ? t2 : t3;
Register rhs_mantissa = exp_first ? t1 : t0;
Register lhs_mantissa = exp_first ? t3 : t2;
__ xor_(v0, rhs_mantissa, lhs_mantissa);
__ Branch(&return_result_not_equal, ne, v0, Operand(zero_reg));
__ subu(v0, rhs_exponent, lhs_exponent);
__ Branch(&return_result_equal, eq, v0, Operand(zero_reg));
// 0, -0 case.
__ sll(rhs_exponent, rhs_exponent, kSmiTagSize);
__ sll(lhs_exponent, lhs_exponent, kSmiTagSize);
__ or_(t4, rhs_exponent, lhs_exponent);
__ or_(t4, t4, rhs_mantissa);
__ Branch(&return_result_not_equal, ne, t4, Operand(zero_reg));
__ bind(&return_result_equal);
__ li(v0, Operand(EQUAL));
__ Ret();
}
__ bind(&return_result_not_equal);
if (!CpuFeatures::IsSupported(FPU)) {
__ push(ra);
__ PrepareCallCFunction(0, 2, t4);
if (!IsMipsSoftFloatABI) {
// We are not using MIPS FPU instructions, and parameters for the runtime
// function call are prepaired in a0-a3 registers, but function we are
// calling is compiled with hard-float flag and expecting hard float ABI
// (parameters in f12/f14 registers). We need to copy parameters from
// a0-a3 registers to f12/f14 register pairs.
__ Move(f12, a0, a1);
__ Move(f14, a2, a3);
}
AllowExternalCallThatCantCauseGC scope(masm);
__ CallCFunction(ExternalReference::compare_doubles(masm->isolate()),
0, 2);
__ pop(ra); // Because this function returns int, result is in v0.
__ Ret();
} else {
CpuFeatures::Scope scope(FPU);
Label equal, less_than;
__ BranchF(&equal, NULL, eq, f12, f14);
__ BranchF(&less_than, NULL, lt, f12, f14);
// Not equal, not less, not NaN, must be greater.
__ li(v0, Operand(GREATER));
__ Ret();
__ bind(&equal);
__ li(v0, Operand(EQUAL));
__ Ret();
__ bind(&less_than);
__ li(v0, Operand(LESS));
__ Ret();
}
}
static void EmitStrictTwoHeapObjectCompare(MacroAssembler* masm,
Register lhs,
Register rhs) {
// If either operand is a JS object or an oddball value, then they are
// not equal since their pointers are different.
// There is no test for undetectability in strict equality.
STATIC_ASSERT(LAST_TYPE == LAST_SPEC_OBJECT_TYPE);
Label first_non_object;
// Get the type of the first operand into a2 and compare it with
// FIRST_SPEC_OBJECT_TYPE.
__ GetObjectType(lhs, a2, a2);
__ Branch(&first_non_object, less, a2, Operand(FIRST_SPEC_OBJECT_TYPE));
// Return non-zero.
Label return_not_equal;
__ bind(&return_not_equal);
__ Ret(USE_DELAY_SLOT);
__ li(v0, Operand(1));
__ bind(&first_non_object);
// Check for oddballs: true, false, null, undefined.
__ Branch(&return_not_equal, eq, a2, Operand(ODDBALL_TYPE));
__ GetObjectType(rhs, a3, a3);
__ Branch(&return_not_equal, greater, a3, Operand(FIRST_SPEC_OBJECT_TYPE));
// Check for oddballs: true, false, null, undefined.
__ Branch(&return_not_equal, eq, a3, Operand(ODDBALL_TYPE));
// Now that we have the types we might as well check for symbol-symbol.
// Ensure that no non-strings have the symbol bit set.
STATIC_ASSERT(LAST_TYPE < kNotStringTag + kIsSymbolMask);
STATIC_ASSERT(kSymbolTag != 0);
__ And(t2, a2, Operand(a3));
__ And(t0, t2, Operand(kIsSymbolMask));
__ Branch(&return_not_equal, ne, t0, Operand(zero_reg));
}
static void EmitCheckForTwoHeapNumbers(MacroAssembler* masm,
Register lhs,
Register rhs,
Label* both_loaded_as_doubles,
Label* not_heap_numbers,
Label* slow) {
__ GetObjectType(lhs, a3, a2);
__ Branch(not_heap_numbers, ne, a2, Operand(HEAP_NUMBER_TYPE));
__ lw(a2, FieldMemOperand(rhs, HeapObject::kMapOffset));
// If first was a heap number & second wasn't, go to slow case.
__ Branch(slow, ne, a3, Operand(a2));
// Both are heap numbers. Load them up then jump to the code we have
// for that.
if (CpuFeatures::IsSupported(FPU)) {
CpuFeatures::Scope scope(FPU);
__ ldc1(f12, FieldMemOperand(lhs, HeapNumber::kValueOffset));
__ ldc1(f14, FieldMemOperand(rhs, HeapNumber::kValueOffset));
} else {
__ lw(a2, FieldMemOperand(lhs, HeapNumber::kValueOffset));
__ lw(a3, FieldMemOperand(lhs, HeapNumber::kValueOffset + 4));
if (rhs.is(a0)) {
__ lw(a1, FieldMemOperand(rhs, HeapNumber::kValueOffset + 4));
__ lw(a0, FieldMemOperand(rhs, HeapNumber::kValueOffset));
} else {
__ lw(a0, FieldMemOperand(rhs, HeapNumber::kValueOffset));
__ lw(a1, FieldMemOperand(rhs, HeapNumber::kValueOffset + 4));
}
}
__ jmp(both_loaded_as_doubles);
}
// Fast negative check for symbol-to-symbol equality.
static void EmitCheckForSymbolsOrObjects(MacroAssembler* masm,
Register lhs,
Register rhs,
Label* possible_strings,
Label* not_both_strings) {
ASSERT((lhs.is(a0) && rhs.is(a1)) ||
(lhs.is(a1) && rhs.is(a0)));
// a2 is object type of lhs.
// Ensure that no non-strings have the symbol bit set.
Label object_test;
STATIC_ASSERT(kSymbolTag != 0);
__ And(at, a2, Operand(kIsNotStringMask));
__ Branch(&object_test, ne, at, Operand(zero_reg));
__ And(at, a2, Operand(kIsSymbolMask));
__ Branch(possible_strings, eq, at, Operand(zero_reg));
__ GetObjectType(rhs, a3, a3);
__ Branch(not_both_strings, ge, a3, Operand(FIRST_NONSTRING_TYPE));
__ And(at, a3, Operand(kIsSymbolMask));
__ Branch(possible_strings, eq, at, Operand(zero_reg));
// Both are symbols. We already checked they weren't the same pointer
// so they are not equal.
__ Ret(USE_DELAY_SLOT);
__ li(v0, Operand(1)); // Non-zero indicates not equal.
__ bind(&object_test);
__ Branch(not_both_strings, lt, a2, Operand(FIRST_SPEC_OBJECT_TYPE));
__ GetObjectType(rhs, a2, a3);
__ Branch(not_both_strings, lt, a3, Operand(FIRST_SPEC_OBJECT_TYPE));
// If both objects are undetectable, they are equal. Otherwise, they
// are not equal, since they are different objects and an object is not
// equal to undefined.
__ lw(a3, FieldMemOperand(lhs, HeapObject::kMapOffset));
__ lbu(a2, FieldMemOperand(a2, Map::kBitFieldOffset));
__ lbu(a3, FieldMemOperand(a3, Map::kBitFieldOffset));
__ and_(a0, a2, a3);
__ And(a0, a0, Operand(1 << Map::kIsUndetectable));
__ Ret(USE_DELAY_SLOT);
__ xori(v0, a0, 1 << Map::kIsUndetectable);
}
void NumberToStringStub::GenerateLookupNumberStringCache(MacroAssembler* masm,
Register object,
Register result,
Register scratch1,
Register scratch2,
Register scratch3,
bool object_is_smi,
Label* not_found) {
// Use of registers. Register result is used as a temporary.
Register number_string_cache = result;
Register mask = scratch3;
// Load the number string cache.
__ LoadRoot(number_string_cache, Heap::kNumberStringCacheRootIndex);
// Make the hash mask from the length of the number string cache. It
// contains two elements (number and string) for each cache entry.
__ lw(mask, FieldMemOperand(number_string_cache, FixedArray::kLengthOffset));
// Divide length by two (length is a smi).
__ sra(mask, mask, kSmiTagSize + 1);
__ Addu(mask, mask, -1); // Make mask.
// Calculate the entry in the number string cache. The hash value in the
// number string cache for smis is just the smi value, and the hash for
// doubles is the xor of the upper and lower words. See
// Heap::GetNumberStringCache.
Isolate* isolate = masm->isolate();
Label is_smi;
Label load_result_from_cache;
if (!object_is_smi) {
__ JumpIfSmi(object, &is_smi);
if (CpuFeatures::IsSupported(FPU)) {
CpuFeatures::Scope scope(FPU);
__ CheckMap(object,
scratch1,
Heap::kHeapNumberMapRootIndex,
not_found,
DONT_DO_SMI_CHECK);
STATIC_ASSERT(8 == kDoubleSize);
__ Addu(scratch1,
object,
Operand(HeapNumber::kValueOffset - kHeapObjectTag));
__ lw(scratch2, MemOperand(scratch1, kPointerSize));
__ lw(scratch1, MemOperand(scratch1, 0));
__ Xor(scratch1, scratch1, Operand(scratch2));
__ And(scratch1, scratch1, Operand(mask));
// Calculate address of entry in string cache: each entry consists
// of two pointer sized fields.
__ sll(scratch1, scratch1, kPointerSizeLog2 + 1);
__ Addu(scratch1, number_string_cache, scratch1);
Register probe = mask;
__ lw(probe,
FieldMemOperand(scratch1, FixedArray::kHeaderSize));
__ JumpIfSmi(probe, not_found);
__ ldc1(f12, FieldMemOperand(object, HeapNumber::kValueOffset));
__ ldc1(f14, FieldMemOperand(probe, HeapNumber::kValueOffset));
__ BranchF(&load_result_from_cache, NULL, eq, f12, f14);
__ Branch(not_found);
} else {
// Note that there is no cache check for non-FPU case, even though
// it seems there could be. May be a tiny opimization for non-FPU
// cores.
__ Branch(not_found);
}
}
__ bind(&is_smi);
Register scratch = scratch1;
__ sra(scratch, object, 1); // Shift away the tag.
__ And(scratch, mask, Operand(scratch));
// Calculate address of entry in string cache: each entry consists
// of two pointer sized fields.
__ sll(scratch, scratch, kPointerSizeLog2 + 1);
__ Addu(scratch, number_string_cache, scratch);
// Check if the entry is the smi we are looking for.
Register probe = mask;
__ lw(probe, FieldMemOperand(scratch, FixedArray::kHeaderSize));
__ Branch(not_found, ne, object, Operand(probe));
// Get the result from the cache.
__ bind(&load_result_from_cache);
__ lw(result,
FieldMemOperand(scratch, FixedArray::kHeaderSize + kPointerSize));
__ IncrementCounter(isolate->counters()->number_to_string_native(),
1,
scratch1,
scratch2);
}
void NumberToStringStub::Generate(MacroAssembler* masm) {
Label runtime;
__ lw(a1, MemOperand(sp, 0));
// Generate code to lookup number in the number string cache.
GenerateLookupNumberStringCache(masm, a1, v0, a2, a3, t0, false, &runtime);
__ DropAndRet(1);
__ bind(&runtime);
// Handle number to string in the runtime system if not found in the cache.
__ TailCallRuntime(Runtime::kNumberToString, 1, 1);
}
static void ICCompareStub_CheckInputType(MacroAssembler* masm,
Register input,
Register scratch,
CompareIC::State expected,
Label* fail) {
Label ok;
if (expected == CompareIC::SMI) {
__ JumpIfNotSmi(input, fail);
} else if (expected == CompareIC::HEAP_NUMBER) {
__ JumpIfSmi(input, &ok);
__ CheckMap(input, scratch, Heap::kHeapNumberMapRootIndex, fail,
DONT_DO_SMI_CHECK);
}
// We could be strict about symbol/string here, but as long as
// hydrogen doesn't care, the stub doesn't have to care either.
__ bind(&ok);
}
// On entry a1 and a2 are the values to be compared.
// On exit a0 is 0, positive or negative to indicate the result of
// the comparison.
void ICCompareStub::GenerateGeneric(MacroAssembler* masm) {
Register lhs = a1;
Register rhs = a0;
Condition cc = GetCondition();
Label miss;
ICCompareStub_CheckInputType(masm, lhs, a2, left_, &miss);
ICCompareStub_CheckInputType(masm, rhs, a3, right_, &miss);
Label slow; // Call builtin.
Label not_smis, both_loaded_as_doubles;
Label not_two_smis, smi_done;
__ Or(a2, a1, a0);
__ JumpIfNotSmi(a2, &not_two_smis);
__ sra(a1, a1, 1);
__ sra(a0, a0, 1);
__ Ret(USE_DELAY_SLOT);
__ subu(v0, a1, a0);
__ bind(&not_two_smis);
// NOTICE! This code is only reached after a smi-fast-case check, so
// it is certain that at least one operand isn't a smi.
// Handle the case where the objects are identical. Either returns the answer
// or goes to slow. Only falls through if the objects were not identical.
EmitIdenticalObjectComparison(masm, &slow, cc);
// If either is a Smi (we know that not both are), then they can only
// be strictly equal if the other is a HeapNumber.
STATIC_ASSERT(kSmiTag == 0);
ASSERT_EQ(0, Smi::FromInt(0));
__ And(t2, lhs, Operand(rhs));
__ JumpIfNotSmi(t2, &not_smis, t0);
// One operand is a smi. EmitSmiNonsmiComparison generates code that can:
// 1) Return the answer.
// 2) Go to slow.
// 3) Fall through to both_loaded_as_doubles.
// 4) Jump to rhs_not_nan.
// In cases 3 and 4 we have found out we were dealing with a number-number
// comparison and the numbers have been loaded into f12 and f14 as doubles,
// or in GP registers (a0, a1, a2, a3) depending on the presence of the FPU.
EmitSmiNonsmiComparison(masm, lhs, rhs,
&both_loaded_as_doubles, &slow, strict());
__ bind(&both_loaded_as_doubles);
// f12, f14 are the double representations of the left hand side
// and the right hand side if we have FPU. Otherwise a2, a3 represent
// left hand side and a0, a1 represent right hand side.
Isolate* isolate = masm->isolate();
if (CpuFeatures::IsSupported(FPU)) {
CpuFeatures::Scope scope(FPU);
Label nan;
__ li(t0, Operand(LESS));
__ li(t1, Operand(GREATER));
__ li(t2, Operand(EQUAL));
// Check if either rhs or lhs is NaN.
__ BranchF(NULL, &nan, eq, f12, f14);
// Check if LESS condition is satisfied. If true, move conditionally
// result to v0.
__ c(OLT, D, f12, f14);
__ Movt(v0, t0);
// Use previous check to store conditionally to v0 oposite condition
// (GREATER). If rhs is equal to lhs, this will be corrected in next
// check.
__ Movf(v0, t1);
// Check if EQUAL condition is satisfied. If true, move conditionally
// result to v0.
__ c(EQ, D, f12, f14);
__ Movt(v0, t2);
__ Ret();
__ bind(&nan);
// NaN comparisons always fail.
// Load whatever we need in v0 to make the comparison fail.
if (cc == lt || cc == le) {
__ li(v0, Operand(GREATER));
} else {
__ li(v0, Operand(LESS));
}
__ Ret();
} else {
// Checks for NaN in the doubles we have loaded. Can return the answer or
// fall through if neither is a NaN. Also binds rhs_not_nan.
EmitNanCheck(masm, cc);
// Compares two doubles that are not NaNs. Returns the answer.
// Never falls through.
EmitTwoNonNanDoubleComparison(masm, cc);
}
__ bind(&not_smis);
// At this point we know we are dealing with two different objects,
// and neither of them is a Smi. The objects are in lhs_ and rhs_.
if (strict()) {
// This returns non-equal for some object types, or falls through if it
// was not lucky.
EmitStrictTwoHeapObjectCompare(masm, lhs, rhs);
}
Label check_for_symbols;
Label flat_string_check;
// Check for heap-number-heap-number comparison. Can jump to slow case,
// or load both doubles and jump to the code that handles
// that case. If the inputs are not doubles then jumps to check_for_symbols.
// In this case a2 will contain the type of lhs_.
EmitCheckForTwoHeapNumbers(masm,
lhs,
rhs,
&both_loaded_as_doubles,
&check_for_symbols,
&flat_string_check);
__ bind(&check_for_symbols);
if (cc == eq && !strict()) {
// Returns an answer for two symbols or two detectable objects.
// Otherwise jumps to string case or not both strings case.
// Assumes that a2 is the type of lhs_ on entry.
EmitCheckForSymbolsOrObjects(masm, lhs, rhs, &flat_string_check, &slow);
}
// Check for both being sequential ASCII strings, and inline if that is the
// case.
__ bind(&flat_string_check);
__ JumpIfNonSmisNotBothSequentialAsciiStrings(lhs, rhs, a2, a3, &slow);
__ IncrementCounter(isolate->counters()->string_compare_native(), 1, a2, a3);
if (cc == eq) {
StringCompareStub::GenerateFlatAsciiStringEquals(masm,
lhs,
rhs,
a2,
a3,
t0);
} else {
StringCompareStub::GenerateCompareFlatAsciiStrings(masm,
lhs,
rhs,
a2,
a3,
t0,
t1);
}
// Never falls through to here.
__ bind(&slow);
// Prepare for call to builtin. Push object pointers, a0 (lhs) first,
// a1 (rhs) second.
__ Push(lhs, rhs);
// Figure out which native to call and setup the arguments.
Builtins::JavaScript native;
if (cc == eq) {
native = strict() ? Builtins::STRICT_EQUALS : Builtins::EQUALS;
} else {
native = Builtins::COMPARE;
int ncr; // NaN compare result.
if (cc == lt || cc == le) {
ncr = GREATER;
} else {
ASSERT(cc == gt || cc == ge); // Remaining cases.
ncr = LESS;
}
__ li(a0, Operand(Smi::FromInt(ncr)));
__ push(a0);
}
// Call the native; it returns -1 (less), 0 (equal), or 1 (greater)
// tagged as a small integer.
__ InvokeBuiltin(native, JUMP_FUNCTION);
__ bind(&miss);
GenerateMiss(masm);
}
// The stub expects its argument in the tos_ register and returns its result in
// it, too: zero for false, and a non-zero value for true.
void ToBooleanStub::Generate(MacroAssembler* masm) {
// This stub uses FPU instructions.
CpuFeatures::Scope scope(FPU);
Label patch;
const Register map = t5.is(tos_) ? t3 : t5;
// undefined -> false.
CheckOddball(masm, UNDEFINED, Heap::kUndefinedValueRootIndex, false);
// Boolean -> its value.
CheckOddball(masm, BOOLEAN, Heap::kFalseValueRootIndex, false);
CheckOddball(masm, BOOLEAN, Heap::kTrueValueRootIndex, true);
// 'null' -> false.
CheckOddball(masm, NULL_TYPE, Heap::kNullValueRootIndex, false);
if (types_.Contains(SMI)) {
// Smis: 0 -> false, all other -> true
__ And(at, tos_, kSmiTagMask);
// tos_ contains the correct return value already
__ Ret(eq, at, Operand(zero_reg));
} else if (types_.NeedsMap()) {
// If we need a map later and have a Smi -> patch.
__ JumpIfSmi(tos_, &patch);
}
if (types_.NeedsMap()) {
__ lw(map, FieldMemOperand(tos_, HeapObject::kMapOffset));
if (types_.CanBeUndetectable()) {
__ lbu(at, FieldMemOperand(map, Map::kBitFieldOffset));
__ And(at, at, Operand(1 << Map::kIsUndetectable));
// Undetectable -> false.
__ Movn(tos_, zero_reg, at);
__ Ret(ne, at, Operand(zero_reg));
}
}
if (types_.Contains(SPEC_OBJECT)) {
// Spec object -> true.
__ lbu(at, FieldMemOperand(map, Map::kInstanceTypeOffset));
// tos_ contains the correct non-zero return value already.
__ Ret(ge, at, Operand(FIRST_SPEC_OBJECT_TYPE));
}
if (types_.Contains(STRING)) {
// String value -> false iff empty.
__ lbu(at, FieldMemOperand(map, Map::kInstanceTypeOffset));
Label skip;
__ Branch(&skip, ge, at, Operand(FIRST_NONSTRING_TYPE));
__ Ret(USE_DELAY_SLOT); // the string length is OK as the return value
__ lw(tos_, FieldMemOperand(tos_, String::kLengthOffset));
__ bind(&skip);
}
if (types_.Contains(HEAP_NUMBER)) {
// Heap number -> false iff +0, -0, or NaN.
Label not_heap_number;
__ LoadRoot(at, Heap::kHeapNumberMapRootIndex);
__ Branch(&not_heap_number, ne, map, Operand(at));
Label zero_or_nan, number;
__ ldc1(f2, FieldMemOperand(tos_, HeapNumber::kValueOffset));
__ BranchF(&number, &zero_or_nan, ne, f2, kDoubleRegZero);
// "tos_" is a register, and contains a non zero value by default.
// Hence we only need to overwrite "tos_" with zero to return false for
// FP_ZERO or FP_NAN cases. Otherwise, by default it returns true.
__ bind(&zero_or_nan);
__ mov(tos_, zero_reg);
__ bind(&number);
__ Ret();
__ bind(&not_heap_number);
}
__ bind(&patch);
GenerateTypeTransition(masm);
}
void ToBooleanStub::CheckOddball(MacroAssembler* masm,
Type type,
Heap::RootListIndex value,
bool result) {
if (types_.Contains(type)) {
// If we see an expected oddball, return its ToBoolean value tos_.
__ LoadRoot(at, value);
__ Subu(at, at, tos_); // This is a check for equality for the movz below.
// The value of a root is never NULL, so we can avoid loading a non-null
// value into tos_ when we want to return 'true'.
if (!result) {
__ Movz(tos_, zero_reg, at);
}
__ Ret(eq, at, Operand(zero_reg));
}
}
void ToBooleanStub::GenerateTypeTransition(MacroAssembler* masm) {
__ Move(a3, tos_);
__ li(a2, Operand(Smi::FromInt(tos_.code())));
__ li(a1, Operand(Smi::FromInt(types_.ToByte())));
__ Push(a3, a2, a1);
// Patch the caller to an appropriate specialized stub and return the
// operation result to the caller of the stub.
__ TailCallExternalReference(
ExternalReference(IC_Utility(IC::kToBoolean_Patch), masm->isolate()),
3,
1);
}
void StoreBufferOverflowStub::Generate(MacroAssembler* masm) {
// We don't allow a GC during a store buffer overflow so there is no need to
// store the registers in any particular way, but we do have to store and
// restore them.
__ MultiPush(kJSCallerSaved | ra.bit());
if (save_doubles_ == kSaveFPRegs) {
CpuFeatures::Scope scope(FPU);
__ MultiPushFPU(kCallerSavedFPU);
}
const int argument_count = 1;
const int fp_argument_count = 0;
const Register scratch = a1;
AllowExternalCallThatCantCauseGC scope(masm);
__ PrepareCallCFunction(argument_count, fp_argument_count, scratch);
__ li(a0, Operand(ExternalReference::isolate_address()));
__ CallCFunction(
ExternalReference::store_buffer_overflow_function(masm->isolate()),
argument_count);
if (save_doubles_ == kSaveFPRegs) {
CpuFeatures::Scope scope(FPU);
__ MultiPopFPU(kCallerSavedFPU);
}
__ MultiPop(kJSCallerSaved | ra.bit());
__ Ret();
}
void UnaryOpStub::PrintName(StringStream* stream) {
const char* op_name = Token::Name(op_);
const char* overwrite_name = NULL; // Make g++ happy.
switch (mode_) {
case UNARY_NO_OVERWRITE: overwrite_name = "Alloc"; break;
case UNARY_OVERWRITE: overwrite_name = "Overwrite"; break;
}
stream->Add("UnaryOpStub_%s_%s_%s",
op_name,
overwrite_name,
UnaryOpIC::GetName(operand_type_));
}
// TODO(svenpanne): Use virtual functions instead of switch.
void UnaryOpStub::Generate(MacroAssembler* masm) {
switch (operand_type_) {
case UnaryOpIC::UNINITIALIZED:
GenerateTypeTransition(masm);
break;
case UnaryOpIC::SMI:
GenerateSmiStub(masm);
break;
case UnaryOpIC::HEAP_NUMBER:
GenerateHeapNumberStub(masm);
break;
case UnaryOpIC::GENERIC:
GenerateGenericStub(masm);
break;
}
}
void UnaryOpStub::GenerateTypeTransition(MacroAssembler* masm) {
// Argument is in a0 and v0 at this point, so we can overwrite a0.
__ li(a2, Operand(Smi::FromInt(op_)));
__ li(a1, Operand(Smi::FromInt(mode_)));
__ li(a0, Operand(Smi::FromInt(operand_type_)));
__ Push(v0, a2, a1, a0);
__ TailCallExternalReference(
ExternalReference(IC_Utility(IC::kUnaryOp_Patch), masm->isolate()), 4, 1);
}
// TODO(svenpanne): Use virtual functions instead of switch.
void UnaryOpStub::GenerateSmiStub(MacroAssembler* masm) {
switch (op_) {
case Token::SUB:
GenerateSmiStubSub(masm);
break;
case Token::BIT_NOT:
GenerateSmiStubBitNot(masm);
break;
default:
UNREACHABLE();
}
}
void UnaryOpStub::GenerateSmiStubSub(MacroAssembler* masm) {
Label non_smi, slow;
GenerateSmiCodeSub(masm, &non_smi, &slow);
__ bind(&non_smi);
__ bind(&slow);
GenerateTypeTransition(masm);
}
void UnaryOpStub::GenerateSmiStubBitNot(MacroAssembler* masm) {
Label non_smi;
GenerateSmiCodeBitNot(masm, &non_smi);
__ bind(&non_smi);
GenerateTypeTransition(masm);
}
void UnaryOpStub::GenerateSmiCodeSub(MacroAssembler* masm,
Label* non_smi,
Label* slow) {
__ JumpIfNotSmi(a0, non_smi);
// The result of negating zero or the smallest negative smi is not a smi.
__ And(t0, a0, ~0x80000000);
__ Branch(slow, eq, t0, Operand(zero_reg));
// Return '0 - value'.
__ Ret(USE_DELAY_SLOT);
__ subu(v0, zero_reg, a0);
}
void UnaryOpStub::GenerateSmiCodeBitNot(MacroAssembler* masm,
Label* non_smi) {
__ JumpIfNotSmi(a0, non_smi);
// Flip bits and revert inverted smi-tag.
__ Neg(v0, a0);
__ And(v0, v0, ~kSmiTagMask);
__ Ret();
}
// TODO(svenpanne): Use virtual functions instead of switch.
void UnaryOpStub::GenerateHeapNumberStub(MacroAssembler* masm) {
switch (op_) {
case Token::SUB:
GenerateHeapNumberStubSub(masm);
break;
case Token::BIT_NOT:
GenerateHeapNumberStubBitNot(masm);
break;
default:
UNREACHABLE();
}
}
void UnaryOpStub::GenerateHeapNumberStubSub(MacroAssembler* masm) {
Label non_smi, slow, call_builtin;
GenerateSmiCodeSub(masm, &non_smi, &call_builtin);
__ bind(&non_smi);
GenerateHeapNumberCodeSub(masm, &slow);
__ bind(&slow);
GenerateTypeTransition(masm);
__ bind(&call_builtin);
GenerateGenericCodeFallback(masm);
}
void UnaryOpStub::GenerateHeapNumberStubBitNot(MacroAssembler* masm) {
Label non_smi, slow;
GenerateSmiCodeBitNot(masm, &non_smi);
__ bind(&non_smi);
GenerateHeapNumberCodeBitNot(masm, &slow);
__ bind(&slow);
GenerateTypeTransition(masm);
}
void UnaryOpStub::GenerateHeapNumberCodeSub(MacroAssembler* masm,
Label* slow) {
EmitCheckForHeapNumber(masm, a0, a1, t2, slow);
// a0 is a heap number. Get a new heap number in a1.
if (mode_ == UNARY_OVERWRITE) {
__ lw(a2, FieldMemOperand(a0, HeapNumber::kExponentOffset));
__ Xor(a2, a2, Operand(HeapNumber::kSignMask)); // Flip sign.
__ sw(a2, FieldMemOperand(a0, HeapNumber::kExponentOffset));
} else {
Label slow_allocate_heapnumber, heapnumber_allocated;
__ AllocateHeapNumber(a1, a2, a3, t2, &slow_allocate_heapnumber);
__ jmp(&heapnumber_allocated);
__ bind(&slow_allocate_heapnumber);
{
FrameScope scope(masm, StackFrame::INTERNAL);
__ push(a0);
__ CallRuntime(Runtime::kNumberAlloc, 0);
__ mov(a1, v0);
__ pop(a0);
}
__ bind(&heapnumber_allocated);
__ lw(a3, FieldMemOperand(a0, HeapNumber::kMantissaOffset));
__ lw(a2, FieldMemOperand(a0, HeapNumber::kExponentOffset));
__ sw(a3, FieldMemOperand(a1, HeapNumber::kMantissaOffset));
__ Xor(a2, a2, Operand(HeapNumber::kSignMask)); // Flip sign.
__ sw(a2, FieldMemOperand(a1, HeapNumber::kExponentOffset));
__ mov(v0, a1);
}
__ Ret();
}
void UnaryOpStub::GenerateHeapNumberCodeBitNot(
MacroAssembler* masm,
Label* slow) {
Label impossible;
EmitCheckForHeapNumber(masm, a0, a1, t2, slow);
// Convert the heap number in a0 to an untagged integer in a1.
__ ConvertToInt32(a0, a1, a2, a3, f0, slow);
// Do the bitwise operation and check if the result fits in a smi.
Label try_float;
__ Neg(a1, a1);
__ Addu(a2, a1, Operand(0x40000000));
__ Branch(&try_float, lt, a2, Operand(zero_reg));
// Tag the result as a smi and we're done.
__ SmiTag(v0, a1);
__ Ret();
// Try to store the result in a heap number.
__ bind(&try_float);
if (mode_ == UNARY_NO_OVERWRITE) {
Label slow_allocate_heapnumber, heapnumber_allocated;
// Allocate a new heap number without zapping v0, which we need if it fails.
__ AllocateHeapNumber(a2, a3, t0, t2, &slow_allocate_heapnumber);
__ jmp(&heapnumber_allocated);
__ bind(&slow_allocate_heapnumber);
{
FrameScope scope(masm, StackFrame::INTERNAL);
__ push(v0); // Push the heap number, not the untagged int32.
__ CallRuntime(Runtime::kNumberAlloc, 0);
__ mov(a2, v0); // Move the new heap number into a2.
// Get the heap number into v0, now that the new heap number is in a2.
__ pop(v0);
}
// Convert the heap number in v0 to an untagged integer in a1.
// This can't go slow-case because it's the same number we already
// converted once again.
__ ConvertToInt32(v0, a1, a3, t0, f0, &impossible);
// Negate the result.
__ Xor(a1, a1, -1);
__ bind(&heapnumber_allocated);
__ mov(v0, a2); // Move newly allocated heap number to v0.
}
if (CpuFeatures::IsSupported(FPU)) {
// Convert the int32 in a1 to the heap number in v0. a2 is corrupted.
CpuFeatures::Scope scope(FPU);
__ mtc1(a1, f0);
__ cvt_d_w(f0, f0);
__ sdc1(f0, FieldMemOperand(v0, HeapNumber::kValueOffset));
__ Ret();
} else {
// WriteInt32ToHeapNumberStub does not trigger GC, so we do not
// have to set up a frame.
WriteInt32ToHeapNumberStub stub(a1, v0, a2, a3);
__ Jump(stub.GetCode(), RelocInfo::CODE_TARGET);
}
__ bind(&impossible);
if (FLAG_debug_code) {
__ stop("Incorrect assumption in bit-not stub");
}
}
// TODO(svenpanne): Use virtual functions instead of switch.
void UnaryOpStub::GenerateGenericStub(MacroAssembler* masm) {
switch (op_) {
case Token::SUB:
GenerateGenericStubSub(masm);
break;
case Token::BIT_NOT:
GenerateGenericStubBitNot(masm);
break;
default:
UNREACHABLE();
}
}
void UnaryOpStub::GenerateGenericStubSub(MacroAssembler* masm) {
Label non_smi, slow;
GenerateSmiCodeSub(masm, &non_smi, &slow);
__ bind(&non_smi);
GenerateHeapNumberCodeSub(masm, &slow);
__ bind(&slow);
GenerateGenericCodeFallback(masm);
}
void UnaryOpStub::GenerateGenericStubBitNot(MacroAssembler* masm) {
Label non_smi, slow;
GenerateSmiCodeBitNot(masm, &non_smi);
__ bind(&non_smi);
GenerateHeapNumberCodeBitNot(masm, &slow);
__ bind(&slow);
GenerateGenericCodeFallback(masm);
}
void UnaryOpStub::GenerateGenericCodeFallback(
MacroAssembler* masm) {
// Handle the slow case by jumping to the JavaScript builtin.
__ push(a0);
switch (op_) {
case Token::SUB:
__ InvokeBuiltin(Builtins::UNARY_MINUS, JUMP_FUNCTION);
break;
case Token::BIT_NOT:
__ InvokeBuiltin(Builtins::BIT_NOT, JUMP_FUNCTION);
break;
default:
UNREACHABLE();
}
}
void BinaryOpStub::Initialize() {
platform_specific_bit_ = CpuFeatures::IsSupported(FPU);
}
void BinaryOpStub::GenerateTypeTransition(MacroAssembler* masm) {
Label get_result;
__ Push(a1, a0);
__ li(a2, Operand(Smi::FromInt(MinorKey())));
__ push(a2);
__ TailCallExternalReference(
ExternalReference(IC_Utility(IC::kBinaryOp_Patch),
masm->isolate()),
3,
1);
}
void BinaryOpStub::GenerateTypeTransitionWithSavedArgs(
MacroAssembler* masm) {
UNIMPLEMENTED();
}
void BinaryOpStub_GenerateSmiSmiOperation(MacroAssembler* masm,
Token::Value op) {
Register left = a1;
Register right = a0;
Register scratch1 = t0;
Register scratch2 = t1;
ASSERT(right.is(a0));
STATIC_ASSERT(kSmiTag == 0);
Label not_smi_result;
switch (op) {
case Token::ADD:
__ AdduAndCheckForOverflow(v0, left, right, scratch1);
__ RetOnNoOverflow(scratch1);
// No need to revert anything - right and left are intact.
break;
case Token::SUB:
__ SubuAndCheckForOverflow(v0, left, right, scratch1);
__ RetOnNoOverflow(scratch1);
// No need to revert anything - right and left are intact.
break;
case Token::MUL: {
// Remove tag from one of the operands. This way the multiplication result
// will be a smi if it fits the smi range.
__ SmiUntag(scratch1, right);
// Do multiplication.
// lo = lower 32 bits of scratch1 * left.
// hi = higher 32 bits of scratch1 * left.
__ Mult(left, scratch1);
// Check for overflowing the smi range - no overflow if higher 33 bits of
// the result are identical.
__ mflo(scratch1);
__ mfhi(scratch2);
__ sra(scratch1, scratch1, 31);
__ Branch(&not_smi_result, ne, scratch1, Operand(scratch2));
// Go slow on zero result to handle -0.
__ mflo(v0);
__ Ret(ne, v0, Operand(zero_reg));
// We need -0 if we were multiplying a negative number with 0 to get 0.
// We know one of them was zero.
__ Addu(scratch2, right, left);
Label skip;
// ARM uses the 'pl' condition, which is 'ge'.
// Negating it results in 'lt'.
__ Branch(&skip, lt, scratch2, Operand(zero_reg));
ASSERT(Smi::FromInt(0) == 0);
__ Ret(USE_DELAY_SLOT);
__ mov(v0, zero_reg); // Return smi 0 if the non-zero one was positive.
__ bind(&skip);
// We fall through here if we multiplied a negative number with 0, because
// that would mean we should produce -0.
}
break;
case Token::DIV: {
Label done;
__ SmiUntag(scratch2, right);
__ SmiUntag(scratch1, left);
__ Div(scratch1, scratch2);
// A minor optimization: div may be calculated asynchronously, so we check
// for division by zero before getting the result.
__ Branch(&not_smi_result, eq, scratch2, Operand(zero_reg));
// If the result is 0, we need to make sure the dividsor (right) is
// positive, otherwise it is a -0 case.
// Quotient is in 'lo', remainder is in 'hi'.
// Check for no remainder first.
__ mfhi(scratch1);
__ Branch(&not_smi_result, ne, scratch1, Operand(zero_reg));
__ mflo(scratch1);
__ Branch(&done, ne, scratch1, Operand(zero_reg));
__ Branch(&not_smi_result, lt, scratch2, Operand(zero_reg));
__ bind(&done);
// Check that the signed result fits in a Smi.
__ Addu(scratch2, scratch1, Operand(0x40000000));
__ Branch(&not_smi_result, lt, scratch2, Operand(zero_reg));
__ SmiTag(v0, scratch1);
__ Ret();
}
break;
case Token::MOD: {
Label done;
__ SmiUntag(scratch2, right);
__ SmiUntag(scratch1, left);
__ Div(scratch1, scratch2);
// A minor optimization: div may be calculated asynchronously, so we check
// for division by 0 before calling mfhi.
// Check for zero on the right hand side.
__ Branch(&not_smi_result, eq, scratch2, Operand(zero_reg));
// If the result is 0, we need to make sure the dividend (left) is
// positive (or 0), otherwise it is a -0 case.
// Remainder is in 'hi'.
__ mfhi(scratch2);
__ Branch(&done, ne, scratch2, Operand(zero_reg));
__ Branch(&not_smi_result, lt, scratch1, Operand(zero_reg));
__ bind(&done);
// Check that the signed result fits in a Smi.
__ Addu(scratch1, scratch2, Operand(0x40000000));
__ Branch(&not_smi_result, lt, scratch1, Operand(zero_reg));
__ SmiTag(v0, scratch2);
__ Ret();
}
break;
case Token::BIT_OR:
__ Ret(USE_DELAY_SLOT);
__ or_(v0, left, right);
break;
case Token::BIT_AND:
__ Ret(USE_DELAY_SLOT);
__ and_(v0, left, right);
break;
case Token::BIT_XOR:
__ Ret(USE_DELAY_SLOT);
__ xor_(v0, left, right);
break;
case Token::SAR:
// Remove tags from right operand.
__ GetLeastBitsFromSmi(scratch1, right, 5);
__ srav(scratch1, left, scratch1);
// Smi tag result.
__ And(v0, scratch1, ~kSmiTagMask);
__ Ret();
break;
case Token::SHR:
// Remove tags from operands. We can't do this on a 31 bit number
// because then the 0s get shifted into bit 30 instead of bit 31.
__ SmiUntag(scratch1, left);
__ GetLeastBitsFromSmi(scratch2, right, 5);
__ srlv(v0, scratch1, scratch2);
// Unsigned shift is not allowed to produce a negative number, so
// check the sign bit and the sign bit after Smi tagging.
__ And(scratch1, v0, Operand(0xc0000000));
__ Branch(&not_smi_result, ne, scratch1, Operand(zero_reg));
// Smi tag result.
__ SmiTag(v0);
__ Ret();
break;
case Token::SHL:
// Remove tags from operands.
__ SmiUntag(scratch1, left);
__ GetLeastBitsFromSmi(scratch2, right, 5);
__ sllv(scratch1, scratch1, scratch2);
// Check that the signed result fits in a Smi.
__ Addu(scratch2, scratch1, Operand(0x40000000));
__ Branch(&not_smi_result, lt, scratch2, Operand(zero_reg));
__ SmiTag(v0, scratch1);
__ Ret();
break;
default:
UNREACHABLE();
}
__ bind(&not_smi_result);
}
void BinaryOpStub_GenerateHeapResultAllocation(MacroAssembler* masm,
Register result,
Register heap_number_map,
Register scratch1,
Register scratch2,
Label* gc_required,
OverwriteMode mode);
void BinaryOpStub_GenerateFPOperation(MacroAssembler* masm,
BinaryOpIC::TypeInfo left_type,
BinaryOpIC::TypeInfo right_type,
bool smi_operands,
Label* not_numbers,
Label* gc_required,
Label* miss,
Token::Value op,
OverwriteMode mode) {
Register left = a1;
Register right = a0;
Register scratch1 = t3;
Register scratch2 = t5;
Register scratch3 = t0;
ASSERT(smi_operands || (not_numbers != NULL));
if (smi_operands) {
__ AssertSmi(left);
__ AssertSmi(right);
}
if (left_type == BinaryOpIC::SMI) {
__ JumpIfNotSmi(left, miss);
}
if (right_type == BinaryOpIC::SMI) {
__ JumpIfNotSmi(right, miss);
}
Register heap_number_map = t2;
__ LoadRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
switch (op) {
case Token::ADD:
case Token::SUB:
case Token::MUL:
case Token::DIV:
case Token::MOD: {
// Load left and right operands into f12 and f14 or a0/a1 and a2/a3
// depending on whether FPU is available or not.
FloatingPointHelper::Destination destination =
CpuFeatures::IsSupported(FPU) &&
op != Token::MOD ?
FloatingPointHelper::kFPURegisters :
FloatingPointHelper::kCoreRegisters;
// Allocate new heap number for result.
Register result = s0;
BinaryOpStub_GenerateHeapResultAllocation(
masm, result, heap_number_map, scratch1, scratch2, gc_required, mode);
// Load the operands.
if (smi_operands) {
FloatingPointHelper::LoadSmis(masm, destination, scratch1, scratch2);
} else {
// Load right operand to f14 or a2/a3.
if (right_type == BinaryOpIC::INT32) {
FloatingPointHelper::LoadNumberAsInt32Double(
masm, right, destination, f14, f16, a2, a3, heap_number_map,
scratch1, scratch2, f2, miss);
} else {
Label* fail = (right_type == BinaryOpIC::HEAP_NUMBER) ? miss
: not_numbers;
FloatingPointHelper::LoadNumber(
masm, destination, right, f14, a2, a3, heap_number_map,
scratch1, scratch2, fail);
}
// Load left operand to f12 or a0/a1. This keeps a0/a1 intact if it
// jumps to |miss|.
if (left_type == BinaryOpIC::INT32) {
FloatingPointHelper::LoadNumberAsInt32Double(
masm, left, destination, f12, f16, a0, a1, heap_number_map,
scratch1, scratch2, f2, miss);
} else {
Label* fail = (left_type == BinaryOpIC::HEAP_NUMBER) ? miss
: not_numbers;
FloatingPointHelper::LoadNumber(
masm, destination, left, f12, a0, a1, heap_number_map,
scratch1, scratch2, fail);
}
}
// Calculate the result.
if (destination == FloatingPointHelper::kFPURegisters) {
// Using FPU registers:
// f12: Left value.
// f14: Right value.
CpuFeatures::Scope scope(FPU);
switch (op) {
case Token::ADD:
__ add_d(f10, f12, f14);
break;
case Token::SUB:
__ sub_d(f10, f12, f14);
break;
case Token::MUL:
__ mul_d(f10, f12, f14);
break;
case Token::DIV:
__ div_d(f10, f12, f14);
break;
default:
UNREACHABLE();
}
// ARM uses a workaround here because of the unaligned HeapNumber
// kValueOffset. On MIPS this workaround is built into sdc1 so
// there's no point in generating even more instructions.
__ sdc1(f10, FieldMemOperand(result, HeapNumber::kValueOffset));
__ Ret(USE_DELAY_SLOT);
__ mov(v0, result);
} else {
// Call the C function to handle the double operation.
FloatingPointHelper::CallCCodeForDoubleOperation(masm,
op,
result,
scratch1);
if (FLAG_debug_code) {
__ stop("Unreachable code.");
}
}
break;
}
case Token::BIT_OR:
case Token::BIT_XOR:
case Token::BIT_AND:
case Token::SAR:
case Token::SHR:
case Token::SHL: {
if (smi_operands) {
__ SmiUntag(a3, left);
__ SmiUntag(a2, right);
} else {
// Convert operands to 32-bit integers. Right in a2 and left in a3.
FloatingPointHelper::ConvertNumberToInt32(masm,
left,
a3,
heap_number_map,
scratch1,
scratch2,
scratch3,
f0,
not_numbers);
FloatingPointHelper::ConvertNumberToInt32(masm,
right,
a2,
heap_number_map,
scratch1,
scratch2,
scratch3,
f0,
not_numbers);
}
Label result_not_a_smi;
switch (op) {
case Token::BIT_OR:
__ Or(a2, a3, Operand(a2));
break;
case Token::BIT_XOR:
__ Xor(a2, a3, Operand(a2));
break;
case Token::BIT_AND:
__ And(a2, a3, Operand(a2));
break;
case Token::SAR:
// Use only the 5 least significant bits of the shift count.
__ GetLeastBitsFromInt32(a2, a2, 5);
__ srav(a2, a3, a2);
break;
case Token::SHR:
// Use only the 5 least significant bits of the shift count.
__ GetLeastBitsFromInt32(a2, a2, 5);
__ srlv(a2, a3, a2);
// SHR is special because it is required to produce a positive answer.
// The code below for writing into heap numbers isn't capable of
// writing the register as an unsigned int so we go to slow case if we
// hit this case.
if (CpuFeatures::IsSupported(FPU)) {
__ Branch(&result_not_a_smi, lt, a2, Operand(zero_reg));
} else {
__ Branch(not_numbers, lt, a2, Operand(zero_reg));
}
break;
case Token::SHL:
// Use only the 5 least significant bits of the shift count.
__ GetLeastBitsFromInt32(a2, a2, 5);
__ sllv(a2, a3, a2);
break;
default:
UNREACHABLE();
}
// Check that the *signed* result fits in a smi.
__ Addu(a3, a2, Operand(0x40000000));
__ Branch(&result_not_a_smi, lt, a3, Operand(zero_reg));
__ SmiTag(v0, a2);
__ Ret();
// Allocate new heap number for result.
__ bind(&result_not_a_smi);
Register result = t1;
if (smi_operands) {
__ AllocateHeapNumber(
result, scratch1, scratch2, heap_number_map, gc_required);
} else {
BinaryOpStub_GenerateHeapResultAllocation(
masm, result, heap_number_map, scratch1, scratch2, gc_required,
mode);
}
// a2: Answer as signed int32.
// t1: Heap number to write answer into.
// Nothing can go wrong now, so move the heap number to v0, which is the
// result.
__ mov(v0, t1);
if (CpuFeatures::IsSupported(FPU)) {
// Convert the int32 in a2 to the heap number in a0. As
// mentioned above SHR needs to always produce a positive result.
CpuFeatures::Scope scope(FPU);
__ mtc1(a2, f0);
if (op == Token::SHR) {
__ Cvt_d_uw(f0, f0, f22);
} else {
__ cvt_d_w(f0, f0);
}
// ARM uses a workaround here because of the unaligned HeapNumber
// kValueOffset. On MIPS this workaround is built into sdc1 so
// there's no point in generating even more instructions.
__ sdc1(f0, FieldMemOperand(v0, HeapNumber::kValueOffset));
__ Ret();
} else {
// Tail call that writes the int32 in a2 to the heap number in v0, using
// a3 and a0 as scratch. v0 is preserved and returned.
WriteInt32ToHeapNumberStub stub(a2, v0, a3, a0);
__ TailCallStub(&stub);
}
break;
}
default:
UNREACHABLE();
}
}
// Generate the smi code. If the operation on smis are successful this return is
// generated. If the result is not a smi and heap number allocation is not
// requested the code falls through. If number allocation is requested but a
// heap number cannot be allocated the code jumps to the label gc_required.
void BinaryOpStub_GenerateSmiCode(
MacroAssembler* masm,
Label* use_runtime,
Label* gc_required,
Token::Value op,
BinaryOpStub::SmiCodeGenerateHeapNumberResults allow_heapnumber_results,
OverwriteMode mode) {
Label not_smis;
Register left = a1;
Register right = a0;
Register scratch1 = t3;
// Perform combined smi check on both operands.
__ Or(scratch1, left, Operand(right));
STATIC_ASSERT(kSmiTag == 0);
__ JumpIfNotSmi(scratch1, &not_smis);
// If the smi-smi operation results in a smi return is generated.