[gcc] Fix lea splitters for ILP32 data model

This is similar to http://codereview.chromium.org/3187016 and several previous changes.

Fixed lea splitters to disallow PIC symbol references where immediate operand is needed. Now all specs cpu2000 compile with -fPIC.

Hope the process of making these fixes should converge soon - instructions affected are instructions used for 32-bit pointer arithmetics, namely variants of add, sub and lea.

Review URL: http://codereview.chromium.org/3165059
diff --git a/gcc/gcc/config/i386/i386.md b/gcc/gcc/config/i386/i386.md
index 3d1e331..0c827b4 100644
--- a/gcc/gcc/config/i386/i386.md
+++ b/gcc/gcc/config/i386/i386.md
@@ -6009,7 +6009,7 @@
   [(set (match_operand 0 "register_operand" "=r")
 	(plus (plus (match_operand 1 "index_register_operand" "l")
 		    (match_operand 2 "register_operand" "r"))
-	      (match_operand 3 "immediate_operand" "i")))]
+	      (match_operand 3 "x86_64_immediate_operand" "e")))]
   "(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
     || (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
    && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
@@ -6044,7 +6044,7 @@
 	(zero_extend:DI
 	  (plus:SI (plus:SI (match_operand:SI 1 "index_register_operand" "l")
 			    (match_operand:SI 2 "register_operand" "r"))
-		   (match_operand:SI 3 "immediate_operand" "i"))))]
+		   (match_operand:SI 3 "x86_64_immediate_operand" "e"))))]
   "TARGET_64BIT"
   "#"
   "&& reload_completed"
@@ -6067,7 +6067,7 @@
   [(set (match_operand 0 "register_operand" "=r")
 	(plus (mult (match_operand 1 "index_register_operand" "l")
 		    (match_operand 2 "const248_operand" "i"))
-	      (match_operand 3 "nonmemory_operand" "ri")))]
+	      (match_operand 3 "nonmemory_operand" "re")))]
   "(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
     || (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
    && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
@@ -6100,7 +6100,7 @@
 	(zero_extend:DI
 	  (plus:SI (mult:SI (match_operand:SI 1 "index_register_operand" "l")
 			    (match_operand:SI 2 "const248_operand" "n"))
-		   (match_operand:SI 3 "nonmemory_operand" "ri"))))]
+		   (match_operand:SI 3 "nonmemory_operand" "re"))))]
   "TARGET_64BIT"
   "#"
   "&& reload_completed"
@@ -6161,7 +6161,7 @@
 			      (match_operand:SI 1 "index_register_operand" "l")
 			      (match_operand:SI 2 "const248_operand" "n"))
 			    (match_operand:SI 3 "register_operand" "r"))
-		   (match_operand:SI 4 "immediate_operand" "i"))))]
+		   (match_operand:SI 4 "x86_64_immediate_operand" "e"))))]
   "TARGET_64BIT"
   "#"
   "&& reload_completed"
@@ -6495,7 +6495,7 @@
 (define_insn "*addsi_1"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm,r")
 	(plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,r")
-		 (match_operand:SI 2 "general_operand" "g,ri,li")))
+		 (match_operand:SI 2 "general_operand" "g,re,le")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (PLUS, SImode, operands)"
 {
@@ -6586,7 +6586,7 @@
   [(set (match_operand:DI 0 "register_operand" "=r,r")
 	(zero_extend:DI
 	  (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,r")
-		   (match_operand:SI 2 "general_operand" "g,li"))))
+		   (match_operand:SI 2 "general_operand" "g,le"))))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"
 {