commit bdaa7d66a37adcc1f1d81c9b0f834327a74ffe07
author Zhao Jiazhong <zhaojiazhong-hf@loongson.cn> Wed Feb 19 07:54:30 2020
committer Commit Bot <commit-bot@chromium.org> Wed Feb 19 09:20:14 2020
tree 9c947996261abbb0dbe9482febf2fbf1efa3439e
parent 9f0f2cb7f08d0aecf22c684779b8ecd696bf9675

[mips][wasm-simd][liftoff] Implement i16x8.splat

Port 59e9689 https://crrev.com/c/2036739

Change-Id: Ie90aa9afffe36938a97b06947db136dda7e2b840
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2063194
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Auto-Submit: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Reviewed-by: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66328}

src/wasm/baseline/mips/liftoff-assembler-mips.h

diff --git a/src/wasm/baseline/mips/liftoff-assembler-mips.h b/src/wasm/baseline/mips/liftoff-assembler-mips.h
index f1ea6bf..55ac41a 100644
--- a/src/wasm/baseline/mips/liftoff-assembler-mips.h
+++ b/src/wasm/baseline/mips/liftoff-assembler-mips.h
@@ -1522,7 +1522,7 @@
   // TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
   // CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
   // 3a4000 support MSA.
-  bailout(kUnsupportedArchitecture, "emit_f32x4_splat");
+  bailout(kSimd, "emit_f32x4_splat");
 }
 
 void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
@@ -1530,7 +1530,15 @@
   // TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
   // CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
   // 3a4000 support MSA.
-  bailout(kUnsupportedArchitecture, "emit_i32x4_splat");
+  bailout(kSimd, "emit_i32x4_splat");
+}
+
+void LiftoffAssembler::emit_i16x8_splat(LiftoffRegister dst,
+                                        LiftoffRegister src) {
+  // TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
+  // CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
+  // 3a4000 support MSA.
+  bailout(kSimd, "emit_i16x8_splat");
 }
 
 void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {

src/wasm/baseline/mips64/liftoff-assembler-mips64.h

diff --git a/src/wasm/baseline/mips64/liftoff-assembler-mips64.h b/src/wasm/baseline/mips64/liftoff-assembler-mips64.h
index 17066ca..66f1c54 100644
--- a/src/wasm/baseline/mips64/liftoff-assembler-mips64.h
+++ b/src/wasm/baseline/mips64/liftoff-assembler-mips64.h
@@ -1314,7 +1314,7 @@
   // TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
   // CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
   // 3a4000 support MSA.
-  bailout(kUnsupportedArchitecture, "emit_f32x4_splat");
+  bailout(kSimd, "emit_f32x4_splat");
 }
 
 void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
@@ -1322,7 +1322,15 @@
   // TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
   // CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
   // 3a4000 support MSA.
-  bailout(kUnsupportedArchitecture, "emit_i32x4_splat");
+  bailout(kSimd, "emit_i32x4_splat");
+}
+
+void LiftoffAssembler::emit_i16x8_splat(LiftoffRegister dst,
+                                        LiftoffRegister src) {
+  // TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
+  // CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
+  // 3a4000 support MSA.
+  bailout(kSimd, "emit_i16x8_splat");
 }
 
 void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {