UPSTREAM: mb/google/zork: Disable SATA device for all Zork platforms to save power
SATA is currently turned on in the Dalboz and Trembyle base board
variant devicetrees, even though no Google/Zork device uses SATA; for
mass storage they either use eMMC or NVME PCIe SSDs. This patch disables
both the SATA PCIe device and the bus where it was the only enabled
device on. The next patch in this patch train sets a new FSP-M UPD
setting
BUG=b:162302027
Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Commit-Id: 48b2b2b8c14a6dcc79a4cb2974ef90370586e1a4
Original-Change-Id: Ie7773d9dcb0518c3e01bdd0af23b62268ab64694
Original-Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/44068
Original-Reviewed-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Cq-Depend: chrome-internal:3202602
Cq-Depend: chrome-internal:3201648
Cq-Depend: chrome-internal:3238098
Cq-Depend: chromium:2382516
Cq-Depend: chromium:2382515
Change-Id: I9a31cf609c75500f2078403389aac5e8fa37c989
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2382517
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
index 5a86b1cb..c761602 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
@@ -286,8 +286,8 @@
device pci 0.6 off end # HDA
device pci 0.7 on end # non-Sensor Fusion Hub device
end
- device pci 8.2 on # Internal GPP Bridge 0 to Bus B
- device pci 0.0 on end # AHCI
+ device pci 8.2 off # Internal GPP Bridge 0 to Bus B
+ device pci 0.0 off end # AHCI
end
device pci 14.0 on end # SM
device pci 14.3 on # - D14F3 bridge
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
index 62395a1..4413857 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
@@ -315,8 +315,8 @@
device pci 0.6 off end # HDA
device pci 0.7 on end # non-Sensor Fusion Hub device
end
- device pci 8.2 on # Internal GPP Bridge 0 to Bus B
- device pci 0.0 on end # AHCI
+ device pci 8.2 off # Internal GPP Bridge 0 to Bus B
+ device pci 0.0 off end # AHCI
end
device pci 14.0 on end # SM
device pci 14.3 on # - D14F3 bridge
