commit 7e00e7ed5d7553e92e7c0eaf28422d27b3fe93c8
author Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Sun Sep 02 16:11:28 2018
committer ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> Mon Sep 03 16:53:04 2018
tree 37116dea49ac82e27f62117ab63296a61839e025
parent 7fdd3e642e2d2a2ac45a769ed4cab42dcc19669d

mb/google/poppy/variants/nocturne: Enable DMIC CLK0/DATA0

DMIC's are now connected to DMIC_CLK0/DMIC_DATA0.
So, enable the pins accordingly.

BUG=b:113744731
BRANCH=none
TEST='emerge-nocturne coreboot chromeos-bootimage' builds the image

Change-Id: I48cace3c6099a2853fcb377c695a5e325094baf6
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Signed-off-by: Harsha Priya <harshapriya.n@intel.com>
cherry picked from: https://review.coreboot.org/c/coreboot/+/28433
(cherry picked from commit 76d9613c8a96a0b24b6becefc9b915391e44ced0)
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1201463
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Commit-Queue: Nick Vaccaro <nvaccaro@google.com>
Tested-by: Nick Vaccaro <nvaccaro@google.com>

src/mainboard/google/poppy/variants/nocturne/gpio.c

diff --git a/src/mainboard/google/poppy/variants/nocturne/gpio.c b/src/mainboard/google/poppy/variants/nocturne/gpio.c
index 782ce00..08bb801 100644
--- a/src/mainboard/google/poppy/variants/nocturne/gpio.c
+++ b/src/mainboard/google/poppy/variants/nocturne/gpio.c
@@ -199,10 +199,10 @@
 	PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
 	/* D18 : DMIC_DATA1 ==> PCH_DMIC_DATA */
 	PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
-	/* D19 : DMIC_CLK0 ==> NC */
-	PAD_CFG_NC(GPP_D19),
-	/* D20 : DMIC_DATA0 ==> NC */
-	PAD_CFG_NC(GPP_D20),
+	/* D19 : DMIC_CLK0 ==> PCH_DMIC_CLK_OUT */
+	PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
+	/* D20 : DMIC_DATA0 ==> PCH_DMIC_DATA_IN */
+	PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
 	/* D21 : SPI1_IO2 ==> NC */
 	PAD_CFG_NC(GPP_D21),
 	/* D22 : SPI1_IO3 ==> NC */