commit 9ba07035ed0acb28902cce826ea833cf531d57c1
author Patrick Georgi <pgeorgi@google.com> Thu Feb 11 14:49:13 2016
committer Patrick Georgi <pgeorgi@chromium.org> Mon Mar 07 18:19:04 2016
tree f78a5cfb57197350a309e2d2a93b09fe308f9c5f
parent 612cd24575ab8bb77260e22f3665f46b77794ffe

Sync up coreboot's 3rdparty binaries with upstream

Include all 3rdparty binaries that are present in upstream
coreboot as of 2016-2-11.

This includes support for a few new AMD platforms, but more
importantly, microcode is now kept in binary format.

BUG=none
BRANCH=none
TEST=builds with coreboot's 2016.02 branch
CQ-DEPEND=CL:328221,CL:*248306

Change-Id: I35df933681b8070bf87f9b97844984805487d317
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/326943
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>

cpu/amd/family_10h-family_14h/microcode_amd.bin

diff --git a/cpu/amd/family_10h-family_14h/microcode_amd.bin b/cpu/amd/family_10h-family_14h/microcode_amd.bin
new file mode 100644
index 0000000..23c9dd3
--- /dev/null
+++ b/cpu/amd/family_10h-family_14h/microcode_amd.bin
Binary files differ

cpu/amd/family_15h/microcode_amd_fam15h.bin

diff --git a/cpu/amd/family_15h/microcode_amd_fam15h.bin b/cpu/amd/family_15h/microcode_amd_fam15h.bin
new file mode 100644
index 0000000..ec48ec0
--- /dev/null
+++ b/cpu/amd/family_15h/microcode_amd_fam15h.bin
Binary files differ

cpu/amd/model_fxx/microcode.bin

diff --git a/cpu/amd/model_fxx/microcode.bin b/cpu/amd/model_fxx/microcode.bin
new file mode 100755
index 0000000..44faf20
--- /dev/null
+++ b/cpu/amd/model_fxx/microcode.bin
Binary files differ

cpu/intel/microcode/microcode2bin.sh

diff --git a/cpu/intel/microcode/microcode2bin.sh b/cpu/intel/microcode/microcode2bin.sh
new file mode 100755
index 0000000..1be109a
--- /dev/null
+++ b/cpu/intel/microcode/microcode2bin.sh
@@ -0,0 +1,55 @@
+#!/bin/bash
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2015 Google Inc.
+#
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation
+# and/or other materials provided with the distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+OLD=$(pwd)
+
+for UCODE in ../*/microcode.h
+do
+	cd $(dirname $UCODE)
+	cat > microcode.c << EOF
+#include <stdio.h>
+unsigned int microcode[] = {
+#include "microcode.h"
+};
+int main(void)
+{
+	FILE *f = fopen("microcode.bin", "wb");
+	fwrite(microcode, sizeof(microcode), 1, f);
+	fclose(f);
+	return 0;
+
+}
+EOF
+	gcc -o microcode microcode.c
+	./microcode
+	rm microcode microcode.c
+	cd $OLD
+done

cpu/intel/model_1067x/microcode-m011067660F.h

diff --git a/cpu/intel/model_1067x/microcode-m011067660F.h b/cpu/intel/model_1067x/microcode-m011067660F.h
deleted file mode 100644
index f0c80bf..0000000
--- a/cpu/intel/model_1067x/microcode-m011067660F.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m011067660F.inc  */
-0x00000001,	0x0000060f,	0x09292010,	0x00010676,
-0x8fe1a246,	0x00000001,	0x00000001,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x0000060f,
-0x00000035,	0x2e000000,	0x20100928,	0x00000301,
-0x00000001,	0x00010676,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xcd5c7635,	0x1603940d,	0x976e7e8b,	0x02bac8d1,
-0x9be45039,	0x69a22250,	0x76d8821c,	0x3fefb30d,
-0x170ce7c7,	0xd727c705,	0x019b1ba5,	0xe0414a29,
-0x57d45458,	0x26a8a411,	0x9faad966,	0x095ec8b0,
-0x083a7c2a,	0x17cfc70f,	0x3c8e78a8,	0xce18c419,
-0x5f2ddeb7,	0xc9c95d71,	0x437a5116,	0xe0253ad0,
-0xec78db42,	0x681e436f,	0x7fd028bb,	0x1149a501,
-0x0bdf0d05,	0xc2321514,	0xd6866cd8,	0x64942685,
-0x21e0276b,	0x0817a288,	0x09138669,	0x792985dc,
-0xbd60d6aa,	0xfbf902ec,	0x43fee69d,	0x5c5823c0,
-0x9dca1fe6,	0xb528b0c5,	0x22fd29ab,	0xac4fe251,
-0x77207813,	0x0637a1f9,	0x16bfcf73,	0x80497f6b,
-0xe5bca939,	0x1539fa1a,	0x66607fea,	0x2276c06f,
-0xd003229e,	0x3622fda7,	0x18d0b8af,	0x9f399760,
-0x3ac6387b,	0x6c7148fa,	0xfaf4df9f,	0x965db840,
-0x7c142542,	0x7b805f4c,	0x3f2002a3,	0x061399ce,
-0x2f1a03c4,	0x7f1c7616,	0xb2f9ab42,	0x4e6a92a2,
-0xb44b96d6,	0xe1167017,	0xec4b2fb3,	0xa15376be,
-0x00000011,	0x0788335a,	0x28facca9,	0xbf2e27da,
-0xebd0c3e5,	0x6e2bf3d3,	0x1291c903,	0x1b6f078f,
-0xb9fa90d0,	0x08dafe1d,	0xd3597151,	0xc19ebdfc,
-0x5979ae2d,	0x4dbac714,	0xfe524484,	0x113ace1c,
-0x00e8b78c,	0xdbfcb209,	0x578f12c8,	0xa0a9a9a4,
-0x75cbba05,	0x465b7ad3,	0xd7a0400c,	0x78c872fd,
-0x58e583ad,	0x89833f8a,	0x06682ef2,	0x2b171402,
-0x7dce156e,	0x03d0960a,	0xa49efcec,	0xe2571f5d,
-0x0e78dbcf,	0x344dbcb5,	0x742d5af8,	0x151b31b5,
-0xe7305747,	0x3e7ca578,	0x60fbc463,	0x850a9838,
-0x10006766,	0x70f8c433,	0x033bab69,	0xc4871830,
-0x41eac63f,	0x78886cad,	0x5631a48e,	0x01a4dbca,
-0xfe92aa1b,	0x0a0d0ea2,	0x7e74d7af,	0x9297e473,
-0x1c04148a,	0x6f60c9b8,	0xd2f3bac6,	0xd4664494,
-0xf5e57c3c,	0x4bf483a2,	0xa87a6675,	0xd4c0634d,
-0x90ec0d11,	0x9affdc7a,	0x31c0f085,	0xe70154b4,
-0x0f6042e1,	0xb0a44492,	0xd6978645,	0xb0d6bdd8,
-0x16a408ce,	0xbe208d45,	0xfde84e47,	0x357b93d5,
-0x197beb3f,	0xffdd29ff,	0x4a5895d6,	0x8354ce1c,
-0xb47f4fe8,	0xd162dfe5,	0x9805816d,	0xd6c09438,
-0x0f1db09b,	0x4a7fd1e0,	0x1e260e75,	0xcb1064c8,
-0xbe41a45a,	0x715047b5,	0x0a1ad754,	0x968231ee,
-0x4f156004,	0x6a37fee6,	0xab2d3034,	0x147ee014,
-0xdc7471b2,	0xa5f20a4e,	0xdc803518,	0x8adeba3e,
-0xb960d413,	0x51f60de9,	0x015914f4,	0xd32542b6,
-0x007a7f34,	0x96910cbe,	0x948e5d84,	0xb305ebc5,
-0x99d34cba,	0x30d334ae,	0xd38198fa,	0x14767c49,
-0x4c15d5b0,	0xf4371db4,	0xeef4cfbb,	0x4256b5d7,
-0x41ce6de0,	0x8840ba88,	0x99d0d63b,	0xfe90fb19,
-0x8e4ef36a,	0x728827f6,	0x0b676dad,	0x377239b5,
-0xff0c85a8,	0xd954058e,	0x04d26bbd,	0x9ea520ca,
-0x42c6f7a0,	0xe99386d4,	0xbd4f820f,	0x27b217bd,
-0xd2cbf0d3,	0x5a6ece4b,	0xed82c4bf,	0xb7d4c10c,
-0x9aa0e173,	0xb4d7721a,	0x990637ed,	0x58e2f40b,
-0x6cd2d564,	0x2d58e6aa,	0x1e3f5330,	0xd724d2dc,
-0xfca0c657,	0x68cd14bf,	0x6117e696,	0xe48c6c00,
-0x95c75bb2,	0x949a702e,	0x7823d834,	0xafb0c045,
-0xef4f6c0b,	0x5c4c00f1,	0xc0a7edc6,	0xe7397e19,
-0x8eaec8c3,	0x298d9212,	0x4afc4fa6,	0x24cca594,
-0x5b0345f8,	0xbde656d9,	0xb6a9199e,	0x6788166d,
-0xf6a9766a,	0x7d6efd02,	0xbe989743,	0x53db6a53,
-0x26acebc6,	0x0c661c7c,	0xba39c1ac,	0x46fe6a74,
-0x33743b7f,	0x60389f01,	0x26445dae,	0xd9e2dbbd,
-0x723821dc,	0x935a8568,	0x07d28911,	0x1003b007,
-0xffd0470d,	0x1c7ec08d,	0xab13ae7c,	0xa471a700,
-0x61af6580,	0xb2149237,	0xa68d4884,	0x96e29cb5,
-0x9ed0fea3,	0x7179142e,	0xbdc41838,	0x66508f94,
-0x3fc14db9,	0x3e4e989e,	0xfda40b42,	0x7d7e1e3c,
-0x809f23d2,	0x08ecc884,	0xab90e259,	0xab05613c,
-0x89b0fe97,	0x4ec6aef5,	0x64f19b7f,	0xa36addbb,
-0x4617a47a,	0x7fb68f44,	0xcf3a8187,	0x73bb8e77,
-0xa1f2e1d7,	0x71520c84,	0x0fa10c2e,	0x79657a56,
-0x61382ff3,	0xbcccf548,	0x9513c9a7,	0x3aa91723,
-0xd92154e1,	0x5f03c0eb,	0xb5091f85,	0xf19fa6c8,
-0x1c030671,	0x4e2aadcd,	0x862fe82d,	0x4dcfcbcc,
-0xc14d5269,	0x377d3c35,	0x01a87aa2,	0x577a58af,
-0xa6742bfe,	0xe04b391f,	0xb8002f20,	0xdf2b4ca2,
-0x64687c4d,	0x99a4bcd9,	0x332a2d33,	0xe231e1db,
-0xc9260a6e,	0xdf875589,	0x08a8b612,	0xfcb595ef,
-0x23f09500,	0x50e4db67,	0x861ec8e6,	0x07ea2473,
-0xff5d36a8,	0x4f27405c,	0xfb749fb2,	0x33e3137c,
-0x20ecc68e,	0x04599816,	0x5ef94e92,	0x636eed16,
-0x0b1ce1e2,	0x54cc3aa7,	0x6190f4a9,	0xb92359ec,
-0x947af351,	0x62278aa5,	0xc22d8f72,	0x9d72c80e,
-0x614a9754,	0x622fc50b,	0x007e2b67,	0x45407b6b,
-0x7a971c77,	0xc2af3a88,	0xa8859226,	0x652f92e4,
-0x0cbe851d,	0x0ddac8fc,	0x055a1563,	0x738e03dd,
-0x85815f4a,	0xce351842,	0x7735df1f,	0x49bf9d17,
-0x8969b9bb,	0x6b2478f6,	0x7d1f345a,	0xde84d7e2,
-0x7459831e,	0xdff84c3d,	0xcc2f10a4,	0x057859d5,
-0xbf05b6a9,	0x8cfd5040,	0x4903c653,	0xb9ceaacc,
-0x14a480f9,	0xe940e680,	0x62f32cb8,	0x6a3bf1e1,
-0x6e789199,	0x6b452cec,	0xd9f43312,	0xe25fbbb0,
-0xd2fc5565,	0x5e5c5c41,	0xa158ba32,	0xb1364cef,
-0x3bad4552,	0x2a37d087,	0x1cdb0454,	0x6fcaf84a,
-0xf37bf4af,	0xb243ab15,	0xc1bea3e5,	0x7f71223d,
-0xfcc0db87,	0x70ebe1cd,	0xa7186158,	0x4645a50f,
-0x4a72862b,	0x11fadd77,	0x62b6e6e0,	0xa08cb439,
-0xc97c8822,	0xae5329e9,	0x6894e381,	0xbc3fd08c,
-0x63c4c376,	0x778dd3fa,	0xf44c10f8,	0x9b46c123,
-0x8c773ca7,	0xe244e31e,	0xbc5b1d7d,	0xf08dae13,
-0x5a31b2cd,	0x21cae60f,	0x7cabcf9c,	0x3e0b6758,
-0x10501f82,	0xb97123f6,	0x34a748e2,	0x6bbed71f,
-0x79a492a0,	0xc6699b20,	0xff168c13,	0xe1d97f5d,
-0xbc6ae406,	0xb646b08a,	0x266cf921,	0xa871108b,
-0xbc8b60fe,	0x1ebfb166,	0x6cce08de,	0xb00034af,
-0x8a1a4f8b,	0x829fe92b,	0xa8e583e2,	0x303ed627,
-0x05a53ec5,	0xcedd09a1,	0xcdef97dc,	0xd8b1f6f0,
-0xaf15302f,	0x3e4ea367,	0x489107de,	0x5de1ddf3,
-0x7df7536f,	0xa896063e,	0xdc7eac2e,	0x03d61f3a,
-0xceb7cd2a,	0x67d394f3,	0xdd55740e,	0xcd9f0261,
-0xb464b758,	0x1faaedea,	0xbd38f64c,	0x5d19669d,
-0x1eed1a6e,	0x378896dd,	0xa12125db,	0xd60ca695,
-0x6e57a927,	0x8d4cfeac,	0x01287003,	0xefebdd07,
-0x0321b83b,	0x8dcff5ea,	0xb5cf9c9e,	0x5069e7bd,
-0xe825acd2,	0x2931b1d3,	0x6ad92693,	0xf9533335,
-0xd81e1459,	0x447a6f19,	0x95968cba,	0x792f32c2,
-0xa1d0c696,	0x50b2f01b,	0xf3a86b83,	0x6aec7b50,
-0x7c10a30b,	0x9ee89fdd,	0xdf1da1c3,	0x93008b66,
-0xc7338c3e,	0x3fc4a6f1,	0x2440db04,	0x5af4d472,
-0xd6a97ffb,	0x0ef0ad4e,	0xf7e3e539,	0x7e7a2a6c,
-0x923a5f2c,	0x1c92899f,	0x7b77c20b,	0x97dd2cb5,
-0x18f2de94,	0x44d7d456,	0x30b80309,	0xcfcd3805,
-0x82e30950,	0x1925303b,	0x454dc11b,	0xec6b221d,
-0x0f8bedf9,	0x13de4182,	0xae7d58ff,	0xc402c383,
-0x91f59409,	0x29d16bbe,	0x176c6829,	0x09480ba9,
-0xdfc9bdf6,	0x55fe11bb,	0x37651128,	0xfa4ee4d9,
-0xb4402d81,	0x5fd0c7db,	0x0a9fc656,	0x9ee57273,
-0x89d5e62b,	0x85c6d82c,	0xb6cd38ef,	0xfbc92d77,
-0xc603cf52,	0xfe078444,	0x79898470,	0x63a8cbc4,
-0xdd505b69,	0xa86109fe,	0x275abfbf,	0x53ca2c0f,
-0x8ee944fd,	0xc7bdc79a,	0x6d78fce1,	0xe2f881e1,
-0x7e2cd470,	0x5fee2589,	0x22bd7a0a,	0xc7bc30b6,
-0x0c7b245b,	0x622635f7,	0xa47af1ee,	0x441b7b18,
-0x8a7844b1,	0xffc68a9c,	0xcc184eed,	0x1ed181c1,
-0x209bc922,	0x95d3ae63,	0x85473c01,	0x5bfdee3f,
-0x9ac84123,	0x67eadd46,	0x04f59544,	0x59dee63d,
-0x8beec8d6,	0x8eb0fd0c,	0xe4b401c3,	0x28af87fd,
-0xf9e5d950,	0xd0dcd7f1,	0xa2d102fc,	0x7d760ac0,
-0xaf60f23e,	0xfe7f9cfd,	0x6c4e5569,	0xc48404c0,
-0x20f70db3,	0x5284047f,	0x84531666,	0x7211d68f,
-0x1d66212f,	0x26d2ff3c,	0x65bb8205,	0x5aac72de,
-0x0374ae7d,	0x9a19357a,	0x3a5a1b86,	0x08b46aca,
-0x165dffae,	0xbe5e6627,	0xf0bb4e4e,	0xf2ec9668,
-0xcedc0f0e,	0x1b83a79d,	0x740ab91c,	0x96de1333,
-0x87ecdf4b,	0x7a067222,	0xac3976f2,	0xd189d422,
-0x3df7e716,	0x38e628d8,	0xf8d5dfc6,	0x33318c3e,
-0x24a01bcd,	0x5c407809,	0x030f162c,	0xea348e7b,
-0x025af892,	0xfc5ce7d4,	0xf514e75c,	0x1b2897ad,
-0x8b273855,	0xc9325d60,	0x18bfbd7e,	0x5ab46176,
-0xafc21fd7,	0xd1a31ed1,	0x5affa61b,	0xc269dc17,
-0xd0a434b6,	0x239de3fa,	0x932a997c,	0x27d5ed2d,
-0x7c97e199,	0x95d2107c,	0xfd5f0c2b,	0xe6ddd551,
-0x3c83d4db,	0xe9fef7bf,	0x7100d40f,	0xff2e2bfe,
-0x6207c328,	0x64fe3eed,	0x8564bad1,	0x8a22a5d5,
-0x2680e0bc,	0xef96cfa9,	0x97fe6f16,	0xf4763890,
-0xc5f419e0,	0x6d134077,	0xa1039662,	0x983b172c,
-0xb1658c3b,	0xc34a9db4,	0xd28139f7,	0x02492e22,
-0x96482c4f,	0x0bbe5c32,	0xdcbad6ea,	0x5ac0c984,
-0x35c83ab7,	0x28a02508,	0x77d2b173,	0xfec4fa49,
-0x98b07b39,	0xbc9de59a,	0x807c647d,	0x4ca3f1dc,
-0xd7ea0f95,	0x7068356a,	0x7df91f74,	0x5d133a96,
-0xa507a88b,	0xc38c7450,	0x5d97f8d8,	0x78d525d3,
-0xea37f381,	0xc82b6cb5,	0x70561a14,	0xcb1a38ff,
-0xa017c85b,	0x8fddaf7a,	0x359316ed,	0x1d350446,
-0x23858b98,	0xd72ac50a,	0x93d318fc,	0x121fda88,
-0x4cf0a4c1,	0x985b7f8d,	0x71be788b,	0xa4501ad4,
-0x2442e93e,	0x8f41d88d,	0x13e9ddc0,	0x3d255b28,
-0x41638767,	0x845386be,	0x101d6adb,	0x6179d046,
-0xf819653c,	0x221fc235,	0xc63c5658,	0x2f3ed4a1,
-0x18c39cc4,	0x1dcdf0a9,	0x4a835ed0,	0x5af69393,
-0xaff99ee0,	0xd936f5f6,	0x50f968da,	0xd2d790a0,
-0xafc41e2f,	0xa859fc9d,	0xf62f56cc,	0x4b0e57fe,
-0x4859c419,	0x099e051d,	0xe943e723,	0x6bb74299,
-0xac3dd8b8,	0x4649094a,	0x02c7379d,	0xfd9e13c6,
-0xd09fd22d,	0xf55b775e,	0x30506e94,	0x1f93f43c,
-0xb5baf9be,	0x8d6c3037,	0x2fe87ddb,	0x50f5a4b7,
-0x52713058,	0xc3b19388,	0x3c368001,	0xd0c5e0e9,
-0xd0966697,	0x9974617e,	0x2aa4d175,	0xa0f26861,
-0xa901f0a0,	0xbe44c6aa,	0xc59cc8d3,	0xc91c1978,
-0x05ba7521,	0xc01b5c45,	0xbd77ab62,	0xdfef7c7c,
-0x6713919d,	0xd8e9e2ab,	0x7b088c0e,	0xa4721b34,
-0x661d208a,	0xaddcab29,	0x87085e38,	0xb33df647,
-0xcc8e771b,	0x66fca58e,	0x1be5440d,	0x44094a70,
-0x924749f1,	0x14e19530,	0xb8b4d2eb,	0x725cbb9c,
-0xc03e0524,	0xa303eed1,	0x5701587c,	0xd4b73636,
-0xe3be0160,	0xffc6d34c,	0x3e88a7ba,	0xdad7b9c8,
-0x94277aa8,	0xe954b95b,	0xdeb92cd9,	0xaa638342,
-0x94d9b34c,	0xd71618ac,	0xc87934bd,	0xe96101d1,
-0x55d1976c,	0x471c8505,	0x7a36d839,	0x5d62a9ee,
-0xf3c54a8a,	0xa2be15d9,	0x244087c9,	0x042c8037,
-0x23224689,	0x281c5d73,	0x2139ecfc,	0xffb8bc8a,
-0x834fdd11,	0x9cd5a5bd,	0xa3368319,	0x7e5bef0c,
-0x4ae2dbda,	0x86d90089,	0x6675dfce,	0x48876262,
-0xcec72538,	0x11dc5c80,	0x86a730f9,	0x313565c9,
-0xe3e5be11,	0x106d7cce,	0x752b8be2,	0x3d00a5bc,
-0xe6f70e95,	0x44447ac8,	0x600df30c,	0x8335ac3b,
-0x8816ddee,	0x700982fe,	0xee495741,	0x48c7e81c,
-0xa3d55da2,	0xb0172982,	0x70ab2158,	0xd4460621,
-0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,	0xa8454763,
-0x70877bb6,	0x66005c97,	0xaf292c06,	0x7b843db1,
-0xf343b59b,	0x25cdc7b5,	0xa41da617,	0x9e9d895e,
-0xc936f475,	0x7270925a,	0x30024230,	0x8e72f53d,
-0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,	0xfc18a2a3,
-0xaf377cc1,	0xbff09a78,	0x4b4e0814,	0x95a0b2c1,
-0x270398de,	0x201fca94,	0x2a032a4f,	0x131542b4,
-0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,	0xa814ddc9,
-0xa3b3a991,	0x17ee60c2,	0x852c0b8d,	0x11e5853a,
-0x762002a7,	0x92c5311d,	0x0d4bf7e1,	0xfffec870,
-0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,	0x0111a772,
-0x9808e780,	0x29c336e8,	0xe9bc05df,	0x5bedde11,
-0x945565af,	0xaff808fe,	0x87e3423d,	0x4de6f98f,
-0x93b4adef,	0xbf704fa4,	0x09120e91,	0xd54f3692,
-0xdf8eab1e,	0xfabbf59c,	0xe74318be,	0xaab87ffc,
-0x29fa791c,	0xe3915552,	0xa652cb9b,	0xa1252e74,
-0xb35b723b,	0x542aa28b,	0x12fcc5b0,	0x3941f962,
-0x82bcc6cc,	0x47b11974,	0xb821611f,	0x78b34250,
-0xf1be5659,	0x561b9e61,	0x6f3bd501,	0x584e6f5c,
-0xd54ed547,	0xacebcd21,	0x7b5ff816,	0xb64ad233,
-0x9f2f330d,	0x69fb1ece,	0xac8710dd,	0x58dc6c60,
-0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,	0xebc0ce9d,
-0xa733274f,	0x884d9b55,	0x42b08b63,	0xafa54a74,
-0x1c7ccf64,	0x93a20191,	0xaaa3132e,	0xc69831d1,
-0x54634889,	0xfbfe3efc,	0xd3cf68d4,	0x302e3117,
-0xf5693131,	0xc3ce8c6c,	0x1f03cd89,	0x6243334c,
-0xf16bc80f,	0xdca5f130,	0xcb2cd956,	0x4c1bb421,
-0xe8de533c,	0x7f86703a,	0x29aa897e,	0xdd54acad,
-0x76b2f2ae,	0x7ef82b71,	0x2e30970b,	0xba402597,
-0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,	0x7f9efd1c,
-0x2363d147,	0x5327289a,	0xe89229f3,	0xd63a535c,
-0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,	0x26b6edfb,
-0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,	0x6d65db4c,
-0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,	0xe20e6dbb,
-0x8488a45f,	0x8ebc2932,	0xd4767316,	0x3e8c4b8a,
-0xbab7402c,	0xfc1e217e,	0xe5c5bf82,	0x6928fe2e,
-0xc88528e9,	0x4b2e4e8f,	0xdd938b86,	0x0c964f98,
-0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,	0x197d005a,
-0x4d40b3b3,	0xcf203155,	0x0d2fa621,	0x752d2c58,
-0xb12bac12,	0x1e7e8c23,	0x94215d54,	0x9854a71c,
-0x4de63c64,	0x7a012529,	0x9c171f8d,	0x9e71def7,
-0x3bd17d50,	0x11f175d9,	0xec78abf3,	0x7b529eee,
-0xd3a69fc3,	0x5b718676,	0x58214d29,	0xa8bd2c34,
-0x41ea00ab,	0xa03f64d6,	0x4ee342b0,	0x32b1e444,
-0x1c1801a4,	0xc8424702,	0x334a7e35,	0x50cf1543,
-0x3b22b495,	0x88683776,	0x8e2e0154,	0x6155c033,
-0x4e2fa6ac,	0x42ace700,	0x8d64f97c,	0xaf9ced17,
-0xb2a5cb92,	0xa558582d,	0x88705de7,	0x9e528d59,
-0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,	0x2722bfa2,
-0x10462123,	0x30080f7d,	0xb346cd81,	0x0049c396,

cpu/intel/model_1067x/microcode-m041067660F.h

diff --git a/cpu/intel/model_1067x/microcode-m041067660F.h b/cpu/intel/model_1067x/microcode-m041067660F.h
deleted file mode 100644
index 82c8a63..0000000
--- a/cpu/intel/model_1067x/microcode-m041067660F.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m041067660F.inc  */
-0x00000001,	0x0000060f,	0x09292010,	0x00010676,
-0x8fe1a243,	0x00000001,	0x00000004,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x0000060f,
-0x00000035,	0x2e000000,	0x20100928,	0x00000301,
-0x00000001,	0x00010676,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xcd5c7635,	0x1603940d,	0x976e7e8b,	0x02bac8d1,
-0x9be45039,	0x69a22250,	0x76d8821c,	0x3fefb30d,
-0x170ce7c7,	0xd727c705,	0x019b1ba5,	0xe0414a29,
-0x57d45458,	0x26a8a411,	0x9faad966,	0x095ec8b0,
-0x083a7c2a,	0x17cfc70f,	0x3c8e78a8,	0xce18c419,
-0x5f2ddeb7,	0xc9c95d71,	0x437a5116,	0xe0253ad0,
-0xec78db42,	0x681e436f,	0x7fd028bb,	0x1149a501,
-0x0bdf0d05,	0xc2321514,	0xd6866cd8,	0x64942685,
-0x21e0276b,	0x0817a288,	0x09138669,	0x792985dc,
-0xbd60d6aa,	0xfbf902ec,	0x43fee69d,	0x5c5823c0,
-0x9dca1fe6,	0xb528b0c5,	0x22fd29ab,	0xac4fe251,
-0x77207813,	0x0637a1f9,	0x16bfcf73,	0x80497f6b,
-0xe5bca939,	0x1539fa1a,	0x66607fea,	0x2276c06f,
-0xd003229e,	0x3622fda7,	0x18d0b8af,	0x9f399760,
-0x3ac6387b,	0x6c7148fa,	0xfaf4df9f,	0x965db840,
-0x7c142542,	0x7b805f4c,	0x3f2002a3,	0x061399ce,
-0x2f1a03c4,	0x7f1c7616,	0xb2f9ab42,	0x4e6a92a2,
-0xb44b96d6,	0xe1167017,	0xec4b2fb3,	0xa15376be,
-0x00000011,	0x0788335a,	0x28facca9,	0xbf2e27da,
-0xebd0c3e5,	0x6e2bf3d3,	0x1291c903,	0x1b6f078f,
-0xb9fa90d0,	0x08dafe1d,	0xd3597151,	0xc19ebdfc,
-0x5979ae2d,	0x4dbac714,	0xfe524484,	0x113ace1c,
-0x00e8b78c,	0xdbfcb209,	0x578f12c8,	0xa0a9a9a4,
-0x75cbba05,	0x465b7ad3,	0xd7a0400c,	0x78c872fd,
-0x58e583ad,	0x89833f8a,	0x06682ef2,	0x2b171402,
-0x7dce156e,	0x03d0960a,	0xa49efcec,	0xe2571f5d,
-0x0e78dbcf,	0x344dbcb5,	0x742d5af8,	0x151b31b5,
-0xe7305747,	0x3e7ca578,	0x60fbc463,	0x850a9838,
-0x10006766,	0x70f8c433,	0x033bab69,	0xc4871830,
-0x41eac63f,	0x78886cad,	0x5631a48e,	0x01a4dbca,
-0xfe92aa1b,	0x0a0d0ea2,	0x7e74d7af,	0x9297e473,
-0x1c04148a,	0x6f60c9b8,	0xd2f3bac6,	0xd4664494,
-0xf5e57c3c,	0x4bf483a2,	0xa87a6675,	0xd4c0634d,
-0x90ec0d11,	0x9affdc7a,	0x31c0f085,	0xe70154b4,
-0x0f6042e1,	0xb0a44492,	0xd6978645,	0xb0d6bdd8,
-0x16a408ce,	0xbe208d45,	0xfde84e47,	0x357b93d5,
-0x197beb3f,	0xffdd29ff,	0x4a5895d6,	0x8354ce1c,
-0xb47f4fe8,	0xd162dfe5,	0x9805816d,	0xd6c09438,
-0x0f1db09b,	0x4a7fd1e0,	0x1e260e75,	0xcb1064c8,
-0xbe41a45a,	0x715047b5,	0x0a1ad754,	0x968231ee,
-0x4f156004,	0x6a37fee6,	0xab2d3034,	0x147ee014,
-0xdc7471b2,	0xa5f20a4e,	0xdc803518,	0x8adeba3e,
-0xb960d413,	0x51f60de9,	0x015914f4,	0xd32542b6,
-0x007a7f34,	0x96910cbe,	0x948e5d84,	0xb305ebc5,
-0x99d34cba,	0x30d334ae,	0xd38198fa,	0x14767c49,
-0x4c15d5b0,	0xf4371db4,	0xeef4cfbb,	0x4256b5d7,
-0x41ce6de0,	0x8840ba88,	0x99d0d63b,	0xfe90fb19,
-0x8e4ef36a,	0x728827f6,	0x0b676dad,	0x377239b5,
-0xff0c85a8,	0xd954058e,	0x04d26bbd,	0x9ea520ca,
-0x42c6f7a0,	0xe99386d4,	0xbd4f820f,	0x27b217bd,
-0xd2cbf0d3,	0x5a6ece4b,	0xed82c4bf,	0xb7d4c10c,
-0x9aa0e173,	0xb4d7721a,	0x990637ed,	0x58e2f40b,
-0x6cd2d564,	0x2d58e6aa,	0x1e3f5330,	0xd724d2dc,
-0xfca0c657,	0x68cd14bf,	0x6117e696,	0xe48c6c00,
-0x95c75bb2,	0x949a702e,	0x7823d834,	0xafb0c045,
-0xef4f6c0b,	0x5c4c00f1,	0xc0a7edc6,	0xe7397e19,
-0x8eaec8c3,	0x298d9212,	0x4afc4fa6,	0x24cca594,
-0x5b0345f8,	0xbde656d9,	0xb6a9199e,	0x6788166d,
-0xf6a9766a,	0x7d6efd02,	0xbe989743,	0x53db6a53,
-0x26acebc6,	0x0c661c7c,	0xba39c1ac,	0x46fe6a74,
-0x33743b7f,	0x60389f01,	0x26445dae,	0xd9e2dbbd,
-0x723821dc,	0x935a8568,	0x07d28911,	0x1003b007,
-0xffd0470d,	0x1c7ec08d,	0xab13ae7c,	0xa471a700,
-0x61af6580,	0xb2149237,	0xa68d4884,	0x96e29cb5,
-0x9ed0fea3,	0x7179142e,	0xbdc41838,	0x66508f94,
-0x3fc14db9,	0x3e4e989e,	0xfda40b42,	0x7d7e1e3c,
-0x809f23d2,	0x08ecc884,	0xab90e259,	0xab05613c,
-0x89b0fe97,	0x4ec6aef5,	0x64f19b7f,	0xa36addbb,
-0x4617a47a,	0x7fb68f44,	0xcf3a8187,	0x73bb8e77,
-0xa1f2e1d7,	0x71520c84,	0x0fa10c2e,	0x79657a56,
-0x61382ff3,	0xbcccf548,	0x9513c9a7,	0x3aa91723,
-0xd92154e1,	0x5f03c0eb,	0xb5091f85,	0xf19fa6c8,
-0x1c030671,	0x4e2aadcd,	0x862fe82d,	0x4dcfcbcc,
-0xc14d5269,	0x377d3c35,	0x01a87aa2,	0x577a58af,
-0xa6742bfe,	0xe04b391f,	0xb8002f20,	0xdf2b4ca2,
-0x64687c4d,	0x99a4bcd9,	0x332a2d33,	0xe231e1db,
-0xc9260a6e,	0xdf875589,	0x08a8b612,	0xfcb595ef,
-0x23f09500,	0x50e4db67,	0x861ec8e6,	0x07ea2473,
-0xff5d36a8,	0x4f27405c,	0xfb749fb2,	0x33e3137c,
-0x20ecc68e,	0x04599816,	0x5ef94e92,	0x636eed16,
-0x0b1ce1e2,	0x54cc3aa7,	0x6190f4a9,	0xb92359ec,
-0x947af351,	0x62278aa5,	0xc22d8f72,	0x9d72c80e,
-0x614a9754,	0x622fc50b,	0x007e2b67,	0x45407b6b,
-0x7a971c77,	0xc2af3a88,	0xa8859226,	0x652f92e4,
-0x0cbe851d,	0x0ddac8fc,	0x055a1563,	0x738e03dd,
-0x85815f4a,	0xce351842,	0x7735df1f,	0x49bf9d17,
-0x8969b9bb,	0x6b2478f6,	0x7d1f345a,	0xde84d7e2,
-0x7459831e,	0xdff84c3d,	0xcc2f10a4,	0x057859d5,
-0xbf05b6a9,	0x8cfd5040,	0x4903c653,	0xb9ceaacc,
-0x14a480f9,	0xe940e680,	0x62f32cb8,	0x6a3bf1e1,
-0x6e789199,	0x6b452cec,	0xd9f43312,	0xe25fbbb0,
-0xd2fc5565,	0x5e5c5c41,	0xa158ba32,	0xb1364cef,
-0x3bad4552,	0x2a37d087,	0x1cdb0454,	0x6fcaf84a,
-0xf37bf4af,	0xb243ab15,	0xc1bea3e5,	0x7f71223d,
-0xfcc0db87,	0x70ebe1cd,	0xa7186158,	0x4645a50f,
-0x4a72862b,	0x11fadd77,	0x62b6e6e0,	0xa08cb439,
-0xc97c8822,	0xae5329e9,	0x6894e381,	0xbc3fd08c,
-0x63c4c376,	0x778dd3fa,	0xf44c10f8,	0x9b46c123,
-0x8c773ca7,	0xe244e31e,	0xbc5b1d7d,	0xf08dae13,
-0x5a31b2cd,	0x21cae60f,	0x7cabcf9c,	0x3e0b6758,
-0x10501f82,	0xb97123f6,	0x34a748e2,	0x6bbed71f,
-0x79a492a0,	0xc6699b20,	0xff168c13,	0xe1d97f5d,
-0xbc6ae406,	0xb646b08a,	0x266cf921,	0xa871108b,
-0xbc8b60fe,	0x1ebfb166,	0x6cce08de,	0xb00034af,
-0x8a1a4f8b,	0x829fe92b,	0xa8e583e2,	0x303ed627,
-0x05a53ec5,	0xcedd09a1,	0xcdef97dc,	0xd8b1f6f0,
-0xaf15302f,	0x3e4ea367,	0x489107de,	0x5de1ddf3,
-0x7df7536f,	0xa896063e,	0xdc7eac2e,	0x03d61f3a,
-0xceb7cd2a,	0x67d394f3,	0xdd55740e,	0xcd9f0261,
-0xb464b758,	0x1faaedea,	0xbd38f64c,	0x5d19669d,
-0x1eed1a6e,	0x378896dd,	0xa12125db,	0xd60ca695,
-0x6e57a927,	0x8d4cfeac,	0x01287003,	0xefebdd07,
-0x0321b83b,	0x8dcff5ea,	0xb5cf9c9e,	0x5069e7bd,
-0xe825acd2,	0x2931b1d3,	0x6ad92693,	0xf9533335,
-0xd81e1459,	0x447a6f19,	0x95968cba,	0x792f32c2,
-0xa1d0c696,	0x50b2f01b,	0xf3a86b83,	0x6aec7b50,
-0x7c10a30b,	0x9ee89fdd,	0xdf1da1c3,	0x93008b66,
-0xc7338c3e,	0x3fc4a6f1,	0x2440db04,	0x5af4d472,
-0xd6a97ffb,	0x0ef0ad4e,	0xf7e3e539,	0x7e7a2a6c,
-0x923a5f2c,	0x1c92899f,	0x7b77c20b,	0x97dd2cb5,
-0x18f2de94,	0x44d7d456,	0x30b80309,	0xcfcd3805,
-0x82e30950,	0x1925303b,	0x454dc11b,	0xec6b221d,
-0x0f8bedf9,	0x13de4182,	0xae7d58ff,	0xc402c383,
-0x91f59409,	0x29d16bbe,	0x176c6829,	0x09480ba9,
-0xdfc9bdf6,	0x55fe11bb,	0x37651128,	0xfa4ee4d9,
-0xb4402d81,	0x5fd0c7db,	0x0a9fc656,	0x9ee57273,
-0x89d5e62b,	0x85c6d82c,	0xb6cd38ef,	0xfbc92d77,
-0xc603cf52,	0xfe078444,	0x79898470,	0x63a8cbc4,
-0xdd505b69,	0xa86109fe,	0x275abfbf,	0x53ca2c0f,
-0x8ee944fd,	0xc7bdc79a,	0x6d78fce1,	0xe2f881e1,
-0x7e2cd470,	0x5fee2589,	0x22bd7a0a,	0xc7bc30b6,
-0x0c7b245b,	0x622635f7,	0xa47af1ee,	0x441b7b18,
-0x8a7844b1,	0xffc68a9c,	0xcc184eed,	0x1ed181c1,
-0x209bc922,	0x95d3ae63,	0x85473c01,	0x5bfdee3f,
-0x9ac84123,	0x67eadd46,	0x04f59544,	0x59dee63d,
-0x8beec8d6,	0x8eb0fd0c,	0xe4b401c3,	0x28af87fd,
-0xf9e5d950,	0xd0dcd7f1,	0xa2d102fc,	0x7d760ac0,
-0xaf60f23e,	0xfe7f9cfd,	0x6c4e5569,	0xc48404c0,
-0x20f70db3,	0x5284047f,	0x84531666,	0x7211d68f,
-0x1d66212f,	0x26d2ff3c,	0x65bb8205,	0x5aac72de,
-0x0374ae7d,	0x9a19357a,	0x3a5a1b86,	0x08b46aca,
-0x165dffae,	0xbe5e6627,	0xf0bb4e4e,	0xf2ec9668,
-0xcedc0f0e,	0x1b83a79d,	0x740ab91c,	0x96de1333,
-0x87ecdf4b,	0x7a067222,	0xac3976f2,	0xd189d422,
-0x3df7e716,	0x38e628d8,	0xf8d5dfc6,	0x33318c3e,
-0x24a01bcd,	0x5c407809,	0x030f162c,	0xea348e7b,
-0x025af892,	0xfc5ce7d4,	0xf514e75c,	0x1b2897ad,
-0x8b273855,	0xc9325d60,	0x18bfbd7e,	0x5ab46176,
-0xafc21fd7,	0xd1a31ed1,	0x5affa61b,	0xc269dc17,
-0xd0a434b6,	0x239de3fa,	0x932a997c,	0x27d5ed2d,
-0x7c97e199,	0x95d2107c,	0xfd5f0c2b,	0xe6ddd551,
-0x3c83d4db,	0xe9fef7bf,	0x7100d40f,	0xff2e2bfe,
-0x6207c328,	0x64fe3eed,	0x8564bad1,	0x8a22a5d5,
-0x2680e0bc,	0xef96cfa9,	0x97fe6f16,	0xf4763890,
-0xc5f419e0,	0x6d134077,	0xa1039662,	0x983b172c,
-0xb1658c3b,	0xc34a9db4,	0xd28139f7,	0x02492e22,
-0x96482c4f,	0x0bbe5c32,	0xdcbad6ea,	0x5ac0c984,
-0x35c83ab7,	0x28a02508,	0x77d2b173,	0xfec4fa49,
-0x98b07b39,	0xbc9de59a,	0x807c647d,	0x4ca3f1dc,
-0xd7ea0f95,	0x7068356a,	0x7df91f74,	0x5d133a96,
-0xa507a88b,	0xc38c7450,	0x5d97f8d8,	0x78d525d3,
-0xea37f381,	0xc82b6cb5,	0x70561a14,	0xcb1a38ff,
-0xa017c85b,	0x8fddaf7a,	0x359316ed,	0x1d350446,
-0x23858b98,	0xd72ac50a,	0x93d318fc,	0x121fda88,
-0x4cf0a4c1,	0x985b7f8d,	0x71be788b,	0xa4501ad4,
-0x2442e93e,	0x8f41d88d,	0x13e9ddc0,	0x3d255b28,
-0x41638767,	0x845386be,	0x101d6adb,	0x6179d046,
-0xf819653c,	0x221fc235,	0xc63c5658,	0x2f3ed4a1,
-0x18c39cc4,	0x1dcdf0a9,	0x4a835ed0,	0x5af69393,
-0xaff99ee0,	0xd936f5f6,	0x50f968da,	0xd2d790a0,
-0xafc41e2f,	0xa859fc9d,	0xf62f56cc,	0x4b0e57fe,
-0x4859c419,	0x099e051d,	0xe943e723,	0x6bb74299,
-0xac3dd8b8,	0x4649094a,	0x02c7379d,	0xfd9e13c6,
-0xd09fd22d,	0xf55b775e,	0x30506e94,	0x1f93f43c,
-0xb5baf9be,	0x8d6c3037,	0x2fe87ddb,	0x50f5a4b7,
-0x52713058,	0xc3b19388,	0x3c368001,	0xd0c5e0e9,
-0xd0966697,	0x9974617e,	0x2aa4d175,	0xa0f26861,
-0xa901f0a0,	0xbe44c6aa,	0xc59cc8d3,	0xc91c1978,
-0x05ba7521,	0xc01b5c45,	0xbd77ab62,	0xdfef7c7c,
-0x6713919d,	0xd8e9e2ab,	0x7b088c0e,	0xa4721b34,
-0x661d208a,	0xaddcab29,	0x87085e38,	0xb33df647,
-0xcc8e771b,	0x66fca58e,	0x1be5440d,	0x44094a70,
-0x924749f1,	0x14e19530,	0xb8b4d2eb,	0x725cbb9c,
-0xc03e0524,	0xa303eed1,	0x5701587c,	0xd4b73636,
-0xe3be0160,	0xffc6d34c,	0x3e88a7ba,	0xdad7b9c8,
-0x94277aa8,	0xe954b95b,	0xdeb92cd9,	0xaa638342,
-0x94d9b34c,	0xd71618ac,	0xc87934bd,	0xe96101d1,
-0x55d1976c,	0x471c8505,	0x7a36d839,	0x5d62a9ee,
-0xf3c54a8a,	0xa2be15d9,	0x244087c9,	0x042c8037,
-0x23224689,	0x281c5d73,	0x2139ecfc,	0xffb8bc8a,
-0x834fdd11,	0x9cd5a5bd,	0xa3368319,	0x7e5bef0c,
-0x4ae2dbda,	0x86d90089,	0x6675dfce,	0x48876262,
-0xcec72538,	0x11dc5c80,	0x86a730f9,	0x313565c9,
-0xe3e5be11,	0x106d7cce,	0x752b8be2,	0x3d00a5bc,
-0xe6f70e95,	0x44447ac8,	0x600df30c,	0x8335ac3b,
-0x8816ddee,	0x700982fe,	0xee495741,	0x48c7e81c,
-0xa3d55da2,	0xb0172982,	0x70ab2158,	0xd4460621,
-0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,	0xa8454763,
-0x70877bb6,	0x66005c97,	0xaf292c06,	0x7b843db1,
-0xf343b59b,	0x25cdc7b5,	0xa41da617,	0x9e9d895e,
-0xc936f475,	0x7270925a,	0x30024230,	0x8e72f53d,
-0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,	0xfc18a2a3,
-0xaf377cc1,	0xbff09a78,	0x4b4e0814,	0x95a0b2c1,
-0x270398de,	0x201fca94,	0x2a032a4f,	0x131542b4,
-0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,	0xa814ddc9,
-0xa3b3a991,	0x17ee60c2,	0x852c0b8d,	0x11e5853a,
-0x762002a7,	0x92c5311d,	0x0d4bf7e1,	0xfffec870,
-0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,	0x0111a772,
-0x9808e780,	0x29c336e8,	0xe9bc05df,	0x5bedde11,
-0x945565af,	0xaff808fe,	0x87e3423d,	0x4de6f98f,
-0x93b4adef,	0xbf704fa4,	0x09120e91,	0xd54f3692,
-0xdf8eab1e,	0xfabbf59c,	0xe74318be,	0xaab87ffc,
-0x29fa791c,	0xe3915552,	0xa652cb9b,	0xa1252e74,
-0xb35b723b,	0x542aa28b,	0x12fcc5b0,	0x3941f962,
-0x82bcc6cc,	0x47b11974,	0xb821611f,	0x78b34250,
-0xf1be5659,	0x561b9e61,	0x6f3bd501,	0x584e6f5c,
-0xd54ed547,	0xacebcd21,	0x7b5ff816,	0xb64ad233,
-0x9f2f330d,	0x69fb1ece,	0xac8710dd,	0x58dc6c60,
-0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,	0xebc0ce9d,
-0xa733274f,	0x884d9b55,	0x42b08b63,	0xafa54a74,
-0x1c7ccf64,	0x93a20191,	0xaaa3132e,	0xc69831d1,
-0x54634889,	0xfbfe3efc,	0xd3cf68d4,	0x302e3117,
-0xf5693131,	0xc3ce8c6c,	0x1f03cd89,	0x6243334c,
-0xf16bc80f,	0xdca5f130,	0xcb2cd956,	0x4c1bb421,
-0xe8de533c,	0x7f86703a,	0x29aa897e,	0xdd54acad,
-0x76b2f2ae,	0x7ef82b71,	0x2e30970b,	0xba402597,
-0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,	0x7f9efd1c,
-0x2363d147,	0x5327289a,	0xe89229f3,	0xd63a535c,
-0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,	0x26b6edfb,
-0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,	0x6d65db4c,
-0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,	0xe20e6dbb,
-0x8488a45f,	0x8ebc2932,	0xd4767316,	0x3e8c4b8a,
-0xbab7402c,	0xfc1e217e,	0xe5c5bf82,	0x6928fe2e,
-0xc88528e9,	0x4b2e4e8f,	0xdd938b86,	0x0c964f98,
-0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,	0x197d005a,
-0x4d40b3b3,	0xcf203155,	0x0d2fa621,	0x752d2c58,
-0xb12bac12,	0x1e7e8c23,	0x94215d54,	0x9854a71c,
-0x4de63c64,	0x7a012529,	0x9c171f8d,	0x9e71def7,
-0x3bd17d50,	0x11f175d9,	0xec78abf3,	0x7b529eee,
-0xd3a69fc3,	0x5b718676,	0x58214d29,	0xa8bd2c34,
-0x41ea00ab,	0xa03f64d6,	0x4ee342b0,	0x32b1e444,
-0x1c1801a4,	0xc8424702,	0x334a7e35,	0x50cf1543,
-0x3b22b495,	0x88683776,	0x8e2e0154,	0x6155c033,
-0x4e2fa6ac,	0x42ace700,	0x8d64f97c,	0xaf9ced17,
-0xb2a5cb92,	0xa558582d,	0x88705de7,	0x9e528d59,
-0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,	0x2722bfa2,
-0x10462123,	0x30080f7d,	0xb346cd81,	0x0049c396,

cpu/intel/model_1067x/microcode-m101067660F.h

diff --git a/cpu/intel/model_1067x/microcode-m101067660F.h b/cpu/intel/model_1067x/microcode-m101067660F.h
deleted file mode 100644
index 79ddd9f..0000000
--- a/cpu/intel/model_1067x/microcode-m101067660F.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m101067660F.inc  */
-0x00000001,	0x0000060f,	0x09292010,	0x00010676,
-0x8fe1a237,	0x00000001,	0x00000010,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x0000060f,
-0x00000035,	0x2e000000,	0x20100928,	0x00000301,
-0x00000001,	0x00010676,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xcd5c7635,	0x1603940d,	0x976e7e8b,	0x02bac8d1,
-0x9be45039,	0x69a22250,	0x76d8821c,	0x3fefb30d,
-0x170ce7c7,	0xd727c705,	0x019b1ba5,	0xe0414a29,
-0x57d45458,	0x26a8a411,	0x9faad966,	0x095ec8b0,
-0x083a7c2a,	0x17cfc70f,	0x3c8e78a8,	0xce18c419,
-0x5f2ddeb7,	0xc9c95d71,	0x437a5116,	0xe0253ad0,
-0xec78db42,	0x681e436f,	0x7fd028bb,	0x1149a501,
-0x0bdf0d05,	0xc2321514,	0xd6866cd8,	0x64942685,
-0x21e0276b,	0x0817a288,	0x09138669,	0x792985dc,
-0xbd60d6aa,	0xfbf902ec,	0x43fee69d,	0x5c5823c0,
-0x9dca1fe6,	0xb528b0c5,	0x22fd29ab,	0xac4fe251,
-0x77207813,	0x0637a1f9,	0x16bfcf73,	0x80497f6b,
-0xe5bca939,	0x1539fa1a,	0x66607fea,	0x2276c06f,
-0xd003229e,	0x3622fda7,	0x18d0b8af,	0x9f399760,
-0x3ac6387b,	0x6c7148fa,	0xfaf4df9f,	0x965db840,
-0x7c142542,	0x7b805f4c,	0x3f2002a3,	0x061399ce,
-0x2f1a03c4,	0x7f1c7616,	0xb2f9ab42,	0x4e6a92a2,
-0xb44b96d6,	0xe1167017,	0xec4b2fb3,	0xa15376be,
-0x00000011,	0x0788335a,	0x28facca9,	0xbf2e27da,
-0xebd0c3e5,	0x6e2bf3d3,	0x1291c903,	0x1b6f078f,
-0xb9fa90d0,	0x08dafe1d,	0xd3597151,	0xc19ebdfc,
-0x5979ae2d,	0x4dbac714,	0xfe524484,	0x113ace1c,
-0x00e8b78c,	0xdbfcb209,	0x578f12c8,	0xa0a9a9a4,
-0x75cbba05,	0x465b7ad3,	0xd7a0400c,	0x78c872fd,
-0x58e583ad,	0x89833f8a,	0x06682ef2,	0x2b171402,
-0x7dce156e,	0x03d0960a,	0xa49efcec,	0xe2571f5d,
-0x0e78dbcf,	0x344dbcb5,	0x742d5af8,	0x151b31b5,
-0xe7305747,	0x3e7ca578,	0x60fbc463,	0x850a9838,
-0x10006766,	0x70f8c433,	0x033bab69,	0xc4871830,
-0x41eac63f,	0x78886cad,	0x5631a48e,	0x01a4dbca,
-0xfe92aa1b,	0x0a0d0ea2,	0x7e74d7af,	0x9297e473,
-0x1c04148a,	0x6f60c9b8,	0xd2f3bac6,	0xd4664494,
-0xf5e57c3c,	0x4bf483a2,	0xa87a6675,	0xd4c0634d,
-0x90ec0d11,	0x9affdc7a,	0x31c0f085,	0xe70154b4,
-0x0f6042e1,	0xb0a44492,	0xd6978645,	0xb0d6bdd8,
-0x16a408ce,	0xbe208d45,	0xfde84e47,	0x357b93d5,
-0x197beb3f,	0xffdd29ff,	0x4a5895d6,	0x8354ce1c,
-0xb47f4fe8,	0xd162dfe5,	0x9805816d,	0xd6c09438,
-0x0f1db09b,	0x4a7fd1e0,	0x1e260e75,	0xcb1064c8,
-0xbe41a45a,	0x715047b5,	0x0a1ad754,	0x968231ee,
-0x4f156004,	0x6a37fee6,	0xab2d3034,	0x147ee014,
-0xdc7471b2,	0xa5f20a4e,	0xdc803518,	0x8adeba3e,
-0xb960d413,	0x51f60de9,	0x015914f4,	0xd32542b6,
-0x007a7f34,	0x96910cbe,	0x948e5d84,	0xb305ebc5,
-0x99d34cba,	0x30d334ae,	0xd38198fa,	0x14767c49,
-0x4c15d5b0,	0xf4371db4,	0xeef4cfbb,	0x4256b5d7,
-0x41ce6de0,	0x8840ba88,	0x99d0d63b,	0xfe90fb19,
-0x8e4ef36a,	0x728827f6,	0x0b676dad,	0x377239b5,
-0xff0c85a8,	0xd954058e,	0x04d26bbd,	0x9ea520ca,
-0x42c6f7a0,	0xe99386d4,	0xbd4f820f,	0x27b217bd,
-0xd2cbf0d3,	0x5a6ece4b,	0xed82c4bf,	0xb7d4c10c,
-0x9aa0e173,	0xb4d7721a,	0x990637ed,	0x58e2f40b,
-0x6cd2d564,	0x2d58e6aa,	0x1e3f5330,	0xd724d2dc,
-0xfca0c657,	0x68cd14bf,	0x6117e696,	0xe48c6c00,
-0x95c75bb2,	0x949a702e,	0x7823d834,	0xafb0c045,
-0xef4f6c0b,	0x5c4c00f1,	0xc0a7edc6,	0xe7397e19,
-0x8eaec8c3,	0x298d9212,	0x4afc4fa6,	0x24cca594,
-0x5b0345f8,	0xbde656d9,	0xb6a9199e,	0x6788166d,
-0xf6a9766a,	0x7d6efd02,	0xbe989743,	0x53db6a53,
-0x26acebc6,	0x0c661c7c,	0xba39c1ac,	0x46fe6a74,
-0x33743b7f,	0x60389f01,	0x26445dae,	0xd9e2dbbd,
-0x723821dc,	0x935a8568,	0x07d28911,	0x1003b007,
-0xffd0470d,	0x1c7ec08d,	0xab13ae7c,	0xa471a700,
-0x61af6580,	0xb2149237,	0xa68d4884,	0x96e29cb5,
-0x9ed0fea3,	0x7179142e,	0xbdc41838,	0x66508f94,
-0x3fc14db9,	0x3e4e989e,	0xfda40b42,	0x7d7e1e3c,
-0x809f23d2,	0x08ecc884,	0xab90e259,	0xab05613c,
-0x89b0fe97,	0x4ec6aef5,	0x64f19b7f,	0xa36addbb,
-0x4617a47a,	0x7fb68f44,	0xcf3a8187,	0x73bb8e77,
-0xa1f2e1d7,	0x71520c84,	0x0fa10c2e,	0x79657a56,
-0x61382ff3,	0xbcccf548,	0x9513c9a7,	0x3aa91723,
-0xd92154e1,	0x5f03c0eb,	0xb5091f85,	0xf19fa6c8,
-0x1c030671,	0x4e2aadcd,	0x862fe82d,	0x4dcfcbcc,
-0xc14d5269,	0x377d3c35,	0x01a87aa2,	0x577a58af,
-0xa6742bfe,	0xe04b391f,	0xb8002f20,	0xdf2b4ca2,
-0x64687c4d,	0x99a4bcd9,	0x332a2d33,	0xe231e1db,
-0xc9260a6e,	0xdf875589,	0x08a8b612,	0xfcb595ef,
-0x23f09500,	0x50e4db67,	0x861ec8e6,	0x07ea2473,
-0xff5d36a8,	0x4f27405c,	0xfb749fb2,	0x33e3137c,
-0x20ecc68e,	0x04599816,	0x5ef94e92,	0x636eed16,
-0x0b1ce1e2,	0x54cc3aa7,	0x6190f4a9,	0xb92359ec,
-0x947af351,	0x62278aa5,	0xc22d8f72,	0x9d72c80e,
-0x614a9754,	0x622fc50b,	0x007e2b67,	0x45407b6b,
-0x7a971c77,	0xc2af3a88,	0xa8859226,	0x652f92e4,
-0x0cbe851d,	0x0ddac8fc,	0x055a1563,	0x738e03dd,
-0x85815f4a,	0xce351842,	0x7735df1f,	0x49bf9d17,
-0x8969b9bb,	0x6b2478f6,	0x7d1f345a,	0xde84d7e2,
-0x7459831e,	0xdff84c3d,	0xcc2f10a4,	0x057859d5,
-0xbf05b6a9,	0x8cfd5040,	0x4903c653,	0xb9ceaacc,
-0x14a480f9,	0xe940e680,	0x62f32cb8,	0x6a3bf1e1,
-0x6e789199,	0x6b452cec,	0xd9f43312,	0xe25fbbb0,
-0xd2fc5565,	0x5e5c5c41,	0xa158ba32,	0xb1364cef,
-0x3bad4552,	0x2a37d087,	0x1cdb0454,	0x6fcaf84a,
-0xf37bf4af,	0xb243ab15,	0xc1bea3e5,	0x7f71223d,
-0xfcc0db87,	0x70ebe1cd,	0xa7186158,	0x4645a50f,
-0x4a72862b,	0x11fadd77,	0x62b6e6e0,	0xa08cb439,
-0xc97c8822,	0xae5329e9,	0x6894e381,	0xbc3fd08c,
-0x63c4c376,	0x778dd3fa,	0xf44c10f8,	0x9b46c123,
-0x8c773ca7,	0xe244e31e,	0xbc5b1d7d,	0xf08dae13,
-0x5a31b2cd,	0x21cae60f,	0x7cabcf9c,	0x3e0b6758,
-0x10501f82,	0xb97123f6,	0x34a748e2,	0x6bbed71f,
-0x79a492a0,	0xc6699b20,	0xff168c13,	0xe1d97f5d,
-0xbc6ae406,	0xb646b08a,	0x266cf921,	0xa871108b,
-0xbc8b60fe,	0x1ebfb166,	0x6cce08de,	0xb00034af,
-0x8a1a4f8b,	0x829fe92b,	0xa8e583e2,	0x303ed627,
-0x05a53ec5,	0xcedd09a1,	0xcdef97dc,	0xd8b1f6f0,
-0xaf15302f,	0x3e4ea367,	0x489107de,	0x5de1ddf3,
-0x7df7536f,	0xa896063e,	0xdc7eac2e,	0x03d61f3a,
-0xceb7cd2a,	0x67d394f3,	0xdd55740e,	0xcd9f0261,
-0xb464b758,	0x1faaedea,	0xbd38f64c,	0x5d19669d,
-0x1eed1a6e,	0x378896dd,	0xa12125db,	0xd60ca695,
-0x6e57a927,	0x8d4cfeac,	0x01287003,	0xefebdd07,
-0x0321b83b,	0x8dcff5ea,	0xb5cf9c9e,	0x5069e7bd,
-0xe825acd2,	0x2931b1d3,	0x6ad92693,	0xf9533335,
-0xd81e1459,	0x447a6f19,	0x95968cba,	0x792f32c2,
-0xa1d0c696,	0x50b2f01b,	0xf3a86b83,	0x6aec7b50,
-0x7c10a30b,	0x9ee89fdd,	0xdf1da1c3,	0x93008b66,
-0xc7338c3e,	0x3fc4a6f1,	0x2440db04,	0x5af4d472,
-0xd6a97ffb,	0x0ef0ad4e,	0xf7e3e539,	0x7e7a2a6c,
-0x923a5f2c,	0x1c92899f,	0x7b77c20b,	0x97dd2cb5,
-0x18f2de94,	0x44d7d456,	0x30b80309,	0xcfcd3805,
-0x82e30950,	0x1925303b,	0x454dc11b,	0xec6b221d,
-0x0f8bedf9,	0x13de4182,	0xae7d58ff,	0xc402c383,
-0x91f59409,	0x29d16bbe,	0x176c6829,	0x09480ba9,
-0xdfc9bdf6,	0x55fe11bb,	0x37651128,	0xfa4ee4d9,
-0xb4402d81,	0x5fd0c7db,	0x0a9fc656,	0x9ee57273,
-0x89d5e62b,	0x85c6d82c,	0xb6cd38ef,	0xfbc92d77,
-0xc603cf52,	0xfe078444,	0x79898470,	0x63a8cbc4,
-0xdd505b69,	0xa86109fe,	0x275abfbf,	0x53ca2c0f,
-0x8ee944fd,	0xc7bdc79a,	0x6d78fce1,	0xe2f881e1,
-0x7e2cd470,	0x5fee2589,	0x22bd7a0a,	0xc7bc30b6,
-0x0c7b245b,	0x622635f7,	0xa47af1ee,	0x441b7b18,
-0x8a7844b1,	0xffc68a9c,	0xcc184eed,	0x1ed181c1,
-0x209bc922,	0x95d3ae63,	0x85473c01,	0x5bfdee3f,
-0x9ac84123,	0x67eadd46,	0x04f59544,	0x59dee63d,
-0x8beec8d6,	0x8eb0fd0c,	0xe4b401c3,	0x28af87fd,
-0xf9e5d950,	0xd0dcd7f1,	0xa2d102fc,	0x7d760ac0,
-0xaf60f23e,	0xfe7f9cfd,	0x6c4e5569,	0xc48404c0,
-0x20f70db3,	0x5284047f,	0x84531666,	0x7211d68f,
-0x1d66212f,	0x26d2ff3c,	0x65bb8205,	0x5aac72de,
-0x0374ae7d,	0x9a19357a,	0x3a5a1b86,	0x08b46aca,
-0x165dffae,	0xbe5e6627,	0xf0bb4e4e,	0xf2ec9668,
-0xcedc0f0e,	0x1b83a79d,	0x740ab91c,	0x96de1333,
-0x87ecdf4b,	0x7a067222,	0xac3976f2,	0xd189d422,
-0x3df7e716,	0x38e628d8,	0xf8d5dfc6,	0x33318c3e,
-0x24a01bcd,	0x5c407809,	0x030f162c,	0xea348e7b,
-0x025af892,	0xfc5ce7d4,	0xf514e75c,	0x1b2897ad,
-0x8b273855,	0xc9325d60,	0x18bfbd7e,	0x5ab46176,
-0xafc21fd7,	0xd1a31ed1,	0x5affa61b,	0xc269dc17,
-0xd0a434b6,	0x239de3fa,	0x932a997c,	0x27d5ed2d,
-0x7c97e199,	0x95d2107c,	0xfd5f0c2b,	0xe6ddd551,
-0x3c83d4db,	0xe9fef7bf,	0x7100d40f,	0xff2e2bfe,
-0x6207c328,	0x64fe3eed,	0x8564bad1,	0x8a22a5d5,
-0x2680e0bc,	0xef96cfa9,	0x97fe6f16,	0xf4763890,
-0xc5f419e0,	0x6d134077,	0xa1039662,	0x983b172c,
-0xb1658c3b,	0xc34a9db4,	0xd28139f7,	0x02492e22,
-0x96482c4f,	0x0bbe5c32,	0xdcbad6ea,	0x5ac0c984,
-0x35c83ab7,	0x28a02508,	0x77d2b173,	0xfec4fa49,
-0x98b07b39,	0xbc9de59a,	0x807c647d,	0x4ca3f1dc,
-0xd7ea0f95,	0x7068356a,	0x7df91f74,	0x5d133a96,
-0xa507a88b,	0xc38c7450,	0x5d97f8d8,	0x78d525d3,
-0xea37f381,	0xc82b6cb5,	0x70561a14,	0xcb1a38ff,
-0xa017c85b,	0x8fddaf7a,	0x359316ed,	0x1d350446,
-0x23858b98,	0xd72ac50a,	0x93d318fc,	0x121fda88,
-0x4cf0a4c1,	0x985b7f8d,	0x71be788b,	0xa4501ad4,
-0x2442e93e,	0x8f41d88d,	0x13e9ddc0,	0x3d255b28,
-0x41638767,	0x845386be,	0x101d6adb,	0x6179d046,
-0xf819653c,	0x221fc235,	0xc63c5658,	0x2f3ed4a1,
-0x18c39cc4,	0x1dcdf0a9,	0x4a835ed0,	0x5af69393,
-0xaff99ee0,	0xd936f5f6,	0x50f968da,	0xd2d790a0,
-0xafc41e2f,	0xa859fc9d,	0xf62f56cc,	0x4b0e57fe,
-0x4859c419,	0x099e051d,	0xe943e723,	0x6bb74299,
-0xac3dd8b8,	0x4649094a,	0x02c7379d,	0xfd9e13c6,
-0xd09fd22d,	0xf55b775e,	0x30506e94,	0x1f93f43c,
-0xb5baf9be,	0x8d6c3037,	0x2fe87ddb,	0x50f5a4b7,
-0x52713058,	0xc3b19388,	0x3c368001,	0xd0c5e0e9,
-0xd0966697,	0x9974617e,	0x2aa4d175,	0xa0f26861,
-0xa901f0a0,	0xbe44c6aa,	0xc59cc8d3,	0xc91c1978,
-0x05ba7521,	0xc01b5c45,	0xbd77ab62,	0xdfef7c7c,
-0x6713919d,	0xd8e9e2ab,	0x7b088c0e,	0xa4721b34,
-0x661d208a,	0xaddcab29,	0x87085e38,	0xb33df647,
-0xcc8e771b,	0x66fca58e,	0x1be5440d,	0x44094a70,
-0x924749f1,	0x14e19530,	0xb8b4d2eb,	0x725cbb9c,
-0xc03e0524,	0xa303eed1,	0x5701587c,	0xd4b73636,
-0xe3be0160,	0xffc6d34c,	0x3e88a7ba,	0xdad7b9c8,
-0x94277aa8,	0xe954b95b,	0xdeb92cd9,	0xaa638342,
-0x94d9b34c,	0xd71618ac,	0xc87934bd,	0xe96101d1,
-0x55d1976c,	0x471c8505,	0x7a36d839,	0x5d62a9ee,
-0xf3c54a8a,	0xa2be15d9,	0x244087c9,	0x042c8037,
-0x23224689,	0x281c5d73,	0x2139ecfc,	0xffb8bc8a,
-0x834fdd11,	0x9cd5a5bd,	0xa3368319,	0x7e5bef0c,
-0x4ae2dbda,	0x86d90089,	0x6675dfce,	0x48876262,
-0xcec72538,	0x11dc5c80,	0x86a730f9,	0x313565c9,
-0xe3e5be11,	0x106d7cce,	0x752b8be2,	0x3d00a5bc,
-0xe6f70e95,	0x44447ac8,	0x600df30c,	0x8335ac3b,
-0x8816ddee,	0x700982fe,	0xee495741,	0x48c7e81c,
-0xa3d55da2,	0xb0172982,	0x70ab2158,	0xd4460621,
-0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,	0xa8454763,
-0x70877bb6,	0x66005c97,	0xaf292c06,	0x7b843db1,
-0xf343b59b,	0x25cdc7b5,	0xa41da617,	0x9e9d895e,
-0xc936f475,	0x7270925a,	0x30024230,	0x8e72f53d,
-0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,	0xfc18a2a3,
-0xaf377cc1,	0xbff09a78,	0x4b4e0814,	0x95a0b2c1,
-0x270398de,	0x201fca94,	0x2a032a4f,	0x131542b4,
-0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,	0xa814ddc9,
-0xa3b3a991,	0x17ee60c2,	0x852c0b8d,	0x11e5853a,
-0x762002a7,	0x92c5311d,	0x0d4bf7e1,	0xfffec870,
-0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,	0x0111a772,
-0x9808e780,	0x29c336e8,	0xe9bc05df,	0x5bedde11,
-0x945565af,	0xaff808fe,	0x87e3423d,	0x4de6f98f,
-0x93b4adef,	0xbf704fa4,	0x09120e91,	0xd54f3692,
-0xdf8eab1e,	0xfabbf59c,	0xe74318be,	0xaab87ffc,
-0x29fa791c,	0xe3915552,	0xa652cb9b,	0xa1252e74,
-0xb35b723b,	0x542aa28b,	0x12fcc5b0,	0x3941f962,
-0x82bcc6cc,	0x47b11974,	0xb821611f,	0x78b34250,
-0xf1be5659,	0x561b9e61,	0x6f3bd501,	0x584e6f5c,
-0xd54ed547,	0xacebcd21,	0x7b5ff816,	0xb64ad233,
-0x9f2f330d,	0x69fb1ece,	0xac8710dd,	0x58dc6c60,
-0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,	0xebc0ce9d,
-0xa733274f,	0x884d9b55,	0x42b08b63,	0xafa54a74,
-0x1c7ccf64,	0x93a20191,	0xaaa3132e,	0xc69831d1,
-0x54634889,	0xfbfe3efc,	0xd3cf68d4,	0x302e3117,
-0xf5693131,	0xc3ce8c6c,	0x1f03cd89,	0x6243334c,
-0xf16bc80f,	0xdca5f130,	0xcb2cd956,	0x4c1bb421,
-0xe8de533c,	0x7f86703a,	0x29aa897e,	0xdd54acad,
-0x76b2f2ae,	0x7ef82b71,	0x2e30970b,	0xba402597,
-0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,	0x7f9efd1c,
-0x2363d147,	0x5327289a,	0xe89229f3,	0xd63a535c,
-0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,	0x26b6edfb,
-0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,	0x6d65db4c,
-0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,	0xe20e6dbb,
-0x8488a45f,	0x8ebc2932,	0xd4767316,	0x3e8c4b8a,
-0xbab7402c,	0xfc1e217e,	0xe5c5bf82,	0x6928fe2e,
-0xc88528e9,	0x4b2e4e8f,	0xdd938b86,	0x0c964f98,
-0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,	0x197d005a,
-0x4d40b3b3,	0xcf203155,	0x0d2fa621,	0x752d2c58,
-0xb12bac12,	0x1e7e8c23,	0x94215d54,	0x9854a71c,
-0x4de63c64,	0x7a012529,	0x9c171f8d,	0x9e71def7,
-0x3bd17d50,	0x11f175d9,	0xec78abf3,	0x7b529eee,
-0xd3a69fc3,	0x5b718676,	0x58214d29,	0xa8bd2c34,
-0x41ea00ab,	0xa03f64d6,	0x4ee342b0,	0x32b1e444,
-0x1c1801a4,	0xc8424702,	0x334a7e35,	0x50cf1543,
-0x3b22b495,	0x88683776,	0x8e2e0154,	0x6155c033,
-0x4e2fa6ac,	0x42ace700,	0x8d64f97c,	0xaf9ced17,
-0xb2a5cb92,	0xa558582d,	0x88705de7,	0x9e528d59,
-0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,	0x2722bfa2,
-0x10462123,	0x30080f7d,	0xb346cd81,	0x0049c396,

cpu/intel/model_1067x/microcode-m101067770A.h

diff --git a/cpu/intel/model_1067x/microcode-m101067770A.h b/cpu/intel/model_1067x/microcode-m101067770A.h
deleted file mode 100644
index 3410e1e..0000000
--- a/cpu/intel/model_1067x/microcode-m101067770A.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m101067770A.inc  */
-0x00000001,	0x0000070a,	0x09292010,	0x00010677,
-0xf3710db6,	0x00000001,	0x00000010,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x0000070a,
-0x00000037,	0x2e000000,	0x20100928,	0x00000311,
-0x00000001,	0x00010677,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x40d339a2,	0x477095ac,	0x6836b4dc,	0x5e2164f8,
-0xfd9f938a,	0x9ee33c70,	0xcb87d909,	0x103a6221,
-0x170ce7c7,	0xd727c705,	0x019b1ba5,	0xe0414a29,
-0x57d45458,	0x26a8a411,	0x9faad966,	0x095ec8b0,
-0x083a7c2a,	0x17cfc70f,	0x3c8e78a8,	0xce18c419,
-0x5f2ddeb7,	0xc9c95d71,	0x437a5116,	0xe0253ad0,
-0xec78db42,	0x681e436f,	0x7fd028bb,	0x1149a501,
-0x0bdf0d05,	0xc2321514,	0xd6866cd8,	0x64942685,
-0x21e0276b,	0x0817a288,	0x09138669,	0x792985dc,
-0xbd60d6aa,	0xfbf902ec,	0x43fee69d,	0x5c5823c0,
-0x9dca1fe6,	0xb528b0c5,	0x22fd29ab,	0xac4fe251,
-0x77207813,	0x0637a1f9,	0x16bfcf73,	0x80497f6b,
-0xe5bca939,	0x1539fa1a,	0x66607fea,	0x2276c06f,
-0xd003229e,	0x3622fda7,	0x18d0b8af,	0x9f399760,
-0x3ac6387b,	0x6c7148fa,	0xfaf4df9f,	0x965db840,
-0x7c142542,	0x7b805f4c,	0x3f2002a3,	0x061399ce,
-0x2f1a03c4,	0x7f1c7616,	0xb2f9ab42,	0x4e6a92a2,
-0xb44b96d6,	0xe1167017,	0xec4b2fb3,	0xa15376be,
-0x00000011,	0xe2355af5,	0x8cc87628,	0xed9c28fd,
-0x1cac9323,	0x3369ab9d,	0x756f9a17,	0x90d875fb,
-0xa47afd0f,	0xe64ed3cc,	0xe215e87d,	0x301a6751,
-0xaff95ebf,	0xd323ca03,	0x2e878a9d,	0x23a9258c,
-0x797ab489,	0xe4847739,	0x58c6b748,	0x75fd1346,
-0x637519d6,	0xc825cc7c,	0xb2da5bab,	0x241e3be7,
-0x511afae2,	0xb7b955be,	0x0e73c4a9,	0xfed9aa70,
-0x74fdae6c,	0x1133f86f,	0xf5c61c8a,	0x1b35b640,
-0x8eec9167,	0x0a8ef403,	0x058bbbcb,	0xd5ff7ba0,
-0x18dba343,	0x776e3aad,	0x15006574,	0xd938d208,
-0xa9c5b8bc,	0x68985e44,	0xa3ef33f2,	0x8671ac1e,
-0x8c57f56e,	0xa01ba09d,	0x36050de3,	0xbc6f8915,
-0x3b954e86,	0x592bed80,	0x4830a6f7,	0x97547228,
-0xc0b3e88f,	0xcc3ebdcc,	0xe3c36916,	0x3ba52dd3,
-0x7a3cebf0,	0x480e39ad,	0x9b673580,	0x435eacd9,
-0x59fb03d7,	0x185bbf24,	0x3b40850f,	0x041c72f5,
-0x142193d6,	0x7be05d82,	0xa9860e2e,	0x39e2aa0e,
-0x7a8276d2,	0x1bdbaaa5,	0x8126e173,	0x3eaab2fd,
-0xef42ae20,	0xc15f6a31,	0x0f05b847,	0x5487ef89,
-0x16cab3c9,	0x01ce00eb,	0x43e16f8f,	0x5dd3fde3,
-0x36989742,	0x564954d2,	0xc83cf25d,	0x39132302,
-0x9eede9cc,	0x1a3ba29d,	0xa412eced,	0x8492edc9,
-0xa6ff4269,	0x3e15b481,	0x1f3fa415,	0xef072d89,
-0x42631c97,	0x1e1a7049,	0xd4a5252d,	0xe0c373e0,
-0x4652e48f,	0xc01f3657,	0x02c4968f,	0x662d2859,
-0x8a8b5b30,	0x773cc0f2,	0x3ffb18e9,	0xbd39a58d,
-0x89bab0cf,	0xe92bbe0e,	0xb77ccf64,	0xe4a62af5,
-0x1b2120b0,	0x06e8ec66,	0xdde12cf5,	0x6fee5409,
-0x4e8627b4,	0xe33f09ed,	0x7546ef23,	0x073c5e65,
-0x435fc24b,	0x129a1951,	0xbbf86dda,	0xf7afa0c9,
-0xa3c7ca1f,	0x3549fd92,	0xafe6967e,	0xf87ecd7e,
-0xcdb9a0db,	0xb68fb839,	0xcddfdab7,	0x844e31ff,
-0xedb7da8f,	0xd06ab158,	0xe510fb05,	0x47a74817,
-0x0a3669e4,	0xdf00d009,	0x0f91f46f,	0x7145796f,
-0xf9df01e1,	0xed57c518,	0x5388fc67,	0xe4a1a76d,
-0xa074823a,	0x442a529a,	0x6f25bab5,	0x7b68d74c,
-0x141c4cff,	0x199b85b5,	0x67e8ef7f,	0xdaff4ec3,
-0xbc44b4cf,	0xd4d2056d,	0x20542e57,	0x215f4e21,
-0xdb6abb5e,	0x7ddf2532,	0x2472736b,	0x2d8c015e,
-0xb529a80c,	0x060efa70,	0x8bf2a032,	0xcf71ea8d,
-0x47b25b1c,	0x8e502352,	0xc7ab8783,	0xc5bb2ed4,
-0x94bb37d7,	0xf3178a4c,	0xe583a4d8,	0xaa0bf07e,
-0x140a8886,	0x22ae0df7,	0x91195bec,	0x12a2aa89,
-0xe297fc0f,	0xae2e977f,	0x5265bae8,	0xd4e4d4b8,
-0x23f9d69b,	0x5ec06832,	0x088109f8,	0x0d3798ff,
-0xcdc10ceb,	0x96c485e4,	0x7287f761,	0x6457356a,
-0x76543624,	0xbfd63133,	0xd1eee246,	0x50cf2aa1,
-0x6fac5e59,	0xa949ae36,	0xc77bfe6b,	0xe6a45227,
-0xe98ed4a7,	0x851cfd3d,	0xa19af9fa,	0x093d4922,
-0x7e3f6c39,	0x6a76be4f,	0xa2593cba,	0x0f211c6f,
-0xfe55b036,	0xb7ec4d76,	0x7bf4ad75,	0xf4f437c6,
-0x0671f4c3,	0xa905f082,	0x876de62a,	0x37fe8dad,
-0xe0ffd4db,	0x472dc0a7,	0xc8ba1d4a,	0x5a9accc6,
-0x4929cf90,	0xecc61cb7,	0x280c3dc7,	0x992617e4,
-0xf02b603c,	0xd12d23c1,	0x309acdb9,	0x6a0b101d,
-0x7534fe92,	0x6bb036df,	0x7f241439,	0x95c8fdba,
-0x930279b0,	0x520eb7a1,	0x0c04389e,	0x16770710,
-0xb5c45985,	0xe09c79a2,	0xf82dab12,	0xa38650f9,
-0x5dc21ff6,	0x540841d6,	0x39a7293e,	0x13cbd181,
-0xeda02521,	0x893dca9e,	0xbc01214e,	0x563ec22b,
-0x355af722,	0xadedf44f,	0x64ae28e9,	0x0853a450,
-0x65b9bf17,	0x971c47cf,	0x36cb54f9,	0xb0127756,
-0x75b020d8,	0xa73efc66,	0xaef12091,	0x564acb5c,
-0x8d7cebb5,	0xad0e0221,	0x4d66b908,	0xa8f62601,
-0xad9385c0,	0x35907fa1,	0xbaa21e07,	0x279a1128,
-0xebf970a6,	0xf8bb1490,	0x47182b19,	0x38384c9c,
-0x566ea847,	0x03a8c438,	0x6ba1a285,	0x98131820,
-0x6e737e72,	0xe62c9dc5,	0x45fe85f2,	0x7ac58aca,
-0x24c331c4,	0x3320d15d,	0x925835f0,	0x493c9770,
-0x75ba3529,	0x1ebd3091,	0x5dcb7a31,	0x0eb4e9e2,
-0xc610fa6b,	0xfffd0e2e,	0x6d519a57,	0x6278999d,
-0xfcfcfbdc,	0xf3442e34,	0xca87e7a6,	0x2943c1c9,
-0x243ceb0f,	0xa6336d13,	0x4ed9b105,	0x95e9698d,
-0x3f66ee1f,	0x4df29a64,	0xd37da7ce,	0xe9a24efc,
-0xe6b8970b,	0xfe451636,	0x7dd08af3,	0xe0cb0b8c,
-0xe1a571dc,	0xfc6400fa,	0xc32cd126,	0x6d3ef74a,
-0x8076b333,	0xb10982e4,	0xa625f5c8,	0x625b4d05,
-0x9901c4f2,	0xd5062bfa,	0xee49970e,	0x0a34e4dd,
-0xe05df9e4,	0x32471aa4,	0x6855a898,	0x32b9cc1e,
-0x6997553c,	0x4ab08a47,	0xa7329f6e,	0xed9fdf9b,
-0xbc3a8128,	0x8b7eb807,	0xadb1edb9,	0xc4305cce,
-0x1e5e8b9f,	0x5487b7a7,	0x1769e52b,	0xc00efa61,
-0x810008f4,	0xe0f4ba1a,	0xd9cc14aa,	0x603fb07f,
-0xd79585a0,	0xd20c07aa,	0xc2653e8b,	0xa84fd6ac,
-0xeb113b40,	0xe0a73aa5,	0xddb792a8,	0xe485fe0a,
-0x32bf0d84,	0x5ae2b5ad,	0x00e8633a,	0x142434d3,
-0x4ed7b3a4,	0x67b19633,	0x7566186c,	0x3b58d00c,
-0x223c81b4,	0xb7e6495f,	0xd8b69144,	0x0748ba5e,
-0x5026ef0b,	0xead750af,	0x510146c3,	0x8a0e2882,
-0x96156007,	0xfd3d4386,	0x23584017,	0x23f4ce61,
-0x284bedcd,	0xefb3651a,	0x4ccc8f93,	0xb0d40ef9,
-0xae43298b,	0xe3f5f1de,	0x2ee534c1,	0x0cd9e533,
-0x9e510ea7,	0x0f4b0ce4,	0x700894f1,	0x2b3bbbe0,
-0x0bc8f851,	0x259de507,	0x7a388214,	0x17b3fcf1,
-0x0385f14c,	0xe2427163,	0x2cf653a4,	0x5ec81452,
-0x51ace944,	0xbe14d709,	0x12dede41,	0xbde42922,
-0x388e3ddb,	0xe4c40305,	0x95b26000,	0x58b3ea50,
-0x6f917e99,	0xbbd33afa,	0x299426e4,	0x10eae46c,
-0x6702c546,	0xcb098ce5,	0xc9dd3d6c,	0x373d52a5,
-0x64328318,	0x04c8fec9,	0xe5df4f4a,	0x906ca595,
-0x244318a2,	0xfbd3ab2a,	0x9325def9,	0x947fd954,
-0x2b4fa140,	0xe1ba8601,	0xf4bf225c,	0x0b8d9cc6,
-0xba021efb,	0x7b7bd7ea,	0xb303c47d,	0xf06ea896,
-0x83934623,	0x25a2c65d,	0x8552ae5b,	0x6c67d107,
-0xe3a761e3,	0xd3e3c48c,	0xb1aa8ad1,	0x01838aba,
-0xaa392d62,	0x42369030,	0xa2669571,	0xea95e756,
-0x42091d77,	0x6d54a5b4,	0x5552dfb4,	0x4a3bc5ec,
-0x3a6d34f5,	0x228234ab,	0x3e6175d8,	0xec324882,
-0x3c5a9a34,	0xd9881b50,	0xe4017d3e,	0x82cfabbb,
-0x57091bf8,	0x1d653171,	0x4e57d188,	0x78820400,
-0x662fcd54,	0xb99dc076,	0xdf2eb1c4,	0xf0e1852f,
-0x14084468,	0x7a240dde,	0x5dd2a3ff,	0xbb75d32b,
-0x83697f1e,	0x86852f17,	0x5bc4c1af,	0x640f38aa,
-0xaa7c0ec0,	0x0d26e045,	0x25a790c6,	0x7538c684,
-0x0f938aff,	0x25a14d18,	0xfab93e9a,	0x24083279,
-0x6bde9de1,	0x70993fde,	0x446d8185,	0xcdd8676b,
-0x738025f0,	0x86d84015,	0x2a457248,	0xfe48d9f4,
-0x1c6ee8aa,	0x2fec2c8e,	0x40782deb,	0x66eb5475,
-0xc64be1e4,	0x8d11919a,	0xb0c58e39,	0xd8992fc9,
-0x020d5c90,	0x8f6b0fe3,	0x23e10246,	0x1547be2c,
-0xc1ec6be2,	0x08b8be91,	0xc157488f,	0x90e7f62f,
-0xe451ea6f,	0x18f170f9,	0xdc35a52f,	0x529c35cc,
-0xa85c6eee,	0xe3a747fe,	0x37e7e6d4,	0xc0d700e1,
-0x132c5f1f,	0x89bec4c5,	0xc0338107,	0x9930fd80,
-0x4c0b517b,	0x25b95524,	0x54688e43,	0x67b2b2a2,
-0xb2b90406,	0x879338bc,	0xe78ff635,	0xaeb6489c,
-0x2693fa59,	0x127c58f7,	0xbbbb9c42,	0xc047386c,
-0xfd7e7da7,	0x71dea876,	0xabdcad75,	0x6d11d301,
-0x414586de,	0x2ef24aa6,	0xdb48d629,	0x57fea660,
-0xa7a75d57,	0xb36b3c01,	0xc7b6380b,	0x78464ef8,
-0xa3fa95b4,	0xc4512a73,	0x687d332b,	0x99b098af,
-0xcfd2f6e4,	0xa8255e85,	0x0808efd5,	0xb7a29014,
-0x2b42dc33,	0x92bf1d77,	0x9b00594b,	0x8f234da2,
-0x174793d0,	0xb3be05a9,	0x877bc63f,	0x85ad9d97,
-0x1985e733,	0xab4bb114,	0xb72054b2,	0x9d27064a,
-0x2b0c16a7,	0x8c6d0128,	0x002847e0,	0x99afa4d7,
-0x3e0e5b45,	0xcd94d44f,	0x84005e29,	0xba62779e,
-0x3bc66e85,	0x64e1e622,	0x161487fb,	0xdd61a63b,
-0xe442b794,	0x56a1eec8,	0x9a274a25,	0x9e3379c0,
-0x1f0fc38d,	0x93580641,	0xd36209d4,	0xb47e8636,
-0xc691abdf,	0x518cf208,	0xa31e1254,	0x13e357c9,
-0xd50c6fcc,	0x4255cf3a,	0x1118a944,	0xe14632f5,
-0xa93eb6e0,	0x3121ce4b,	0x57b6bab6,	0x5be787b5,
-0x632d6bc8,	0x7ee21690,	0xdec509c4,	0xdf15378f,
-0xc35f24fa,	0x559a9844,	0xefb7ec09,	0x7916e051,
-0x23b473ca,	0xc2dcb9b5,	0x31b92104,	0xe1536e70,
-0x90d391d8,	0x7210a483,	0x1d84808f,	0xb6ca2d8d,
-0x8f8ec694,	0x359eb7e3,	0xf7af7563,	0x809bccc7,
-0x42f6e111,	0xfbaba789,	0x1cd4b3cb,	0xb0f573af,
-0x30f49bb4,	0xb6f7bb0e,	0x84eb0cdc,	0x8c8de0cb,
-0x70cb0624,	0x9bf684f9,	0xef175f8d,	0x785d90ee,
-0x586119f2,	0x0b351fb6,	0xdc0ad628,	0x78a793e7,
-0x1ff0eab1,	0x5afc68ff,	0xfc341d1b,	0xfd031b53,
-0xc2e73f70,	0x4e74d2cd,	0xb7713f9c,	0xc3e6f859,
-0x44e7ca2c,	0x708116a6,	0x5c32668f,	0xab30336f,
-0x1b4df2fa,	0x11e78503,	0x7707d236,	0x3abaad51,
-0xc71534e9,	0x88c41a2f,	0x3e2d1094,	0x9d2937cf,
-0xe9e1b915,	0xdbb7cd46,	0x21160c56,	0x981bb51b,
-0xe8e306c6,	0x93eb916b,	0x4452c452,	0x5c1704ca,
-0xa12467ce,	0xb7d7b682,	0x381a580a,	0x94a5e65f,
-0xb84ba669,	0x731b58e2,	0xee1768d1,	0xec89193c,
-0x189073cb,	0x82deb79e,	0x4f6240fe,	0x50a5f3e0,
-0x713cca10,	0xf22c5c40,	0x13e93589,	0x2ef258f4,
-0x62834b34,	0xade207a2,	0x9d1d7388,	0x28b0d086,
-0x8873f7d8,	0xc3a18450,	0x62828787,	0x5c4fbe0e,
-0xbded34ed,	0x37863459,	0xf4729b9b,	0x56b6be0e,
-0x9bf54c22,	0x38bd5aa9,	0xe90730de,	0xf847075f,
-0x4b744e67,	0x743cd947,	0x2034d7c1,	0xeec0403c,
-0xe6b12305,	0xe19b8a0e,	0xb5c0a873,	0xc5ee1307,
-0x6f550136,	0x6b3a8a48,	0x6dd749db,	0x35569e1a,
-0x93ea4c94,	0xe6764f16,	0xdd9f2181,	0xb2f50596,
-0x93baddce,	0x96c5cd56,	0x90dae4f0,	0x63351f23,
-0xed49bde9,	0xd71618ac,	0xc87934bd,	0xe96101d1,
-0x55d1976c,	0x471c8505,	0x7a36d839,	0x5d62a9ee,
-0xf3c54a8a,	0xa2be15d9,	0x244087c9,	0x042c8037,
-0x23224689,	0x281c5d73,	0x2139ecfc,	0xffb8bc8a,
-0x834fdd11,	0x9cd5a5bd,	0xa3368319,	0x7e5bef0c,
-0x4ae2dbda,	0x86d90089,	0x6675dfce,	0x48876262,
-0xcec72538,	0x11dc5c80,	0x86a730f9,	0x313565c9,
-0xe3e5be11,	0x106d7cce,	0x752b8be2,	0x3d00a5bc,
-0xe6f70e95,	0x44447ac8,	0x600df30c,	0x8335ac3b,
-0x8816ddee,	0x700982fe,	0xee495741,	0x48c7e81c,
-0xa3d55da2,	0xb0172982,	0x70ab2158,	0xd4460621,
-0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,	0xa8454763,
-0x70877bb6,	0x66005c97,	0xaf292c06,	0x7b843db1,
-0xf343b59b,	0x25cdc7b5,	0xa41da617,	0x9e9d895e,
-0xc936f475,	0x7270925a,	0x30024230,	0x8e72f53d,
-0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,	0xfc18a2a3,
-0xaf377cc1,	0xbff09a78,	0x4b4e0814,	0x95a0b2c1,
-0x270398de,	0x201fca94,	0x2a032a4f,	0x131542b4,
-0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,	0xa814ddc9,
-0xa3b3a991,	0x17ee60c2,	0x852c0b8d,	0x11e5853a,
-0x762002a7,	0x92c5311d,	0x0d4bf7e1,	0xfffec870,
-0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,	0x0111a772,
-0x9808e780,	0x29c336e8,	0xe9bc05df,	0x5bedde11,
-0x945565af,	0xaff808fe,	0x87e3423d,	0x4de6f98f,
-0x93b4adef,	0xbf704fa4,	0x09120e91,	0xd54f3692,
-0xdf8eab1e,	0xfabbf59c,	0xe74318be,	0xaab87ffc,
-0x29fa791c,	0xe3915552,	0xa652cb9b,	0xa1252e74,
-0xb35b723b,	0x542aa28b,	0x12fcc5b0,	0x3941f962,
-0x82bcc6cc,	0x47b11974,	0xb821611f,	0x78b34250,
-0xf1be5659,	0x561b9e61,	0x6f3bd501,	0x584e6f5c,
-0xd54ed547,	0xacebcd21,	0x7b5ff816,	0xb64ad233,
-0x9f2f330d,	0x69fb1ece,	0xac8710dd,	0x58dc6c60,
-0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,	0xebc0ce9d,
-0xa733274f,	0x884d9b55,	0x42b08b63,	0xafa54a74,
-0x1c7ccf64,	0x93a20191,	0xaaa3132e,	0xc69831d1,
-0x54634889,	0xfbfe3efc,	0xd3cf68d4,	0x302e3117,
-0xf5693131,	0xc3ce8c6c,	0x1f03cd89,	0x6243334c,
-0xf16bc80f,	0xdca5f130,	0xcb2cd956,	0x4c1bb421,
-0xe8de533c,	0x7f86703a,	0x29aa897e,	0xdd54acad,
-0x76b2f2ae,	0x7ef82b71,	0x2e30970b,	0xba402597,
-0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,	0x7f9efd1c,
-0x2363d147,	0x5327289a,	0xe89229f3,	0xd63a535c,
-0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,	0x26b6edfb,
-0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,	0x6d65db4c,
-0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,	0xe20e6dbb,
-0x8488a45f,	0x8ebc2932,	0xd4767316,	0x3e8c4b8a,
-0xbab7402c,	0xfc1e217e,	0xe5c5bf82,	0x6928fe2e,
-0xc88528e9,	0x4b2e4e8f,	0xdd938b86,	0x0c964f98,
-0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,	0x197d005a,
-0x4d40b3b3,	0xcf203155,	0x0d2fa621,	0x752d2c58,
-0xb12bac12,	0x1e7e8c23,	0x94215d54,	0x9854a71c,
-0x4de63c64,	0x7a012529,	0x9c171f8d,	0x9e71def7,
-0x3bd17d50,	0x11f175d9,	0xec78abf3,	0x7b529eee,
-0xd3a69fc3,	0x5b718676,	0x58214d29,	0xa8bd2c34,
-0x41ea00ab,	0xa03f64d6,	0x4ee342b0,	0x32b1e444,
-0x1c1801a4,	0xc8424702,	0x334a7e35,	0x50cf1543,
-0x3b22b495,	0x88683776,	0x8e2e0154,	0x6155c033,

cpu/intel/model_1067x/microcode-m111067AA0B.h

diff --git a/cpu/intel/model_1067x/microcode-m111067AA0B.h b/cpu/intel/model_1067x/microcode-m111067AA0B.h
deleted file mode 100644
index 29f196f..0000000
--- a/cpu/intel/model_1067x/microcode-m111067AA0B.h
+++ /dev/null
@@ -1,547 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m111067AA0B.inc  */
-0x00000001,	0x00000a0b,	0x09282010,	0x0001067a,
-0xb007e7e3,	0x00000001,	0x00000011,	0x00001fd0,
-0x00002000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x00000a0b,
-0x0000001a,	0xa4000000,	0x20100928,	0x00000401,
-0x00000001,	0x0001067a,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xf19298f2,	0xb55d1d07,	0xc234f4b1,	0xfd7a7091,
-0x54d9a9ee,	0x91c784e2,	0x2e051e9d,	0xbc9f70fd,
-0x170ce7c7,	0xd727c705,	0x019b1ba5,	0xe0414a29,
-0x57d45458,	0x26a8a411,	0x9faad966,	0x095ec8b0,
-0x083a7c2a,	0x17cfc70f,	0x3c8e78a8,	0xce18c419,
-0x5f2ddeb7,	0xc9c95d71,	0x437a5116,	0xe0253ad0,
-0xec78db42,	0x681e436f,	0x7fd028bb,	0x1149a501,
-0x0bdf0d05,	0xc2321514,	0xd6866cd8,	0x64942685,
-0x21e0276b,	0x0817a288,	0x09138669,	0x792985dc,
-0xbd60d6aa,	0xfbf902ec,	0x43fee69d,	0x5c5823c0,
-0x9dca1fe6,	0xb528b0c5,	0x22fd29ab,	0xac4fe251,
-0x77207813,	0x0637a1f9,	0x16bfcf73,	0x80497f6b,
-0xe5bca939,	0x1539fa1a,	0x66607fea,	0x2276c06f,
-0xd003229e,	0x3622fda7,	0x18d0b8af,	0x9f399760,
-0x3ac6387b,	0x6c7148fa,	0xfaf4df9f,	0x965db840,
-0x7c142542,	0x7b805f4c,	0x3f2002a3,	0x061399ce,
-0x2f1a03c4,	0x7f1c7616,	0xb2f9ab42,	0x4e6a92a2,
-0xb44b96d6,	0xe1167017,	0xec4b2fb3,	0xa15376be,
-0x00000011,	0xcbab246d,	0x70df053b,	0x61a71219,
-0x3fdbc153,	0xbd614857,	0x540ee622,	0xee92885e,
-0x92482c7d,	0xce0075e3,	0xe805283b,	0x5267144a,
-0xd710f435,	0xc1649352,	0x618294a6,	0x33176eb5,
-0xa15c8dd7,	0x62552413,	0xf6cdab97,	0x546c7f5b,
-0x32f8a79a,	0x2878ac67,	0xd38dd751,	0xc7fe68fa,
-0xeb6f2486,	0x861f4eec,	0xfd931933,	0xea7bd7c0,
-0x4e662289,	0xeb85338d,	0x4852055b,	0x1126ad76,
-0xc1d9c90f,	0x0679163c,	0xcbf72e04,	0xc7e4f752,
-0x7163ac25,	0x1b6af13d,	0xa7a7ed34,	0x4bc39e15,
-0x1559beed,	0xa66854c5,	0x84fdd32d,	0xae65f9a3,
-0xddd634dd,	0x1fd976b7,	0x676760d3,	0x0e950f64,
-0x5e25ac32,	0xf8cfdae7,	0x2a99e14a,	0xf619a0f8,
-0x8836b515,	0x73f04da7,	0x7a5ec90a,	0x95967f97,
-0xe34c4939,	0xa8552a60,	0xe787af38,	0xd18a687c,
-0xcd91c0a2,	0xfce8d0e4,	0x0ce7e292,	0x2c1e29bc,
-0x0b2776b3,	0x9263c4ca,	0xa5c0fd52,	0x8484cfd9,
-0xa3254cfa,	0x245b3f84,	0x92c10e17,	0xeaa29019,
-0x4d4f91e8,	0xa95db909,	0x905ae7e2,	0xdc0da4d6,
-0xc24cd0f1,	0x497ac725,	0xe568bd06,	0x7886d8da,
-0xd48671d9,	0x0235baab,	0x82dab634,	0xe95fb40b,
-0x952da92a,	0x6c9958d0,	0x88edc031,	0xbe018989,
-0x04c60b62,	0xefccf9c0,	0x0e64e1c7,	0x813aa16f,
-0xa2b6a00f,	0x1b9b7be0,	0xadbda597,	0xe92fb34e,
-0x296a7cb9,	0x7de766a5,	0x9a5c36e8,	0xd312ebf5,
-0x44d3bd3f,	0xc1df58cd,	0x9b1ed038,	0x35cf19d6,
-0x08eaab1a,	0x1e62df5d,	0x50c435bf,	0x085bfe8b,
-0xd262fce0,	0x289c6d4a,	0x73f22a6a,	0x9ff17903,
-0x42085e0d,	0x85e146c7,	0xf7c76ee2,	0x7b0a9e7c,
-0x932c8932,	0x3167779b,	0xef5f94ae,	0xecdb6606,
-0xed4ba5e9,	0x3a517395,	0x0a2a76a5,	0x86913204,
-0x32567986,	0x92aa6f3c,	0xcad76898,	0xb9ce2037,
-0x1df100bc,	0x8d4e5b3c,	0x12a1856d,	0xfda5dd25,
-0x2abf0bc2,	0x98e1bb97,	0x2bd420e5,	0x63cb479a,
-0xf19cb965,	0xb743c0cb,	0xb789f2b8,	0xec299e57,
-0xa6370754,	0x2f0a6afd,	0x8e198e61,	0xb9875af3,
-0x0354f509,	0x6809768c,	0xd54dff82,	0x1e873e57,
-0xdf1c742d,	0x227f70cf,	0x09306c7f,	0x40a67199,
-0xccffb4d3,	0x3607ada0,	0xf8925ab9,	0x216ce6bd,
-0x5b7bfc41,	0x3bdbcf4f,	0x814dbaa0,	0xf0c07127,
-0x50f0e147,	0x609f0978,	0xa2e1e6b8,	0x7b568062,
-0xa558271f,	0xe5742b5d,	0xc686c06d,	0xc3a67b91,
-0x5fcfd501,	0xb537d556,	0x6e5dc192,	0x5dcb4c62,
-0x185066c0,	0x35e2962e,	0xaede1642,	0x2a80adfc,
-0x7a6643a7,	0x9ddf8d22,	0x201c988d,	0xb1e56ae0,
-0xc2db3ca0,	0xc0b39180,	0x9baf2f79,	0x81c86e4e,
-0x739b37e2,	0x801324ce,	0xa9d3ea44,	0x0f9e7231,
-0x6f56f2d5,	0x8f3ee54f,	0xd0d0190e,	0x043e172a,
-0x2cffa43f,	0xfa062d4e,	0x01692ad6,	0x734655e1,
-0x5712e619,	0x27561b88,	0x49b2b280,	0x794a35bb,
-0xa472d378,	0x23648dd9,	0x1202d179,	0xb310a407,
-0x33040af4,	0x85fb6aee,	0xd77e905c,	0x840995ba,
-0xbd231096,	0x5c92aac7,	0xc2c7936a,	0x7919a063,
-0xd80bbb0e,	0xaea840b9,	0xb284b2f0,	0x0311a9dd,
-0x973646c8,	0xc6ca268a,	0xb24d83c3,	0x1265af39,
-0x9afef0bf,	0xf49c72f9,	0x0d11dc4f,	0x548f1013,
-0xe25414d5,	0x0accee4f,	0x1249c8d1,	0x92369ac1,
-0x042b56ff,	0x377878e4,	0xfa22e739,	0x7e2a25a2,
-0x11418d32,	0x3f6c831e,	0x3af2e1e9,	0x74238236,
-0xa61232a4,	0x397ae44f,	0x5c5e4b39,	0xf9ce3b59,
-0x1240ef10,	0xb3e38493,	0x21fa36fa,	0x009876a6,
-0xd64989a1,	0x820ef8fb,	0xeff73b2b,	0xa468d086,
-0x50f692c0,	0xfa4daf2a,	0x0c8217ea,	0xc0222f8c,
-0xb2c25f05,	0x65d4f046,	0x35125bba,	0x75446a86,
-0x29c90279,	0x62dc34d5,	0x07beefaf,	0xc350f8d6,
-0xbf50f404,	0x0114ec40,	0x1fdc9b27,	0x2d5beada,
-0xfad87b9a,	0xd86c6201,	0xce0cd023,	0x1b0dc432,
-0x33554d83,	0x7e4d9618,	0xa6b54da4,	0xdef74e92,
-0x7d79f7b9,	0x835b6796,	0x54789d6a,	0xa60f6673,
-0x4ccb5e69,	0x1d7d8f07,	0x88a4c651,	0xa67fe1d6,
-0xc0fa14be,	0x8c7771c4,	0x787b7ccc,	0xf733947d,
-0x2588b385,	0x79c2aaae,	0xa871589f,	0xd17ead89,
-0xc7efb650,	0xe4e971f6,	0x8d2e84cc,	0x252acd23,
-0x5574dccf,	0x213051e0,	0x4bf0a35a,	0x0af2c866,
-0x5d37fc1d,	0x2abc809e,	0xb432695c,	0x26af6c61,
-0xba409686,	0x10411d48,	0x4edf888c,	0x86e745b4,
-0x0259d26f,	0x19a3bef8,	0x8bf2260b,	0xa74be774,
-0xce68110e,	0xa8d71177,	0xdfa96e70,	0x053a9a12,
-0x61dd6149,	0x2b14ea2c,	0xba78b4b7,	0xdd2b254b,
-0xea6aea95,	0xf6eb22a6,	0xa04232b0,	0xbd8939af,
-0x1aa3efb7,	0x4a7b99f7,	0xd251e6f5,	0x6fbcf35c,
-0x08613ea6,	0x9440a552,	0x9e01b4bd,	0xfbf5ede2,
-0x4c05285f,	0xd8240fb4,	0xbc7e2ca8,	0xbb157a52,
-0x49f4ac13,	0xf66667e7,	0xa8e3fb86,	0x15104200,
-0x4bc83e6c,	0x76c20f01,	0x3bfe49b4,	0x1206bc15,
-0x2acefe8d,	0x0f74d144,	0xf1e1a82f,	0xcb85f63a,
-0xb8e857f5,	0xd4cfed4f,	0x1f2557fc,	0x6f46ca93,
-0xbd68a471,	0x0067a678,	0xed849872,	0x939f6013,
-0xdb2f765f,	0x0880e597,	0xd6825b3a,	0xde8292de,
-0x518b20b0,	0xb5e793c4,	0x6763ec14,	0xfbd8214e,
-0x9682cdeb,	0xb10d8961,	0xde08cfad,	0xbf9c861b,
-0x03c78ae8,	0x0afee648,	0x97b5941a,	0xc008484f,
-0x031149ae,	0x1cb6f55d,	0x5512e84b,	0x093b3f2c,
-0x0192c8ad,	0x327f0554,	0x666001cf,	0xdd964ada,
-0x52e08c11,	0xaf75dfbd,	0x31f00d61,	0xf034e0d8,
-0x662f51a3,	0x55e159d5,	0x8e56b35c,	0x1bb26d1b,
-0x1d389f2b,	0xffa5d4e0,	0xd6dcdfa9,	0x42d7b1f0,
-0xd2be2af4,	0x18c82aa2,	0xcad4e2c6,	0xbe20d717,
-0xa7b253d1,	0x3314abec,	0x920ce79a,	0x7f6f9476,
-0x6eb4392a,	0x481aef86,	0x90031d44,	0x0e2eeeab,
-0x219dedee,	0x45debb0b,	0xfc7e84f9,	0xa08e3b43,
-0x9892f7fb,	0x7d0be8fe,	0xe1326c42,	0x955b9d8a,
-0xe96f216f,	0x6923fa86,	0x1c5ea1d0,	0x38bd1557,
-0x3be77dc5,	0xe4857535,	0xe5bc222e,	0x4e20fedc,
-0x1792d3ec,	0x973cd420,	0x3bbb31d2,	0x34219f80,
-0x15990ce5,	0x8c839438,	0x2001653a,	0xf2842f53,
-0x38d48226,	0xb89b44d0,	0xa0c38852,	0x1d8a7b36,
-0x5c7ae94a,	0x41b267a9,	0x5a841e9a,	0xb6638104,
-0xdab57dc6,	0x5b2086b1,	0xf5d9568b,	0x27f451eb,
-0x042b192f,	0x1996d010,	0x18bead06,	0x4a3bdcce,
-0xc419f4e4,	0xc35df50f,	0xe65cf27b,	0x2fa6b5ee,
-0x132fa514,	0x8ecca7e7,	0x35d66c5a,	0x07f507cb,
-0x55480954,	0xa5d09e53,	0xb532d568,	0x3f435248,
-0xd480fc26,	0x1da88bc9,	0x0d26c078,	0xfe19393d,
-0x21d37174,	0x19bb47bb,	0x2c51e475,	0x3e5cc373,
-0x905978f1,	0x8e5da576,	0xf74a4810,	0x9c7eeba8,
-0x30ec87b0,	0xf2089424,	0xb96f9673,	0x667d8a87,
-0x0f68c506,	0x6d0bdd73,	0xb283fe79,	0xdc66aa90,
-0x9090f2da,	0x548dc310,	0xadd6a35c,	0x5b2341eb,
-0xcab5efd5,	0x4c37115a,	0xed6740d2,	0xf42f5b78,
-0x428b544c,	0x06a2130a,	0x9ebb76b4,	0x70cb251a,
-0xbe8fe547,	0x5250a820,	0x900b3d67,	0xec0911a7,
-0xdd99a2c6,	0xf545c0be,	0x0f982203,	0x25b83f24,
-0xacfba6d8,	0x8de48d74,	0xa6315ea6,	0xd13bda15,
-0x7d1bbfde,	0xcc39589a,	0xe2b4dcea,	0xcaf25c79,
-0xb702b5be,	0xf06ec58e,	0x38bf386a,	0xbaba1d97,
-0xee6b6c80,	0xc718aaa2,	0x415c84f5,	0x9a33d762,
-0xdc0d7975,	0xacf26ac3,	0xcf623369,	0xf5ad1c11,
-0xafa2342f,	0x167f0d72,	0xac0badb0,	0xa1734862,
-0x95e867bc,	0xc074eb09,	0x4f4b30fb,	0xbf5be704,
-0xa567fe7f,	0x7919289e,	0xf0236921,	0x63a00c20,
-0x74b47a45,	0x589ffbea,	0x06acf50e,	0x77f6ef10,
-0x4ce3c965,	0x0b7d8a4d,	0x872f026b,	0x6b37f168,
-0xf7ab5356,	0x46d64c5e,	0x0c7a07ed,	0xfce55a58,
-0x46b374cd,	0xafe7c16f,	0xcb6066be,	0x7e39d740,
-0xcc636c5d,	0x38d36fb2,	0x0fe4b220,	0xf5842cf0,
-0x4e250eb6,	0xeefd4b15,	0xca9fb097,	0xb8f6268e,
-0x64472230,	0xb6ce5602,	0x2e415c12,	0x83818dc7,
-0xe4f19e5b,	0xc65d7eba,	0xe0da2f62,	0x4ca70f46,
-0xf5137149,	0x28fb427e,	0xaa228bad,	0x2e635cbd,
-0xb205c1cb,	0x35d1e6af,	0x82a30a8f,	0xccdf3e5d,
-0xd681dd6a,	0xa6806d2a,	0x660501ff,	0x9e2998ef,
-0xd45d0a1c,	0x5024b9e3,	0x71a0d648,	0x8f81a400,
-0xe6b9f51c,	0xc324cff9,	0x767b0e06,	0x97a0312f,
-0x027cc31b,	0xcfe73a9c,	0xb1cc9e4a,	0x7875dd28,
-0xafacc331,	0x7f902344,	0x0603a643,	0xccd640c6,
-0xc815a2e3,	0x9dcb03ef,	0xe849b355,	0x0dbd1ca5,
-0x38babd72,	0xfae1afd8,	0x9685948f,	0x87c0bb88,
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-0xd44047af,	0x36a45070,	0xb93935f8,	0x7bc0bacd,
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-0x79a43fbb,	0x5bb5e1b7,	0xeab5ed62,	0xe6a11e32,
-0x3118b0fa,	0xedbcfb64,	0xd2285490,	0x824023c6,
-0x30311fb1,	0xa0a4a475,	0xbfa8ac55,	0xb8c8fbda,
-0xdf3cab63,	0x8d805566,	0xf52c1b1a,	0xa3471090,
-0x02328a4a,	0x5d1dce57,	0x196aea39,	0xcd0f640b,
-0x2fa01c27,	0x6175f783,	0xb2b6a0e4,	0x02fe6171,
-0x2d3cb20b,	0x25f331e6,	0xacfa8085,	0x46a09a58,
-0x27bbfb9e,	0x3914f970,	0x73e35206,	0x8bb87194,
-0xdb58fc4b,	0x62fd53ff,	0x2c942c7c,	0x3f4681ba,
-0xeada1780,	0x5dfbb960,	0x8473948a,	0x80787902,
-0x049c20ba,	0x9e95a4fc,	0x8526d8ac,	0x3dcdcd2d,
-0xb9562f16,	0xc9c8eb08,	0x533ed0a2,	0xa34d5d73,
-0x3e579c8e,	0x235bb378,	0x36576983,	0xc71f11b2,
-0x035eae76,	0xbec23972,	0x8613e5e9,	0x3982899a,
-0xe5a55d62,	0x3c45a7e9,	0xbd4d6def,	0x17ae0a5f,
-0xf0f53bb8,	0xa3dd1e29,	0x36f9520b,	0x72cbd950,
-0x4d762d12,	0xe03cb7a8,	0xf8c8c1fe,	0xa4ff17a1,
-0xcc779472,	0x83f9b379,	0xa2fc038c,	0xdd3b8104,
-0x95936bb0,	0xf36c9705,	0x93939e08,	0xc98576ac,
-0xec9196d1,	0xc8bce622,	0xb48e1075,	0x98dbd77d,
-0xd1b04c3d,	0x85d1d422,	0x20765885,	0xc6a17eb5,
-0x8e913cdc,	0x3f7a6758,	0x08176f48,	0xba2ea15f,
-0x3638114d,	0xf08cb49b,	0xb8b6d9ce,	0x4e55891a,
-0x2775c022,	0xc8d45982,	0x529c2eb3,	0xde080e24,
-0xdac9c028,	0xeec68934,	0x8eaace11,	0xe82e05aa,
-0x00033a20,	0x4ec94b5e,	0x445f5562,	0xa5c58462,
-0xb6942526,	0x44631607,	0x5065644c,	0x14946f9c,
-0xa9cb0e63,	0x53dff50a,	0x3f18fa24,	0x20b3b811,
-0x95c1e57b,	0x1523d301,	0xc4e24932,	0x41a9be80,
-0x24fc45b0,	0xccff2cbc,	0x996af6a1,	0xe3f201c3,
-0x0917ea23,	0xbf4a1ac3,	0xbb0db6f1,	0xd15772df,
-0xb1465383,	0x61400275,	0x571f6b1d,	0x0a4407f7,
-0x916cfbce,	0x114f042a,	0x1cb9b3a6,	0x1b34c85a,
-0xe36acc8d,	0xab109469,	0x5af9a63a,	0xccd4defc,
-0xb758adfd,	0xbd8ddecf,	0x5ffe8424,	0xd73e2a4b,
-0xb41cb99e,	0x01a52553,	0xba70e749,	0xf81d7557,
-0x2b4f0847,	0xa22e281f,	0x5c653c31,	0x89bdb546,
-0xa596e592,	0xbca4cbf4,	0xc3d1dfe3,	0x64a21c2e,
-0x159aa4b7,	0xed90f2d6,	0xb1164cb0,	0x86de0088,
-0xfd4e49e6,	0x70702b0d,	0x946b532b,	0x03a0144e,
-0x71fb19ed,	0x07c41763,	0x63312ce9,	0x0e2f5ee4,
-0xc6501661,	0x09599e4e,	0x544fd5cc,	0x054d842c,
-0x902bb57d,	0xdf82a365,	0xb7ae9427,	0xa6750881,
-0xeee3c9cd,	0x6cbe0f45,	0x7f72d3f9,	0x430b786f,
-0x162b6004,	0xbfcd440b,	0xdc4f5c81,	0x82249f6b,
-0x98d1cdca,	0x2cc2692e,	0xf977f83a,	0x570c1e1f,
-0x24ed6461,	0xcae5afea,	0x9cf06576,	0x9199d69c,
-0x883febfe,	0x0f254c42,	0x6eb50978,	0xf91fade4,
-0x9cfe5488,	0xfe3bf66b,	0x86ea94e3,	0x1bed23f5,
-0x0bded397,	0x0cde064b,	0x7abd7a81,	0x8efb798e,
-0x9a78e5f2,	0x7c46d76f,	0xcb3ae1ea,	0xc33e7ab1,
-0x0c3993f0,	0x5b2d8de7,	0x24948ba8,	0xffce06e6,
-0x0d3c2dc2,	0x3ae09142,	0x7e6b932e,	0xb3e22558,
-0x9f7c425e,	0x8fa1329b,	0x24aa5012,	0xb9e49bc7,
-0x787dd5a6,	0xf68c8171,	0x440d2146,	0x9734857f,
-0x8c30c31a,	0xcb3352a1,	0x46b04f38,	0x72572ef8,
-0xc90c56df,	0xe8103fa8,	0x04057577,	0xd1c250d9,
-0x5cb390a9,	0xbdba74b9,	0x80012fa3,	0x408216c2,
-0xadca83bc,	0x3c39bcdf,	0xf0da9459,	0x421d5a3d,
-0xc5cf55c9,	0x2dcfa63d,	0xd852066b,	0x606b2204,
-0x4d5e9576,	0xe8d6475f,	0xe46ec6b0,	0xf4e3c2c6,
-0x1bfe1bb0,	0xc2803818,	0x2a3e4809,	0x947e50a1,
-0x3a10e713,	0xc9e070cc,	0xa4244fe4,	0xa7f5d2e7,
-0x194f77ee,	0x76754ab4,	0x75ed4e5f,	0x92ffdbaa,
-0x1f5bce6a,	0x14aeeec7,	0x366fbb47,	0x44ecec7b,
-0xbc31e911,	0xee6c224f,	0x0a6f7376,	0xbe79fce3,
-0x53a18077,	0x6f6ad5fe,	0x945938bd,	0x61bb760c,
-0xed26220f,	0x9f492f0a,	0xaf0f2d80,	0x265f5449,
-0xae1f2dc3,	0xd235910c,	0x44a0f4a0,	0x36fcc004,
-0x1e8fa223,	0xe7440ed0,	0xa8535548,	0x6d7e7029,
-0x2e1b7968,	0xf3baa61d,	0xf447ef12,	0x701d62d6,
-0x2da5dcf4,	0x44828196,	0x41af9c9a,	0xab210662,
-0xa5ee18f2,	0xd45eb369,	0x947814fe,	0xeb62eb49,
-0x30c555c6,	0xdc06ccbd,	0x786705d2,	0xd50c80d3,
-0x266d8313,	0x68f63164,	0x1e3e4322,	0xfc23834e,
-0xe879261f,	0x28992a8f,	0xab86dac9,	0x19f88d1a,
-0x5110c867,	0x3c050155,	0xf9b1b3f5,	0x98909489,
-0xfa0ee6bc,	0x038fb4ce,	0xbe1c9e33,	0x18f96bcd,
-0xa1635c9a,	0xff3e9374,	0x5b033171,	0x0b84bfd9,
-0x3c091bae,	0x6da61a4e,	0x07d81b5d,	0x3904ea3c,
-0x75f4e7f1,	0x3e70c12e,	0x9c70d835,	0x9a1ea5a6,
-0x4b99b705,	0x08f6ab89,	0x7649901c,	0xee3e7687,
-0xa3deb48c,	0xd74e8c78,	0xe8e120c3,	0x425d3d96,
-0x16f136bd,	0x0c7a32ef,	0x37a0ff53,	0x77b035e4,
-0xba8808c1,	0x1d3d8330,	0x8d224cce,	0xed789fed,
-0x550a8352,	0xe2715912,	0x185f62d1,	0xe301002a,
-0xbe2ed99b,	0xbb1dfd60,	0x9d22d8f9,	0xcbfa36d5,
-0xad7e92e0,	0xd2db61d4,	0x1df386f5,	0x92b5797c,
-0x00ac8ed1,	0x2f7470b1,	0x674e258b,	0x6689df79,
-0x135c5c1a,	0x87abbc50,	0x19ac082b,	0xe7f7d64c,
-0x24fd4922,	0x7eeadc29,	0xa0910eaa,	0x763231d6,
-0x23597ccb,	0x332f33c3,	0x93992b6a,	0x19c8937c,
-0x75d6a9f4,	0x221395e1,	0x662914d0,	0x997d7860,
-0xd196adeb,	0xa5402fd9,	0x8bd6f12f,	0xc31d97e0,
-0x304dd9dc,	0x72f35c72,	0x8ced870e,	0x1eef8a14,
-0x323321fa,	0xf193079f,	0x18026b1c,	0x5a1107a5,
-0x54979f4b,	0x6afee492,	0x04c012e6,	0x3446250c,
-0x25a691a8,	0xc19a76ea,	0x66bd5b14,	0x6250bd2d,
-0xc6c082d9,	0x67ea1d78,	0xbe68a7ef,	0x03f50dc8,
-0xd8f76566,	0xb6681752,	0x00e2b087,	0x7ed2e598,
-0x8c9cbc83,	0x103b03f5,	0xee4d2723,	0x67b3903f,
-0x1e057dec,	0xc5703ba6,	0xae0615f9,	0x1bce0df2,
-0xfd041279,	0xc874a2c3,	0x0a91d2fa,	0xac098457,
-0xc1efc5f9,	0xd48208eb,	0x72e9baa8,	0x184dc658,
-0x3d26b8b4,	0x90e2469d,	0x6d07f351,	0x3f6898a7,
-0x21e4de0b,	0x0fd04a43,	0x2c99cd2b,	0x44b28cdd,
-0xaf5483a5,	0xe50b9a12,	0xd98fe031,	0x9d6e8f08,
-0xf385ba19,	0x5e531cb0,	0xc545867a,	0x65f5ebf5,
-0x9f27ad5a,	0x2de11f0d,	0xef6f0970,	0x973b11f2,
-0x72228c07,	0xe13fdb84,	0xd2a7b46f,	0xc85a38db,
-0x331a9807,	0x3be38ebc,	0x3e7bf15d,	0xa82a1e68,
-0x4b42b5bc,	0x9871203e,	0x7d1e1e24,	0x12f57b6b,
-0xf5403ec8,	0x28746c33,	0xae20522f,	0xf6042fba,
-0x66bada5d,	0xbefe376f,	0xfd3773a5,	0xbb5fc6e8,
-0x34c0433d,	0x3cfc83e9,	0xd096736a,	0xa53be016,
-0xeba3dd6c,	0x2c626561,	0x3c160c8d,	0x8506c719,
-0x802e7b47,	0x16079396,	0x6d29b175,	0x4e91abb4,
-0xe350ce95,	0x0d481aa5,	0x94e95371,	0x10dc4dec,
-0xbfeb3735,	0x3ce3cb4d,	0x32ff742a,	0xac5ad3cb,

cpu/intel/model_1067x/microcode-m401067660F.h

diff --git a/cpu/intel/model_1067x/microcode-m401067660F.h b/cpu/intel/model_1067x/microcode-m401067660F.h
deleted file mode 100644
index 5009df4..0000000
--- a/cpu/intel/model_1067x/microcode-m401067660F.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m401067660F.inc  */
-0x00000001,	0x0000060f,	0x09292010,	0x00010676,
-0x8fe1a207,	0x00000001,	0x00000040,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x0000060f,
-0x00000035,	0x2e000000,	0x20100928,	0x00000301,
-0x00000001,	0x00010676,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xcd5c7635,	0x1603940d,	0x976e7e8b,	0x02bac8d1,
-0x9be45039,	0x69a22250,	0x76d8821c,	0x3fefb30d,
-0x170ce7c7,	0xd727c705,	0x019b1ba5,	0xe0414a29,
-0x57d45458,	0x26a8a411,	0x9faad966,	0x095ec8b0,
-0x083a7c2a,	0x17cfc70f,	0x3c8e78a8,	0xce18c419,
-0x5f2ddeb7,	0xc9c95d71,	0x437a5116,	0xe0253ad0,
-0xec78db42,	0x681e436f,	0x7fd028bb,	0x1149a501,
-0x0bdf0d05,	0xc2321514,	0xd6866cd8,	0x64942685,
-0x21e0276b,	0x0817a288,	0x09138669,	0x792985dc,
-0xbd60d6aa,	0xfbf902ec,	0x43fee69d,	0x5c5823c0,
-0x9dca1fe6,	0xb528b0c5,	0x22fd29ab,	0xac4fe251,
-0x77207813,	0x0637a1f9,	0x16bfcf73,	0x80497f6b,
-0xe5bca939,	0x1539fa1a,	0x66607fea,	0x2276c06f,
-0xd003229e,	0x3622fda7,	0x18d0b8af,	0x9f399760,
-0x3ac6387b,	0x6c7148fa,	0xfaf4df9f,	0x965db840,
-0x7c142542,	0x7b805f4c,	0x3f2002a3,	0x061399ce,
-0x2f1a03c4,	0x7f1c7616,	0xb2f9ab42,	0x4e6a92a2,
-0xb44b96d6,	0xe1167017,	0xec4b2fb3,	0xa15376be,
-0x00000011,	0x0788335a,	0x28facca9,	0xbf2e27da,
-0xebd0c3e5,	0x6e2bf3d3,	0x1291c903,	0x1b6f078f,
-0xb9fa90d0,	0x08dafe1d,	0xd3597151,	0xc19ebdfc,
-0x5979ae2d,	0x4dbac714,	0xfe524484,	0x113ace1c,
-0x00e8b78c,	0xdbfcb209,	0x578f12c8,	0xa0a9a9a4,
-0x75cbba05,	0x465b7ad3,	0xd7a0400c,	0x78c872fd,
-0x58e583ad,	0x89833f8a,	0x06682ef2,	0x2b171402,
-0x7dce156e,	0x03d0960a,	0xa49efcec,	0xe2571f5d,
-0x0e78dbcf,	0x344dbcb5,	0x742d5af8,	0x151b31b5,
-0xe7305747,	0x3e7ca578,	0x60fbc463,	0x850a9838,
-0x10006766,	0x70f8c433,	0x033bab69,	0xc4871830,
-0x41eac63f,	0x78886cad,	0x5631a48e,	0x01a4dbca,
-0xfe92aa1b,	0x0a0d0ea2,	0x7e74d7af,	0x9297e473,
-0x1c04148a,	0x6f60c9b8,	0xd2f3bac6,	0xd4664494,
-0xf5e57c3c,	0x4bf483a2,	0xa87a6675,	0xd4c0634d,
-0x90ec0d11,	0x9affdc7a,	0x31c0f085,	0xe70154b4,
-0x0f6042e1,	0xb0a44492,	0xd6978645,	0xb0d6bdd8,
-0x16a408ce,	0xbe208d45,	0xfde84e47,	0x357b93d5,
-0x197beb3f,	0xffdd29ff,	0x4a5895d6,	0x8354ce1c,
-0xb47f4fe8,	0xd162dfe5,	0x9805816d,	0xd6c09438,
-0x0f1db09b,	0x4a7fd1e0,	0x1e260e75,	0xcb1064c8,
-0xbe41a45a,	0x715047b5,	0x0a1ad754,	0x968231ee,
-0x4f156004,	0x6a37fee6,	0xab2d3034,	0x147ee014,
-0xdc7471b2,	0xa5f20a4e,	0xdc803518,	0x8adeba3e,
-0xb960d413,	0x51f60de9,	0x015914f4,	0xd32542b6,
-0x007a7f34,	0x96910cbe,	0x948e5d84,	0xb305ebc5,
-0x99d34cba,	0x30d334ae,	0xd38198fa,	0x14767c49,
-0x4c15d5b0,	0xf4371db4,	0xeef4cfbb,	0x4256b5d7,
-0x41ce6de0,	0x8840ba88,	0x99d0d63b,	0xfe90fb19,
-0x8e4ef36a,	0x728827f6,	0x0b676dad,	0x377239b5,
-0xff0c85a8,	0xd954058e,	0x04d26bbd,	0x9ea520ca,
-0x42c6f7a0,	0xe99386d4,	0xbd4f820f,	0x27b217bd,
-0xd2cbf0d3,	0x5a6ece4b,	0xed82c4bf,	0xb7d4c10c,
-0x9aa0e173,	0xb4d7721a,	0x990637ed,	0x58e2f40b,
-0x6cd2d564,	0x2d58e6aa,	0x1e3f5330,	0xd724d2dc,
-0xfca0c657,	0x68cd14bf,	0x6117e696,	0xe48c6c00,
-0x95c75bb2,	0x949a702e,	0x7823d834,	0xafb0c045,
-0xef4f6c0b,	0x5c4c00f1,	0xc0a7edc6,	0xe7397e19,
-0x8eaec8c3,	0x298d9212,	0x4afc4fa6,	0x24cca594,
-0x5b0345f8,	0xbde656d9,	0xb6a9199e,	0x6788166d,
-0xf6a9766a,	0x7d6efd02,	0xbe989743,	0x53db6a53,
-0x26acebc6,	0x0c661c7c,	0xba39c1ac,	0x46fe6a74,
-0x33743b7f,	0x60389f01,	0x26445dae,	0xd9e2dbbd,
-0x723821dc,	0x935a8568,	0x07d28911,	0x1003b007,
-0xffd0470d,	0x1c7ec08d,	0xab13ae7c,	0xa471a700,
-0x61af6580,	0xb2149237,	0xa68d4884,	0x96e29cb5,
-0x9ed0fea3,	0x7179142e,	0xbdc41838,	0x66508f94,
-0x3fc14db9,	0x3e4e989e,	0xfda40b42,	0x7d7e1e3c,
-0x809f23d2,	0x08ecc884,	0xab90e259,	0xab05613c,
-0x89b0fe97,	0x4ec6aef5,	0x64f19b7f,	0xa36addbb,
-0x4617a47a,	0x7fb68f44,	0xcf3a8187,	0x73bb8e77,
-0xa1f2e1d7,	0x71520c84,	0x0fa10c2e,	0x79657a56,
-0x61382ff3,	0xbcccf548,	0x9513c9a7,	0x3aa91723,
-0xd92154e1,	0x5f03c0eb,	0xb5091f85,	0xf19fa6c8,
-0x1c030671,	0x4e2aadcd,	0x862fe82d,	0x4dcfcbcc,
-0xc14d5269,	0x377d3c35,	0x01a87aa2,	0x577a58af,
-0xa6742bfe,	0xe04b391f,	0xb8002f20,	0xdf2b4ca2,
-0x64687c4d,	0x99a4bcd9,	0x332a2d33,	0xe231e1db,
-0xc9260a6e,	0xdf875589,	0x08a8b612,	0xfcb595ef,
-0x23f09500,	0x50e4db67,	0x861ec8e6,	0x07ea2473,
-0xff5d36a8,	0x4f27405c,	0xfb749fb2,	0x33e3137c,
-0x20ecc68e,	0x04599816,	0x5ef94e92,	0x636eed16,
-0x0b1ce1e2,	0x54cc3aa7,	0x6190f4a9,	0xb92359ec,
-0x947af351,	0x62278aa5,	0xc22d8f72,	0x9d72c80e,
-0x614a9754,	0x622fc50b,	0x007e2b67,	0x45407b6b,
-0x7a971c77,	0xc2af3a88,	0xa8859226,	0x652f92e4,
-0x0cbe851d,	0x0ddac8fc,	0x055a1563,	0x738e03dd,
-0x85815f4a,	0xce351842,	0x7735df1f,	0x49bf9d17,
-0x8969b9bb,	0x6b2478f6,	0x7d1f345a,	0xde84d7e2,
-0x7459831e,	0xdff84c3d,	0xcc2f10a4,	0x057859d5,
-0xbf05b6a9,	0x8cfd5040,	0x4903c653,	0xb9ceaacc,
-0x14a480f9,	0xe940e680,	0x62f32cb8,	0x6a3bf1e1,
-0x6e789199,	0x6b452cec,	0xd9f43312,	0xe25fbbb0,
-0xd2fc5565,	0x5e5c5c41,	0xa158ba32,	0xb1364cef,
-0x3bad4552,	0x2a37d087,	0x1cdb0454,	0x6fcaf84a,
-0xf37bf4af,	0xb243ab15,	0xc1bea3e5,	0x7f71223d,
-0xfcc0db87,	0x70ebe1cd,	0xa7186158,	0x4645a50f,
-0x4a72862b,	0x11fadd77,	0x62b6e6e0,	0xa08cb439,
-0xc97c8822,	0xae5329e9,	0x6894e381,	0xbc3fd08c,
-0x63c4c376,	0x778dd3fa,	0xf44c10f8,	0x9b46c123,
-0x8c773ca7,	0xe244e31e,	0xbc5b1d7d,	0xf08dae13,
-0x5a31b2cd,	0x21cae60f,	0x7cabcf9c,	0x3e0b6758,
-0x10501f82,	0xb97123f6,	0x34a748e2,	0x6bbed71f,
-0x79a492a0,	0xc6699b20,	0xff168c13,	0xe1d97f5d,
-0xbc6ae406,	0xb646b08a,	0x266cf921,	0xa871108b,
-0xbc8b60fe,	0x1ebfb166,	0x6cce08de,	0xb00034af,
-0x8a1a4f8b,	0x829fe92b,	0xa8e583e2,	0x303ed627,
-0x05a53ec5,	0xcedd09a1,	0xcdef97dc,	0xd8b1f6f0,
-0xaf15302f,	0x3e4ea367,	0x489107de,	0x5de1ddf3,
-0x7df7536f,	0xa896063e,	0xdc7eac2e,	0x03d61f3a,
-0xceb7cd2a,	0x67d394f3,	0xdd55740e,	0xcd9f0261,
-0xb464b758,	0x1faaedea,	0xbd38f64c,	0x5d19669d,
-0x1eed1a6e,	0x378896dd,	0xa12125db,	0xd60ca695,
-0x6e57a927,	0x8d4cfeac,	0x01287003,	0xefebdd07,
-0x0321b83b,	0x8dcff5ea,	0xb5cf9c9e,	0x5069e7bd,
-0xe825acd2,	0x2931b1d3,	0x6ad92693,	0xf9533335,
-0xd81e1459,	0x447a6f19,	0x95968cba,	0x792f32c2,
-0xa1d0c696,	0x50b2f01b,	0xf3a86b83,	0x6aec7b50,
-0x7c10a30b,	0x9ee89fdd,	0xdf1da1c3,	0x93008b66,
-0xc7338c3e,	0x3fc4a6f1,	0x2440db04,	0x5af4d472,
-0xd6a97ffb,	0x0ef0ad4e,	0xf7e3e539,	0x7e7a2a6c,
-0x923a5f2c,	0x1c92899f,	0x7b77c20b,	0x97dd2cb5,
-0x18f2de94,	0x44d7d456,	0x30b80309,	0xcfcd3805,
-0x82e30950,	0x1925303b,	0x454dc11b,	0xec6b221d,
-0x0f8bedf9,	0x13de4182,	0xae7d58ff,	0xc402c383,
-0x91f59409,	0x29d16bbe,	0x176c6829,	0x09480ba9,
-0xdfc9bdf6,	0x55fe11bb,	0x37651128,	0xfa4ee4d9,
-0xb4402d81,	0x5fd0c7db,	0x0a9fc656,	0x9ee57273,
-0x89d5e62b,	0x85c6d82c,	0xb6cd38ef,	0xfbc92d77,
-0xc603cf52,	0xfe078444,	0x79898470,	0x63a8cbc4,
-0xdd505b69,	0xa86109fe,	0x275abfbf,	0x53ca2c0f,
-0x8ee944fd,	0xc7bdc79a,	0x6d78fce1,	0xe2f881e1,
-0x7e2cd470,	0x5fee2589,	0x22bd7a0a,	0xc7bc30b6,
-0x0c7b245b,	0x622635f7,	0xa47af1ee,	0x441b7b18,
-0x8a7844b1,	0xffc68a9c,	0xcc184eed,	0x1ed181c1,
-0x209bc922,	0x95d3ae63,	0x85473c01,	0x5bfdee3f,
-0x9ac84123,	0x67eadd46,	0x04f59544,	0x59dee63d,
-0x8beec8d6,	0x8eb0fd0c,	0xe4b401c3,	0x28af87fd,
-0xf9e5d950,	0xd0dcd7f1,	0xa2d102fc,	0x7d760ac0,
-0xaf60f23e,	0xfe7f9cfd,	0x6c4e5569,	0xc48404c0,
-0x20f70db3,	0x5284047f,	0x84531666,	0x7211d68f,
-0x1d66212f,	0x26d2ff3c,	0x65bb8205,	0x5aac72de,
-0x0374ae7d,	0x9a19357a,	0x3a5a1b86,	0x08b46aca,
-0x165dffae,	0xbe5e6627,	0xf0bb4e4e,	0xf2ec9668,
-0xcedc0f0e,	0x1b83a79d,	0x740ab91c,	0x96de1333,
-0x87ecdf4b,	0x7a067222,	0xac3976f2,	0xd189d422,
-0x3df7e716,	0x38e628d8,	0xf8d5dfc6,	0x33318c3e,
-0x24a01bcd,	0x5c407809,	0x030f162c,	0xea348e7b,
-0x025af892,	0xfc5ce7d4,	0xf514e75c,	0x1b2897ad,
-0x8b273855,	0xc9325d60,	0x18bfbd7e,	0x5ab46176,
-0xafc21fd7,	0xd1a31ed1,	0x5affa61b,	0xc269dc17,
-0xd0a434b6,	0x239de3fa,	0x932a997c,	0x27d5ed2d,
-0x7c97e199,	0x95d2107c,	0xfd5f0c2b,	0xe6ddd551,
-0x3c83d4db,	0xe9fef7bf,	0x7100d40f,	0xff2e2bfe,
-0x6207c328,	0x64fe3eed,	0x8564bad1,	0x8a22a5d5,
-0x2680e0bc,	0xef96cfa9,	0x97fe6f16,	0xf4763890,
-0xc5f419e0,	0x6d134077,	0xa1039662,	0x983b172c,
-0xb1658c3b,	0xc34a9db4,	0xd28139f7,	0x02492e22,
-0x96482c4f,	0x0bbe5c32,	0xdcbad6ea,	0x5ac0c984,
-0x35c83ab7,	0x28a02508,	0x77d2b173,	0xfec4fa49,
-0x98b07b39,	0xbc9de59a,	0x807c647d,	0x4ca3f1dc,
-0xd7ea0f95,	0x7068356a,	0x7df91f74,	0x5d133a96,
-0xa507a88b,	0xc38c7450,	0x5d97f8d8,	0x78d525d3,
-0xea37f381,	0xc82b6cb5,	0x70561a14,	0xcb1a38ff,
-0xa017c85b,	0x8fddaf7a,	0x359316ed,	0x1d350446,
-0x23858b98,	0xd72ac50a,	0x93d318fc,	0x121fda88,
-0x4cf0a4c1,	0x985b7f8d,	0x71be788b,	0xa4501ad4,
-0x2442e93e,	0x8f41d88d,	0x13e9ddc0,	0x3d255b28,
-0x41638767,	0x845386be,	0x101d6adb,	0x6179d046,
-0xf819653c,	0x221fc235,	0xc63c5658,	0x2f3ed4a1,
-0x18c39cc4,	0x1dcdf0a9,	0x4a835ed0,	0x5af69393,
-0xaff99ee0,	0xd936f5f6,	0x50f968da,	0xd2d790a0,
-0xafc41e2f,	0xa859fc9d,	0xf62f56cc,	0x4b0e57fe,
-0x4859c419,	0x099e051d,	0xe943e723,	0x6bb74299,
-0xac3dd8b8,	0x4649094a,	0x02c7379d,	0xfd9e13c6,
-0xd09fd22d,	0xf55b775e,	0x30506e94,	0x1f93f43c,
-0xb5baf9be,	0x8d6c3037,	0x2fe87ddb,	0x50f5a4b7,
-0x52713058,	0xc3b19388,	0x3c368001,	0xd0c5e0e9,
-0xd0966697,	0x9974617e,	0x2aa4d175,	0xa0f26861,
-0xa901f0a0,	0xbe44c6aa,	0xc59cc8d3,	0xc91c1978,
-0x05ba7521,	0xc01b5c45,	0xbd77ab62,	0xdfef7c7c,
-0x6713919d,	0xd8e9e2ab,	0x7b088c0e,	0xa4721b34,
-0x661d208a,	0xaddcab29,	0x87085e38,	0xb33df647,
-0xcc8e771b,	0x66fca58e,	0x1be5440d,	0x44094a70,
-0x924749f1,	0x14e19530,	0xb8b4d2eb,	0x725cbb9c,
-0xc03e0524,	0xa303eed1,	0x5701587c,	0xd4b73636,
-0xe3be0160,	0xffc6d34c,	0x3e88a7ba,	0xdad7b9c8,
-0x94277aa8,	0xe954b95b,	0xdeb92cd9,	0xaa638342,
-0x94d9b34c,	0xd71618ac,	0xc87934bd,	0xe96101d1,
-0x55d1976c,	0x471c8505,	0x7a36d839,	0x5d62a9ee,
-0xf3c54a8a,	0xa2be15d9,	0x244087c9,	0x042c8037,
-0x23224689,	0x281c5d73,	0x2139ecfc,	0xffb8bc8a,
-0x834fdd11,	0x9cd5a5bd,	0xa3368319,	0x7e5bef0c,
-0x4ae2dbda,	0x86d90089,	0x6675dfce,	0x48876262,
-0xcec72538,	0x11dc5c80,	0x86a730f9,	0x313565c9,
-0xe3e5be11,	0x106d7cce,	0x752b8be2,	0x3d00a5bc,
-0xe6f70e95,	0x44447ac8,	0x600df30c,	0x8335ac3b,
-0x8816ddee,	0x700982fe,	0xee495741,	0x48c7e81c,
-0xa3d55da2,	0xb0172982,	0x70ab2158,	0xd4460621,
-0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,	0xa8454763,
-0x70877bb6,	0x66005c97,	0xaf292c06,	0x7b843db1,
-0xf343b59b,	0x25cdc7b5,	0xa41da617,	0x9e9d895e,
-0xc936f475,	0x7270925a,	0x30024230,	0x8e72f53d,
-0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,	0xfc18a2a3,
-0xaf377cc1,	0xbff09a78,	0x4b4e0814,	0x95a0b2c1,
-0x270398de,	0x201fca94,	0x2a032a4f,	0x131542b4,
-0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,	0xa814ddc9,
-0xa3b3a991,	0x17ee60c2,	0x852c0b8d,	0x11e5853a,
-0x762002a7,	0x92c5311d,	0x0d4bf7e1,	0xfffec870,
-0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,	0x0111a772,
-0x9808e780,	0x29c336e8,	0xe9bc05df,	0x5bedde11,
-0x945565af,	0xaff808fe,	0x87e3423d,	0x4de6f98f,
-0x93b4adef,	0xbf704fa4,	0x09120e91,	0xd54f3692,
-0xdf8eab1e,	0xfabbf59c,	0xe74318be,	0xaab87ffc,
-0x29fa791c,	0xe3915552,	0xa652cb9b,	0xa1252e74,
-0xb35b723b,	0x542aa28b,	0x12fcc5b0,	0x3941f962,
-0x82bcc6cc,	0x47b11974,	0xb821611f,	0x78b34250,
-0xf1be5659,	0x561b9e61,	0x6f3bd501,	0x584e6f5c,
-0xd54ed547,	0xacebcd21,	0x7b5ff816,	0xb64ad233,
-0x9f2f330d,	0x69fb1ece,	0xac8710dd,	0x58dc6c60,
-0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,	0xebc0ce9d,
-0xa733274f,	0x884d9b55,	0x42b08b63,	0xafa54a74,
-0x1c7ccf64,	0x93a20191,	0xaaa3132e,	0xc69831d1,
-0x54634889,	0xfbfe3efc,	0xd3cf68d4,	0x302e3117,
-0xf5693131,	0xc3ce8c6c,	0x1f03cd89,	0x6243334c,
-0xf16bc80f,	0xdca5f130,	0xcb2cd956,	0x4c1bb421,
-0xe8de533c,	0x7f86703a,	0x29aa897e,	0xdd54acad,
-0x76b2f2ae,	0x7ef82b71,	0x2e30970b,	0xba402597,
-0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,	0x7f9efd1c,
-0x2363d147,	0x5327289a,	0xe89229f3,	0xd63a535c,
-0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,	0x26b6edfb,
-0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,	0x6d65db4c,
-0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,	0xe20e6dbb,
-0x8488a45f,	0x8ebc2932,	0xd4767316,	0x3e8c4b8a,
-0xbab7402c,	0xfc1e217e,	0xe5c5bf82,	0x6928fe2e,
-0xc88528e9,	0x4b2e4e8f,	0xdd938b86,	0x0c964f98,
-0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,	0x197d005a,
-0x4d40b3b3,	0xcf203155,	0x0d2fa621,	0x752d2c58,
-0xb12bac12,	0x1e7e8c23,	0x94215d54,	0x9854a71c,
-0x4de63c64,	0x7a012529,	0x9c171f8d,	0x9e71def7,
-0x3bd17d50,	0x11f175d9,	0xec78abf3,	0x7b529eee,
-0xd3a69fc3,	0x5b718676,	0x58214d29,	0xa8bd2c34,
-0x41ea00ab,	0xa03f64d6,	0x4ee342b0,	0x32b1e444,
-0x1c1801a4,	0xc8424702,	0x334a7e35,	0x50cf1543,
-0x3b22b495,	0x88683776,	0x8e2e0154,	0x6155c033,
-0x4e2fa6ac,	0x42ace700,	0x8d64f97c,	0xaf9ced17,
-0xb2a5cb92,	0xa558582d,	0x88705de7,	0x9e528d59,
-0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,	0x2722bfa2,
-0x10462123,	0x30080f7d,	0xb346cd81,	0x0049c396,

cpu/intel/model_1067x/microcode-m441067AA0B.h

diff --git a/cpu/intel/model_1067x/microcode-m441067AA0B.h b/cpu/intel/model_1067x/microcode-m441067AA0B.h
deleted file mode 100644
index 8a79cad..0000000
--- a/cpu/intel/model_1067x/microcode-m441067AA0B.h
+++ /dev/null
@@ -1,547 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m441067AA0B.inc  */
-0x00000001,	0x00000a0b,	0x09282010,	0x0001067a,
-0xb007e7b0,	0x00000001,	0x00000044,	0x00001fd0,
-0x00002000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x00000a0b,
-0x0000001a,	0xa4000000,	0x20100928,	0x00000401,
-0x00000001,	0x0001067a,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xf19298f2,	0xb55d1d07,	0xc234f4b1,	0xfd7a7091,
-0x54d9a9ee,	0x91c784e2,	0x2e051e9d,	0xbc9f70fd,
-0x170ce7c7,	0xd727c705,	0x019b1ba5,	0xe0414a29,
-0x57d45458,	0x26a8a411,	0x9faad966,	0x095ec8b0,
-0x083a7c2a,	0x17cfc70f,	0x3c8e78a8,	0xce18c419,
-0x5f2ddeb7,	0xc9c95d71,	0x437a5116,	0xe0253ad0,
-0xec78db42,	0x681e436f,	0x7fd028bb,	0x1149a501,
-0x0bdf0d05,	0xc2321514,	0xd6866cd8,	0x64942685,
-0x21e0276b,	0x0817a288,	0x09138669,	0x792985dc,
-0xbd60d6aa,	0xfbf902ec,	0x43fee69d,	0x5c5823c0,
-0x9dca1fe6,	0xb528b0c5,	0x22fd29ab,	0xac4fe251,
-0x77207813,	0x0637a1f9,	0x16bfcf73,	0x80497f6b,
-0xe5bca939,	0x1539fa1a,	0x66607fea,	0x2276c06f,
-0xd003229e,	0x3622fda7,	0x18d0b8af,	0x9f399760,
-0x3ac6387b,	0x6c7148fa,	0xfaf4df9f,	0x965db840,
-0x7c142542,	0x7b805f4c,	0x3f2002a3,	0x061399ce,
-0x2f1a03c4,	0x7f1c7616,	0xb2f9ab42,	0x4e6a92a2,
-0xb44b96d6,	0xe1167017,	0xec4b2fb3,	0xa15376be,
-0x00000011,	0xcbab246d,	0x70df053b,	0x61a71219,
-0x3fdbc153,	0xbd614857,	0x540ee622,	0xee92885e,
-0x92482c7d,	0xce0075e3,	0xe805283b,	0x5267144a,
-0xd710f435,	0xc1649352,	0x618294a6,	0x33176eb5,
-0xa15c8dd7,	0x62552413,	0xf6cdab97,	0x546c7f5b,
-0x32f8a79a,	0x2878ac67,	0xd38dd751,	0xc7fe68fa,
-0xeb6f2486,	0x861f4eec,	0xfd931933,	0xea7bd7c0,
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-0x5110c867,	0x3c050155,	0xf9b1b3f5,	0x98909489,
-0xfa0ee6bc,	0x038fb4ce,	0xbe1c9e33,	0x18f96bcd,
-0xa1635c9a,	0xff3e9374,	0x5b033171,	0x0b84bfd9,
-0x3c091bae,	0x6da61a4e,	0x07d81b5d,	0x3904ea3c,
-0x75f4e7f1,	0x3e70c12e,	0x9c70d835,	0x9a1ea5a6,
-0x4b99b705,	0x08f6ab89,	0x7649901c,	0xee3e7687,
-0xa3deb48c,	0xd74e8c78,	0xe8e120c3,	0x425d3d96,
-0x16f136bd,	0x0c7a32ef,	0x37a0ff53,	0x77b035e4,
-0xba8808c1,	0x1d3d8330,	0x8d224cce,	0xed789fed,
-0x550a8352,	0xe2715912,	0x185f62d1,	0xe301002a,
-0xbe2ed99b,	0xbb1dfd60,	0x9d22d8f9,	0xcbfa36d5,
-0xad7e92e0,	0xd2db61d4,	0x1df386f5,	0x92b5797c,
-0x00ac8ed1,	0x2f7470b1,	0x674e258b,	0x6689df79,
-0x135c5c1a,	0x87abbc50,	0x19ac082b,	0xe7f7d64c,
-0x24fd4922,	0x7eeadc29,	0xa0910eaa,	0x763231d6,
-0x23597ccb,	0x332f33c3,	0x93992b6a,	0x19c8937c,
-0x75d6a9f4,	0x221395e1,	0x662914d0,	0x997d7860,
-0xd196adeb,	0xa5402fd9,	0x8bd6f12f,	0xc31d97e0,
-0x304dd9dc,	0x72f35c72,	0x8ced870e,	0x1eef8a14,
-0x323321fa,	0xf193079f,	0x18026b1c,	0x5a1107a5,
-0x54979f4b,	0x6afee492,	0x04c012e6,	0x3446250c,
-0x25a691a8,	0xc19a76ea,	0x66bd5b14,	0x6250bd2d,
-0xc6c082d9,	0x67ea1d78,	0xbe68a7ef,	0x03f50dc8,
-0xd8f76566,	0xb6681752,	0x00e2b087,	0x7ed2e598,
-0x8c9cbc83,	0x103b03f5,	0xee4d2723,	0x67b3903f,
-0x1e057dec,	0xc5703ba6,	0xae0615f9,	0x1bce0df2,
-0xfd041279,	0xc874a2c3,	0x0a91d2fa,	0xac098457,
-0xc1efc5f9,	0xd48208eb,	0x72e9baa8,	0x184dc658,
-0x3d26b8b4,	0x90e2469d,	0x6d07f351,	0x3f6898a7,
-0x21e4de0b,	0x0fd04a43,	0x2c99cd2b,	0x44b28cdd,
-0xaf5483a5,	0xe50b9a12,	0xd98fe031,	0x9d6e8f08,
-0xf385ba19,	0x5e531cb0,	0xc545867a,	0x65f5ebf5,
-0x9f27ad5a,	0x2de11f0d,	0xef6f0970,	0x973b11f2,
-0x72228c07,	0xe13fdb84,	0xd2a7b46f,	0xc85a38db,
-0x331a9807,	0x3be38ebc,	0x3e7bf15d,	0xa82a1e68,
-0x4b42b5bc,	0x9871203e,	0x7d1e1e24,	0x12f57b6b,
-0xf5403ec8,	0x28746c33,	0xae20522f,	0xf6042fba,
-0x66bada5d,	0xbefe376f,	0xfd3773a5,	0xbb5fc6e8,
-0x34c0433d,	0x3cfc83e9,	0xd096736a,	0xa53be016,
-0xeba3dd6c,	0x2c626561,	0x3c160c8d,	0x8506c719,
-0x802e7b47,	0x16079396,	0x6d29b175,	0x4e91abb4,
-0xe350ce95,	0x0d481aa5,	0x94e95371,	0x10dc4dec,
-0xbfeb3735,	0x3ce3cb4d,	0x32ff742a,	0xac5ad3cb,

cpu/intel/model_1067x/microcode-m801067660F.h

diff --git a/cpu/intel/model_1067x/microcode-m801067660F.h b/cpu/intel/model_1067x/microcode-m801067660F.h
deleted file mode 100644
index 17e7c26..0000000
--- a/cpu/intel/model_1067x/microcode-m801067660F.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m801067660F.inc  */
-0x00000001,	0x0000060f,	0x09292010,	0x00010676,
-0x8fe1a1c7,	0x00000001,	0x00000080,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x0000060f,
-0x00000035,	0x2e000000,	0x20100928,	0x00000301,
-0x00000001,	0x00010676,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xcd5c7635,	0x1603940d,	0x976e7e8b,	0x02bac8d1,
-0x9be45039,	0x69a22250,	0x76d8821c,	0x3fefb30d,
-0x170ce7c7,	0xd727c705,	0x019b1ba5,	0xe0414a29,
-0x57d45458,	0x26a8a411,	0x9faad966,	0x095ec8b0,
-0x083a7c2a,	0x17cfc70f,	0x3c8e78a8,	0xce18c419,
-0x5f2ddeb7,	0xc9c95d71,	0x437a5116,	0xe0253ad0,
-0xec78db42,	0x681e436f,	0x7fd028bb,	0x1149a501,
-0x0bdf0d05,	0xc2321514,	0xd6866cd8,	0x64942685,
-0x21e0276b,	0x0817a288,	0x09138669,	0x792985dc,
-0xbd60d6aa,	0xfbf902ec,	0x43fee69d,	0x5c5823c0,
-0x9dca1fe6,	0xb528b0c5,	0x22fd29ab,	0xac4fe251,
-0x77207813,	0x0637a1f9,	0x16bfcf73,	0x80497f6b,
-0xe5bca939,	0x1539fa1a,	0x66607fea,	0x2276c06f,
-0xd003229e,	0x3622fda7,	0x18d0b8af,	0x9f399760,
-0x3ac6387b,	0x6c7148fa,	0xfaf4df9f,	0x965db840,
-0x7c142542,	0x7b805f4c,	0x3f2002a3,	0x061399ce,
-0x2f1a03c4,	0x7f1c7616,	0xb2f9ab42,	0x4e6a92a2,
-0xb44b96d6,	0xe1167017,	0xec4b2fb3,	0xa15376be,
-0x00000011,	0x0788335a,	0x28facca9,	0xbf2e27da,
-0xebd0c3e5,	0x6e2bf3d3,	0x1291c903,	0x1b6f078f,
-0xb9fa90d0,	0x08dafe1d,	0xd3597151,	0xc19ebdfc,
-0x5979ae2d,	0x4dbac714,	0xfe524484,	0x113ace1c,
-0x00e8b78c,	0xdbfcb209,	0x578f12c8,	0xa0a9a9a4,
-0x75cbba05,	0x465b7ad3,	0xd7a0400c,	0x78c872fd,
-0x58e583ad,	0x89833f8a,	0x06682ef2,	0x2b171402,
-0x7dce156e,	0x03d0960a,	0xa49efcec,	0xe2571f5d,
-0x0e78dbcf,	0x344dbcb5,	0x742d5af8,	0x151b31b5,
-0xe7305747,	0x3e7ca578,	0x60fbc463,	0x850a9838,
-0x10006766,	0x70f8c433,	0x033bab69,	0xc4871830,
-0x41eac63f,	0x78886cad,	0x5631a48e,	0x01a4dbca,
-0xfe92aa1b,	0x0a0d0ea2,	0x7e74d7af,	0x9297e473,
-0x1c04148a,	0x6f60c9b8,	0xd2f3bac6,	0xd4664494,
-0xf5e57c3c,	0x4bf483a2,	0xa87a6675,	0xd4c0634d,
-0x90ec0d11,	0x9affdc7a,	0x31c0f085,	0xe70154b4,
-0x0f6042e1,	0xb0a44492,	0xd6978645,	0xb0d6bdd8,
-0x16a408ce,	0xbe208d45,	0xfde84e47,	0x357b93d5,
-0x197beb3f,	0xffdd29ff,	0x4a5895d6,	0x8354ce1c,
-0xb47f4fe8,	0xd162dfe5,	0x9805816d,	0xd6c09438,
-0x0f1db09b,	0x4a7fd1e0,	0x1e260e75,	0xcb1064c8,
-0xbe41a45a,	0x715047b5,	0x0a1ad754,	0x968231ee,
-0x4f156004,	0x6a37fee6,	0xab2d3034,	0x147ee014,
-0xdc7471b2,	0xa5f20a4e,	0xdc803518,	0x8adeba3e,
-0xb960d413,	0x51f60de9,	0x015914f4,	0xd32542b6,
-0x007a7f34,	0x96910cbe,	0x948e5d84,	0xb305ebc5,
-0x99d34cba,	0x30d334ae,	0xd38198fa,	0x14767c49,
-0x4c15d5b0,	0xf4371db4,	0xeef4cfbb,	0x4256b5d7,
-0x41ce6de0,	0x8840ba88,	0x99d0d63b,	0xfe90fb19,
-0x8e4ef36a,	0x728827f6,	0x0b676dad,	0x377239b5,
-0xff0c85a8,	0xd954058e,	0x04d26bbd,	0x9ea520ca,
-0x42c6f7a0,	0xe99386d4,	0xbd4f820f,	0x27b217bd,
-0xd2cbf0d3,	0x5a6ece4b,	0xed82c4bf,	0xb7d4c10c,
-0x9aa0e173,	0xb4d7721a,	0x990637ed,	0x58e2f40b,
-0x6cd2d564,	0x2d58e6aa,	0x1e3f5330,	0xd724d2dc,
-0xfca0c657,	0x68cd14bf,	0x6117e696,	0xe48c6c00,
-0x95c75bb2,	0x949a702e,	0x7823d834,	0xafb0c045,
-0xef4f6c0b,	0x5c4c00f1,	0xc0a7edc6,	0xe7397e19,
-0x8eaec8c3,	0x298d9212,	0x4afc4fa6,	0x24cca594,
-0x5b0345f8,	0xbde656d9,	0xb6a9199e,	0x6788166d,
-0xf6a9766a,	0x7d6efd02,	0xbe989743,	0x53db6a53,
-0x26acebc6,	0x0c661c7c,	0xba39c1ac,	0x46fe6a74,
-0x33743b7f,	0x60389f01,	0x26445dae,	0xd9e2dbbd,
-0x723821dc,	0x935a8568,	0x07d28911,	0x1003b007,
-0xffd0470d,	0x1c7ec08d,	0xab13ae7c,	0xa471a700,
-0x61af6580,	0xb2149237,	0xa68d4884,	0x96e29cb5,
-0x9ed0fea3,	0x7179142e,	0xbdc41838,	0x66508f94,
-0x3fc14db9,	0x3e4e989e,	0xfda40b42,	0x7d7e1e3c,
-0x809f23d2,	0x08ecc884,	0xab90e259,	0xab05613c,
-0x89b0fe97,	0x4ec6aef5,	0x64f19b7f,	0xa36addbb,
-0x4617a47a,	0x7fb68f44,	0xcf3a8187,	0x73bb8e77,
-0xa1f2e1d7,	0x71520c84,	0x0fa10c2e,	0x79657a56,
-0x61382ff3,	0xbcccf548,	0x9513c9a7,	0x3aa91723,
-0xd92154e1,	0x5f03c0eb,	0xb5091f85,	0xf19fa6c8,
-0x1c030671,	0x4e2aadcd,	0x862fe82d,	0x4dcfcbcc,
-0xc14d5269,	0x377d3c35,	0x01a87aa2,	0x577a58af,
-0xa6742bfe,	0xe04b391f,	0xb8002f20,	0xdf2b4ca2,
-0x64687c4d,	0x99a4bcd9,	0x332a2d33,	0xe231e1db,
-0xc9260a6e,	0xdf875589,	0x08a8b612,	0xfcb595ef,
-0x23f09500,	0x50e4db67,	0x861ec8e6,	0x07ea2473,
-0xff5d36a8,	0x4f27405c,	0xfb749fb2,	0x33e3137c,
-0x20ecc68e,	0x04599816,	0x5ef94e92,	0x636eed16,
-0x0b1ce1e2,	0x54cc3aa7,	0x6190f4a9,	0xb92359ec,
-0x947af351,	0x62278aa5,	0xc22d8f72,	0x9d72c80e,
-0x614a9754,	0x622fc50b,	0x007e2b67,	0x45407b6b,
-0x7a971c77,	0xc2af3a88,	0xa8859226,	0x652f92e4,
-0x0cbe851d,	0x0ddac8fc,	0x055a1563,	0x738e03dd,
-0x85815f4a,	0xce351842,	0x7735df1f,	0x49bf9d17,
-0x8969b9bb,	0x6b2478f6,	0x7d1f345a,	0xde84d7e2,
-0x7459831e,	0xdff84c3d,	0xcc2f10a4,	0x057859d5,
-0xbf05b6a9,	0x8cfd5040,	0x4903c653,	0xb9ceaacc,
-0x14a480f9,	0xe940e680,	0x62f32cb8,	0x6a3bf1e1,
-0x6e789199,	0x6b452cec,	0xd9f43312,	0xe25fbbb0,
-0xd2fc5565,	0x5e5c5c41,	0xa158ba32,	0xb1364cef,
-0x3bad4552,	0x2a37d087,	0x1cdb0454,	0x6fcaf84a,
-0xf37bf4af,	0xb243ab15,	0xc1bea3e5,	0x7f71223d,
-0xfcc0db87,	0x70ebe1cd,	0xa7186158,	0x4645a50f,
-0x4a72862b,	0x11fadd77,	0x62b6e6e0,	0xa08cb439,
-0xc97c8822,	0xae5329e9,	0x6894e381,	0xbc3fd08c,
-0x63c4c376,	0x778dd3fa,	0xf44c10f8,	0x9b46c123,
-0x8c773ca7,	0xe244e31e,	0xbc5b1d7d,	0xf08dae13,
-0x5a31b2cd,	0x21cae60f,	0x7cabcf9c,	0x3e0b6758,
-0x10501f82,	0xb97123f6,	0x34a748e2,	0x6bbed71f,
-0x79a492a0,	0xc6699b20,	0xff168c13,	0xe1d97f5d,
-0xbc6ae406,	0xb646b08a,	0x266cf921,	0xa871108b,
-0xbc8b60fe,	0x1ebfb166,	0x6cce08de,	0xb00034af,
-0x8a1a4f8b,	0x829fe92b,	0xa8e583e2,	0x303ed627,
-0x05a53ec5,	0xcedd09a1,	0xcdef97dc,	0xd8b1f6f0,
-0xaf15302f,	0x3e4ea367,	0x489107de,	0x5de1ddf3,
-0x7df7536f,	0xa896063e,	0xdc7eac2e,	0x03d61f3a,
-0xceb7cd2a,	0x67d394f3,	0xdd55740e,	0xcd9f0261,
-0xb464b758,	0x1faaedea,	0xbd38f64c,	0x5d19669d,
-0x1eed1a6e,	0x378896dd,	0xa12125db,	0xd60ca695,
-0x6e57a927,	0x8d4cfeac,	0x01287003,	0xefebdd07,
-0x0321b83b,	0x8dcff5ea,	0xb5cf9c9e,	0x5069e7bd,
-0xe825acd2,	0x2931b1d3,	0x6ad92693,	0xf9533335,
-0xd81e1459,	0x447a6f19,	0x95968cba,	0x792f32c2,
-0xa1d0c696,	0x50b2f01b,	0xf3a86b83,	0x6aec7b50,
-0x7c10a30b,	0x9ee89fdd,	0xdf1da1c3,	0x93008b66,
-0xc7338c3e,	0x3fc4a6f1,	0x2440db04,	0x5af4d472,
-0xd6a97ffb,	0x0ef0ad4e,	0xf7e3e539,	0x7e7a2a6c,
-0x923a5f2c,	0x1c92899f,	0x7b77c20b,	0x97dd2cb5,
-0x18f2de94,	0x44d7d456,	0x30b80309,	0xcfcd3805,
-0x82e30950,	0x1925303b,	0x454dc11b,	0xec6b221d,
-0x0f8bedf9,	0x13de4182,	0xae7d58ff,	0xc402c383,
-0x91f59409,	0x29d16bbe,	0x176c6829,	0x09480ba9,
-0xdfc9bdf6,	0x55fe11bb,	0x37651128,	0xfa4ee4d9,
-0xb4402d81,	0x5fd0c7db,	0x0a9fc656,	0x9ee57273,
-0x89d5e62b,	0x85c6d82c,	0xb6cd38ef,	0xfbc92d77,
-0xc603cf52,	0xfe078444,	0x79898470,	0x63a8cbc4,
-0xdd505b69,	0xa86109fe,	0x275abfbf,	0x53ca2c0f,
-0x8ee944fd,	0xc7bdc79a,	0x6d78fce1,	0xe2f881e1,
-0x7e2cd470,	0x5fee2589,	0x22bd7a0a,	0xc7bc30b6,
-0x0c7b245b,	0x622635f7,	0xa47af1ee,	0x441b7b18,
-0x8a7844b1,	0xffc68a9c,	0xcc184eed,	0x1ed181c1,
-0x209bc922,	0x95d3ae63,	0x85473c01,	0x5bfdee3f,
-0x9ac84123,	0x67eadd46,	0x04f59544,	0x59dee63d,
-0x8beec8d6,	0x8eb0fd0c,	0xe4b401c3,	0x28af87fd,
-0xf9e5d950,	0xd0dcd7f1,	0xa2d102fc,	0x7d760ac0,
-0xaf60f23e,	0xfe7f9cfd,	0x6c4e5569,	0xc48404c0,
-0x20f70db3,	0x5284047f,	0x84531666,	0x7211d68f,
-0x1d66212f,	0x26d2ff3c,	0x65bb8205,	0x5aac72de,
-0x0374ae7d,	0x9a19357a,	0x3a5a1b86,	0x08b46aca,
-0x165dffae,	0xbe5e6627,	0xf0bb4e4e,	0xf2ec9668,
-0xcedc0f0e,	0x1b83a79d,	0x740ab91c,	0x96de1333,
-0x87ecdf4b,	0x7a067222,	0xac3976f2,	0xd189d422,
-0x3df7e716,	0x38e628d8,	0xf8d5dfc6,	0x33318c3e,
-0x24a01bcd,	0x5c407809,	0x030f162c,	0xea348e7b,
-0x025af892,	0xfc5ce7d4,	0xf514e75c,	0x1b2897ad,
-0x8b273855,	0xc9325d60,	0x18bfbd7e,	0x5ab46176,
-0xafc21fd7,	0xd1a31ed1,	0x5affa61b,	0xc269dc17,
-0xd0a434b6,	0x239de3fa,	0x932a997c,	0x27d5ed2d,
-0x7c97e199,	0x95d2107c,	0xfd5f0c2b,	0xe6ddd551,
-0x3c83d4db,	0xe9fef7bf,	0x7100d40f,	0xff2e2bfe,
-0x6207c328,	0x64fe3eed,	0x8564bad1,	0x8a22a5d5,
-0x2680e0bc,	0xef96cfa9,	0x97fe6f16,	0xf4763890,
-0xc5f419e0,	0x6d134077,	0xa1039662,	0x983b172c,
-0xb1658c3b,	0xc34a9db4,	0xd28139f7,	0x02492e22,
-0x96482c4f,	0x0bbe5c32,	0xdcbad6ea,	0x5ac0c984,
-0x35c83ab7,	0x28a02508,	0x77d2b173,	0xfec4fa49,
-0x98b07b39,	0xbc9de59a,	0x807c647d,	0x4ca3f1dc,
-0xd7ea0f95,	0x7068356a,	0x7df91f74,	0x5d133a96,
-0xa507a88b,	0xc38c7450,	0x5d97f8d8,	0x78d525d3,
-0xea37f381,	0xc82b6cb5,	0x70561a14,	0xcb1a38ff,
-0xa017c85b,	0x8fddaf7a,	0x359316ed,	0x1d350446,
-0x23858b98,	0xd72ac50a,	0x93d318fc,	0x121fda88,
-0x4cf0a4c1,	0x985b7f8d,	0x71be788b,	0xa4501ad4,
-0x2442e93e,	0x8f41d88d,	0x13e9ddc0,	0x3d255b28,
-0x41638767,	0x845386be,	0x101d6adb,	0x6179d046,
-0xf819653c,	0x221fc235,	0xc63c5658,	0x2f3ed4a1,
-0x18c39cc4,	0x1dcdf0a9,	0x4a835ed0,	0x5af69393,
-0xaff99ee0,	0xd936f5f6,	0x50f968da,	0xd2d790a0,
-0xafc41e2f,	0xa859fc9d,	0xf62f56cc,	0x4b0e57fe,
-0x4859c419,	0x099e051d,	0xe943e723,	0x6bb74299,
-0xac3dd8b8,	0x4649094a,	0x02c7379d,	0xfd9e13c6,
-0xd09fd22d,	0xf55b775e,	0x30506e94,	0x1f93f43c,
-0xb5baf9be,	0x8d6c3037,	0x2fe87ddb,	0x50f5a4b7,
-0x52713058,	0xc3b19388,	0x3c368001,	0xd0c5e0e9,
-0xd0966697,	0x9974617e,	0x2aa4d175,	0xa0f26861,
-0xa901f0a0,	0xbe44c6aa,	0xc59cc8d3,	0xc91c1978,
-0x05ba7521,	0xc01b5c45,	0xbd77ab62,	0xdfef7c7c,
-0x6713919d,	0xd8e9e2ab,	0x7b088c0e,	0xa4721b34,
-0x661d208a,	0xaddcab29,	0x87085e38,	0xb33df647,
-0xcc8e771b,	0x66fca58e,	0x1be5440d,	0x44094a70,
-0x924749f1,	0x14e19530,	0xb8b4d2eb,	0x725cbb9c,
-0xc03e0524,	0xa303eed1,	0x5701587c,	0xd4b73636,
-0xe3be0160,	0xffc6d34c,	0x3e88a7ba,	0xdad7b9c8,
-0x94277aa8,	0xe954b95b,	0xdeb92cd9,	0xaa638342,
-0x94d9b34c,	0xd71618ac,	0xc87934bd,	0xe96101d1,
-0x55d1976c,	0x471c8505,	0x7a36d839,	0x5d62a9ee,
-0xf3c54a8a,	0xa2be15d9,	0x244087c9,	0x042c8037,
-0x23224689,	0x281c5d73,	0x2139ecfc,	0xffb8bc8a,
-0x834fdd11,	0x9cd5a5bd,	0xa3368319,	0x7e5bef0c,
-0x4ae2dbda,	0x86d90089,	0x6675dfce,	0x48876262,
-0xcec72538,	0x11dc5c80,	0x86a730f9,	0x313565c9,
-0xe3e5be11,	0x106d7cce,	0x752b8be2,	0x3d00a5bc,
-0xe6f70e95,	0x44447ac8,	0x600df30c,	0x8335ac3b,
-0x8816ddee,	0x700982fe,	0xee495741,	0x48c7e81c,
-0xa3d55da2,	0xb0172982,	0x70ab2158,	0xd4460621,
-0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,	0xa8454763,
-0x70877bb6,	0x66005c97,	0xaf292c06,	0x7b843db1,
-0xf343b59b,	0x25cdc7b5,	0xa41da617,	0x9e9d895e,
-0xc936f475,	0x7270925a,	0x30024230,	0x8e72f53d,
-0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,	0xfc18a2a3,
-0xaf377cc1,	0xbff09a78,	0x4b4e0814,	0x95a0b2c1,
-0x270398de,	0x201fca94,	0x2a032a4f,	0x131542b4,
-0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,	0xa814ddc9,
-0xa3b3a991,	0x17ee60c2,	0x852c0b8d,	0x11e5853a,
-0x762002a7,	0x92c5311d,	0x0d4bf7e1,	0xfffec870,
-0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,	0x0111a772,
-0x9808e780,	0x29c336e8,	0xe9bc05df,	0x5bedde11,
-0x945565af,	0xaff808fe,	0x87e3423d,	0x4de6f98f,
-0x93b4adef,	0xbf704fa4,	0x09120e91,	0xd54f3692,
-0xdf8eab1e,	0xfabbf59c,	0xe74318be,	0xaab87ffc,
-0x29fa791c,	0xe3915552,	0xa652cb9b,	0xa1252e74,
-0xb35b723b,	0x542aa28b,	0x12fcc5b0,	0x3941f962,
-0x82bcc6cc,	0x47b11974,	0xb821611f,	0x78b34250,
-0xf1be5659,	0x561b9e61,	0x6f3bd501,	0x584e6f5c,
-0xd54ed547,	0xacebcd21,	0x7b5ff816,	0xb64ad233,
-0x9f2f330d,	0x69fb1ece,	0xac8710dd,	0x58dc6c60,
-0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,	0xebc0ce9d,
-0xa733274f,	0x884d9b55,	0x42b08b63,	0xafa54a74,
-0x1c7ccf64,	0x93a20191,	0xaaa3132e,	0xc69831d1,
-0x54634889,	0xfbfe3efc,	0xd3cf68d4,	0x302e3117,
-0xf5693131,	0xc3ce8c6c,	0x1f03cd89,	0x6243334c,
-0xf16bc80f,	0xdca5f130,	0xcb2cd956,	0x4c1bb421,
-0xe8de533c,	0x7f86703a,	0x29aa897e,	0xdd54acad,
-0x76b2f2ae,	0x7ef82b71,	0x2e30970b,	0xba402597,
-0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,	0x7f9efd1c,
-0x2363d147,	0x5327289a,	0xe89229f3,	0xd63a535c,
-0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,	0x26b6edfb,
-0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,	0x6d65db4c,
-0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,	0xe20e6dbb,
-0x8488a45f,	0x8ebc2932,	0xd4767316,	0x3e8c4b8a,
-0xbab7402c,	0xfc1e217e,	0xe5c5bf82,	0x6928fe2e,
-0xc88528e9,	0x4b2e4e8f,	0xdd938b86,	0x0c964f98,
-0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,	0x197d005a,
-0x4d40b3b3,	0xcf203155,	0x0d2fa621,	0x752d2c58,
-0xb12bac12,	0x1e7e8c23,	0x94215d54,	0x9854a71c,
-0x4de63c64,	0x7a012529,	0x9c171f8d,	0x9e71def7,
-0x3bd17d50,	0x11f175d9,	0xec78abf3,	0x7b529eee,
-0xd3a69fc3,	0x5b718676,	0x58214d29,	0xa8bd2c34,
-0x41ea00ab,	0xa03f64d6,	0x4ee342b0,	0x32b1e444,
-0x1c1801a4,	0xc8424702,	0x334a7e35,	0x50cf1543,
-0x3b22b495,	0x88683776,	0x8e2e0154,	0x6155c033,
-0x4e2fa6ac,	0x42ace700,	0x8d64f97c,	0xaf9ced17,
-0xb2a5cb92,	0xa558582d,	0x88705de7,	0x9e528d59,
-0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,	0x2722bfa2,
-0x10462123,	0x30080f7d,	0xb346cd81,	0x0049c396,

cpu/intel/model_1067x/microcode-mA01067AA0B.h

diff --git a/cpu/intel/model_1067x/microcode-mA01067AA0B.h b/cpu/intel/model_1067x/microcode-mA01067AA0B.h
deleted file mode 100644
index b4e4154..0000000
--- a/cpu/intel/model_1067x/microcode-mA01067AA0B.h
+++ /dev/null
@@ -1,547 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  mA01067AA0B.inc  */
-0x00000001,	0x00000a0b,	0x09282010,	0x0001067a,
-0xb007e754,	0x00000001,	0x000000a0,	0x00001fd0,
-0x00002000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x00000a0b,
-0x0000001a,	0xa4000000,	0x20100928,	0x00000401,
-0x00000001,	0x0001067a,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xf19298f2,	0xb55d1d07,	0xc234f4b1,	0xfd7a7091,
-0x54d9a9ee,	0x91c784e2,	0x2e051e9d,	0xbc9f70fd,
-0x170ce7c7,	0xd727c705,	0x019b1ba5,	0xe0414a29,
-0x57d45458,	0x26a8a411,	0x9faad966,	0x095ec8b0,
-0x083a7c2a,	0x17cfc70f,	0x3c8e78a8,	0xce18c419,
-0x5f2ddeb7,	0xc9c95d71,	0x437a5116,	0xe0253ad0,
-0xec78db42,	0x681e436f,	0x7fd028bb,	0x1149a501,
-0x0bdf0d05,	0xc2321514,	0xd6866cd8,	0x64942685,
-0x21e0276b,	0x0817a288,	0x09138669,	0x792985dc,
-0xbd60d6aa,	0xfbf902ec,	0x43fee69d,	0x5c5823c0,
-0x9dca1fe6,	0xb528b0c5,	0x22fd29ab,	0xac4fe251,
-0x77207813,	0x0637a1f9,	0x16bfcf73,	0x80497f6b,
-0xe5bca939,	0x1539fa1a,	0x66607fea,	0x2276c06f,
-0xd003229e,	0x3622fda7,	0x18d0b8af,	0x9f399760,
-0x3ac6387b,	0x6c7148fa,	0xfaf4df9f,	0x965db840,
-0x7c142542,	0x7b805f4c,	0x3f2002a3,	0x061399ce,
-0x2f1a03c4,	0x7f1c7616,	0xb2f9ab42,	0x4e6a92a2,
-0xb44b96d6,	0xe1167017,	0xec4b2fb3,	0xa15376be,
-0x00000011,	0xcbab246d,	0x70df053b,	0x61a71219,
-0x3fdbc153,	0xbd614857,	0x540ee622,	0xee92885e,
-0x92482c7d,	0xce0075e3,	0xe805283b,	0x5267144a,
-0xd710f435,	0xc1649352,	0x618294a6,	0x33176eb5,
-0xa15c8dd7,	0x62552413,	0xf6cdab97,	0x546c7f5b,
-0x32f8a79a,	0x2878ac67,	0xd38dd751,	0xc7fe68fa,
-0xeb6f2486,	0x861f4eec,	0xfd931933,	0xea7bd7c0,
-0x4e662289,	0xeb85338d,	0x4852055b,	0x1126ad76,
-0xc1d9c90f,	0x0679163c,	0xcbf72e04,	0xc7e4f752,
-0x7163ac25,	0x1b6af13d,	0xa7a7ed34,	0x4bc39e15,
-0x1559beed,	0xa66854c5,	0x84fdd32d,	0xae65f9a3,
-0xddd634dd,	0x1fd976b7,	0x676760d3,	0x0e950f64,
-0x5e25ac32,	0xf8cfdae7,	0x2a99e14a,	0xf619a0f8,
-0x8836b515,	0x73f04da7,	0x7a5ec90a,	0x95967f97,
-0xe34c4939,	0xa8552a60,	0xe787af38,	0xd18a687c,
-0xcd91c0a2,	0xfce8d0e4,	0x0ce7e292,	0x2c1e29bc,
-0x0b2776b3,	0x9263c4ca,	0xa5c0fd52,	0x8484cfd9,
-0xa3254cfa,	0x245b3f84,	0x92c10e17,	0xeaa29019,
-0x4d4f91e8,	0xa95db909,	0x905ae7e2,	0xdc0da4d6,
-0xc24cd0f1,	0x497ac725,	0xe568bd06,	0x7886d8da,
-0xd48671d9,	0x0235baab,	0x82dab634,	0xe95fb40b,
-0x952da92a,	0x6c9958d0,	0x88edc031,	0xbe018989,
-0x04c60b62,	0xefccf9c0,	0x0e64e1c7,	0x813aa16f,
-0xa2b6a00f,	0x1b9b7be0,	0xadbda597,	0xe92fb34e,
-0x296a7cb9,	0x7de766a5,	0x9a5c36e8,	0xd312ebf5,
-0x44d3bd3f,	0xc1df58cd,	0x9b1ed038,	0x35cf19d6,
-0x08eaab1a,	0x1e62df5d,	0x50c435bf,	0x085bfe8b,
-0xd262fce0,	0x289c6d4a,	0x73f22a6a,	0x9ff17903,
-0x42085e0d,	0x85e146c7,	0xf7c76ee2,	0x7b0a9e7c,
-0x932c8932,	0x3167779b,	0xef5f94ae,	0xecdb6606,
-0xed4ba5e9,	0x3a517395,	0x0a2a76a5,	0x86913204,
-0x32567986,	0x92aa6f3c,	0xcad76898,	0xb9ce2037,
-0x1df100bc,	0x8d4e5b3c,	0x12a1856d,	0xfda5dd25,
-0x2abf0bc2,	0x98e1bb97,	0x2bd420e5,	0x63cb479a,
-0xf19cb965,	0xb743c0cb,	0xb789f2b8,	0xec299e57,
-0xa6370754,	0x2f0a6afd,	0x8e198e61,	0xb9875af3,
-0x0354f509,	0x6809768c,	0xd54dff82,	0x1e873e57,
-0xdf1c742d,	0x227f70cf,	0x09306c7f,	0x40a67199,
-0xccffb4d3,	0x3607ada0,	0xf8925ab9,	0x216ce6bd,
-0x5b7bfc41,	0x3bdbcf4f,	0x814dbaa0,	0xf0c07127,
-0x50f0e147,	0x609f0978,	0xa2e1e6b8,	0x7b568062,
-0xa558271f,	0xe5742b5d,	0xc686c06d,	0xc3a67b91,
-0x5fcfd501,	0xb537d556,	0x6e5dc192,	0x5dcb4c62,
-0x185066c0,	0x35e2962e,	0xaede1642,	0x2a80adfc,
-0x7a6643a7,	0x9ddf8d22,	0x201c988d,	0xb1e56ae0,
-0xc2db3ca0,	0xc0b39180,	0x9baf2f79,	0x81c86e4e,
-0x739b37e2,	0x801324ce,	0xa9d3ea44,	0x0f9e7231,
-0x6f56f2d5,	0x8f3ee54f,	0xd0d0190e,	0x043e172a,
-0x2cffa43f,	0xfa062d4e,	0x01692ad6,	0x734655e1,
-0x5712e619,	0x27561b88,	0x49b2b280,	0x794a35bb,
-0xa472d378,	0x23648dd9,	0x1202d179,	0xb310a407,
-0x33040af4,	0x85fb6aee,	0xd77e905c,	0x840995ba,
-0xbd231096,	0x5c92aac7,	0xc2c7936a,	0x7919a063,
-0xd80bbb0e,	0xaea840b9,	0xb284b2f0,	0x0311a9dd,
-0x973646c8,	0xc6ca268a,	0xb24d83c3,	0x1265af39,
-0x9afef0bf,	0xf49c72f9,	0x0d11dc4f,	0x548f1013,
-0xe25414d5,	0x0accee4f,	0x1249c8d1,	0x92369ac1,
-0x042b56ff,	0x377878e4,	0xfa22e739,	0x7e2a25a2,
-0x11418d32,	0x3f6c831e,	0x3af2e1e9,	0x74238236,
-0xa61232a4,	0x397ae44f,	0x5c5e4b39,	0xf9ce3b59,
-0x1240ef10,	0xb3e38493,	0x21fa36fa,	0x009876a6,
-0xd64989a1,	0x820ef8fb,	0xeff73b2b,	0xa468d086,
-0x50f692c0,	0xfa4daf2a,	0x0c8217ea,	0xc0222f8c,
-0xb2c25f05,	0x65d4f046,	0x35125bba,	0x75446a86,
-0x29c90279,	0x62dc34d5,	0x07beefaf,	0xc350f8d6,
-0xbf50f404,	0x0114ec40,	0x1fdc9b27,	0x2d5beada,
-0xfad87b9a,	0xd86c6201,	0xce0cd023,	0x1b0dc432,
-0x33554d83,	0x7e4d9618,	0xa6b54da4,	0xdef74e92,
-0x7d79f7b9,	0x835b6796,	0x54789d6a,	0xa60f6673,
-0x4ccb5e69,	0x1d7d8f07,	0x88a4c651,	0xa67fe1d6,
-0xc0fa14be,	0x8c7771c4,	0x787b7ccc,	0xf733947d,
-0x2588b385,	0x79c2aaae,	0xa871589f,	0xd17ead89,
-0xc7efb650,	0xe4e971f6,	0x8d2e84cc,	0x252acd23,
-0x5574dccf,	0x213051e0,	0x4bf0a35a,	0x0af2c866,
-0x5d37fc1d,	0x2abc809e,	0xb432695c,	0x26af6c61,
-0xba409686,	0x10411d48,	0x4edf888c,	0x86e745b4,
-0x0259d26f,	0x19a3bef8,	0x8bf2260b,	0xa74be774,
-0xce68110e,	0xa8d71177,	0xdfa96e70,	0x053a9a12,
-0x61dd6149,	0x2b14ea2c,	0xba78b4b7,	0xdd2b254b,
-0xea6aea95,	0xf6eb22a6,	0xa04232b0,	0xbd8939af,
-0x1aa3efb7,	0x4a7b99f7,	0xd251e6f5,	0x6fbcf35c,
-0x08613ea6,	0x9440a552,	0x9e01b4bd,	0xfbf5ede2,
-0x4c05285f,	0xd8240fb4,	0xbc7e2ca8,	0xbb157a52,
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-0xcba5543d,	0xdf7e1e2d,	0x6998a8af,	0x98ce6c08,
-0x89de731a,	0x943a3510,	0xb36ead85,	0xd5258d4b,
-0x1cd6df61,	0x82a5c59d,	0xd078e7a4,	0xa33d4317,
-0x24dc45f8,	0x3f3daf27,	0x0478bc6f,	0x92dfa16c,
-0x952a872e,	0x7a34e03f,	0x0f088084,	0xa40937fe,
-0x38fc7749,	0xa157e8a4,	0xbce94344,	0x7045ff7b,
-0xf3e1ab66,	0xe62a6058,	0x5564ff10,	0x38198f1e,
-0xf326f0f1,	0xe262bc0c,	0x2f0b851a,	0xc7bcbe11,
-0xe79f1d1a,	0xc2f93c29,	0x54f3ea9f,	0x8f8f9141,
-0x9f45e13c,	0x7a5b86bd,	0xa764efd8,	0x35f04729,
-0xdd8c4b54,	0x5fa12e51,	0xa5824af9,	0xad328f71,
-0x0f11fbb9,	0x9048e950,	0x04d7a900,	0x02538d1f,
-0x99f745b7,	0xe31f63bb,	0x2c4e3d78,	0x7cdb9245,
-0xa3966ee7,	0x27c4433a,	0xe1d79f3e,	0xe640fa06,
-0x79ce31eb,	0xf25634fa,	0xdd9ce5cb,	0xb7fab8d2,
-0x2f1f0ff2,	0x2acb625c,	0xa0494989,	0x206d7f11,
-0xf268b8ca,	0x292bbf9f,	0x763bd7d0,	0xea4b14fc,
-0x9d3d6aeb,	0x64cca57e,	0x6fc3e29e,	0x3e7bf4bf,
-0x90efc7e3,	0x08e39173,	0xd05bee2c,	0x5b3c8f37,
-0x0921ec6f,	0x3371b715,	0xb324e114,	0xe3abc53f,
-0x576b18f8,	0xc4469024,	0xb2ded6c6,	0xe7783782,
-0xc0a1fd5d,	0xcf324bde,	0x97527c8e,	0x19f8f48c,
-0x3e806a5d,	0x96cff225,	0xe3b9d04a,	0x0e5856ae,
-0x781372f6,	0x9645f2b7,	0x95a743ed,	0xd0c7eded,
-0x86ca3cd9,	0xbab94db0,	0x43a1233a,	0x89c55554,
-0xee776239,	0x34aa0098,	0x66a6e1d4,	0xae0e233e,
-0x717e7b29,	0xb403a4c1,	0x36eb96c5,	0x42140832,
-0x04250936,	0xda375dca,	0x524cb2e6,	0x86deaa0c,
-0x400dc9d1,	0x12c00364,	0xe3ca7cf5,	0x87f20da7,
-0xf57df9ef,	0x580dbdfc,	0x0b3e0369,	0x014d27fd,
-0x4afaf6a1,	0xd1f4ca09,	0x77abc831,	0x30e49729,
-0xec61cd2c,	0x159c1e92,	0xb61b40b1,	0x17c66fd6,
-0xde11c061,	0x79d7f792,	0xc709cbfa,	0x94201c89,
-0xbe65137d,	0x18aea1b4,	0xf248bbc3,	0x465f957d,
-0xcf4a9672,	0xbf293fd2,	0x2c5e31c9,	0xc2c73011,
-0xfb29cbf2,	0x576f7f0b,	0x74de1745,	0xa76e172b,
-0x99b96223,	0x14ce1502,	0x231013fb,	0x1d4df40a,
-0x951b0c16,	0xab173e66,	0x4ff65f74,	0xc4a87a47,
-0x09cc3370,	0x66385490,	0x73e09118,	0x4ee96432,
-0x0164d347,	0x205069b5,	0x158dd226,	0xc932c238,
-0xe9048fa2,	0x100b626a,	0x86ee08cd,	0xed87cb1c,
-0x6353ec37,	0xa36edcc3,	0x8a16dd6b,	0xd28a4198,
-0xebea1127,	0xca0b761a,	0x61c31acf,	0xced5ff4f,
-0xbf4dbd8f,	0xd969d8a7,	0xb6e4e9e8,	0x8421c402,
-0x809d7222,	0xabfd1d2f,	0xc1857ce5,	0x23958fd7,
-0x3226f1d3,	0xd822b4cc,	0x2f1cc3aa,	0x501fe01e,
-0xe36f8c94,	0x7ad27716,	0x3321308b,	0xa85b957b,
-0x38cfdf6e,	0xc7497dd5,	0x2462090c,	0x8f9e42e7,
-0xdf97684a,	0xac8af621,	0xd5224866,	0xc5f64e50,
-0x9724f297,	0xc386097b,	0x48c6f98a,	0xe1478b1a,
-0x2dd23fd8,	0x716b2d85,	0xa5c3789b,	0x53625e80,
-0x9b8b312c,	0xce482165,	0x66161e35,	0x64ecb56a,
-0x9981c46a,	0xe6cb6bb3,	0xe1983186,	0x75ed470f,
-0x4adcbd27,	0x3efeda68,	0x4d193a2a,	0xbfdb3cd4,
-0x7c6167b6,	0xdbddea68,	0x4b0d2d62,	0x00ba3860,
-0x49ec2544,	0xa68698c9,	0x2ce7be1b,	0xf5afc9fc,
-0x1cebf9c3,	0x350f8f5b,	0x893eefb8,	0x77414f6f,
-0xe46f26fa,	0x67bf6398,	0xd6858f5d,	0xac73db2a,
-0x58e20acc,	0x750dd76a,	0xb7930e80,	0x8a8796c0,
-0x44c86997,	0xb1807742,	0x3c827dc1,	0x381aaa3c,
-0x83ac76f3,	0x57f0a2d6,	0x18261009,	0xe107138f,
-0x85711c22,	0x2e1d982f,	0x7062179a,	0xaedfa298,
-0x62e438f2,	0x6d325a9a,	0x99b489d3,	0x1bf77b3a,
-0x28ca20e8,	0x502d1b21,	0x74a833c0,	0xbeb91634,
-0xf56ffef9,	0x05401164,	0xe5dbab51,	0x0a2b460d,
-0x2f0d9c22,	0xc74472f9,	0x12da5199,	0x68b2d628,
-0x9a118f9a,	0x9035d200,	0xcda0221f,	0x12430cde,
-0x79a43fbb,	0x5bb5e1b7,	0xeab5ed62,	0xe6a11e32,
-0x3118b0fa,	0xedbcfb64,	0xd2285490,	0x824023c6,
-0x30311fb1,	0xa0a4a475,	0xbfa8ac55,	0xb8c8fbda,
-0xdf3cab63,	0x8d805566,	0xf52c1b1a,	0xa3471090,
-0x02328a4a,	0x5d1dce57,	0x196aea39,	0xcd0f640b,
-0x2fa01c27,	0x6175f783,	0xb2b6a0e4,	0x02fe6171,
-0x2d3cb20b,	0x25f331e6,	0xacfa8085,	0x46a09a58,
-0x27bbfb9e,	0x3914f970,	0x73e35206,	0x8bb87194,
-0xdb58fc4b,	0x62fd53ff,	0x2c942c7c,	0x3f4681ba,
-0xeada1780,	0x5dfbb960,	0x8473948a,	0x80787902,
-0x049c20ba,	0x9e95a4fc,	0x8526d8ac,	0x3dcdcd2d,
-0xb9562f16,	0xc9c8eb08,	0x533ed0a2,	0xa34d5d73,
-0x3e579c8e,	0x235bb378,	0x36576983,	0xc71f11b2,
-0x035eae76,	0xbec23972,	0x8613e5e9,	0x3982899a,
-0xe5a55d62,	0x3c45a7e9,	0xbd4d6def,	0x17ae0a5f,
-0xf0f53bb8,	0xa3dd1e29,	0x36f9520b,	0x72cbd950,
-0x4d762d12,	0xe03cb7a8,	0xf8c8c1fe,	0xa4ff17a1,
-0xcc779472,	0x83f9b379,	0xa2fc038c,	0xdd3b8104,
-0x95936bb0,	0xf36c9705,	0x93939e08,	0xc98576ac,
-0xec9196d1,	0xc8bce622,	0xb48e1075,	0x98dbd77d,
-0xd1b04c3d,	0x85d1d422,	0x20765885,	0xc6a17eb5,
-0x8e913cdc,	0x3f7a6758,	0x08176f48,	0xba2ea15f,
-0x3638114d,	0xf08cb49b,	0xb8b6d9ce,	0x4e55891a,
-0x2775c022,	0xc8d45982,	0x529c2eb3,	0xde080e24,
-0xdac9c028,	0xeec68934,	0x8eaace11,	0xe82e05aa,
-0x00033a20,	0x4ec94b5e,	0x445f5562,	0xa5c58462,
-0xb6942526,	0x44631607,	0x5065644c,	0x14946f9c,
-0xa9cb0e63,	0x53dff50a,	0x3f18fa24,	0x20b3b811,
-0x95c1e57b,	0x1523d301,	0xc4e24932,	0x41a9be80,
-0x24fc45b0,	0xccff2cbc,	0x996af6a1,	0xe3f201c3,
-0x0917ea23,	0xbf4a1ac3,	0xbb0db6f1,	0xd15772df,
-0xb1465383,	0x61400275,	0x571f6b1d,	0x0a4407f7,
-0x916cfbce,	0x114f042a,	0x1cb9b3a6,	0x1b34c85a,
-0xe36acc8d,	0xab109469,	0x5af9a63a,	0xccd4defc,
-0xb758adfd,	0xbd8ddecf,	0x5ffe8424,	0xd73e2a4b,
-0xb41cb99e,	0x01a52553,	0xba70e749,	0xf81d7557,
-0x2b4f0847,	0xa22e281f,	0x5c653c31,	0x89bdb546,
-0xa596e592,	0xbca4cbf4,	0xc3d1dfe3,	0x64a21c2e,
-0x159aa4b7,	0xed90f2d6,	0xb1164cb0,	0x86de0088,
-0xfd4e49e6,	0x70702b0d,	0x946b532b,	0x03a0144e,
-0x71fb19ed,	0x07c41763,	0x63312ce9,	0x0e2f5ee4,
-0xc6501661,	0x09599e4e,	0x544fd5cc,	0x054d842c,
-0x902bb57d,	0xdf82a365,	0xb7ae9427,	0xa6750881,
-0xeee3c9cd,	0x6cbe0f45,	0x7f72d3f9,	0x430b786f,
-0x162b6004,	0xbfcd440b,	0xdc4f5c81,	0x82249f6b,
-0x98d1cdca,	0x2cc2692e,	0xf977f83a,	0x570c1e1f,
-0x24ed6461,	0xcae5afea,	0x9cf06576,	0x9199d69c,
-0x883febfe,	0x0f254c42,	0x6eb50978,	0xf91fade4,
-0x9cfe5488,	0xfe3bf66b,	0x86ea94e3,	0x1bed23f5,
-0x0bded397,	0x0cde064b,	0x7abd7a81,	0x8efb798e,
-0x9a78e5f2,	0x7c46d76f,	0xcb3ae1ea,	0xc33e7ab1,
-0x0c3993f0,	0x5b2d8de7,	0x24948ba8,	0xffce06e6,
-0x0d3c2dc2,	0x3ae09142,	0x7e6b932e,	0xb3e22558,
-0x9f7c425e,	0x8fa1329b,	0x24aa5012,	0xb9e49bc7,
-0x787dd5a6,	0xf68c8171,	0x440d2146,	0x9734857f,
-0x8c30c31a,	0xcb3352a1,	0x46b04f38,	0x72572ef8,
-0xc90c56df,	0xe8103fa8,	0x04057577,	0xd1c250d9,
-0x5cb390a9,	0xbdba74b9,	0x80012fa3,	0x408216c2,
-0xadca83bc,	0x3c39bcdf,	0xf0da9459,	0x421d5a3d,
-0xc5cf55c9,	0x2dcfa63d,	0xd852066b,	0x606b2204,
-0x4d5e9576,	0xe8d6475f,	0xe46ec6b0,	0xf4e3c2c6,
-0x1bfe1bb0,	0xc2803818,	0x2a3e4809,	0x947e50a1,
-0x3a10e713,	0xc9e070cc,	0xa4244fe4,	0xa7f5d2e7,
-0x194f77ee,	0x76754ab4,	0x75ed4e5f,	0x92ffdbaa,
-0x1f5bce6a,	0x14aeeec7,	0x366fbb47,	0x44ecec7b,
-0xbc31e911,	0xee6c224f,	0x0a6f7376,	0xbe79fce3,
-0x53a18077,	0x6f6ad5fe,	0x945938bd,	0x61bb760c,
-0xed26220f,	0x9f492f0a,	0xaf0f2d80,	0x265f5449,
-0xae1f2dc3,	0xd235910c,	0x44a0f4a0,	0x36fcc004,
-0x1e8fa223,	0xe7440ed0,	0xa8535548,	0x6d7e7029,
-0x2e1b7968,	0xf3baa61d,	0xf447ef12,	0x701d62d6,
-0x2da5dcf4,	0x44828196,	0x41af9c9a,	0xab210662,
-0xa5ee18f2,	0xd45eb369,	0x947814fe,	0xeb62eb49,
-0x30c555c6,	0xdc06ccbd,	0x786705d2,	0xd50c80d3,
-0x266d8313,	0x68f63164,	0x1e3e4322,	0xfc23834e,
-0xe879261f,	0x28992a8f,	0xab86dac9,	0x19f88d1a,
-0x5110c867,	0x3c050155,	0xf9b1b3f5,	0x98909489,
-0xfa0ee6bc,	0x038fb4ce,	0xbe1c9e33,	0x18f96bcd,
-0xa1635c9a,	0xff3e9374,	0x5b033171,	0x0b84bfd9,
-0x3c091bae,	0x6da61a4e,	0x07d81b5d,	0x3904ea3c,
-0x75f4e7f1,	0x3e70c12e,	0x9c70d835,	0x9a1ea5a6,
-0x4b99b705,	0x08f6ab89,	0x7649901c,	0xee3e7687,
-0xa3deb48c,	0xd74e8c78,	0xe8e120c3,	0x425d3d96,
-0x16f136bd,	0x0c7a32ef,	0x37a0ff53,	0x77b035e4,
-0xba8808c1,	0x1d3d8330,	0x8d224cce,	0xed789fed,
-0x550a8352,	0xe2715912,	0x185f62d1,	0xe301002a,
-0xbe2ed99b,	0xbb1dfd60,	0x9d22d8f9,	0xcbfa36d5,
-0xad7e92e0,	0xd2db61d4,	0x1df386f5,	0x92b5797c,
-0x00ac8ed1,	0x2f7470b1,	0x674e258b,	0x6689df79,
-0x135c5c1a,	0x87abbc50,	0x19ac082b,	0xe7f7d64c,
-0x24fd4922,	0x7eeadc29,	0xa0910eaa,	0x763231d6,
-0x23597ccb,	0x332f33c3,	0x93992b6a,	0x19c8937c,
-0x75d6a9f4,	0x221395e1,	0x662914d0,	0x997d7860,
-0xd196adeb,	0xa5402fd9,	0x8bd6f12f,	0xc31d97e0,
-0x304dd9dc,	0x72f35c72,	0x8ced870e,	0x1eef8a14,
-0x323321fa,	0xf193079f,	0x18026b1c,	0x5a1107a5,
-0x54979f4b,	0x6afee492,	0x04c012e6,	0x3446250c,
-0x25a691a8,	0xc19a76ea,	0x66bd5b14,	0x6250bd2d,
-0xc6c082d9,	0x67ea1d78,	0xbe68a7ef,	0x03f50dc8,
-0xd8f76566,	0xb6681752,	0x00e2b087,	0x7ed2e598,
-0x8c9cbc83,	0x103b03f5,	0xee4d2723,	0x67b3903f,
-0x1e057dec,	0xc5703ba6,	0xae0615f9,	0x1bce0df2,
-0xfd041279,	0xc874a2c3,	0x0a91d2fa,	0xac098457,
-0xc1efc5f9,	0xd48208eb,	0x72e9baa8,	0x184dc658,
-0x3d26b8b4,	0x90e2469d,	0x6d07f351,	0x3f6898a7,
-0x21e4de0b,	0x0fd04a43,	0x2c99cd2b,	0x44b28cdd,
-0xaf5483a5,	0xe50b9a12,	0xd98fe031,	0x9d6e8f08,
-0xf385ba19,	0x5e531cb0,	0xc545867a,	0x65f5ebf5,
-0x9f27ad5a,	0x2de11f0d,	0xef6f0970,	0x973b11f2,
-0x72228c07,	0xe13fdb84,	0xd2a7b46f,	0xc85a38db,
-0x331a9807,	0x3be38ebc,	0x3e7bf15d,	0xa82a1e68,
-0x4b42b5bc,	0x9871203e,	0x7d1e1e24,	0x12f57b6b,
-0xf5403ec8,	0x28746c33,	0xae20522f,	0xf6042fba,
-0x66bada5d,	0xbefe376f,	0xfd3773a5,	0xbb5fc6e8,
-0x34c0433d,	0x3cfc83e9,	0xd096736a,	0xa53be016,
-0xeba3dd6c,	0x2c626561,	0x3c160c8d,	0x8506c719,
-0x802e7b47,	0x16079396,	0x6d29b175,	0x4e91abb4,
-0xe350ce95,	0x0d481aa5,	0x94e95371,	0x10dc4dec,
-0xbfeb3735,	0x3ce3cb4d,	0x32ff742a,	0xac5ad3cb,

cpu/intel/model_1067x/microcode.bin

diff --git a/cpu/intel/model_1067x/microcode.bin b/cpu/intel/model_1067x/microcode.bin
new file mode 100644
index 0000000..ee6db37
--- /dev/null
+++ b/cpu/intel/model_1067x/microcode.bin
Binary files differ

cpu/intel/model_1067x/microcode.h

diff --git a/cpu/intel/model_1067x/microcode.h b/cpu/intel/model_1067x/microcode.h
deleted file mode 100644
index 9de6085..0000000
--- a/cpu/intel/model_1067x/microcode.h
+++ /dev/null
@@ -1,10 +0,0 @@
-
-#include "microcode-m011067660F.h"
-#include "microcode-m041067660F.h"
-#include "microcode-m101067660F.h"
-#include "microcode-m401067660F.h"
-#include "microcode-m801067660F.h"
-#include "microcode-m101067770A.h"
-#include "microcode-m111067AA0B.h"
-#include "microcode-m441067AA0B.h"
-#include "microcode-mA01067AA0B.h"

cpu/intel/model_106cx/microcode-M01106C2217.h

diff --git a/cpu/intel/model_106cx/microcode-M01106C2217.h b/cpu/intel/model_106cx/microcode-M01106C2217.h
deleted file mode 100644
index c6299a1..0000000
--- a/cpu/intel/model_106cx/microcode-M01106C2217.h
+++ /dev/null
@@ -1,355 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  M01106C2217.inc  */
-0x00000001,	0x00000217,	0x04102009,	0x000106c2,
-0xd987bc76,	0x00000001,	0x00000001,	0x000013d0,
-0x00001400,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x00000217,
-0x00000035,	0x000b01c0,	0x20090410,	0x00000401,
-0x00000001,	0x000106c2,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x09f89a9c,	0xce7faed5,	0x3c508f50,	0x462d2e35,
-0xdc20f762,	0x55ff2ae4,	0x88a57956,	0x06ff4465,
-0x0882023d,	0x953684cb,	0x0abe06ee,	0xa7ef1798,
-0x160d6cb8,	0x930cf745,	0xafc3fd79,	0xa70df3d5,
-0xb0620f46,	0x70048a23,	0xbf95ecf0,	0x76c1b997,
-0x5128616d,	0xb6b4b969,	0xcc69f71d,	0xdf7416e1,
-0xdf9a571b,	0x50c0bcc8,	0x85e2b3cd,	0xc1927532,
-0x7a04b6be,	0xe56b7f97,	0x524085c4,	0x668bf327,
-0xb3eaa54c,	0xccde06f8,	0x09b4e42b,	0x033b0a46,
-0x0f6e2fde,	0xb308ce53,	0x93eff03e,	0x8830014e,
-0x5c8a6f22,	0x91d2f757,	0xf70b648d,	0x0789998a,
-0xd84d4640,	0xe5f34e80,	0xf3357e64,	0xd1e2beea,
-0xc7e95c3a,	0x30e57e4d,	0xec214356,	0x7e10859e,
-0x1d5895d5,	0xdeeff6cb,	0xed1030ed,	0x827e603d,
-0x6b4b2de3,	0x83ec6fd0,	0xa64092f3,	0x8d9887e4,
-0xbefcbedd,	0x2111afef,	0xcb9abf96,	0x5c79ceac,
-0x9bf8a57f,	0x5d0e44be,	0xdca3d3b6,	0x9072d1ca,
-0x48e73a50,	0x8d0bc804,	0x6aea94d3,	0xc372403e,
-0x00000011,	0x14980dd1,	0xff2ade29,	0x768a5b1f,
-0x18ac6d5c,	0x455e0e87,	0x46ae1737,	0xce517cb9,
-0x020473ae,	0xa299d2a8,	0x69756da6,	0xfed24465,
-0x7e627d60,	0xd6c18c2d,	0x8409165c,	0x67d65a36,
-0x0a898865,	0x79035444,	0x8fac97be,	0xfbced0a1,
-0x5562edf6,	0xd683c850,	0x54cb0839,	0x47929e06,
-0x4d6bd42c,	0xd2cc07ef,	0xe1869b9d,	0xae55ba8a,
-0x02b186cc,	0x801d2a57,	0x23162402,	0x1c7cde17,
-0x497bb85e,	0x090606ad,	0x8d7775eb,	0x1bc5e744,
-0x11371ceb,	0x4f5a7aeb,	0x382daf5f,	0x1a3970c0,
-0x172f30b0,	0xc5ed2811,	0x603ef865,	0x1a4ff210,
-0x81287299,	0xbdf9d9ce,	0x03577eba,	0x75fa0e3a,
-0xc7778697,	0x4664ef64,	0xb30891ab,	0x27409db5,
-0xa2feff2f,	0xf7638682,	0x901e1696,	0x61625662,
-0xa9f71db5,	0x8475fef8,	0x957a55b0,	0x0507639c,
-0x3521a161,	0x57bc69ac,	0x93abc8df,	0xc7df8cff,
-0x776dc361,	0x4934e712,	0xd4581201,	0xf4b337a5,
-0x99cf4723,	0x8b2715a8,	0x487247bf,	0x6dfdb286,
-0x453a53fd,	0x88e17774,	0xe6f61002,	0xfe891e3b,
-0x0620cfee,	0x6bcc8052,	0x11207184,	0x125a5356,
-0x646c1884,	0x2601a0f1,	0x3a84e550,	0xb813fff6,
-0x2e66a034,	0xb5f968cc,	0xbf2b77bd,	0x65cb3af5,
-0x289a52ef,	0x1aff1abd,	0x503b9072,	0xc07e41ff,
-0x78087713,	0xa77e5425,	0x92e4f600,	0xf424b361,
-0x562bb01f,	0x78208ba1,	0xc0118f85,	0xb9620c7f,
-0x88aeee9d,	0x237c6911,	0x2038db7c,	0x35957f1d,
-0x451ba202,	0x4acfd66a,	0xe04da877,	0xefd37108,
-0xdbb01e2b,	0xe3ff9aa8,	0xca7860f0,	0xd95d9fa3,
-0xe8a0f1e8,	0xba2e7831,	0x9a1aa2a2,	0x5535a65d,
-0x27879bd9,	0xaa9d8570,	0x262ae91d,	0x476739cb,
-0x3b1f8d94,	0x2ce39fcd,	0xe1f64118,	0x5cc602e6,
-0x8a3c6e50,	0xe733c2e5,	0x58cf0ed4,	0x23842b39,
-0xcba6e922,	0xa88779eb,	0x5f45a57f,	0x3398ff7d,
-0x1c30ac9a,	0xb0d4a170,	0x1ba9b1ac,	0x4123dec5,
-0xe43463a2,	0xf13e7515,	0x6d8fce05,	0xcd499819,
-0xd91c60c2,	0x68086ab9,	0xdd3a01ad,	0x91336c64,
-0x3bf42ed6,	0xdef60794,	0x3506f8ad,	0x4099cac8,
-0xc4ad9796,	0x3347943f,	0x7b03e9b9,	0xcdb458e8,
-0xf50997ea,	0xddd26aee,	0x0c8434b7,	0xfa0126ad,
-0xc7902e08,	0xd6df491f,	0x168a82f3,	0xd4bcd3de,
-0x23dee535,	0x1eae8e13,	0x088fe4e1,	0x661b94c5,
-0x3551d689,	0x3d913667,	0xa2cd75bb,	0xcea61a1c,
-0xb987bdb6,	0xea1b1df2,	0x2754a729,	0xc487f029,
-0x58ba9638,	0x467f332a,	0x11336475,	0xb9b26485,
-0xdc4fd47d,	0x8c265433,	0xb862dbce,	0x6c3eac27,
-0xa7be9cd1,	0x9f0b9d29,	0x1f16f518,	0x71234b1b,
-0x728fe49a,	0x8e31bfc0,	0x4e0beeed,	0xe69e32e6,
-0xdda0bde8,	0x045910b6,	0xde786f8c,	0x496cda76,
-0x95476c8a,	0x8ada681a,	0xb94cccc9,	0xf9dffcd1,
-0x442004a4,	0xfd5d9ae4,	0xd1bb286e,	0x35471fb7,
-0xcc4aa935,	0xefa0a0e1,	0x870e142c,	0x8b836771,
-0x065a0efe,	0xc41adbe9,	0xc0d2a66f,	0x7c4a0b23,
-0xf86ca243,	0x045dc285,	0xce19da1c,	0xf6142343,
-0xb8d5f1ef,	0x038bfa44,	0x17591c11,	0x98002db2,
-0xe15409c2,	0xb4044cae,	0x4da885ce,	0xeaeb5810,
-0x62e54ee5,	0x41879946,	0x721cbd0f,	0x6edff1ad,
-0x721ae394,	0x90f7b14e,	0xe1b6ed04,	0x96460c22,
-0xc3249764,	0xb1ed84d7,	0x9d4267a4,	0x98dadb19,
-0x3671dde2,	0x33bb9671,	0x3f5de8b7,	0x5d486e43,
-0x19b2c92d,	0x5118290c,	0x18e6fd5d,	0x11e859c8,
-0x7f26e5a7,	0xacae907a,	0x157d46ad,	0xdd7e80d5,
-0xad7c15ec,	0x416c0e4e,	0xd7c8fa0f,	0xb3e61dc5,
-0xc957ecc8,	0x3ce4ce22,	0xa1716ca1,	0x32293474,
-0x71464f7c,	0xcf87342b,	0x9b991153,	0xb4cfd21a,
-0xfe1f2848,	0x25727966,	0x72b48d58,	0xe80e38f6,
-0x3a8eb709,	0xe93983d0,	0x39a98bd2,	0x955afc9b,
-0xbb4d95a2,	0x5ea1c16c,	0x2dca4b6c,	0xe1841464,
-0xf29b6834,	0x0898d1b1,	0x3cbf6824,	0x332036a9,
-0xd2045fce,	0xceb43c07,	0x7ddd72e7,	0xd8495f8e,
-0xd62595df,	0x1f48a356,	0x3c810c08,	0xa8b18be3,
-0x40aa0d34,	0xe1c6da7b,	0xa0c63ca0,	0xa3978b77,
-0x08346409,	0xc7c879d5,	0xe4533936,	0x6e469855,
-0xb5e92af7,	0xab14fcf6,	0xbb9d581e,	0x1ade2f8d,
-0xd87bafa7,	0x4f23ff92,	0x0c7b1083,	0xfdb31cd0,
-0x8668005a,	0x4a3b5d19,	0xa2615960,	0x7c1fcf3c,
-0xbc751468,	0xd959dace,	0x3ec35d36,	0x39a2254b,
-0xaa59fc84,	0xa848bcc2,	0x4573f9bb,	0xbdb60b61,
-0xe3fdaa82,	0x2b33ca86,	0x761b49e9,	0x7794b324,
-0xc000cc24,	0x1e8fb5bc,	0x103b6e35,	0x2a38365e,
-0xe0c618a0,	0x6a073c0b,	0x7e8f601e,	0x5a09e07b,
-0x7d40e359,	0xa21e6187,	0x2e78217c,	0x41a9872a,
-0x8b77e812,	0x6d5b951e,	0xa3b9e595,	0x74a50d79,
-0x316461a2,	0x62f97340,	0x3e3d072c,	0xb6254c73,
-0xdd88bcc6,	0x7037a3be,	0xd456b2d3,	0xa721fe50,
-0x43a33949,	0x3645fa38,	0x9dc6dcd3,	0x377c04b2,
-0x9b89649f,	0xdab2ca19,	0x9b4ef5bb,	0x2e2ca48f,
-0x4feb859d,	0x2c6b42fe,	0x087f84a2,	0xf17ba799,
-0xb37b0a19,	0x8ed04361,	0x188a1f73,	0x5185d421,
-0x3129ac67,	0x94116de3,	0x607820ba,	0x76a1a9ff,
-0x6808755e,	0xf2e508da,	0x6bca967b,	0xbc3a7b70,
-0x769b9d11,	0xe925e390,	0xe26e3039,	0x220a75c6,
-0x334eff5f,	0x55624cbd,	0x5c2e9f3b,	0x64cab7cf,
-0x84c65fb7,	0x5ad7a323,	0x6f3c9efd,	0xee96b7cb,
-0x6bb73a9c,	0x4604624e,	0x0e2473ae,	0x2aea52e0,
-0xf3b8abea,	0xc5aed750,	0xb7763e2e,	0x4a766d95,
-0x1d52e854,	0x22b32f4b,	0xe17119cc,	0x0608ecb3,
-0x23f3cf11,	0x12259854,	0xaf57c24c,	0x36a3eb84,
-0x9f5919a6,	0x1136d736,	0x547c8a00,	0x9915aab7,
-0x0682f3f5,	0x3cb9a6d9,	0x5696fe64,	0x7a01e206,
-0xdad7dfd5,	0x4b8478cc,	0xfffbef84,	0xafab5584,
-0x754ac2fe,	0x110f52e8,	0x1cf6a7e8,	0x80266a8b,
-0x0711c4d9,	0x66086a99,	0x42a9e502,	0x149355a8,
-0x00b487d5,	0xf7321320,	0x87b56421,	0x5f7873bb,
-0x00536403,	0xfc3d0487,	0x5d8dba88,	0x6d5dfedc,
-0xfa65f000,	0x0a5b14b8,	0x2df04874,	0x13183539,
-0x4737d8b1,	0xf4172265,	0x844ee0ad,	0xc9b413b0,
-0x9316b83c,	0xbb018c85,	0xc078bab6,	0x24fb2bf7,
-0x733611d7,	0x66a4d719,	0xb8f0426a,	0x638ac2d0,
-0xf907257c,	0x292bd026,	0xc9bd1b1e,	0x0a3934a2,
-0x0069eb7a,	0xe5fd66f6,	0x63469a35,	0x4ad4eb60,
-0x4abe9ffd,	0x1b286736,	0x113f8874,	0x3f9c821e,
-0xbce34a08,	0x1400b4e7,	0x578df00f,	0xcb530a93,
-0xe442bc4b,	0xbd819631,	0x6ebd2f56,	0xfa3948f1,
-0x75065d40,	0x755d1058,	0xa27d9259,	0x861db21f,
-0xd6d28943,	0x77522729,	0x63fa2986,	0xa509bc80,
-0x8ab9d121,	0xbec0ec56,	0x66a591aa,	0xf26a6e0f,
-0x2bcd477f,	0xd3fe7ba0,	0x5988067a,	0xcddf746f,
-0x0a4a29e9,	0xcd933731,	0x59cf2422,	0x025781b4,
-0x421cb3ab,	0x1799b8c5,	0x21e32df9,	0x4c8dc991,
-0xf198b552,	0xc8f23b9d,	0x71d1f473,	0xc8cc0d68,
-0xcfe13358,	0xf0544e3b,	0x76c15708,	0xf6373299,
-0x9c77318c,	0x500e4421,	0x17299f4f,	0x71165140,
-0x4d1e1550,	0xcfcbd28d,	0xa70f96e2,	0x6b8af010,
-0x409e14b1,	0x02269fee,	0xb0a3dd80,	0xe6c939fe,
-0x8e5b0076,	0xc40ba65d,	0x01f0b8f3,	0x3370e39c,
-0x300d639e,	0x0896c55b,	0x5a0f41a7,	0x4d0ddc60,
-0x3fa3f82d,	0xbc582569,	0x102f2e2d,	0x3c2a016d,
-0x8bb0a47f,	0x7a751edd,	0x458a7b8d,	0x6c3b70da,
-0x15900727,	0xcb97fafd,	0xdeb5d4cf,	0xa5659a09,
-0x455d6a86,	0x9ec18406,	0xcd6a72af,	0x9831993e,
-0x2f18a892,	0xdbc415aa,	0x4b8d3261,	0x57739a68,
-0x2cf8702e,	0x70977ca1,	0x80b3caab,	0x806a09e5,
-0x1d445591,	0x2ff0092d,	0x8d8fade8,	0x6e1f8806,
-0x4a9fcce4,	0x0d73397b,	0xb5b86afb,	0xc8816f25,
-0x191b7360,	0x4ac340f9,	0x82e6d123,	0x0f470975,
-0x7c304147,	0x7bbb635b,	0x28f8cab6,	0xc109b6c2,
-0xb06bbcc3,	0x4ca536ae,	0x3ae30e66,	0x483f6ab2,
-0x560ab845,	0xf5289929,	0x45843435,	0x342f826e,
-0x172c2cdc,	0x17ec9571,	0x947a4b57,	0x2b1de023,
-0xf10ac853,	0x9ffa7c2d,	0xde2ff682,	0x426caa39,
-0xcb482471,	0xc36c15ce,	0x04af08bf,	0xb80b1e08,
-0x0d01a541,	0x942354c0,	0x4251c668,	0x50ffdf5c,
-0xf19096d7,	0x5813c93c,	0x5c6b1107,	0xff86f985,
-0x71092390,	0x15aa7c73,	0xcab0715d,	0xc8d9e6cd,
-0x828aadef,	0x8fb2db36,	0x2e3d2375,	0x8eb6f9ee,
-0x52006fe7,	0x503cc554,	0x41d9c3ee,	0x34f41d9c,
-0x6d1d6d0e,	0x0ce78057,	0x091f714e,	0xa49309b0,
-0xaa1b9f14,	0x572c2871,	0x974b185c,	0x8e5b5595,
-0x61dbb6f8,	0x5ecd681c,	0x2f6d7a0d,	0xd892944e,
-0xb6927173,	0x0c0ef47e,	0x70b7396a,	0x8cbc3353,
-0x2af3e2b7,	0x53e9688c,	0xdf68696b,	0xc86dc91c,
-0x00311bf2,	0xa1760482,	0x72232938,	0x38ee8f77,
-0xd53fba4d,	0xabd9ad0a,	0x66168574,	0x017f3e34,
-0xdf327344,	0xd6eae249,	0x7b22f8c1,	0xa5b2bc42,
-0x969f4cd6,	0x95f5fc6d,	0xfdb7c7fa,	0x112d3ee6,
-0xeaf67b74,	0x0a5a6e73,	0x18df20e0,	0x38236a5a,
-0x8130a173,	0xcb3b5b7e,	0x35206d1d,	0x5e050e33,
-0x8deb6f0d,	0x60ce0dff,	0x07728a31,	0x6f3a04ae,
-0x7831b5d6,	0xa4fbd66e,	0x6bd2e736,	0x5c3443fb,
-0x7432fdf7,	0x692a74d3,	0x5dce3459,	0xb93de5d1,
-0xba81594f,	0x39a8a15b,	0x48e26bf0,	0xcb41f36d,
-0x09ddea57,	0x352b3d01,	0x0a12ff41,	0xa86206ac,
-0x478e88d2,	0xf0ee2844,	0xe206e58c,	0xbacd48a2,
-0x5260a7d0,	0x1dc5fa78,	0xec9fbc75,	0x37ef6350,
-0x94f946af,	0x64a06436,	0x5c02f667,	0x14c38a00,
-0x26c482ef,	0xef0317fc,	0x5d19eaf9,	0xff738f59,
-0x70db8622,	0x6ea24943,	0x00f30923,	0x2e348bfe,
-0x2fd943f2,	0x192450d3,	0x6aada8e6,	0xc2d84796,
-0x50c96742,	0xb7c47e4d,	0x6b7e869f,	0xffdc3ef5,
-0xe6ee5077,	0xff3704f1,	0x985c9e46,	0x1adcd42c,
-0x63331397,	0xd12eac83,	0x7795ac6e,	0x30ae7325,
-0x1caf85ed,	0x37c2cc82,	0x4f9f0c36,	0xec6ce943,
-0x1ba39119,	0x50c55c47,	0xe4ef5731,	0xc0a76ec7,
-0x8c85871e,	0xe15213ca,	0x2b1b738e,	0x0e424959,
-0xb0573335,	0x040cd859,	0x49776ee0,	0x0b2612f5,
-0xfebb32c2,	0xe8be8760,	0xa0138cb1,	0x889e9ca8,
-0x2e48ccf1,	0xb45bf39b,	0xe5412271,	0x1b6ef4d5,
-0xc282196b,	0xdd0639fa,	0x521c55ae,	0x58b95195,
-0x6857a9b9,	0x9f2bbfb9,	0x7c225192,	0x28acb34f,
-0x3d3a6f5a,	0x91abfb0c,	0xed76cf8c,	0xd323d447,
-0x65d8fe44,	0x876b3183,	0x0334168c,	0x8711195e,
-0x1aa1db76,	0xdea97171,	0x89e188d0,	0xd1425753,
-0xbdbebe5e,	0xd0fdd27b,	0xde9ba2d5,	0xf25f0953,
-0x6f7a5334,	0x239f2b0d,	0xc3249498,	0x0d97b723,
-0xef18c9a1,	0xbbc19fde,	0x628b7257,	0x5ea12b66,
-0x2bfeedf6,	0x072d6f46,	0x219421c6,	0x8904644d,
-0xa06c8bf1,	0x0c15f545,	0xfded658e,	0x7a2f4106,
-0x498a95f8,	0x53d6c015,	0x553268be,	0x31069c90,
-0xc304dcd3,	0x9c404feb,	0xe77d8958,	0x0f80a1d7,
-0xf6c38319,	0xe30bd224,	0x3a1d6495,	0x9878e6a8,
-0x4a873482,	0x038ac7d5,	0x198a11c8,	0x40e7dc31,
-0x93aba328,	0x7641c2f3,	0xe6086e71,	0xb3897f90,
-0x68639089,	0xa6c9d34f,	0x0ebd25e9,	0x8f024790,
-0xf33312cd,	0x317fe8c5,	0xf0488ef8,	0x1c5dd332,
-0x6c92abfe,	0xd62338bb,	0x74cf66b1,	0xdd56bdbe,
-0x7947870d,	0xec8d9f29,	0x06e28ec2,	0x316b1f94,
-0x766a4502,	0xd1825c99,	0xaaf9234f,	0x2ea72492,
-0xbf4749e6,	0x4e3baa89,	0xa31b81e3,	0x9de5cdf1,
-0xc032f0f7,	0xd56bc9cc,	0x52d82ac7,	0xf7138aac,
-0x9941380b,	0x8224d67f,	0x2ac8e885,	0x83edb999,
-0x58fcf382,	0xd3c8bce4,	0x53886d55,	0xadbe82fe,
-0xb21b6a4e,	0x836838aa,	0x71f632fa,	0x3e621403,
-0xb9c81a6d,	0xf4e3cfe2,	0xc3032aee,	0x2ffb4713,
-0x7ddcc17a,	0xc0349cab,	0xea36e040,	0xa5167672,
-0x0cb7499e,	0xc55eb59d,	0xb3a2333a,	0x37edbbe6,
-0x7abe8507,	0xf99505e7,	0x09b0aedf,	0xfb1e1387,
-0xc118cef6,	0xf109555e,	0xc2b9ac82,	0xe52ef3bf,
-0x2be6f4fc,	0x9f6b3390,	0x3e59aec6,	0xc6c8666e,
-0x2e016135,	0x695d5c12,	0x405afd84,	0x3f90d859,
-0xb0d11081,	0x60e0ecb8,	0x089ea644,	0x28c2c21d,
-0xc5c1b3b7,	0xfb14119b,	0x9ad20b9f,	0xae32664c,
-0xbca23d54,	0x1a47db36,	0xeec84a67,	0x515536ff,
-0x38c245f4,	0x83e0a08a,	0x2229a519,	0xe60d7871,
-0xe8ee5179,	0x341602e5,	0x453a15ff,	0x83a55bd3,
-0x5513acbb,	0x1657e8a2,	0x8284f814,	0x706684ef,
-0x13deb278,	0xbd3c9921,	0xff6a3dc7,	0xa04994a4,
-0x19f6d089,	0x7f505d1d,	0xb8b075cd,	0xeb0f3be4,
-0x6fc2d4f5,	0x37f5840d,	0x17fad37f,	0x4fe71d23,
-0x424fe1f2,	0xad86001b,	0x5645b172,	0x9aaa2d0b,
-0x28058255,	0xbe3140e4,	0x97d1e959,	0xdad9a815,
-0x2ca7014e,	0xae8a3947,	0xc07ab273,	0x9c215b25,
-0xfc9b4f63,	0x649a14a6,	0x40f20730,	0x148387f8,
-0x7706de96,	0x6c44784c,	0xdd76ce12,	0xbb421926,
-0x62e18378,	0xbfa9e559,	0xd76763fc,	0x3e24de93,
-0x20d75b75,	0xf19f0788,	0xc6f7b50e,	0x7d7a3f62,
-0x656f60f7,	0xb1068519,	0xe17d0728,	0xb56fcea6,
-0x75beee44,	0x7998c910,	0x266d3508,	0xf0a977c7,
-0x02866510,	0x21ca1fad,	0x471d3c70,	0x204ba687,
-0x9680a3d9,	0x02b818df,	0xac0374c4,	0xe6a48910,
-0x0e33d542,	0x677abf13,	0x8d83c3a1,	0x7a2eda35,
-0xd40fdebe,	0x6b0b5fbc,	0xecce7918,	0xcd68eae5,
-0xdd6a3e0a,	0x05be5f69,	0x5c3990d7,	0x60d3dbc4,
-0x3cb5923a,	0x9a8d643e,	0x1711f7b4,	0x9bab6d65,
-0x8393d3f0,	0xaadb08f2,	0x075ed3a5,	0x29c34152,
-0x935f10a6,	0xef7279a4,	0x63532e9d,	0x26afe572,
-0x6dc112e6,	0x47c97684,	0x6eccb9e1,	0x90da8c44,
-0x6e04bda3,	0x80f19b22,	0x2196273b,	0x1ee245cb,
-0xd55dcf1a,	0xc7cd14d8,	0xf244515b,	0x055aa301,
-0x0c9fce9c,	0x755faa4b,	0x96d5a956,	0x259f4a45,
-0x430868ac,	0x4b55f57d,	0x829f134a,	0xe139fdbb,
-0xe05dcf2a,	0x3bf268ee,	0x904d6baa,	0xe6d8bb7d,
-0x1bbeb22b,	0x45db4f3c,	0x960bdd27,	0x4ebba6cc,
-0x0bc84549,	0xc17d6bba,	0x9911fe90,	0x462f4ff0,
-0xb0108424,	0xbb0e397d,	0xf5285eda,	0x5a7db808,
-0xc70b87c5,	0x994cfd51,	0x13eab491,	0x2d4c1489,
-0xbec93d95,	0x5e99f60f,	0x3ed154c7,	0xfd6edd85,
-0xb2422fb4,	0x4709edce,	0xae51e4f6,	0xf89d18a7,
-0x30094d52,	0x63744563,	0x379b69cb,	0xbb8c19d9,
-0x7aa2c0cd,	0x16bc4ab3,	0xe1b2e442,	0xbf5e198f,
-0x0dd3e057,	0x07c5413a,	0x3a0e9d35,	0xb47307b8,
-0x77aa24b9,	0x2fd8fb55,	0x77d80e99,	0xf3f6e93f,
-0xff13d117,	0x2a6739bc,	0x5c8908a6,	0x42ced515,
-0x253d954f,	0xd06c3da7,	0x4788401a,	0x19b04ccc,
-0xca15f3ad,	0x76f1110d,	0x21e1e1de,	0x879233a2,
-0x9fb391c3,	0xdd50ff87,	0x9e661729,	0x8cb80e15,
-0xa36ddafd,	0xf55f913d,	0xc9b19482,	0x7e097acd,
-0x86e47ac3,	0x347f1069,	0x0cf15cac,	0x997cfd01,
-0x4e5c32d2,	0x0a4a38c0,	0x955dcfd1,	0x75be3729,
-0xed177186,	0x6e6a277e,	0x89caee2c,	0x605f9c12,
-0x539bcadc,	0x34abf93d,	0x96c9643f,	0x0f34633d,
-0x36fb15c7,	0xfb7bba4b,	0x212585fd,	0x42b1347c,
-0xd3ac6ead,	0x164c64e3,	0xddcacd07,	0x186d85d7,
-0x117cbeb6,	0xca9c9fab,	0xa568bd38,	0xd60e0da0,
-0xb98fa69c,	0x93a6c623,	0x194441b5,	0xe654f1ba,
-0xe2a3cad3,	0xe5cf7b3f,	0x1614a3c2,	0x9b078402,
-0x52f37d97,	0x187e9dda,	0x00fa2b8d,	0x07ee62d1,
-0x5a5ea2bd,	0xb1e6ed54,	0xb1c24a2a,	0xf41fbba1,
-0x92d967ec,	0x4df103ed,	0x1d1ddaf4,	0x705c34b7,
-0x08330af3,	0xbe45833b,	0xe874998d,	0x1a22a9ce,
-0x83ab6702,	0xcf2a6656,	0xc08758bf,	0x74c56ecd,
-0x1afd607a,	0x51bf6406,	0xa302d55c,	0x0ac43266,
-0xadc985f9,	0xa9ac229d,	0x4aa82f77,	0x3afce1ac,
-0xaf8d5c80,	0x217fb5c1,	0x94c92311,	0xaea31486,
-0x7788cb41,	0xb61c75c8,	0x062a0888,	0x7609920c,
-0x5344faec,	0xdf10b710,	0x8c8673e1,	0xb39462ab,
-0xc3a2bb23,	0x16b93eb6,	0x394ff960,	0x8d81ad20,
-0x9f9e1fd6,	0x8a70894b,	0xf96c2c50,	0xd8474239,
-0x53228736,	0x68540ee3,	0x3cfa5c8c,	0x8cb74254,
-0x13b497fa,	0xb537a6fa,	0x1967e5bd,	0xa638ae8a,
-0xafbc06bd,	0x72e905b0,	0xaf6b12ad,	0x76b3fe92,
-0x90b6100f,	0x23db02cc,	0x859aa5d8,	0xd702fb4d,
-0xa39e940a,	0x66c4f206,	0x17bd0770,	0xdc1224e1,
-0x1e4e9f1d,	0x79f7cafd,	0x1209e815,	0xe1f6d276,
-0x83b1eabb,	0xf3403674,	0x8f01d66f,	0xcfa6007e,
-0xdbff7fb5,	0xdec0cd24,	0x357ed4f9,	0x6f17697f,
-0xd15622f0,	0xc410ebbe,	0x442c6c05,	0x96f90c65,
-0x447b9422,	0xc675767d,	0x6e9f036f,	0xac53aa34,
-0xf889e572,	0x322bbdd4,	0xef947e08,	0xb39a0c48,
-0x27e05184,	0x4dec6c99,	0x5b351ffe,	0xc22e0ad9,
-0x2f89f4cc,	0x353dff3f,	0x8b45b885,	0x224452f9,
-0x01f9addd,	0xd535ba80,	0x76b2d5ee,	0xe4a5d1d0,
-0xbce3274b,	0xe2b86efe,	0xe4ec7a5b,	0xecd4723d,
-0x9167ad13,	0xc6588e4b,	0xb4de5667,	0xbd7780a7,

cpu/intel/model_106cx/microcode-M01106CA107.h

diff --git a/cpu/intel/model_106cx/microcode-M01106CA107.h b/cpu/intel/model_106cx/microcode-M01106CA107.h
deleted file mode 100644
index ada67c5..0000000
--- a/cpu/intel/model_106cx/microcode-M01106CA107.h
+++ /dev/null
@@ -1,355 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  M01106CA107.inc  */
-0x00000001,	0x00000107,	0x08252009,	0x000106ca,
-0xf851a3d9,	0x00000001,	0x00000001,	0x000013d0,
-0x00001400,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x00000107,
-0x00000010,	0x000500b0,	0x20090820,	0x00000401,
-0x00000001,	0x000106ca,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x2beaa92c,	0xfc3395b7,	0x10be81a0,	0xb318e067,
-0x723923f0,	0xb297dc63,	0x7d52bc4b,	0xc6ef362f,
-0x0882023d,	0x953684cb,	0x0abe06ee,	0xa7ef1798,
-0x160d6cb8,	0x930cf745,	0xafc3fd79,	0xa70df3d5,
-0xb0620f46,	0x70048a23,	0xbf95ecf0,	0x76c1b997,
-0x5128616d,	0xb6b4b969,	0xcc69f71d,	0xdf7416e1,
-0xdf9a571b,	0x50c0bcc8,	0x85e2b3cd,	0xc1927532,
-0x7a04b6be,	0xe56b7f97,	0x524085c4,	0x668bf327,
-0xb3eaa54c,	0xccde06f8,	0x09b4e42b,	0x033b0a46,
-0x0f6e2fde,	0xb308ce53,	0x93eff03e,	0x8830014e,
-0x5c8a6f22,	0x91d2f757,	0xf70b648d,	0x0789998a,
-0xd84d4640,	0xe5f34e80,	0xf3357e64,	0xd1e2beea,
-0xc7e95c3a,	0x30e57e4d,	0xec214356,	0x7e10859e,
-0x1d5895d5,	0xdeeff6cb,	0xed1030ed,	0x827e603d,
-0x6b4b2de3,	0x83ec6fd0,	0xa64092f3,	0x8d9887e4,
-0xbefcbedd,	0x2111afef,	0xcb9abf96,	0x5c79ceac,
-0x9bf8a57f,	0x5d0e44be,	0xdca3d3b6,	0x9072d1ca,
-0x48e73a50,	0x8d0bc804,	0x6aea94d3,	0xc372403e,
-0x00000011,	0x3b994153,	0x23faa5e1,	0xc3feae68,
-0x76d5e67d,	0xbd696479,	0x138a05ef,	0xf2b5de22,
-0x4ccba0ed,	0x333cc95c,	0x8d98a2ae,	0x0bf1fa24,
-0x239f1fbf,	0x44701d3b,	0xb176783f,	0x20eff2cc,
-0x0cf93bf9,	0x4e6ace41,	0xe346d231,	0x11d560af,
-0xae8874a2,	0xe344fa92,	0x0056d268,	0xd8068d91,
-0xf336cf97,	0x45c54f6d,	0xc0650992,	0xa3f86cb2,
-0xc73d3aac,	0xc7654f1f,	0x385777ad,	0x20928850,
-0x47509cab,	0xf40f9ba6,	0x34efbe6c,	0x1fe3b873,
-0xfb39bd58,	0xa50b6367,	0x66c20e63,	0x49a4e1ee,
-0xe490ed5a,	0x98c340fa,	0x30bfe19d,	0x4c17d142,
-0xea54c4e2,	0x8c00e086,	0x219dee1b,	0x739a2fc1,
-0x1e07b80f,	0xea6f4799,	0xb4684fc2,	0x42fc725a,
-0x1d3c7413,	0x188b6f3c,	0x2c0e440f,	0xc6ad011d,
-0x2048625b,	0x3be9d940,	0x0a932622,	0x1fafce30,
-0x1cfa4c90,	0xd0e9f989,	0x31c0c399,	0xad0c597d,
-0x48a94bb5,	0x109da683,	0xcdc197aa,	0x7bf7ef14,
-0xebf3afa0,	0xde4ff7d3,	0x02a79e3f,	0x4d77f0e5,
-0xd0c1fd98,	0xdb342a5b,	0x7f753eca,	0xb710c135,
-0xacb3b9c0,	0x5e89ece7,	0x2ca4fe84,	0x4f22e461,
-0xa6a633fb,	0x508fb453,	0xfe1f342d,	0x79bcff1f,
-0x0c776771,	0xd6c5db47,	0xfe4d8cc5,	0x68b9f655,
-0x447b7366,	0xddde31ad,	0x8e3496df,	0xe091f8dd,
-0x78eb0fe2,	0x9e08c72d,	0x6909c46b,	0x92ca6b4a,
-0xfb7a0efb,	0x55f65148,	0x9fcc90e1,	0x254f5f40,
-0x0690dcd5,	0xc6a67013,	0xda2e35a9,	0x9171cb50,
-0xe477a087,	0xc0f89e14,	0xc1221ebf,	0xf032e99f,
-0xc8883a7e,	0xba4b17c9,	0xb0ef0962,	0x6ea751f6,
-0xfc8c336c,	0xd1966bf1,	0x26d57e1d,	0x952e847d,
-0xccdaf0c9,	0xd0aaee65,	0xb2f22a59,	0xc74bc035,
-0x900ef42a,	0xeb1e7bfe,	0xfc465b3a,	0x0cd002ce,
-0x560f5d4b,	0xecbc2658,	0x9f38856a,	0xa3f77ba1,
-0x3ee18273,	0x7ab97b2c,	0x0f5843cc,	0xdb648b0a,
-0x8e450381,	0x80176891,	0x05e3e6d2,	0x36593afe,
-0xebe78fce,	0x53d7f64c,	0x2dde1104,	0x293cd7e2,
-0x4f430fa6,	0xf3a8cdb0,	0xd28f6535,	0x9159d53b,
-0xac66a916,	0x8f77be38,	0xa16b9dad,	0x1a4699d0,
-0xe278df12,	0x2c336789,	0xb668fe15,	0x099fa98c,
-0x4fe5ef10,	0xf4692cda,	0xb86d4040,	0xb6dce0eb,
-0x6c5ef896,	0xdef35c52,	0xc02a04a4,	0xed99c619,
-0xd91721b2,	0xa2fac92a,	0x5ab9c724,	0x0ee25329,
-0xc2029fce,	0xc847bfbd,	0x3b97ddcb,	0x4aaaa55a,
-0xa16e313a,	0x06e4b6cc,	0xc0e56598,	0x60ebfadb,
-0x88841f3a,	0x7c6b65ef,	0x15542ce1,	0x70b88b78,
-0x382d1155,	0xe73c900c,	0xd8b6409e,	0xf1cc5406,
-0x64fc3223,	0x43cb616c,	0x17e3a1ac,	0xa9aba529,
-0x8dd83b32,	0xb625cd1d,	0xbcb4b0ed,	0x685cc4b2,
-0x803e35f8,	0x4e679481,	0xc7dd7591,	0xf8676b62,
-0xac25b6c8,	0xb0211931,	0x5c5df337,	0x3bde6fb6,
-0xbc433992,	0xf7315d49,	0x028e112f,	0xe3d59076,
-0x7757e95b,	0xe5c5a193,	0x59b243a0,	0x341f33d2,
-0x7c0d591d,	0x5f96d138,	0x5116c490,	0x747caf2f,
-0x6da223f1,	0xcbe30d11,	0xe10b6b28,	0xa09328e1,
-0xdf1b94ee,	0x163b48b9,	0x72e7a36a,	0x78eda572,
-0x393f0ad2,	0xf85561ea,	0x6e7ca7c8,	0x352cb3b4,
-0xb75bf9f3,	0x97ebcf76,	0x932b8b91,	0x937f1fab,
-0x6ef1e868,	0xce84fc3a,	0x9dd09a21,	0xa8f3be36,
-0x244834e9,	0xd871f223,	0xdef842f3,	0x787eaf73,
-0xf2326bca,	0xd2c3ae20,	0x48dc7621,	0x91419afe,
-0x23a44b12,	0xce0443d7,	0x4a6f1d9f,	0x1ea8cf7a,
-0xb6b7694d,	0xf29e3e25,	0x51665303,	0x33581b86,
-0xc762d72f,	0xaa658158,	0xcddb7354,	0xdacfd75f,
-0x9ec31b1c,	0xf8aa3154,	0xfdeeb2e0,	0x9cb52f84,
-0x16ce9fa4,	0x25050178,	0x2ef25d50,	0xcf4b4d41,
-0xf27d5684,	0x7bae3f36,	0x05b50e59,	0x91d23add,
-0xdbdee4ac,	0xe16994b5,	0x0a5481c3,	0x3deb8a17,
-0xb8844d77,	0xcbce6140,	0xbd748572,	0x6531627f,
-0x2137be68,	0xf46f8aa9,	0x6d2526a0,	0xe72aa307,
-0xb361a2c8,	0xed9c2987,	0x75ddeb95,	0x637d3cad,
-0x2c4dfd37,	0x01f0e2bd,	0xa521a1a4,	0x1194ab8a,
-0x96d7b9c2,	0x94cee6e5,	0x454cc836,	0xa5c0fac3,
-0xf6e9fe9b,	0x3107c251,	0x14c8c6a6,	0xd727c1e1,
-0x339f2742,	0xb0a033de,	0x56fc9280,	0x36a907cd,
-0xb74acdde,	0xe8122571,	0xd0116007,	0x238b3d4f,
-0x34532ebe,	0x1c534370,	0xd1eb258d,	0x354b2289,
-0x6007a18c,	0x58dcee7f,	0xa033ee94,	0xa5e1145f,
-0xe345c315,	0x58510592,	0x33d9db2b,	0x7ea86edf,
-0xce60a8ad,	0x2d9a8919,	0xb5e2840e,	0x020e6e15,
-0xaff8660e,	0x402c12da,	0xfaea95a5,	0x6ffb0748,
-0xc4c730a4,	0x1f57ead7,	0x2cc6d295,	0x0ef4bdb6,
-0x01a7368a,	0x52e88f43,	0xf1b14c65,	0x38018686,
-0x0c70ee45,	0x271b1fe2,	0x0eea950e,	0x61a6f56a,
-0x842497a5,	0xfbcf0f4a,	0x35132cbb,	0x4f2eb1ce,
-0x24fb1bc7,	0x343ec960,	0xda94e0a2,	0xf1206e0b,
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-0x4ceaa5e8,	0x871f3358,	0xe802a1a4,	0x7fa29ced,
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-0xe0b7c6d6,	0x464605aa,	0xb47d0ce5,	0x91d955ef,

cpu/intel/model_106cx/microcode-M04106C2218.h

diff --git a/cpu/intel/model_106cx/microcode-M04106C2218.h b/cpu/intel/model_106cx/microcode-M04106C2218.h
deleted file mode 100644
index 8fc44b1..0000000
--- a/cpu/intel/model_106cx/microcode-M04106C2218.h
+++ /dev/null
@@ -1,355 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  M04106C2218.inc  */
-0x00000001,	0x00000218,	0x04102009,	0x000106c2,
-0x8fb7c1ba,	0x00000001,	0x00000004,	0x000013d0,
-0x00001400,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x00000218,
-0x00000035,	0x000b01c0,	0x20090410,	0x00000401,
-0x00000001,	0x000106c2,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xa6db561d,	0x55b01a3e,	0x529538dd,	0x7ce8ffd8,
-0xecba7acf,	0x5d5aa633,	0x74dffacf,	0x9659ea50,
-0x0882023d,	0x953684cb,	0x0abe06ee,	0xa7ef1798,
-0x160d6cb8,	0x930cf745,	0xafc3fd79,	0xa70df3d5,
-0xb0620f46,	0x70048a23,	0xbf95ecf0,	0x76c1b997,
-0x5128616d,	0xb6b4b969,	0xcc69f71d,	0xdf7416e1,
-0xdf9a571b,	0x50c0bcc8,	0x85e2b3cd,	0xc1927532,
-0x7a04b6be,	0xe56b7f97,	0x524085c4,	0x668bf327,
-0xb3eaa54c,	0xccde06f8,	0x09b4e42b,	0x033b0a46,
-0x0f6e2fde,	0xb308ce53,	0x93eff03e,	0x8830014e,
-0x5c8a6f22,	0x91d2f757,	0xf70b648d,	0x0789998a,
-0xd84d4640,	0xe5f34e80,	0xf3357e64,	0xd1e2beea,
-0xc7e95c3a,	0x30e57e4d,	0xec214356,	0x7e10859e,
-0x1d5895d5,	0xdeeff6cb,	0xed1030ed,	0x827e603d,
-0x6b4b2de3,	0x83ec6fd0,	0xa64092f3,	0x8d9887e4,
-0xbefcbedd,	0x2111afef,	0xcb9abf96,	0x5c79ceac,
-0x9bf8a57f,	0x5d0e44be,	0xdca3d3b6,	0x9072d1ca,
-0x48e73a50,	0x8d0bc804,	0x6aea94d3,	0xc372403e,
-0x00000011,	0x39ca895f,	0x93bb36ed,	0xc7115d19,
-0x51306d80,	0xd428d120,	0x7a46a942,	0x14d5038a,
-0x282d38f1,	0x11a99a17,	0x55957f14,	0x316eb5de,
-0x92127b40,	0xe8d48b9d,	0xe4afdd47,	0x05767c4d,
-0x0d8b0fe0,	0x58166187,	0x254aced0,	0xe583cfce,
-0x8bb8b390,	0x9ff4d234,	0xa92c79b1,	0x88bd3e77,
-0x5a6d726a,	0xc6d9d333,	0x27ff83dc,	0x5abee1c4,
-0x7fbe2fcd,	0xcd7bd6ac,	0x5de3ee47,	0x9a0ca90e,
-0xc18cc94f,	0xb69c5689,	0xad1cd0c2,	0x99d9bda8,
-0x99c08dc9,	0xa5bb8cb4,	0x69be45d6,	0x66f262f4,
-0xe64fb256,	0x2bd7ec3e,	0x6a0ec5e0,	0xcd8db34c,
-0xd4449d54,	0x22359101,	0x47233556,	0xb251a6c5,
-0x1b3285a3,	0xc9395aec,	0xd3e35f52,	0xda8fe59c,
-0xa7fca4b1,	0xa5c83030,	0x1cc5573f,	0x0427645b,
-0x81d54e96,	0x9048b253,	0x44dc83a0,	0xed189dc9,
-0x75125d2c,	0x58a922bd,	0x899313ed,	0x8cf7f569,
-0x384c4ec5,	0x9029ca75,	0x55e95f72,	0xd02062e5,
-0x2e78d4ab,	0xed323243,	0xc433467d,	0xf9bb4b2c,
-0xde6a1a94,	0x89a58012,	0x84e1d244,	0xdabf2e13,
-0x6c47c470,	0xea2e2b7e,	0xec9eb0b0,	0x6765b902,
-0x0c435289,	0xf61b95eb,	0x1a250eca,	0x4ce92ea2,
-0x6e7142d6,	0x2ab22c57,	0xc8f57439,	0x59112122,
-0x5884b3cf,	0x2deaa963,	0xc267e8a8,	0xfc7cb9d2,
-0x7a7a5869,	0x75460f34,	0x1e114eba,	0x6af15809,
-0xbae1a8ba,	0x28e84fbd,	0x85e41b2b,	0xac55bc22,
-0xc55defa7,	0x2a97a719,	0x49215621,	0xd38639ea,
-0xd57a918d,	0x368d9f19,	0xaaf3ef52,	0x69cc2858,
-0x17b3adda,	0xbaee0227,	0x9820207d,	0xc522f5d4,
-0xc27c4e18,	0x03f72fe0,	0xdc3cc908,	0xd6620755,
-0xb2ed9a1a,	0x11023f9c,	0x73987f0e,	0x95317140,
-0x2a38064f,	0x04e90339,	0x2be7e65e,	0x7ab82b38,
-0x2e9941dd,	0xb5ff2903,	0x7abca5d9,	0x79544128,
-0x39f13caa,	0x250f104b,	0xb3d608ab,	0xa7c203e8,
-0xe46a126c,	0x1f0da2f4,	0xb6f10aab,	0x2a9dc6be,
-0x85b72c86,	0xca0082a6,	0x023c7574,	0xc313e95d,
-0x70f8b023,	0xf8c61769,	0x7c400ecb,	0x03d0c567,
-0x3b95f0ca,	0x15b27b08,	0xf3c65508,	0xdc644fd1,
-0x75811053,	0xe67c7ad2,	0x7d85c0b0,	0x0c9ff7d0,
-0x2e685183,	0x095684fd,	0x6df37cfd,	0xa270f064,
-0xf5569b4b,	0x06a86604,	0xdf4b2e38,	0xf20bf008,
-0x6e251617,	0x9226f9f0,	0x51a0cccf,	0xdd4b8357,
-0x9a0e19f2,	0x7ffbddef,	0xe8002b19,	0x405d642f,
-0xd33d5090,	0xcb321356,	0x7fad1948,	0xb51c4994,
-0x77c7a084,	0x846b88e3,	0xfa19afa5,	0x4c4fc587,
-0xae1fe064,	0x7de11dc5,	0x83cd780a,	0x58c33432,
-0xd294c3f0,	0x3a3de34d,	0x874e4202,	0x34bb7449,
-0x397ce3eb,	0xdcd7c545,	0xf6ed2d79,	0xaf6713b4,
-0xcaf9f286,	0x93f42d09,	0xfbbb0fc3,	0x959c402c,
-0x2c062ee3,	0x051bf973,	0x74f08ab0,	0x2a0f9d85,
-0x68403fa1,	0x767319f0,	0xe8586f1f,	0xfb547280,
-0x129c8c94,	0x30ac6b95,	0xad044183,	0x8de52a1b,
-0x42ac6ccb,	0xa2eb5eb7,	0xe086d12d,	0xb723b9c0,
-0xf7b95359,	0x55e156e8,	0x01fd9084,	0xeeafe28f,
-0x3c110061,	0x8a9d668e,	0xa1833a70,	0x0b301724,
-0x3765fc04,	0xf43aae92,	0x0aa2793f,	0x208cf158,
-0x8bb13e43,	0xd1231448,	0xba11c8f8,	0x6f779857,
-0x7136f774,	0xd4c8e9e8,	0x7be08185,	0xecd7cca1,
-0x4994bf33,	0xaa8886c2,	0xb76568df,	0x93271af1,
-0x0df50828,	0x059d3379,	0x40a60ea0,	0x6bccdbb4,
-0x776badf0,	0xaf2ccf83,	0xf81c05f3,	0x0732e9cf,
-0xfa57202a,	0x1d9cf14a,	0x74b91f23,	0x94f991b2,
-0xe844de4f,	0xf24aadee,	0x19ed94bf,	0x5508edc7,
-0xe63f71a3,	0x36e88397,	0x231e9e3a,	0xf48327b0,
-0xf0624859,	0x8f740e3c,	0x1cf3a3cd,	0xd115c768,
-0x8fb3e37a,	0x0f3524a9,	0x7d23a03e,	0xfcf1e790,
-0xd8b51c4b,	0x3b12793f,	0x3691a0a0,	0x0f2bfdfa,
-0x985ce377,	0x7d4914ed,	0xbe3dbd98,	0xc197bd8e,
-0xe54e329c,	0xf8188bc0,	0xd8e72a28,	0x3ba3f848,
-0xbf1d7200,	0x3bf294cb,	0xa0b6e8b3,	0x95927dab,
-0x12703692,	0xbf852302,	0x088454c3,	0xae6ce6fe,
-0xa837368d,	0x369448e9,	0xa8e05701,	0x9a714b61,
-0x3fd5d6b8,	0x51372f10,	0x77b0f2dc,	0xf946df23,
-0xd0d5feb9,	0xe846fbc1,	0x989ee82a,	0x31eb985b,
-0xf2025935,	0x36daa3fa,	0x73dc049a,	0x9a899e5d,
-0x33187670,	0xe8cc693f,	0xb0415660,	0xb0919235,
-0x252fd6a2,	0x02d472c7,	0xecd9f1c8,	0xdd2a87f0,
-0x33ff1cd2,	0x1648f3fa,	0xb6d72128,	0xf9a2eb89,
-0x17ece9b1,	0xa42fd9c7,	0x301afcda,	0x0ecf222c,
-0x52625ca0,	0xac16aa96,	0x4d3be9d2,	0x8186b4e2,
-0x99975b51,	0x328d10ff,	0x8424f1a1,	0x31e8162f,
-0x3e9834b6,	0xbe9a18cd,	0xcaf7599a,	0x8b8530b5,
-0xaa825750,	0xe22369dd,	0x447509c7,	0xec4d3e04,
-0xa5bdc12e,	0xde7a3edb,	0x0d98de14,	0x9eb54881,
-0x1924a171,	0x3bbc7362,	0x84714cf8,	0x96f82374,
-0xd74108ee,	0xc7205a00,	0x38f9d0c3,	0x78f8f8ef,
-0xdce3b41e,	0x026bd0db,	0x57a384c5,	0xd35b1158,
-0x36655a61,	0x6f822cc5,	0xb6324298,	0x83bf6575,
-0x15adf975,	0x6ce429dc,	0xa864560e,	0xc4da018d,
-0xdc8de183,	0x74d85fb4,	0xf3c15cc9,	0x79c83077,
-0x2e9c1446,	0x5e5b0871,	0x767a15f2,	0x5d3b47aa,
-0x5c09d151,	0x123ad6b8,	0xa21a53a6,	0x0b0d8034,
-0xc47f2d36,	0xc8389191,	0x209684e2,	0x05370aee,
-0xc9644803,	0x920ac415,	0xbd925b8c,	0x3c9f0f78,
-0xfab0acc6,	0xf2cfa403,	0xd2ac3d27,	0x25593cd8,
-0x0beed015,	0x5ddf5503,	0x2239be7b,	0xd03011b9,
-0xbe3b0df1,	0x95ab9bae,	0x27ac4734,	0x15742fb3,
-0x9a921ca7,	0x67a9d933,	0xbcccf85f,	0x60914713,
-0x12cdc887,	0x26c56b9b,	0x5fc7ee87,	0xc37272eb,
-0x7826389e,	0x781d8805,	0xca082c0f,	0xbf33b0ed,
-0x3c1010d2,	0x7513e78a,	0x02d1b14b,	0x68378b40,
-0x80dae0ba,	0xc3c15022,	0x8e1e34ee,	0x8345f599,
-0xa51b8941,	0xda9cc023,	0x61579c1d,	0x68e851cd,
-0xbfafc3b7,	0x022d3734,	0x135f8d36,	0xcdc3cb1a,
-0xc779738b,	0x7593033a,	0x8b4610f3,	0xf0158863,
-0x16d784a3,	0xc0551682,	0x9622697b,	0x88db3bdf,
-0x764b9d9d,	0x226c3e59,	0xf85f7fee,	0xd021a06b,
-0x9a9ba15c,	0x6bc761c6,	0x8cbc8b23,	0xba4d5545,
-0x693b8b99,	0x8d214381,	0xa32509a5,	0x7cac34bd,
-0x9a4b6905,	0x352c232f,	0x3d82dda0,	0x34d2dd17,
-0xefa03c83,	0x3ed1eee5,	0xbe2e5cb4,	0xfbc1f13f,
-0x0950a15a,	0xed410662,	0xee3ef306,	0x1be6f7ce,
-0xc27ffe48,	0x1afcab76,	0xcd1e0f8e,	0xa9f09079,
-0x0eca2d93,	0xff550565,	0xfc7c1a3a,	0xa7d74f14,
-0x73c655fb,	0x1719fb91,	0x8595fca5,	0x936ddfdd,
-0xfa176b9f,	0x9b0d5133,	0xe451cc28,	0x382aa742,
-0x9bfbe2d6,	0xad14a4d3,	0x6211ad39,	0xb5fae645,
-0x3e93763c,	0xd7b4d001,	0x045443e6,	0xc9fffbfd,
-0x10667b62,	0x98eff9e4,	0x7ceee6c2,	0x69086a1a,
-0x4aa03683,	0x5cf254fd,	0xac81bcc7,	0x649d5af1,
-0xa004c935,	0x421933f3,	0x0f5a412f,	0x945ccb31,
-0xc87b4948,	0x9f7ee55e,	0xbd78b91d,	0x590ef798,
-0x73001efc,	0x4c14b377,	0x1a45de15,	0xc8dda7e3,
-0xde57e6d7,	0x47e65d31,	0x01b560f1,	0xa502f06f,
-0xb6c5c16e,	0x7cb166dd,	0x7636c3c9,	0x4c108d98,
-0x73904c23,	0x1f5f3761,	0xe52b2ae2,	0x78b5952b,
-0x7fd50bb3,	0xae3bd1f2,	0x58ca3508,	0x0788523a,
-0xfbb55497,	0xc2179fd7,	0x25fa5930,	0xf5aeec4b,
-0x6082eb97,	0x1d9b4acd,	0x143b24b6,	0x34d507c6,
-0xcacc92f2,	0xc17c3be3,	0x19cfcbac,	0x33dba256,
-0x11825477,	0xdd6744ee,	0xf0b629b8,	0x57912940,
-0x15733ef5,	0xe634d0d1,	0x2dfeba27,	0xc6319803,
-0x7d15fc9d,	0x5c0b6eba,	0x0ecdde39,	0x32533d3b,
-0xbcd7848f,	0x06d09630,	0x1d3412d0,	0xacb97d0d,
-0xf54f8a7c,	0x3d3a85a3,	0x0e3fe0bd,	0x2e32d571,
-0xcf361a7e,	0x4983831f,	0x9cb8aa09,	0x98bca187,
-0x069db1a9,	0xe8134a79,	0xa7dd0172,	0xfe5fab97,
-0x3423dab8,	0x1f936b9e,	0xbfcbb3d5,	0xb6d131f6,
-0xd6aa2295,	0x63759bd3,	0x7bf69653,	0x07f4fd56,
-0x725b3288,	0x27682bac,	0x8ac30a22,	0x5a7d0cb5,
-0x9d3a0919,	0xe98f45a9,	0x62d8d92d,	0x641b53dc,
-0xd4cdcfad,	0xfcf5f997,	0x8dbc5668,	0x9b4b2a80,
-0xac909831,	0x44b9476f,	0xbb81e58b,	0x31a7c9e8,
-0x3bb674e5,	0xbde06fc7,	0xa6be53a2,	0xa2a30c2a,
-0x424aca03,	0xa408414e,	0x57cb60ef,	0xce46ef67,
-0xd6b97b89,	0xb885648e,	0x3f24d054,	0x1617dfbf,
-0x0650d6e3,	0x403e13d1,	0x4c18d9c5,	0xe64f77c2,
-0x6957ebbf,	0x76f77d78,	0x4651ac3a,	0x746888a1,
-0x86bdf428,	0xa7b61fa4,	0x69ec5eff,	0xebebde48,
-0x7aaa695a,	0x2f462098,	0x94d27b1a,	0x6ea584d1,
-0x0d9a3ace,	0x9cc23297,	0xc955b249,	0x131aaa99,
-0xa0d752b7,	0xa5bea5e9,	0xccc20d9c,	0xff448a18,
-0xecd6c82e,	0xc5ff74bd,	0x3b698564,	0x082f7980,
-0x61a9409f,	0x145b5ec2,	0xa8d65bb3,	0xfb6dbde8,
-0x404ed75f,	0xb32418af,	0x7df9ac58,	0x188aed62,
-0x82b41c35,	0x1fcb7d6d,	0x221023ad,	0x33e759f4,
-0xf4f7873d,	0x4874a5bf,	0xcebeec18,	0x16435619,
-0xd660d5dc,	0xfdd40b0b,	0x3332ba2d,	0xb843d48f,
-0x44a0390d,	0xc87ad47a,	0xbeb03e24,	0xb5cddd29,
-0x978e0836,	0x8d0f976d,	0x65358bb2,	0xdab3c7db,
-0xc1c1c421,	0xfbfcc560,	0xdcb21c05,	0x5db79c04,
-0xd57ae181,	0xd3e12139,	0xf6804667,	0x1e22f5ef,
-0xfa4e7bb8,	0xc734f8fe,	0xabc4eefd,	0x3e3edeef,
-0xa7504f27,	0x7dd07de3,	0x049ecb0f,	0x4faa2e25,
-0x0657d955,	0x3501f79b,	0xba88eb2b,	0x027ea7bd,
-0xc07e1907,	0xbee45c09,	0xce5077ac,	0xc29ae2c8,
-0xa5c529a5,	0x2240bd23,	0x003baa87,	0x94b0aa6a,
-0x32838466,	0x1a1bee19,	0x9302635b,	0xee524d8f,
-0x2c2ec677,	0x11ad493c,	0xef9d192d,	0x921064eb,
-0xec46ada3,	0x8215b76c,	0x734ab486,	0x81898de9,
-0xf686b56b,	0x8414b0bb,	0xd77227d2,	0xf89b8772,
-0x0bc6741f,	0x92d33ef2,	0xdf29599d,	0x60aa30bf,
-0x5c945cf1,	0xdfc639fb,	0x41921019,	0xb305311e,
-0xed6e0141,	0x44429de2,	0x2814d5e2,	0x9f35cd5e,
-0x2f5224b1,	0xce30fd34,	0x0db89af5,	0xc955122d,
-0xd7e6914a,	0x337c95cb,	0x8e582ee8,	0xad51cc03,
-0xced7bb1b,	0xcb839d39,	0x39eb6ff0,	0xfcd5f580,
-0x011e814c,	0xb070711e,	0xf207b150,	0xa0433d3a,
-0x9f88f7d1,	0x9560e6e0,	0xc4ff1232,	0xc87629cd,
-0xae8d5db1,	0xabde125b,	0xcd6334fc,	0x31ff85cc,
-0xe2c9a08a,	0x6c9b24dc,	0x402416b6,	0x9a9dd241,
-0xefd2ba2a,	0x23525dd8,	0x894dc2c8,	0x05c0f81d,
-0x7bcf377b,	0x91c874c9,	0x0b674950,	0x5292a9c5,
-0xe3b515f1,	0x70beba49,	0xa7566083,	0x135871ea,
-0xb3d56bbf,	0x88a9cfb5,	0x07c77cad,	0x6f827852,
-0xca657453,	0xcd618db5,	0x72ad2a88,	0x458854e6,
-0xdc73961d,	0x27fbb11c,	0x7a4ab77b,	0xbf253be1,
-0x57d57ea1,	0x680716bd,	0x663fd18b,	0x82cc4443,
-0x7c6102d8,	0xcb7ead69,	0x5f58e7f9,	0xc9e246dd,
-0xf2917165,	0x9534d3a5,	0xd298fa34,	0xf089f01c,
-0x9a7f2047,	0xc2061efb,	0xa94b24eb,	0x82755d44,
-0xea8d7c42,	0x059039a9,	0xda9a3040,	0x1da6c3ba,
-0x02b1f1ef,	0x77e5215c,	0x3050281d,	0x82bac2dc,
-0xf932ad41,	0x836ff9d2,	0x34770bd8,	0x71c7cecf,
-0xbbc52ea0,	0x5e4cec9c,	0x3f933fe5,	0x3d5156f2,
-0x90321f7f,	0x8e2ee8e9,	0x6c5cc0b9,	0xf25c9ffe,
-0x248295d5,	0x1973ca29,	0xe00a2db3,	0xed5d06a5,
-0x7d5263de,	0x67fb1703,	0x5c740bee,	0xdc4c55fa,
-0x69c44982,	0x9408eaf4,	0xc10cb46c,	0x34d77b3c,
-0x80e4011d,	0x795d39cf,	0x90e77587,	0xf47e8370,
-0x6eda0fa4,	0xbbe85a24,	0xa28d6e35,	0x1dc10b76,
-0x7c1c1fe5,	0x2babdd46,	0xc81ed994,	0x1339ad2d,
-0x2a9cc0c4,	0xed31b1e0,	0x5f4dba77,	0xc819f489,
-0xe1c49619,	0x0d445dd0,	0xa7b5fcd4,	0xbd4c0d41,
-0x42fba7b5,	0xa153350a,	0xaad15ccf,	0x573ba327,
-0x2cbc5609,	0x69376a8f,	0x53653e67,	0xe20d51d9,
-0x68559292,	0x4b04e15c,	0x05a91cd6,	0xa22f93b5,
-0xf2ad015f,	0x2626efe2,	0xab47a122,	0x3d61d5f2,
-0xda7f1d3f,	0xa1b3db0f,	0xb13b7071,	0xdf98f6f3,
-0x5ad04aba,	0xcde20b06,	0x8392dd5e,	0x6bd5c0ab,
-0x0caaaf64,	0x300608ab,	0x3bd4ba6a,	0xc9d03729,
-0x4ac8132b,	0x32abcdec,	0xa445533f,	0x728d3434,
-0xb1b02c22,	0x3d0d68d4,	0x4f8cc30b,	0x13c9f40e,
-0x84e01ae1,	0x6081ee9e,	0xe194bdb1,	0x5ef8e834,
-0x4bcb9347,	0x96eedc3d,	0xf97305aa,	0x6eccd9f3,
-0x8764e599,	0x204dd0d4,	0xa5437540,	0x311c31b9,
-0x62831f07,	0x0a36cf8e,	0x0ac92987,	0x0af77a46,
-0x6fe4c62c,	0xcbab3c9c,	0xf33d62db,	0xd564aa11,
-0x96857605,	0xcf480b90,	0x1a3720de,	0xcca17331,
-0xcb2b2dea,	0x0be380a0,	0xe5dfce5d,	0x1cfd0619,
-0x87ec28ee,	0xf23777ea,	0x187b3286,	0xefcfa123,
-0x491a4c38,	0xf3c39433,	0xc6f15560,	0xe41cbc90,
-0x802d41cd,	0x68882b7c,	0x289c1a7d,	0x05614a13,
-0xa4343f16,	0xa38c2ba2,	0xafb73657,	0xa944b9df,
-0x74e55f34,	0x2f4ff21d,	0xf131eef8,	0x0ef5b6ac,
-0xa88cb8d0,	0x72bfcb9b,	0x3c50db0f,	0xfc8604f2,
-0x888be3f3,	0xd65d8aa7,	0x077f9487,	0x475f1545,
-0xfc1a7834,	0xfbb3c276,	0x29d4ae1b,	0x73ceb23b,
-0x56914e3d,	0xd3349a98,	0x597b1180,	0x77a06b7a,
-0xfc443657,	0x6ae4340f,	0xde105fdd,	0xd8e62895,
-0x6347a3d8,	0x9c164dc1,	0x6ce3771d,	0x461b9f7c,
-0x76e6af34,	0x7639d5b3,	0x7b6b4e26,	0xf2917def,
-0x16ecddc1,	0x9a4dc498,	0x7efe74bc,	0xa0dd6ad7,
-0x7da7b3bd,	0xb3fa8cc8,	0xc380b5c2,	0xfa5397d2,
-0x55603955,	0xcd3d7de8,	0x2858a7a5,	0xc0f5f668,
-0xe8be8599,	0x95a7f5d3,	0x72a1ca36,	0x5cc1803b,
-0x07524f41,	0x1adfdde2,	0xe6c32b4f,	0x591b3d51,
-0xbcf44935,	0x3a3fb989,	0xd5a2960f,	0xecadfdef,
-0x4cfbca69,	0x44fb74c9,	0xe97b9340,	0x112c961a,
-0x15ea13a2,	0x3e7b83ab,	0xa884aec7,	0x441c09f5,
-0x123f039c,	0xcae13459,	0xf4db2c5d,	0x2c462c28,
-0x6c91cf2a,	0xe8f3cc3b,	0xf88464ca,	0x78a05617,
-0x785e5218,	0xffee9f91,	0x3b96f3d3,	0x4ecbe904,
-0x64366c76,	0x9ee3ca17,	0x99beae1e,	0x88802e00,
-0x252f9f1c,	0x88ba8606,	0x6bd00538,	0xd082f1b0,
-0x6eccb905,	0x4cf85611,	0x80fc0efe,	0x6907dfd0,
-0x05bfe654,	0xbad14db6,	0x72e5d49d,	0x067f2977,
-0x5f2fd09c,	0xf13eba72,	0x76badc64,	0xb3496815,
-0x4972bf43,	0xac0d4742,	0x0cf31094,	0x21dcf61a,
-0x4e5bc5a0,	0xb3236af0,	0xd86c3480,	0x2c261d40,
-0x9a910b98,	0xfe7b889b,	0x75030819,	0x8061817e,
-0x78911c6d,	0x3681a10c,	0x5cdc0928,	0xa4a81683,
-0xd949e676,	0xb5d8ca1d,	0xcaf8707c,	0x8bdab4c6,
-0xf777b588,	0x16c6d8ec,	0x10d7982c,	0xefbc0a1f,
-0xde2cf0a5,	0xa3a2c217,	0x042d6731,	0x855f28d7,
-0x7e2dc2d7,	0xb7312a9c,	0x0103ad9e,	0xea345f2a,
-0x091315be,	0x36b87acc,	0x7bbe8b8c,	0xd960484b,
-0x7c4c63b6,	0xd51e7bbf,	0x45e40c13,	0xd2252eb5,
-0xa17ee634,	0xbb931edb,	0x77950c79,	0xd98adee7,
-0x4ce0840c,	0x896585bc,	0x671f56c9,	0x6a90f075,
-0x4d71a26f,	0x5a16b821,	0x371a861d,	0xf9865262,
-0x56599a46,	0xa5d5ac42,	0x4ae9d9bf,	0xa86e8ecb,
-0x23ae12ae,	0x5de95cfc,	0x60a58b65,	0xeb79c0ba,
-0x406be042,	0x9bb8a05d,	0x26b28bc1,	0xe5fc9e4b,
-0x1e7947f6,	0x966f480a,	0xe29db78a,	0x39743fe4,
-0xa4e3a331,	0x5877cbdf,	0x25f9a660,	0xd97174a6,
-0xf3c561e5,	0xdb4b565a,	0x9d4d2383,	0x389b7af4,
-0xe06f4662,	0xc5468145,	0xbc602fdf,	0xcbf3db0e,
-0x97d8757f,	0x02836802,	0x6a681b64,	0x7337e8bd,
-0xe85d9502,	0xd6efec0e,	0xd7e8d30b,	0xcdf11803,
-0xef5fb0d5,	0xd5251f29,	0x574aefb2,	0xe691d7cc,
-0x4a4bfec9,	0x5aa7bd81,	0x68716104,	0xe5c40c92,
-0x7600d7b8,	0xcf95798a,	0x26e8bea6,	0xb1a38beb,
-0xbacd5b95,	0xecff91d3,	0xf15958f2,	0x75b02107,
-0xde523549,	0xba5fc05a,	0x7072115a,	0x1197a903,
-0xd808d1fb,	0xc7e709de,	0x1a65d1bd,	0x562bbd0f,
-0xf0541e82,	0x68a54aa6,	0xefad28ef,	0xc9262772,
-0x053e7cc4,	0x54bc9528,	0x74c92196,	0x618a0741,
-0x2b5421a7,	0x291c8e1d,	0xdbfdd7a1,	0x4fc60ddc,
-0x844a6b5a,	0xaf7ee867,	0xe9749f8f,	0x6deda822,
-0xf049feae,	0xb6a4fa4d,	0x5b2bc1c1,	0x65a52c54,
-0x32209928,	0x88051c7e,	0x8590db07,	0xf2934c96,
-0x39a98498,	0xb56f1a53,	0x64d2e2aa,	0xe9811515,
-0x8b2e77e3,	0x0e5471d6,	0x9a23a520,	0xd571a3be,
-0x259e6fb3,	0x09b878ec,	0xab8b31aa,	0x0d558e8a,
-0xdcbda8cc,	0xd6ffb436,	0x63fc4813,	0x1e2d9446,
-0xd7cd64cc,	0x9517c30b,	0x60cb42c7,	0x46cabadf,
-0xc84080e0,	0xe4ab3b0b,	0xb0c34879,	0x8b5c6526,
-0x77782561,	0x276aa4d0,	0xe86dbf8c,	0x989630f8,
-0x7d9cf3eb,	0x43928216,	0x36490c88,	0x472395d7,
-0x4f1e18ab,	0xb03ddcf6,	0xd10293b3,	0x119742d6,
-0x515f82a4,	0xe429568f,	0x9101c537,	0x382521e8,
-0x529345a7,	0xfdea02aa,	0xa5bba9cd,	0x9ecdad6e,
-0x93ecc7a0,	0xa1da94bf,	0x1eb6f562,	0xabc2ec17,

cpu/intel/model_106cx/microcode-M04106CA107.h

diff --git a/cpu/intel/model_106cx/microcode-M04106CA107.h b/cpu/intel/model_106cx/microcode-M04106CA107.h
deleted file mode 100644
index 5dcecff..0000000
--- a/cpu/intel/model_106cx/microcode-M04106CA107.h
+++ /dev/null
@@ -1,355 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  M04106CA107.inc  */
-0x00000001,	0x00000107,	0x08252009,	0x000106ca,
-0x7deb58b2,	0x00000001,	0x00000004,	0x000013d0,
-0x00001400,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x00000107,
-0x00000010,	0x000500b0,	0x20090820,	0x00000401,
-0x00000001,	0x000106ca,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x2beaa92c,	0xfc3395b7,	0x10be81a0,	0xb318e067,
-0x723923f0,	0xb297dc63,	0x7d52bc4b,	0xc6ef362f,
-0x0882023d,	0x953684cb,	0x0abe06ee,	0xa7ef1798,
-0x160d6cb8,	0x930cf745,	0xafc3fd79,	0xa70df3d5,
-0xb0620f46,	0x70048a23,	0xbf95ecf0,	0x76c1b997,
-0x5128616d,	0xb6b4b969,	0xcc69f71d,	0xdf7416e1,
-0xdf9a571b,	0x50c0bcc8,	0x85e2b3cd,	0xc1927532,
-0x7a04b6be,	0xe56b7f97,	0x524085c4,	0x668bf327,
-0xb3eaa54c,	0xccde06f8,	0x09b4e42b,	0x033b0a46,
-0x0f6e2fde,	0xb308ce53,	0x93eff03e,	0x8830014e,
-0x5c8a6f22,	0x91d2f757,	0xf70b648d,	0x0789998a,
-0xd84d4640,	0xe5f34e80,	0xf3357e64,	0xd1e2beea,
-0xc7e95c3a,	0x30e57e4d,	0xec214356,	0x7e10859e,
-0x1d5895d5,	0xdeeff6cb,	0xed1030ed,	0x827e603d,
-0x6b4b2de3,	0x83ec6fd0,	0xa64092f3,	0x8d9887e4,
-0xbefcbedd,	0x2111afef,	0xcb9abf96,	0x5c79ceac,
-0x9bf8a57f,	0x5d0e44be,	0xdca3d3b6,	0x9072d1ca,
-0x48e73a50,	0x8d0bc804,	0x6aea94d3,	0xc372403e,
-0x00000011,	0x3b994153,	0x23faa5e1,	0xc3feae68,
-0x76d5e67d,	0xbd696479,	0x138a05ef,	0xf2b5de22,
-0x4ccba0ed,	0x333cc95c,	0x8d98a2ae,	0x0bf1fa24,
-0x239f1fbf,	0x44701d3b,	0xb176783f,	0x20eff2cc,
-0x0cf93bf9,	0x4e6ace41,	0xe346d231,	0x11d560af,
-0xae8874a2,	0xe344fa92,	0x0056d268,	0xd8068d91,
-0xf336cf97,	0x45c54f6d,	0xc0650992,	0xa3f86cb2,
-0xc73d3aac,	0xc7654f1f,	0x385777ad,	0x20928850,
-0x47509cab,	0xf40f9ba6,	0x34efbe6c,	0x1fe3b873,
-0xfb39bd58,	0xa50b6367,	0x66c20e63,	0x49a4e1ee,
-0xe490ed5a,	0x98c340fa,	0x30bfe19d,	0x4c17d142,
-0xea54c4e2,	0x8c00e086,	0x219dee1b,	0x739a2fc1,
-0x1e07b80f,	0xea6f4799,	0xb4684fc2,	0x42fc725a,
-0x1d3c7413,	0x188b6f3c,	0x2c0e440f,	0xc6ad011d,
-0x2048625b,	0x3be9d940,	0x0a932622,	0x1fafce30,
-0x1cfa4c90,	0xd0e9f989,	0x31c0c399,	0xad0c597d,
-0x48a94bb5,	0x109da683,	0xcdc197aa,	0x7bf7ef14,
-0xebf3afa0,	0xde4ff7d3,	0x02a79e3f,	0x4d77f0e5,
-0xd0c1fd98,	0xdb342a5b,	0x7f753eca,	0xb710c135,
-0xacb3b9c0,	0x5e89ece7,	0x2ca4fe84,	0x4f22e461,
-0xa6a633fb,	0x508fb453,	0xfe1f342d,	0x79bcff1f,
-0x0c776771,	0xd6c5db47,	0xfe4d8cc5,	0x68b9f655,
-0x447b7366,	0xddde31ad,	0x8e3496df,	0xe091f8dd,
-0x78eb0fe2,	0x9e08c72d,	0x6909c46b,	0x92ca6b4a,
-0xfb7a0efb,	0x55f65148,	0x9fcc90e1,	0x254f5f40,
-0x0690dcd5,	0xc6a67013,	0xda2e35a9,	0x9171cb50,
-0xe477a087,	0xc0f89e14,	0xc1221ebf,	0xf032e99f,
-0xc8883a7e,	0xba4b17c9,	0xb0ef0962,	0x6ea751f6,
-0xfc8c336c,	0xd1966bf1,	0x26d57e1d,	0x952e847d,
-0xccdaf0c9,	0xd0aaee65,	0xb2f22a59,	0xc74bc035,
-0x900ef42a,	0xeb1e7bfe,	0xfc465b3a,	0x0cd002ce,
-0x560f5d4b,	0xecbc2658,	0x9f38856a,	0xa3f77ba1,
-0x3ee18273,	0x7ab97b2c,	0x0f5843cc,	0xdb648b0a,
-0x8e450381,	0x80176891,	0x05e3e6d2,	0x36593afe,
-0xebe78fce,	0x53d7f64c,	0x2dde1104,	0x293cd7e2,
-0x4f430fa6,	0xf3a8cdb0,	0xd28f6535,	0x9159d53b,
-0xac66a916,	0x8f77be38,	0xa16b9dad,	0x1a4699d0,
-0xe278df12,	0x2c336789,	0xb668fe15,	0x099fa98c,
-0x4fe5ef10,	0xf4692cda,	0xb86d4040,	0xb6dce0eb,
-0x6c5ef896,	0xdef35c52,	0xc02a04a4,	0xed99c619,
-0xd91721b2,	0xa2fac92a,	0x5ab9c724,	0x0ee25329,
-0xc2029fce,	0xc847bfbd,	0x3b97ddcb,	0x4aaaa55a,
-0xa16e313a,	0x06e4b6cc,	0xc0e56598,	0x60ebfadb,
-0x88841f3a,	0x7c6b65ef,	0x15542ce1,	0x70b88b78,
-0x382d1155,	0xe73c900c,	0xd8b6409e,	0xf1cc5406,
-0x64fc3223,	0x43cb616c,	0x17e3a1ac,	0xa9aba529,
-0x8dd83b32,	0xb625cd1d,	0xbcb4b0ed,	0x685cc4b2,
-0x803e35f8,	0x4e679481,	0xc7dd7591,	0xf8676b62,
-0xac25b6c8,	0xb0211931,	0x5c5df337,	0x3bde6fb6,
-0xbc433992,	0xf7315d49,	0x028e112f,	0xe3d59076,
-0x7757e95b,	0xe5c5a193,	0x59b243a0,	0x341f33d2,
-0x7c0d591d,	0x5f96d138,	0x5116c490,	0x747caf2f,
-0x6da223f1,	0xcbe30d11,	0xe10b6b28,	0xa09328e1,
-0xdf1b94ee,	0x163b48b9,	0x72e7a36a,	0x78eda572,
-0x393f0ad2,	0xf85561ea,	0x6e7ca7c8,	0x352cb3b4,
-0xb75bf9f3,	0x97ebcf76,	0x932b8b91,	0x937f1fab,
-0x6ef1e868,	0xce84fc3a,	0x9dd09a21,	0xa8f3be36,
-0x244834e9,	0xd871f223,	0xdef842f3,	0x787eaf73,
-0xf2326bca,	0xd2c3ae20,	0x48dc7621,	0x91419afe,
-0x23a44b12,	0xce0443d7,	0x4a6f1d9f,	0x1ea8cf7a,
-0xb6b7694d,	0xf29e3e25,	0x51665303,	0x33581b86,
-0xc762d72f,	0xaa658158,	0xcddb7354,	0xdacfd75f,
-0x9ec31b1c,	0xf8aa3154,	0xfdeeb2e0,	0x9cb52f84,
-0x16ce9fa4,	0x25050178,	0x2ef25d50,	0xcf4b4d41,
-0xf27d5684,	0x7bae3f36,	0x05b50e59,	0x91d23add,
-0xdbdee4ac,	0xe16994b5,	0x0a5481c3,	0x3deb8a17,
-0xb8844d77,	0xcbce6140,	0xbd748572,	0x6531627f,
-0x2137be68,	0xf46f8aa9,	0x6d2526a0,	0xe72aa307,
-0xb361a2c8,	0xed9c2987,	0x75ddeb95,	0x637d3cad,
-0x2c4dfd37,	0x01f0e2bd,	0xa521a1a4,	0x1194ab8a,
-0x96d7b9c2,	0x94cee6e5,	0x454cc836,	0xa5c0fac3,
-0xf6e9fe9b,	0x3107c251,	0x14c8c6a6,	0xd727c1e1,
-0x339f2742,	0xb0a033de,	0x56fc9280,	0x36a907cd,
-0xb74acdde,	0xe8122571,	0xd0116007,	0x238b3d4f,
-0x34532ebe,	0x1c534370,	0xd1eb258d,	0x354b2289,
-0x6007a18c,	0x58dcee7f,	0xa033ee94,	0xa5e1145f,
-0xe345c315,	0x58510592,	0x33d9db2b,	0x7ea86edf,
-0xce60a8ad,	0x2d9a8919,	0xb5e2840e,	0x020e6e15,
-0xaff8660e,	0x402c12da,	0xfaea95a5,	0x6ffb0748,
-0xc4c730a4,	0x1f57ead7,	0x2cc6d295,	0x0ef4bdb6,
-0x01a7368a,	0x52e88f43,	0xf1b14c65,	0x38018686,
-0x0c70ee45,	0x271b1fe2,	0x0eea950e,	0x61a6f56a,
-0x842497a5,	0xfbcf0f4a,	0x35132cbb,	0x4f2eb1ce,
-0x24fb1bc7,	0x343ec960,	0xda94e0a2,	0xf1206e0b,
-0x80bf8007,	0x7e09d8d8,	0xba6bc1ff,	0x892c956c,
-0x4ceaa5e8,	0x871f3358,	0xe802a1a4,	0x7fa29ced,
-0xea8616cb,	0xc1999088,	0xc5baf089,	0xd1490754,
-0x091f6f21,	0x9a3e3c4f,	0x1eb11650,	0x13fd05fc,
-0x5e9d5b0e,	0xd1485d34,	0x474feaae,	0xc211a60f,
-0xa609643e,	0x07052bb2,	0xa7bfb285,	0x30bbc170,
-0x9ebe8d27,	0x5207a9ee,	0xfc12bd0e,	0x7fa428af,
-0x2d1c8a2d,	0x6f15c0d6,	0xdaf0ee75,	0xd32bb1d1,
-0x694463f5,	0xa1ebdae4,	0xeaa3d0b2,	0x954077de,
-0x181da0bb,	0x4556808d,	0x46e80a64,	0x0c017172,
-0xd8ef8702,	0xa0e6d100,	0x90b0a9f0,	0x4a13a407,
-0xf1675dde,	0x5110d8c8,	0x1c028526,	0x7774581f,
-0x9d3d8c23,	0xcaf8b632,	0xf401a52f,	0xa5d14a5c,
-0xebed6c1b,	0x2ec618ad,	0x5b63935e,	0x89508732,
-0x43a48b2e,	0x87535b2b,	0x0ffb28c2,	0x1fd1becd,
-0xd2b2a18d,	0x45dccb4c,	0xad41a54b,	0x7ffa2fed,
-0xddd18aa1,	0x1db06a98,	0x860d6b58,	0x2997109e,
-0x80a2300e,	0x0cc52e7a,	0x15b24c31,	0x8f717016,
-0xa425cac3,	0x8153e1bf,	0x5e91fd89,	0x04b17f35,
-0x150fd30c,	0xc7309d31,	0x63dce1b0,	0x162eb854,
-0x8093904e,	0xf7b4399d,	0xb23fa735,	0x67509c6c,
-0x5380dec9,	0xb79172a8,	0xb6c249d1,	0xcd040b42,
-0x4efe12f8,	0x63ce3363,	0x406d1666,	0xf8e9bc95,
-0x99cbff2c,	0xaf0cac38,	0xe6556ddf,	0x9bb2a399,
-0x43387c9e,	0x4951f5ac,	0xfa4ddb69,	0x562ec852,
-0xa2e3e441,	0x32a80b75,	0xd88361c5,	0xf04b7ac9,
-0xb0ea18bb,	0xf5035c94,	0x520c9c12,	0xb4c7e15c,
-0x6f72c4bc,	0x80f2112a,	0x4e4bbb87,	0x7bb5ee1f,
-0x54eb313e,	0x18cb6cb9,	0xca5ff580,	0x2538d798,
-0x2b813681,	0x58c11a6c,	0x68ae4070,	0x40799341,
-0xa740f86a,	0x722ca7ef,	0x815c71c7,	0xe663c6f7,
-0x5e249b96,	0xe97e3b71,	0xb7ee5a12,	0xd5f065bd,
-0xaa642191,	0x9864e095,	0x0c087780,	0x0fc0d969,
-0xf6b82791,	0x04aa55f8,	0x872c7cd1,	0x43bc93b0,
-0x12fe4c05,	0x16f15229,	0x06161603,	0x6e76239d,
-0x90ea9c62,	0xecf642df,	0xb52a8db6,	0x2e0c5d58,
-0x10f09bbc,	0x1bb1b2a3,	0x7132167b,	0x291d5f16,
-0xd7814a9e,	0x79e52dbf,	0xef6b61e8,	0x585b920a,
-0x18ea4e61,	0x72ce62fc,	0x59ed8e9f,	0x610564d3,
-0x40f4f145,	0x0a2f60c1,	0xec64ebc3,	0x8ad5b251,
-0xb471e120,	0xb899cffd,	0x2b81118a,	0xa3b591a8,
-0xdeced3ab,	0xcb9aacb8,	0xba53fbdd,	0x6e49e298,
-0x75fa6c19,	0xd11cfe98,	0xd29ce7fc,	0x7471df09,
-0xb59b2474,	0xdff0b07d,	0xae92c4b7,	0x6414ee6b,
-0x6acba1a5,	0xed9c0b5b,	0x728f7644,	0xf6d20c7a,
-0xf03ad03e,	0x6612b0c3,	0xe156c417,	0x9aec4a8d,
-0x02be86ff,	0xe11d1660,	0xefeba14a,	0x7d275f33,
-0x16acabb2,	0x7ac99cd7,	0xd18566e4,	0x3bce4ca1,
-0xb0312f16,	0x5700f72c,	0x345864bd,	0x917a4db2,
-0xaa22b7f0,	0xc66eb69c,	0x62f8a99e,	0x6364a44f,
-0x956d2cd2,	0xfa64b7df,	0x47238b18,	0xddebaeff,
-0x39c9d16b,	0xaa1487cb,	0xc6f91d13,	0x8191316d,
-0xbf5d7ddd,	0xc907cbb1,	0x7a283ba3,	0x0365e6a3,
-0x2fbb3185,	0x159d0436,	0xb55b6990,	0xf0935005,
-0x441e4fc8,	0xd1dfdc91,	0xdd9ff8bc,	0x95c88203,
-0xa8029310,	0x62501ff4,	0xf838a813,	0xfb66d5ce,
-0xe6bb8354,	0xe2afb832,	0x55dcf796,	0x315f28cf,
-0x400de577,	0x3ad89b1b,	0xeee943aa,	0xbd5d9001,
-0x8dd4771b,	0x21ad481c,	0x504d6222,	0xfc0e6728,
-0x7abe5d62,	0x332f8309,	0x50d8c688,	0x4b686808,
-0xbe6395ec,	0x5153b67c,	0x04144a35,	0xa85077ca,
-0xa3775cda,	0x838556dc,	0x973c2222,	0xf5037c9f,
-0xd02b0c87,	0xa3e69f8f,	0xdf68cce7,	0x9490d31f,
-0x3d9c5cf2,	0x939e7823,	0xc51b9a2d,	0x2e802e27,
-0x65079a36,	0x3b6e3d79,	0x5fafbac6,	0x9973bc64,
-0xfc4e7124,	0x56e1fad3,	0x10ec049f,	0xefa79c0b,
-0xcde48353,	0x3fa7f449,	0x07cb1a31,	0xf6ba0053,
-0xe5af7b10,	0x9e2dc089,	0x290f3fa4,	0x116da472,
-0x7a006f5b,	0x727205bf,	0x7c59870d,	0x968c6000,
-0x3ed4fd57,	0xe423effe,	0xc352ef7a,	0xd23d00e5,
-0xbded3a50,	0xedcdc3d0,	0x3a517a74,	0xbdfc58cc,
-0x24b2371f,	0xf967f533,	0x26069547,	0x2114e85e,
-0xa1953f56,	0xf0c52ebf,	0x235320ae,	0x35600f33,
-0x5c1ca2b7,	0xe89db0da,	0x08ce35aa,	0xc66cef79,
-0xacd41ce4,	0x865f4c69,	0x15a3376b,	0xdee5d7a1,
-0x6fdd6362,	0xa4125977,	0xcb61bae2,	0x5e3da819,
-0xc6d2e56a,	0xde1807f2,	0xb30c3473,	0x1c4038c5,
-0xbf8afac6,	0x37423d2d,	0x72d9da33,	0x39e95bf5,
-0xd6a91cc8,	0xbbf4c2d8,	0x7c9d4b21,	0x13c514d5,
-0xcae41aac,	0x07b97f18,	0x0cdfbdee,	0xe7a9020b,
-0x1839f082,	0x7c414530,	0x43ba1070,	0x95945971,
-0x82e31721,	0x2fb159e5,	0x225c2158,	0xfadf74f6,
-0x788387d6,	0xb40c98fe,	0x0c75ba9d,	0x0487eb2f,
-0x7e9a1b0e,	0x5c442185,	0xcf1dffde,	0x39f9bc44,
-0x46b961d3,	0x9a14b19a,	0xe284d2ac,	0x52151caa,
-0x67f34f5e,	0xf4042d4f,	0xa28a223d,	0x3deb23f1,
-0x12d14b6f,	0x18901f31,	0xb3c7950a,	0xfb7d3557,
-0xb83e457f,	0xb6e13f07,	0xd26f5435,	0x83f05e15,
-0xf549a030,	0x6d1122d0,	0x540b3ef9,	0x8ecdac22,
-0xdabe1b2d,	0xf4913cc0,	0x579f9d77,	0xd4725d33,
-0x76b7abb0,	0x03452691,	0x4d52fff6,	0x12e95a96,
-0x42131074,	0xbb3eaa95,	0xb775618e,	0x6325764e,
-0xeb847c5a,	0xeb7b9c6d,	0xd01dd328,	0x547269e1,
-0x2cebecd3,	0xcbb0ed0f,	0xcc87e62c,	0x8e6b0ce0,
-0x8a8f9f06,	0x689e0c4f,	0xb3a1fe5a,	0xed84a0a2,
-0x66187741,	0x62a4475b,	0x5c4c31bb,	0xea000d76,
-0x8676c757,	0xd59cc6bd,	0x52f107ff,	0x1f4a0c66,
-0x7af566ef,	0x4af3586c,	0x11d5cd6f,	0x6b8bc81a,
-0x480eed48,	0x2ec7c65e,	0x6c0f3253,	0x100f2794,
-0x18d6c62a,	0x338f59f6,	0x8e6e2f9e,	0x75fccfd7,
-0xbc80ea7a,	0xa90f1473,	0xfa9d22c4,	0x3ccdaa53,
-0xe568fef6,	0x6a761fd4,	0x61c26b23,	0xabc31163,
-0x3b840e9e,	0xee864319,	0x84f93208,	0x743a780e,
-0x1507a3bf,	0x147dad13,	0x8952177f,	0xbeb40da7,
-0x699af39e,	0x6d22bdfb,	0x5fe8112c,	0xdb3f8dbb,
-0x026f8ff2,	0x6bf9658d,	0x9faabf0d,	0x6a2f3989,
-0x5be4a617,	0x9e55f0c3,	0x70510d75,	0x0fd92413,
-0x63d1d3c7,	0x68cf84bd,	0xbbff5901,	0xb0434b77,
-0x8564b88f,	0x06eddac5,	0xde2a66b6,	0xc1835355,
-0x5566bb1e,	0xbaa890cd,	0x108c6f70,	0x7e80dfcc,
-0xb8c03bb3,	0x14bdcbe0,	0x5037daf9,	0xee02697a,
-0x3326280f,	0x4f04c814,	0x4f640444,	0xbfa9229e,
-0x131c7ba0,	0x5fbcf1ba,	0xebe01998,	0x2a813a9b,
-0x3f27c028,	0xf77a6d00,	0xac0ddee5,	0x1b6e52d9,
-0xdac4bb99,	0x54a32f86,	0x26bfd80f,	0xf5debd9c,
-0x06536e13,	0x9498a87e,	0x3f9e8812,	0x53e0fdee,
-0xc08c3c8a,	0x2148b33c,	0x3932e37b,	0xad084cc7,
-0xe77a0048,	0x89addf10,	0xb2542186,	0xc4c0be6c,
-0xfbc626ce,	0x20a28446,	0x0f29f8f1,	0xbbef5d50,
-0x288b8070,	0x31aa2900,	0x4a538fbe,	0xcd344ca3,
-0x05170c9d,	0x06c51082,	0xc414194a,	0x6689a2cb,
-0x7618c884,	0x412ac324,	0xb0d952d0,	0xfb88757c,
-0xaacbb987,	0x92218ac5,	0x032a3895,	0x2e3a7dfd,
-0x4bb37e4e,	0x52342695,	0xa699f5b9,	0x45748066,
-0x7822f59e,	0x68a55092,	0xf049444b,	0xf274d694,
-0x0524ed76,	0x884c3732,	0x22fa43bb,	0x3b97d921,
-0x210b8c99,	0xc4ffdf26,	0x17ba16ed,	0xfcdfc437,
-0x0b8e2d8a,	0x7b019bb2,	0xd525e662,	0x03346249,
-0x7af3c1cd,	0xbf42dbac,	0xb6197a31,	0xebff8e32,
-0x84f9980c,	0xa225a4b0,	0xa9f3d94d,	0x8a3da052,
-0xc17241e7,	0xf133ce7f,	0x4d4542f0,	0xd884f2f8,
-0xa1633ebe,	0xd5c5e6e5,	0x7fce2fca,	0x8ad84a55,
-0xfdd96c9f,	0xa60d6f4f,	0xe025d2f2,	0x8be1b787,
-0x87a036a7,	0x23819cb9,	0x5967650e,	0x5d549108,
-0x57167175,	0x2f94c450,	0xbb536b04,	0xfb381d15,
-0x405bd359,	0x3ef9491b,	0xa9834cb1,	0x2cc5151c,
-0x148cd3cd,	0x0565ecb0,	0x8e596741,	0xf6d7f089,
-0x9e3524fe,	0xf4224e20,	0x583302fa,	0xebe46409,
-0x7bfe793a,	0x7d511902,	0x1e4a80dd,	0x53a280cb,
-0xa2d81d96,	0xe29b8f4e,	0x877789e5,	0x838ee539,
-0x35f9feb5,	0xa5bb1d43,	0xb24d7510,	0x67cd14d7,
-0x7cfac97e,	0xf6c72b9b,	0x302f9115,	0x1932060c,
-0x0a786f90,	0x85a88dd1,	0x322ef274,	0xb0f8af47,
-0xbb5e6bfb,	0x3f1505c5,	0x33b28086,	0x18025326,
-0x73293fb1,	0xbd813762,	0xad751414,	0xd533bccc,
-0x393b81fe,	0x5b3b79e3,	0x2221dc65,	0x4bf8124d,
-0x26df557e,	0xcb9320a3,	0x9e6e762f,	0x2a800bbf,
-0xbd30558c,	0xc6b2ebe7,	0x204b2c78,	0x3e55767c,
-0xe8dca1c3,	0x74f53ec2,	0x6cf84866,	0xa81afd41,
-0x96b192bd,	0x8a4cb44b,	0x7761db77,	0x0ba97dc7,
-0x374256d8,	0x9d11f228,	0x4135e235,	0x4ebca1ed,
-0x339af391,	0xbf656129,	0xa8e362b2,	0x8ed470b3,
-0x88405f8c,	0x285b7b3e,	0x1098ef48,	0xfdf3a059,
-0x1472f471,	0x402079de,	0x531c86f5,	0xe267b1d8,
-0xa5dd94bf,	0x4659558a,	0xee6ebad7,	0x3f90fd4f,
-0xa16b3fea,	0xa89ff7e3,	0x2bb842e2,	0x6352305a,
-0xbf5caa7d,	0x247738c8,	0xb3463b13,	0xacf9e658,
-0x2c186efc,	0x3d10d5f5,	0x4aba3167,	0xe3c50980,
-0x62584b2e,	0x62bb0b9b,	0x728bfbbc,	0x5c4392df,
-0x3e9d9ca4,	0x66d7cb6b,	0x3795fbda,	0xfd57060e,
-0x1f14ee11,	0x7ca5c691,	0xd45606d2,	0xee8aacc3,
-0x5e58e64f,	0x14539605,	0xacf9940c,	0x5aea1d0e,
-0x1abd48aa,	0x531443b7,	0xc877270c,	0x3cb0fc56,
-0x06fef541,	0xc82d4e20,	0x2850164f,	0x976d3800,
-0xf49bf720,	0x4441f680,	0x47ace05d,	0xdf6613c3,
-0xe326ace7,	0x65434171,	0x99f32f60,	0x8e74748b,
-0xa345f78e,	0x7ed8882f,	0x18147a58,	0x0f88b600,
-0x87511a26,	0x0421d011,	0xcb18e24d,	0x3b9d1f91,
-0x2eaf943a,	0x7d1954a8,	0xc9ca788c,	0x9bd0b50d,
-0x345cbf85,	0x5f15c80e,	0x4e688a4b,	0x85cea5b5,
-0x6c4858c6,	0xd511c3b7,	0x60c4dccf,	0xf0e203c0,
-0x66725a5a,	0xa1cdbb6e,	0x1050f46d,	0x9349b556,
-0x21f7ae54,	0xcaec7ac3,	0x60d78f75,	0x70a1b6eb,
-0x35663cdf,	0xa995cc91,	0xdc076d61,	0x838bcdf5,
-0x351bba87,	0x525362ed,	0x30f74979,	0x95e1b1ff,
-0xcb855936,	0x031f6d10,	0x6a499f0b,	0xac0b7909,
-0xca741d8c,	0x6be27fa9,	0x0aab5c9c,	0xa167bb23,
-0x77e81960,	0x32e08b0c,	0xcebc1a19,	0xb4c16851,
-0x7c062b03,	0x0bb891c0,	0xeaaeb569,	0xcd44b2a6,
-0x21202023,	0x150ea8e2,	0x59186783,	0x318ab582,
-0x09ed39dd,	0xf60982c4,	0x37d47336,	0x437da9fd,
-0x1d710edc,	0x621c5b61,	0x3ef57dff,	0x955c7f72,
-0x2b26a727,	0x3edd94f5,	0x150d7200,	0x55089618,
-0xb56e6c4d,	0xa4deaa5d,	0xa3597762,	0x9c5320af,
-0x635127cf,	0x59cb5391,	0x93ab2255,	0xae245934,
-0xd618c84a,	0x2f35cfc2,	0xd0f061f1,	0x89853b8b,
-0x025b054d,	0xe6d93f9a,	0x3adc0b16,	0x84fae023,
-0xb7633864,	0xda51d106,	0xbbff09a4,	0xd5b9d78d,
-0xb328e13d,	0xa96a350c,	0x9950512c,	0xff9e0ef0,
-0x7c35497c,	0x9f926f22,	0x21049558,	0x2beecc60,
-0x3e2e9bf9,	0x5639847e,	0xd619a13d,	0x4e583906,
-0x10df8249,	0x56e7e8df,	0xd514d3eb,	0xd0acb620,
-0x64fcfa06,	0x2579bd35,	0x75bfd73d,	0x3749e0bd,
-0xccfe92cf,	0x27d80baf,	0x1ce9155a,	0xd137af32,
-0xfbc1a48f,	0x55f823a8,	0xc881bff9,	0x10667a5a,
-0x9ddb4cca,	0x7a130ee0,	0x1f936bb5,	0x97900b6b,
-0xa5c120be,	0x0e5bd07a,	0xb6d55095,	0x64b9ee81,
-0xbe3880f4,	0x7298b54b,	0xca023019,	0xc04350c1,
-0xd9b65a0a,	0x497773d4,	0xe114aff1,	0xc20a9812,
-0x4093dd5f,	0x4a763172,	0xb81ea793,	0x4f1aa963,
-0x133d5b74,	0xbab2b93e,	0x475c6e06,	0x6bce797b,
-0xf0dde898,	0x0c154806,	0xf8aba3ea,	0x9f900b3e,
-0x5616d3b5,	0xd77f47e3,	0xeea5452c,	0xf06a6573,
-0x52ad35dc,	0x841d2ce7,	0xc0d9fc67,	0xae2a50f2,
-0x68770060,	0x72e75b45,	0x3811c15a,	0xddd4d732,
-0xc0cdee22,	0x72f2968f,	0x6483ba86,	0x97968042,
-0x693e9be4,	0x9832f05c,	0xdf622948,	0x127f360a,
-0xf364ca2b,	0x4bb883ee,	0x282dd695,	0x6aa679e4,
-0xa71f6a9c,	0x91988331,	0xd5b30591,	0x67994077,

cpu/intel/model_106cx/microcode-M08106C2219.h

diff --git a/cpu/intel/model_106cx/microcode-M08106C2219.h b/cpu/intel/model_106cx/microcode-M08106C2219.h
deleted file mode 100644
index 343de53..0000000
--- a/cpu/intel/model_106cx/microcode-M08106C2219.h
+++ /dev/null
@@ -1,355 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  M08106C2219.inc  */
-0x00000001,	0x00000219,	0x04102009,	0x000106c2,
-0x556338c1,	0x00000001,	0x00000008,	0x000013d0,
-0x00001400,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x00000219,
-0x00000040,	0x000e0190,	0x20090410,	0x00000401,
-0x00000001,	0x000106c2,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xc90b16b3,	0x43609e61,	0xa4e6bb06,	0x8d22d7db,
-0x375d7808,	0x02531ddb,	0x5f66ebad,	0x3f73276c,
-0x0882023d,	0x953684cb,	0x0abe06ee,	0xa7ef1798,
-0x160d6cb8,	0x930cf745,	0xafc3fd79,	0xa70df3d5,
-0xb0620f46,	0x70048a23,	0xbf95ecf0,	0x76c1b997,
-0x5128616d,	0xb6b4b969,	0xcc69f71d,	0xdf7416e1,
-0xdf9a571b,	0x50c0bcc8,	0x85e2b3cd,	0xc1927532,
-0x7a04b6be,	0xe56b7f97,	0x524085c4,	0x668bf327,
-0xb3eaa54c,	0xccde06f8,	0x09b4e42b,	0x033b0a46,
-0x0f6e2fde,	0xb308ce53,	0x93eff03e,	0x8830014e,
-0x5c8a6f22,	0x91d2f757,	0xf70b648d,	0x0789998a,
-0xd84d4640,	0xe5f34e80,	0xf3357e64,	0xd1e2beea,
-0xc7e95c3a,	0x30e57e4d,	0xec214356,	0x7e10859e,
-0x1d5895d5,	0xdeeff6cb,	0xed1030ed,	0x827e603d,
-0x6b4b2de3,	0x83ec6fd0,	0xa64092f3,	0x8d9887e4,
-0xbefcbedd,	0x2111afef,	0xcb9abf96,	0x5c79ceac,
-0x9bf8a57f,	0x5d0e44be,	0xdca3d3b6,	0x9072d1ca,
-0x48e73a50,	0x8d0bc804,	0x6aea94d3,	0xc372403e,
-0x00000011,	0xfc992688,	0x23e600a8,	0x14f6cd28,
-0x93bc5dc5,	0xa5495696,	0x6c07abae,	0x67d10a74,
-0x945ac057,	0xb8473344,	0x472f30fb,	0x5b9c2ee7,
-0x221b770d,	0x112eb268,	0x3724b0bd,	0x58ba84c3,
-0x00e42136,	0x81477cb7,	0x85f5e1ee,	0x84d4a044,
-0x79c3d88b,	0xfd5e4dbb,	0xffb5ec86,	0x622f59f0,
-0x7bfe0e7f,	0xc355acac,	0xa4fb3619,	0x7339556b,
-0xeabc4d3d,	0x6ab08a75,	0x7b59ae8b,	0x8aec0425,
-0xd939122e,	0x8c0de100,	0xb6a824b8,	0x4fe6b900,
-0xc4c994be,	0x8efffe65,	0x59c6b401,	0x7cd816b6,
-0x7731727b,	0xc8612d27,	0xe889c3d7,	0x37bb7222,
-0x184d0b87,	0x5228bc87,	0x222623d4,	0x6b7c86ff,
-0x2ef75b0a,	0x0c2a56a3,	0x343d7ca0,	0xb4a609bc,
-0xad047dc1,	0x402baa40,	0xeb1ddca1,	0x54466185,
-0x40de7012,	0x33382ce6,	0x1c410b88,	0x77a4b6b6,
-0x24dca2fa,	0x6553c356,	0x387d1121,	0x342ef68d,
-0xbe569906,	0xb2ac2d4d,	0x781e3db3,	0xf1e39ef2,
-0xcfe8ce3e,	0x3007b67b,	0x66f1673b,	0x1cad08f6,
-0x3a455aac,	0x83a00fb2,	0xb3b6cc3e,	0x38172e9a,
-0x99bf9d0e,	0x65be725d,	0x51f39d60,	0x29e48dc7,
-0x68e1ea47,	0x05002e5c,	0xe2d9338f,	0x209f4e82,
-0xa77b3188,	0x78c30d8a,	0xf5ca40c0,	0x5c3ea07d,
-0xd4141b88,	0x05e2522e,	0x31c4d8d8,	0xcfd4b204,
-0xa449934f,	0x4a88b5c0,	0xb474e3ee,	0x8e5b7950,
-0xf7db2f3d,	0x1f0a8f3a,	0x0ba8557d,	0x7d47154e,
-0xbc3c9775,	0xb52a9e82,	0x7c4f2d6f,	0xfeca6bcc,
-0x16ef5c58,	0xedd2d873,	0xf9197095,	0x72bed70d,
-0x0548445b,	0x12f3f734,	0x88d07e72,	0x0febabce,
-0x2572952b,	0x3cdf2a42,	0x4193b60e,	0x4d812f9e,
-0xffe96805,	0x978273e5,	0x6da0ec06,	0xe15d94d9,
-0xb2b1c0d0,	0x940b6110,	0x89c7df3d,	0x70114c8f,
-0x4bf8f46a,	0xd5f7bb83,	0xab457d17,	0x1e06b3b7,
-0x36e7913c,	0x7fb0fa65,	0xa674d689,	0x1869ef0a,
-0x5dc7b15a,	0x5da35a26,	0xe920832e,	0xc4de494a,
-0x5e5d2ed5,	0x6c4737e0,	0xdf5ec30c,	0x8091f7a3,
-0xb8c97091,	0x2b3aeab2,	0x7423a605,	0xa2ba859c,
-0x485b398e,	0x9ab35881,	0x523441eb,	0x0385484d,
-0x2a044c2a,	0xe306184e,	0xd1b28d17,	0xb8170bc8,
-0x94aac536,	0xb5394448,	0x07262f8c,	0x637568b8,
-0x494294a6,	0xfb1db2a0,	0x443f53fe,	0xd92d404a,
-0xb5297cac,	0x5dedc37a,	0x0daac347,	0x7ac1ae2d,
-0xea83ec15,	0xd322d35f,	0xc73d2bff,	0x0d431332,
-0x07c14d37,	0x1ad1aa51,	0x9929b721,	0x97482314,
-0x83340e21,	0xed080218,	0x4258da61,	0x439ea85f,
-0xc71172a1,	0x0d22feba,	0x3a6de23a,	0x83b8fe9f,
-0x876eeabc,	0xf775ba44,	0xa80def3a,	0x3fdc0d52,
-0x2614ec7d,	0x6b4cf2a8,	0x9fb7a74e,	0x1757d1a9,
-0x20d4010b,	0x151de99d,	0x4bd6bdaa,	0x0f7547df,
-0xacc9570e,	0x8416d2ea,	0x988f578e,	0xa287907c,
-0x863378bd,	0x78396f5a,	0xed570e5f,	0xa6845d46,
-0xa513f5a6,	0x8283abf1,	0x25396b2c,	0x6347886a,
-0x17fead7f,	0xdb650cfe,	0xcb24f93f,	0x368cac11,
-0xfce10cc6,	0xf285252c,	0x981a327f,	0x3d4019ef,
-0x99ceb802,	0x570a0285,	0x5f2a4ed3,	0x5f9b1600,
-0x001841f8,	0x959b0805,	0xb3bbc0ab,	0x7101f85e,
-0x0db99182,	0xf96d3262,	0xbf8b4f1e,	0xe2ec5696,
-0xe80c0fe5,	0x98eda3c8,	0xbc4e96f1,	0xb011a977,
-0x069f4fde,	0x79837aa8,	0x03543201,	0x77041b22,
-0xcd556d8d,	0x001955be,	0xc9f1aeab,	0x73dacc9b,
-0x2a0d9a46,	0xc9f740b3,	0x12c74546,	0x7a77b5cb,
-0x46cd0c07,	0x33c49919,	0xb720c3f0,	0x1cf9f386,
-0xa333685a,	0xd57eba74,	0x9a739818,	0x5349c0a8,
-0x9f03edb5,	0x3ec21311,	0x49afc855,	0x70da0455,
-0xa5298dad,	0xc2c3ed06,	0x83b2f5b7,	0xa9c3a934,
-0xd9bad4fe,	0xb3529d95,	0xf7935ce1,	0xac181422,
-0x6e67b6ca,	0xb053f52c,	0xc835c485,	0x1e4f3f3a,
-0xd922de6c,	0xcca7947a,	0x7a689229,	0xe647fe13,
-0x3aca8264,	0xf866ff46,	0xf999c6cf,	0xed01e84e,
-0xf7b0199e,	0xec3e3356,	0x0f420d30,	0xc327971b,
-0x4d7aed1d,	0x4baba227,	0x752a3764,	0x75d94365,
-0x52416050,	0xbe1050db,	0x9ec1196d,	0x4b5e25e6,
-0x34dc29b2,	0xaac206da,	0x2c87595f,	0x02e7e586,
-0xf87e1f28,	0x90264c1d,	0xb86c314d,	0xb69cfaba,
-0x19c4f9b3,	0xbb0caa02,	0xaa1e2461,	0x19ddc16f,
-0x6df5f184,	0xf8bb463f,	0x5fd25e64,	0x86d7c76b,
-0x5f6914b0,	0x57e88828,	0xc98df09b,	0x37138009,
-0xb369b31f,	0xe7045bee,	0x29a8f874,	0x4b650bbf,
-0x2f6287b4,	0xa549a544,	0x9265e74b,	0x8b37f6bf,
-0xcd56bfa9,	0xfa258838,	0xd610488c,	0xa5cdc5dd,
-0x9d845e17,	0x3aa87384,	0x24560eb4,	0x3544672d,
-0xaa83f643,	0x4e689a3f,	0x72b5d70c,	0x86d3fd5d,
-0xe67bf049,	0xaceadfac,	0x04ee56b4,	0x194a0835,
-0x6dbf07fa,	0xdb51992f,	0xa2956de0,	0x331cf4c9,
-0xc3d8c10f,	0x5ef580dc,	0x0fcf0f7f,	0x83702f3d,
-0xcdcfcb70,	0x2475e23b,	0x95701afb,	0x725bfd6b,
-0x4d47f669,	0xf3596431,	0xaee46e06,	0x5a4ab3b0,
-0xb3c7c69b,	0x2f0a1bf2,	0xdc6de955,	0x254d56ad,
-0xc0683c95,	0x7c3d0e31,	0x2bc97c44,	0xe3e6db29,
-0xc2a8d98c,	0x357c97ce,	0x397db584,	0x2bd797c8,
-0x8825efb6,	0x5d35cf51,	0xe80b2df6,	0xe67f6e97,
-0x1c3401d3,	0xdab40712,	0xdd6d0cfd,	0xd8790e1b,
-0xb0cf68d9,	0x986671f6,	0xf3cb7b14,	0x407e81e4,
-0xeba6f4cc,	0x3774a142,	0x54e698a5,	0xb0203303,
-0xd51b3f85,	0x697020d3,	0x3810c326,	0xe85cb4ec,
-0xc472098c,	0x7368a46f,	0xabc51178,	0xce0ccf5e,
-0xc8fac25b,	0x2a4be3aa,	0x0de1fd65,	0x795c2e54,
-0x882244b7,	0x9576e013,	0x6e670e35,	0x58e4f198,
-0x39b34336,	0x7646f12b,	0xb5c5bf0a,	0x16b37b1a,
-0x21270db0,	0xb8214968,	0x29e314c8,	0xbcfb2f86,
-0x1605b1b0,	0x4476decf,	0x827449f0,	0x77520628,
-0x69b16de7,	0xcf8c24b8,	0x4f8ac7c4,	0x5906e5f3,
-0x18fbe3da,	0x1efa44fc,	0x27cd16b6,	0x2e5b9451,
-0xb8b47a15,	0x5e0275d9,	0x98ba61bf,	0x276fcd7e,
-0xc45d474c,	0x3a6ec43d,	0x247b0578,	0x39023efd,
-0xf4c1b8b0,	0x93118f01,	0x7d0bd14d,	0x5b2ccf75,
-0xcc9caf6f,	0x8fcc1dbc,	0xc2a182ea,	0xa9d5ea77,
-0xb67fb193,	0xc8afeb62,	0x979f4e4e,	0x23ddc2c0,
-0x229b8670,	0xc2e45d21,	0x2f402e32,	0x44e37134,
-0x0d97b5f4,	0xb451fbe9,	0xa6f8b847,	0x1242f580,
-0x4ab7acc6,	0x46d21bb2,	0x73834518,	0x834624d5,
-0xd16b2272,	0xc706f4b5,	0x499e3397,	0x2b8f3113,
-0x2973cccb,	0x67c79188,	0x7603acfb,	0x492b6c55,
-0xfb00c5e7,	0x53cfe2f7,	0x5b8c503b,	0x2a8551bd,
-0x5933fa39,	0xd007c1cc,	0x134460bd,	0x4ebb4795,
-0x4e6e56c7,	0x1249ec55,	0xf9d8474b,	0x03d33b72,
-0x67370679,	0xc5816cbf,	0xb7e40ace,	0x2f3fd6cd,
-0xafa9ff3d,	0x783c3ce8,	0x918f2c76,	0x95356478,
-0x0fe91058,	0xab48087f,	0x59ece9da,	0x7db981fc,
-0xe70556e7,	0x58ed65f6,	0x97e45645,	0xc6857a6d,
-0xaec1bf29,	0x7bf82ad1,	0xee35e6fb,	0xd534ad65,
-0x932dd280,	0xe0c2af09,	0x2338de06,	0x5e5b88c8,
-0x46f4ea36,	0x58fbd024,	0xfdd2c4d1,	0xb61624ce,
-0x772d74b1,	0x4f10fd11,	0x6b803a7d,	0xd2866afe,
-0xcc943b2e,	0x35a9d42a,	0x483ef574,	0x04ed18ca,
-0xc543ead9,	0xdb2ad8cb,	0xef6830d4,	0x60d7b29a,
-0xb47c1e1e,	0x31ca0a9a,	0x1688576c,	0x5a282e51,
-0x66400faa,	0xefc36a93,	0x96667b2a,	0xa659d1c0,
-0xf810ece8,	0xcd731027,	0x3b19c944,	0x525b9a96,
-0xa1155ff4,	0xe9377579,	0xd05e954f,	0xbc344ce0,
-0xf2a435af,	0x69314efc,	0x0a7d7457,	0x29ba1cf8,
-0xa01c70f3,	0x03f0f2eb,	0x4ea9fe78,	0x1463b4cc,
-0x53026868,	0x5f6a2d02,	0x58efb550,	0xa4a0e3f4,
-0xc9bb5cd7,	0x3c1fc3cb,	0xa3d0503f,	0xd7e7ecfd,
-0xbe128e38,	0x5ff74ff0,	0xfe74923a,	0x0e03446c,
-0x5cba99f5,	0x3b892c32,	0xf5155e4a,	0x5e3efa2b,
-0x9119f586,	0x59604588,	0x6d7423ce,	0x8cda5b72,
-0x267a0a74,	0x9b70a177,	0xc6834dde,	0x6ab9755b,
-0x1488d548,	0x0d8df88c,	0xd237aa90,	0x473df401,
-0x0fdd9dfc,	0x1d2cf3f0,	0x174cec53,	0x6be5058e,
-0xd4901408,	0x6c05259a,	0x11cca689,	0x2806cc29,
-0x7489990a,	0x43198c42,	0xe591f7ac,	0x572495d1,
-0x59fea9a1,	0x3fb91523,	0xd197ad93,	0x771a4b14,
-0xdd87d853,	0x52b0384d,	0xea4c7fbf,	0xbabef627,
-0x1b1edfc1,	0x4affe39a,	0x3a337568,	0xf3a8077d,
-0x567c9e5c,	0xe2f44db1,	0x4cfcc36e,	0x28884ef0,
-0x57dbdbb2,	0x11aed7f5,	0x8ba4eb36,	0xde120de5,
-0x49b381aa,	0x32fa79bc,	0x5aebcc3d,	0xf647e76c,
-0xb99ff536,	0xc8f6b229,	0xfb6eb426,	0x5b756b63,
-0xa6bea77e,	0x6d1479e6,	0xdef68b02,	0xb9951a00,
-0x4240cb0f,	0x094b7ca3,	0x2262064b,	0x6f604f98,
-0x0f06c41d,	0x1bef6e8c,	0xed8a279e,	0xdc559fbc,
-0xb0bfe389,	0x0442de4c,	0x4d9f5d73,	0x6a93f15a,
-0xb289c316,	0x3515ff17,	0x9681572c,	0x3680c1e2,
-0xa96b2dac,	0x9a06d703,	0xa94a17cf,	0x11535aae,
-0x01654322,	0xe4f831ea,	0x6d686f3a,	0x76c75680,
-0xa3e98a65,	0xd59aec33,	0x7130033d,	0x6196781a,
-0xcc28635a,	0xbee752b6,	0xb2946205,	0xae7c3c44,
-0x809b350c,	0xa5ff2e45,	0x742f4b4f,	0x75910861,
-0x0f9a7372,	0x4e24b6f5,	0xd968a8db,	0xe22c5ba9,
-0x54f08a31,	0x6cc17c5b,	0x08f940fd,	0x6cdfa456,
-0x29a4c0d8,	0x4246cac7,	0xe398f00e,	0x52d0654c,
-0x3610b2d1,	0xf84cd3f7,	0x00293b7c,	0xabb4b35b,
-0x58a7e82e,	0x1fc3c6c9,	0xc886dd9d,	0xbc25d985,
-0x4c5cd2fc,	0x3141f73a,	0x633ddaa9,	0x576f5fdf,
-0x7cc3a440,	0x14ddef25,	0x59d7d213,	0x29c80bca,
-0x0df80f67,	0x60711264,	0x050b3db3,	0x7b4d0800,
-0xd7350b2b,	0x507ccfbf,	0xc5a91aae,	0x7efed8c8,
-0xbb4bf7dd,	0x617ac182,	0xeee14407,	0xe5c634dd,
-0xcd0664cd,	0x1829ff02,	0x2e2073d2,	0x2ddcd5a2,
-0xcb1afbf1,	0x096866b5,	0x26ff945e,	0xc4a2172e,
-0xb4089d08,	0x4acf74ce,	0x169986c5,	0x61a28165,
-0xd26cc027,	0x78c799d6,	0xd800ddc9,	0x53754eff,
-0xf1141877,	0x48728ad0,	0x8a22c851,	0x858e70a7,
-0xab80b4ca,	0xfc0e733c,	0xcae85996,	0xe07f723b,
-0x4b81ce69,	0xc0ab303c,	0xb0eed408,	0xb89bc5ae,
-0x6711353e,	0x87d4675c,	0x89d7df88,	0x37206487,
-0x95e90c88,	0x63d48b34,	0xe7ba4599,	0x68a67592,
-0xfe0341de,	0x7fec0b1d,	0xb8f33820,	0x767319e3,
-0xd2044f54,	0xa4d341a9,	0xa45a2c9d,	0x098393da,
-0xd0654e51,	0xa737aa45,	0x9d2900e7,	0xfe7eb80c,
-0xceb9f445,	0x6c2c8690,	0xf8f98f3d,	0xa2d2bf07,
-0x927b1a93,	0x920852f7,	0xcb403552,	0x183882a6,
-0x92ead8e0,	0xb40b930f,	0x74c2c0a2,	0xa7b1c6cf,
-0x57e3535a,	0xe565ddec,	0x7332c331,	0x1872fd33,
-0x3e324a99,	0x17c9765e,	0xb0822c49,	0xff6abe65,
-0x6997ce5c,	0x73ed562e,	0x4efd661c,	0x10d8b025,
-0x2fd1eaf4,	0xb349f0c8,	0xe60fdd8e,	0x23fffbd0,
-0xa15bf609,	0xddd9e32f,	0x057abc03,	0x22802461,
-0xb279326b,	0x22ff69f2,	0xa0c580b1,	0xd991829b,
-0x0943eb85,	0x53cb5a35,	0x979217e3,	0xf7197b81,
-0x7a923206,	0x64bcece1,	0x404c97a7,	0x8c011352,
-0x8e84ac4d,	0x16bb918b,	0x05fdddb5,	0x227fb22b,
-0xb095fb07,	0x6b556afc,	0x9745a80a,	0x5f190072,
-0xc95b78d6,	0x76464295,	0x1e526ddc,	0x2bc7432f,
-0x52b3672c,	0xe5e477e7,	0xdade2243,	0x25ad56f1,
-0x5b75b5e8,	0x37865e3c,	0x286d27ea,	0x08c7d60f,
-0x0db0520c,	0xecad5b5f,	0x26d21fbc,	0x5f18707c,
-0xb2084911,	0x6b616c35,	0xd86e229d,	0xe8ed9694,
-0xd9872d8f,	0x13dd2a30,	0x67ffc707,	0x15c88108,
-0xcfba534d,	0x268bc3af,	0xdf10f336,	0xe3242124,
-0x3c83e736,	0x8a4ddf60,	0x9c8b418a,	0x9cfb165e,
-0x700d43a5,	0x9a974722,	0x55c8cd11,	0xb23ee685,
-0xb09c7f07,	0x75d6b52d,	0xd844b6dc,	0xfdb7d587,
-0x86500091,	0x752adf1f,	0x9d4e4d80,	0x180235a0,
-0x80951d7d,	0xf1d957ce,	0xfa9508f5,	0xcc891c1a,
-0xeb51f76d,	0x8b0e0f09,	0x93049970,	0x661542f7,
-0x07be174b,	0xed8c35fc,	0x85c13234,	0x0a72b1f6,
-0x8466dd86,	0x69fe80ec,	0x48e71a37,	0x40b32073,
-0xc06e1e53,	0x89b98205,	0xc69b2371,	0x5e75a364,
-0x07f7fff4,	0xcab47414,	0x85d5ccc5,	0x2cfbbe74,
-0xfe0f282e,	0xd20eec1c,	0x3b6d0540,	0x033ac156,
-0x91a56f71,	0xd7296dd4,	0x804871dc,	0x67d827cf,
-0xba1396b9,	0x9bb94134,	0xeffe0534,	0x2cbd5727,
-0x0b948509,	0x20a97dd4,	0x0605e6fe,	0xee7d930e,
-0xf1892f40,	0xd10a4b44,	0x87690a5d,	0x413019cb,
-0x4b4a4321,	0xfd1ad47d,	0xfb4b0fae,	0x6247d99f,
-0xf9e55be9,	0x74b94b74,	0xd13002fa,	0x031fd808,
-0x7f558bca,	0xafd37ef2,	0xdac30332,	0x4b8ec189,
-0x22864b78,	0xa294c296,	0x4e300c94,	0x351586a4,
-0x64b3c126,	0xe14af07c,	0xbcf3fd2b,	0xec9f8ba2,
-0xacaae0c5,	0xfd8416f1,	0xf86aec61,	0x827af51c,
-0x1db95b54,	0xd5b44400,	0x3189f284,	0x51ee744d,
-0x6b8e0ec5,	0x7c8fce74,	0x4bda1d3a,	0x4cb4bb40,
-0x94a80692,	0xe5d5cff6,	0xeee460bf,	0x5103d4ce,
-0x9ef7a762,	0xe1cdfa53,	0xe66c40e6,	0x9a4d5fb7,
-0x24190f5d,	0x0a8a1133,	0x244d0192,	0x1e27f111,
-0x2e7cfe2e,	0x437c86a0,	0xd5601c01,	0x95b9ea18,
-0x594baa9a,	0xa1beb6e4,	0xfc10208b,	0xd629fe46,
-0xc7a73322,	0x344cf9dd,	0x3b2025ed,	0x01b7e289,
-0xd4172aa0,	0x7fa0edb0,	0xa2bad69c,	0x32ce7645,
-0x2eb25170,	0x599b7e7d,	0xc0405765,	0x26292f80,
-0x796ccce7,	0xa0954fca,	0x4ee053d9,	0x13fda549,
-0xf8d89b3e,	0xf2468c6c,	0x96a61f8d,	0x33db3a7a,
-0xe69d7666,	0xa35e6d42,	0xe2b0346f,	0xaa0ba4db,
-0x67f642c9,	0x990654c7,	0x7598e386,	0x126ecb72,
-0xac24bf48,	0x6b12cbbd,	0x0ca2ac55,	0x3776e42c,
-0x27c182fa,	0x58cc7a01,	0x6f4f58a0,	0x229bc239,
-0xa0a025f4,	0x251594fb,	0xb4399cdd,	0xec1bb182,
-0x89832726,	0x8cc29f1d,	0xbbb6fd97,	0x33cf4317,
-0xfae44075,	0x6d2559f8,	0xa7c3242f,	0x7e8a8b83,
-0xbf1bbedc,	0xb5f1835b,	0xbfffdc15,	0xcd127b15,
-0xc322734e,	0xaf108cf0,	0x7fe1e0b6,	0xc294fef6,
-0x40c7b005,	0xf002f4d9,	0x84347361,	0x9a178122,
-0x221f84fc,	0xa3de3cba,	0xaca75f4a,	0xfb702420,
-0x716b0d5b,	0x5a14b3ac,	0x0d0da0f6,	0x799dbe99,
-0x23da1e6a,	0xb18a5e94,	0x3964553c,	0x259f218a,
-0x30d107e7,	0xa0a4415b,	0x0efae30e,	0x2a259b4b,
-0xb2a3545d,	0xfa5e2261,	0x5c22825a,	0xd5b0f032,
-0xc0e4974d,	0x158e98db,	0xaf5a511a,	0xd1fe28e7,
-0xcfb755c3,	0x28dacd50,	0x25dc16e6,	0x88d89d44,
-0xa2d7f529,	0x031ccaee,	0x48eaa62f,	0xdfa589e0,
-0x4e335b00,	0x452896fb,	0xe865796b,	0x8455451d,
-0x51438741,	0x272e7afa,	0x6868b95b,	0xff76cfb8,
-0x9596f219,	0x213704f3,	0x270848a0,	0xa0ad03e2,
-0xfc32d4b7,	0x8372384b,	0x7668bff4,	0x23b50cc4,
-0x30abc3e8,	0x285440bb,	0x26d17518,	0x9dc01773,
-0xac30222d,	0xefb1afc5,	0xc360b5cc,	0xdbe15554,
-0x2de4ee23,	0x9f6ae434,	0x73984eff,	0xdcad6ece,
-0x713950c7,	0x1b39b20d,	0xeae34762,	0x78716c5e,
-0x96300e70,	0xa2cdb877,	0xeeb863b8,	0x9c8ae2ef,
-0x82ad9c30,	0xea440a13,	0xc31799f6,	0xb7c9d784,
-0x7f451a4d,	0x6e93e324,	0x3c790775,	0x16f05511,
-0x7530d389,	0x5c8f2024,	0x4d5d4d91,	0xf99d1697,
-0x7e552001,	0xbe8ffe1a,	0xa52f66ac,	0x195bee69,
-0xeb7ea942,	0x69f1654f,	0x5d211509,	0x358dba8d,
-0x80450c6a,	0x52d895a7,	0xbf16fb92,	0xf862bd4e,
-0x6737b5eb,	0x820f8354,	0xe9f63fdc,	0x323317d3,
-0x4c4891c9,	0xe5dd8920,	0x75d3437f,	0xf9c0ebce,
-0x1e96c9f0,	0x9c224cf3,	0x41d0921a,	0xb96a502b,
-0x36004b70,	0x2122c9ef,	0x44b19035,	0x922ccbbc,
-0xfc2c2a46,	0x03d16aad,	0x907bc61f,	0xc7006fe2,
-0xc3fc3a73,	0x5d78f50c,	0xb894d12c,	0x140ef41f,
-0x2d7c5412,	0x501abfff,	0x7148145b,	0xeea55a86,
-0x4fc8b732,	0x3bdd42ec,	0x8e9e30c2,	0xac01ac1e,
-0xe599e322,	0x315f84fd,	0x7fe91ced,	0x76444300,
-0xe451f3e3,	0x63e049dd,	0x04826158,	0xc830df5b,
-0x38b83783,	0x036f106e,	0x1d858f4c,	0xe19c6b28,
-0xdfd72c0f,	0xf4a80ece,	0x2f967664,	0x4780d7b6,
-0x35a375df,	0x50b64e4b,	0xdefaebc6,	0xec40e6c7,
-0x1e419ceb,	0x7585e090,	0x6f90257c,	0x0d8ff886,
-0xa23d7ede,	0xb37cdeb4,	0x5961bafe,	0x2ee11dfd,
-0xb0f162b4,	0x5319797a,	0x51fd4b3c,	0xd88bb741,
-0xffe57978,	0xc237d953,	0x41b29753,	0xece0cb2a,
-0x690656fc,	0x360ee38c,	0x7b65902e,	0x75de0d97,
-0xbcd48c2e,	0xf3ed312f,	0x14a96440,	0xc755303d,
-0xb9120bd0,	0xc06e9afa,	0x6b2f099b,	0xb2a1a0f3,
-0xb76d613a,	0xa9acb4f6,	0xbbe10f9b,	0x52443f6f,
-0xb345ffed,	0x7e846b24,	0x2f25b24e,	0xa4fcdb76,
-0x788511ac,	0xca23a7a6,	0xe51838dd,	0xc9437374,
-0x291627cb,	0x18518202,	0x5bc7973f,	0x2b3b3265,
-0xc9981377,	0x9c36edbb,	0x00b51a3f,	0x60661320,
-0x3140e7a9,	0x109a3604,	0xde37943d,	0xbdd0d5f1,
-0x8bfdc673,	0xcdbfcaba,	0x1c700fd6,	0xee7b9c6e,

cpu/intel/model_106cx/microcode-M08106CA107.h

diff --git a/cpu/intel/model_106cx/microcode-M08106CA107.h b/cpu/intel/model_106cx/microcode-M08106CA107.h
deleted file mode 100644
index 6948bd3..0000000
--- a/cpu/intel/model_106cx/microcode-M08106CA107.h
+++ /dev/null
@@ -1,355 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  M08106CA107.inc  */
-0x00000001,	0x00000107,	0x08252009,	0x000106ca,
-0xbe667ca5,	0x00000001,	0x00000008,	0x000013d0,
-0x00001400,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x00000107,
-0x00000010,	0x000500b0,	0x20090820,	0x00000401,
-0x00000001,	0x000106ca,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x2beaa92c,	0xfc3395b7,	0x10be81a0,	0xb318e067,
-0x723923f0,	0xb297dc63,	0x7d52bc4b,	0xc6ef362f,
-0x0882023d,	0x953684cb,	0x0abe06ee,	0xa7ef1798,
-0x160d6cb8,	0x930cf745,	0xafc3fd79,	0xa70df3d5,
-0xb0620f46,	0x70048a23,	0xbf95ecf0,	0x76c1b997,
-0x5128616d,	0xb6b4b969,	0xcc69f71d,	0xdf7416e1,
-0xdf9a571b,	0x50c0bcc8,	0x85e2b3cd,	0xc1927532,
-0x7a04b6be,	0xe56b7f97,	0x524085c4,	0x668bf327,
-0xb3eaa54c,	0xccde06f8,	0x09b4e42b,	0x033b0a46,
-0x0f6e2fde,	0xb308ce53,	0x93eff03e,	0x8830014e,
-0x5c8a6f22,	0x91d2f757,	0xf70b648d,	0x0789998a,
-0xd84d4640,	0xe5f34e80,	0xf3357e64,	0xd1e2beea,
-0xc7e95c3a,	0x30e57e4d,	0xec214356,	0x7e10859e,
-0x1d5895d5,	0xdeeff6cb,	0xed1030ed,	0x827e603d,
-0x6b4b2de3,	0x83ec6fd0,	0xa64092f3,	0x8d9887e4,
-0xbefcbedd,	0x2111afef,	0xcb9abf96,	0x5c79ceac,
-0x9bf8a57f,	0x5d0e44be,	0xdca3d3b6,	0x9072d1ca,
-0x48e73a50,	0x8d0bc804,	0x6aea94d3,	0xc372403e,
-0x00000011,	0x3b994153,	0x23faa5e1,	0xc3feae68,
-0x76d5e67d,	0xbd696479,	0x138a05ef,	0xf2b5de22,
-0x4ccba0ed,	0x333cc95c,	0x8d98a2ae,	0x0bf1fa24,
-0x239f1fbf,	0x44701d3b,	0xb176783f,	0x20eff2cc,
-0x0cf93bf9,	0x4e6ace41,	0xe346d231,	0x11d560af,
-0xae8874a2,	0xe344fa92,	0x0056d268,	0xd8068d91,
-0xf336cf97,	0x45c54f6d,	0xc0650992,	0xa3f86cb2,
-0xc73d3aac,	0xc7654f1f,	0x385777ad,	0x20928850,
-0x47509cab,	0xf40f9ba6,	0x34efbe6c,	0x1fe3b873,
-0xfb39bd58,	0xa50b6367,	0x66c20e63,	0x49a4e1ee,
-0xe490ed5a,	0x98c340fa,	0x30bfe19d,	0x4c17d142,
-0xea54c4e2,	0x8c00e086,	0x219dee1b,	0x739a2fc1,
-0x1e07b80f,	0xea6f4799,	0xb4684fc2,	0x42fc725a,
-0x1d3c7413,	0x188b6f3c,	0x2c0e440f,	0xc6ad011d,
-0x2048625b,	0x3be9d940,	0x0a932622,	0x1fafce30,
-0x1cfa4c90,	0xd0e9f989,	0x31c0c399,	0xad0c597d,
-0x48a94bb5,	0x109da683,	0xcdc197aa,	0x7bf7ef14,
-0xebf3afa0,	0xde4ff7d3,	0x02a79e3f,	0x4d77f0e5,
-0xd0c1fd98,	0xdb342a5b,	0x7f753eca,	0xb710c135,
-0xacb3b9c0,	0x5e89ece7,	0x2ca4fe84,	0x4f22e461,
-0xa6a633fb,	0x508fb453,	0xfe1f342d,	0x79bcff1f,
-0x0c776771,	0xd6c5db47,	0xfe4d8cc5,	0x68b9f655,
-0x447b7366,	0xddde31ad,	0x8e3496df,	0xe091f8dd,
-0x78eb0fe2,	0x9e08c72d,	0x6909c46b,	0x92ca6b4a,
-0xfb7a0efb,	0x55f65148,	0x9fcc90e1,	0x254f5f40,
-0x0690dcd5,	0xc6a67013,	0xda2e35a9,	0x9171cb50,
-0xe477a087,	0xc0f89e14,	0xc1221ebf,	0xf032e99f,
-0xc8883a7e,	0xba4b17c9,	0xb0ef0962,	0x6ea751f6,
-0xfc8c336c,	0xd1966bf1,	0x26d57e1d,	0x952e847d,
-0xccdaf0c9,	0xd0aaee65,	0xb2f22a59,	0xc74bc035,
-0x900ef42a,	0xeb1e7bfe,	0xfc465b3a,	0x0cd002ce,
-0x560f5d4b,	0xecbc2658,	0x9f38856a,	0xa3f77ba1,
-0x3ee18273,	0x7ab97b2c,	0x0f5843cc,	0xdb648b0a,
-0x8e450381,	0x80176891,	0x05e3e6d2,	0x36593afe,
-0xebe78fce,	0x53d7f64c,	0x2dde1104,	0x293cd7e2,
-0x4f430fa6,	0xf3a8cdb0,	0xd28f6535,	0x9159d53b,
-0xac66a916,	0x8f77be38,	0xa16b9dad,	0x1a4699d0,
-0xe278df12,	0x2c336789,	0xb668fe15,	0x099fa98c,
-0x4fe5ef10,	0xf4692cda,	0xb86d4040,	0xb6dce0eb,
-0x6c5ef896,	0xdef35c52,	0xc02a04a4,	0xed99c619,
-0xd91721b2,	0xa2fac92a,	0x5ab9c724,	0x0ee25329,
-0xc2029fce,	0xc847bfbd,	0x3b97ddcb,	0x4aaaa55a,
-0xa16e313a,	0x06e4b6cc,	0xc0e56598,	0x60ebfadb,
-0x88841f3a,	0x7c6b65ef,	0x15542ce1,	0x70b88b78,
-0x382d1155,	0xe73c900c,	0xd8b6409e,	0xf1cc5406,
-0x64fc3223,	0x43cb616c,	0x17e3a1ac,	0xa9aba529,
-0x8dd83b32,	0xb625cd1d,	0xbcb4b0ed,	0x685cc4b2,
-0x803e35f8,	0x4e679481,	0xc7dd7591,	0xf8676b62,
-0xac25b6c8,	0xb0211931,	0x5c5df337,	0x3bde6fb6,
-0xbc433992,	0xf7315d49,	0x028e112f,	0xe3d59076,
-0x7757e95b,	0xe5c5a193,	0x59b243a0,	0x341f33d2,
-0x7c0d591d,	0x5f96d138,	0x5116c490,	0x747caf2f,
-0x6da223f1,	0xcbe30d11,	0xe10b6b28,	0xa09328e1,
-0xdf1b94ee,	0x163b48b9,	0x72e7a36a,	0x78eda572,
-0x393f0ad2,	0xf85561ea,	0x6e7ca7c8,	0x352cb3b4,
-0xb75bf9f3,	0x97ebcf76,	0x932b8b91,	0x937f1fab,
-0x6ef1e868,	0xce84fc3a,	0x9dd09a21,	0xa8f3be36,
-0x244834e9,	0xd871f223,	0xdef842f3,	0x787eaf73,
-0xf2326bca,	0xd2c3ae20,	0x48dc7621,	0x91419afe,
-0x23a44b12,	0xce0443d7,	0x4a6f1d9f,	0x1ea8cf7a,
-0xb6b7694d,	0xf29e3e25,	0x51665303,	0x33581b86,
-0xc762d72f,	0xaa658158,	0xcddb7354,	0xdacfd75f,
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-0xce60a8ad,	0x2d9a8919,	0xb5e2840e,	0x020e6e15,
-0xaff8660e,	0x402c12da,	0xfaea95a5,	0x6ffb0748,
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-0x4ceaa5e8,	0x871f3358,	0xe802a1a4,	0x7fa29ced,
-0xea8616cb,	0xc1999088,	0xc5baf089,	0xd1490754,
-0x091f6f21,	0x9a3e3c4f,	0x1eb11650,	0x13fd05fc,
-0x5e9d5b0e,	0xd1485d34,	0x474feaae,	0xc211a60f,
-0xa609643e,	0x07052bb2,	0xa7bfb285,	0x30bbc170,
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-0xd8ef8702,	0xa0e6d100,	0x90b0a9f0,	0x4a13a407,
-0xf1675dde,	0x5110d8c8,	0x1c028526,	0x7774581f,
-0x9d3d8c23,	0xcaf8b632,	0xf401a52f,	0xa5d14a5c,
-0xebed6c1b,	0x2ec618ad,	0x5b63935e,	0x89508732,
-0x43a48b2e,	0x87535b2b,	0x0ffb28c2,	0x1fd1becd,
-0xd2b2a18d,	0x45dccb4c,	0xad41a54b,	0x7ffa2fed,
-0xddd18aa1,	0x1db06a98,	0x860d6b58,	0x2997109e,
-0x80a2300e,	0x0cc52e7a,	0x15b24c31,	0x8f717016,
-0xa425cac3,	0x8153e1bf,	0x5e91fd89,	0x04b17f35,
-0x150fd30c,	0xc7309d31,	0x63dce1b0,	0x162eb854,
-0x8093904e,	0xf7b4399d,	0xb23fa735,	0x67509c6c,
-0x5380dec9,	0xb79172a8,	0xb6c249d1,	0xcd040b42,
-0x4efe12f8,	0x63ce3363,	0x406d1666,	0xf8e9bc95,
-0x99cbff2c,	0xaf0cac38,	0xe6556ddf,	0x9bb2a399,
-0x43387c9e,	0x4951f5ac,	0xfa4ddb69,	0x562ec852,
-0xa2e3e441,	0x32a80b75,	0xd88361c5,	0xf04b7ac9,
-0xb0ea18bb,	0xf5035c94,	0x520c9c12,	0xb4c7e15c,
-0x6f72c4bc,	0x80f2112a,	0x4e4bbb87,	0x7bb5ee1f,
-0x54eb313e,	0x18cb6cb9,	0xca5ff580,	0x2538d798,
-0x2b813681,	0x58c11a6c,	0x68ae4070,	0x40799341,
-0xa740f86a,	0x722ca7ef,	0x815c71c7,	0xe663c6f7,
-0x5e249b96,	0xe97e3b71,	0xb7ee5a12,	0xd5f065bd,
-0xaa642191,	0x9864e095,	0x0c087780,	0x0fc0d969,
-0xf6b82791,	0x04aa55f8,	0x872c7cd1,	0x43bc93b0,
-0x12fe4c05,	0x16f15229,	0x06161603,	0x6e76239d,
-0x90ea9c62,	0xecf642df,	0xb52a8db6,	0x2e0c5d58,
-0x10f09bbc,	0x1bb1b2a3,	0x7132167b,	0x291d5f16,
-0xd7814a9e,	0x79e52dbf,	0xef6b61e8,	0x585b920a,
-0x18ea4e61,	0x72ce62fc,	0x59ed8e9f,	0x610564d3,
-0x40f4f145,	0x0a2f60c1,	0xec64ebc3,	0x8ad5b251,
-0xb471e120,	0xb899cffd,	0x2b81118a,	0xa3b591a8,
-0xdeced3ab,	0xcb9aacb8,	0xba53fbdd,	0x6e49e298,
-0x75fa6c19,	0xd11cfe98,	0xd29ce7fc,	0x7471df09,
-0xb59b2474,	0xdff0b07d,	0xae92c4b7,	0x6414ee6b,
-0x6acba1a5,	0xed9c0b5b,	0x728f7644,	0xf6d20c7a,
-0xf03ad03e,	0x6612b0c3,	0xe156c417,	0x9aec4a8d,
-0x02be86ff,	0xe11d1660,	0xefeba14a,	0x7d275f33,
-0x16acabb2,	0x7ac99cd7,	0xd18566e4,	0x3bce4ca1,
-0xb0312f16,	0x5700f72c,	0x345864bd,	0x917a4db2,
-0xaa22b7f0,	0xc66eb69c,	0x62f8a99e,	0x6364a44f,
-0x956d2cd2,	0xfa64b7df,	0x47238b18,	0xddebaeff,
-0x39c9d16b,	0xaa1487cb,	0xc6f91d13,	0x8191316d,
-0xbf5d7ddd,	0xc907cbb1,	0x7a283ba3,	0x0365e6a3,
-0x2fbb3185,	0x159d0436,	0xb55b6990,	0xf0935005,
-0x441e4fc8,	0xd1dfdc91,	0xdd9ff8bc,	0x95c88203,
-0xa8029310,	0x62501ff4,	0xf838a813,	0xfb66d5ce,
-0xe6bb8354,	0xe2afb832,	0x55dcf796,	0x315f28cf,
-0x400de577,	0x3ad89b1b,	0xeee943aa,	0xbd5d9001,
-0x8dd4771b,	0x21ad481c,	0x504d6222,	0xfc0e6728,
-0x7abe5d62,	0x332f8309,	0x50d8c688,	0x4b686808,
-0xbe6395ec,	0x5153b67c,	0x04144a35,	0xa85077ca,
-0xa3775cda,	0x838556dc,	0x973c2222,	0xf5037c9f,
-0xd02b0c87,	0xa3e69f8f,	0xdf68cce7,	0x9490d31f,
-0x3d9c5cf2,	0x939e7823,	0xc51b9a2d,	0x2e802e27,
-0x65079a36,	0x3b6e3d79,	0x5fafbac6,	0x9973bc64,
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-0xcde48353,	0x3fa7f449,	0x07cb1a31,	0xf6ba0053,
-0xe5af7b10,	0x9e2dc089,	0x290f3fa4,	0x116da472,
-0x7a006f5b,	0x727205bf,	0x7c59870d,	0x968c6000,
-0x3ed4fd57,	0xe423effe,	0xc352ef7a,	0xd23d00e5,
-0xbded3a50,	0xedcdc3d0,	0x3a517a74,	0xbdfc58cc,
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-0xa1953f56,	0xf0c52ebf,	0x235320ae,	0x35600f33,
-0x5c1ca2b7,	0xe89db0da,	0x08ce35aa,	0xc66cef79,
-0xacd41ce4,	0x865f4c69,	0x15a3376b,	0xdee5d7a1,
-0x6fdd6362,	0xa4125977,	0xcb61bae2,	0x5e3da819,
-0xc6d2e56a,	0xde1807f2,	0xb30c3473,	0x1c4038c5,
-0xbf8afac6,	0x37423d2d,	0x72d9da33,	0x39e95bf5,
-0xd6a91cc8,	0xbbf4c2d8,	0x7c9d4b21,	0x13c514d5,
-0xcae41aac,	0x07b97f18,	0x0cdfbdee,	0xe7a9020b,
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-0x788387d6,	0xb40c98fe,	0x0c75ba9d,	0x0487eb2f,
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-0x67f34f5e,	0xf4042d4f,	0xa28a223d,	0x3deb23f1,
-0x12d14b6f,	0x18901f31,	0xb3c7950a,	0xfb7d3557,
-0xb83e457f,	0xb6e13f07,	0xd26f5435,	0x83f05e15,
-0xf549a030,	0x6d1122d0,	0x540b3ef9,	0x8ecdac22,
-0xdabe1b2d,	0xf4913cc0,	0x579f9d77,	0xd4725d33,
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-0x8676c757,	0xd59cc6bd,	0x52f107ff,	0x1f4a0c66,
-0x7af566ef,	0x4af3586c,	0x11d5cd6f,	0x6b8bc81a,
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-0xbc80ea7a,	0xa90f1473,	0xfa9d22c4,	0x3ccdaa53,
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-0x699af39e,	0x6d22bdfb,	0x5fe8112c,	0xdb3f8dbb,
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-0x17e2ca8c,	0x2a56ebde,	0xf387b1ea,	0x9d97f5e6,
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-0x370152e3,	0x84bec429,	0x944c0604,	0x80d2e23d,
-0x661eca8e,	0x1f45bdb2,	0x00e19b5a,	0xf666af38,
-0xd1d383c3,	0x3def0d6f,	0x1444fa5b,	0x0aa11ee2,
-0x1eb25d6c,	0xcd51ae3a,	0xdb0c559c,	0x22818716,
-0x9ba1ba6f,	0xd0c97b0c,	0xc14f04c5,	0xa1240202,
-0xe2110419,	0x293f4dd9,	0x98c2fa3f,	0x67ec66e4,
-0x5a9af6c5,	0x4254b385,	0x8c2bb55c,	0x2834b05d,
-0x39bac0a4,	0xda998f86,	0xe4797beb,	0x0cec5a2d,
-0x938b3950,	0x38d4e088,	0x0305d5b8,	0xf3b28762,
-0x589f97e9,	0xa5898e96,	0x1bcd52e7,	0x0652e8f3,
-0x69800c5b,	0xed46c25e,	0x09b395a4,	0x06a963a6,
-0x71597fad,	0x0570bbd2,	0x0dfd6639,	0x086b5b5d,
-0xe3d87df1,	0xaa6e75c9,	0x6bb447c1,	0xa54550ab,
-0x4d59eb97,	0xf3a29b0f,	0x969e92cc,	0xf14624b3,

cpu/intel/model_106cx/microcode-M10106CA107.h

diff --git a/cpu/intel/model_106cx/microcode-M10106CA107.h b/cpu/intel/model_106cx/microcode-M10106CA107.h
deleted file mode 100644
index 7557111..0000000
--- a/cpu/intel/model_106cx/microcode-M10106CA107.h
+++ /dev/null
@@ -1,355 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  M10106CA107.inc  */
-0x00000001,	0x00000107,	0x08252009,	0x000106ca,
-0x482cae0e,	0x00000001,	0x00000010,	0x000013d0,
-0x00001400,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x00000107,
-0x00000010,	0x000500b0,	0x20090820,	0x00000401,
-0x00000001,	0x000106ca,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x2beaa92c,	0xfc3395b7,	0x10be81a0,	0xb318e067,
-0x723923f0,	0xb297dc63,	0x7d52bc4b,	0xc6ef362f,
-0x0882023d,	0x953684cb,	0x0abe06ee,	0xa7ef1798,
-0x160d6cb8,	0x930cf745,	0xafc3fd79,	0xa70df3d5,
-0xb0620f46,	0x70048a23,	0xbf95ecf0,	0x76c1b997,
-0x5128616d,	0xb6b4b969,	0xcc69f71d,	0xdf7416e1,
-0xdf9a571b,	0x50c0bcc8,	0x85e2b3cd,	0xc1927532,
-0x7a04b6be,	0xe56b7f97,	0x524085c4,	0x668bf327,
-0xb3eaa54c,	0xccde06f8,	0x09b4e42b,	0x033b0a46,
-0x0f6e2fde,	0xb308ce53,	0x93eff03e,	0x8830014e,
-0x5c8a6f22,	0x91d2f757,	0xf70b648d,	0x0789998a,
-0xd84d4640,	0xe5f34e80,	0xf3357e64,	0xd1e2beea,
-0xc7e95c3a,	0x30e57e4d,	0xec214356,	0x7e10859e,
-0x1d5895d5,	0xdeeff6cb,	0xed1030ed,	0x827e603d,
-0x6b4b2de3,	0x83ec6fd0,	0xa64092f3,	0x8d9887e4,
-0xbefcbedd,	0x2111afef,	0xcb9abf96,	0x5c79ceac,
-0x9bf8a57f,	0x5d0e44be,	0xdca3d3b6,	0x9072d1ca,
-0x48e73a50,	0x8d0bc804,	0x6aea94d3,	0xc372403e,
-0x00000011,	0x3b994153,	0x23faa5e1,	0xc3feae68,
-0x76d5e67d,	0xbd696479,	0x138a05ef,	0xf2b5de22,
-0x4ccba0ed,	0x333cc95c,	0x8d98a2ae,	0x0bf1fa24,
-0x239f1fbf,	0x44701d3b,	0xb176783f,	0x20eff2cc,
-0x0cf93bf9,	0x4e6ace41,	0xe346d231,	0x11d560af,
-0xae8874a2,	0xe344fa92,	0x0056d268,	0xd8068d91,
-0xf336cf97,	0x45c54f6d,	0xc0650992,	0xa3f86cb2,
-0xc73d3aac,	0xc7654f1f,	0x385777ad,	0x20928850,
-0x47509cab,	0xf40f9ba6,	0x34efbe6c,	0x1fe3b873,
-0xfb39bd58,	0xa50b6367,	0x66c20e63,	0x49a4e1ee,
-0xe490ed5a,	0x98c340fa,	0x30bfe19d,	0x4c17d142,
-0xea54c4e2,	0x8c00e086,	0x219dee1b,	0x739a2fc1,
-0x1e07b80f,	0xea6f4799,	0xb4684fc2,	0x42fc725a,
-0x1d3c7413,	0x188b6f3c,	0x2c0e440f,	0xc6ad011d,
-0x2048625b,	0x3be9d940,	0x0a932622,	0x1fafce30,
-0x1cfa4c90,	0xd0e9f989,	0x31c0c399,	0xad0c597d,
-0x48a94bb5,	0x109da683,	0xcdc197aa,	0x7bf7ef14,
-0xebf3afa0,	0xde4ff7d3,	0x02a79e3f,	0x4d77f0e5,
-0xd0c1fd98,	0xdb342a5b,	0x7f753eca,	0xb710c135,
-0xacb3b9c0,	0x5e89ece7,	0x2ca4fe84,	0x4f22e461,
-0xa6a633fb,	0x508fb453,	0xfe1f342d,	0x79bcff1f,
-0x0c776771,	0xd6c5db47,	0xfe4d8cc5,	0x68b9f655,
-0x447b7366,	0xddde31ad,	0x8e3496df,	0xe091f8dd,
-0x78eb0fe2,	0x9e08c72d,	0x6909c46b,	0x92ca6b4a,
-0xfb7a0efb,	0x55f65148,	0x9fcc90e1,	0x254f5f40,
-0x0690dcd5,	0xc6a67013,	0xda2e35a9,	0x9171cb50,
-0xe477a087,	0xc0f89e14,	0xc1221ebf,	0xf032e99f,
-0xc8883a7e,	0xba4b17c9,	0xb0ef0962,	0x6ea751f6,
-0xfc8c336c,	0xd1966bf1,	0x26d57e1d,	0x952e847d,
-0xccdaf0c9,	0xd0aaee65,	0xb2f22a59,	0xc74bc035,
-0x900ef42a,	0xeb1e7bfe,	0xfc465b3a,	0x0cd002ce,
-0x560f5d4b,	0xecbc2658,	0x9f38856a,	0xa3f77ba1,
-0x3ee18273,	0x7ab97b2c,	0x0f5843cc,	0xdb648b0a,
-0x8e450381,	0x80176891,	0x05e3e6d2,	0x36593afe,
-0xebe78fce,	0x53d7f64c,	0x2dde1104,	0x293cd7e2,
-0x4f430fa6,	0xf3a8cdb0,	0xd28f6535,	0x9159d53b,
-0xac66a916,	0x8f77be38,	0xa16b9dad,	0x1a4699d0,
-0xe278df12,	0x2c336789,	0xb668fe15,	0x099fa98c,
-0x4fe5ef10,	0xf4692cda,	0xb86d4040,	0xb6dce0eb,
-0x6c5ef896,	0xdef35c52,	0xc02a04a4,	0xed99c619,
-0xd91721b2,	0xa2fac92a,	0x5ab9c724,	0x0ee25329,
-0xc2029fce,	0xc847bfbd,	0x3b97ddcb,	0x4aaaa55a,
-0xa16e313a,	0x06e4b6cc,	0xc0e56598,	0x60ebfadb,
-0x88841f3a,	0x7c6b65ef,	0x15542ce1,	0x70b88b78,
-0x382d1155,	0xe73c900c,	0xd8b6409e,	0xf1cc5406,
-0x64fc3223,	0x43cb616c,	0x17e3a1ac,	0xa9aba529,
-0x8dd83b32,	0xb625cd1d,	0xbcb4b0ed,	0x685cc4b2,
-0x803e35f8,	0x4e679481,	0xc7dd7591,	0xf8676b62,
-0xac25b6c8,	0xb0211931,	0x5c5df337,	0x3bde6fb6,
-0xbc433992,	0xf7315d49,	0x028e112f,	0xe3d59076,
-0x7757e95b,	0xe5c5a193,	0x59b243a0,	0x341f33d2,
-0x7c0d591d,	0x5f96d138,	0x5116c490,	0x747caf2f,
-0x6da223f1,	0xcbe30d11,	0xe10b6b28,	0xa09328e1,
-0xdf1b94ee,	0x163b48b9,	0x72e7a36a,	0x78eda572,
-0x393f0ad2,	0xf85561ea,	0x6e7ca7c8,	0x352cb3b4,
-0xb75bf9f3,	0x97ebcf76,	0x932b8b91,	0x937f1fab,
-0x6ef1e868,	0xce84fc3a,	0x9dd09a21,	0xa8f3be36,
-0x244834e9,	0xd871f223,	0xdef842f3,	0x787eaf73,
-0xf2326bca,	0xd2c3ae20,	0x48dc7621,	0x91419afe,
-0x23a44b12,	0xce0443d7,	0x4a6f1d9f,	0x1ea8cf7a,
-0xb6b7694d,	0xf29e3e25,	0x51665303,	0x33581b86,
-0xc762d72f,	0xaa658158,	0xcddb7354,	0xdacfd75f,
-0x9ec31b1c,	0xf8aa3154,	0xfdeeb2e0,	0x9cb52f84,
-0x16ce9fa4,	0x25050178,	0x2ef25d50,	0xcf4b4d41,
-0xf27d5684,	0x7bae3f36,	0x05b50e59,	0x91d23add,
-0xdbdee4ac,	0xe16994b5,	0x0a5481c3,	0x3deb8a17,
-0xb8844d77,	0xcbce6140,	0xbd748572,	0x6531627f,
-0x2137be68,	0xf46f8aa9,	0x6d2526a0,	0xe72aa307,
-0xb361a2c8,	0xed9c2987,	0x75ddeb95,	0x637d3cad,
-0x2c4dfd37,	0x01f0e2bd,	0xa521a1a4,	0x1194ab8a,
-0x96d7b9c2,	0x94cee6e5,	0x454cc836,	0xa5c0fac3,
-0xf6e9fe9b,	0x3107c251,	0x14c8c6a6,	0xd727c1e1,
-0x339f2742,	0xb0a033de,	0x56fc9280,	0x36a907cd,
-0xb74acdde,	0xe8122571,	0xd0116007,	0x238b3d4f,
-0x34532ebe,	0x1c534370,	0xd1eb258d,	0x354b2289,
-0x6007a18c,	0x58dcee7f,	0xa033ee94,	0xa5e1145f,
-0xe345c315,	0x58510592,	0x33d9db2b,	0x7ea86edf,
-0xce60a8ad,	0x2d9a8919,	0xb5e2840e,	0x020e6e15,
-0xaff8660e,	0x402c12da,	0xfaea95a5,	0x6ffb0748,
-0xc4c730a4,	0x1f57ead7,	0x2cc6d295,	0x0ef4bdb6,
-0x01a7368a,	0x52e88f43,	0xf1b14c65,	0x38018686,
-0x0c70ee45,	0x271b1fe2,	0x0eea950e,	0x61a6f56a,
-0x842497a5,	0xfbcf0f4a,	0x35132cbb,	0x4f2eb1ce,
-0x24fb1bc7,	0x343ec960,	0xda94e0a2,	0xf1206e0b,
-0x80bf8007,	0x7e09d8d8,	0xba6bc1ff,	0x892c956c,
-0x4ceaa5e8,	0x871f3358,	0xe802a1a4,	0x7fa29ced,
-0xea8616cb,	0xc1999088,	0xc5baf089,	0xd1490754,
-0x091f6f21,	0x9a3e3c4f,	0x1eb11650,	0x13fd05fc,
-0x5e9d5b0e,	0xd1485d34,	0x474feaae,	0xc211a60f,
-0xa609643e,	0x07052bb2,	0xa7bfb285,	0x30bbc170,
-0x9ebe8d27,	0x5207a9ee,	0xfc12bd0e,	0x7fa428af,
-0x2d1c8a2d,	0x6f15c0d6,	0xdaf0ee75,	0xd32bb1d1,
-0x694463f5,	0xa1ebdae4,	0xeaa3d0b2,	0x954077de,
-0x181da0bb,	0x4556808d,	0x46e80a64,	0x0c017172,
-0xd8ef8702,	0xa0e6d100,	0x90b0a9f0,	0x4a13a407,
-0xf1675dde,	0x5110d8c8,	0x1c028526,	0x7774581f,
-0x9d3d8c23,	0xcaf8b632,	0xf401a52f,	0xa5d14a5c,
-0xebed6c1b,	0x2ec618ad,	0x5b63935e,	0x89508732,
-0x43a48b2e,	0x87535b2b,	0x0ffb28c2,	0x1fd1becd,
-0xd2b2a18d,	0x45dccb4c,	0xad41a54b,	0x7ffa2fed,
-0xddd18aa1,	0x1db06a98,	0x860d6b58,	0x2997109e,
-0x80a2300e,	0x0cc52e7a,	0x15b24c31,	0x8f717016,
-0xa425cac3,	0x8153e1bf,	0x5e91fd89,	0x04b17f35,
-0x150fd30c,	0xc7309d31,	0x63dce1b0,	0x162eb854,
-0x8093904e,	0xf7b4399d,	0xb23fa735,	0x67509c6c,
-0x5380dec9,	0xb79172a8,	0xb6c249d1,	0xcd040b42,
-0x4efe12f8,	0x63ce3363,	0x406d1666,	0xf8e9bc95,
-0x99cbff2c,	0xaf0cac38,	0xe6556ddf,	0x9bb2a399,
-0x43387c9e,	0x4951f5ac,	0xfa4ddb69,	0x562ec852,
-0xa2e3e441,	0x32a80b75,	0xd88361c5,	0xf04b7ac9,
-0xb0ea18bb,	0xf5035c94,	0x520c9c12,	0xb4c7e15c,
-0x6f72c4bc,	0x80f2112a,	0x4e4bbb87,	0x7bb5ee1f,
-0x54eb313e,	0x18cb6cb9,	0xca5ff580,	0x2538d798,
-0x2b813681,	0x58c11a6c,	0x68ae4070,	0x40799341,
-0xa740f86a,	0x722ca7ef,	0x815c71c7,	0xe663c6f7,
-0x5e249b96,	0xe97e3b71,	0xb7ee5a12,	0xd5f065bd,
-0xaa642191,	0x9864e095,	0x0c087780,	0x0fc0d969,
-0xf6b82791,	0x04aa55f8,	0x872c7cd1,	0x43bc93b0,
-0x12fe4c05,	0x16f15229,	0x06161603,	0x6e76239d,
-0x90ea9c62,	0xecf642df,	0xb52a8db6,	0x2e0c5d58,
-0x10f09bbc,	0x1bb1b2a3,	0x7132167b,	0x291d5f16,
-0xd7814a9e,	0x79e52dbf,	0xef6b61e8,	0x585b920a,
-0x18ea4e61,	0x72ce62fc,	0x59ed8e9f,	0x610564d3,
-0x40f4f145,	0x0a2f60c1,	0xec64ebc3,	0x8ad5b251,
-0xb471e120,	0xb899cffd,	0x2b81118a,	0xa3b591a8,
-0xdeced3ab,	0xcb9aacb8,	0xba53fbdd,	0x6e49e298,
-0x75fa6c19,	0xd11cfe98,	0xd29ce7fc,	0x7471df09,
-0xb59b2474,	0xdff0b07d,	0xae92c4b7,	0x6414ee6b,
-0x6acba1a5,	0xed9c0b5b,	0x728f7644,	0xf6d20c7a,
-0xf03ad03e,	0x6612b0c3,	0xe156c417,	0x9aec4a8d,
-0x02be86ff,	0xe11d1660,	0xefeba14a,	0x7d275f33,
-0x16acabb2,	0x7ac99cd7,	0xd18566e4,	0x3bce4ca1,
-0xb0312f16,	0x5700f72c,	0x345864bd,	0x917a4db2,
-0xaa22b7f0,	0xc66eb69c,	0x62f8a99e,	0x6364a44f,
-0x956d2cd2,	0xfa64b7df,	0x47238b18,	0xddebaeff,
-0x39c9d16b,	0xaa1487cb,	0xc6f91d13,	0x8191316d,
-0xbf5d7ddd,	0xc907cbb1,	0x7a283ba3,	0x0365e6a3,
-0x2fbb3185,	0x159d0436,	0xb55b6990,	0xf0935005,
-0x441e4fc8,	0xd1dfdc91,	0xdd9ff8bc,	0x95c88203,
-0xa8029310,	0x62501ff4,	0xf838a813,	0xfb66d5ce,
-0xe6bb8354,	0xe2afb832,	0x55dcf796,	0x315f28cf,
-0x400de577,	0x3ad89b1b,	0xeee943aa,	0xbd5d9001,
-0x8dd4771b,	0x21ad481c,	0x504d6222,	0xfc0e6728,
-0x7abe5d62,	0x332f8309,	0x50d8c688,	0x4b686808,
-0xbe6395ec,	0x5153b67c,	0x04144a35,	0xa85077ca,
-0xa3775cda,	0x838556dc,	0x973c2222,	0xf5037c9f,
-0xd02b0c87,	0xa3e69f8f,	0xdf68cce7,	0x9490d31f,
-0x3d9c5cf2,	0x939e7823,	0xc51b9a2d,	0x2e802e27,
-0x65079a36,	0x3b6e3d79,	0x5fafbac6,	0x9973bc64,
-0xfc4e7124,	0x56e1fad3,	0x10ec049f,	0xefa79c0b,
-0xcde48353,	0x3fa7f449,	0x07cb1a31,	0xf6ba0053,
-0xe5af7b10,	0x9e2dc089,	0x290f3fa4,	0x116da472,
-0x7a006f5b,	0x727205bf,	0x7c59870d,	0x968c6000,
-0x3ed4fd57,	0xe423effe,	0xc352ef7a,	0xd23d00e5,
-0xbded3a50,	0xedcdc3d0,	0x3a517a74,	0xbdfc58cc,
-0x24b2371f,	0xf967f533,	0x26069547,	0x2114e85e,
-0xa1953f56,	0xf0c52ebf,	0x235320ae,	0x35600f33,
-0x5c1ca2b7,	0xe89db0da,	0x08ce35aa,	0xc66cef79,
-0xacd41ce4,	0x865f4c69,	0x15a3376b,	0xdee5d7a1,
-0x6fdd6362,	0xa4125977,	0xcb61bae2,	0x5e3da819,
-0xc6d2e56a,	0xde1807f2,	0xb30c3473,	0x1c4038c5,
-0xbf8afac6,	0x37423d2d,	0x72d9da33,	0x39e95bf5,
-0xd6a91cc8,	0xbbf4c2d8,	0x7c9d4b21,	0x13c514d5,
-0xcae41aac,	0x07b97f18,	0x0cdfbdee,	0xe7a9020b,
-0x1839f082,	0x7c414530,	0x43ba1070,	0x95945971,
-0x82e31721,	0x2fb159e5,	0x225c2158,	0xfadf74f6,
-0x788387d6,	0xb40c98fe,	0x0c75ba9d,	0x0487eb2f,
-0x7e9a1b0e,	0x5c442185,	0xcf1dffde,	0x39f9bc44,
-0x46b961d3,	0x9a14b19a,	0xe284d2ac,	0x52151caa,
-0x67f34f5e,	0xf4042d4f,	0xa28a223d,	0x3deb23f1,
-0x12d14b6f,	0x18901f31,	0xb3c7950a,	0xfb7d3557,
-0xb83e457f,	0xb6e13f07,	0xd26f5435,	0x83f05e15,
-0xf549a030,	0x6d1122d0,	0x540b3ef9,	0x8ecdac22,
-0xdabe1b2d,	0xf4913cc0,	0x579f9d77,	0xd4725d33,
-0x76b7abb0,	0x03452691,	0x4d52fff6,	0x12e95a96,
-0x42131074,	0xbb3eaa95,	0xb775618e,	0x6325764e,
-0xeb847c5a,	0xeb7b9c6d,	0xd01dd328,	0x547269e1,
-0x2cebecd3,	0xcbb0ed0f,	0xcc87e62c,	0x8e6b0ce0,
-0x8a8f9f06,	0x689e0c4f,	0xb3a1fe5a,	0xed84a0a2,
-0x66187741,	0x62a4475b,	0x5c4c31bb,	0xea000d76,
-0x8676c757,	0xd59cc6bd,	0x52f107ff,	0x1f4a0c66,
-0x7af566ef,	0x4af3586c,	0x11d5cd6f,	0x6b8bc81a,
-0x480eed48,	0x2ec7c65e,	0x6c0f3253,	0x100f2794,
-0x18d6c62a,	0x338f59f6,	0x8e6e2f9e,	0x75fccfd7,
-0xbc80ea7a,	0xa90f1473,	0xfa9d22c4,	0x3ccdaa53,
-0xe568fef6,	0x6a761fd4,	0x61c26b23,	0xabc31163,
-0x3b840e9e,	0xee864319,	0x84f93208,	0x743a780e,
-0x1507a3bf,	0x147dad13,	0x8952177f,	0xbeb40da7,
-0x699af39e,	0x6d22bdfb,	0x5fe8112c,	0xdb3f8dbb,
-0x026f8ff2,	0x6bf9658d,	0x9faabf0d,	0x6a2f3989,
-0x5be4a617,	0x9e55f0c3,	0x70510d75,	0x0fd92413,
-0x63d1d3c7,	0x68cf84bd,	0xbbff5901,	0xb0434b77,
-0x8564b88f,	0x06eddac5,	0xde2a66b6,	0xc1835355,
-0x5566bb1e,	0xbaa890cd,	0x108c6f70,	0x7e80dfcc,
-0xb8c03bb3,	0x14bdcbe0,	0x5037daf9,	0xee02697a,
-0x3326280f,	0x4f04c814,	0x4f640444,	0xbfa9229e,
-0x131c7ba0,	0x5fbcf1ba,	0xebe01998,	0x2a813a9b,
-0x3f27c028,	0xf77a6d00,	0xac0ddee5,	0x1b6e52d9,
-0xdac4bb99,	0x54a32f86,	0x26bfd80f,	0xf5debd9c,
-0x06536e13,	0x9498a87e,	0x3f9e8812,	0x53e0fdee,
-0xc08c3c8a,	0x2148b33c,	0x3932e37b,	0xad084cc7,
-0xe77a0048,	0x89addf10,	0xb2542186,	0xc4c0be6c,
-0xfbc626ce,	0x20a28446,	0x0f29f8f1,	0xbbef5d50,
-0x288b8070,	0x31aa2900,	0x4a538fbe,	0xcd344ca3,
-0x05170c9d,	0x06c51082,	0xc414194a,	0x6689a2cb,
-0x7618c884,	0x412ac324,	0xb0d952d0,	0xfb88757c,
-0xaacbb987,	0x92218ac5,	0x032a3895,	0x2e3a7dfd,
-0x4bb37e4e,	0x52342695,	0xa699f5b9,	0x45748066,
-0x7822f59e,	0x68a55092,	0xf049444b,	0xf274d694,
-0x0524ed76,	0x884c3732,	0x22fa43bb,	0x3b97d921,
-0x210b8c99,	0xc4ffdf26,	0x17ba16ed,	0xfcdfc437,
-0x0b8e2d8a,	0x7b019bb2,	0xd525e662,	0x03346249,
-0x7af3c1cd,	0xbf42dbac,	0xb6197a31,	0xebff8e32,
-0x84f9980c,	0xa225a4b0,	0xa9f3d94d,	0x8a3da052,
-0xc17241e7,	0xf133ce7f,	0x4d4542f0,	0xd884f2f8,
-0xa1633ebe,	0xd5c5e6e5,	0x7fce2fca,	0x8ad84a55,
-0xfdd96c9f,	0xa60d6f4f,	0xe025d2f2,	0x8be1b787,
-0x87a036a7,	0x23819cb9,	0x5967650e,	0x5d549108,
-0x57167175,	0x2f94c450,	0xbb536b04,	0xfb381d15,
-0x405bd359,	0x3ef9491b,	0xa9834cb1,	0x2cc5151c,
-0x148cd3cd,	0x0565ecb0,	0x8e596741,	0xf6d7f089,
-0x9e3524fe,	0xf4224e20,	0x583302fa,	0xebe46409,
-0x7bfe793a,	0x7d511902,	0x1e4a80dd,	0x53a280cb,
-0xa2d81d96,	0xe29b8f4e,	0x877789e5,	0x838ee539,
-0x35f9feb5,	0xa5bb1d43,	0xb24d7510,	0x67cd14d7,
-0x7cfac97e,	0xf6c72b9b,	0x302f9115,	0x1932060c,
-0x0a786f90,	0x85a88dd1,	0x322ef274,	0xb0f8af47,
-0xbb5e6bfb,	0x3f1505c5,	0x33b28086,	0x18025326,
-0x73293fb1,	0xbd813762,	0xad751414,	0xd533bccc,
-0x393b81fe,	0x5b3b79e3,	0x2221dc65,	0x4bf8124d,
-0x26df557e,	0xcb9320a3,	0x9e6e762f,	0x2a800bbf,
-0xbd30558c,	0xc6b2ebe7,	0x204b2c78,	0x3e55767c,
-0xe8dca1c3,	0x446eb4c6,	0xef6f4340,	0x5cbff9c3,
-0x37b0e9b2,	0xfb10c3d7,	0xed36aaa5,	0x11615dc6,
-0xad7d716d,	0xc1d500c4,	0x5a54754c,	0x0bd36bec,
-0x7d297712,	0xb1ae2dce,	0x2a2cb835,	0x89acaba0,
-0x936cff34,	0x8f04dc53,	0xfe5f02a8,	0x4b83f193,
-0x123c3f6d,	0x25dcdb3a,	0xeba9fe98,	0xe4b73b30,
-0x2c768429,	0x4029f674,	0x74815612,	0xb43e7b02,
-0x9eb984cc,	0x4c5de913,	0x80ff07f5,	0xc20ed71a,
-0x3b7bbbd5,	0xcf4c1a66,	0xc2e66533,	0xd60d0142,
-0xdbd557b4,	0x29fe5598,	0x43cbdeb8,	0x1e875827,
-0x09b83824,	0x1114224b,	0xd29b9b51,	0xa5a2673f,
-0xe3542aa0,	0x50c3bb9f,	0xa5257bb5,	0xa6542299,
-0x0b0f37d1,	0x1da0da31,	0xc959c1e8,	0x8abbe257,
-0xf234527d,	0x3fac9c67,	0xf1580042,	0xfef8a8f9,
-0x704d17e3,	0xda6dcfa4,	0xbc8f4334,	0x0cdba65a,
-0x63c9900f,	0x7201b3d0,	0xdf71982b,	0xa604304c,
-0x0c5cfc01,	0x125b0999,	0x729d22a3,	0x5b5090f6,
-0xea4abe44,	0x2b41d30b,	0x416adfb2,	0x41aa11b5,
-0x317049c4,	0xc8aea4d1,	0x273f074a,	0x2d9790a1,
-0x49d9c17f,	0x4c98bdb2,	0x6a17a963,	0x8027b597,
-0x6b1f92f2,	0xb44b50b2,	0x8831b439,	0xb90b82da,
-0x1af3d3c7,	0xc0f28557,	0x1dc0fff2,	0xe3048416,
-0x3a778ab0,	0x0fdea888,	0x5f0b4ac4,	0xb8f045f6,
-0x596249f4,	0x4ca0df7c,	0x22753ff4,	0x13220710,
-0x3900a19c,	0x2c316538,	0x9d3fb2c0,	0xc5c8ba47,
-0xc497edbf,	0xcd8bf202,	0xc50b2595,	0x9a9c7984,
-0x47b9e4dc,	0x718e6363,	0xbf6384a8,	0x79086ec1,
-0x568708ca,	0x39081202,	0xe7ddaa3b,	0x218c006d,
-0xaf01bc1c,	0xbd3479fd,	0xbc9cd1bf,	0x1a15b508,
-0x55e13c96,	0xe429f11b,	0x70358e12,	0x8a86c907,
-0x547d227c,	0x47de1d53,	0xf74a260d,	0xd19ed8ed,
-0xc8db4368,	0xe3c6b52f,	0x27686993,	0x8c0b4888,
-0x6be7f66c,	0x8261ca74,	0xe3dc2066,	0xa04b3762,
-0x4d59b620,	0x90f37689,	0x64ae22f5,	0xa3b0d945,
-0x47dffc7c,	0x9566371e,	0x5ae2fc4e,	0x95aff0da,
-0x9b8ef2fe,	0x7f22a07e,	0x14aea38b,	0x802ff150,
-0x2fa43117,	0x71244211,	0xcb5169ce,	0x04acf312,
-0x381c4155,	0x70d3b079,	0xf3b2a91b,	0x3f422e76,
-0x5ec10535,	0x9a409fd0,	0xc1f50f47,	0xb209165a,
-0x1a934e37,	0x17dacf73,	0x0fa18f20,	0x1c4d73c0,
-0x93bd21f5,	0x20be3fd6,	0x7b201124,	0x3a7b0a3e,
-0x4d7d1e04,	0xae32c1e0,	0xe699ebee,	0x6cee5458,
-0xd2ab4f2d,	0x6df96639,	0x7381fb8a,	0x2ce7cdaa,
-0xccc88ef4,	0xb46daa0e,	0xb750ddee,	0x084f07df,
-0x40bd18e5,	0xd6c275bf,	0x2d4269ec,	0x96136e73,
-0x27b4888f,	0x62b318ed,	0xd81ae496,	0x76542431,
-0x3dc0cfc7,	0x1e896661,	0x9e41c898,	0xfa8fcc61,
-0xab27f408,	0x9951e94a,	0x29b12179,	0x839b58ab,
-0x2097807d,	0x5892e43f,	0xfc958c32,	0xfc0b1b97,
-0x198699a2,	0x5de96181,	0xfa9bdd34,	0x175666bf,
-0x3b9f7dff,	0xd4541302,	0xde363b1b,	0x26eae277,
-0x34ecfee8,	0x32271791,	0xf0682c51,	0x67e9941d,
-0x0e131acb,	0x01d3f1b5,	0xe0e2a4c9,	0xa5422eea,
-0xa0ee61eb,	0xd11413aa,	0xcb789019,	0xeb72d232,
-0xc7532d1d,	0x7b225aff,	0x4f33a319,	0xd419bf2c,
-0xe0bced66,	0x1ffaad31,	0x1a9b6f56,	0xa116d71f,
-0x8136fa06,	0x9fea9de5,	0x77e8c17d,	0xf804d9f2,
-0x76ca41d3,	0x5fdb9e1b,	0x334b4302,	0x90236425,
-0xd6392379,	0x7015aadd,	0xac662630,	0x8e16920f,
-0x6ad76f6f,	0xec7bc8da,	0x03af52ec,	0x9a09f57b,
-0xb8b2354b,	0x9278d172,	0x1b66194c,	0xf61f317f,

cpu/intel/model_106cx/microcode.bin

diff --git a/cpu/intel/model_106cx/microcode.bin b/cpu/intel/model_106cx/microcode.bin
new file mode 100644
index 0000000..70bb221
--- /dev/null
+++ b/cpu/intel/model_106cx/microcode.bin
Binary files differ

cpu/intel/model_106cx/microcode.h

diff --git a/cpu/intel/model_106cx/microcode.h b/cpu/intel/model_106cx/microcode.h
deleted file mode 100644
index 03915d1..0000000
--- a/cpu/intel/model_106cx/microcode.h
+++ /dev/null
@@ -1,8 +0,0 @@
-
-#include "microcode-M01106C2217.h"
-#include "microcode-M04106C2218.h"
-#include "microcode-M08106C2219.h"
-#include "microcode-M01106CA107.h"
-#include "microcode-M04106CA107.h"
-#include "microcode-M08106CA107.h"
-#include "microcode-M10106CA107.h"

cpu/intel/model_2065x/microcode-m1220652_0000000e.h

diff --git a/cpu/intel/model_2065x/microcode-m1220652_0000000e.h b/cpu/intel/model_2065x/microcode-m1220652_0000000e.h
deleted file mode 100644
index 0f9f03b..0000000
--- a/cpu/intel/model_2065x/microcode-m1220652_0000000e.h
+++ /dev/null
@@ -1,547 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m1220652_0000000e.inc  */
-0x00000001,	0x0000000e,	0x06262013,	0x00020652,
-0x8d3e4af9,	0x00000001,	0x00000012,	0x00001fd0,
-0x00002000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x0000000e,
-0x00000000,	0x00000000,	0x20130625,	0x00000731,
-0x00000001,	0x00020652,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x741501b1,	0x699ec693,	0xb4a3ebc8,	0x009f3e14,
-0x10315b25,	0xca4e7913,	0x3f4f9adf,	0x9135afd5,
-0x5d5f57b5,	0x9926d84a,	0xdaaf70e7,	0x91786b18,
-0x82da740d,	0xae90be68,	0x8b6a07cf,	0xc2c37ebc,
-0xde451f9c,	0x7a1444c0,	0xce6700b1,	0x5c29e58a,
-0x12eb603f,	0xaaf6cb53,	0xd807a1c9,	0xf51ed696,
-0x90d9e2c3,	0x641bff09,	0x732ab820,	0xfef7aa2f,
-0x8f518e1d,	0xf0d8c4d9,	0x73aefe19,	0xf6d7ae12,
-0xd50a095b,	0xdf21cbb8,	0x4b81ff9a,	0xe1a6d1f8,
-0xbe78b0de,	0xda86826f,	0xc4f9c057,	0x306f1761,
-0x7aae81f0,	0xdbab0ae2,	0x789ec0ff,	0xbaacd096,
-0x68fa4733,	0x2f3fd406,	0xd287247f,	0x79eefe4c,
-0x6f674a41,	0xd6948ad8,	0x90388682,	0x5a4bf35d,
-0xadab41ff,	0x89e9dc62,	0xb2eccfee,	0xd4d52153,
-0x34301d19,	0x8a2f38a6,	0x35b05e56,	0x482f029a,
-0x296cb5a3,	0xce64f437,	0xae1dfa06,	0xb9f29132,
-0x1960a103,	0x70bb6f46,	0x152a5d83,	0x171a19d9,
-0xac9aa4b7,	0x54b719f7,	0x5b781cb1,	0xaea548bb,
-0x00000011,	0xad6665ec,	0x8f7eeaa7,	0xf7145423,
-0xbf3336d9,	0x2b3c03be,	0xa7a8f305,	0x406da464,
-0x048187a4,	0xd4f92b4d,	0x1f0ce9cb,	0x5c6321fb,
-0x5e721993,	0x789c40fe,	0xa40135f5,	0x1d4fae0e,
-0x2ffad4c8,	0xeb5f925c,	0x5deae67f,	0xa139471a,
-0xab2d9948,	0xcd77c7c2,	0x994c81ba,	0x3d0d6b67,
-0x605dfa46,	0xce380412,	0xdab0e374,	0x316607b7,
-0x824f3636,	0x83770e9e,	0x48adfb1c,	0xf48d1afe,
-0xa70247cc,	0x4533f1a2,	0x0dd1317f,	0xdbfb5e0c,
-0x9423b952,	0x7b9711aa,	0xcc972910,	0x1462974e,
-0xa058506e,	0x865a2849,	0xbf630432,	0x5353ad6d,
-0x21abb494,	0x6d41557d,	0x8d6abbad,	0x0a64782a,
-0x6129cf88,	0xed66c9f1,	0x5685667c,	0x269d4c8d,
-0xc4d0169e,	0xea14eba3,	0xe510ab71,	0x987b23e4,
-0x85540647,	0xbb4878c0,	0xd4e88bfb,	0x52f03b2f,
-0x71d80a5d,	0x85a5df79,	0x0ea1b80a,	0x1f9f0315,
-0x2f0f874e,	0x52a5b692,	0x8b78f9c1,	0x8778c36f,
-0x9fd51498,	0x89cd80f6,	0x4066e471,	0x4d8e4e41,
-0x8bca4f31,	0x604b1582,	0x664d6f33,	0xbacc9a23,
-0x597a875e,	0xbcbf0038,	0xcc793c89,	0x60078bb4,
-0x16956274,	0xb32cd18a,	0x8ba86746,	0xe86cb50b,
-0x8858cd36,	0x8013314b,	0xd4129b31,	0xb12a2c11,
-0x1a0e8ae9,	0x94481aa9,	0xbb3285f6,	0x223b6105,
-0x9b038355,	0xf529d6ac,	0x88657ea9,	0x35e214a0,
-0xf28c358f,	0xfe896f90,	0x8b13a8ce,	0x031eb2bb,
-0x5fd0ca6a,	0x00e1ffc0,	0x6ba0ac74,	0x35dd2044,
-0xd50539df,	0xf94bf1d3,	0x236ac2a3,	0x4d71d4ae,
-0x77c56a8c,	0x96cf34c1,	0x4d6fc067,	0x67df7c19,
-0x841b0ab6,	0x6897903e,	0x068c399c,	0xa702ce15,
-0x4634be71,	0xc006d908,	0x77b9de66,	0xd92b7652,
-0x85cdf28f,	0xd5a28266,	0xac9d196b,	0x0628c632,
-0xde4180f2,	0xf4dd4abb,	0xc0de152f,	0x9fd66bc9,
-0xcac8cb81,	0xbcc61b2b,	0x8eed28cb,	0xe5637824,
-0x4c6da19a,	0x5ea36eed,	0x7ec63b4e,	0xd72de7ab,
-0xbb1c2ddb,	0x581ca3c8,	0x118c25ca,	0xfaff4feb,
-0x93fb2ece,	0xc1825edb,	0xbd46667d,	0xca6011aa,
-0x748db720,	0x02dace82,	0x9365b686,	0xff9f9640,
-0x48c21ee0,	0x20234d6f,	0xc6d640b0,	0x68ca9109,
-0xe17d561f,	0x4cfcb0bd,	0x8396a0d7,	0x0f6bcca1,
-0xb3df86f2,	0xa7223a65,	0x010c1635,	0x6b33a6cb,
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-0x4831ee6a,	0xe523f927,	0xad7b2dae,	0xd6a07bb3,
-0x0ff0e464,	0xe3749fa0,	0x52c21335,	0x9dd4dcdd,
-0x6ebc3d43,	0xd602557b,	0xa0d33950,	0xc9f86b50,
-0xdc793062,	0x755980fd,	0x94bcd27e,	0xaaeaeb27,
-0x49226fba,	0x52fc0352,	0x6354ca89,	0x95f0ffea,
-0xc3ddc9ee,	0xdb8e00f7,	0x3df6bd3a,	0xf174fec3,
-0x47b459e1,	0xc1029416,	0x54439480,	0x396c1820,
-0xe479ab07,	0x425909d7,	0x05e44523,	0x0f7756d8,
-0x1d603bce,	0x3b9fb7c0,	0xcea307ae,	0xf31ce30d,
-0x2255d1c6,	0xc6292aaf,	0xb65ed92c,	0xafb1af7f,
-0x7c272566,	0x763e6d0a,	0xf5a705d7,	0xe6d03802,

cpu/intel/model_2065x/microcode-m9220655_00000004.h

diff --git a/cpu/intel/model_2065x/microcode-m9220655_00000004.h b/cpu/intel/model_2065x/microcode-m9220655_00000004.h
deleted file mode 100644
index 6e95b5c..0000000
--- a/cpu/intel/model_2065x/microcode-m9220655_00000004.h
+++ /dev/null
@@ -1,227 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m9220655_00000004.inc  */
-0x00000001,	0x00000004,	0x06282013,	0x00020655,
-0x3facc649,	0x00000001,	0x00000092,	0x00000bd0,
-0x00000c00,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x00000004,
-0x00000000,	0x00000000,	0x20130627,	0x00000271,
-0x00000001,	0x00020655,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x1c31b9cf,	0xd4a39e8b,	0x856372d6,	0xd8ab8765,
-0x351ac9e5,	0x3839f075,	0x8a875b5f,	0x91fb0eb0,
-0x5d5f57b5,	0x9926d84a,	0xdaaf70e7,	0x91786b18,
-0x82da740d,	0xae90be68,	0x8b6a07cf,	0xc2c37ebc,
-0xde451f9c,	0x7a1444c0,	0xce6700b1,	0x5c29e58a,
-0x12eb603f,	0xaaf6cb53,	0xd807a1c9,	0xf51ed696,
-0x90d9e2c3,	0x641bff09,	0x732ab820,	0xfef7aa2f,
-0x8f518e1d,	0xf0d8c4d9,	0x73aefe19,	0xf6d7ae12,
-0xd50a095b,	0xdf21cbb8,	0x4b81ff9a,	0xe1a6d1f8,
-0xbe78b0de,	0xda86826f,	0xc4f9c057,	0x306f1761,
-0x7aae81f0,	0xdbab0ae2,	0x789ec0ff,	0xbaacd096,
-0x68fa4733,	0x2f3fd406,	0xd287247f,	0x79eefe4c,
-0x6f674a41,	0xd6948ad8,	0x90388682,	0x5a4bf35d,
-0xadab41ff,	0x89e9dc62,	0xb2eccfee,	0xd4d52153,
-0x34301d19,	0x8a2f38a6,	0x35b05e56,	0x482f029a,
-0x296cb5a3,	0xce64f437,	0xae1dfa06,	0xb9f29132,
-0x1960a103,	0x70bb6f46,	0x152a5d83,	0x171a19d9,
-0xac9aa4b7,	0x54b719f7,	0x5b781cb1,	0xaea548bb,
-0x00000011,	0x8c733ff8,	0x7c6f0c02,	0x459c86a5,
-0xcf941ed4,	0xf8209eeb,	0x1ad7567d,	0x9d484915,
-0x7837df77,	0xb86712cd,	0xa839af1f,	0xf0dea6b0,
-0x41f1f065,	0xab1c2324,	0x0098ba3c,	0xeb60272f,
-0x7bbf23d5,	0xb8602cf1,	0x59d25b12,	0x84d112de,
-0xd30ece7e,	0x54ec90be,	0xeb745172,	0xf87fc66d,
-0x2270f54d,	0xe09922bd,	0xe234086d,	0xa6a679e0,
-0xa6d448d1,	0x9a4b2e92,	0x365ecec5,	0x72de29cb,
-0xa5e4226a,	0xdae11d44,	0x61e0e3ea,	0xe81420c0,
-0xd3eb1014,	0x02748123,	0x17e1382c,	0xcaf02dc6,
-0xd3a96cd5,	0x6f313da8,	0x322666b4,	0x3981429a,
-0xb1be1637,	0xb63abc57,	0x1638bf89,	0x9d32852a,
-0x6aa9c628,	0xd8f12081,	0xf0b5188d,	0xd57d4c72,
-0x202dcc71,	0x256124bc,	0xd823fe4f,	0x9400bdb9,
-0xac1471cc,	0x4a5c132b,	0x7bf75244,	0xe02c93f6,
-0x78ff2722,	0x980dc5b4,	0x0264a596,	0xf021b4d8,
-0x83244c0c,	0x2026f246,	0x71d4099c,	0xfc5dc62c,
-0x7ff8b34d,	0x4820eca0,	0xe9b8a476,	0x34e9ae19,
-0xd2fca312,	0x37b41e6f,	0xb4653a73,	0xb0bb14a6,
-0x0786241c,	0xda2d8b10,	0xe1f59c80,	0xa83f43bd,
-0xdf11b061,	0x3559bb01,	0x2a50e8d1,	0xddb259a6,
-0x7993bcd6,	0x12605b53,	0x8586dd13,	0x6537ff89,
-0xeccfcd3c,	0x353ef645,	0xb32e589f,	0xe5e9cd5d,
-0x5bf7fda3,	0xd481c270,	0x40952e18,	0xb7453227,
-0x2c622c1e,	0x40ce3eeb,	0x2cb06f4d,	0xcf56f687,
-0xf1ce6b70,	0x69e05cca,	0x9c403bac,	0xe9b164a4,
-0xdfae6e01,	0xc9018963,	0x0137f82c,	0xfc81355c,
-0xc7976ad9,	0x1ff39090,	0x72cef48c,	0xc6a62704,
-0x474452bf,	0x0b6c875c,	0x71a6819b,	0x8ffe7c75,
-0x8946dd82,	0xf29078f6,	0x2ad6b31e,	0x5485d154,
-0xf60a8d3c,	0xf3140ac2,	0xc0361c22,	0xbf1c40c4,
-0xe486759a,	0xafbb44ab,	0xbd6aeb07,	0xc52c942b,
-0xe8853047,	0xe6a3605a,	0xda8e3a81,	0xf2729e6c,
-0x0ef24909,	0xa981328d,	0x34918736,	0x25f637e4,
-0x65e90909,	0xd18efc0e,	0x7e63010d,	0xe562d763,
-0x36d8e16f,	0xef69ecf8,	0x3c24a4f2,	0x2b67ef5b,
-0x3b673ba0,	0x1661f329,	0xed5dc043,	0x4a189a56,
-0x3873d76d,	0x281e821b,	0xb66c3dd9,	0x8170640e,
-0x864da8e4,	0x57861062,	0x4b0db638,	0x8c6254b1,
-0x323d38ac,	0x0f364c32,	0xf1e1af63,	0x7f196a13,
-0xad8d0db6,	0xaa836e23,	0xa95c0596,	0x3796c3be,
-0x33dd8d5c,	0xe78d13dc,	0xa5036f35,	0x211004d4,
-0x599a9905,	0x760145c9,	0x48255eb0,	0xc5791ca3,
-0xd30f5d02,	0x7aa63da9,	0x7b2244cb,	0x4ac12003,
-0x7a2d743a,	0x9cc3f8fb,	0xa547c4a9,	0x47d20182,
-0x636e2594,	0x4f8326f8,	0x0d2ee0b0,	0x38e6d211,
-0x6819fda7,	0x725a392c,	0xafbe8693,	0x413a29df,
-0xc43510f4,	0xe4172782,	0xca47d7fa,	0x9da06308,
-0xa5f3ae17,	0x1025644e,	0x60cfa59a,	0x55d47cb0,
-0x42d763a0,	0xaf3d53de,	0x1f07175f,	0xe2be54ff,
-0xf5f554d4,	0x0f4bdf83,	0xd3beb939,	0x2257f1dd,
-0x0e94b16c,	0xfe8ad488,	0x71515b5b,	0x8d2ca17d,
-0xff2b203b,	0x85db66a8,	0x9d720e4f,	0xf1f00250,
-0x7ce9d2f2,	0x7543f921,	0x3d6b2c1a,	0x89766401,
-0x464107c4,	0x5ce7650b,	0xd0363a7f,	0x585965de,
-0x98af0171,	0xc4977520,	0x45c9a970,	0x918e9e52,
-0x77e9418f,	0xeaf1ac5c,	0x1f081f59,	0xe4cf61b1,
-0x15297f44,	0xd213e344,	0xedab7cdb,	0x62b1da36,
-0xc1a76f39,	0x6e6b11ef,	0x6a2dabd8,	0xb3e8c395,
-0x2dc98d1d,	0x40578dd4,	0x5a405e16,	0x6f77d81d,
-0xec7d8762,	0x298cfbec,	0x7b0a28bb,	0xcee378ac,
-0x6d2b5652,	0x2391e861,	0xa587194d,	0xc5d1b7bc,
-0x1120fb38,	0x4d832da1,	0x5285ceee,	0x3ce72915,
-0x0573a445,	0x80bd7f32,	0x289c6030,	0xb194d6e9,
-0x2ea6e339,	0xca81d733,	0x468a0b65,	0x58195df8,
-0x71c073ef,	0x160868d1,	0xea04bcb9,	0x92195376,
-0xd9988422,	0x3863cc6f,	0x9c3ecd98,	0x1a149bd1,
-0x59af4fe6,	0x4b7b254d,	0x34bfb07c,	0x975f9c70,
-0xb0e68e77,	0xd5ab1713,	0x4478b4b9,	0x599a8192,
-0xd57576f7,	0x023fd018,	0xc365da25,	0xb5eb6589,
-0x29cba8d6,	0xaa4df4d0,	0x2c9f85b6,	0x6aff1709,
-0x9cd2257d,	0x98468052,	0xa3ba139e,	0x015b5eb9,
-0x7eaea185,	0x8d0639c4,	0xeea7bd54,	0xc0c1b917,
-0x98ad5691,	0x221b6c0f,	0x651dd24e,	0x2a42c4d4,
-0xc2003cf0,	0xccef6a75,	0x30e5da92,	0x39ebed36,
-0x8837c68e,	0x2cd60a06,	0x462cbfbd,	0x5d23a1b4,
-0x5a1385fb,	0x5b371241,	0x8cb753db,	0x46eba22e,
-0x427aee13,	0x3b00c490,	0xee1b611f,	0x44387d89,
-0xf1387b95,	0x7d456726,	0xaf891e2f,	0x3a3942e6,
-0xb6a488b1,	0x97313935,	0xc076a5ac,	0xe1e057b0,
-0x78b628d4,	0xda8f828a,	0xb66c6e34,	0x33b729c8,
-0x628adb7d,	0xc70ce94d,	0x88376e43,	0x0bad7b81,
-0x2a934ee2,	0x6d8e09a0,	0xd8d97112,	0xaa8fc79a,
-0xe351c7e5,	0xbcabfb10,	0x12ee7960,	0x718b925a,
-0x6d96da62,	0x3fd8bad9,	0x416d0dae,	0xc7518d3f,
-0xf1098942,	0x652e2518,	0xc5ffda97,	0x1b92dae4,
-0x7b389c26,	0xa95878da,	0x6dee369a,	0x96fc710d,
-0x14152481,	0x4d0795c7,	0xa4f6f655,	0x01f04af1,
-0x7c2c656e,	0xaeb0cc54,	0xab1bc024,	0x897b1d01,
-0x11d8becd,	0xb7554bcb,	0x352a6707,	0x35e79545,
-0x884dfec3,	0xde6917b5,	0x71e561e5,	0x8dd644ce,
-0x8b5e782c,	0x0c3872ef,	0xfbe7b317,	0x84caeb47,
-0xdacb705f,	0xaa972c59,	0x94f85893,	0x6a0fc6b1,
-0x979008ec,	0xde3d0d86,	0x6f838513,	0xbacf2ac6,
-0x95f10367,	0x5fafe618,	0xcafd4982,	0x2b7ab7c9,
-0x6f642266,	0x16b2636a,	0x080296a1,	0xce499636,
-0xc80f60b0,	0x9d7b846b,	0xce6809f4,	0x5b1211b2,
-0x99cd2e7c,	0x90a956a0,	0x204c817f,	0xc6f7ee6c,
-0xcf8ae252,	0x53bd1657,	0xfb5eaeba,	0x55b4b121,
-0x440045c8,	0xcdb005ca,	0x87410131,	0x9e6125bd,
-0xd80e8863,	0x33e9de96,	0x32cf5b8f,	0xd2334945,
-0x2e65ce88,	0x750d09dd,	0x100d33af,	0x28892b85,
-0xc2525b54,	0xbcd9952e,	0x17ad249c,	0xbe3726b0,
-0xb9935f35,	0x665cdce5,	0xad7fbc05,	0x1c3ce4b6,
-0xa254dc96,	0x62c84b0d,	0x2a8e588f,	0x4b6b0a65,
-0x78782253,	0xc68b1a74,	0x05f0857b,	0x87861d2b,
-0x47ea6419,	0x7e932619,	0x0c753922,	0x74490db7,
-0xeb690a45,	0x4b5d56b1,	0x8f39e531,	0x8d31b8ce,
-0x828d129f,	0xfccaecd5,	0xa4b9973d,	0x0ea81725,
-0x167f1e3a,	0xc8831ab2,	0x41164adb,	0x547b9378,
-0xcff0b3c3,	0xa9221206,	0x6d6c8cc8,	0xba1f1a24,
-0x437f853f,	0x5b113be4,	0x90f6a6b5,	0x69e553c3,
-0xa0cf2c28,	0x5b72b179,	0xf9912ed2,	0x71bb7674,
-0x36d43cb2,	0xb8784965,	0x4693329f,	0x7cbe36ee,
-0xd023450f,	0x4400bb23,	0xacc38e84,	0x64005ac0,
-0xf4d12658,	0x79d41301,	0xa3cb74f1,	0x8f24cbf9,
-0x369b194e,	0xdd7c24fb,	0x96cc514e,	0x372ea5b9,
-0x3fa670d2,	0x0441a477,	0x362ea6d6,	0x029e33ff,
-0x9876735d,	0x50a1a802,	0x5d643050,	0x7e7ff68f,
-0x4c6ad18c,	0x8890c9c8,	0x4a400b69,	0xdbfe332e,
-0x6d61c5d9,	0x3b95b74a,	0xdfc564e0,	0x58473859,
-0x072c8ed3,	0xc614c118,	0xb53417b2,	0xe94c1bde,
-0xafba1da9,	0xf655a347,	0x7e42a7ba,	0xc5c544fa,
-0xb1ebce07,	0xca2dcbff,	0x74d920ca,	0x7747f05e,
-0xb25259d6,	0xf990b95b,	0xa746faeb,	0x3e407324,
-0x91091e38,	0x0506d0bc,	0xb27d2673,	0xbfc0f48c,
-0x6a6d51b5,	0xe9c5c54e,	0xbec1c792,	0x414883ff,
-0x079d5e1e,	0xd31da398,	0xe9db479a,	0x3d2cec7a,
-0xcf93964b,	0x22be3309,	0xb6d31a19,	0xc177b0a6,
-0x88abd175,	0x48dd3f0e,	0xc8e135fc,	0x80144757,
-0x0335fcb1,	0xbafab604,	0x55ea071e,	0xf480b382,
-0x62b5fd47,	0xf775720c,	0x6dba6d42,	0x06ed2450,
-0x64292013,	0xf1cf7bfd,	0xce837453,	0x24d2590d,
-0x97e0dbf7,	0x751dc366,	0xaa642e00,	0x3b3c62ef,
-0x4a31dbce,	0x79d72394,	0x632e6b4d,	0x39c06db9,
-0xb34f5bab,	0x0eaa1c30,	0xe4bb341a,	0xf72bd9c9,
-0xc7eb8cab,	0xecb75da2,	0x602728da,	0xbc4b44ac,
-0xb8efeaf6,	0xb3b8ad20,	0xf0a35d4c,	0x73b8e5dd,
-0xaf354cc7,	0xc05b640a,	0x761dde10,	0x829f357e,
-0x24522cd3,	0xb2c88206,	0x6d27d2cf,	0x8630999e,
-0x4eb23c0d,	0xc08c0587,	0x32ffe4f4,	0x4a8616e4,
-0xf26920cf,	0x5a6642bd,	0x73acd141,	0x512709ab,
-0xeb5d2bdb,	0x83b13d13,	0x7796d0c1,	0x2672bce1,
-0xf0bab5c8,	0x76599bb5,	0xa504d3d3,	0x96934c40,
-0x64dac9ce,	0xd3a9add1,	0xd15e6057,	0x8be19fb3,
-0x8004bd02,	0xaf5d177e,	0xed3c4233,	0x01b575eb,
-0xc7b55371,	0x37b32c7d,	0x2d8423ca,	0x0016648f,
-0x8f591eb1,	0x9a7eb255,	0x13219206,	0x05dd6c80,
-0x3299d3d3,	0x0c6abf5a,	0x9a29e616,	0xa01f4117,
-0xd4b270d6,	0x84f7b0bb,	0x686e0d10,	0x2efea95d,
-0xb3782bf9,	0xd6d8bda7,	0x0aca2bf8,	0x0139729e,
-0x87ef518f,	0x49b7820b,	0x2fb5acfe,	0x011643e3,
-0x01a9673d,	0xbf9cf79b,	0x54e358e5,	0x26804224,
-0x254e25bd,	0xbd69b814,	0x8cffbdd8,	0xc36ddd41,
-0x39fa1c8a,	0x63260fe5,	0xd9c94b34,	0x88f64e21,
-0xfc591d1b,	0x7e1e5cbd,	0x161c380b,	0xd4a34678,
-0x01b3dd84,	0x64006fa7,	0x92b18057,	0x6ede1310,
-0x90439cb1,	0x33802ea4,	0x57a10328,	0x6496f9a9,
-0xb593f489,	0x6c337e00,	0x73f0124c,	0x0f6debba,
-0x0ebc70ac,	0x8ca08dc6,	0xe3ab9236,	0xb11bbfa8,
-0x89b9f2a0,	0x8abd0414,	0x5c6b1f22,	0x3fc8024c,
-0x6238669c,	0x8857212f,	0xbf3f8ab7,	0x228b1acc,
-0xbf8ace47,	0x1a19e69b,	0x06426baf,	0xa65feb2a,
-0xa4ab3116,	0xd5377ea3,	0x43756744,	0xe525500b,
-0x56809426,	0x9ce09df3,	0xada35261,	0xb197e290,

cpu/intel/model_2065x/microcode.bin

diff --git a/cpu/intel/model_2065x/microcode.bin b/cpu/intel/model_2065x/microcode.bin
new file mode 100644
index 0000000..3c267fc
--- /dev/null
+++ b/cpu/intel/model_2065x/microcode.bin
Binary files differ

cpu/intel/model_2065x/microcode.h

diff --git a/cpu/intel/model_2065x/microcode.h b/cpu/intel/model_2065x/microcode.h
deleted file mode 100644
index 63e330b..0000000
--- a/cpu/intel/model_2065x/microcode.h
+++ /dev/null
@@ -1,3 +0,0 @@
-
-#include "microcode-m1220652_0000000e.h"
-#include "microcode-m9220655_00000004.h"

cpu/intel/model_206ax/microcode-m12206a7_00000029.h

diff --git a/cpu/intel/model_206ax/microcode-m12206a7_00000029.h b/cpu/intel/model_206ax/microcode-m12206a7_00000029.h
deleted file mode 100644
index 6b80209..0000000
--- a/cpu/intel/model_206ax/microcode-m12206a7_00000029.h
+++ /dev/null
@@ -1,675 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m12206a7_00000029.inc  */
-0x00000001,	0x00000029,	0x06122013,	0x000206a7,
-0xc9c91df0,	0x00000001,	0x00000012,	0x000027d0,
-0x00002800,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x00000029,
-0x00000000,	0x00000000,	0x20130611,	0x000009d1,
-0x00000001,	0x000206a7,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000009d1,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x682f2afd,	0xbb7eac82,	0x286391a4,	0x1bb88074,
-0x77a729d3,	0x39037525,	0x9b7a8f9a,	0xb89cdaf1,
-0x1a7bbeb1,	0x355a1d62,	0x2e7eb594,	0x09f8dea9,
-0x432a49e4,	0xbf520253,	0xdafa4010,	0x893a858a,
-0x766e0efb,	0xd91e196d,	0x838bd2ef,	0xe5146494,
-0xd515f413,	0x29704828,	0xe85598b6,	0xdcbe6c51,
-0x88eabbfa,	0xa1e8909f,	0xd8931721,	0x35386554,
-0x089a78a7,	0xd9914775,	0xd4644748,	0x1556a4dc,
-0xf44448f6,	0xd054d7db,	0xf30f2b7d,	0x5ae223d0,
-0xcbbb48b0,	0x5c8b0383,	0x177de157,	0x9c1e5f73,
-0x2ec28289,	0xd72a7b6c,	0x823b6eb2,	0x35e02171,
-0xba8deae4,	0x06f4d468,	0x13dbafaa,	0x72b419f1,
-0x033385b5,	0x05806920,	0x4c6034cf,	0x9bd117dc,
-0x976e2d04,	0x250330f0,	0x7250b5e1,	0x184980c2,
-0x12a9d7d6,	0x1bc808f9,	0xae79994f,	0xc6f87901,
-0xc0e3132f,	0x671491c5,	0x236cad39,	0x37889d9c,
-0x67f7c3f3,	0x964a6be5,	0xbcced7da,	0x57eeaa6e,
-0x7bca1522,	0x654fee4c,	0x2a1ca5d9,	0xa1803cf3,
-0x00000011,	0xda8b460b,	0xcbc7570b,	0x4bad5f88,
-0x7a30378a,	0x5b7dcc68,	0x555b39b6,	0xb8263658,
-0x8de9ef21,	0x42cc16a5,	0xb178b9f5,	0x118a5d58,
-0xe42e5fdd,	0xebc7b117,	0xea05f0b6,	0xc66acc9e,
-0xb2f1c082,	0xfb14a125,	0x966208a6,	0xf475da93,
-0x88ff9506,	0x65dd13d4,	0x9e60f7cc,	0xa88a71b7,
-0xdd064433,	0x3f25de28,	0x83ca43fb,	0x564667a4,
-0x5fe09273,	0x622c069b,	0x92185717,	0xbf1c81b5,
-0x6b66649d,	0x00151ca0,	0x18e49358,	0xd16eba07,
-0xd8edeb0e,	0xbf529a29,	0x9161dbdf,	0x266b844e,
-0x31748b29,	0x79446f57,	0x047e31f5,	0x452749c9,
-0xe3427c16,	0x05d70c0c,	0xe56c7582,	0x60a81be8,
-0x7c356c53,	0xfa3374c2,	0x8f07c841,	0xd079f71f,
-0x6dd7dd73,	0x6cc606e6,	0xbf45ade0,	0x10c3bdfe,
-0x36a82acb,	0x793a9039,	0xc15d3de5,	0xffa1b60c,
-0x081d09e6,	0xd86129cb,	0xff8789d3,	0xfd24d62b,
-0x4a484efb,	0xbbef608c,	0xb588d00e,	0x042b145a,
-0xb1ba37a7,	0xa229da44,	0xb1ec46c0,	0xdcefcce7,
-0x2d5d8981,	0xa86f2641,	0x5ee2a552,	0x33c1eacf,
-0x37072b25,	0xc8b654ec,	0xf6ebc9e1,	0x1a0c1825,
-0xe2b965ea,	0x96da9a5e,	0x079e5508,	0xcece4f41,
-0xf72749db,	0x6d1029a2,	0x73b27d6a,	0x01a9c68a,
-0x4d7ea800,	0x2a1efd14,	0x87faa563,	0xc523a25c,
-0xc180c9c0,	0xef47c442,	0x8741275b,	0x7962bd75,
-0xe2da44db,	0xf16a8560,	0x5faf7c77,	0x0a818e29,
-0x18f4f493,	0x3fdf1d9e,	0x4690586f,	0x9c14ea18,
-0xb0e45c4a,	0x85b29d52,	0x59de2d3c,	0x510e681d,
-0x19d8623a,	0xd2014cdf,	0x068f2a43,	0x4370a370,
-0xaf4b0d4a,	0xbe95330d,	0x1f39e0fc,	0xc2aa2852,
-0x0eb0d99d,	0x93f34961,	0x851dee6f,	0xcb28361d,
-0xde767010,	0x40e99fd9,	0xc2ee27a2,	0x19817dc9,
-0xb2a82fcf,	0x93ac1d82,	0xf2758851,	0x471d8dd1,
-0xcbfd273e,	0x983f8247,	0x1e2cd420,	0x2b81589a,
-0x357498e0,	0x2ff12614,	0x27f6d661,	0x15d4585c,
-0xde80cae5,	0x26e5119e,	0x940fccbc,	0x4dec9cb4,
-0x7c947f35,	0xf2e2f0be,	0x96259b5b,	0xf77fc8dd,
-0xf805275f,	0xe72b5fa2,	0x65a145bb,	0xd5f69ee4,
-0x0a256ee7,	0x7d4c5875,	0x7bda0079,	0x60330eee,
-0x0c748869,	0x4469a54a,	0x8353482d,	0xd5f545ef,
-0xf7b0f40d,	0x82911948,	0x1cc2335b,	0xc183248f,
-0x506cae8a,	0xcb6c40af,	0xda2b52b7,	0xde64fbea,
-0xd71f9b9a,	0x346cb43a,	0x25f0c50e,	0x6896bce5,
-0x788e10db,	0xc82a15d6,	0x93ec82c3,	0x6525bc5a,
-0x3060254f,	0xb56e6f85,	0x96dc89b5,	0x4209e83d,
-0x050ad249,	0x1bc23a8e,	0xc7ec6202,	0x89ce1b5f,
-0x8c1950ec,	0x78b01501,	0xe3947df6,	0x2b68c31c,
-0xb04a2dfb,	0x52e26c4d,	0xe9ac7a1d,	0x5792e9f7,
-0x855e23c1,	0x72ee2981,	0x13bbcfb6,	0xb51a856b,
-0xd1330643,	0xe933ede9,	0x2aa485fe,	0x0a3c58b4,
-0x5e5fa635,	0x81bcb05f,	0x40b46de1,	0xf22c027d,
-0x2029838f,	0xd49aed20,	0x8bce4a6a,	0x6958c8f4,
-0x7bd57df1,	0xd5e07a27,	0x509cf5b5,	0xa599d035,
-0xae55e99c,	0x000020cb,	0x7340dcce,	0xb2a82b2a,
-0x3934b5a1,	0x75d7ce46,	0x04960659,	0xd8f58864,
-0x55afc02b,	0xa2783164,	0xe32bf636,	0xa1f00626,
-0x8acf5730,	0x3d4a8fc2,	0x20808e70,	0x9acffcb3,
-0xa79fb729,	0x932d6235,	0x680eeb85,	0x593bfa80,
-0x0f343f14,	0x6671e120,	0x5de59f16,	0x55368f69,
-0x5bb4c80b,	0x6caf3ade,	0x667259bd,	0x01545075,
-0x5d09d044,	0x46f3004c,	0xc6f29efb,	0x96ef70ee,
-0x217680ae,	0x9074befb,	0x3e280a9c,	0x8d05a801,
-0x6835e51b,	0xa8c88d0b,	0x45b7af45,	0x58ffe13e,
-0x4ee172e7,	0x29e7a43c,	0x51e77369,	0x4e244f76,
-0x21168dca,	0x5cb14f6c,	0x6d2e97ae,	0xd3c6263d,
-0x50f4a85c,	0x5cd62863,	0x8cd87c2e,	0xc1dcdd87,
-0xc6efbdcb,	0xccc0b81a,	0x3a501ed2,	0x271dc120,
-0x1ddc0a2f,	0xd24042c2,	0x69a03ac7,	0x3ec5af99,
-0x407eb2ca,	0xcb7c10be,	0xaef0d58a,	0x88c12490,
-0x9db32be0,	0x094378db,	0x54cb1af9,	0x5db7154d,
-0x37c239d3,	0x1966553b,	0xf6919ff6,	0xd4cf6fca,
-0x71f4ddb5,	0x0e499806,	0x305c85b0,	0x134bb3e2,
-0x4892973c,	0x594a48c0,	0x4f9fcfb4,	0xacf27579,
-0xd3592260,	0x244c3689,	0x1399f237,	0xa0884c0b,
-0x63b6f023,	0xd2139c30,	0x2cd1a380,	0x876e864c,
-0xc0297eea,	0x6edb33bc,	0x84f53a3c,	0xe70dda63,
-0x5fbfc69b,	0x6982943b,	0x9bb0414d,	0x20dd2457,
-0x8b61164e,	0x1f781759,	0x62c7de4b,	0xfdc32c56,
-0x929de550,	0x05eaedb3,	0x68aacea6,	0x3d47af60,
-0xca9aa978,	0x13a30bd6,	0x2c9902e5,	0xbac2250c,
-0xd4eb6e47,	0x5839e2e7,	0x5727acc4,	0xec95660d,
-0xf0b46476,	0xa5d07eb8,	0x2a3bf2dc,	0x0288d376,
-0x84926921,	0x7c0eb887,	0x454fe3f0,	0xc84bb84b,
-0x4a741603,	0xd40ede26,	0xe3f55fb2,	0xb15b4431,
-0x875bccac,	0x6a971b27,	0x3b66f5cd,	0x71d242e1,
-0x3983f21a,	0xa44c307d,	0x4362ee11,	0xc3fb70df,
-0x258fd8b8,	0x26962d4c,	0x772cb78e,	0x1718eece,
-0xf7351b4e,	0x671f266c,	0x01282aa3,	0xafe2ac67,
-0xc1f8877c,	0x05256fca,	0xdc692298,	0xa9807013,
-0x8aa70fe4,	0x6aa69738,	0xf70f5ddc,	0x446e0158,
-0x88c9bc21,	0x15dfa4f2,	0xd421b09f,	0x82e859ca,
-0x8ed07336,	0x00d5f57c,	0xdfb91ad4,	0x584a7bc1,
-0xa35ab82c,	0x27341001,	0x5bac8f5a,	0xb256c87a,
-0x632553b1,	0x18b5941b,	0xfa3beaad,	0xa9097159,
-0x08f68df2,	0xbf64bfc2,	0x53bb17f5,	0xadd5b761,
-0x9d8ea3a4,	0x97c5fda9,	0xf1f290f9,	0x40664600,
-0xa706cdce,	0xd309ef5e,	0xae087ab6,	0xa0d880d7,
-0x711a6407,	0xb9f7c99d,	0x445a0b5f,	0x0fe4df94,
-0x7ccfb06d,	0x112de73f,	0xa33e44b2,	0x36f351e0,
-0xa4a6c84e,	0x30142011,	0x282b4eb4,	0xb018d05b,
-0xbfa24b44,	0xeb3130a6,	0x26987f14,	0xc16ac53f,
-0xd35aa7d3,	0x1518f7c3,	0x2bd70b34,	0x8d485a3e,
-0x05fbd80c,	0x34157917,	0x1c32e768,	0x01c78914,
-0x712d9fa3,	0xf9d9bb7c,	0x65a3cb42,	0x9a7d4f02,
-0xa12def29,	0xe6c4b91e,	0x8549b2c8,	0x2c41339c,
-0x3d00d35f,	0xb993077f,	0xf46e7b49,	0xf248f63a,
-0xdba1f422,	0xc70085ac,	0x9a851a3b,	0x781c9257,
-0x2ed8efb0,	0x2d45608e,	0x5fd86ed8,	0xd173aec1,
-0xdd833d63,	0xf6e7be7d,	0x9055ef46,	0x502d7f02,
-0xf1bc813c,	0x0d94a337,	0x8f0a2dc9,	0x2dd00c27,
-0x1c9dedae,	0xcd6bd7b6,	0x51f227da,	0x83a62516,
-0x2d30d1f2,	0x0ebc953f,	0xe0364bdb,	0x6e1efe96,
-0x54cacb1d,	0x6748d457,	0x62daaa14,	0x44540ff2,
-0x0e56cf9c,	0xaf78d1b8,	0x8ee5ff9a,	0x41d73b8e,
-0xe929ff7d,	0xe598193c,	0xdfe10999,	0x0fd5bb1b,
-0xdb4fa1fd,	0x5eb66fb6,	0xf3d546e6,	0x9117f471,
-0x120ca5bc,	0xa2d2c657,	0x0f755c8f,	0x0173f848,
-0xacac0391,	0x415c18ef,	0x2495be6d,	0x160c043c,
-0xacc21d21,	0xbb2519a6,	0x1ab4bf20,	0x773e2598,
-0xb8a35e4d,	0x6d1bb1c2,	0x0421077f,	0x48043458,
-0x90306e59,	0x154d4872,	0x6bd1e5f5,	0xcafab9c1,
-0xdb6f785c,	0x0975d9dc,	0xa91ad273,	0xaec7902a,
-0xb1d06e39,	0xda633ea2,	0x1bcb20ea,	0x9b35bbb2,
-0xf56fdfb5,	0xb470c4db,	0x978dfda6,	0xd0f65894,
-0x66484397,	0xc421952c,	0xd26a1fc5,	0xb5b33fa3,
-0xd71569b2,	0xda63f33e,	0xc7f5f99f,	0x606e23fa,
-0x9d872ba1,	0x3bbd982f,	0xa82c2895,	0x1305f964,
-0x62293dc0,	0xf8823bb1,	0x41ebc2fd,	0x3bcf9dc3,
-0xaf09a495,	0x7e6ebaba,	0x4385020d,	0x6b42b9c5,
-0x7b72f535,	0x8c9f3b8f,	0xd8857b6e,	0x2e9bfa2c,
-0xcb17712a,	0xe53f1fa4,	0x18ff17be,	0xe48b4a0f,
-0x3a00b920,	0xff04ceeb,	0xd676f2d6,	0x076dc69f,
-0x5002f483,	0xfeaf0e56,	0xdd2dbe92,	0x3ef80fdb,
-0x05064f42,	0xa476cfb3,	0xc5257716,	0xe213b5e3,
-0x721a1ac3,	0xa461719f,	0xd17d7025,	0x912a5fdb,
-0xaf06db85,	0xf63b4478,	0x7d8ebdeb,	0xfee50979,
-0xa6378261,	0x0ca7dee6,	0xc29932cd,	0x0ad43677,
-0x94da4c04,	0x0e19ec6c,	0x832565b9,	0x016c9451,
-0x0372a6cb,	0x1d0fae0d,	0x0dff0d6d,	0xf76b7585,
-0x8ae0b91d,	0x44799788,	0x602c25a6,	0x071aff06,
-0x9f318d1b,	0xeb104f88,	0xeb7febbd,	0xb91b68e1,
-0xfccef0b5,	0x4d535953,	0xf97ce86d,	0x2787a794,
-0x5775c115,	0xdf768839,	0x58f2852f,	0x4b4d28a0,
-0x57ca7948,	0x4478abb5,	0xe8fd02b4,	0x53cb20d5,
-0x6513608a,	0x10b55388,	0xf638051e,	0x99f83501,
-0xba7b8ca7,	0xcc8c3ca3,	0x00daf06c,	0x5767f9a5,
-0x73437194,	0xd23e4179,	0xcdb9c727,	0x532117da,
-0x1be9eeee,	0x37849d95,	0xdafc0e66,	0x4ab96a2a,
-0x5fd61389,	0x50632424,	0xb55ac8f6,	0xf796b6f6,
-0xc84058d7,	0x35746b04,	0xfc7454b5,	0xb0bad8d8,
-0xe0795e26,	0xb330d00d,	0x2c186a82,	0x1b12f138,
-0xcbb533eb,	0x5b83cae3,	0x610785e8,	0x7a5d9525,
-0xb47f6bbb,	0x0fca02bc,	0x1fbd031b,	0xd6591add,
-0x0bf1485d,	0x8856e335,	0x4ad31114,	0x64c63161,
-0x77b2b8c1,	0xd3afc81b,	0x090c6f88,	0x17b5b6c1,
-0xcb9eec74,	0xa5432dee,	0x2a120fbc,	0x881c91d1,
-0x2e9be3c7,	0xb0390ca6,	0x7ece2f94,	0xb6a2c2c8,
-0xc28c9751,	0xd29e8dad,	0x3d0c2bcc,	0xf7f0aff6,
-0x0a92b3bf,	0x9ca75ad2,	0x447dd867,	0x60df12f6,
-0x9fbe6df0,	0xda61abd4,	0x1b6b6cd9,	0xb7b49ab3,
-0x0da96833,	0x81bdc839,	0xad5ebaf4,	0xad56e66f,
-0xdc46b993,	0x9e218121,	0x5d80987b,	0xfdf35a67,
-0x89027659,	0x03484b93,	0x7df28941,	0xfda50395,
-0x76a0aa42,	0x24d04b6b,	0xe926c886,	0xf40f37e0,
-0x80f9fd1b,	0x97f787c4,	0x3b4c75d4,	0xe8b29810,
-0x1c3a7505,	0xe3ed3338,	0xec65105f,	0x2e56cb40,
-0x18c44f8d,	0xd2902239,	0x292e2d62,	0x461fdf55,
-0x3e89e04a,	0xa9f8dd24,	0xdc642a30,	0x04753fc9,
-0x74168ede,	0xcdcb3a03,	0x642a73c9,	0xa37d7a6f,
-0x3ac4b772,	0x6a0e11b5,	0x195c8600,	0xf7005eaf,
-0x5db5800a,	0x0c8c636e,	0x02d67137,	0xe75aa9b4,
-0xff3cba01,	0xeb50e342,	0x97d8b1ed,	0xffcff082,
-0x5590e798,	0x2ec60c6b,	0x5b73e18c,	0x95536462,
-0x08c29fd9,	0x6630ee86,	0x5837f1c8,	0x82d57823,
-0x18c241ad,	0x874b95c3,	0x9aabac47,	0x27621269,
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-0x7c6d913b,	0x9f310356,	0x23750029,	0x1cdcc7c9,
-0x2e21f7d1,	0x3219ac22,	0x5a9ac305,	0xce8150d5,
-0x96e99a58,	0xbefc98a9,	0x1255dfd8,	0x017a7def,

cpu/intel/model_206ax/microcode.bin

diff --git a/cpu/intel/model_206ax/microcode.bin b/cpu/intel/model_206ax/microcode.bin
new file mode 100644
index 0000000..b4a1131
--- /dev/null
+++ b/cpu/intel/model_206ax/microcode.bin
Binary files differ

cpu/intel/model_206ax/microcode.h

diff --git a/cpu/intel/model_206ax/microcode.h b/cpu/intel/model_206ax/microcode.h
deleted file mode 100644
index 95f8a0a..0000000
--- a/cpu/intel/model_206ax/microcode.h
+++ /dev/null
@@ -1,2 +0,0 @@
-
-#include "microcode-m12206a7_00000029.h"

cpu/intel/model_306ax/microcode-m12306a9_0000001b.h

diff --git a/cpu/intel/model_306ax/microcode-m12306a9_0000001b.h b/cpu/intel/model_306ax/microcode-m12306a9_0000001b.h
deleted file mode 100644
index 5eaa097..0000000
--- a/cpu/intel/model_306ax/microcode-m12306a9_0000001b.h
+++ /dev/null
@@ -1,803 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m12306a9_0000001b.inc  */
-0x00000001,	0x0000001b,	0x05292014,	0x000306a9,
-0x579ae07a,	0x00000001,	0x00000012,	0x00002fd0,
-0x00003000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x0000001b,
-0x00000000,	0x00000000,	0x20140516,	0x00000b61,
-0x00000001,	0x000306a9,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xd83ab1c2,	0xea4fe76c,	0x12ad64d3,	0x694a40f6,
-0xe44190c8,	0xf6a27f21,	0x3fe4f66f,	0xebe4cd79,
-0x5a3401db,	0x42caecce,	0xb4d8e75e,	0xe6dbaf24,
-0x7861b35f,	0x6bd717bc,	0x23b9b731,	0x82ec1ac8,
-0x20337b64,	0x5396dbf1,	0x59973bff,	0x724bc7e9,
-0x5237193b,	0x0b8647c1,	0x6a0d0e16,	0xbf9ddb5b,
-0xace2cc1c,	0xad707638,	0x056f102f,	0xa37e60f8,
-0x76255642,	0xfb86e030,	0xb8069a40,	0x367795f1,
-0x653fb05e,	0xab7f14ad,	0xb6e8a8e1,	0xd2598d20,
-0x2eba3f68,	0x78b372f1,	0xba8d13f8,	0x1f1de861,
-0x97f951d5,	0x8097c728,	0x27dbf904,	0xb97906a8,
-0xffe7a4ac,	0x4b947668,	0xc1dbd726,	0x2adcf777,
-0x63b1bcf0,	0x818e2a1b,	0x49aa907b,	0x2faf5e8d,
-0xae842352,	0x82707fae,	0x0aa12b41,	0xa0bae11c,
-0xb4298c47,	0xd2b4099c,	0x4ff625f2,	0xcd2630d4,
-0x79850981,	0x05dbf57d,	0xb05b81a5,	0x56e73ec7,
-0x95cb3897,	0xe262bda5,	0xb2c6e288,	0xcb7f8e77,
-0x72b8bdd3,	0x3f400494,	0x63ade65b,	0xbc4adc71,
-0x00000011,	0x9c0950d3,	0x96092d24,	0xf8df4d1a,
-0x3bf0f1d7,	0xb80e5977,	0x79adc345,	0x234d713b,
-0x22a35ba8,	0x5a1c8531,	0xcee00f54,	0xd62b6938,
-0x7b92d9e3,	0xb52834b3,	0xd2c80acf,	0x046664d3,
-0xc7ad88ca,	0xc841fc8a,	0xb3321472,	0x5494d18f,
-0x0d4e3426,	0x286ccf3a,	0x218ca1bd,	0xac526d52,
-0x157ed3f8,	0x375e3009,	0x717890f6,	0x21cc56db,
-0xcccc0268,	0xa3c89366,	0x32be4d0f,	0x0341920d,
-0xa74292ee,	0x137a865f,	0x46a2652f,	0x05ad356b,
-0xa17dfb39,	0xd8b79cd6,	0x24948645,	0x66b46847,
-0x65e3ace3,	0x7cea5ea8,	0xd93999a5,	0xb92fe32a,
-0x59150ba2,	0xd3f36588,	0x23e002be,	0x5b579941,
-0x9a08430c,	0x87b2570d,	0xad4475d3,	0xb47345cd,
-0x85746ba9,	0x5972b605,	0xca147411,	0x7745a22b,
-0x4db19d43,	0x33582cf8,	0x0698ec54,	0x062328f8,
-0xcfd3e71d,	0xc26da7f7,	0x607f89cd,	0xcddeb10b,
-0xb0ef58ae,	0xaf073c74,	0xb5ffad48,	0xe7602226,
-0x71a09faa,	0xc0f79e9a,	0xeb61e898,	0x7188a414,
-0x92324c0b,	0x201885ad,	0x5cf4f7e0,	0xc56613d7,
-0x012f3ac6,	0xc6232fd0,	0xb35e6449,	0x48fe6523,
-0x1f7f8144,	0x8ee66e57,	0x34616b39,	0x5748fcd9,
-0x6813779a,	0x93265fda,	0xc20ed36a,	0x7181d0c8,
-0x42cd0be4,	0xa89122f8,	0xb1a89430,	0xa3ffedd3,
-0xe6b55f5d,	0x7e2a8093,	0x76f30fdf,	0xe6eaeb09,
-0x90160935,	0x68ec38e9,	0x5b0603d2,	0x72812ecf,
-0x272b2885,	0x4db69fe5,	0x81d92a4b,	0x75de5deb,
-0x26ac7ec0,	0x9e968ca7,	0x845d1674,	0xc8cfc461,
-0xf3520474,	0x5e43f6e5,	0x57e112b7,	0x5d2149ac,
-0x1be6e55b,	0x946af409,	0x8dd45cde,	0x116bede3,
-0xde73812e,	0x9b75b6ab,	0x7ec4ff46,	0x0746d80c,
-0x6dc24660,	0x16613519,	0x8e09dae1,	0x9fbe1b8e,
-0x206c8d5c,	0x55fe7ca1,	0x911f1a10,	0x70ef4ad6,
-0x347b2eef,	0xc48d42bb,	0x3d2a25f2,	0xc0f6b38a,
-0xefb41d16,	0x9c4fbffd,	0x199fbfb5,	0xb5a84e41,
-0x2254dbc3,	0xf23439fc,	0x53825a63,	0x8c0b2686,
-0x9ae5c0a4,	0xcd245da4,	0x59da254a,	0xe18b567a,
-0x7e58e34a,	0xe8a377bc,	0x57367270,	0xafabbc9a,
-0x4e5da9e0,	0x229f5125,	0x40d3e13e,	0xa82cdc2d,
-0xc320ae04,	0xc1f743c1,	0xd6e4794a,	0x647b3719,
-0xf5d3b02a,	0x6d9ff1d3,	0x0e88dcc8,	0xb6da77f5,
-0x46acb669,	0x3bafd437,	0x85bc9909,	0xf5bb9f3d,
-0xc97a38b9,	0x4f8248c1,	0xf7f5114d,	0x4b59f41f,
-0xb7b5be59,	0x524f4729,	0xb9b2e668,	0x6e96604b,
-0x36a7405e,	0xf25effde,	0xc1bb23e6,	0x21704050,
-0xec34ec34,	0x573d1b13,	0x97da8b62,	0x102b1558,
-0x100483dd,	0x69e453f9,	0x258d4cea,	0xa07b9dd7,
-0xf4a44d7a,	0x41687d88,	0x1fe4f17f,	0xddc5ffde,
-0x26cb5483,	0x6f7133b1,	0xaade73ae,	0x0b202e29,
-0xf900949a,	0xc3215d7a,	0x99470d59,	0xa3b43313,
-0x3fbe2b78,	0x2ccb4f31,	0xca1c5a47,	0x7f7cd04c,
-0xfea5697a,	0x2aa5f5ae,	0xf357990e,	0x6b6fd8f7,
-0x0b3d98d0,	0xb948fddf,	0x9c1eeabe,	0x7a4cde19,
-0x95764846,	0xe5e41957,	0xac39ab6d,	0xbbf26b85,
-0x394364c0,	0xee920ee6,	0xe5b528c3,	0xe9310c2d,
-0xf4f173eb,	0x4872577b,	0xba591136,	0x2b00f7d0,
-0xae16a85f,	0x8ce7ac11,	0xdae062ab,	0x1a8924c9,
-0xe700581d,	0x4ae0904f,	0x9b4c3721,	0x640e35a3,
-0x01199ccb,	0x3d0b35cc,	0x32593e5c,	0x1d26c63c,
-0xcc4ab5c3,	0x00f29c84,	0xd1fa2514,	0xd979a4b3,
-0xa8fd4dfd,	0x33319762,	0x368752dd,	0x0e2ee6d7,
-0xd6e12169,	0xf0d7417e,	0x867b3974,	0x9a0739f7,
-0x1b2df84f,	0xdcfcb638,	0xbb360eb2,	0x7d9bef0c,
-0xf3fd37a7,	0x1aef181d,	0xa1ddc5c2,	0xe7c516db,
-0x2a9ba9bf,	0x102c3ff8,	0x83813c88,	0x4d0110ad,
-0x21639fcf,	0x9c070c5e,	0x293ddd3d,	0xe0256330,
-0x05ffdaeb,	0xbe4187a8,	0x20bf1f18,	0x1c3a8aa5,
-0x65717c1f,	0x41515f7f,	0x506e5712,	0x7629b29d,
-0x04e2fbd1,	0x5a02a26c,	0x0950c110,	0xfa490692,
-0x35302df4,	0x73bcef79,	0x6cde2bad,	0xab17e3b4,
-0xbe58731f,	0x0f857d44,	0xeed1b29b,	0xa3ce4535,
-0xbcf6ef78,	0x1fe586aa,	0xa5ad8363,	0x059d960c,
-0xe620d7ad,	0x047ef792,	0x4de258da,	0x23d31b40,
-0xfd90c0da,	0xb272c39d,	0x56697286,	0xe7fd08c5,
-0xf11cec20,	0x6ab6fd29,	0xb2e3f7a3,	0xac58fa5f,
-0x06013c65,	0x2610d0f0,	0xa1fffe55,	0xb6991366,
-0x8d99235b,	0x59d1ad91,	0x027f91bf,	0xee6fef87,
-0x53d6c464,	0x8ff4adbf,	0xcdebf323,	0x30908667,
-0xaeb7903b,	0xa4c2ef19,	0x356a5926,	0xf9fca5aa,
-0x14fd145a,	0x9f9cebeb,	0x25462272,	0x09002c3a,
-0xaf095abe,	0x747bad5a,	0x1a26927d,	0xbb22d78b,
-0x8884f4ff,	0x91b97903,	0xf8da0c75,	0x67ecd383,
-0x1521582f,	0x32a1ecfd,	0xf9179888,	0xb5cbcc2b,
-0xa47b1058,	0x6c017eb5,	0x805cc4bb,	0x9f43145f,
-0x3cc7716e,	0x3fe9185e,	0xca7fc043,	0x66bc496d,
-0x88a74166,	0xcc484f23,	0x2c22189e,	0x66a5ef86,
-0x9cd30a45,	0x12f13ebc,	0x7cd1e798,	0x9e653453,
-0x9ccb1999,	0xc5f0b49f,	0x9308a92e,	0xa65304c7,
-0x86c43ce8,	0x84a84d45,	0x1105ba4c,	0xaaf283fb,
-0x27ecf70c,	0xbb41ef20,	0x0e5d3508,	0xdc982773,
-0x37d38916,	0x5b95bf61,	0x793f0da1,	0x6a9cfe05,
-0x76c7bb1c,	0x2603e042,	0xf40925f9,	0xe88b4871,
-0x26da923d,	0x18cf9a83,	0x8157ae6d,	0x85cccfee,
-0x720f3cc6,	0x87f879cd,	0xc5d47d67,	0x9a777c16,
-0x5db45933,	0xf674f948,	0xdbeb7dbd,	0x35597dd5,
-0x32b1be41,	0x73e27415,	0xb48f7a41,	0x859dca46,
-0x34349f85,	0x5e67d17c,	0xb2e8b41f,	0x5be45dc5,
-0xa5afe84b,	0x60123c19,	0x905522d4,	0x88b95f25,
-0xeeca63de,	0x668c1096,	0x8ab4c2ac,	0xd29229ad,
-0xadf44cdd,	0x46526f0f,	0x7dd720af,	0x1f1dc8f1,
-0xac7bb50d,	0x68c139bb,	0xa14489b7,	0x1457a54e,
-0xbe37b50b,	0x81ab2458,	0xfe4593db,	0xd40606ab,
-0xc2b9a812,	0x301c0090,	0x7e19c712,	0x66ae3c60,
-0x476bcbe2,	0xba940fab,	0xbd1f0928,	0x2d119db7,
-0xb4693ac5,	0xbdc3e87d,	0x0f88ee4a,	0x99d35d5a,
-0xe4050185,	0x14876d36,	0x1b97a74d,	0x3f01a0c3,
-0x1e46c2fb,	0x324a9565,	0x8e348f4c,	0x5400df3d,
-0x5a7215c6,	0x67e12130,	0x0cec884a,	0xb1449cd6,
-0xb1d21cb2,	0x8665e108,	0x122df090,	0xf3ff4a55,
-0x727d0665,	0x6a0d318c,	0x0db42ad6,	0x33da3b44,
-0xc1c5eab6,	0x1e46cdd0,	0x230f20af,	0x8e1bfd41,
-0x664ae784,	0x4abcb015,	0x4e1afb13,	0x39f16bb3,
-0x1c0caaee,	0xab6f1da9,	0x5998c964,	0xaed549c0,
-0x4f1c9238,	0x69f2b292,	0xd77f865c,	0x624dbd41,
-0x4c9a0070,	0x9778a385,	0x8eaf28e2,	0x1ef3f49e,
-0x42bb1b89,	0x91f2093c,	0x2593c232,	0x6ceef988,
-0x38bca081,	0x8918f3fe,	0x793f2e8d,	0xf705e4c5,
-0x27418eb7,	0x92f3613d,	0x59d22734,	0x62b60b9f,
-0x44fb6ffe,	0xc2e8e157,	0x64d1abd4,	0x149944d0,
-0x60fed55b,	0xa5013687,	0x28ae070b,	0x93c8aaf4,
-0xf5f9c8b9,	0xed14a5e3,	0xc293a19d,	0xa0eceb55,
-0xbdf9d8a9,	0xc7dc370a,	0x159f1d3f,	0xd845c60b,
-0x5a0808b8,	0x4e0f9bc7,	0xfcea8602,	0x567ac8ef,
-0xb85a22f1,	0x9c6aac58,	0x3cea2792,	0x0fedde82,
-0xdb8e0fff,	0xb6a1293c,	0xae7d776d,	0xd2e7eebe,
-0x57a1dc0b,	0x8dd1d9f8,	0x65a2fd52,	0x10a30d63,
-0x860e664f,	0xc05f981c,	0x93c9f168,	0xbf63aef4,
-0x3e37c53e,	0x890fa1f6,	0x61bd192b,	0xb404ab8a,
-0x36336575,	0x9f68e64b,	0x121863c2,	0xf486d3c6,
-0x8a26a693,	0xad51584e,	0xdd7fb4c2,	0x26d2cb5a,
-0x5ff2aad2,	0x1c0883be,	0x2eb37ee5,	0x3cbcde00,
-0xbe7d8dcd,	0x9479f67c,	0x79c717ba,	0x2995c134,
-0x319af25c,	0x8e7d0be1,	0x9668117b,	0x15de02f7,
-0xcde8e26e,	0xd0123a2f,	0x66462a0e,	0xe73313bc,
-0x7f3c652b,	0xa582e236,	0x4a54a00c,	0x48b15522,
-0x5b3d415e,	0x4785c80f,	0x3f07e381,	0x7665efbc,
-0x939eb212,	0x85ef3b23,	0xed9017d4,	0x15bf4d4f,
-0xd6a3de20,	0x0465f825,	0xfb7731b1,	0xbb6f62ee,
-0xe329752f,	0x8f575761,	0xf668e0ee,	0x09597cc9,
-0xcb283c05,	0x470d546f,	0x99b52b69,	0x3d240470,
-0xcd20561c,	0x4937a50c,	0x4b6a7d9d,	0xf704e5b8,
-0x328f13dd,	0x25d52f4d,	0xb1046967,	0x1104b967,
-0xe4ed7767,	0x2fe0fbc1,	0xfe61ebd7,	0x09f9621c,
-0x29dbcf91,	0x728d3a29,	0xdce47544,	0x5f959dba,
-0x0bcb1354,	0xf7942695,	0xe3ed8e3b,	0xccf6f133,
-0x4a60c261,	0x03844f24,	0xa5162386,	0xfc87032e,
-0x99c6b3b3,	0x0b5b8f41,	0xbb9aa489,	0x2053326c,
-0xc0f052a9,	0xcd4c4572,	0x962d27aa,	0xd4805ef0,
-0x3ab0ce1d,	0x12d300db,	0xa4cccb96,	0xf7317cc8,
-0x2274b196,	0x7d2ca1db,	0x17c7aaed,	0x89dab199,
-0x7ee0f348,	0x8830ceba,	0x40779371,	0x85a554d7,
-0x10457831,	0x4c8ed036,	0x96238e4e,	0x66e51f08,
-0x2c09d20c,	0x812493ec,	0x021de1fa,	0x09863bcb,
-0xf25905e2,	0x460b33a2,	0x57c8ee2b,	0x40159186,
-0x95188e5e,	0xcff3424f,	0xdebe328e,	0x4c5f2878,
-0x107626af,	0x9160c89d,	0x999bdf6a,	0x24da91fc,
-0x6d3587c9,	0xf060f278,	0x96f7c69c,	0x13a06a1d,
-0xde22195f,	0xe865d054,	0xea3c7c8a,	0xf38d7613,
-0xb258884e,	0x8d5b2b71,	0xbec3640b,	0x6aef4538,
-0x42b877ff,	0xa597a483,	0xaf5af177,	0xf76dfccc,
-0x314d0820,	0x0ddecdaa,	0x46b45940,	0xa7b340b9,
-0x6f8da83f,	0x66ec6231,	0x7b76cc43,	0x16692a2a,
-0x2da0ded0,	0xa1119f5b,	0xa9c736ec,	0xceb67e6d,
-0x1afc0645,	0x2e363e1c,	0x990f2b9e,	0xa76b7e54,
-0xea69816b,	0x1a4089bd,	0x6aeaf52c,	0x49620e10,
-0xde40ef47,	0x330b3a06,	0x9994f4b1,	0x5de72630,
-0x1b956d3b,	0x9afd1262,	0x23aa7350,	0xb209d69b,
-0xbff70c76,	0x036d76e6,	0xac1d81ff,	0x69d061a4,
-0xb3740ef4,	0x773511ec,	0xe015cfa2,	0x0aa2436f,
-0x2123f543,	0xb86e8996,	0x29110c48,	0x4d0a1935,
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-0x3c598546,	0xa383aec4,	0xf02fa7ae,	0x080c3b40,
-0xaaa933e5,	0x76be46ed,	0xd0bc9043,	0x3f9f3a68,
-0xd35c8b33,	0x8996d57c,	0xec1ab12e,	0xfd1ce974,
-0xaa88e57a,	0x4ef9ad0e,	0x2fb4a630,	0x65f16519,
-0x4be56dd9,	0xbf5ac806,	0xb80abc1b,	0xd0ddf379,
-0x8dd51f87,	0x9dd68d49,	0x0edd9791,	0x4f3abb6c,
-0x012a1f8a,	0x47f79c0d,	0x5566e680,	0x252b0d77,
-0xebd37b56,	0x5a3c5859,	0xddedaf58,	0xe3d09692,
-0x2cf65acf,	0x784c8bf4,	0x7e656f74,	0x03b943e5,
-0x09386024,	0xeaeebcd1,	0x5049d016,	0x4b757c2a,
-0x99bba84e,	0x97cbae9d,	0xa9b94530,	0xd9843e4a,
-0x9fe78754,	0x575e14d6,	0x6f7fb1c3,	0xb68b4414,
-0xf529858e,	0xb9ac95f8,	0xf0c00566,	0xa90cd052,
-0xe9e3f6ab,	0x07e3368f,	0x4254a1a7,	0x01481455,
-0xb228b069,	0x12b9b38a,	0x0ef893b4,	0xfafdc92d,
-0xbf1f091b,	0x316bce1b,	0x4e41eb79,	0xa06ef8e5,
-0xbd7def39,	0xf0fa862f,	0x236936ec,	0xbec770e7,
-0x61aae474,	0xa09d3bef,	0xbed87bd7,	0xcbd313fd,
-0xc623804e,	0x0439993d,	0x00f7b2fc,	0x3b754ba1,
-0xc3c116de,	0x865a3c98,	0x615eba52,	0x44b0671d,
-0x2d309a0f,	0x53b6132f,	0x97bb9c76,	0xbd1c3eea,
-0x8c779157,	0xf1cf0f54,	0xf2536c5e,	0x0faccbc9,
-0xf0adce40,	0xd3138764,	0xda7a34b5,	0x790028fe,
-0x3f9f38b8,	0x6ae26b5a,	0x283d688e,	0x3a8e3e6a,
-0x7aacec97,	0xf148b670,	0x0ea2ece4,	0xb4d08c08,
-0x0504d3ba,	0x82e3770f,	0x65df3c67,	0xf0f18a43,
-0xea4e4f0b,	0xe934ccf0,	0x043c4a37,	0x7dd27043,
-0x4de8e1c3,	0xc2051214,	0x8d1e83fa,	0x0af1f232,
-0x66938977,	0x9075d0c9,	0x86226f9b,	0x036ac9ca,
-0x8b8022f8,	0xcd065626,	0x5d27efbe,	0x155b4173,
-0x0e25874c,	0x8a8c5af9,	0x66618ddc,	0x632e5268,
-0x14ccbeb9,	0xbe205f7b,	0xab8d153d,	0x16173ba7,
-0x15ac2c3b,	0x398949f0,	0xbf5306b6,	0x0efcfa33,
-0x5569413b,	0x50cadd3a,	0xcf21ab16,	0xb6bd8cd1,
-0x7bb8293b,	0x4b7efba6,	0x7f143466,	0x1e3b2844,
-0x26e70a43,	0x82ab07a9,	0x0667aa2b,	0x90231d62,
-0x59459415,	0x07c81625,	0x61eb1e7d,	0x214171e2,
-0x98398d28,	0xbb3c7147,	0x1e3ccea1,	0xddb6290c,
-0x1c132399,	0xfa9cd12d,	0xe5ecd083,	0x7b4c4778,
-0xf0e4de92,	0xf7b05cba,	0x411d0c78,	0x895ada50,
-0xbbce03e3,	0xbda2d5e8,	0xa969627d,	0xf18454b7,
-0x8681ee33,	0x57765b08,	0x63781c7b,	0xce431adb,
-0xf04b0c3d,	0x92122c30,	0x1622e481,	0x9d2c1fee,
-0xab512482,	0x6780fdce,	0x41dc3083,	0x42254914,
-0x4df538f0,	0xf9aba190,	0x777a06c3,	0x2ca4d940,
-0xc1857212,	0xff15ad80,	0xe25448af,	0xf47478a4,
-0x6097d52e,	0x6a2c2567,	0x380f83e2,	0x0cc05081,
-0xca1cf616,	0x15f83113,	0x172d832d,	0x10603c16,
-0x2f4e4669,	0x11049499,	0x5fe8e5bc,	0xf29ed343,
-0xdc24729b,	0x6d2b6528,	0x32761a33,	0x9e667f12,
-0xad34a044,	0xec2c5de9,	0xfbfe833d,	0xa2406dfa,
-0xf45b539b,	0xce1134c8,	0x5b6561d6,	0xd2d8bc64,
-0x70159ed9,	0x77d8c47d,	0x10b25697,	0x0ddc2376,
-0x3fd34d48,	0x04a2bce7,	0xc5fb6ea0,	0x3fc058a3,
-0x82b22c36,	0x046d0ee4,	0x5e9fab17,	0x091aa779,
-0xa9f14b80,	0x737dca6b,	0xffa40455,	0x756f94d3,
-0xd4b9b018,	0xcc9359d8,	0xa500d094,	0x0916da8d,
-0xf6b8af30,	0x3c9cc9b3,	0x9dd58676,	0xdb19b768,
-0xdb3e7bdc,	0x1260b7ed,	0x3bbaa0bf,	0x9d820b28,
-0xaaf1fc72,	0x3cf8d8e3,	0xcf578a08,	0x17621595,
-0x47eb0633,	0x54cf091d,	0x6f879113,	0xdeec155b,
-0xe10461b4,	0x93258f8d,	0xcc50ee90,	0xb2d4da78,
-0xeeda96fd,	0x955ef1db,	0xaa9f85fc,	0xa52244db,
-0xb6ea0ea0,	0xc6325252,	0x6856669b,	0x8b51708a,
-0xacf727bb,	0x96b066b0,	0xb64d7525,	0x48d7c7e8,
-0x61d3e8d4,	0x46d20d38,	0xe615df9b,	0x60c62368,
-0xe78f405d,	0x895a9ae5,	0x3b52b71e,	0x8e159749,
-0xd21462fa,	0x2550b303,	0x3cf3ef9a,	0xad8aa320,
-0xcd792f52,	0x9cf14141,	0xbdd28cc5,	0x37da16c8,
-0xd9f8c662,	0xf4a95ec1,	0x451f8d13,	0x03ef6cd3,
-0xd63b1888,	0x3690dee0,	0xfce8cbef,	0x26cebd5e,
-0x1bb0839e,	0x47675fd3,	0xf1512955,	0x66dd204e,
-0xb1029741,	0x7c6e4445,	0x6b61e57c,	0xa8e35261,
-0xe172d5ff,	0xb025ab4f,	0x803b5607,	0xe70e7298,
-0xbf296d17,	0x30d7cb21,	0x3144e7bd,	0xe2cca809,
-0x8e545ec1,	0x4b2ba9e6,	0x747ef114,	0x7b81f775,
-0xe8432159,	0x25bd3d11,	0x60717d5f,	0xe0b1d8bd,
-0xe545e06c,	0x2d7bb253,	0xa88a1c37,	0xe08bdaa4,
-0x4edff6f1,	0xc4ba1995,	0xcf69616d,	0x3f254678,
-0x955db9cc,	0x981ad16a,	0x1dd23b4a,	0x4cf48953,
-0x3aef077c,	0x57ca83b9,	0x0d297fcf,	0xf116c54e,
-0x701e71a7,	0xa9458d81,	0x4164db49,	0x2afc32d0,
-0xd3f47d65,	0x09687ee3,	0xda229a45,	0xa58adf41,
-0xa6082146,	0x277d1765,	0x9ffadf1d,	0x1b63a67f,
-0x4c417add,	0xd1f05163,	0x19a4381b,	0x8e9c526b,
-0xe4457716,	0x9758c3ca,	0x19f47b3d,	0x7ad69ed5,
-0xc9b28664,	0x90fce49a,	0x2089608f,	0xc03553d3,
-0xba3c118f,	0xa111cc0f,	0xbf0f18dc,	0x1993a957,
-0x5f18542c,	0xd0184c76,	0x11b1844f,	0x4010a130,
-0xaf2056d1,	0x45f16a49,	0xe22d3b26,	0xdd03f13f,
-0xac4d4838,	0xbca343f1,	0xe60d2cb6,	0x45c522b1,
-0x6604f172,	0x42847263,	0xc91701ee,	0x4bf10923,
-0xded5cd4c,	0x2d02ae37,	0x50f0e72e,	0xf69aaaf2,
-0x204a31cd,	0x41499586,	0x03532197,	0x87167ecd,
-0x7266ab1d,	0x0902921c,	0xae2d1041,	0xabc8218b,
-0x4bb0706f,	0x09b28829,	0x33f0e686,	0x1817b95e,
-0x403c5b92,	0x8802addc,	0x3183e90e,	0xeb6c09c3,
-0x4047a09f,	0x23fbe33c,	0xbd5cd790,	0x6817b2ea,
-0x0adba5ac,	0x7805441c,	0x28b72c76,	0x9f695a31,
-0x90642bcd,	0x67e2e311,	0xbc1b0da1,	0xd326ac23,
-0x68c2c7c0,	0xacf7ec37,	0xe56fde28,	0xe8e3b86f,
-0x31113d58,	0x2a817083,	0x585dfd3a,	0x6ea06945,
-0x6fd87af2,	0x31a6b60d,	0x2851dd9a,	0xfdc94817,
-0x573c6ec4,	0x3ef90d4c,	0x44c595c5,	0x7e7e7f39,
-0x86401f24,	0x1bd57e7d,	0x73740256,	0x10616a65,
-0x11800a97,	0xb5bec7f9,	0x5799cbc6,	0x616442b7,
-0x9dd8d362,	0xca489df9,	0x884a4d3e,	0x711b759f,
-0x050202fa,	0x374312a3,	0x69589359,	0x1483c598,
-0x85437cff,	0x65121969,	0xb9eb85af,	0xa2cd34e4,
-0x0e3eadb1,	0xe1321d22,	0xa0732d02,	0x06ce76d6,
-0x210c7fab,	0x44245c91,	0xa2abbdf5,	0x89e7e474,
-0x950dff11,	0xeb3fc558,	0x47b84ea5,	0xae82f99a,
-0x9615728d,	0xe40f5173,	0x19bde395,	0x59832fd8,
-0x5bdd9cc0,	0xa4577fc0,	0x5b60cebe,	0x5b3ca4a8,
-0x6debcb0a,	0xced85c3c,	0x0d0531b6,	0x21c958d5,
-0xc25450cb,	0x5262b0ef,	0xcce2d240,	0xffe6ff14,
-0xa9011076,	0xa5e764ad,	0xb41856b5,	0xfca1402a,
-0x406dbe2c,	0xc18fc12b,	0x92706e19,	0x9177133c,
-0x23eb99a7,	0xb9fe5611,	0xd17e5dd5,	0x15c34901,
-0x1f0877ae,	0x904672fe,	0xd72fed55,	0xd78cb104,
-0xf4831569,	0xde4fbeb1,	0xf71cae19,	0x0b145032,
-0xb2eeda35,	0x849a45c9,	0xe1192cea,	0xcbc9f857,
-0xa4075ee0,	0x63a377cc,	0x02d7af43,	0x62583048,
-0x9f454b6c,	0x7861ed66,	0x819fbe26,	0xe51ec4ea,
-0x6b2e5ebe,	0x68907f17,	0x486ce5ed,	0x11388b43,
-0xe47ebdd5,	0xa8d127c0,	0x25f7c0c1,	0xebd4d448,
-0xd528fa6f,	0xebc96abd,	0x1d7897d4,	0x54a1d324,
-0xc0b59b40,	0x76bf7980,	0xdc22a590,	0x3370bf19,
-0x6e9b521a,	0x4d7e20e5,	0xbcb7493d,	0x546dca3e,
-0xa68176a3,	0xe4629aaa,	0xe1a14ae5,	0x57711eb9,
-0x658fce8c,	0x2cd6bbbc,	0xb577a47f,	0x506bf444,
-0xcf3f2654,	0x5dbb9c52,	0x90e32389,	0xd7d67807,
-0x3f50c00c,	0xce74c302,	0x5c3e9cb8,	0x53b3b125,
-0x2dcb27b2,	0x98861044,	0xc268595e,	0x3286c482,
-0x09428f0b,	0x7918241a,	0xf1a6dc9e,	0xab51faa1,
-0xc6b06d20,	0x98bebbbf,	0xf6911ca7,	0x5680b2a1,
-0xa9aabfb8,	0x754f91a5,	0x7465d277,	0x9d45fdac,
-0xb2caf777,	0x26bf9e24,	0xdd2b90ef,	0x8de4f677,
-0x35704982,	0x9d3a3393,	0x5399ea34,	0x1cd4088f,

cpu/intel/model_306ax/microcode.bin

diff --git a/cpu/intel/model_306ax/microcode.bin b/cpu/intel/model_306ax/microcode.bin
new file mode 100644
index 0000000..2ed06b2
--- /dev/null
+++ b/cpu/intel/model_306ax/microcode.bin
Binary files differ

cpu/intel/model_306ax/microcode.h

diff --git a/cpu/intel/model_306ax/microcode.h b/cpu/intel/model_306ax/microcode.h
deleted file mode 100644
index 746940d..0000000
--- a/cpu/intel/model_306ax/microcode.h
+++ /dev/null
@@ -1,2 +0,0 @@
-
-#include "microcode-m12306a9_0000001b.h"

cpu/intel/model_306cx/microcode-m32306c3_0000001c.h

diff --git a/cpu/intel/model_306cx/microcode-m32306c3_0000001c.h b/cpu/intel/model_306cx/microcode-m32306c3_0000001c.h
deleted file mode 100644
index 010c67e..0000000
--- a/cpu/intel/model_306cx/microcode-m32306c3_0000001c.h
+++ /dev/null
@@ -1,1379 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m32306c3_0000001c.inc  */
-0x00000001,	0x0000001c,	0x07032014,	0x000306c3,
-0x4cc7cd85,	0x00000001,	0x00000032,	0x000053d0,
-0x00005400,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x0000001c,
-0x00000001,	0x00001481,	0x20140702,	0x00001481,
-0x00000001,	0x000306c3,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x3469b78a,	0x5fb47585,	0xcadb1867,	0xe271798b,
-0xdf37b777,	0xeadb4d9a,	0x08fe7723,	0x66bbeea9,
-0xa19308a3,	0x5b19c4b7,	0x4a1b425b,	0x7d6a74f6,
-0x81624193,	0x3a559605,	0x5475280b,	0xe7319d58,
-0x48624ca7,	0x507af030,	0x3b32d96a,	0x30164068,
-0x5284d2f5,	0x725b2915,	0xf63c9280,	0x44b7c142,
-0xe67ca7b3,	0xd6f163e7,	0xcdf51f3c,	0x41d180a1,
-0xcc3931b1,	0xf7a544a9,	0x7f6bf77d,	0xfc45a45f,
-0xf0985836,	0x652d7e2e,	0x0324b1f3,	0x24b9548c,
-0x7bcae7a5,	0xdcdebf79,	0x27015922,	0x0c83c606,
-0x3d2ceeb7,	0x61c5eec8,	0x6b6899c6,	0x3e500531,
-0xf08bfa44,	0xb304a8f4,	0xcee8f713,	0x2912c786,
-0xfae6c34c,	0xa5292960,	0x7d63e389,	0xaa257a01,
-0x1fb25054,	0x963fc676,	0x5bcb9fd3,	0x58f369a4,
-0xf6e3beb2,	0xa58b5eb0,	0x33c7eba4,	0x37fe8b66,
-0x00714403,	0xf0fd0c4e,	0xaa122996,	0x9a55b184,
-0x00201507,	0xc9fb6e3a,	0x11ab60c8,	0x80ff6e84,
-0xc37aabdd,	0x0fc23175,	0xb0b18c34,	0xf1ec806c,
-0x00000011,	0xa4303311,	0xa634137d,	0x7f827f66,
-0x7c9e42a6,	0x34394a35,	0xb87b55df,	0xb33fdc62,
-0x3dfc85a3,	0x08c8dc45,	0xf1cb9cd8,	0x2e2af040,
-0xfa2e47b2,	0x1784a824,	0x73571c8a,	0xafa98a38,
-0x34e68899,	0x0c89121e,	0x7ad663a8,	0xeb4c4b2a,
-0x62702cfc,	0x67bf6d74,	0xa1c27475,	0xdab881b9,
-0xbdf68e4f,	0x45bbb94a,	0x4002bb35,	0xe6ee8124,
-0x92f579c4,	0x0b9138a6,	0x8376a2bd,	0x59f6e1d3,
-0x020c0c4f,	0x985114e2,	0xd9410ce9,	0x923add32,
-0xa4282cf3,	0x5d2fcb0f,	0x582924e0,	0x97baf68d,
-0xec510eed,	0x313346dc,	0x13939b64,	0x0ac66903,
-0x574cc852,	0x972327c5,	0x7e400328,	0xfd96cfc4,
-0x2a13c098,	0x7e2434fb,	0x39f48bfe,	0x17a864f7,
-0x8b67ec3f,	0x9ff690d7,	0x927cc6ea,	0x333d73f4,
-0xd445d529,	0xf13d035a,	0x0258fe2f,	0x3a09fd11,
-0x73e49acf,	0x2c1244fb,	0xe4ea8840,	0xa3eaec76,
-0xacacbed5,	0x627ad195,	0x49cd62cf,	0x4f8e4bfc,
-0x9e1284a5,	0x3ca68b92,	0xc19b8e95,	0x7ba6d2ac,
-0x4b25e188,	0x6bacfb63,	0x4cf67d66,	0x33505222,
-0xaad85439,	0x4fa87c51,	0xeacbb3b3,	0x0a3852ee,
-0x2e11419a,	0x34c519e6,	0xa350be33,	0x6486263f,
-0x83519eff,	0xe4ef04f2,	0x01859f4f,	0x511978ea,
-0xf88b8fad,	0x937539f7,	0x79845ba9,	0x7145e020,
-0xdef67084,	0x6f453ebd,	0x494d9944,	0x7d57c09e,
-0xcbf25a77,	0xcaa1ea4e,	0x1f097b59,	0xa0f12f4b,
-0x8d55e5cc,	0x1e2afaed,	0x205c6445,	0xb3550d03,
-0x74cbe172,	0x55239657,	0xc3f52d52,	0x9515d06b,
-0x156dea21,	0x15343b6d,	0xe2eb8fcc,	0xc589b38d,
-0x8dd53e60,	0xa14697ee,	0x8ac0f869,	0x0e595134,
-0x1ab42a19,	0x0982fa3a,	0x03804d0f,	0xa58b59a2,
-0xd7b66f6c,	0x46219f78,	0x37b40e55,	0x9aecdcb3,
-0x58ca1785,	0x65856743,	0x4572ef85,	0x2c677f58,
-0x55087fcc,	0x2c648812,	0x3c1511aa,	0xdea77e13,
-0x6082fe9f,	0xb10fc6bf,	0x3020dede,	0x7b1cda6c,
-0xdb1127d1,	0x0cd83186,	0x5d4e1227,	0x64bb2b68,
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-0xb9e7645d,	0x87ed7e4a,	0xc6a76208,	0x1df9b325,
-0x2a3179c9,	0x101923e2,	0x2c7b61fe,	0x1da2fea0,
-0xd45c6916,	0x8a1a2fd9,	0x1c706a77,	0x1274e8b6,
-0xa92d7cec,	0xfa7cc2d4,	0xf1c2e223,	0x23de5b53,
-0x3664e358,	0x220b9bd6,	0x895e829e,	0x6b1209a1,
-0xabbe8fc2,	0xab021189,	0x1ae09102,	0xfe249d3f,
-0x5f449815,	0xcdbb0f3f,	0xf6af92a4,	0x8dfea125,
-0x91c25292,	0xddf8be95,	0xeb321eaf,	0x2ddeea25,
-0xc7724eaf,	0x5ae7212e,	0x8cdb9f42,	0x66144f0f,
-0xd9ca40e9,	0xf579d025,	0xff2cd495,	0xe6811c44,
-0xf7f57ef7,	0xc43a215c,	0x516418a5,	0x0e2b736d,
-0x446a2722,	0xa916c378,	0x4ca66c3a,	0x270f0e56,
-0xe6ee3218,	0x4ee44cf1,	0x91b635b6,	0x3d012c9d,
-0x8257bde1,	0x4b78720d,	0xf274cec8,	0x60cd339c,
-0x60963984,	0x196cb610,	0xfedfc695,	0x3ee1b143,
-0x3522d928,	0xdf128e53,	0x976aa145,	0x5c86bdd4,
-0x527996c9,	0xe84e451a,	0x86a5cc4f,	0xb80d10d4,
-0xe59d7668,	0x46405876,	0x12bbee0f,	0x802eace2,
-0xa85bf35e,	0x1dbd207a,	0xc7c1d541,	0xfceb0b56,
-0x1e5b7772,	0x2f9f5569,	0x181ba125,	0x6f547daf,
-0x90170bcd,	0x3756585e,	0xfb6ee748,	0xcc758d68,
-0xf8c76718,	0x71cd53f9,	0xe1e0cd10,	0x90cef4d7,
-0x3b359caf,	0x23094e49,	0x27096ef0,	0x50a8d08a,
-0xcbcf574f,	0x62c64f17,	0xff3f6fee,	0xb16df7ab,
-0x547f5e4f,	0xb40138ee,	0x674ad5c6,	0x42610543,
-0x77abb8db,	0x693d2635,	0x9f4b412e,	0x97334d68,
-0x05937ae6,	0x5fe77a2a,	0x2da20bff,	0xb940f087,
-0x5b611d27,	0xe96ea15d,	0x262cd2e1,	0xd86420e6,
-0x7dc7c335,	0x6240c282,	0x93b04497,	0x973367bf,
-0xde50e8fd,	0xba4f49a1,	0xf9f5cd67,	0x1012ae5d,
-0x9dd04ab4,	0xde87f909,	0x980c2060,	0x38579bc5,
-0x53426566,	0xc28b488e,	0xd8f3a989,	0xac838937,
-0x0fd40d09,	0x14a95b71,	0x41a96efe,	0xb41d8602,
-0xb5c9c05c,	0xc00528d1,	0x166b4906,	0x70671a00,
-0x09b02bb2,	0xe2127026,	0xa4237f50,	0xbe21f65d,
-0xbe6ac6fa,	0x171a28c6,	0xea68a771,	0x586b477a,
-0x9cb0512e,	0xbab8893a,	0x4b39bb55,	0xdc731a74,
-0x304f0f9b,	0x0e29ecdb,	0x2d109c60,	0x779831ae,
-0xfe760f56,	0xc76d1670,	0xecb3b974,	0x995a49fc,
-0x7726d83e,	0x10e58778,	0x44981df5,	0x7dfc15f7,
-0x8b74622f,	0xd4becef4,	0x10d7251a,	0x6323a116,
-0x174da862,	0xb6eb8b84,	0x48164db2,	0xc111485e,
-0x76165726,	0x862d7642,	0x6df99823,	0x6aa1dce8,
-0x415caeac,	0xcaf2c545,	0xfd0258d5,	0xa90e19ce,
-0xdb29fbef,	0x8e3b9155,	0x0465b8aa,	0x58b5f44e,
-0x786d2aed,	0xfdf05ea9,	0x06ae6c91,	0xf82020e1,
-0xbe783669,	0x6c3914ef,	0x0c8d3044,	0x4d3503da,
-0x04fb480e,	0xe7dc9d9e,	0x7eaa938f,	0x8cf597bc,
-0x2624f737,	0xb33471db,	0x47b426d2,	0xb4c4b97f,
-0x69e16bd7,	0xac739579,	0xa8fad8d2,	0xf730c7ee,
-0x2c57c2ec,	0x84931b80,	0xb59bc69d,	0x1d772639,
-0x1b71de03,	0x54d1d68f,	0x57b02de7,	0xb7318ee7,
-0x3dbefdaf,	0xf5f2a363,	0xf62f80e6,	0x94ef8c63,
-0xdcdb9fb0,	0x2c4b0020,	0x56dcfdc0,	0x8b6e6897,
-0xa3615879,	0x2c1216d2,	0x432cf5a0,	0x0c97e84b,
-0xa33c826a,	0x5f27d1e4,	0x30e0a9da,	0xbf15b6bc,
-0x1cf2058e,	0xbe64bd04,	0x09266629,	0x5c738374,
-0xd219d248,	0x08c1ed94,	0xf93bed0b,	0xaf3b9784,
-0xe32b0765,	0x5870afe7,	0xa2a964be,	0xa6b456ab,
-0xe17aa8d0,	0x8f945b86,	0xc4125809,	0x00c6833d,
-0xc5f87e56,	0x89fce694,	0xdbb7fbd9,	0x5070e9fa,
-0xf8f3fa75,	0xe1e0fe7c,	0xfaff2de4,	0x8d2c0303,
-0xf135c95b,	0x963f685a,	0x9c60b23d,	0x54dc9cbf,
-0x88cf5a5d,	0x930fd32e,	0x9c6d5f50,	0x49841b71,
-0x843a67d0,	0xcf158a40,	0x8bb7f560,	0x69ee85ca,
-0xf158f73b,	0xf59ff217,	0xbfb0edad,	0x279e0aeb,
-0x433410cc,	0x475e64b5,	0xff6a7c16,	0x49e446fc,
-0x8b2d905e,	0x09120079,	0xe420be58,	0xe9f9378d,
-0xffb3397a,	0xb0f6c1d0,	0x5adf4f12,	0xa36d6af1,
-0x7b063b63,	0x81948486,	0x6f62f6a6,	0xc3d4cf3e,
-0x1d37a796,	0x13b66ce0,	0x072929ce,	0xfd65725d,
-0x7767e025,	0xead9fa19,	0xfd238230,	0xf475393a,
-0x038cc057,	0xf42e6502,	0xa4919ebe,	0x4e753232,
-0x25570d27,	0xb27c0f01,	0x9c233bd9,	0xd71a0c39,
-0xc52f6a13,	0xce21114d,	0xc35b3bcd,	0xd5bf77b1,
-0xa2c49a85,	0x6655f10f,	0x23e2dd96,	0x3432287b,
-0x97c60e51,	0x96908b38,	0x0ef5c2cd,	0x84018ed8,
-0x01504762,	0xcdad1346,	0xc8a35d9b,	0xf3ec2a41,
-0xc5875409,	0xb0c09ef6,	0x8537bdf6,	0xed00864a,
-0x66fc75fa,	0x3d509cc4,	0x45aba277,	0xddf5d1af,
-0xff05a170,	0x0502ac1e,	0x372d00bc,	0x4a9a417b,
-0x1edf8fd1,	0xfcaed6f2,	0xb37b291d,	0x1c3fcf86,
-0x2007a7f3,	0x4ff75ae3,	0x75d01780,	0xaeb27878,
-0xd5ebc299,	0x2b3cf8f4,	0x8716c457,	0x56f09f2a,
-0x563c4b3f,	0x051f3a25,	0xb5b952c0,	0x6fa4d0ac,
-0x42a430f0,	0xa3d25ad8,	0x5f5b2e04,	0xe9daaed2,
-0x09c2bd74,	0xa37d252e,	0x1393bbfe,	0xe8928e31,
-0xd143fa03,	0x630df3fa,	0xe9a65754,	0x46e3d719,
-0x1eaed82c,	0x23078bef,	0x6a9a5ed4,	0x487444ba,
-0xa3647273,	0xbf2703ef,	0xdbcf9135,	0x83dba87e,
-0xcfd2e94a,	0x8e4e9367,	0x0be548d4,	0xdd0aa508,
-0x0f9c9e32,	0xe155e03a,	0x9b2b62c4,	0x7e8a9395,
-0x04126017,	0x313951e6,	0xe0548879,	0x580f34d0,
-0x55b00c49,	0xd02db419,	0xad6dc189,	0x392f4006,
-0xe31bf9c7,	0x2811a35f,	0x845b191b,	0xcfa937a3,
-0x9dc22ba4,	0x168b6e05,	0x15ae8138,	0x3fbddff5,
-0xfdb70b02,	0xdc6fc8f9,	0x9e370881,	0xa1445a98,
-0xb4a7c8eb,	0xa25191ff,	0x13db7974,	0x7622c042,
-0xfb678ba5,	0xbd10f39b,	0xc5a390bc,	0x01d9e6d2,
-0xe3678292,	0xad2474f9,	0x34b3ee18,	0x09f0c135,
-0x3c7984d9,	0x476f6a68,	0x422a58ba,	0x7a103f51,
-0x8a45bcf2,	0x8b68fdf2,	0xc68ec6f4,	0xc0a0a1ce,
-0x5548e732,	0x25a8584c,	0xcbde4888,	0x2e7c72b4,
-0xfb3f56d2,	0xa4c85f6d,	0xfe3f40aa,	0xbadebdb3,
-0x6c8ce55b,	0x902fb4d7,	0x44798cb7,	0x1a7f28dc,
-0xa0720d67,	0xb2b72966,	0x7e0617e5,	0xddad88e1,
-0xc464cba3,	0xdbb265de,	0x59aa99a7,	0xcafec606,
-0x44166d46,	0x2e65ab78,	0x89bd39c1,	0x882c80ae,
-0xdeb88749,	0xc7e711ba,	0x50d01787,	0xacb615ba,
-0x79baca73,	0x25b4c1ae,	0x4bd484e0,	0xb995287d,
-0xf5938e70,	0xd07b0607,	0xe646b90c,	0x62a96641,
-0xd8a02445,	0xfa33c4a2,	0xaa91f55d,	0x4fb3a5db,
-0x0b280d4b,	0xfe44e369,	0xc94932a1,	0x7e7d35b3,
-0x3787f8d5,	0x56a2e234,	0xe63684d0,	0x63f46053,
-0x4072c61d,	0x6e08600a,	0x8c86b8ff,	0xf66c3285,
-0x8fce45fd,	0x8085b14b,	0xc21f6549,	0xbe34a1e9,
-0x10601487,	0x7bfb372b,	0xae02fc14,	0x08a33a57,
-0x330e859a,	0xe2e9127c,	0xe5e1527e,	0xa54d7bcb,
-0x67a3b7de,	0x913602cf,	0x1b85c0e1,	0x46a18e3b,
-0x68359cbc,	0xc3c53185,	0x75a8b6bc,	0x92b5b96a,
-0x08d0c988,	0x91aaad44,	0x3fa37929,	0x6be34382,
-0x3cca8604,	0x88c60f5d,	0x7b2eed24,	0x25457db0,
-0xa5ff2b24,	0x9b705426,	0x94c8a057,	0x741537ae,
-0xc1ba8dba,	0x384db485,	0x52652652,	0x7bbb10a2,
-0xd08f61d9,	0x92828a53,	0x0c1034c8,	0x591cb8ce,
-0xdae839d5,	0x333eeb9c,	0xb23ea318,	0xa72eb48c,
-0xe56e9fb8,	0x01c7e252,	0xd2af99ab,	0x6f25d4ef,
-0x28e10c19,	0x812480c6,	0x61af525f,	0x615dd85c,
-0xb1b592af,	0x658c3caa,	0xf5b3222d,	0x0ef26e91,
-0xfa1bbb27,	0xba85d298,	0xde212b1a,	0x091af081,
-0x786a25f6,	0x933bdcb7,	0x1d252a17,	0xf0d95267,
-0xb10759d4,	0x474ae90a,	0x18ba4ddf,	0x0f9bc96c,
-0x421bd639,	0x7a4243bf,	0x663db111,	0x16dd061f,
-0x76114cf8,	0x074c3211,	0x4b482753,	0xb362efef,
-0xec13759f,	0xea601ce7,	0x441bfc51,	0xcae8b275,
-0xd61876d9,	0xb195fba5,	0xaaa9e776,	0x72dd0352,
-0x3ca2c724,	0x251fdecf,	0x739a0374,	0x76767ef2,
-0x9d805230,	0x5e9a2439,	0x4e956076,	0xf7fa56b7,
-0xa518cc0a,	0xe6ffe307,	0xd3ad6ab7,	0xc3b3c22e,
-0xcaf2715b,	0xa8e499f1,	0x7d110d44,	0xcd718786,
-0x84bf8b45,	0x0ac0a64f,	0xc881e645,	0x9050ab78,
-0x3c376d36,	0x3631177a,	0x35688337,	0xd3f62d5a,
-0x952775b7,	0x08562c86,	0x5daffa53,	0x722baf7e,
-0x7087c3eb,	0xfd64e268,	0x366391fc,	0x4a496217,
-0x0c354eaf,	0xcd71bd20,	0x229ef694,	0x798e7dd1,
-0x6b013034,	0x20b5c7b3,	0x81af665c,	0x41f25858,
-0x5feea1e7,	0xdc818af6,	0xb277f335,	0x1504c425,
-0x4243150d,	0xa2bb4333,	0x374b5a99,	0xba9254a0,
-0x34efa0d8,	0x110aa148,	0x798d4989,	0xaa96a881,
-0x50b74db3,	0x0a0f4ff1,	0xa8c7e7c1,	0x2e6efef9,
-0x984fce06,	0x7953b926,	0x82b19305,	0xd521fa99,
-0x6d12fe8c,	0xfd3a9503,	0x8bad9270,	0xa0b50463,
-0x083310b1,	0xf1aee8b9,	0x37e05532,	0xffa9bb43,
-0xf90e161e,	0x78f8525c,	0x1d8e32ad,	0x9d4a920f,
-0xfa07cc47,	0x0be1cff7,	0xa62ec199,	0x38f759a9,
-0x68d5ed10,	0x1584973b,	0xc7cafd56,	0x1efa5628,
-0x2ce2ccb9,	0x739be188,	0x19c96d61,	0xd37eccf4,
-0xfd0b3e81,	0xa6a95a7d,	0x0f67522b,	0x9df2f6d8,
-0x597d2a63,	0xda056d85,	0xc11445a5,	0xd87ff32e,
-0xba594766,	0x9b6c3b57,	0xfbb0b1e7,	0xc62eacb2,
-0x856348f2,	0x10408b00,	0x6f953cd6,	0xd7b4d114,
-0xe9c171ed,	0xd7ce04f4,	0xb1110b41,	0x02711735,
-0xc31191fb,	0x34586a8e,	0x18af135f,	0x50401307,
-0x38f9d4c2,	0xf1a7ebb2,	0x24558f7c,	0x1966a4d9,
-0x27d2fb12,	0xc45168bc,	0x82bc8240,	0x2634a039,
-0x61578760,	0x0c7d07eb,	0x5e6a1ddb,	0x8b29eff2,
-0x2bd8b8b2,	0x38b74d6c,	0x848e95c1,	0x81b88c2f,
-0xce525ccd,	0x9016756b,	0x47e35f64,	0x060cad38,
-0x6a1ba531,	0x5693296c,	0x594fddc6,	0xddd6082d,
-0x31b9f790,	0x6190886c,	0x5dca699f,	0x43b9d24a,
-0x72f8c585,	0x37c73563,	0xb06a5e1d,	0x8c338795,
-0xc5bb51c3,	0x45132436,	0x0e7e1073,	0x1a1e79f4,
-0xb4272b16,	0x7fd92937,	0xe3255ecf,	0xe21cfe14,
-0x5c180fcf,	0x1b01e3a7,	0x86cdd161,	0x8d8ea39d,
-0xdd07de90,	0x84c377f8,	0x0e771e88,	0x06ed4696,
-0xe0cb3386,	0xffb5b2b7,	0x35c24160,	0xdaa6efff,
-0x30e05389,	0x98e0994d,	0x860a3829,	0x60c36bfb,
-0x152210a6,	0x1ad32213,	0x1c23ee60,	0x1512341b,
-0x2c1a661a,	0xe2e6c964,	0x557acc77,	0xdc8acc92,
-0x8854a3bd,	0x2b35fda5,	0x3ca8e574,	0x3820fb79,
-0x21622357,	0x70fde86a,	0xc4c0c0fd,	0x8e595158,
-0x127aac74,	0x1c64ef36,	0xc1e04e94,	0xc62d52a7,
-0xb3ccdda4,	0x73df6282,	0x14d5a4fd,	0x672931fb,
-0x57102c39,	0x32a93600,	0xaed0cf13,	0x53d97301,
-0x52e14dfa,	0xcf174946,	0xe9890d97,	0xfcd8fe9e,
-0x13db2a54,	0x9aafbc56,	0x2f43a3ab,	0x9c2228b3,
-0x1da6c306,	0x6b4c07c3,	0x158e7a0b,	0xa186e868,
-0x414bde56,	0x69bd1442,	0xdccba338,	0xfa430c0b,
-0xd1959f35,	0xf7a45a05,	0xbdb41122,	0x474181ce,
-0x494ba1fa,	0x5b81242e,	0x8d7f9b0f,	0x666be707,
-0xaa89a698,	0x0737711e,	0x085ec8b9,	0xed0d6fa9,

cpu/intel/model_306cx/microcode.bin

diff --git a/cpu/intel/model_306cx/microcode.bin b/cpu/intel/model_306cx/microcode.bin
new file mode 100644
index 0000000..0b47b48
--- /dev/null
+++ b/cpu/intel/model_306cx/microcode.bin
Binary files differ

cpu/intel/model_306cx/microcode.h

diff --git a/cpu/intel/model_306cx/microcode.h b/cpu/intel/model_306cx/microcode.h
deleted file mode 100644
index 372cfbc..0000000
--- a/cpu/intel/model_306cx/microcode.h
+++ /dev/null
@@ -1,2 +0,0 @@
-
-#include "microcode-m32306c3_0000001c.h"

cpu/intel/model_4065x/microcode-m7240651_0000001c.h

diff --git a/cpu/intel/model_4065x/microcode-m7240651_0000001c.h b/cpu/intel/model_4065x/microcode-m7240651_0000001c.h
deleted file mode 100644
index 9e4881e..0000000
--- a/cpu/intel/model_4065x/microcode-m7240651_0000001c.h
+++ /dev/null
@@ -1,1315 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m7240651_0000001c.inc  */
-0x00000001,	0x0000001c,	0x07032014,	0x00040651,
-0x4f9aa4c4,	0x00000001,	0x00000072,	0x00004fd0,
-0x00005000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x0000001c,
-0x00000002,	0x00001331,	0x20140702,	0x00001331,
-0x00000001,	0x00040651,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x54803536,	0x5b42092a,	0x9f337d90,	0x538e6ae5,
-0xee797c87,	0x40b34be7,	0x2058da4a,	0x02665b1f,
-0xa19308a3,	0x5b19c4b7,	0x4a1b425b,	0x7d6a74f6,
-0x81624193,	0x3a559605,	0x5475280b,	0xe7319d58,
-0x48624ca7,	0x507af030,	0x3b32d96a,	0x30164068,
-0x5284d2f5,	0x725b2915,	0xf63c9280,	0x44b7c142,
-0xe67ca7b3,	0xd6f163e7,	0xcdf51f3c,	0x41d180a1,
-0xcc3931b1,	0xf7a544a9,	0x7f6bf77d,	0xfc45a45f,
-0xf0985836,	0x652d7e2e,	0x0324b1f3,	0x24b9548c,
-0x7bcae7a5,	0xdcdebf79,	0x27015922,	0x0c83c606,
-0x3d2ceeb7,	0x61c5eec8,	0x6b6899c6,	0x3e500531,
-0xf08bfa44,	0xb304a8f4,	0xcee8f713,	0x2912c786,
-0xfae6c34c,	0xa5292960,	0x7d63e389,	0xaa257a01,
-0x1fb25054,	0x963fc676,	0x5bcb9fd3,	0x58f369a4,
-0xf6e3beb2,	0xa58b5eb0,	0x33c7eba4,	0x37fe8b66,
-0x00714403,	0xf0fd0c4e,	0xaa122996,	0x9a55b184,
-0x00201507,	0xc9fb6e3a,	0x11ab60c8,	0x80ff6e84,
-0xc37aabdd,	0x0fc23175,	0xb0b18c34,	0xf1ec806c,
-0x00000011,	0x93ec6a8e,	0xe7e59e0e,	0x8354a863,
-0x6532cc70,	0x6b941f6e,	0xe6efb015,	0x813a0672,
-0x4bd6a134,	0xe7d2ae2e,	0xb801fd17,	0xc6730db1,
-0xffaf70c6,	0x99963a56,	0x552b2448,	0x06da244f,
-0xbddb7094,	0xc41bbd43,	0x8566bdda,	0x8730b02b,
-0x0ffc1836,	0x57f083f5,	0xbc7eb4f9,	0x93720c90,
-0xb948e082,	0x646a29c2,	0xab785ca6,	0x22d6de29,
-0xad6632ee,	0xf781c405,	0xab8c189f,	0xe9f84888,
-0xdfc91edd,	0x7c42229e,	0x713f0b2e,	0xbfec8862,
-0xd7041476,	0x30cdc9df,	0x6a884797,	0x4df51550,
-0xe6e3d09a,	0x2b63aff3,	0xbe437a9a,	0x2bbc6a7e,
-0x36cd4cac,	0x4c3a5d83,	0x22e35ba1,	0x2602cf9d,
-0x90506b16,	0xad5e4dae,	0xfd02e76c,	0x41ecfaf1,
-0x5885656a,	0xf1da2947,	0x9a6e02ea,	0x338ab563,
-0x73de7a3e,	0x80131004,	0xd82962c5,	0x8e8c88ef,
-0x7ae0d2fa,	0x3420c82a,	0x202e795c,	0x3a0d9404,
-0x3d337908,	0xc1c8f56d,	0x1a9d5f9a,	0x8d294c4d,
-0x054fa4f0,	0x1feb3cba,	0x1fcaf41f,	0x36ce8dfa,
-0x15765644,	0x5741c08d,	0xd258e716,	0x67d51f76,
-0xe16efcf6,	0x53877ae9,	0x5632053f,	0x3efc3569,
-0x21202e38,	0x59367def,	0x73e8c31b,	0x5558b394,
-0x3801fe26,	0xa291f1ad,	0xb853571c,	0x43d8845b,
-0x919a9ede,	0x5eaf4d90,	0x986cb6b6,	0x822a630b,
-0x0904e79e,	0xa20dcab6,	0x05470b25,	0x62dc1169,
-0x0de7ce15,	0xd4cafd8a,	0x2216b4fa,	0x3ba658df,
-0xf84db879,	0x94365ec0,	0xffd76c6b,	0xcf5003d0,
-0x2ab8d6dd,	0xb87ce90c,	0x77b341c4,	0xe9bdd2d1,
-0x05343cca,	0x0d0a7813,	0xcc23da22,	0xbbaef3c9,
-0x82bb35d0,	0xc8d97e27,	0x062c07f0,	0x31fc6743,
-0xa5d7b86e,	0xfb399a4a,	0xea0ca298,	0x45c56f0c,
-0x9de334e0,	0x2b808722,	0xdcb90fee,	0x86880439,
-0x4bb5520f,	0x2f8ccd3f,	0xb31154f5,	0x76b037c1,
-0xc8cf720d,	0x9e53125e,	0x495ab1d6,	0xdc09098f,
-0x90ff69e5,	0x4fb52efa,	0xe07dbe04,	0x505dce0e,
-0x9930358e,	0xc7243a95,	0xacae76b3,	0x23702ced,
-0x36ba2ba8,	0x12f6a4d6,	0x6291a5df,	0x43e09751,
-0xd86e8606,	0xe5b8d173,	0x84cf7f38,	0x5a2a732d,
-0xea8dec57,	0x075ab4bd,	0x3093ea05,	0x7ddc4623,
-0x9eeac07d,	0x0bae6c5e,	0x1170d85f,	0x54585ce5,
-0x424b5930,	0x6f962ed0,	0x6291c170,	0xda9a243b,
-0x7a1aa460,	0x07fe426b,	0x3e0fbcef,	0xe6f65e2e,
-0x16a76698,	0x2ee2c974,	0xd42dd042,	0x60b2d4c2,
-0x84ca0de9,	0x1b321482,	0xd80847e7,	0x97cf9fc9,
-0xabad4e62,	0x4c5e7534,	0xba474a3d,	0x4b386fe1,
-0xb1d3bd4a,	0x66f2e748,	0xff997d29,	0x7f9a5ecb,
-0x08b74697,	0xd5ff51e3,	0xf0e80f08,	0xbc8a3750,
-0x96c2b150,	0x993ddd82,	0xb1fcad1a,	0x39c457ed,
-0x8e7887a9,	0x951385c2,	0x5e192577,	0x5ece4be6,
-0xd8aa0cce,	0xda9db0dd,	0xf0a65605,	0xcbe133fb,
-0xd62d187c,	0x43d65c21,	0xd9ff512b,	0x2c1e670f,
-0x94862f11,	0x2ad5876f,	0x0347f479,	0x837c9d9a,
-0xd588cfb5,	0x3184bcbe,	0x4d29209d,	0xb11531fa,
-0xcf60605f,	0x8582c22e,	0xf80aec84,	0x56770992,
-0xb008270e,	0xe61f0247,	0x5b96ca82,	0xddf6a6d7,
-0xa8fd309f,	0x5a37ebf0,	0x89c55922,	0xa1d3e943,
-0xc7437f57,	0x8767c3b9,	0x2aace409,	0xd3ffea65,
-0x01673382,	0x3062cc4d,	0xdc3ca70e,	0x72ec823f,
-0x013dfcf0,	0x3cea3c0f,	0x5c6f9892,	0x0401238b,
-0xd0f5c9a9,	0x83d5363a,	0x20594afe,	0xf31625f7,
-0x36d9bf4d,	0x979d10e2,	0x82ec9621,	0x1575da7e,
-0x1e48b107,	0xcf273476,	0x8f6bc6ce,	0xc468a1f1,
-0x19304de2,	0x8a514ade,	0x0da8ed49,	0x89bba358,
-0x4fcde67f,	0x1b236a87,	0xbd9c34c4,	0xc31e7624,
-0x8d4e1b94,	0xca715a48,	0x57aab513,	0xdc01097a,
-0x61536abc,	0x9ab66e22,	0xc3e9acac,	0xf9793dc1,
-0x01d27d3e,	0xec783b0a,	0x7f8a7b0a,	0x8952bd32,
-0x78f97900,	0xea165074,	0x6a3b9b4f,	0x6994be45,
-0x97b278db,	0x2d7a1059,	0x2a9a584d,	0x3102f971,
-0x3dd2edfd,	0x75d40781,	0xbd8bb3f7,	0x69c9e2ad,
-0x2924453d,	0xf971a611,	0xc44c6a20,	0x6458ddf0,
-0x344e948d,	0x99861094,	0xffc216ce,	0x46a544ac,
-0xa0e12280,	0x2342bdd0,	0xd264153a,	0xef7c5510,
-0x982fdb4b,	0xaa8061e1,	0xeeb4cb06,	0x1c4e24bb,
-0x35137ad0,	0xd383e7b0,	0xb3515b98,	0x34ab789c,
-0xc6677101,	0x3a179ec6,	0x8e1b7f83,	0xbc952258,
-0x528cc506,	0xbb0ee496,	0x041a20c7,	0x435c1764,
-0xc5ffbfe5,	0x7aadad66,	0xba7c49b5,	0x16961f55,
-0x53a973b0,	0x82b7c322,	0x6108d300,	0x1e465f56,
-0xde5b0cdf,	0x1db4c843,	0xdc84068d,	0x746b86a8,
-0xe18bb690,	0x9c31e6c3,	0x3fbe45db,	0x9fcd70bc,
-0xebf1e3bb,	0xf293ed6a,	0x9acc3c5f,	0xc2d8d4a7,
-0xb4f10f0e,	0x8f08aade,	0x7ff658e3,	0x571f87e4,
-0x53911020,	0x8eabc16c,	0x66de43e6,	0x86313e1d,
-0x091638f2,	0x4fabd2cf,	0xf64a8806,	0x34a9f3c4,
-0x342eb98c,	0x6da221f8,	0x5dc9ad3d,	0x3f235ca4,
-0xf13aae29,	0xe58aae0d,	0xbb0f06b0,	0x0146ce07,
-0xdb82eed1,	0xb8a5b35e,	0x5ad2f1af,	0xc904facd,
-0x9cb2684d,	0x664cdcc1,	0x8b83058c,	0x3a144bad,
-0xd818e9fb,	0x1a4378e3,	0x087ee2c7,	0xc45812e8,
-0xd10705f1,	0x040bdc37,	0x24dcced6,	0x5d917109,
-0x6544b517,	0x321bea6d,	0xb4c74b5a,	0x93b11971,
-0xdbd04da0,	0x9180fdad,	0x9b5c205b,	0x8e123be0,
-0x2752e398,	0x74ab49b4,	0x3b8090ae,	0x8e564f95,
-0xae58ebb9,	0x7c2ab771,	0x8d8b4559,	0x4aae59b0,
-0x3d57724b,	0x5324f318,	0x3f6b4f5b,	0xa7c2dd69,
-0x75cc2f3e,	0x58d81e09,	0x724a5ddd,	0x00373586,
-0xfe1bfc27,	0xebeed8c4,	0x9f4df4dd,	0xa3d7150f,
-0xd4cf1d99,	0x77663800,	0xba7326ee,	0xf799bb1d,
-0x17f711a1,	0x0b683496,	0x16734362,	0x1c1ec0fa,
-0xbd7606d5,	0xde0ecfaa,	0x4fa3d7e1,	0x18b5cafe,
-0x86ded1cb,	0x84eb26a4,	0xe15ad21b,	0x6222135a,
-0x4813612b,	0xf435160d,	0x8bb9cdef,	0xc0febebc,
-0x908ea268,	0x6114ec6d,	0xde72772c,	0x2de363f2,
-0xac07caff,	0x4d1367d2,	0x5ccb4e20,	0xb8c2480c,
-0xd40a88f1,	0x4c8aaf04,	0xec69eadf,	0x08d603d4,
-0x1d6b72c2,	0x45cb2279,	0x9c18a457,	0xb1eefcd5,
-0x6f5bbe8a,	0x8656da63,	0x5abd01ef,	0xbd3a0fa9,
-0x07f8b848,	0x4723e8da,	0x1c8a7404,	0x0ee2c60d,
-0xf4d73710,	0x2e98dd50,	0x42265393,	0x607cae51,
-0x5ad2d65a,	0x443fae0a,	0x212bdac1,	0x94eff1e7,
-0x8fd0d83d,	0xf3f48729,	0xaa613eeb,	0x532716af,
-0x22f67b55,	0x197dd562,	0x30bbc619,	0x452ca5b8,
-0x69125584,	0xbe8ffd8f,	0xcdc33841,	0x1afadf4f,
-0x6c327b0a,	0x1ffee636,	0xbc3e313d,	0x2274f02f,
-0x1d4bd1ab,	0xadf7f661,	0xc6ae5dba,	0x65c67cce,
-0xd8ba01b4,	0x067ec15e,	0xcdd98197,	0xf63a814d,
-0xa63ef3b1,	0x3a0f7ab7,	0x0b141297,	0xbd16dffd,
-0x80de07c9,	0x5b855491,	0x775d7917,	0x79039980,
-0xc4f0b5a2,	0x7ad189f3,	0x5b808e2c,	0x6e6c48f8,
-0xea4b291a,	0x244153fb,	0xd866387a,	0x0fbad87f,
-0x37fd2697,	0xe38d68cc,	0xd56bb9be,	0x0fe9183c,
-0xfe4286c7,	0xa9238f4e,	0x57c6bafe,	0x7e7c64da,
-0xf5f0b3c6,	0xf2174839,	0x9622aabd,	0xbfb9add1,
-0x7a9d83f3,	0x22cdc940,	0xd0aed140,	0xb2842a1c,
-0x19350ede,	0x844cea83,	0x03f824b6,	0x2d6a80d1,
-0xcc7234f5,	0x64e522f9,	0x68463ec1,	0xc22ca25a,
-0xf6fb480b,	0x92df3534,	0xcd143a85,	0xcba797d1,
-0xab3040eb,	0xaa862cda,	0xeb8dbb5a,	0x72f87be7,
-0x0574be93,	0x7967a4e8,	0xc43d5618,	0x95f48b0f,
-0x605384f1,	0x49d7bbd0,	0x20e6ff24,	0x8891ad61,
-0xbe37fb81,	0xa14cc9ac,	0x1737a15d,	0x0d8c64c8,
-0xf31ed8cd,	0xaeba1a38,	0x99b73598,	0xfb58e711,
-0xe2cd0a2a,	0xba3ae60f,	0x53874128,	0xca6bd9f6,
-0xdaa3865a,	0xdf558d1e,	0x69c074ea,	0xd2d74d88,
-0xd7924cfa,	0x9cfbba04,	0x560eb2ac,	0xb58eb3fb,
-0xac0f471a,	0x8b9775a6,	0x04f93abd,	0x71830a7b,
-0xabece5a2,	0x7d0b9603,	0x447e0437,	0x9b19fdf0,
-0x2aeb904f,	0xb6c581ab,	0x69c4a6e6,	0x9e996bf9,
-0x28345395,	0x8797c013,	0xab770f48,	0x02414cb3,
-0xf1400aa8,	0x77b85d38,	0x6c1519d4,	0x68aa8d18,
-0x4ad589f6,	0xde108567,	0x26ce3cc8,	0x855d739d,
-0x4123b448,	0x0acfaf11,	0x3d1d706e,	0xcf6dfbc2,
-0x02869b0e,	0x8ad4c4b5,	0xb118ed06,	0x19defc29,
-0x955de3e2,	0x4246d3bb,	0x20d55907,	0x9263ee1a,
-0xe3b1a896,	0x2aa64af6,	0xac652be4,	0xc319f5db,
-0x1f87bdbc,	0x5d35a264,	0x915af64d,	0xa63f8b9d,
-0x8b596f71,	0xb289a637,	0xbf4df8f4,	0x637223dd,
-0x1c7b17aa,	0xb73cff48,	0x490b6e3b,	0xfb9cc770,
-0xbdddc085,	0xf61b9342,	0xf632cb9c,	0x7a1273c8,
-0xe12e5792,	0xc8874fda,	0xbac1a2cb,	0x2525df42,
-0x14735a6b,	0x48b123d4,	0xbf80739f,	0xa5acac23,
-0xe509b461,	0xd72e2e2c,	0x94553b2d,	0x61274a8a,
-0xbad8722a,	0x9cde98cb,	0x497a8db7,	0x84bca500,
-0x85ddf493,	0xcb5717a7,	0xdbada31f,	0x34e9d14e,
-0xc23d20d7,	0xf3a32825,	0x688ea606,	0xecbc1379,
-0xf7cc7e17,	0x98826691,	0x0a2fc103,	0xfa891b0d,
-0x6031f829,	0x3d93a25c,	0x45ebed73,	0xd5e938b5,
-0xb3a8e0cb,	0xd271fb09,	0x6c01ec65,	0x26528bfb,
-0x358e2521,	0xde0ea304,	0x3aa0e26d,	0x06bbe682,
-0x0e141d87,	0x80f84192,	0xd2ca916c,	0x38193f29,
-0x1f26fcb8,	0x48b0f72c,	0xa9e5b9d4,	0x757b1925,
-0x2171c824,	0x7a5cdb28,	0x67a9cd39,	0x58e682cf,
-0xfe773460,	0x54f56488,	0x4fab4a18,	0xd5d62f56,
-0xaa1ff73c,	0x663a3adc,	0x5b28b030,	0xcf7c2fae,
-0xe86c08aa,	0x675ecdf9,	0x6c54904e,	0x59bac9cd,
-0xe830b6b5,	0x9c72f3c8,	0xc2d2dfc2,	0x7eea1860,
-0x3e68956e,	0xcabee365,	0x2abecc3f,	0xf5584efd,
-0x97494ab2,	0x4547de19,	0x23b75177,	0xf5158de7,
-0x8f887368,	0x82aa37f9,	0x45edb6b6,	0x8cd4567e,
-0x35a853f1,	0xabdfdde1,	0x126a775d,	0x74971303,
-0x92965554,	0x884af013,	0x01678e07,	0x5ce5e949,
-0x0e92a0b7,	0xb4ae83b3,	0xb33f17e1,	0xc1eaae2c,
-0xf4d8a373,	0x7aaa8222,	0xbdf9d56b,	0x4b34135f,
-0x5ec53983,	0xd79506ad,	0x48931578,	0x907b2609,
-0x129ca0e3,	0xd1fd7d15,	0xd6cff42e,	0xe91542cc,
-0x006dd750,	0xd45db570,	0x0d6787cb,	0x41fac008,
-0xa14abb50,	0xe3836ddb,	0xa08d7c2a,	0x0c42081e,
-0x99231ac9,	0xc572a6d2,	0xedd8f7c7,	0x299a0245,
-0x1dd8dc9d,	0x67f43cff,	0xe59c0063,	0xb53706a5,
-0x4779de2e,	0x01d4ae62,	0xf1b3af1f,	0x04fe1683,
-0xa6ae95d2,	0xc049f706,	0x35da73f9,	0x786c55fe,
-0x45541fe0,	0x0b712835,	0x0ba80808,	0xfbfa8301,
-0xf243658e,	0x3fa0a207,	0xf1ad361a,	0x1022cd47,
-0x9931194a,	0x458118ba,	0x65b01c42,	0x9eaed094,
-0xea3c1c7d,	0x1f54744a,	0x3a93c482,	0xb624d29f,
-0x78015089,	0x0a68782b,	0xf5497256,	0x0d9422b2,
-0xf79ca89c,	0xd0a62c46,	0xf6bfb279,	0x87639d4f,
-0x853431ca,	0x7cbf82ce,	0xb0b8579f,	0x91dbf9ca,
-0xa4b41a8d,	0x6cc03669,	0x0a8459aa,	0xa84998ee,
-0xb0e5442d,	0xc1206664,	0x1d66b29c,	0x2aa662fe,
-0x3ff230f5,	0xb3b9ea5e,	0x28d59572,	0x071a2784,
-0x48ad8df4,	0xb672a99d,	0x431837c5,	0x312da9d2,
-0x552f1f1e,	0xba76bf31,	0x0fde86fc,	0x3a4b0e5b,
-0x27767132,	0x3207cd66,	0x7acd2d75,	0xa04c2b7a,
-0xbeb5576e,	0xe69396d7,	0xdb471676,	0xc1155dd9,
-0xedeff438,	0xad1fac56,	0x2bdd6c24,	0x1b6a29ed,
-0x3150d31f,	0xfef32ddc,	0x4478c8cf,	0xe291fdb3,
-0xbff85812,	0x07f945a0,	0x2be5471e,	0xcc38f9f9,
-0x2372ce7c,	0x8a9ffc48,	0x4e76ee7a,	0x6f6edd41,
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-0x3a0db93d,	0x3182e227,	0xd751be55,	0x8f36e600,
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-0x4995125e,	0x3b14ec5f,	0x6b4ba5f4,	0x98d07673,
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-0x3e45ca63,	0x39ce4c83,	0x39bc92e7,	0xa1a067a5,
-0x9dc60770,	0x9b32e09f,	0x78a7cb2b,	0xcd1f68ef,
-0x8cdd261d,	0xa88f0fac,	0xb3ce9949,	0x83471661,
-0x33383459,	0x44246d99,	0xcc9c4fcc,	0x1f8d89ed,
-0xbc75b0b6,	0xd15b7a15,	0x0516ab7f,	0xecf3553d,
-0x64ab1dfb,	0x431ec543,	0x35d4ffdd,	0xbe1d1dce,
-0x3cec9a68,	0xc9f5fe6b,	0x48f216ad,	0x21d5458c,
-0xb4e89c33,	0xdf6fc2a1,	0x75a82ce8,	0x9772d2b8,
-0x50f0ee84,	0xf89dd66c,	0x1af93b95,	0xc82bdb01,
-0x4241204a,	0x38a0852a,	0x83a563e2,	0xcc579e3f,
-0x64c3ff4a,	0x55a489db,	0x09f3e441,	0x47e6f47c,
-0x0ebc9ed3,	0x65a93ed6,	0xbd282038,	0x3a84f7ca,
-0xe9aea1cb,	0xba382a96,	0x0b7f4464,	0x82c2da22,
-0x08cd24d7,	0x1f7c415b,	0x08592b5b,	0x1fd07e86,
-0x866322ef,	0x0c13e720,	0xab129b1f,	0xad307bb0,
-0x9dd275dd,	0x4736eb09,	0x56472906,	0xa06de3ef,
-0x051f600d,	0x788bf911,	0xe84b13c8,	0xc69eb604,
-0x2a7ef36d,	0x35930deb,	0x277db8f7,	0x324b23ff,
-0xc99f7ddc,	0x022fb9e0,	0x376faa11,	0x880d3142,
-0xe0364be6,	0x3d736920,	0xfe801b4c,	0xc79e26b6,
-0xb15bc802,	0x7a203cc6,	0x2e41cee3,	0xaf4ecc90,
-0xf00b3388,	0x472e4cba,	0xf5c5fa9e,	0x499282ea,
-0xae3c37d4,	0x9c4dc51d,	0x4447b018,	0x96f3c04e,
-0xdbf895ad,	0x78277314,	0xc8322681,	0x4799a312,
-0xa1f59724,	0xcdbd0a94,	0xaf0e344b,	0xfce052bb,
-0xdebb9269,	0x5b708031,	0xa6dd155f,	0x28a8e97e,
-0x47a4d35d,	0xbca41db8,	0xd44e8c89,	0x8ea4cfd4,
-0x2087643e,	0x5c5361a0,	0x19d5b038,	0xe1a44e71,
-0xbaaa5865,	0x32985d2e,	0xb30cb132,	0x8346f712,
-0x72122d8a,	0x9da8fe8b,	0x8ad3b0b9,	0xb86020c6,
-0x96076c4d,	0xaf15e5dd,	0x4eb7694e,	0xcb66e0f9,
-0xc0cc7811,	0x9f62498c,	0xf7628eb1,	0xb40f5782,
-0xe3909967,	0x5268c0ea,	0x5ed85a84,	0xeddcfc66,
-0x2aab8bcc,	0x67d9cc4c,	0xdad309a9,	0x4fb8f216,
-0x87b670ff,	0x8046968e,	0x1005493e,	0x7aff15cc,
-0x18a3b0ff,	0x275e0830,	0xe794620c,	0x84ff92f0,
-0xefe38a1e,	0x5f13f4d9,	0x5b65eb4e,	0x0e3b130b,
-0x28c7a40d,	0xd2e79e8a,	0xa979057b,	0x865238ac,
-0x11c29a5c,	0x9c4a67b0,	0x3a4033e5,	0x5cd9ce4d,
-0x446f5f03,	0x3eb976ec,	0x0db06dfb,	0x7d91aba4,
-0xfe5a51ae,	0xaa1fc1aa,	0x84faba78,	0x74e7675a,
-0xb8b6c3d2,	0x2bf10867,	0x372e7c86,	0xe41e6e82,
-0xa4a14b4b,	0xccd7934d,	0x9dfd2ab8,	0xf85e71fa,
-0x0b03de17,	0xab711a2e,	0x0c3667b5,	0xc1168ffd,
-0x8f136051,	0x404a38d9,	0x4b1c5b34,	0xea938905,
-0xd7e8ca3f,	0x76e7c24d,	0xd12d7b32,	0x83d3d1e7,
-0xcbdf10fa,	0x56c9a35b,	0x487ddb54,	0x2625fb37,
-0x58115a05,	0xd7ba9677,	0x32485abd,	0x7f1cf033,
-0x1363fcf5,	0x498429a7,	0xcee7b643,	0x4a143dfd,
-0xc7277108,	0x540a1db1,	0x8f382d79,	0xe6d57a47,
-0x7573ff7c,	0xab24a417,	0x038c794e,	0x3d554bae,
-0x7701c302,	0x7503f382,	0xd78eb998,	0x981f748f,
-0x8674777e,	0x50d1d36a,	0x720d2a1c,	0x5a73a23e,
-0x6c11d5d5,	0x5a50129d,	0xb102a470,	0xa7725c61,
-0x50367f63,	0xb40cb199,	0x36e40d6a,	0x351e6215,
-0x844a1961,	0xd7e04ed3,	0x840dd7fd,	0x6d1cca8a,
-0x8e87c6fa,	0x71577bfa,	0x0f332230,	0xee23eda7,
-0x693f76e9,	0x3c8ed3c4,	0x6a72fca5,	0x91bc7dde,
-0x8353ad65,	0x7fd77a7f,	0xc9fb1685,	0x63d52396,
-0xc58586cf,	0x1513f259,	0xd0b1b6c1,	0x50ccee15,
-0x4bf40990,	0xd78a2a7a,	0x4e356a76,	0x9db0a659,
-0x8472ca4c,	0xc74eeff6,	0xe5548c38,	0x4ca3343d,
-0xa380a749,	0xfcbba8c7,	0xec8b5df2,	0xf290a3f6,
-0xda4fc91c,	0x4e037ff3,	0x369ee32b,	0x1e4f0d76,
-0xe771cddf,	0x165aed55,	0x28b0b90b,	0x67d033e5,
-0xbd763f03,	0x5bd5e38e,	0x4295e5a3,	0xa293db4f,
-0x5f607ab4,	0x5322a0d0,	0xc94c8c94,	0xeceded4d,
-0x73785c71,	0x17e0bf88,	0x7f5c0911,	0x98d8710f,
-0x567d8325,	0x4761278a,	0xb8f49fd0,	0x22ae4f2c,
-0x5b913027,	0x31da1fbb,	0xa859ccd5,	0xf628dcd8,
-0x0c08f212,	0x757dd74a,	0xa3483622,	0xa4afab73,
-0xf85495fc,	0x79aeba4c,	0xf760fedf,	0x37e9980a,
-0x70afa8a8,	0x771fccd3,	0xabe409ae,	0xa3caf014,
-0xc61bb263,	0xdf6f080a,	0xa1b1a7a1,	0xd4cb1433,
-0x772173b1,	0x127e2a84,	0x6078ed37,	0xe9ae0d72,
-0x068deb2e,	0x538509b0,	0x3745ca8c,	0x80411c2a,
-0xdc0af1f1,	0xbf1bd266,	0xddb1e7da,	0xe58b0f03,
-0x8cf24e18,	0xb082104a,	0x3f3bf7f5,	0xbc52c82b,
-0x7c289318,	0x91621c7e,	0x61ba7282,	0xe057ef2a,
-0x2c7490ec,	0x636ed4f9,	0xef4ee885,	0xc2102cd3,
-0x03b096fa,	0xa721a20f,	0xe2e2de9b,	0xdf99ee9c,
-0x63e87140,	0x98f04a3b,	0x998a1415,	0x47d425d5,
-0x81e18b1e,	0xfd75cd73,	0xda911e2f,	0xa131759c,
-0xe609c123,	0x8bcf7251,	0xa062ca69,	0xf1254c75,
-0xca0c3afa,	0x2b620162,	0x8f05cdc7,	0xf5e35e5d,
-0x694d0ada,	0x9c30edcd,	0x91fcd15b,	0x7c4da71f,
-0x8133bb65,	0x60c41108,	0xc8fe6ebe,	0x24baed41,
-0x327b23e2,	0x3823edbd,	0x77a223e9,	0xeb2d7390,
-0x16068273,	0xe63bfd53,	0x0f29df30,	0x27d62905,
-0xf0ac1652,	0xe6f5f20d,	0xfee7aab7,	0x6e6aa877,
-0xb61f6c21,	0xca0b9dde,	0x16b8384c,	0x8eab3c80,
-0x0de85346,	0x3d3d32e5,	0x58663398,	0x0b0b33e9,
-0xd154d1f5,	0x5c747425,	0xe4228b0b,	0x856dcb01,
-0xa716d47f,	0x805c4ca7,	0x1d815217,	0xd8a0cf3f,
-0x42f34017,	0xba088929,	0x80a2cd8a,	0x517ffe63,
-0x20aa7c69,	0xa72d7746,	0x165e2f6a,	0x93e5568d,
-0xf8f31ded,	0xd1598f8a,	0x2fda6076,	0xa31b5c80,
-0x8d43b7f2,	0x7d2375c1,	0x2a00e4b7,	0x1040cf38,
-0x264e88d7,	0xc8abe360,	0xdfe13c3e,	0x3b750fb9,
-0x406183c3,	0x78bc2427,	0x334b01d1,	0xc26cad7a,
-0x88b72b50,	0x1bc1d63c,	0x32810eca,	0x80f6a523,
-0xa141a57f,	0x32ce732c,	0x68556d26,	0x72a0dc26,
-0xdd25e4c0,	0xa61f2404,	0xe1592e10,	0x4698acc1,
-0x7d80e659,	0x0913ddf7,	0xda82f04b,	0xb788cd43,
-0x3de72856,	0x8bc444d2,	0x1d3dc87b,	0x2380fbc0,
-0x434fd2d0,	0xa37cc127,	0xa5806f48,	0x2bbd90ae,
-0x0c4d4ebe,	0x6a9306ba,	0xac3254d9,	0xd7cefc84,
-0xc98c0ca7,	0xea8bb1c6,	0x16851fe0,	0x02c28a65,
-0x76324463,	0xac6c62c3,	0x9bb2ce0d,	0xe7f220ba,
-0x59a250af,	0xf432731f,	0x555c8843,	0xb0fbdbf5,
-0xc4f37431,	0x64d68150,	0xb9da0993,	0x9321efd2,
-0x67e301bf,	0xf6c6ea44,	0x3092635a,	0xd1ebed53,
-0x02115815,	0x22815a78,	0x74c011ea,	0x303b0004,
-0x317bc945,	0x79fffdb5,	0x0f5aed16,	0xaf6eabb2,
-0x93624d52,	0x8d9cdf73,	0xd5656d1a,	0xbc7a2d44,
-0x880f264f,	0x1db87830,	0x2db5e687,	0x89d6bac3,
-0x7d3e0955,	0xb3b5db9f,	0x0d9405b8,	0x22f818be,
-0x292e26fd,	0xb461ebc9,	0xa6b5ddab,	0xa6e4f23e,
-0x2a088cfb,	0x9fc5b8d6,	0x59b210a7,	0x1498dd36,
-0xe4e9feaf,	0x1a47f3b7,	0xfc5693bb,	0x52076044,
-0xe2074937,	0x9762fcfa,	0x0700fd20,	0xc324f305,
-0x3a7e03a2,	0xc766ab10,	0xa17541e4,	0xbce64eaa,
-0xe68c5ae4,	0x5bf60a02,	0xf89f055e,	0xf13ccc98,
-0x969b0106,	0x22191c6d,	0x8d2e0add,	0x33738386,
-0xd3363e1a,	0xf2e5e217,	0x6bf72eb3,	0xa2159955,
-0x322bc2f9,	0xdce59e07,	0x1a403d7a,	0xd40da160,
-0xce583705,	0x705b002e,	0x53e38536,	0x0b46b6f4,
-0xc889d7c7,	0xf282eac8,	0x864fc78f,	0x2de9689f,
-0xed001e5a,	0xdafae8d0,	0xc3407619,	0x2ae6a6ea,
-0x69713a02,	0x7bb17fcc,	0xfec1da98,	0xa607c8e6,
-0x99e36005,	0x11e5b59f,	0x8ec18208,	0xf067d7f4,
-0xe8a608b5,	0x26207dd2,	0xc7cb8146,	0xbaf6d7ad,
-0xf47df435,	0xc54522c7,	0x748a8b8e,	0x99e794eb,
-0xf2bf9683,	0x52f62b6c,	0x82b46215,	0x572d1d5e,
-0x04c0f1df,	0xe6509ba2,	0x970a88ff,	0x152fc27f,
-0xb93c6389,	0x0146abd0,	0x871834e7,	0x5eb57bc0,
-0xaa0aeb71,	0xa52b0f4c,	0x241780a7,	0x64793af4,
-0x5aaf4d43,	0x3cdbee68,	0x3dca4e19,	0xbaeebf0b,
-0x320a8567,	0xe11a3bd2,	0x9b1d91a6,	0x810d70ce,
-0xd1283978,	0x0d125cae,	0xb013fa71,	0x2bc20620,
-0x3d5d2ff7,	0xde44d71c,	0x7fc69f0d,	0x4ad2e8af,
-0x2f14b582,	0x6853bf2b,	0x68919517,	0x9d5f6509,
-0xd9fab7ca,	0x7a6ce651,	0x8f982024,	0xb5547784,
-0xae74490a,	0x714065fa,	0x405372cc,	0x3a58a46f,
-0xe78230ca,	0x55cef9c0,	0xdbcad2d7,	0x962ea979,
-0x33832922,	0x9673c257,	0xe2a54fc7,	0x758afe4a,
-0x697c69cf,	0x1d03764f,	0x3c472146,	0x11bf0aad,
-0x07d02cc8,	0x61d2ba2b,	0x1c8b3139,	0xa8e1b0dc,
-0x2c90ea31,	0x6103556e,	0xd0e94b78,	0xe3314ab1,
-0xd2cf23ca,	0x04763ea4,	0x4cffeb72,	0x25ec80ed,
-0x63aaba43,	0xaa340488,	0x85e9a636,	0xfcdd73c1,
-0x14ddf111,	0xec29eec7,	0x8acfbdae,	0xd545844c,
-0x222077aa,	0xb3914d02,	0xd0828004,	0x3dfbaecb,
-0xa9b3094b,	0xef71cf12,	0x553fb47d,	0xc1d0cd93,
-0xd7ba76a0,	0xfae66db4,	0x18c47d41,	0x3aa84d32,
-0x175836ff,	0xdd3c5f15,	0xe45bc3da,	0x2cc8d22f,
-0x33bcf111,	0x1318ceed,	0x859f7c6d,	0x5346115c,
-0xae7ac501,	0x7d10961b,	0x6df6c9e1,	0x07a9a3ae,
-0x13e284a8,	0x658ef9f8,	0x20245391,	0x9822ef01,
-0xc1457049,	0x4cdb8fce,	0xf466eb27,	0xf0e3554f,
-0x644780ba,	0x4fa1bd26,	0x82f5f7c9,	0x367fbc36,
-0x75aac234,	0x8950f1e4,	0x73eef9b8,	0x106b26d4,
-0x154ac50f,	0xc928a55a,	0x8aecdff8,	0x6bea8c50,
-0xf819b422,	0x4dde53cf,	0x83e2d7bb,	0x711b4da1,
-0x8c63329c,	0x0117361e,	0xbdf6b395,	0x3ce2ad71,
-0x13afbd7d,	0xd9363170,	0xc07606b5,	0xb3e57512,
-0x34eeef15,	0x9d308933,	0x5d1f96ab,	0x6bdc81f3,
-0x74e0ad20,	0x436731ce,	0x924dd479,	0x39e04f1d,
-0x15e3fc6c,	0x89c73eb1,	0x56d7a3f1,	0x6d90ae82,
-0x1b85ef26,	0x328fcad2,	0x28acd6ad,	0x221ece3b,
-0x918ee52d,	0x869de6a0,	0x8e67660a,	0x57a65605,
-0xc16e2019,	0x5b1a8b07,	0xbb76a606,	0xb864e189,
-0xb42f7ec3,	0xddd14d1a,	0x2d9b60ea,	0x06ab5c4a,
-0x3a5f0e8a,	0xd8a2925f,	0x69c60a15,	0x31aacc3d,
-0xb696029e,	0xf1db51f3,	0xf5a2fc5c,	0xf865e873,
-0x12838c07,	0xac5402f5,	0x4a4d06c9,	0xd376714f,
-0x99afff3e,	0x8faa34e1,	0xc41d60b4,	0x9771a02b,
-0xf054ae7b,	0xedf372df,	0x825d7c86,	0xe3072c73,
-0x0005e224,	0x31c57f28,	0xc16a1696,	0xf53e5497,
-0x7ef862ed,	0x7c6aa7fa,	0x78a74bed,	0xf95a114e,
-0xaa361ba1,	0xa191f3cf,	0xed1a7af2,	0x2f551a17,

cpu/intel/model_4065x/microcode.bin

diff --git a/cpu/intel/model_4065x/microcode.bin b/cpu/intel/model_4065x/microcode.bin
new file mode 100644
index 0000000..8844eae
--- /dev/null
+++ b/cpu/intel/model_4065x/microcode.bin
Binary files differ

cpu/intel/model_4065x/microcode.h

diff --git a/cpu/intel/model_4065x/microcode.h b/cpu/intel/model_4065x/microcode.h
deleted file mode 100644
index 57bc635..0000000
--- a/cpu/intel/model_4065x/microcode.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "microcode-m7240651_0000001c.h"

cpu/intel/model_65x/microcode-MU165040.h

diff --git a/cpu/intel/model_65x/microcode-MU165040.h b/cpu/intel/model_65x/microcode-MU165040.h
deleted file mode 100644
index bd41bf9..0000000
--- a/cpu/intel/model_65x/microcode-MU165040.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU165040.inc  */
-0x00000001,	0x00000040,	0x05251999,	0x00000650,
-0xb6a8b9b9,	0x00000001,	0x00000001,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x601e3c82,	0xe5a7e267,	0xbac45110,	0xf789f850,
-0xba6aba81,	0x2afebde2,	0x21a7efcb,	0x2c955f52,
-0x6fc277b1,	0xcc2e99c5,	0x26ebf8e1,	0xc0b5fe1c,
-0x4e879083,	0xa9264124,	0xf468ff13,	0x0bb4db3f,
-0xf741017f,	0x59e89ef5,	0x749f5029,	0x75eae17e,
-0xb173d6fc,	0xa1aa6c88,	0x989b3c2f,	0x61acd68b,
-0xacc61f2f,	0x573d81a9,	0x48dcd515,	0x5804c273,
-0x1cac96f9,	0xf0fb741f,	0x31ffa59f,	0xa14a8b31,
-0x82ff639b,	0x5e9a7e4e,	0xa081483a,	0x234a57ec,
-0xe468eb19,	0x79b183d1,	0xbd3c1114,	0x0ad767be,
-0xe8422277,	0x893322b5,	0x16b54d35,	0x16f4baf4,
-0xdf12aa92,	0x9f1716cd,	0x6ce23144,	0x85524280,
-0x76c31610,	0xe86bdee7,	0x8cf04199,	0x98d99747,
-0x53c209d4,	0xacc2aa48,	0x342d454c,	0xe9327a0c,
-0xfc57b773,	0x055732dd,	0x279b60b3,	0xd9fc24e0,
-0x0d327b77,	0xdcdfd4c2,	0xe23250d4,	0x0a5d96a0,
-0x47b108d2,	0x0adab0b3,	0xb41f6699,	0x28a5398b,
-0xef3f4303,	0x35be207c,	0x4e6f9e76,	0x3f7834a9,
-0xb50796ab,	0x3185e1ad,	0x0a38fb5d,	0xe5464beb,
-0x751c4e5e,	0x482d4169,	0xc56047fb,	0xf616f12f,
-0x743decdc,	0xdfe401b9,	0x612c7cf4,	0xf8304c02,
-0x2885c3b6,	0x2d961bc7,	0x9f6a38f7,	0x97f6f1f4,
-0x5ca2ee99,	0x0e94f902,	0xd10a1ac9,	0xb36c2107,
-0x015fecbc,	0x02a2a183,	0x716daf36,	0x4990aa8e,
-0x06bfb540,	0xf4a407f5,	0x689fa6a8,	0xcd05353f,
-0x3c598553,	0x026cb343,	0xb85e95ca,	0xf5d1c7bd,
-0x363c740a,	0x89ef13a4,	0x3afba31d,	0xf02bc3a7,
-0x80d889df,	0x489c54f7,	0x99a2b71d,	0x88f4dd0a,
-0x6b3f6384,	0x65e14382,	0x02d40f2f,	0x2f46ef94,
-0xc5c715cb,	0x60ea1752,	0x4e238f77,	0xde0a1049,
-0xd75774bc,	0x58faacf8,	0x81ed4268,	0xe9d387d1,
-0x9d638a9e,	0xe0a27ad1,	0x6e94dca1,	0x7ee5fcc3,
-0x819a7d58,	0x85c258ac,	0x14f2b0b1,	0x65f4c7f7,
-0xe1c9aa7d,	0x714e6201,	0x990ff117,	0x5d7af3dd,
-0x41fb4988,	0x1cdfa982,	0xf1fc11b7,	0x60e7a309,
-0xb6a789c5,	0x70737ff3,	0xc2fa3fe3,	0xbd407b3f,
-0x39ad84de,	0x76b8d442,	0x2a778268,	0x5d1d390a,
-0x77ac2c16,	0xa4cec96f,	0x8c7a6045,	0x8b258bfb,
-0x5a6a3154,	0xb0d0fc87,	0xe63a160d,	0x3dc8b9ea,
-0x62c373f2,	0x0681a8fa,	0xd5eb4033,	0xdbf53e00,
-0xb6863aec,	0xb3310839,	0xd8f994f2,	0x59d656d4,
-0x02db8c87,	0xcfa1529a,	0x6c4bb4c1,	0xd6097838,
-0x60b1e0d3,	0x33afe51c,	0x8e57c238,	0xeab39da5,
-0x133b7741,	0x7b031f5e,	0x8b4ff0c8,	0xa8e779bd,
-0x8676a9de,	0x6c133026,	0x37f3ea88,	0xdf864b39,
-0x6b7e9022,	0x213ca570,	0xb9aa6a56,	0x746208cc,
-0x677d2980,	0xc7e19363,	0xb5c89ecf,	0xa513c816,
-0x5f76f49d,	0x0b250ddb,	0xefc3f81f,	0x9fd57e7a,
-0x75386d0d,	0xa78b1410,	0x64f86f55,	0x50f9c555,
-0x7cad7829,	0xd0a4e891,	0xa2df6517,	0x128751d6,
-0xb29d7543,	0x9915052e,	0x8e32a38f,	0x17b1bb9a,
-0x6fe77ff1,	0x65cc92a1,	0x5fcb90da,	0x60565207,
-0x45e5f86a,	0xada512e7,	0x9bd77ad3,	0x8203292b,
-0x24598065,	0xa8029582,	0x486b4e11,	0x7041340f,
-0x763bafa2,	0x14f408a4,	0x71b784bb,	0xa4c11a9a,
-0x9f872d6a,	0x946251ae,	0x6fcf6747,	0x1e354c9f,
-0x82316b09,	0xcc8f682e,	0xce89240c,	0xfa2057b1,
-0x4ec8ed87,	0x32ab439a,	0xbbf6f7b1,	0x0c55ebda,
-0x04590c3b,	0x94aae71c,	0x41263f82,	0xd4a0fd58,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_65x/microcode-MU165041.h

diff --git a/cpu/intel/model_65x/microcode-MU165041.h b/cpu/intel/model_65x/microcode-MU165041.h
deleted file mode 100644
index 94c2b63..0000000
--- a/cpu/intel/model_65x/microcode-MU165041.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU165041.inc  */
-0x00000001,	0x00000041,	0x05251999,	0x00000650,
-0xbc120ef5,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x7e76519e,	0xe3f74799,	0x3af64fe9,	0xa7d62bb9,
-0xbb89ca97,	0x3d0dbae6,	0x893aefcb,	0x87225797,
-0x360ecae7,	0x98055f79,	0xbafb6168,	0x47b4b45d,
-0xfee0e965,	0xcb1412f0,	0x30f49e5e,	0xcbd9a334,
-0x86ad899a,	0x0b77df32,	0xa6a92a8d,	0xddc09b3b,
-0x470d70e4,	0x9b7f9f70,	0xa698053a,	0x28e892a8,
-0xf0444ac1,	0x83db3cc1,	0x4f5ef1b8,	0xf7c5e1e0,
-0xe2e9d7ee,	0x1bffc291,	0x846c4754,	0x969086de,
-0x386a0c4d,	0x9d7ed4ff,	0x863f6638,	0x66bd6bb5,
-0x8b27bdd7,	0xe8b31939,	0x53badccc,	0x8a3609f0,
-0xa4abd8a5,	0x57e361f2,	0xe8a620f1,	0xaedb6c10,
-0x64cb41a3,	0xcae3f75a,	0xebd6c20d,	0x70441f38,
-0x81baa0f0,	0xda741b2b,	0x71928a31,	0xe0c2a8b1,
-0xf5ec92fd,	0x3d0106fb,	0xc9213fa1,	0xd18dfcad,
-0x745aa758,	0xd6756497,	0xb0d0edca,	0x3b82cae9,
-0xa11a3cbb,	0xef0ccae1,	0x1c3dde9d,	0x9c51b887,
-0xb492e30d,	0x08cc3fa9,	0x88540d5b,	0xd534d068,
-0x46310617,	0xb09f621d,	0xb35b272d,	0x0d6ade93,
-0xc8ea5e48,	0x9910fc17,	0x405ae2a5,	0xeabe75f6,
-0xe30d44c7,	0x54d998a7,	0x8be13a9e,	0xee749ea9,
-0x4ee14c60,	0xb97f33bf,	0xdfa4d3a1,	0x72138db2,
-0xc0e2a9de,	0xfa51201a,	0x2a66908c,	0xf00413a6,
-0xcda476c2,	0x349ef9ca,	0xd9cc5827,	0xcfd42c2b,
-0x6e43c59f,	0xe6488442,	0x8e6b5128,	0x5c342d58,
-0xcd93d18c,	0xa0338ab9,	0x50a109e2,	0xce1fdfb6,
-0xe156fd23,	0x5a8ab4f2,	0xfd877e15,	0xe27f7c42,
-0x023b791e,	0xf7a3576b,	0xf2e85a4c,	0x152c3077,
-0xbc8bf1be,	0xcb8ce737,	0x1a3ef077,	0xbe674ac0,
-0xbb58a8e8,	0x0b5efc96,	0xaa70c36a,	0xbf232d8f,
-0x4a173ad5,	0xbf2d5f44,	0xfbe55d39,	0x6d34c5c8,
-0xb5a5395a,	0xf09c85c6,	0x59fa5bfb,	0xa3a88e24,
-0x8baba56d,	0x6e7a2b4d,	0xd6dc185d,	0xa2928bcc,
-0x7ad3b0ec,	0xc10b640e,	0xbf0c3bef,	0x497506c9,
-0x8a916b56,	0xbce57d43,	0x2005fc34,	0xbceb8c26,
-0x9eed6b54,	0x1f980a86,	0x93a742b0,	0x9bb3cd72,
-0x45b04f20,	0x87f23d21,	0xce9dc199,	0x4213d168,
-0x81960d1f,	0xeadaa7e5,	0x7b6ebd42,	0x9f31ab27,
-0x9ae749c0,	0x49be575d,	0xf8afb238,	0x8bb905b4,
-0x74842213,	0xd2e5c154,	0x87054f04,	0x62ce0156,
-0xb6caab1d,	0xa693348a,	0x1057003e,	0xa3c5203b,
-0x8af21d88,	0x23619382,	0x9c065f7a,	0xb51f3d1a,
-0x7b90340f,	0x9d69951d,	0xc8f1c2f1,	0x6ba8da99,
-0x8ef51252,	0xcc36317e,	0x7aed3ce7,	0xde1b9d47,
-0x9c860b63,	0xe06cfbd4,	0x6dc6929a,	0xc75313b5,
-0xc1ef067f,	0x1b887719,	0x2e1a2dc3,	0xd01815d6,
-0xe657f6e1,	0x1f947b53,	0xdfd30cd4,	0x3cf4fd2b,
-0x01ac6ac5,	0x0cee5d2e,	0x0e4c5354,	0xb4e7e3c6,
-0x334e4bf2,	0xbd24ed1a,	0xa6240eed,	0xc1106c93,
-0xa22c3237,	0x77803217,	0xd4487c3d,	0x999f7c88,
-0x72e4cff9,	0xe15f44d2,	0x93a3e254,	0xaed5d723,
-0xff7e2b22,	0x56c82c9f,	0xbcd60726,	0x343d7d03,
-0x5d02a7ec,	0x7f3b10cb,	0x1f58a60f,	0x362ad6ab,
-0x51e4ef3f,	0x4bf657a1,	0x01046a8d,	0x3aff1983,
-0x5eaaa3d3,	0x947b35a0,	0x225ed134,	0xc91d61d2,
-0x98b7a545,	0x8310dcb5,	0xd085a7d4,	0xdd85e8c2,
-0x97a873d1,	0x7faee475,	0x4cf26f63,	0x4bd7aa27,
-0xe2664a65,	0x97e96c2f,	0xb88267f7,	0x4fb40f0d,
-0x43cd3450,	0x0e160efc,	0x9c0b4f19,	0x2c5e5fb1,
-0xdc5e7d64,	0xc3da5a8d,	0x6ffe0dbc,	0xc330555e,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_65x/microcode-MU165045.h

diff --git a/cpu/intel/model_65x/microcode-MU165045.h b/cpu/intel/model_65x/microcode-MU165045.h
deleted file mode 100644
index cc37129..0000000
--- a/cpu/intel/model_65x/microcode-MU165045.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU165045.inc  */
-0x00000001,	0x00000045,	0x05251999,	0x00000650,
-0x429c2f70,	0x00000001,	0x00000008,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x77567ca2,	0xdfef9b71,	0x3f95a175,	0xbb90abf9,
-0x8207c844,	0x2e319608,	0x84aac65e,	0x97aa48bf,
-0x19162ecb,	0x8e8992b4,	0x96080bb2,	0x53c01831,
-0xc29ef4af,	0xf967b0ab,	0x1b842ce8,	0xcd848c67,
-0x904a21dd,	0x3b072641,	0x801b9ca3,	0xc96a0995,
-0x5f083b53,	0x9f008055,	0x80da3025,	0x119500bb,
-0xd2c61199,	0x892c8e81,	0x51eed326,	0xd205a6f6,
-0xc1967209,	0x1f39e8c7,	0x9d4d2e7d,	0x80f4c001,
-0x13660fb4,	0x9dd8c7bc,	0x81f8d10d,	0x44160784,
-0x9430ba2d,	0xd242a7ab,	0x49262fc4,	0xa5662a95,
-0x9f908eca,	0x763b7ac2,	0xefcf36d6,	0x8f42d959,
-0x7f927c4c,	0xfa380ebb,	0xe8d5ccde,	0x51386ee4,
-0x9fb76469,	0xc0c896b7,	0x5afa6156,	0xc1c61ab6,
-0xcbb860b8,	0x0e7758a1,	0xc3209fde,	0xf676d946,
-0x43468b8d,	0xf83b6ba7,	0xb56e1439,	0x1222a434,
-0xb956c9a1,	0xe9deb385,	0x178da51a,	0xa62b724c,
-0xa3229fdf,	0x082ff04f,	0x8417980a,	0xf1528736,
-0x6415599a,	0x97a65c19,	0xb50eb28e,	0x333b4cbf,
-0xdcca5404,	0xa09f560d,	0x755c054e,	0xdc1a6982,
-0xe4d4bc36,	0x6c55c9ca,	0xbf786948,	0xd109ed91,
-0x47825bca,	0x9d75c244,	0xda540f0a,	0x58b6257e,
-0xdca5de08,	0xc16a0599,	0x10253e7c,	0xc3ffcd71,
-0xce2cacfe,	0x08cc52bf,	0xcc7984bb,	0xc51015f5,
-0x4f5c63e4,	0xd90579b1,	0xa3c29d6e,	0x73223879,
-0xf28aa49f,	0x8738c565,	0x7ef3a081,	0xfadd4de5,
-0xc249b462,	0x781b54c3,	0xdbf9068a,	0xe5db043b,
-0x1e3e4b5d,	0xfc0341d7,	0xe9d68d5b,	0x194ddef0,
-0xbe3ab885,	0xcee97f92,	0x26e94d85,	0xb089a6b3,
-0x99aab45d,	0x0ef69511,	0x97164174,	0x9aaa723f,
-0x44079aaa,	0xbf0b8301,	0xd1c6a2ab,	0x49ba4615,
-0x970a58ff,	0xf0ddafb7,	0x6039c5a8,	0x9e8acf82,
-0xb0b751bf,	0x6b6b70e2,	0xd6f67974,	0x9e7a2da7,
-0x679fba31,	0xf6629688,	0x92f55661,	0x6097934b,
-0xb6a5725d,	0x907eb122,	0x2db0e80a,	0x995b25c3,
-0x93c5af5a,	0x09b5fb9c,	0x993368d4,	0x960d6435,
-0x47f945ed,	0x96c93de4,	0xd7554230,	0x6cba9648,
-0x9b1dd64a,	0xfd17d8f6,	0x65014cb4,	0x9d012e62,
-0xb3825899,	0x69090810,	0xd85586b2,	0x9ea90f07,
-0x619e2e88,	0xf7b8dc3f,	0x9aa3e382,	0x640a250c,
-0xb8f526aa,	0x9bc79c25,	0x2439ef0d,	0x9b0c2b78,
-0x951c0ffa,	0x08dcd2bf,	0x90419137,	0x98a998ae,
-0x4092c96c,	0x95092d4e,	0xda47daf1,	0x6a1220ea,
-0x9b6c5952,	0xf1f84308,	0x6c505131,	0xac214e2b,
-0x95f2eca7,	0xfe7fead7,	0x6a9cf8aa,	0x622c88a9,
-0xf4d7256a,	0x90f1ea74,	0x91a952c5,	0xf5b5053a,
-0x63156e90,	0x9077a768,	0xfabf56e0,	0x674c82fa,
-0x9593925c,	0xf35daf0c,	0x6d0741a2,	0xb0ec7e7a,
-0xfac81dd7,	0x45759cce,	0x9d839eaa,	0xdd8ff52a,
-0x697da918,	0xbbcda9c1,	0xd4cf0e4c,	0x93c25ecd,
-0xb402595d,	0x22a34122,	0xb502962c,	0xbdc66ed7,
-0x0d0d84cf,	0xb4b33d9a,	0xbd26b700,	0xf5b50344,
-0xb27038f8,	0x46395131,	0xf0821443,	0xba488f6d,
-0x4b2873ad,	0xf972fb86,	0xb6e6cb92,	0xbb1e0b12,
-0xf12e1951,	0xb516f5fc,	0xb03c3d64,	0x035368a4,
-0xb2cbc2ad,	0x4f9e3586,	0x07d591b6,	0xb8d4e609,
-0x46adb34a,	0xf861d111,	0x2469e74b,	0x675faad9,
-0x66925df7,	0x0be0f3ef,	0x1af7414a,	0x5717dff4,
-0x776645dc,	0x2d6bb333,	0x2c75b8d6,	0xce922072,
-0x5d1495df,	0x98454968,	0x308b2e62,	0x605b0727,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_65x/microcode-MU165140.h

diff --git a/cpu/intel/model_65x/microcode-MU165140.h b/cpu/intel/model_65x/microcode-MU165140.h
deleted file mode 100644
index c85336e..0000000
--- a/cpu/intel/model_65x/microcode-MU165140.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU165140.inc  */
-0x00000001,	0x00000040,	0x05251999,	0x00000651,
-0xf400b4ac,	0x00000001,	0x00000001,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x978e6872,	0x4a954835,	0x53c01813,	0xdcaa7300,
-0xd8e79e18,	0x93eacfcb,	0xb49d8293,	0x171068f6,
-0x0697234d,	0xbc011718,	0x034c178c,	0x98c3d1c3,
-0xee0ec142,	0x4e179169,	0x8a456d4c,	0x15a3f45c,
-0x8ed57f11,	0x513f0ca7,	0x500b0ed8,	0x34fc5991,
-0x58614871,	0xe03c8839,	0x66cd82e3,	0xd86d4bf4,
-0x972e0f2b,	0x151eb98f,	0xcd569727,	0xe1da8c92,
-0x65b6f7ca,	0xfbc0307b,	0x204cc2d5,	0xa8cb450d,
-0x5aa46728,	0x107c287d,	0x6e52e62d,	0xf9c149b6,
-0x3d0985dc,	0xe8fbee2b,	0x7ce7f886,	0x8afb1cb6,
-0x9015e6fe,	0xf4aa5390,	0x7516d0b2,	0xeaf9dbfc,
-0xdab704d9,	0x695a8a53,	0x7565bb58,	0x496ed34a,
-0x25c25f1e,	0xcc9b0cba,	0x660cbd00,	0x6e929aee,
-0x57f34393,	0x624ff648,	0x80228d01,	0x72843de0,
-0xb1d435a8,	0xed3668d2,	0xfd8464fd,	0x31e001c3,
-0x759930ed,	0x9603c659,	0x400cfd6a,	0x5f419e25,
-0x4006fa37,	0x2e537230,	0x21353219,	0x84cbcde5,
-0x1782e581,	0xb88b9878,	0x34323718,	0x60a9a7bc,
-0x2e014802,	0x66bf4487,	0x0801c652,	0x27361269,
-0xa5311cb9,	0x658b21a5,	0x8c09eb3f,	0xe209566d,
-0x0898b464,	0xc4a7867b,	0x275b6344,	0x0153a992,
-0x4dfd837a,	0xf94d1c68,	0x40804d7b,	0x7edd120d,
-0xdfd143f8,	0x60487686,	0xed802dfa,	0x1a5f81b2,
-0x262fad43,	0x88fcb395,	0xf5c49176,	0x35e70380,
-0x242ea915,	0xaed8703e,	0x82606b9b,	0xdf7a6064,
-0x3c8f5acb,	0x22cf8e69,	0x6aba405d,	0xaed70597,
-0x3e789182,	0xbad3f3fc,	0x61c293e0,	0xdf0fe4e9,
-0x99574cb6,	0xc80a031d,	0x886a54a2,	0xeb22d96f,
-0x08b18717,	0x32b63fce,	0x258998dc,	0xa93021e9,
-0x2044456a,	0x6265412a,	0x6e1afa4f,	0x33756610,
-0x4e87c563,	0xcfc5e188,	0xea6b47ad,	0xf4618fd5,
-0xb0f3bfa7,	0xa1f6d887,	0x3fdb56e4,	0x19a96630,
-0xb4e75181,	0x5054b634,	0xb7b6da3f,	0xd46d4142,
-0x66500245,	0xfb8dab60,	0x4b61ac96,	0xe612ef3f,
-0x75b98baf,	0x2a555089,	0xbed7cfd0,	0x71e743fb,
-0x1dbcb21d,	0xacd80174,	0x30da97db,	0xae582b25,
-0x1afb117f,	0x6ace51d5,	0xd9a0e1e5,	0xdeffbb76,
-0x7f7f1890,	0xc7eaa76e,	0x7d325c0a,	0x036d7c35,
-0xfb182347,	0xe649a621,	0x749b62bc,	0xdd9caced,
-0x64313f94,	0x20660b45,	0xa2a5afbc,	0xdebcdf26,
-0xfde5cfce,	0xffd981fc,	0x9f933d4c,	0x1ff8e311,
-0x4ae23887,	0xe5921b7e,	0x5a93ac85,	0x46bfea57,
-0x1b608a97,	0xeb9fe397,	0xd831c985,	0x40bf1cd9,
-0x4de5b32a,	0xf06d3e3e,	0x36e0b4a6,	0x1e074f65,
-0x2faa9139,	0x0d27ac70,	0xe6c0c61c,	0x361d2373,
-0x1a4e0f0c,	0xd14aaf48,	0xcc3dd712,	0xb908cda3,
-0x524be3d7,	0xd2623839,	0x2fd3346d,	0xd01f5f83,
-0xea0196b5,	0xe38b8397,	0x28692010,	0xb145aa3e,
-0x332075f5,	0x73e29850,	0x160f25e0,	0xeba33412,
-0xbc7b06cb,	0x1db2194a,	0x0c7af328,	0xe438c0ca,
-0xcbf83d1d,	0xad264b9e,	0x6d59bc34,	0x56925253,
-0x478c85ce,	0x30e9ab37,	0x8f52dd68,	0xc3749bfc,
-0xefe408cd,	0xc0690548,	0xdbeef174,	0x4faa1b0c,
-0xf6cc7694,	0xec774556,	0xae02772a,	0x8e076839,
-0xe13c8a74,	0xb82a927f,	0x578e05ca,	0x0701f5ec,
-0x2b095f0c,	0x413ac09f,	0x274d4a87,	0x22412734,
-0x6b525b89,	0x9759891e,	0x137e11ad,	0xf31f8a13,
-0x7e763847,	0x74a68800,	0xe5d01275,	0x83c39d58,
-0x2a78a748,	0x26a368ed,	0x0ddc2775,	0x20282b9f,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_65x/microcode-MU16522a.h

diff --git a/cpu/intel/model_65x/microcode-MU16522a.h b/cpu/intel/model_65x/microcode-MU16522a.h
deleted file mode 100644
index 084e59f..0000000
--- a/cpu/intel/model_65x/microcode-MU16522a.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16522a.inc  */
-0x00000001,	0x0000002a,	0x05121999,	0x00000652,
-0xc8b34cc7,	0x00000001,	0x00000001,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x76f00e60,	0xb9434a7f,	0x5e9ab4c2,	0xcd0a8081,
-0xcc2c6b4c,	0x481bff6c,	0xa81c6bb8,	0xef5c8363,
-0x6e44f08a,	0x9011d878,	0xed520c57,	0x22571828,
-0x939f7c98,	0xa8e6d071,	0x2accc70f,	0xb37b2c5e,
-0xff6baf05,	0x016be7a4,	0xea2623ed,	0xecc84aec,
-0x19c7c229,	0xf7f0886b,	0xc12cadb9,	0x27f0f5ea,
-0x80a157da,	0xe703242e,	0x6d0bb522,	0x9844e0d4,
-0xa58dec65,	0x7567ffe7,	0xe80c9da4,	0xa331e7d5,
-0x5a4b6453,	0xe638a61b,	0xa6cbd089,	0x1eac6267,
-0xa4f3e8ec,	0xbba4fb32,	0x317b7c6b,	0xe17fac53,
-0xc8e0673c,	0x28538606,	0xfbd44993,	0x8ec7e8af,
-0x6c462f02,	0xe72751cd,	0xb22bc0ef,	0x3ad6128e,
-0x99a6222f,	0xbf4c4e6f,	0x122354eb,	0x8fb39904,
-0x9058153a,	0x14e61acd,	0xef511b6b,	0xa9b2f095,
-0x7eaf14fc,	0xdae7a10a,	0xb1d1b2ba,	0x769b0eab,
-0xdb522452,	0xb23d5e86,	0x7de3e9a2,	0xfd2ac952,
-0xff866004,	0x45a75e71,	0xa1e060a2,	0xbfc1c2c9,
-0x424198ac,	0xf823bdcf,	0xefffc562,	0x68b8edf7,
-0xfd4e6d1a,	0xc1f23855,	0x20c0f4e3,	0xa029841b,
-0xc5bd6cfd,	0x79f2ad6b,	0xa13b03df,	0xee971307,
-0x363b0da8,	0x9c077042,	0xb30115b6,	0x3ddb5013,
-0xdfc3243f,	0x85e4159e,	0x0113acb4,	0xebb4bcdf,
-0xff244b7d,	0x12a3aaf2,	0xe19e9488,	0xeb7cefc2,
-0x566252d7,	0xe186da08,	0x93e670ad,	0x7ce6d3b7,
-0xd75bf7cc,	0xbabb15c5,	0x69295dab,	0xc5b3f71d,
-0xf08dceb8,	0x7dd96027,	0x93578a64,	0xd314e608,
-0x78264a52,	0xa08e7650,	0xcdb08bcc,	0x7107fc39,
-0xe51d6c66,	0xd52df3b8,	0x379509e2,	0xc25233d3,
-0xdd9f284d,	0x0682ad5b,	0xdf1bbe5c,	0xd2b96b14,
-0x5442e8af,	0xca921855,	0x99f35d84,	0x72b7edf9,
-0xcabccee5,	0xa477caf9,	0x6fb0014c,	0xcea152be,
-0xfb8253d1,	0x70437bb0,	0x8d9c4443,	0xd8a6177d,
-0x78023d12,	0xa64f4ff3,	0xcbedd7f8,	0x662d9a07,
-0xf45fdfb1,	0xc21ce1cd,	0x30a109e6,	0xcf4abf94,
-0xc59fff95,	0x191f3b05,	0xc36a43a4,	0xdc0bd9eb,
-0x5b2f6677,	0xc71533dd,	0x92eb59ad,	0x6ee37cc1,
-0xcc7fd822,	0xa90f9c92,	0x74860638,	0xce475653,
-0xfd8b3b2b,	0x62fcc55e,	0x907466f0,	0xc8ff579b,
-0x7a953138,	0xb7e9a3d5,	0xcce7f647,	0x72e27e2b,
-0xf37401a0,	0xd12302eb,	0x33518c48,	0xc5c94836,
-0xdd2c112d,	0x17f0aa48,	0xcaf068ab,	0xd6d75439,
-0x5d96ddf7,	0xdcf939d6,	0x9c50d0ba,	0x6b16166a,
-0xdfbdfa9f,	0xa310daa9,	0xde9c8db9,	0x2131f1d7,
-0xd445fc23,	0x0a0cc3ae,	0xd58e33b6,	0x7382cbc9,
-0x15c5b405,	0x76f11b66,	0x6f939b91,	0x1c4d4a57,
-0x65d92f91,	0x75fa89c0,	0x12f3ac58,	0xcdeb4113,
-0x6caca31a,	0x53e4ec31,	0xdbdda96d,	0x8bb3b1e1,
-0x5f325871,	0xc920019c,	0x8fd12227,	0x037dcd85,
-0xd5a992b0,	0xcd68d006,	0x02bbf3d3,	0x5c477b08,
-0xc81dfb22,	0x919d0e0a,	0x5e3dfe14,	0x8b94d4c1,
-0x8ab037d1,	0x003ffd27,	0x91fc1b17,	0xdcb63a69,
-0x0aa59da9,	0xd54442a0,	0xc832489a,	0x7499b7e4,
-0xdf8bfe4f,	0xbe5aa6c9,	0x61a559bf,	0x4d60ef8c,
-0xa8f652eb,	0x15afb0ad,	0x52a9ecf3,	0x4895b467,
-0x143a5c34,	0xbb0a916b,	0x53e69a9c,	0xf53bc838,
-0xb4b830c2,	0x53240c80,	0x536aedc6,	0x89ff32ae,
-0xe8d2e0c8,	0x718b7504,	0x8e6cfcc5,	0x9615fc2d,
-0x7405a9b4,	0xf45b4168,	0x6af78312,	0x1eea41f6,
-0x1d1b43a6,	0x1822d9d9,	0x1b987e6d,	0x13bac770,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_65x/microcode-MU16522c.h

diff --git a/cpu/intel/model_65x/microcode-MU16522c.h b/cpu/intel/model_65x/microcode-MU16522c.h
deleted file mode 100644
index d0bfa9b..0000000
--- a/cpu/intel/model_65x/microcode-MU16522c.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16522c.inc  */
-0x00000001,	0x0000002c,	0x05171999,	0x00000652,
-0x05073130,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x73c82980,	0xf239ca39,	0x577aa64c,	0xa0357a54,
-0xa85ca5d9,	0x5d73bd4e,	0xc12fbb13,	0x7b099edb,
-0x701f7b54,	0x90af2bdb,	0x5fcea607,	0x07db24b4,
-0xda564ef1,	0xcee80b1c,	0xdc8dcb71,	0x173f79d8,
-0xbdc6d5d9,	0x48e69ab4,	0x6753f2c9,	0x9cf9970c,
-0x0a403a42,	0xd2382e59,	0xca8ff898,	0x3d816841,
-0x7290853d,	0xc3c48307,	0xdb774d7a,	0x7fbc8d7a,
-0x06b1a6af,	0xa35c358c,	0x087fd0a1,	0xab417c72,
-0xe7da5c66,	0x240e551a,	0x042223ae,	0xb694e434,
-0x759b9b2f,	0x56ea88d4,	0xd934d341,	0xcb2dc2cf,
-0x1b08897a,	0x16707fc9,	0x7eecaceb,	0xc4903846,
-0x22ab81be,	0x31d0ec20,	0x0a4d7075,	0x7786e56f,
-0x9d5a68ba,	0x40763174,	0x8547e000,	0xe9cc6f7d,
-0x17de3806,	0x5108956d,	0x641f656f,	0x50bd839f,
-0x5c868c4f,	0x32ffd4ca,	0x49abd852,	0x8a940c98,
-0xd152285a,	0x2c4b1d15,	0xa8a5038c,	0x9e40fd0a,
-0x9f390b45,	0x8048e88c,	0x0a5aace6,	0xdf3ad69e,
-0xa8c36431,	0xfe4d3a9b,	0x71246abb,	0x985871e8,
-0x21f0fb32,	0xb12143fb,	0x0a93b00c,	0xe552b0bc,
-0x3466e546,	0x333e61f2,	0x73664ac8,	0x18e813ef,
-0x8512375c,	0x9ececcf6,	0x47ce1e13,	0xcce8549b,
-0x1658234f,	0xde3bf1f7,	0x21039e31,	0xe78f0880,
-0xd03c5c4b,	0x61232c4b,	0x9fa52e27,	0x5acfd153,
-0x65dc9e3f,	0x89b63211,	0xb5d3625d,	0x8c1b7b53,
-0x8018a5bc,	0xaf2b81c3,	0xb1b7030b,	0xcedb554e,
-0x13c03adc,	0x4abf1ab4,	0x28f1f5fe,	0x27e0ab93,
-0xc12af7fd,	0x9c11405a,	0x02000363,	0x38d621cb,
-0x77c66630,	0xd559f56c,	0x3b45cc3f,	0xd83b44cd,
-0xb1660aa9,	0xb66b1a5f,	0x4518c35b,	0xfb44b10a,
-0xc3676b79,	0x85c43391,	0xb5e5bdc9,	0x1d5fa7b9,
-0xe1e5ec8a,	0x4e8fe9c7,	0x317c50ff,	0xa3b6bc8d,
-0x6ea00f2c,	0x82c56b9f,	0xc0786dea,	0x0f4b370e,
-0x7b9c5d13,	0x911629f6,	0x6612e1bf,	0x84f8f05e,
-0xbde37cc8,	0xa0e2dcbb,	0xc8f05727,	0x596bd491,
-0xb4013d53,	0x443bb9fa,	0x958ece18,	0x10cb627e,
-0x19b67554,	0xe0ceafdf,	0x27ef6f6b,	0x6203db81,
-0xcbc9113a,	0xeae9241d,	0x672f4296,	0x63eedef3,
-0x4aa96ced,	0x44b8fb78,	0x4237594e,	0x685439a1,
-0xba6a96e0,	0xea5e0639,	0x7cafe234,	0xc1561b9d,
-0xd36c4c33,	0x8669663b,	0xaddab12f,	0xa574cae5,
-0x94d9fcbd,	0x30d54321,	0xd89777ea,	0x9e485930,
-0x75608c5e,	0xa4b93f86,	0x0fd1de45,	0x8d768bd2,
-0xf47e7ea3,	0xae270b70,	0xc578ac27,	0x1779f283,
-0xf5069a26,	0x9d28afe8,	0xd339186c,	0x71c601cb,
-0xab018df9,	0x4636ca8e,	0xd5a480c4,	0x73866df0,
-0x1da8f538,	0x2b12eead,	0x3d36bc45,	0xcfc6a165,
-0xbdddc678,	0x777f7f4e,	0x33731adb,	0xafd30037,
-0x8b18c0fd,	0x8bd955f0,	0xb9532d87,	0x171d87a4,
-0x58b8a3a1,	0xd6c974de,	0xa0c30c65,	0xb830053a,
-0xe0ee7291,	0xe0717f2e,	0x8e60d0cd,	0xa5e91c02,
-0x7d04e220,	0xeb51f97e,	0x85d428cf,	0x028ee0c3,
-0xbe41cf07,	0xc097238f,	0x55d76112,	0x50542345,
-0xcdeeb808,	0x6d651c57,	0xb4ea4f00,	0xea30ac97,
-0x37b63fa9,	0xe66458ad,	0xabacf15f,	0xa656f5b2,
-0x3dcfee29,	0x27e70a8b,	0x2f3206ed,	0x0a1186c2,
-0x8cbaabc4,	0xfebf634f,	0xddd411d3,	0xa55cf4ec,
-0x5e97a778,	0x5b5540d7,	0x3c85634a,	0x0e9f9e35,
-0xee75a230,	0xa390c0e8,	0x9d7d633f,	0xb045a66f,
-0xa60e513b,	0xb6663504,	0x15861d13,	0x33dc9917,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_65x/microcode-MU16530c.h

diff --git a/cpu/intel/model_65x/microcode-MU16530c.h b/cpu/intel/model_65x/microcode-MU16530c.h
deleted file mode 100644
index d66b924..0000000
--- a/cpu/intel/model_65x/microcode-MU16530c.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16530c.inc  */
-0x00000001,	0x0000000c,	0x05181999,	0x00000653,
-0x810fe1ab,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x70f0e122,	0xff8bdd97,	0x3c8f6086,	0x9795839d,
-0xbcec5e8a,	0x86d79f5c,	0x8a7eba1f,	0x6ec298ea,
-0xdcbdea5a,	0x6df32e3c,	0xfe7b03a1,	0x1fb340f4,
-0xf8ccf55e,	0xcc895669,	0x61feb2c3,	0xab4b47b8,
-0xe7a4a809,	0xda5aee3a,	0xc063db2b,	0x2a3a37f9,
-0xda6620db,	0x1a9d74e6,	0x69cdf24f,	0xcf84d7e3,
-0xe1e91b0a,	0xd6b4524f,	0x11cb964a,	0x558bed59,
-0xdc6a7037,	0x82f49abc,	0x4a7b2b02,	0x08a54751,
-0x94848d50,	0x24a41d05,	0x66cd0fca,	0xdeca2bab,
-0x0fc94efb,	0x3d870e54,	0x15d83204,	0x8786e666,
-0x7cd9658d,	0x5a2a6bc7,	0x0728db3f,	0xe619d19b,
-0x8cc8cf68,	0x16da1fba,	0x1c9dcc2f,	0x4810e99c,
-0xad7b1c9e,	0x0e54555e,	0x7aaaecbc,	0xc75499d3,
-0x0918055e,	0xa9ddb6af,	0x343cffda,	0x46a2def7,
-0x3644376a,	0xa855ce79,	0xdb34da5d,	0x701039ce,
-0xc1ef8291,	0x9a3a8b14,	0x0c383a31,	0x5b6b1cd7,
-0x5a8ea284,	0x0e2b517b,	0x83fb239b,	0x12e3bbf1,
-0x99cdbda8,	0xcce3ff3b,	0xabe88eb5,	0xc9c39921,
-0x5d7e0f42,	0x6616c514,	0x461b4aba,	0x197e296e,
-0x25fe8129,	0x8dfcdccf,	0x3e32335b,	0x70429113,
-0x0a0f9efb,	0x3af19b8c,	0x9075c62e,	0x88e71557,
-0x8dd4d5de,	0x08ed7495,	0x5c8d3fad,	0xbc85f573,
-0xc73ac54c,	0x4b1ed289,	0x12e3145a,	0xcee63e6b,
-0x35e21802,	0xf7c82dd1,	0xa3bb53f2,	0x0159b02d,
-0xf9c1d59a,	0xb8ae1aa6,	0xa0f7356f,	0x25e861d2,
-0x294edcd9,	0xf56e6b70,	0xed89984e,	0x5670ade3,
-0x07c139c1,	0xc9825411,	0x96cd9e09,	0x7c00c1ce,
-0x548f761f,	0xffd1dfb3,	0x14dd9eaa,	0x9fefccba,
-0xe24e53c9,	0x90884598,	0x1c9454e2,	0x8993be4c,
-0x5257183d,	0xf7e5f329,	0x65156ca7,	0x9bd171b7,
-0x1d7a7430,	0x16d52022,	0x0144079f,	0xc0fa6a1c,
-0xefa5baf6,	0x8761237e,	0xcbb8ca36,	0x1738b2dc,
-0x9cd7f5af,	0x4dc1433c,	0xbde3ca0f,	0xe56ed03d,
-0x407d8de8,	0xf112be05,	0xdc3e12af,	0xe586e503,
-0x7d067e61,	0x4b9a3075,	0xcc5e88c4,	0xb5b719ae,
-0xc235198b,	0x82e68914,	0xc26af071,	0xa75d5123,
-0xd9c53cb0,	0xd7da2486,	0xe50307a4,	0x249f9b3b,
-0x2081a6fa,	0x8f3b0668,	0x20f90ba6,	0xa24c9cbf,
-0x314e3257,	0xee1e8ce8,	0xd17992e4,	0xeb667948,
-0x65912e6e,	0x25683578,	0x6db17325,	0xffa874a4,
-0xd417e80f,	0xe6129a2f,	0xbd0ad511,	0x87f41146,
-0x9ec4c1be,	0x2606e66e,	0xf5df093e,	0x116e20ba,
-0x0c8989a7,	0xf870d4c1,	0xf83b6ee8,	0x4dd7acbf,
-0x9a4496d4,	0xaa80f40c,	0x47f4f668,	0xcd4708de,
-0x9aee2116,	0x99f7564d,	0x6b05b918,	0x64ccb01e,
-0x505dcf82,	0x50467e3c,	0xe2e053a6,	0x8ffdcc1b,
-0xaddfc662,	0x6f9beee0,	0xccea8166,	0x745ae5ad,
-0x1a4841b4,	0x5c9c8d0d,	0x6d34804b,	0xa1a1168f,
-0x34bd6ca8,	0xc971daad,	0x57e80c5e,	0x7a67dc4d,
-0x302369c9,	0x824f478d,	0xf0b041af,	0x6b6133c2,
-0xba5afe3d,	0xa7ba18c4,	0xcf363d17,	0x90a2419c,
-0x17d1b6cb,	0xe760bf73,	0xf7e60431,	0x6820ae47,
-0x1cea1e8f,	0x349c1eaa,	0xfd35592d,	0x41263d61,
-0xefbc5ea3,	0x13b634d0,	0x7b414a1b,	0xbfedbbca,
-0x16e9afc0,	0x54262b9c,	0x659c9795,	0x0dbf38e2,
-0xf9d87667,	0x3788ead2,	0x36efcae2,	0x6f107cfd,
-0x9b4eab95,	0xcf29e1ae,	0xb65461df,	0x21e9125a,
-0x4e71d0c8,	0xedcba601,	0x8016d03c,	0x92cf5b98,
-0x6db3bfef,	0x087ee378,	0x8e52f7c8,	0x69e3ab9c,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_65x/microcode-MU16530d.h

diff --git a/cpu/intel/model_65x/microcode-MU16530d.h b/cpu/intel/model_65x/microcode-MU16530d.h
deleted file mode 100644
index fed1f8f..0000000
--- a/cpu/intel/model_65x/microcode-MU16530d.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16530d.inc  */
-0x00000001,	0x0000000d,	0x05181999,	0x00000653,
-0xc28f9258,	0x00000001,	0x00000008,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xfcfae324,	0x355315ed,	0xc89ef542,	0x63841659,
-0x3c7c348e,	0x72c60a98,	0xabf29b87,	0x3bcf46b2,
-0x85c9c5fd,	0x99e2bbf8,	0xa7e7803a,	0x32ae3caf,
-0x7591a794,	0x408861ae,	0x14b31bd0,	0x06bece05,
-0x20ad4eff,	0x2e4b7bfe,	0x82c1a02a,	0x1c19b338,
-0x8c3078a2,	0x8da2bbbb,	0x395ac3fb,	0x879e34d0,
-0x61f4384e,	0x399b3f11,	0x4e27b881,	0xbed3ce7b,
-0xe385bb3d,	0x36616016,	0xb701b47c,	0x3b5e632d,
-0x31470408,	0xd0b588c1,	0x2ef42409,	0xe272ffa8,
-0xfadb8d9e,	0xa02391cb,	0x278bf424,	0x0487391f,
-0x2a1fbf75,	0xbf9e565b,	0xdc04f70f,	0x205e3b9c,
-0x26503a0c,	0x4ed040bd,	0xcb7e1985,	0x5d057e57,
-0x8e22af97,	0xf0de9058,	0x44e78e45,	0x2447cf34,
-0x8372f0f0,	0x2a52c75c,	0x6bff4c35,	0xbcffce46,
-0x07ef2734,	0xb5cee8e6,	0x4ede7dab,	0x49f5d0b5,
-0x4f25b91d,	0x51148c59,	0x6ad97fb4,	0x366d1763,
-0x7e52600a,	0xfa3ac4bf,	0x91ab7601,	0x743211ab,
-0x52196684,	0x0b2e1efd,	0xad54278d,	0x1a824f50,
-0x90c09495,	0xd9cb86d1,	0x2c4e5005,	0x0aef93f6,
-0x2ffd9ca7,	0x0a09a406,	0x1cdb4d4b,	0x4a873b20,
-0x9c85c6ab,	0x9e1220d3,	0x1fc343b6,	0xbea0c2c1,
-0xf8a24157,	0x541ff346,	0x280c3d6a,	0xe8459a8b,
-0xa9f6430b,	0x0c6e5ba1,	0xe7da7b03,	0xac7a218c,
-0x9108cb65,	0xec79380e,	0xec3bb1c7,	0xaf0c4bbb,
-0x866eb11d,	0x16d6f13b,	0xe1ee4d0e,	0x74df8063,
-0xbcbb0fc6,	0x0f6cb60c,	0xb446bdda,	0x1c129ad1,
-0xfc3b9f9c,	0xce0672f9,	0x720d1665,	0x99217438,
-0x80a6d584,	0xd07e188a,	0x64d53940,	0x5928d1fa,
-0xd5b24c6c,	0x8cb04a04,	0xac747437,	0xa7a20909,
-0x0b57768b,	0x6c4437e8,	0x72ea1c95,	0x2aea4e76,
-0x96c9f8aa,	0x8917d477,	0xab747d6e,	0xc2c12858,
-0xaec4035a,	0xb641abed,	0x89637037,	0xc4c2394b,
-0x251f679d,	0xb9d0d6f8,	0x06da24d1,	0x2ad6c123,
-0x16324a11,	0x9fb6e487,	0x67885199,	0xbf3f7eed,
-0x22847933,	0x5d2ec8f4,	0x4a08914c,	0x7ed70790,
-0x5d6709a6,	0xfd73a3a0,	0x78295ddc,	0x67a4f723,
-0xd0fc4363,	0xda50249d,	0x4c8586e8,	0x001aefe8,
-0x4ddb0a45,	0xe19ad425,	0x51eff9f3,	0xd6c3ee2d,
-0x45bd8490,	0xca34b967,	0x46e68112,	0x98e08fe7,
-0x5ead54e9,	0x1f12298e,	0x82a1e421,	0x4826f80c,
-0x2e488608,	0xe103caf6,	0xc8be1e00,	0xd69ce416,
-0xa791a5c7,	0xfccad928,	0xa15ce378,	0xd5890d56,
-0xbfe7b822,	0x8e33f92a,	0x1847193d,	0x06619365,
-0xbf12a9f9,	0x9c1dbff3,	0xf70fe13f,	0x73267ae6,
-0xbf73df95,	0x2067879b,	0x7323b730,	0x8c28f88a,
-0x49769dfb,	0xebdbd925,	0x44f1d0bd,	0x2f379983,
-0x76eac858,	0xfd6f8777,	0xed431ae3,	0xf656af10,
-0xb245e033,	0x91c45641,	0x3ceb2809,	0xefe9f9c3,
-0xae156659,	0x4e11a25e,	0xd96bceae,	0xd03e9342,
-0x966300d4,	0x2763c143,	0x6d7cb136,	0x30013a68,
-0x99c07c40,	0x7c53ba71,	0x0e034e01,	0x78974bdd,
-0x5793f65b,	0x27bde07c,	0x84ccc31e,	0x8169d813,
-0x1477c316,	0x2da18290,	0x64b686d4,	0x6bc7d9ff,
-0x73b2c749,	0xa97f8161,	0x189bc202,	0xee2ace64,
-0xadb6a179,	0x4c13950c,	0x69f7c438,	0xc1265fe7,
-0xe7b7d517,	0x48ebf4c6,	0x76528cf4,	0x18f820d6,
-0xa3eaf9da,	0x1de7d37a,	0xe27ba2c6,	0x48fe45e1,
-0xf110770d,	0x4caab774,	0xce2990ac,	0xe7878e0b,
-0x5b9764cd,	0x6706217f,	0xf2121426,	0xcb5a9df1,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_65x/microcode-MU165310.h

diff --git a/cpu/intel/model_65x/microcode-MU165310.h b/cpu/intel/model_65x/microcode-MU165310.h
deleted file mode 100644
index 1d20901..0000000
--- a/cpu/intel/model_65x/microcode-MU165310.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU165310.inc  */
-0x00000001,	0x00000010,	0x06281999,	0x00000653,
-0x4b6dfc5e,	0x00000001,	0x00000001,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xa9f6b598,	0xec73f4eb,	0xffce329e,	0x6c5e06dd,
-0xce5188bb,	0xe94f7930,	0x15eedaa4,	0xf18757d4,
-0xd70c827d,	0x31455e24,	0xf5b4bbcb,	0x9998ca1f,
-0x2ec1d583,	0xaca650ad,	0x8df19fa7,	0x166dcc31,
-0xf4322404,	0xa03f61f8,	0x5944ee81,	0xfc83e22b,
-0xbbddfdb7,	0x58347247,	0xd2469409,	0x827198e8,
-0x3400aa4f,	0xedd3d882,	0xdc966e7d,	0x3e30b255,
-0xa9b45d4e,	0xc78f0810,	0x5fc7c407,	0xb1a289bb,
-0xfb0657ec,	0x476c2047,	0xbc5f1574,	0xa711c231,
-0x164daa0b,	0xbd96098f,	0x84d29406,	0x5b6f6564,
-0xcda8e7b0,	0x8b75723b,	0x4482d30c,	0x9f2a8e06,
-0xdacef785,	0x54313eb6,	0xaf86cbb6,	0x9821df5a,
-0x32b22218,	0xb7eec0a2,	0xb11f02be,	0x36f4df12,
-0x9dae899e,	0xa449a294,	0x49cc03ea,	0xa80e5d89,
-0xde78ee40,	0x67548fce,	0xbaf8ca83,	0xd8c19acb,
-0x78e71346,	0xb4507a69,	0xce0adbfc,	0x5aad67b1,
-0xe3132110,	0xe4f3d82d,	0x0fbd379c,	0xb2b5f05c,
-0xed0a9a6f,	0x4ad8ddb1,	0xe2cff1b0,	0xc30d2a98,
-0x4b7f0d4a,	0xd61d5eab,	0x87c986b6,	0x00a7d89f,
-0xc19a7241,	0xdeeb64a6,	0x0dd96c74,	0xf5037a54,
-0x95b1f67d,	0x206c6c4c,	0xa92d9eea,	0x94b019eb,
-0x735c9247,	0x800b3eb2,	0xb47accac,	0x4359700b,
-0xe904733a,	0xba962336,	0x4d53775a,	0xf977eb8a,
-0xe1431b72,	0x4fab02d8,	0x912c42a2,	0xd5b58a8d,
-0x7a7caa9f,	0xaf26015a,	0xc7434abc,	0x61cc5746,
-0xe7103ec9,	0xc3450e0c,	0x39e65a43,	0xc51d998d,
-0xc7d74311,	0x1bc02a8e,	0xcde79dce,	0xcdfa8a67,
-0x4fe6b49a,	0xd79c38ba,	0x9066cb70,	0x7c0835b6,
-0xca2f447f,	0xb707beb6,	0x7f6c9230,	0xc82d1275,
-0xea2546b1,	0x7424db79,	0x8cf638af,	0xdb930706,
-0x6433cd97,	0xa312fc98,	0xc4fd9859,	0x6a2f6d72,
-0xea0dc261,	0xd143ea78,	0x2e42e415,	0xdec0b3b6,
-0xc28dd5ba,	0x071bc9af,	0xd4d5d5e4,	0xda3cfdb0,
-0x58d5d6e4,	0xc182d491,	0x91201b02,	0x7aea0079,
-0xc5e32789,	0xbf9508d9,	0x616e6741,	0xcb2c8d6b,
-0xe5dafc14,	0x78d5dfb4,	0x9318c3d4,	0xcfe1f2e1,
-0x600efeca,	0xa401d5be,	0xc6d9cd4f,	0x7dfb0134,
-0xf1da7e7a,	0xd2b4dd4d,	0x2bd041fe,	0xce3aaf95,
-0xc0f5d723,	0x03c769a8,	0xd6ab8b78,	0xd3aedb57,
-0x4bca8a12,	0xdaf9939d,	0x99b55331,	0x62f7b086,
-0xdbe96aae,	0xb308ebf5,	0x7cd9c4d7,	0xd84f11bd,
-0xe47185d0,	0x67f29f82,	0x8866d29c,	0xddf9681d,
-0x6f934e37,	0xb4753e8e,	0xfe060bab,	0xbae582f3,
-0x7ecfd0f4,	0x9a894f8a,	0xe97d6672,	0x3487f699,
-0x8f8adb39,	0xb6037e80,	0x2d1fd356,	0x2f38ba4a,
-0xaf1befaf,	0x808839f3,	0x2fafe10b,	0xa1a277b7,
-0x98a496bd,	0xdcd885a7,	0xa1d07540,	0x4157997d,
-0xdd40d57e,	0x89bf057e,	0x41a32725,	0x5c7bc8f2,
-0x9ce6b8ae,	0xc83ac484,	0x51507007,	0x3c785978,
-0xd79539d5,	0xfa36aea6,	0x3f47b6ee,	0xf2ca21e6,
-0xee752fc4,	0x11cd24df,	0xf948d935,	0x0b9cf56f,
-0x1286f53a,	0x11d5fb21,	0x177308b8,	0x08f9048a,
-0x1703ba64,	0x0ce282f3,	0x10e51cce,	0x73f2895c,
-0x032c9e05,	0x85121701,	0x6c47c71d,	0xfdca9c87,
-0x8ac1cd10,	0x892b0cf3,	0xe61155f2,	0x1d127feb,
-0x90aabf12,	0x8ded9c74,	0x2d5895c4,	0xb6880c5f,
-0xaaf4ef4d,	0x1144f331,	0x7a3fd2f9,	0x9e1ca270,
-0xc538d5d6,	0x534c21fa,	0x859930c9,	0x1f486800,
-0x46c3746f,	0x4a8fb4f5,	0x06b1666d,	0x96aec81b,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_65x/microcode-MU26522b.h

diff --git a/cpu/intel/model_65x/microcode-MU26522b.h b/cpu/intel/model_65x/microcode-MU26522b.h
deleted file mode 100644
index bf5f8df..0000000
--- a/cpu/intel/model_65x/microcode-MU26522b.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU26522b.inc  */
-0x00000001,	0x0000002b,	0x05121999,	0x00000652,
-0xd40d4baf,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x82d4f7e4,	0x1ab144dd,	0x6c99135b,	0xf7e85000,
-0x485aa4bc,	0xdc2d54c2,	0xe972fccf,	0x3324d019,
-0xcbc6a9c4,	0xedce39b7,	0x9f1e2d7b,	0xd3bf100f,
-0x494a087f,	0xf7e7cc9d,	0x708a5137,	0xfc9cf9d3,
-0xec52ac58,	0xd50c0b24,	0xa8809cd5,	0x0afb0b11,
-0x56f58840,	0xb424542b,	0xc3316bd9,	0x78f37d95,
-0xb3f56372,	0xf5f84f86,	0x257e3792,	0xa6deb070,
-0x2553ff8b,	0xa2f30e61,	0x528f7e35,	0x239ad66d,
-0xa2675b0e,	0x43187193,	0xd99d4a9b,	0x551fcc51,
-0x43e2cc72,	0x59a00800,	0xb33363f6,	0x33b9858d,
-0xc2d4e60e,	0x626d34fe,	0x0b507f65,	0x48593c82,
-0xd493b092,	0xbf9ac3cd,	0x5cdeb0fe,	0x9f4fff34,
-0xd64ebd7c,	0xf626826f,	0x49794f5f,	0x2fc6a58c,
-0x443adef8,	0xda9e1f2b,	0x93af9ec1,	0x02032b82,
-0x90ea392e,	0x49ca677c,	0x010fa205,	0x05e86008,
-0x7a7a5faa,	0x24c23361,	0x6173974b,	0x40163e01,
-0xf6a28873,	0x4d5bb36c,	0x6284d1d2,	0x766d6605,
-0xbedaa035,	0x4cea4ed3,	0x9c56ca06,	0x02576d87,
-0xc6e33226,	0x5a623905,	0x2256948e,	0x1ba04f19,
-0xb8a0d3d2,	0x6e96125f,	0x401fed7a,	0x4240baaf,
-0x1065bacd,	0x1021dd17,	0xdcd660ef,	0xc862fed8,
-0xfeb165ce,	0xd4581a52,	0xeedd42f1,	0x804c3590,
-0x528ba359,	0xab41db70,	0xa7a2bfe3,	0xc6eb9f0e,
-0xa1e3f891,	0xb22f81e3,	0xccedb56b,	0x672e34d4,
-0xda637bc8,	0x40c785a8,	0xa0b5bfa3,	0x689078cb,
-0xb86d32ae,	0x8a08e06b,	0x56b58258,	0x64dd76ae,
-0x37f12a71,	0xd0ff69f3,	0x4648eeb1,	0xdecd4cdc,
-0xe415e394,	0x0debe186,	0x767e4c09,	0xf349c296,
-0x6a39615b,	0x418036b0,	0x919eaceb,	0xffcbfc96,
-0xa109780b,	0x39ee64f0,	0x10cc2571,	0x008d0def,
-0x73907641,	0x7d2d1b95,	0x28a09912,	0x9c9e0e7c,
-0x6cedc58b,	0xb3612e6d,	0xe522629b,	0x7fefc94a,
-0x303cd38b,	0xb50f536d,	0x27706e32,	0x43ac6e65,
-0x72c05b6f,	0x7fc617b3,	0xf035d5af,	0x875e29d9,
-0x201d23ea,	0xfd2928ed,	0x89f5ff66,	0x1acc4258,
-0xa4b045d8,	0x10bc6d1b,	0xab858bf3,	0xd4b3c407,
-0x9c708b17,	0xe61a59ab,	0x47bdf687,	0xb26d738f,
-0x4b950d31,	0x5820de87,	0x6d609b38,	0xec97b0b3,
-0x041950cf,	0xdb386054,	0x703e40b1,	0xdbe48d81,
-0x3c0d6bb5,	0xa4a5c62e,	0xc88f30b8,	0x5d952f16,
-0xc88a086f,	0x47baabc1,	0xe63a91a0,	0x6f2bc793,
-0x0c0d57c3,	0xe81a67f0,	0xf5601a47,	0x4f8843ed,
-0x199e0104,	0x3671a0cf,	0x24ae5ba7,	0x2ceb6d1f,
-0x350ae79c,	0x1aefd992,	0xb8efeccc,	0x53854cb1,
-0x58280110,	0x5680f87f,	0x4774752c,	0x00d9f67d,
-0xe380b8b4,	0xf330e9a4,	0x722be379,	0xa945dd14,
-0xb977c27d,	0x9c8ce733,	0xadaf3828,	0x6c57213f,
-0xcb348b3c,	0x863cf367,	0x58efcad1,	0xe59c47c5,
-0x97ad46aa,	0x0766206b,	0x51047339,	0xaf492a9f,
-0xf40c4e9e,	0xa5c8221f,	0x15414807,	0xf1e7dbab,
-0xf7ee703c,	0x25db6887,	0x8f0f71e0,	0x86411ed8,
-0x6381c889,	0x2005b533,	0x485e9637,	0x553d2fe0,
-0xe89e6e67,	0x6b50c659,	0x0ee55b4d,	0x32d116dc,
-0x12a199cc,	0xf0e4d72b,	0xece6292d,	0x084337af,
-0x58f73eac,	0x83252ba2,	0xbdd0f99e,	0xa92a7ada,
-0x3b670369,	0x78641928,	0x56d530cc,	0x1200f833,
-0x5327e8b7,	0x178047e5,	0x0c34522d,	0xeac40852,
-0xf62dc30e,	0x9a06d7e5,	0xb2a7f19b,	0x9ab62c5b,
-0x8ddbf6a3,	0x8d31e486,	0x38c91832,	0xe53b17d0,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_65x/microcode-MU26530b.h

diff --git a/cpu/intel/model_65x/microcode-MU26530b.h b/cpu/intel/model_65x/microcode-MU26530b.h
deleted file mode 100644
index 8ae870d..0000000
--- a/cpu/intel/model_65x/microcode-MU26530b.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU26530b.inc  */
-0x00000001,	0x0000000b,	0x05201999,	0x00000653,
-0xe3f50f82,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xa4f21304,	0x1d7bf7d9,	0xb5be812c,	0x1ea46237,
-0x8d811046,	0x0fe67ef6,	0x507754ff,	0x0c97d96c,
-0xdce8311d,	0xe4c2cf96,	0x362d5ea1,	0xaf113121,
-0xac3bde75,	0xbff45249,	0x0e132b97,	0x1401c5ad,
-0xbca78b32,	0x07238147,	0xf31aa8f1,	0xa514cab2,
-0x390ab9e7,	0x0019b113,	0x4d62ccc3,	0x27f077fc,
-0x2fd14c9e,	0x7512326e,	0x47f43060,	0x0d2c1b03,
-0x6c2ceaab,	0xcd57b37e,	0x4231a8d0,	0xa104c588,
-0x1d2cecae,	0x5bdbf092,	0xce711c6a,	0x81f297b9,
-0x3eb2dad7,	0xf20bda6f,	0xfb1efa44,	0xb00434be,
-0x12742e89,	0x08354c21,	0x88f6f908,	0x476c66c6,
-0x06eb9ded,	0xdcea60f0,	0xe0f48c3f,	0x3ea169fb,
-0x15a1e00c,	0xfa7ef115,	0xa9a5d23d,	0x38da8793,
-0x6b1ae52d,	0x1be30123,	0x0fb921e3,	0x87688811,
-0x45b02f33,	0xa002e5ef,	0xdcf91775,	0x29fe20bb,
-0x6d886079,	0x3b01080b,	0x2845931b,	0x56f0bdc0,
-0xe7f97853,	0xaa51555b,	0x3fdefce6,	0x9231d0d5,
-0x34695b1c,	0x7071e3c2,	0xfc1eefb6,	0x65ed91cf,
-0xa30f9193,	0xa951e706,	0xf28168de,	0xea7cca1a,
-0x00ad260c,	0x482dcab1,	0x7074f431,	0x82255d72,
-0x52225c8a,	0xfcd447ee,	0xc8430fcb,	0xed713c21,
-0xe05a800d,	0x9ffb7c19,	0x680a7a9a,	0x4ebdcfd6,
-0x8e9c8c59,	0x72cce044,	0x87289c8b,	0x691ebdc2,
-0x7dd25e97,	0x284a8c8e,	0x25248a91,	0xb73b016a,
-0xf4780147,	0x0c870606,	0x81bf5462,	0xf2b76112,
-0x896e6d44,	0xc75bf85a,	0xb1889a71,	0xe9c07ab3,
-0xdd6be9cd,	0x9481207c,	0x6df36c80,	0x019c493b,
-0x9664fa7c,	0xfe29655a,	0x8e3c380f,	0xe827afd8,
-0x14a411e5,	0xd6ecf9cc,	0x08698f98,	0x76cdac6c,
-0xca73193d,	0x3db85e3e,	0x9827cfc4,	0x7d80d459,
-0xa52c24cc,	0x1b415086,	0xf732e136,	0xf121c28c,
-0xee8a984b,	0x2ffa66b6,	0x028df8c1,	0x583c2a59,
-0x940835cc,	0x11f3141d,	0x3f3f4ec1,	0xdee86cf0,
-0xc85794d2,	0x83e377bc,	0x697d6c3a,	0x54cc8278,
-0x1d0512ce,	0xafd73aad,	0x22fbe58e,	0x586d29a0,
-0x7247bd99,	0x77eee287,	0x13584559,	0xc2fd6bf2,
-0x310bba13,	0xf9b0a166,	0xf7d32176,	0x21426813,
-0x56c2da83,	0x13e49126,	0x7a557e54,	0x4c8a8f84,
-0x838f3992,	0x0ec6d554,	0x8aa5856f,	0xcd1935bf,
-0x01614664,	0x54b01c3d,	0x17a7cdd6,	0xaec2cb3d,
-0x4bc9c3e4,	0x6645b33c,	0xfced3b87,	0x4e5dd898,
-0x45d1dbb7,	0xb60e6b5f,	0xa7e938ce,	0xe4e1bcde,
-0x4f400eb1,	0x4dbdc103,	0xf1608c91,	0x5b05c4b5,
-0xfecd782b,	0xe3106e25,	0xabbb7bb0,	0x0ba21681,
-0xcca215e2,	0xefc41853,	0x67c969eb,	0xb8cb9dc2,
-0xbd1089ed,	0x5df85c48,	0x31c7c77f,	0x3f14b936,
-0x3396d664,	0xb09b91b2,	0xd2970963,	0xc97ee590,
-0x6344c8c2,	0x3d999973,	0xb74e5d5e,	0xebd9eb93,
-0x3d536a87,	0xda39bf3d,	0x8a899c61,	0x8cfbdf63,
-0x41ee792e,	0x43a38712,	0x4851037d,	0x3ee0c77b,
-0x82062189,	0x597faf60,	0xb95e3a07,	0x2a276757,
-0xd52941c6,	0x2c1bdd08,	0xf9f47a55,	0x4508305a,
-0x9f38c11b,	0x863b657b,	0x567be75c,	0xa5f37533,
-0x05ce6cb1,	0xe29f6533,	0xaf889424,	0x8c4a9cf3,
-0x159d8b70,	0x473abecb,	0x41df09f1,	0x6bd38e85,
-0x65e45213,	0x04688358,	0x2e6e5f0c,	0x94335dd2,
-0xec7d3761,	0x0db43819,	0x4dfae8d5,	0xd061ca76,
-0x225c1d2e,	0xd5da0bd3,	0x61936693,	0xc6b7b73e,
-0x6604eb97,	0x9993f5f6,	0x44f2f4ca,	0x2236e62d,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_65x/microcode.bin

diff --git a/cpu/intel/model_65x/microcode.bin b/cpu/intel/model_65x/microcode.bin
new file mode 100644
index 0000000..43f0014
--- /dev/null
+++ b/cpu/intel/model_65x/microcode.bin
Binary files differ

cpu/intel/model_65x/microcode.h

diff --git a/cpu/intel/model_65x/microcode.h b/cpu/intel/model_65x/microcode.h
deleted file mode 100644
index 23aff56..0000000
--- a/cpu/intel/model_65x/microcode.h
+++ /dev/null
@@ -1,12 +0,0 @@
-
-#include "microcode-MU165040.h"
-#include "microcode-MU165041.h"
-#include "microcode-MU165045.h"
-#include "microcode-MU165140.h"
-#include "microcode-MU16522a.h"
-#include "microcode-MU16522c.h"
-#include "microcode-MU26522b.h"
-#include "microcode-MU16530c.h"
-#include "microcode-MU16530d.h"
-#include "microcode-MU165310.h"
-#include "microcode-MU26530b.h"

cpu/intel/model_67x/microcode-mu267114.h

diff --git a/cpu/intel/model_67x/microcode-mu267114.h b/cpu/intel/model_67x/microcode-mu267114.h
deleted file mode 100644
index 26ed293..0000000
--- a/cpu/intel/model_67x/microcode-mu267114.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  mu267114.inc  */
-0x00000001,	0x00000014,	0x08111998,	0x00000671,
-0x83239dd8,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x2900aa36,	0xedef91d1,	0x980381b8,	0x990ac1a8,
-0xce6aee27,	0xcd579679,	0x93340485,	0xb4ffaf67,
-0x2a528bc7,	0x5cf526ec,	0x0ffd39bb,	0x6536a335,
-0x3996f969,	0x2976103e,	0x2bf45e9c,	0x19cce6b8,
-0xc3a599da,	0x41442e0c,	0x7d60efcf,	0xa0dd1e48,
-0xf20be1a8,	0xe92fe8ed,	0x69246640,	0xce2b3120,
-0xc5fd9aba,	0xa07b4f2e,	0xfc5ec6a8,	0xdfd7ec00,
-0x1af0b9cb,	0xf84deed3,	0x6efad68e,	0xd26c28f4,
-0x588c4713,	0x77b51ea7,	0x9ec83e5d,	0xeb5b880f,
-0xdf8da780,	0x1f1db6ba,	0x3b8b3bd6,	0x1ae4191e,
-0xb84402e0,	0x518bcdec,	0x6df4b892,	0xf447c3ab,
-0x7f5f3bab,	0x57d668c6,	0xdfe3a8e5,	0x87ebe853,
-0x53a3e449,	0x232a99d3,	0x1a5ee33c,	0xf4308ee4,
-0x508b652e,	0xf78b7ae8,	0xbd0616ef,	0xccbd906a,
-0x8cb04b06,	0xdcc54a0b,	0x97a6c4aa,	0x8b56ae1e,
-0x2c81c68c,	0x2a8599d9,	0x88e05548,	0x9ee7e04e,
-0x1df430f0,	0x44bbfa5b,	0x79b20b93,	0x417ca0e5,
-0x8a9d9bad,	0x8d799fe2,	0x8ae5b99f,	0x08d2a3c7,
-0x8fefbe33,	0x54201513,	0xcd50fdff,	0xfd26a22b,
-0xc5be2281,	0x998e58d4,	0x179dbb49,	0x2d6b85c3,
-0xa7c9c271,	0x865499d5,	0x69fe40b2,	0xe83a9703,
-0x99298f1e,	0x4f52cca5,	0x26220fc3,	0x67bcd523,
-0xd3077015,	0xaf86439f,	0x78bba2a0,	0x7e1cc676,
-0x713fec96,	0xc8869986,	0xf15f758b,	0x2b2b58e1,
-0x5b033918,	0x79713b3e,	0x4a08b144,	0x6b10e909,
-0x22401dc7,	0x23087386,	0xc3359150,	0x0a6cde95,
-0x91bd0c91,	0x99281e5a,	0x7bef0550,	0xc8f9e407,
-0xbb6b33d7,	0x6cd518f0,	0x6ef572b9,	0x5a0fbd51,
-0x7425def6,	0x0e50b4e7,	0x3623bb19,	0xfef635a6,
-0x7539c632,	0xc86d176c,	0x80c7b5c5,	0xf5a0b5cd,
-0x879cd278,	0xe26e9de4,	0xa1c6a90f,	0x65b30004,
-0x678c63bc,	0xaab85112,	0x2a9851b3,	0xce3cbdf6,
-0xa30dc116,	0x24bf66f0,	0xcd5d3611,	0x69cfebd6,
-0x0bf03477,	0xa524f5aa,	0x474e152b,	0x93f5470c,
-0xaf8332af,	0xa7162064,	0x8a1ef4a1,	0xf6c7da39,
-0xae7e26c2,	0xb60fc22a,	0x099215de,	0x6431836f,
-0xbced163e,	0x0957b3e0,	0xeaff67c5,	0x1d15d645,
-0x531fe014,	0x47e298e3,	0x4d0a7808,	0xcb9e8bf3,
-0xb0abe54f,	0x1a96651c,	0xd7b0df79,	0x79af1c18,
-0x41aa459a,	0x70628bc8,	0xb200c92b,	0x0ffd7c37,
-0xc16fa374,	0xdc479e08,	0x1181eacd,	0xdf795d60,
-0x78834704,	0xd55485da,	0xdfd68db3,	0xadcb7932,
-0x321eaf32,	0xf5447236,	0x498a525c,	0xc4e3e529,
-0xe3218446,	0x27187ac8,	0xf31ef297,	0x2d2fdd03,
-0x8286cc34,	0x3ec06e63,	0xe7ad6bcd,	0x1f64f92e,
-0x280b07f2,	0x8794d8a0,	0x6f8ad638,	0x7910e4ee,
-0x278340f6,	0xe55b228b,	0xb8dfab78,	0xdb28214b,
-0x12f22905,	0xb8fcb70c,	0xce0065a4,	0x0e0c733b,
-0xfcc20c16,	0xf2be1d02,	0x336a9467,	0xa07f5612,
-0x43b9ca1d,	0x7c6fcdac,	0x810e98b4,	0x5ca423a0,
-0x140596f6,	0xb711c0a6,	0x17b47ee7,	0x0b93143c,
-0xd04b336a,	0x8b84be4c,	0xa3e77a17,	0xb0181d8e,
-0x96d865c6,	0x41ea13b4,	0xe784b15c,	0xf807b39a,
-0xd591fb1a,	0x4700dd5c,	0xbbc1e580,	0x43ac39e8,
-0xadb3d257,	0x3157de34,	0xde366d0e,	0x9ad4248f,
-0x95986f90,	0x9c6515e6,	0x854cb90b,	0xaa416bcf,
-0x988d01aa,	0x08619fdb,	0xc428f67c,	0x440a6559,
-0x3483d569,	0xbd561d15,	0x0bdac2e4,	0x110e1a21,
-0x62bd921f,	0x7cc406e0,	0x038353b8,	0x50c165fa,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_67x/microcode-mu267238.h

diff --git a/cpu/intel/model_67x/microcode-mu267238.h b/cpu/intel/model_67x/microcode-mu267238.h
deleted file mode 100644
index 06f6850..0000000
--- a/cpu/intel/model_67x/microcode-mu267238.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  mu267238.inc  */
-0x00000001,	0x00000038,	0x09221999,	0x00000672,
-0xffd6aa2a,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xa2560856,	0x779b0125,	0x1443265a,	0x0a535feb,
-0x70e89c38,	0xd71286b0,	0xa0ec5939,	0x525bccb1,
-0x6fdfa495,	0xe99aac23,	0x73d359ac,	0x4104d3af,
-0xc8a1849d,	0xd8dd20b9,	0x591df59a,	0xb23c9ce8,
-0x5720703d,	0x28791338,	0x37b7440c,	0x3f4152d3,
-0x946e068c,	0xbd4cbca7,	0x02e2980c,	0x78902676,
-0x7c66c91b,	0x55e1a9ca,	0x55cca14b,	0xd0a82082,
-0xbe66f162,	0xa499f342,	0xee344972,	0x0b4f8aa4,
-0x3c26d31f,	0xa2492061,	0xd845fee0,	0xb253d108,
-0x6ccc9b4b,	0x92ce1712,	0x11fcbc36,	0xe384d472,
-0x8447afa4,	0x599b1a33,	0x78535766,	0xeb4f2543,
-0x91629f05,	0x6af162d5,	0x949517b9,	0xc38e49a6,
-0x5805826e,	0xd03155dd,	0xcc8800bb,	0xb98e9a71,
-0xb75fd98a,	0x96c79e9a,	0xdf7478d3,	0x29a43071,
-0xbf2a5470,	0xd5be473a,	0xf66c074d,	0x7ee133f5,
-0xfaa5823b,	0x9fce08e1,	0x43bffec1,	0x12644f98,
-0x26fe9f43,	0x096f8940,	0x703a390c,	0x598abb8a,
-0x8b79f053,	0x5c294000,	0x6221fba4,	0xeb226211,
-0x6b1e7e6e,	0xc5233cc8,	0xae9ab65d,	0x3aa0a89f,
-0x0e422a22,	0x0f1886ef,	0x3379e3a6,	0x12f12284,
-0x409f4e06,	0x41efac41,	0x07693087,	0x7a9f1916,
-0x31269e69,	0x9caf7cbb,	0x3ff0bee6,	0x3ef2a057,
-0x1de737d2,	0x8df81860,	0xc41ba7d0,	0x39584115,
-0x1321abd7,	0x97dbe297,	0xa376ca1e,	0xaaf6b25b,
-0x0c9b1d13,	0x363e1074,	0xc75e2a58,	0x79774604,
-0x8ebe27aa,	0x95443c05,	0xb716ee48,	0x77a05fb7,
-0x482eaeef,	0xeac5e94f,	0x79e3ef59,	0x2cd191db,
-0x2b71c633,	0x95c675c5,	0xbf1e639b,	0xbac226f3,
-0xfb2fac20,	0xa9e72a20,	0x5a46b3ee,	0x1743bec9,
-0xb89df094,	0x15af2d36,	0x45944344,	0xb41d5a97,
-0x2216d4b7,	0x98ba1092,	0xc97d4982,	0x336f6c35,
-0xc43df462,	0x9fa0dc3a,	0x7a240c30,	0x7d248a85,
-0x0995bbcf,	0xe9929521,	0x5d828729,	0xc8f41f11,
-0x2d0f0e4e,	0x8e67c634,	0x68567623,	0xc237ba69,
-0x78a6b1d9,	0x6f6c2ba8,	0xa8908a4f,	0x909b771c,
-0x0428bb10,	0x7c1b33cf,	0x76af41c8,	0x6037d37c,
-0x5ded7bbb,	0x534c6d21,	0xd9a6343b,	0x74482250,
-0xb961501d,	0x0988d71b,	0x073dedea,	0x5d0a4702,
-0xca22ce05,	0xf14f6f72,	0x8f7f744c,	0x1a78507e,
-0x4b0b3b33,	0xe5a62813,	0xb76e4b43,	0xbee09325,
-0x21a02fe8,	0x513abf7a,	0xe780fc18,	0x25b7ae25,
-0xec70dec0,	0x25d1fc14,	0x47fc868f,	0xd348e013,
-0xab83414a,	0x48e8afaa,	0xae9e7eb5,	0x4591f771,
-0x8209dd0c,	0x84929f07,	0x7fb35bc9,	0x9ce719af,
-0x339470a1,	0x85f7be9e,	0x2ea78a4b,	0x7cf3e760,
-0xe0cf2ee2,	0xc8c60ee0,	0x06843417,	0x9ccb4cce,
-0x117cde32,	0xe6b68d75,	0xfaedfa5f,	0x6407e9f8,
-0x6db65a34,	0x07717a0c,	0x3578a834,	0xcf9f70e0,
-0xbb0c1401,	0xc7624cd2,	0xe8102ce4,	0x2c342121,
-0x353c2bc0,	0xa08d06e7,	0xee40ca20,	0x069f1b72,
-0x1da2d573,	0x766565dd,	0xf684f183,	0x1a9a4c6f,
-0x9566f043,	0xe083be7b,	0x1d9c5ed6,	0x85c01b1e,
-0x1481bde2,	0x5e3d1b22,	0x0a47aeb2,	0x36c29f21,
-0x9b5604ca,	0x8519256a,	0x5bf0e38d,	0xf061f342,
-0xf3cc6aff,	0x3e928f99,	0x6c65bca7,	0x950fb3cd,
-0x7bc6cc53,	0x5c3bb72a,	0x177eee6e,	0x4f1f0363,
-0x7e2d8e88,	0x3ab83f54,	0x062f818a,	0x2b53143c,
-0x6127e61f,	0x95cf1f48,	0x04798f41,	0x61ba5878,
-0xb0fd99d2,	0x71c835e4,	0x3c4a814a,	0xe07eaa41,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_67x/microcode-mu26732e.h

diff --git a/cpu/intel/model_67x/microcode-mu26732e.h b/cpu/intel/model_67x/microcode-mu26732e.h
deleted file mode 100644
index 38d47db..0000000
--- a/cpu/intel/model_67x/microcode-mu26732e.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  mu26732e.inc  */
-0x00000001,	0x0000002e,	0x09101999,	0x00000673,
-0xa5945abf,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x608ab600,	0x7653aba3,	0x90cf06df,	0x2cb405de,
-0xe4c59cfb,	0xe6c669e7,	0x3aa728ba,	0x83d3111f,
-0x892fc321,	0x2566fbdb,	0x8c37ee68,	0xbfbe902e,
-0x58c979b3,	0xe18b8acb,	0x8d0d319d,	0x4b0ed465,
-0xf4f644f7,	0x847da89c,	0x587df5fd,	0xa3aed418,
-0xb8b811cb,	0x0330bc99,	0xe8167486,	0xa00d6d3a,
-0x77bfa90d,	0xbaa76e96,	0xf9098d1c,	0x3320799a,
-0xcf8409f1,	0xe176caa8,	0x4f0319a8,	0xb4952500,
-0x967781c1,	0x63834cab,	0xc6e650d3,	0xed9dd97c,
-0x3007ef9a,	0xa4fe2c6e,	0xf45fe99e,	0x6b3e6506,
-0xf2cdd2f3,	0xb59c79c9,	0x14c6ed40,	0xa5148f5d,
-0xf5fde82e,	0x3bcfe380,	0xd4530539,	0xf29c478b,
-0x0783cd9f,	0x804ce845,	0xb9f62a6c,	0x2ae018f8,
-0xd7c42c7d,	0xe2106e84,	0x0954ef6e,	0xbdf3275f,
-0x96d8f3a3,	0x127c0bfc,	0x9b459637,	0xae1c6dbc,
-0x52986367,	0x8ce39f67,	0x9460054a,	0x012da826,
-0xe6a663f5,	0x9b7d890e,	0x7954aa8e,	0xc92ef63b,
-0xbfe64a51,	0x7ad32697,	0xa42480dc,	0xd904d833,
-0x7e8fc827,	0xeab91ad0,	0x869b7a18,	0x496c1157,
-0xd07db5d6,	0xc4befd10,	0x692303f2,	0xb7219baf,
-0xaf54123f,	0x7def51a2,	0xb284536c,	0xd67c0f8f,
-0x02b5ed18,	0xbccb127d,	0x92139fc2,	0x1e70a3fb,
-0x84fde186,	0xe3e678e4,	0x3f04793d,	0xefbfd6e5,
-0xce8eb13f,	0x60c77646,	0x966d3b7b,	0xc3e7a620,
-0x4447e93c,	0x8f604fc1,	0x91c17b22,	0x7f232650,
-0xb5efc2da,	0xb2280f8d,	0x519fcedc,	0xaec0722a,
-0xf0d35d60,	0x63c82715,	0x9cfaacb5,	0xf57e3bd3,
-0x4a7ea75d,	0xc228bac7,	0xa1e89e6c,	0x58c8a391,
-0xdaee8c6e,	0xabc21b13,	0x341e7a59,	0x9ad9d0b9,
-0x85d4e8fb,	0x25d0c528,	0xeb4a572a,	0xf95a39ac,
-0x3a409cf8,	0xde9db56f,	0x9782b8d2,	0x664b82cc,
-0xf070e3ad,	0xa4231202,	0x01c2423a,	0x9855d0bf,
-0xc2af813a,	0x4cc77c96,	0xd5d25658,	0x960a18ae,
-0x59ead120,	0xb07bb96a,	0x8a95ab68,	0x3026dafa,
-0xc4ba3959,	0x92ab62c2,	0x75b4328c,	0x9fb9fbbe,
-0x8baf8268,	0x6d18e002,	0x87fe6aa8,	0x8bbaa231,
-0x09c2001d,	0x80e8353c,	0x821a39a8,	0x08b46ff9,
-0xd6caf0ae,	0xa59e0122,	0x6493d7fc,	0xa5121d9c,
-0x9906b736,	0x361c9427,	0xb9fdc3f8,	0xad0575be,
-0x08b6f080,	0xc46399a9,	0x85013609,	0x066ecc06,
-0x878870a9,	0xc2d8b6cd,	0x529b03c3,	0xaaa98ba2,
-0xfd7d4381,	0x0651145b,	0xb3a5ef25,	0xfb2d55b5,
-0x29f7c000,	0xc6cf8717,	0x32ea5099,	0xaab306df,
-0x3657ef2c,	0x20a16efa,	0x51ac482a,	0xd6a62e1d,
-0x47742893,	0xb3b3e105,	0xbfdfc488,	0x015f4adf,
-0xbf6842aa,	0xed18f4df,	0x3c4ccaa2,	0x4923ec46,
-0xa77a5258,	0xea143daf,	0x6c2915cc,	0x87c99911,
-0xb54207f5,	0x676a7ae4,	0xf54539db,	0xba8530d9,
-0x4a92a4d0,	0xa16b254c,	0xfde1b3c5,	0x0f39e80a,
-0x8f091bc5,	0x9c3256ca,	0x32b2e9c1,	0x3e6f0d8f,
-0xc747f7e3,	0x97425a47,	0x53155de3,	0xda67575c,
-0xd918d8e1,	0x54a36761,	0xe3dd3bcb,	0x6c50eb67,
-0x6083a5f8,	0x6f23b175,	0x175539b8,	0xd1033c16,
-0x4b1cb096,	0x5e251620,	0xc9982976,	0xa5f08673,
-0x6d5cb971,	0x7c7dca0b,	0x952f1155,	0xdc82a0e3,
-0x06cd25cd,	0x3a46effd,	0x0fc83360,	0x88713e82,
-0x9ecaae82,	0x9363878d,	0xd1ab7241,	0x8444f2f6,
-0xdc440056,	0xb4ad62c5,	0x9f5f5897,	0xf1f3a779,
-0xbae6be03,	0x3086cd06,	0x9d828a06,	0x4b45af5f,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_67x/microcode.bin

diff --git a/cpu/intel/model_67x/microcode.bin b/cpu/intel/model_67x/microcode.bin
new file mode 100644
index 0000000..ba511e5
--- /dev/null
+++ b/cpu/intel/model_67x/microcode.bin
Binary files differ

cpu/intel/model_67x/microcode.h

diff --git a/cpu/intel/model_67x/microcode.h b/cpu/intel/model_67x/microcode.h
deleted file mode 100644
index bc66036..0000000
--- a/cpu/intel/model_67x/microcode.h
+++ /dev/null
@@ -1,4 +0,0 @@
-
-#include "microcode-mu267114.h"
-#include "microcode-mu267238.h"
-#include "microcode-mu26732e.h"

cpu/intel/model_68x/microcode-MU16810d.h

diff --git a/cpu/intel/model_68x/microcode-MU16810d.h b/cpu/intel/model_68x/microcode-MU16810d.h
deleted file mode 100644
index f37133d..0000000
--- a/cpu/intel/model_68x/microcode-MU16810d.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16810d.inc  */
-0x00000001,	0x0000000d,	0x09211999,	0x00000681,
-0x31708166,	0x00000001,	0x00000001,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x710e5240,	0xab8bc2df,	0x6e652d5a,	0xcc16718b,
-0xaa5c7d1a,	0x43ac1ba0,	0xbdf8684e,	0x82565fa7,
-0x1d108edc,	0x96d2d5a2,	0x85f783a0,	0x16e4cba1,
-0xbc311213,	0xc36c45a2,	0x443b8d2b,	0xfdc5e9ce,
-0xbb6f8637,	0x47011b8b,	0xf3898e4a,	0xb3e90f68,
-0x60af6e3a,	0xff9d3de4,	0x9fb2333c,	0x5a1a39ce,
-0xffd75d72,	0xa60cc2c0,	0x5729267c,	0xfc6d2da7,
-0x8a2c8ae7,	0x71aba5ba,	0xb639ff31,	0x8d1642b8,
-0x3aa67efc,	0x9f786473,	0xaedec560,	0x1acb694f,
-0x97582a6f,	0x8dc17ea5,	0x19636cfe,	0xb5032243,
-0xc46f764f,	0x3a5d3833,	0xf3d1a2b9,	0xc22e59be,
-0x15e0b2f3,	0xe58eff24,	0xc679600d,	0x21a3a845,
-0xc11cc921,	0xed2f5061,	0x2d4db0d1,	0xcc0cc78f,
-0x80197c08,	0x20739d8a,	0xc92ec866,	0xacef343b,
-0x47c0913a,	0xee8a69e4,	0xa7b0157e,	0x4c3607a9,
-0xcc7ff7ea,	0xb0a36667,	0x41d1bcf0,	0xf54c42d2,
-0x946c590e,	0x6da18fe9,	0xf20df0e6,	0x984a2160,
-0x479becd3,	0xfb11dd36,	0xbb816653,	0x60c605c2,
-0xf52efe8b,	0x90a9f863,	0x69654bfa,	0xf0f03f7c,
-0xbf0498d5,	0x68708d82,	0xdab94924,	0x92371217,
-0x603feed7,	0xf0ff8329,	0x9c8769df,	0x6d40ab73,
-0xd8fd132a,	0x9335543f,	0x40fd3abb,	0xf25665a0,
-0x93fe56a6,	0x682a3b24,	0xf3a0f14a,	0x97e92084,
-0x4e8736a3,	0xf322db48,	0xb65de2ad,	0x6af68474,
-0xfd6dae0d,	0x953afb0e,	0x6ef22a82,	0xfa7a3d7b,
-0xb5fe683f,	0x647579c3,	0xd184e7db,	0x99ec7c97,
-0x66486a26,	0xf08c8290,	0x94eb3fce,	0x6305e16e,
-0xd61dd210,	0x9b8bdbba,	0x41a4b4f5,	0xfca38a75,
-0x9c55c7a4,	0x6a4b1f02,	0xf277077a,	0x900e3d03,
-0x4f173146,	0xf6fbf7c8,	0xb2636cb2,	0x6329a9d7,
-0xf2697eb4,	0x90f80f6f,	0x65de6167,	0xfc6cd065,
-0xb4326188,	0x67507c3a,	0xdf3179ff,	0x91207c0b,
-0x6408ad58,	0xf7e7d2fe,	0x999af7c0,	0x6a994828,
-0xdaecedf4,	0x93cba457,	0x4d924b31,	0xf12b5ae1,
-0x9563d541,	0x65bd28f8,	0xfa87a363,	0x983adc3d,
-0x45c4f64d,	0xfae3e1ef,	0xb2eb287f,	0x6050f699,
-0xfb28cfb6,	0x999b1d45,	0x65027980,	0xf4e507d0,
-0xbbd059b7,	0x64cb2688,	0xd29dff15,	0x90927c2c,
-0x6d52471a,	0xf64fc745,	0x9e4050ff,	0x68b66e3f,
-0xd0a1dd96,	0x9fe8a5a3,	0x454c936b,	0xf926115d,
-0x9bfb60ff,	0x604049aa,	0xf3509e5c,	0x9d6cf26f,
-0x4d777c5a,	0xfd7cd5ff,	0xb15d4f35,	0x6b1aa6e3,
-0xfa279f20,	0x94916fae,	0x9b04dbcc,	0x600defd9,
-0xf2977cd8,	0x65fa64be,	0x968feaee,	0xc11681af,
-0x66568af6,	0xa539a4ee,	0xcfed5cb1,	0x108445de,
-0xa603dfdd,	0xbf5ada02,	0x14b868c5,	0xb2d3b8d2,
-0xbabf3637,	0x0c25bfbc,	0xb7a4c247,	0xf2837e05,
-0x062ce963,	0xfcb65c46,	0xc6d190e7,	0x4dfce123,
-0xcb0bf4c7,	0x8bff9d9d,	0x6794e002,	0x2879661e,
-0xa5e93199,	0x77be4be8,	0x22fe3324,	0xb943e4ef,
-0x73463d52,	0x31471050,	0xb68fd63f,	0x84cad24f,
-0x343d922b,	0x42b9ab31,	0x88ee1549,	0xe913e2ab,
-0x4a127048,	0x5057f79f,	0x636eb512,	0x42e02f9c,
-0xd3a8b863,	0x9bc40609,	0x4a18edb5,	0x86a4bdaa,
-0x91819a4b,	0x12a11e17,	0x8a6d7f21,	0xf42998d9,
-0x132b6bbd,	0xe3239feb,	0xf52519d7,	0xada08128,
-0xe6febacf,	0x44e15a80,	0xa977610a,	0xf56a8665,
-0x4693b6f0,	0xb8386320,	0xfcf7d071,	0xb8a1128d,
-0xb2a45d18,	0x075a2095,	0x98ebde53,	0xe8762eaf,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU16810e.h

diff --git a/cpu/intel/model_68x/microcode-MU16810e.h b/cpu/intel/model_68x/microcode-MU16810e.h
deleted file mode 100644
index af03646..0000000
--- a/cpu/intel/model_68x/microcode-MU16810e.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16810e.inc  */
-0x00000001,	0x0000000e,	0x09211999,	0x00000681,
-0x02aa9e53,	0x00000001,	0x00000020,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xa3826712,	0x9971f6d9,	0x717628c3,	0x0fa17f01,
-0x1ec494d0,	0x76bb865d,	0xb8ee6c03,	0x4aebbf9b,
-0xf6e250e1,	0xc3e1ff78,	0xe1ca5a38,	0x01359757,
-0x9d2ab268,	0xa2f0b055,	0x7f57beda,	0xcfc1c483,
-0x25b50b8f,	0x5625931d,	0x32791755,	0xa7b271e4,
-0x8daf1c60,	0x9add85b5,	0x1faf9968,	0x3c6b2f7e,
-0xcaf36c5b,	0xd75190a5,	0x0fd8473f,	0x35a6851a,
-0x80498f48,	0x922c570d,	0xd343dd3f,	0x420d68a4,
-0xf3d3e34b,	0x9f8e3981,	0xd7fa629a,	0xb75ffb4d,
-0xefb42deb,	0x0b21ef31,	0xa2088a34,	0xa89133e2,
-0xd839caf1,	0x56be7fd9,	0xea6f3ff8,	0x97783330,
-0xc6971be0,	0x1fc6fccf,	0x331cb3a5,	0x0b51943b,
-0x60a7befe,	0x2815bc9c,	0x5b87374a,	0xa059d986,
-0xe605bc93,	0xe64ebb70,	0xae782a6e,	0xfc78e27c,
-0x6d328f53,	0x6ee07ee9,	0x3d976316,	0xa202fd83,
-0x42bc93eb,	0x6011768c,	0xc0cd685b,	0xbfa44ff0,
-0xb1a42d0e,	0xfba4071f,	0x84be8a4b,	0xda405846,
-0xc57de4e0,	0x94c2db62,	0x5ea46276,	0x68532e48,
-0x739f2061,	0xe83be5f8,	0x01512724,	0x17921d87,
-0xe14df45e,	0x0d32a208,	0x762b277b,	0x36f6b74b,
-0x07be0bf3,	0xf3b4181e,	0x95ea3ffa,	0x033df16a,
-0x67ed2ae5,	0x989531e9,	0xdfb69578,	0x6ca56d00,
-0xe2f2184b,	0x17f6a230,	0x26ec4a92,	0x9013b3e3,
-0x11b5e3b4,	0x207ef9a4,	0x0ddb53cf,	0x74a168b8,
-0x834453a1,	0xaa2e2e81,	0xa5c90f38,	0x5f5ae5b3,
-0x0f09aa1c,	0x19929274,	0x5bb6e90b,	0x66927421,
-0x952dcf70,	0x89c35f06,	0xb3050013,	0xa344a3e3,
-0x3cc76dd2,	0x525c96fd,	0xdc72d098,	0x07b05407,
-0x4ea1b6c6,	0xd8f5bcea,	0x7822ee01,	0x3f90c906,
-0x9f2e4ec7,	0x7dc5aac4,	0xfa700502,	0x90887ff6,
-0x0f8cf395,	0x9b556509,	0x183e0d1b,	0x88cc120d,
-0xdf65b198,	0x991ccf57,	0xe2626f93,	0x82c758cc,
-0xc250b731,	0xed87fac3,	0x5afced73,	0x1d37519a,
-0x785fccad,	0xffb0d0e9,	0x88a3f327,	0x705ae1ed,
-0x974e2ae9,	0xd3f8280b,	0xa13c9f52,	0xb5b9eade,
-0xc9b91cde,	0x83d6ff2b,	0xc2a61865,	0xe0de9e81,
-0xb1d2e242,	0x7ffa8e15,	0x98a1f351,	0x6075f89f,
-0xdb1139b5,	0xff53a15f,	0x59d9498e,	0x2544a92d,
-0x5e54f2a6,	0xa8dce04b,	0x80f367bd,	0xb105a1e2,
-0x0dc47778,	0x5fb0a3bc,	0xc0ffb5bb,	0xb06bc1d3,
-0x959776fa,	0x9c917553,	0x0b060078,	0xd1d9450f,
-0xe6e8ebaa,	0xf6ba895b,	0xfef15af6,	0xaca6aeed,
-0xb4eb8789,	0x76128d63,	0x9c9dc872,	0x6a4fd299,
-0xa7eb1e33,	0x571674fd,	0x6073c4f3,	0x7972804f,
-0x73f72358,	0x5f23a534,	0xa4cd9b93,	0x94371f63,
-0xe3868a0b,	0xd5e18036,	0x683ac91a,	0xc7efadc3,
-0x49530c41,	0x2dfc7378,	0xb347634c,	0x346e6cb4,
-0x0614dcdc,	0x2354afa3,	0x4d5fcf18,	0xc406909f,
-0x0fdc3a94,	0x17e804ad,	0x7e5d27b3,	0xf710a493,
-0x735dc0d2,	0x6c82225c,	0x86b80c2e,	0xc83fa3c3,
-0xddcd7f93,	0x5c7e7f80,	0xb3f739e3,	0xb027392b,
-0x4d3e6ce8,	0x526fffac,	0xa783d364,	0xf6b43a19,
-0x6ab12fe3,	0x72ffa066,	0x4990f0c7,	0x63c1c4f4,
-0xcddeb2d8,	0x806d60cb,	0x4395d31f,	0xca3930a6,
-0x1ee270b2,	0x0521e26e,	0xaad7ee7c,	0xcb5a8502,
-0x63a00a64,	0x4bb5b884,	0x56db2b2c,	0x7a6b1ff3,
-0xa56a10ee,	0xb3ba2efe,	0x4c5c0bbf,	0x96320c37,
-0x2383cf15,	0xce011b62,	0xbf2d0e37,	0xcbfbc5fd,
-0x50f83db7,	0xef633153,	0x66d62778,	0xef02ef93,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU16810f.h

diff --git a/cpu/intel/model_68x/microcode-MU16810f.h b/cpu/intel/model_68x/microcode-MU16810f.h
deleted file mode 100644
index cdd6cca..0000000
--- a/cpu/intel/model_68x/microcode-MU16810f.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16810f.inc  */
-0x00000001,	0x0000000f,	0x09211999,	0x00000681,
-0x73f2cca2,	0x00000001,	0x00000008,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x78021ec2,	0x1b1b6d8b,	0x6bb53ed4,	0xd36c5ad1,
-0xbf6f3c59,	0x4c97e2fb,	0xadbe12d3,	0xa6998d5d,
-0x327a1a64,	0x84a0f599,	0xb75eee4e,	0x2da4f396,
-0xbceafc7a,	0xce54ed0c,	0x6f4276cf,	0xec5393e7,
-0x8235b282,	0x5c60204d,	0xf44af88f,	0xab0e81d5,
-0x5c6631de,	0xd60e5d01,	0xb9a1a5b1,	0x672f570b,
-0xfe8d296d,	0xbe304563,	0x6a4ef0a3,	0xc6b22b69,
-0x92a1406c,	0x66562aea,	0x9ac8a28e,	0x95c31acf,
-0x3dfaaeb2,	0x949f1129,	0x8bd271ad,	0x1ecb6dd9,
-0xad22be72,	0x8308f8db,	0x3d3d5ab2,	0x97c412c6,
-0xd83161cb,	0x2edd3832,	0xe3a6a21b,	0xc888a0c6,
-0x16dfbcd3,	0xfcadc2fe,	0xd85d71ec,	0x358bce2c,
-0xe87d2d81,	0xf10dfb9e,	0x296c32cd,	0xfbb12b01,
-0xb521c0dc,	0x0135a8e2,	0xc014d67e,	0x82301d9d,
-0x7a506b07,	0xd627731f,	0x938e12ea,	0x60fb36ad,
-0xc2121315,	0xb3a40ef2,	0x501a4463,	0xca53a7e2,
-0x8905d202,	0x56f04dde,	0xdf6d6db2,	0x99668508,
-0x73fcc401,	0xebb098d0,	0x8ab8cf4c,	0x65495bd0,
-0xc5dc6126,	0xbfa3738f,	0x40e269b5,	0xe7c065b0,
-0xafa8f722,	0x610005e5,	0xe1efd3ea,	0x9f52c4a6,
-0x6fe5e4c4,	0xca7b2d93,	0x9a487d3d,	0x7150e2a9,
-0xd597acc8,	0xb0892a96,	0x556a0e0b,	0xc75a6dda,
-0xb1cce67d,	0x70576a5e,	0xd5d9f4cb,	0xa323dc2a,
-0x7984f913,	0xd44fbda1,	0xb6eb13bf,	0x5282b867,
-0xf7b50028,	0x8ab18c60,	0x706c63a3,	0xfdc16223,
-0xa0de6a16,	0x5be19bd6,	0xec5dfbf2,	0xa49b0124,
-0x6bf7b85e,	0xd9a2bf9c,	0xb92a235e,	0x4531115d,
-0xf449984a,	0x8ada6365,	0x454ff6ce,	0xcda5e072,
-0x966da5e9,	0x4e0ffc35,	0xef46600b,	0x9cb0d898,
-0x59652b89,	0xdb79de7b,	0x92ff99ad,	0x6aee17f4,
-0xd8f79930,	0x89b5c1fa,	0x66223270,	0xcd70ceb8,
-0x9239e6ff,	0x768f9775,	0xd301ef77,	0x9be7283d,
-0x4133ce34,	0xf64ea6a6,	0xb813aeec,	0x7356bce2,
-0xe0eba825,	0x93ba38e3,	0x4853cd1f,	0xf22774ac,
-0x8c5896e0,	0x59fb292a,	0xf3af2c19,	0xa8a3d0d6,
-0x43d676fe,	0xe1f30726,	0x9da64a3b,	0x4bd03774,
-0xf544baa7,	0xb2400406,	0x7391da22,	0xc15eb93e,
-0xa0994a39,	0x444ca24a,	0xfe8762c6,	0x90b5f5b2,
-0x5ecc0a28,	0xe81b735c,	0xba6bfdc2,	0x5165cfb1,
-0xce117215,	0xa1a3c7c3,	0x47284431,	0xc0db0ba1,
-0xb5d29293,	0x5c92a346,	0xee7f3017,	0x84299ee1,
-0x5315374a,	0xd9a9320d,	0x95e25cac,	0x53fbd980,
-0xfc075892,	0x9d160ae3,	0xfa59aa1c,	0x68a14dd3,
-0xdb68489d,	0x28b10918,	0xfc4c5c55,	0xca7ccc8d,
-0x29343574,	0xf72e46d2,	0xc4bd67fb,	0x9c860395,
-0xc615810e,	0x7ab9b008,	0xb557ceba,	0x7f40312d,
-0x7514ff0f,	0x0ccde8c3,	0x40c2f374,	0xf591f29d,
-0x39703a56,	0xd65b3aef,	0xc9d0ef94,	0x14e6df58,
-0xda4fa9f6,	0xe2a84104,	0x2c0056b5,	0x46dd13f6,
-0xeb5e2c1a,	0x65247396,	0x57daa392,	0xd2bf33ed,
-0x573252ef,	0x6ef7ce92,	0xc7567e90,	0x316102be,
-0x45d869e2,	0xaa59ec71,	0x1b8d9393,	0xd8e818ca,
-0x8fdb774e,	0x947f5af4,	0x5e52c4b1,	0xa3fb36d5,
-0x1742fa22,	0xb8e27fbc,	0xa3791a5f,	0xe38e05a6,
-0x9fb62dd5,	0x720310b5,	0xf473e100,	0x146348e0,
-0x589ca309,	0x6e64c75a,	0x3a956b4b,	0xa80c0dca,
-0x6d16fff0,	0xfab7a74c,	0x8ac8a2a8,	0x7e4b5bea,
-0xfcb2ff29,	0xa007c2a7,	0x42cb7df9,	0x2af79938,
-0x9c80c69b,	0xa66945ae,	0xe7efde80,	0xe6061c57,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU168111.h

diff --git a/cpu/intel/model_68x/microcode-MU168111.h b/cpu/intel/model_68x/microcode-MU168111.h
deleted file mode 100644
index 3ca5019..0000000
--- a/cpu/intel/model_68x/microcode-MU168111.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU168111.inc  */
-0x00000001,	0x00000011,	0x09211999,	0x00000681,
-0xfc16538d,	0x00000001,	0x00000010,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x4de0640c,	0xc8973947,	0x5f1a48c9,	0xe647f1a2,
-0xa24d2118,	0x636cab60,	0x8c470d7d,	0x916cd75f,
-0x31031bd3,	0xa3c538bd,	0x9e5e54f6,	0x206378e4,
-0x96583499,	0xd872c73c,	0x7780f2aa,	0xd03a37c5,
-0xa75749cb,	0x6813ae73,	0xddf49382,	0xb8ff72b2,
-0x59e1a409,	0xc6a4a78c,	0x90f5cfb7,	0x66ec3d57,
-0xd9914756,	0xb3138c73,	0x69c01b23,	0xcb99a6f0,
-0x96ebb2db,	0x55deaeeb,	0x97e60f3b,	0x96c1776d,
-0x08d15554,	0xaf028e0a,	0xbdc887d4,	0x377c3fc3,
-0xa73f7fce,	0x875bdb80,	0x2b2a8115,	0x855f5412,
-0xc74fe60a,	0x1153038b,	0xd156fac3,	0xd32d49d9,
-0x39362ff1,	0xc93951f6,	0xda6b6688,	0x050ded5d,
-0xec5b05b2,	0xf3cde21b,	0x135002af,	0xf28d1e45,
-0x87f8ac42,	0x1808c59b,	0xf1a9a99c,	0xa3c079b4,
-0x618398ae,	0xdafd0792,	0xa1660c5a,	0x6ce2b855,
-0xeffb8673,	0xba52b2c2,	0x6ea9eacf,	0xcd199498,
-0x8c40ee4f,	0x4d0ef108,	0xceca369b,	0x9be2fcc8,
-0x7dcf0b48,	0xc896c374,	0xa5c99fa0,	0x4e0439cd,
-0xde60ed85,	0x919b4a0f,	0x42dec524,	0xc6816f32,
-0xb55b5b78,	0x5b04fadc,	0xe76b74da,	0x8831a1a7,
-0x4da4822c,	0xcdddd7c5,	0x871d13de,	0x407b21fe,
-0xf723c517,	0x9c31f7a1,	0x6a70544c,	0xdc09b250,
-0x85543abb,	0x470e242b,	0xcdd37b16,	0x96b413d5,
-0x668d6a71,	0xccbdf00e,	0xb8a97064,	0x45c99ae4,
-0xcbb8497c,	0x85e42264,	0x4ca5f7d0,	0xc2226431,
-0xbe6e9ae3,	0x52c3942a,	0xe6d864b8,	0x95881f73,
-0x4b73573d,	0xdd99bf30,	0x9e8a7486,	0x5a189375,
-0xfe50ad4a,	0x95122b0d,	0x6f3cf161,	0xdc688639,
-0x8adf821c,	0x53bacee5,	0xdc1bbc9e,	0x8ecaaf3f,
-0x7a2e5ac3,	0xda48729f,	0xb0dfba0c,	0x4e7a9d7c,
-0xda65e096,	0x88d8bb16,	0x44e67898,	0xc650ff49,
-0xb9a43a9d,	0x58e53b4f,	0xf933b6a0,	0x9e9d335c,
-0x578869ee,	0xd2883627,	0x8bd3ab9d,	0x5e29c348,
-0xe6c5a282,	0x8e82941b,	0x7979e140,	0xdc56e429,
-0x9745fd79,	0x4b950ee6,	0xd272f837,	0x9af05970,
-0x7759d3e0,	0xc8ee8e0e,	0xbacb9ed5,	0x440d9114,
-0xd5bc1831,	0x912e2243,	0x56af00c4,	0xc23ec9db,
-0xba9e9d48,	0x5faacb65,	0xf73dbbff,	0x93836333,
-0x585bbc70,	0xc0d7e190,	0x932a74aa,	0x492cb232,
-0xfc36cf0f,	0x835177c1,	0x79d72f94,	0xccc718d1,
-0x8f042ef7,	0x598a6fb3,	0xd13abadc,	0x9f9bd37c,
-0x7dd5d78e,	0xc9dc4386,	0xbb82c5de,	0x49b3c88a,
-0xcb327a3b,	0x8079a035,	0x6ceeab9a,	0xc6c94539,
-0xd3e59ff3,	0xb6734f63,	0x6532095b,	0x95fbb24d,
-0xb8f3d958,	0x2774b965,	0x85b787c3,	0x09829f85,
-0x2dbf0048,	0x36eb1841,	0x152f6a16,	0x33fb0ebb,
-0x30da5568,	0x133b5de5,	0x250ba5db,	0x239c23c4,
-0x075baf9a,	0x3537b51b,	0x055d28de,	0xf6e7138a,
-0x1c385d65,	0xfbabee54,	0xc9a8bccd,	0xd4b82b1d,
-0xc5a641a6,	0xf1e979e5,	0xd16bc5cb,	0x3b2d7882,
-0xfe16497c,	0x38501d49,	0x23b94d60,	0x1c1599c0,
-0x34ed3dd9,	0xd2a70152,	0x0bd63ff1,	0x29d7c05d,
-0xc9994c27,	0x1d28ae35,	0xad24c6b8,	0x903cf6de,
-0x9730ee69,	0x05578fc8,	0x818ee685,	0x7dff8b27,
-0x10d2f9c4,	0x7e62c1fa,	0x74caf9cd,	0xd6431b77,
-0x78f4d042,	0xad1d90b7,	0xc9bc08fd,	0xc6485ea2,
-0xb798605a,	0x6a2b95ac,	0xd0390295,	0xd748a646,
-0x7530ded2,	0xbc2ccfff,	0xddadb60b,	0x417e02e7,
-0xa7b63c65,	0xeb5d09c8,	0x4290aa24,	0xba90e59b,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU168307.h

diff --git a/cpu/intel/model_68x/microcode-MU168307.h b/cpu/intel/model_68x/microcode-MU168307.h
deleted file mode 100644
index 2a08517..0000000
--- a/cpu/intel/model_68x/microcode-MU168307.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU168307.inc  */
-0x00000001,	0x00000007,	0x10151999,	0x00000683,
-0x1c5efd4b,	0x00000001,	0x00000020,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x1a7821a0,	0x5c7f704b,	0x8e78e37b,	0x50c22d14,
-0xd7937431,	0x51820d98,	0x5cad6308,	0xec5e3721,
-0xd41ee66d,	0xb01a24c5,	0x5ff960ce,	0x3c922ad2,
-0x709ab11a,	0xebb95fab,	0x2db73b5a,	0x20945fd3,
-0xa81b0257,	0xbf8155d0,	0x04fd273f,	0xc077c5ae,
-0x1da50ba8,	0x307bda81,	0x5923ff70,	0x103828c6,
-0xaf83cdca,	0x2f3c561c,	0xd5cb85b8,	0x1a807114,
-0xc241322b,	0x4e401582,	0xe2567b0e,	0xad093555,
-0x4c182287,	0x14ac0b2d,	0x90cf1541,	0xedce3c25,
-0x05da049b,	0x0985b6a0,	0x1f9e9be4,	0x994b2d6d,
-0x68d04ab3,	0xe2aa006a,	0xeecb3773,	0x5a7c271a,
-0x0ac949d2,	0xa3668ff0,	0x97c326c6,	0xc05d483c,
-0xbddd9812,	0x9b823a6f,	0xb3b94ebd,	0x00ba7054,
-0x7f96f49c,	0xfe29574a,	0xcc79bed8,	0xebbd89a2,
-0x6a0f4007,	0xc3ba70bd,	0x92ed4aba,	0xeb17fcd7,
-0x8c65dc38,	0x538035a3,	0x1f16c77a,	0xd816d9fe,
-0xc9054761,	0xb2867d05,	0x8a3cefa0,	0xebd91eb2,
-0xbb43e990,	0x193bc028,	0xdccdc90b,	0x5e76a8fd,
-0xa80a4aca,	0xe370a88f,	0xb4981ab9,	0x7cae2227,
-0x8e3052e1,	0x1784fe28,	0xc4007b0b,	0x4871dd0d,
-0xa606e0aa,	0x2e9e19e5,	0x770a64e0,	0x8e173235,
-0x2452fa0d,	0xd8ca8e56,	0x912ae38b,	0x713a1325,
-0xc8cee2c6,	0xc728742f,	0xc6571e00,	0x2b1b3cdb,
-0x358965d4,	0x19357f16,	0xdcd504b9,	0xfb35fadd,
-0x9d511335,	0x7642b9c1,	0x47f1226d,	0x6e5c9b37,
-0x37cf651c,	0x694bb058,	0x110004c6,	0x351dc396,
-0xca6828a8,	0xe477af88,	0x97bb399a,	0x60b23e3b,
-0x02bcde6d,	0x67f48e58,	0x09cdb6c6,	0x231ab666,
-0xc46482c8,	0x29991ee2,	0x542947c3,	0x920b2e29,
-0xa8de7681,	0xa8bafe26,	0x5ce72e46,	0x1a51784e,
-0xaaac80a4,	0xc02f7328,	0xe5743d23,	0x370720c7,
-0xb905e958,	0x69450f66,	0x1118c974,	0x905e91b6,
-0xff337157,	0x7145bec6,	0x64d2014e,	0x7240872b,
-0xbb43e990,	0x193bc028,	0xdccdc90b,	0x5e76a8fd,
-0xa80a4aca,	0xe370a88f,	0xb4981ab9,	0x7cae2227,
-0x8e3052e1,	0x1784fe28,	0xc4007b0b,	0x4871dd0d,
-0xa606e0aa,	0x2e9e19e5,	0x770a64e0,	0x8e173235,
-0x2452fa0d,	0xd8ca8e56,	0x912ae38b,	0x713a1325,
-0xc8cee2c6,	0xc728742f,	0xc6571e00,	0x2b1b3cdb,
-0x358965d4,	0x19357f16,	0xdcd504b9,	0xfb35fadd,
-0x9d511335,	0x7642b9c1,	0x47f1226d,	0x6e5c9b37,
-0x37cf651c,	0x694bb058,	0x110004c6,	0x351dc396,
-0xca6828a8,	0xe477af88,	0x69c96661,	0xd3298179,
-0xbe41ad76,	0xb3397e64,	0xede18b2f,	0xc9d46419,
-0xb1f0487c,	0xc1957106,	0x6a1544c2,	0xbd8c9352,
-0xbe63dbd6,	0x56032dab,	0x3afc824e,	0xd2b9bd8e,
-0x3cdf7aa8,	0x05a65e2b,	0xf5754a4c,	0x3686c208,
-0xaf304450,	0x6fe2b358,	0xb24b9535,	0xbc7c85bc,
-0x090fe7dc,	0x1f6f78ee,	0xf620e00c,	0x4c723c90,
-0xa68330e1,	0x3f6d625e,	0x3e70e19a,	0x1a4c4273,
-0x67658f78,	0xcf51048b,	0x41a50d62,	0x59dbd4da,
-0x50b3f115,	0x14590456,	0xbb3a3f9e,	0xb56b5947,
-0x3c774967,	0xce1de1f7,	0x6123b871,	0x317cbf4c,
-0x8730d79b,	0xa56d2631,	0xab312243,	0x29ddc7e9,
-0x9fb56d0c,	0xf58cefc9,	0xf13bd652,	0xc31b5ee5,
-0x29e957b0,	0x93152de5,	0xc44ccf17,	0xe13c8e66,
-0x882d583e,	0x44b2993a,	0x9274016f,	0x767f7670,
-0x233ae532,	0x6ef6694b,	0x89800e05,	0xc479ac7c,
-0x8f5b4d18,	0xffab875d,	0xc1e6cf41,	0x9222f8e4,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU168308.h

diff --git a/cpu/intel/model_68x/microcode-MU168308.h b/cpu/intel/model_68x/microcode-MU168308.h
deleted file mode 100644
index c31d7e0..0000000
--- a/cpu/intel/model_68x/microcode-MU168308.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU168308.inc  */
-0x00000001,	0x00000008,	0x10151999,	0x00000683,
-0x2942e387,	0x00000001,	0x00000008,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x3838d964,	0x902da5bd,	0x291242e7,	0x8b611e36,
-0xa1f50719,	0x04db741d,	0xf20fd434,	0x81bff663,
-0x55f9d881,	0xd165ba1f,	0x8273456e,	0x5ea792cd,
-0xb180dfd7,	0x8e132720,	0x5158a07f,	0x974c8cac,
-0xe985a9c2,	0x77116988,	0x9763ed80,	0xee285274,
-0x54ef293d,	0x82e07a61,	0xe206995a,	0x6a1ea44c,
-0xa048dbac,	0xc5079ea0,	0x6e98bb25,	0xa7fe9390,
-0xab8eb8b3,	0x676d95c5,	0xa3717b10,	0x88cbb1a0,
-0x063c9bb1,	0x8ea06eb7,	0x8a413fe1,	0x06cee3b4,
-0xa81517f4,	0x95969e5d,	0x0c461076,	0x9084e3c0,
-0xb1b2d589,	0x23f4d34f,	0x9f0f3310,	0xbc405c78,
-0x0a7f579b,	0x9387e317,	0x97f3842c,	0x21484298,
-0x92fecf31,	0xb5f1b4e6,	0x28d7a97d,	0x90028586,
-0x9fe33718,	0x29cd7b3c,	0xbb71c9a8,	0xbe74ac41,
-0x28c78336,	0x93a64453,	0xb6aa1d3a,	0x2fff3d35,
-0xb8819e2d,	0xbe096062,	0x08b9d869,	0x90246df3,
-0xb147c8ca,	0x2e71130f,	0x90c3d7fa,	0xb84820d8,
-0x0cfbb1d9,	0x90f2bf7e,	0x9c47e13b,	0x2388d7c2,
-0x94ee5ce5,	0xb080b40c,	0x2326bf4d,	0x9375a9a4,
-0x9ad8380f,	0x271f5e2c,	0xb5f1de30,	0xbdffd0b8,
-0x284ffe0b,	0x9409e2a5,	0xb3a58879,	0x28818b7f,
-0xbd91db97,	0xb2abf842,	0x0d2d2b0a,	0x91ecf85d,
-0xb91b2eb0,	0x2563e378,	0x9fa7639f,	0xbe81b8c6,
-0x0fb5ea70,	0x94f85ab0,	0x97953cc1,	0x2b3a73e2,
-0x975d8522,	0xb404623b,	0x207c3245,	0x946c9cf5,
-0x967675c6,	0x27aa8f92,	0xb8205a69,	0xb28fe6a9,
-0x289b3ce6,	0x93cc869d,	0xb1972934,	0x259f9f02,
-0xbea0891d,	0xbcff6fff,	0x07eaa51d,	0x9074834d,
-0xb66c1195,	0x22bf078c,	0x995420f5,	0xb7e4e440,
-0x03b6db68,	0x9256fe33,	0x908c92da,	0x23c2742b,
-0x994aef66,	0xb282f279,	0x2e621d6a,	0x955c0d7a,
-0x9a988b30,	0x29d7a2da,	0xb64a9f05,	0xb9fb5b99,
-0x28771440,	0x92ee3a9c,	0xbf3fc296,	0x21782c1b,
-0xbc2c0593,	0xbfd4f35d,	0x04cbbe43,	0x9fa34c64,
-0xbe07f147,	0x29732e30,	0x9f67c5ac,	0xb2e4b75f,
-0x04bc34ac,	0x9c9bbff2,	0x9ce62807,	0x2d049c9f,
-0x96c1a09a,	0xb19cd8b6,	0x220b181a,	0x982f6389,
-0x9070997f,	0x2796d439,	0xb15b5d2f,	0xb8cbd480,
-0x2505dfa5,	0x9eab7bc6,	0xb8804227,	0x21c365a0,
-0xb6ea7a60,	0xb78cc479,	0x0bd7cdee,	0x93bdaf54,
-0xbf06d0c8,	0x2efc2f14,	0x9c50bc3d,	0xbe061fc9,
-0x09b1d239,	0x9d108ef5,	0x93a927e3,	0x2de79820,
-0x97ff4ab4,	0xba26921f,	0xd2747084,	0xed133b6b,
-0x9074dc4c,	0x4e87f999,	0xd8a524e5,	0x03783ce8,
-0x4ad8decf,	0x4374b184,	0x0770df64,	0x519e3279,
-0x45c979ba,	0x1e7b128a,	0x65395e10,	0xa14f443b,
-0x21a1ba1f,	0x8ea82043,	0x8f410b31,	0x4118599f,
-0xa79dc4b4,	0x1ca5a94e,	0x496c8ea0,	0x54cd1f90,
-0x1950bd4c,	0xb7e041b0,	0x528876e6,	0xe4c1bbad,
-0xb1b9bd2f,	0xabd54c9e,	0xe99ab67a,	0x44016c9c,
-0xaecbb239,	0x140e16e8,	0xc2538565,	0xa6719fd0,
-0x99e70bf0,	0x3abdddbf,	0xabc89721,	0x8e1d1eec,
-0x393b9ab4,	0xb031b8d5,	0x8da9d990,	0x79ff13ff,
-0xb6d4035f,	0xcbaadfe5,	0x7bf570c0,	0x2e26f67e,
-0xc804d983,	0xebb4f852,	0x2e94f0ae,	0xc0764840,
-0xe575c6ca,	0x2206ad7c,	0xcdec956c,	0x591a50fc,
-0x2945c2ee,	0x758abe31,	0x581d5a78,	0x2edc794a,
-0x7d2f7b02,	0x53a4f6b3,	0x2a3d7cfe,	0xa0326a10,
-0x5c229fb9,	0xfaefcdd9,	0x468143c7,	0x0e2f860c,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU168607.h

diff --git a/cpu/intel/model_68x/microcode-MU168607.h b/cpu/intel/model_68x/microcode-MU168607.h
deleted file mode 100644
index 4b2eaf6..0000000
--- a/cpu/intel/model_68x/microcode-MU168607.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU168607.inc  */
-0x00000001,	0x00000007,	0x05052000,	0x00000686,
-0x87aa303f,	0x00000001,	0x00000001,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x6624c5b2,	0x098bab85,	0xd7cb9fd8,	0x2ad2c3e5,
-0xb024689e,	0x030082ce,	0x87544b9b,	0x50a47302,
-0x34508a4a,	0x42eac716,	0xfb29145f,	0xa89d38cf,
-0x1595afcb,	0x7151404b,	0xd87466cb,	0xfbb7616c,
-0x912ba3ae,	0x43848a53,	0x7f5b7bd9,	0x770c3d91,
-0xd579a19a,	0xcd45be4f,	0x11f83af2,	0xec7a7162,
-0xa31769fb,	0xb872d8b0,	0xed21b052,	0xa9757f0b,
-0xd93fbb9e,	0xe4755de4,	0xde0b505f,	0xfaec9b1d,
-0x7e379d2b,	0x77cd8d54,	0xd884d9a5,	0xc856674b,
-0xd48fad7c,	0x79c380ef,	0xeac7311a,	0xf345ae9b,
-0xe6641e8a,	0xd0e02365,	0xf95219d1,	0x5ef40f4c,
-0xfb46254a,	0xa79b9c00,	0x33ff5502,	0x90a4ffc7,
-0x5b61dea5,	0xee2da1a4,	0x2d33a250,	0x970e8b65,
-0x61fa9e4a,	0xbf7a110e,	0x9cbe1302,	0x4489e932,
-0x273d2ac7,	0xbf0576ad,	0xb11796be,	0x100c4eb8,
-0x9f48c79b,	0xf43e6390,	0x07f19aa4,	0x0438d6ad,
-0xd073b3e6,	0x758caefe,	0x44695821,	0x0aa2560b,
-0x926f1676,	0x25c0d98c,	0x652b9701,	0xf1103ca1,
-0x3838b324,	0xe86c1a56,	0xcaadd270,	0xe2655064,
-0xc12e9397,	0x269a7069,	0x2c8431ef,	0xf123bff2,
-0x9d72d45d,	0xcde8c983,	0x9bd75039,	0xaaae7612,
-0x73f647ed,	0x96c2dfec,	0xf3c78dfd,	0x43386b24,
-0xa54c9fc9,	0xe5f902ea,	0xcf895610,	0xffbd67d8,
-0x88f26c51,	0x3af4baa6,	0x853803ce,	0x06a2c772,
-0x58dfbaf2,	0x854db965,	0x9d99817d,	0xb8fe256c,
-0xba4728ee,	0x0c4311b2,	0xb725f711,	0x332ec9d0,
-0xba328c24,	0xe97255e4,	0xe0fefbf2,	0xc90b8e05,
-0xdf3a9869,	0x29a5ead4,	0x8ffc234c,	0x1df04450,
-0x53ea2f3c,	0x2f27e401,	0x17267310,	0x12230316,
-0x4495bfc3,	0x6300281f,	0x6f1229ea,	0x987a8a03,
-0xfd00f044,	0xb4119ea5,	0x08921ba9,	0x512b7a0d,
-0x51baec70,	0xf456605d,	0x00d8a15c,	0x67838a1a,
-0x662ef9a3,	0xcc306d52,	0x4693878b,	0x2d0e5d8e,
-0x743cbcd2,	0xa6a7a050,	0x7a943e8f,	0x2e52c6a6,
-0x317b8d12,	0xac83eba9,	0x59a647a5,	0x158c0cc2,
-0x11af9e25,	0x6809f3ab,	0x4e59d047,	0x281ffa25,
-0xd3290e4c,	0x3f876c53,	0x58562bc3,	0x3a17709e,
-0x29e591d8,	0xc842e16c,	0x71620b18,	0x88680e85,
-0x31bb0bbf,	0xe408d90d,	0xfc2870f2,	0x40a8e770,
-0xbd7f322b,	0x00727a75,	0x12de5772,	0xca6a1790,
-0x7f3170ce,	0xb29b3c80,	0x96d58bd7,	0x197d7dcd,
-0xa793ec3b,	0x330d1496,	0x696788bf,	0x5e7895de,
-0x4548fe46,	0x9c061b57,	0x130f9b26,	0xbc11df79,
-0x1b0f6fc3,	0xa154182e,	0x568ab60a,	0x9aa45739,
-0x7ebb7352,	0xe6c82d4e,	0x2626170f,	0x6484ec37,
-0x8ade49d3,	0xe3608320,	0x43572189,	0x7b0b6733,
-0x518bb91a,	0x9da00229,	0xc1e449cb,	0x8ff922ba,
-0x7a523623,	0x615cc16d,	0x42e38cd9,	0x1253134d,
-0xa3fa6f02,	0x623b38cf,	0x86ab89cf,	0x1443acb0,
-0x8e21a201,	0xf111cfe6,	0xd02a9132,	0xb1d1a8d2,
-0xe177664e,	0x231603ff,	0x711075e7,	0x1d18d937,
-0x5b6e1cbe,	0xf6aa6105,	0x21d4847f,	0xfdf8e049,
-0x397d3ffd,	0x50142e73,	0xb3bcb17a,	0xe6d9c88a,
-0x9a757f51,	0xd8f22a49,	0x3bc7d8dc,	0xe337cd53,
-0x097fc575,	0x3e7b9ca4,	0x0f240073,	0x3746b51b,
-0x42de4d17,	0xbb2e58ab,	0x4b17f3d7,	0x8d0e06c7,
-0x4dd1c929,	0x60de42b6,	0xffdd1ce9,	0xcdee1401,
-0x9153da16,	0x74cc8c18,	0xed1d6841,	0x111a4964,
-0xbd86a589,	0xe1bf2ad4,	0x02fa8ce7,	0xcce8b286,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU168608.h

diff --git a/cpu/intel/model_68x/microcode-MU168608.h b/cpu/intel/model_68x/microcode-MU168608.h
deleted file mode 100644
index f5b871b..0000000
--- a/cpu/intel/model_68x/microcode-MU168608.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU168608.inc  */
-0x00000001,	0x00000008,	0x05052000,	0x00000686,
-0xea2b7b61,	0x00000001,	0x00000010,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x38709a5e,	0x7cbb9fcd,	0x46f2975c,	0xdf0a611a,
-0x454f553d,	0x4dd783fc,	0x38b72f92,	0xe6cd7f96,
-0xf57804bd,	0xf12c0d73,	0xafa105a2,	0x74073ece,
-0xfa02d788,	0xd8a7bdd3,	0x2471c214,	0xcdcf7014,
-0x0e6e693c,	0xbafbc7c1,	0xd765a8ca,	0x65b6cc40,
-0x2ed8a24a,	0x2c1fcf0d,	0x7d73ba93,	0xcf0a98db,
-0x3caea0c2,	0x49e601d9,	0x936c2fef,	0xc87dc94d,
-0x1fef698e,	0xda05fa7b,	0x204f5b4e,	0x441cedfd,
-0x09f63dcc,	0xf7cc7654,	0x2b69ecf9,	0x495d0ef9,
-0x7679dac3,	0x7a4c0547,	0xb7adeed9,	0x29053d15,
-0xcf0b21bd,	0x77204452,	0x99ba650b,	0x3d19d146,
-0x150b0f41,	0xd7b5238f,	0xd02a8165,	0xd1270d1d,
-0xf6d102bc,	0x198ab690,	0xed878dbf,	0x34c2ec98,
-0x4c9bee07,	0x66ec11f1,	0xaa5202db,	0x4d2f2fc8,
-0x4ba8194b,	0x569fbee6,	0x9016ef51,	0x8fe4062c,
-0x90148cec,	0x5be3ddc4,	0xf04ff2c4,	0x5de8d897,
-0x09b1d0b4,	0x9f83a4f7,	0x0cf74fdf,	0x3c02a388,
-0xa2045a65,	0xbe469468,	0x03e4c532,	0x5f14280e,
-0xb384e96b,	0xfdce24fc,	0x2458e3ea,	0x169dbd24,
-0x71c8b3f3,	0x67e019af,	0xcda860c1,	0xe279acc0,
-0x6bc10e92,	0xe51258ec,	0x4630c6d5,	0xfc260a15,
-0xca8197db,	0x30aefd93,	0x789a7c9f,	0x1dbd5410,
-0xd4e1c7a1,	0x309e8843,	0xd47f27ab,	0xf0c4a0d6,
-0xe30a1e06,	0x3056c766,	0xb45c4d62,	0x3b8a2d43,
-0x0b013cdc,	0x8b2163e8,	0x3027cc1b,	0xe4c4db4e,
-0x89a26935,	0xaeab01f3,	0x46406071,	0xfe9ca870,
-0x73c6b8e0,	0xd55517a0,	0x40672814,	0x28d9e205,
-0xfd23b70b,	0x885e72ed,	0x41861524,	0xeb7f77b2,
-0xea826a61,	0x06a47055,	0x83d71cfc,	0xb6b5cbb6,
-0xeea709e3,	0x25b910bf,	0x64ef9e5a,	0xd048a5a3,
-0x0ecae00e,	0x216700b2,	0xf51cc285,	0x107f4916,
-0xb390e89e,	0x07efee47,	0x8eb3d423,	0x151e4c0c,
-0xab7ebbdc,	0xe471757b,	0x717f586b,	0xaacd6c2a,
-0xa0c63ad6,	0xde1feca6,	0x234e73d8,	0xfc302a04,
-0x4119848a,	0xbc8c78d5,	0xf3bb6d22,	0x2adc091b,
-0x3d6a50a6,	0x80d0806c,	0xe775d1b9,	0xa398ace3,
-0x47a09e7d,	0x82e43ac0,	0xb3ae0953,	0x9e953074,
-0x4964b471,	0x4a8bb0fd,	0x9e6a6e8e,	0xee971884,
-0xc7f2e4cc,	0xdc1b7ff4,	0x0ba3d273,	0x7d37c53c,
-0x27554173,	0x7865dc77,	0xb24f15c5,	0x90c00d9b,
-0x0ddd4024,	0x65050eb7,	0xf833936d,	0xe93cd40a,
-0xe31dd31f,	0xc990cca6,	0xaad5564a,	0xcb6c45b9,
-0xb1a6ef0b,	0xbac07112,	0xddbe22b2,	0xa01f1135,
-0x0562493a,	0xb3f2f526,	0xd414512f,	0x5d945ebe,
-0x0a8c95f1,	0xc214aa4d,	0x5006a179,	0xdd57b9bf,
-0x92cc0d68,	0x29556e76,	0xbe68e6a4,	0x5dd7cedc,
-0x2606954f,	0xb1168ed2,	0xbc7f4b32,	0x1cd43eee,
-0x7f7e1f59,	0xdacd550e,	0x8e7c4adb,	0xd1b6af9e,
-0x4abc5f32,	0x81181214,	0xc364896c,	0xc56c4a08,
-0xd56aa244,	0x936f0be3,	0x3d0c967b,	0x1578d76a,
-0x7cb10003,	0xdf0e8bad,	0x24bc9534,	0x4fbf3524,
-0x7052039c,	0x6edb0691,	0x2f10c885,	0xd5adb704,
-0x11ff9b52,	0xd6614cf1,	0x1ab2b79f,	0x9c4e93f2,
-0x49e3431c,	0x6b80635f,	0x233912ad,	0x05168de1,
-0x79e18bd7,	0x4d9d0ce4,	0x1e1d93f7,	0x041c93ca,
-0x7109b31c,	0x98af2848,	0x012fd82e,	0xc134e4b1,
-0x73cbf75a,	0xbc2ac259,	0xeb5f1138,	0xed0038a1,
-0xa75bbad0,	0x9698ef09,	0x37b21e97,	0xe7d971e9,
-0x3184de0a,	0x1d64395d,	0x005a6d27,	0xf26dfc59,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU16860a.h

diff --git a/cpu/intel/model_68x/microcode-MU16860a.h b/cpu/intel/model_68x/microcode-MU16860a.h
deleted file mode 100644
index d88102f..0000000
--- a/cpu/intel/model_68x/microcode-MU16860a.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16860a.inc  */
-0x00000001,	0x0000000a,	0x05042000,	0x00000686,
-0xf3bb1079,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xc6586232,	0x277d54d5,	0x4f7ef8fb,	0xcef7ac22,
-0xafee0e72,	0x4a9e0934,	0xe7695725,	0x8e285007,
-0x43a4a8d1,	0xca144dd9,	0x8da2b518,	0x4c6d74d3,
-0xee363815,	0x8dda7522,	0x6369e4b9,	0xc7c48080,
-0x86ecc6af,	0x44076855,	0xc9135988,	0x80b2a4a6,
-0x654cbe11,	0xc314db83,	0xa04e60d8,	0x4434829a,
-0xca630037,	0x863dba4b,	0x456b3656,	0xc81b5036,
-0xa757768c,	0x42657f3e,	0xee28655e,	0x8acb7fc2,
-0x4d3f1153,	0xc727c830,	0x8d83dadf,	0x4337ed65,
-0xea82a648,	0x8b0ed272,	0x6e1d5d2d,	0xc89ca234,
-0x88162543,	0x4509f20b,	0xc4246893,	0x897c8837,
-0x6ce85470,	0xc289a8b6,	0xa7b752d9,	0x44740264,
-0xc338d34d,	0x840cd712,	0x4d254023,	0xc9bd3b4c,
-0xaec6fe45,	0x46a93c90,	0xeba68ac4,	0x8661a9bf,
-0x4ceabe79,	0xc306abe8,	0x85063cf1,	0x4bc76d54,
-0xeae61c29,	0x8d44a15b,	0x66237e93,	0xcd3d3258,
-0x8ac002d2,	0x40ec33d2,	0xc1e9e690,	0x85ba7ab9,
-0x6dcb9946,	0xcd8e5656,	0xa4574bee,	0x4618c900,
-0xced94234,	0x8fa66dc2,	0x43674822,	0xccadd163,
-0xaee4a680,	0x473f1952,	0xee0b507b,	0x826c5327,
-0x4f1b2e4a,	0xc5545ee4,	0x81491d47,	0x4ac38596,
-0xe89e1b72,	0x81521383,	0x6b81f877,	0xcbf08fef,
-0x8b650447,	0x45f055aa,	0xc9486656,	0x85578a8b,
-0x63654c15,	0xc2af788c,	0xa233a356,	0x4c8d3793,
-0xc064bed5,	0x87ff0732,	0x4b5dc58d,	0xc0c6c854,
-0xac243f64,	0x4da1178b,	0xe7afc726,	0x83d3db2f,
-0x4ffb7e67,	0xc99377ab,	0x8c41ac2f,	0x47fe29e9,
-0xed122282,	0x838f214b,	0x6e5e72ea,	0xc1f608f0,
-0x86a943f6,	0x47145486,	0xcf3c8179,	0x81052692,
-0x635b3226,	0xcc85c969,	0xaa5ce1eb,	0x47e6fcf9,
-0xc5cc35c4,	0x89ac6258,	0x479fac3a,	0xc973764a,
-0xa016e339,	0x4c1b7a87,	0xee98daae,	0x8edc812f,
-0x412b4bee,	0xc25c289d,	0x8046a1c6,	0x488629e4,
-0xe91c1a3c,	0x8fb3f214,	0x651e4ec9,	0xc74eac7e,
-0x8524b474,	0x4030530f,	0xcb056d74,	0x8c0ac837,
-0x6a40ec66,	0xc74d14ad,	0xab9f4dd1,	0x459394be,
-0xcfa36a50,	0x8e3cbebe,	0x4c5ee2fb,	0xc98e93b1,
-0xa9931b6b,	0x4d7e4737,	0xedd1f9a0,	0x8416989d,
-0x465230dc,	0xc53d307d,	0x88081eb6,	0x450cc861,
-0xec50e8f4,	0x813ebc03,	0x60c24916,	0xc054909e,
-0x8e9a180f,	0x49733b4c,	0xcdefdaa6,	0x83d68d71,
-0x6242222e,	0xc9dba65d,	0xa3cccfc5,	0x4e4a1f40,
-0xcc900c57,	0x8ff2de70,	0x48e12407,	0x5de722dd,
-0xcce5593d,	0x808ee900,	0x418756c9,	0x47de05b7,
-0x85d9207c,	0xc21bc623,	0x44cebac0,	0xde933434,
-0xcfaa4ccb,	0x1b56dcfe,	0xd9b94c1c,	0x30ee76ed,
-0x1fc5ee45,	0x25ec6f82,	0x31faa1b4,	0x56adf5d2,
-0x2aded395,	0x7248b2d4,	0x57c8710c,	0xa08f21da,
-0x71284cb3,	0xde2154a2,	0xa2604dbf,	0x19d224f3,
-0xdf868867,	0xc7856703,	0x149f27ba,	0xe9c687c4,
-0xc1003175,	0x22d08b5a,	0xe6e67fc6,	0x357a7981,
-0x2d83592e,	0xeca25638,	0x38dfd98a,	0xf1116012,
-0xefebfd17,	0xe1fe908a,	0x7a9a518b,	0xc7174264,
-0x6dfc5c6f,	0xacbf3bcd,	0xcbcf1983,	0x8dd961dc,
-0xa1ea4015,	0x22886fed,	0x426bef9c,	0x89976657,
-0xeff39b00,	0x6403ca75,	0x27dd4d41,	0x1a7e4e6e,
-0xcd8db1cc,	0xd0534459,	0x8d784b83,	0x990e1efa,
-0x4183683a,	0xd8a1cac2,	0x1b04d7d1,	0x8a53f9ae,
-0x5af9a50e,	0xdf0f6d46,	0xc307f2ec,	0xcb272d1d,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU16860c.h

diff --git a/cpu/intel/model_68x/microcode-MU16860c.h b/cpu/intel/model_68x/microcode-MU16860c.h
deleted file mode 100644
index a4198ed..0000000
--- a/cpu/intel/model_68x/microcode-MU16860c.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16860c.inc  */
-0x00000001,	0x0000000c,	0x05042000,	0x00000686,
-0xb8f53b16,	0x00000001,	0x00000080,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x5beabe32,	0x8f316d6f,	0xe80fa8ed,	0x6986fc34,
-0xa9af091c,	0xedef5922,	0x4d59bcce,	0x8528ec94,
-0xea891582,	0x6d651dcf,	0x8ea713bb,	0xee588508,
-0x40950b27,	0x839e687c,	0xc0950463,	0x6bb3f40b,
-0x8a0f86c0,	0xe3763843,	0x69dd3be1,	0x814c91b7,
-0xc5d81f77,	0x6e9b0217,	0xa4ba0a27,	0xe2b72aaa,
-0x6497f53e,	0x82872e97,	0xeffa4a21,	0x6e462da7,
-0xab2b6778,	0xe176f65b,	0x417dd377,	0x89bdcc75,
-0xe1003982,	0x60569826,	0x89ac3387,	0xe6285345,
-0x4782de3b,	0x826080d7,	0xc69b35f1,	0x6b185a03,
-0x837baa3f,	0xe552ede6,	0x6f2fbc28,	0x87ce0f4e,
-0xc20b6335,	0x6893000d,	0xa332a8f4,	0xef4959d8,
-0x6284f62c,	0x879c0c35,	0xe9e3ad36,	0x653ed305,
-0xac87e78a,	0xe7bde36a,	0x4345fd62,	0x8ab60171,
-0xedbff4cb,	0x66cf93b5,	0x8376cf44,	0xedd6748b,
-0x44eaf0c1,	0x88705803,	0xc6da08d9,	0x6fd543de,
-0x85592c00,	0xe79d63c4,	0x6cdc2a92,	0x89bfe1c3,
-0xcbba1423,	0x6dfa21a9,	0xa6a349e6,	0xed858baf,
-0x6331f1a8,	0x86e75775,	0xeac0a06d,	0x62d8baa2,
-0xa503d5df,	0xece1c293,	0x47c8bd55,	0x8d23e10e,
-0xee204328,	0x6fdea099,	0x89a8f4ee,	0xe80cb92f,
-0x41cd1474,	0x8f09874b,	0xcf9dbeb9,	0x62718244,
-0x8a22623e,	0xe7a870e5,	0x6a6ba570,	0x84e31910,
-0xcddede9e,	0x6e92e0ea,	0xaae489c6,	0xec82fa7f,
-0x6a9167c6,	0x8994727e,	0xe680b48f,	0x6e403e62,
-0xa24d01a8,	0xee5592fa,	0x4b74d177,	0x800d0508,
-0xe3b72b12,	0x6b8ce9b2,	0x8d0db7e3,	0xec5317a0,
-0x455d8f91,	0x82ffc429,	0xc1398d12,	0x60d0d84f,
-0x8d3b8e62,	0xe84b361d,	0x630d2673,	0x8ab49818,
-0xcd164321,	0x6b79c001,	0xacbab7c7,	0xed6ca4a5,
-0x6b4bf372,	0x85e56ab6,	0xe911f38a,	0x62059ea4,
-0xafcf2b18,	0xea0e55de,	0x46af190e,	0x8bb6cb1d,
-0xe6b2288c,	0x652d788b,	0x83de4e28,	0xea2e9172,
-0x45469080,	0x816aa607,	0xc5bd3be9,	0x6a02bdcc,
-0x827f49bf,	0xe7dc4a54,	0x6b2b615f,	0x8f7063a7,
-0xc56ef2c6,	0x69e07fcc,	0xa12bdaae,	0xe889c817,
-0x6f9c2212,	0x8a1b632f,	0xec252abe,	0x675daad1,
-0xa28aa0ce,	0xe745a6d7,	0x462d6496,	0x84c5c6cb,
-0xe967c643,	0x68dbf356,	0x86319d98,	0xeab42313,
-0x4e1f95a4,	0x81675488,	0xc7a05207,	0x6613d6d1,
-0x84596988,	0xe9b56dec,	0x68953dfb,	0x8171c92d,
-0xce5c1eca,	0x6e72e1b7,	0xaf894af5,	0xebb8db3b,
-0x69bdd2f2,	0x826e11be,	0x710f8324,	0x6cbffa61,
-0x6b2f68c7,	0x1f4b8c05,	0x74bc500e,	0xfea47e48,
-0x1078bca5,	0xea7d8317,	0xfdbfb06d,	0x75a330e4,
-0xe5fb5b4b,	0x9a5c4ba2,	0x7686e0be,	0x8daa9275,
-0x94b31595,	0x10077168,	0x8866b4a8,	0x9015bde1,
-0x18bb9900,	0x87055ab8,	0x92a07454,	0x88a11ebe,
-0x85e42368,	0x00fff1c3,	0x805b4bd9,	0xa1b8dccb,
-0x011da7f1,	0xa4b69986,	0xa7328e68,	0xfc7adf4e,
-0xa5f8b5ce,	0x5db15603,	0xf9a719bc,	0x9528274b,
-0x5368e951,	0x3e5542f9,	0x95bf32cc,	0x424f9535,
-0x3349bd57,	0x87f3a3a6,	0xc645d35f,	0xed9bab75,
-0x03cb5f04,	0xea113118,	0xe43af99c,	0x09662e06,
-0xe3e3a200,	0xe5eb2a3e,	0xe8f9b93d,	0x4125d311,
-0x06b430d0,	0x4c0c0347,	0xf75e7526,	0x883d85b2,
-0xfaa35064,	0x7f7970b7,	0xa02cd247,	0x9f6a8b6e,
-0x59b0a023,	0xc7cd794c,	0x871f98ca,	0xc3d34fbb,
-0xd0081a27,	0x1267665a,	0x011d0713,	0x2dbbfcec,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU168a01.h

diff --git a/cpu/intel/model_68x/microcode-MU168a01.h b/cpu/intel/model_68x/microcode-MU168a01.h
deleted file mode 100644
index 3b648af..0000000
--- a/cpu/intel/model_68x/microcode-MU168a01.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU168a01.inc  */
-0x00000001,	0x00000001,	0x11022000,	0x0000068a,
-0x80fc9e3b,	0x00000001,	0x00000010,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x4efad552,	0x58a399f1,	0xf144f845,	0xfdb9117d,
-0xb230677d,	0x1136f756,	0x8298a1b2,	0xb0c9cffc,
-0x1e77875e,	0x2ea286ab,	0x6943a0b5,	0x41e37874,
-0xfad4205d,	0xbc2d4993,	0xe5ac11e8,	0xa81a4aa8,
-0x977a1e24,	0xd78cb1a7,	0xea9b7600,	0x280582ee,
-0x04779e3e,	0x4af7afda,	0xeba0b976,	0x40f8ed1c,
-0x9801c81d,	0xf500eb15,	0x74eb0918,	0x9b17c81f,
-0x9d5dd38f,	0x17410757,	0xf843bed3,	0x2c401670,
-0x6a428a9d,	0x28640d65,	0x35840c58,	0xcae15773,
-0xcad83b47,	0x304765ea,	0x36da3de4,	0xaca34c0f,
-0x61950b2a,	0x13ff21a5,	0x0817c1bb,	0x7e68e7a3,
-0x89d484f7,	0xa2c84945,	0xbdd500eb,	0x0f7aaaef,
-0x43b3cc4d,	0x55aaf9b2,	0xb8e9831f,	0xf093b0b9,
-0x8266e028,	0x5242bbd4,	0xccd1f798,	0x385ee185,
-0x15b897df,	0xedcc4e3e,	0x5028068b,	0xe3fc6555,
-0x24c2ded3,	0xf9ddf6aa,	0x1256f316,	0x21829113,
-0x17bd6a35,	0x252bdbdf,	0x9d356e62,	0xe02c900a,
-0xa3f04a7d,	0xd607feeb,	0xb2938296,	0x63192310,
-0x0aa601be,	0xe75ba498,	0xe844f6cc,	0xd9016ef6,
-0x0ee53a7b,	0x4109ef16,	0x06f14b3a,	0x28185283,
-0x97abaed9,	0xb6aaf076,	0xdb485b2d,	0x64213aa4,
-0xd95491d1,	0x79495ede,	0x0f6d13d2,	0x409172b3,
-0x71ff4426,	0x39482f22,	0x7411a8a8,	0x1d33b47f,
-0xd1b42e84,	0xec7754cf,	0x89116c0f,	0x2c09c658,
-0x99c8564f,	0x6b901f71,	0x83a077bd,	0xd50ac9fe,
-0x53427f66,	0x93447a6a,	0xa72bfaf2,	0x33e743e8,
-0x240588c1,	0xd74f75fb,	0xbf90f7a5,	0x75c3c8a2,
-0x9d0c5193,	0x43b92dd1,	0x2c00a47a,	0xfffce742,
-0x5d3ac1fa,	0xcdc46584,	0x712af8c7,	0x3733fe09,
-0xbb301419,	0x2bb6a944,	0x3edd7c53,	0x31157d4a,
-0xba14f3a0,	0xa385a286,	0xa6ac6f44,	0xb09ee00a,
-0x4fb68608,	0x5eba43d6,	0xeddde198,	0x688e46eb,
-0x4f4cef08,	0xd3dd5f9d,	0x8c0d995b,	0xb1688d6d,
-0x40f050f3,	0x064f8c26,	0x2acbc04b,	0xe3be1052,
-0x81765ee9,	0x38ec4036,	0x4aebe9e4,	0x700aee4d,
-0x0ddee69f,	0x32a8240c,	0xf1aadda5,	0x79d64bf0,
-0x79bca80b,	0x42ba8186,	0x5093b355,	0xc6bc148a,
-0x60bbbcf0,	0x58843416,	0x68fe124e,	0x551551b5,
-0x2ee3310b,	0x3fe684e4,	0xd2669d2f,	0x6d32a6ec,
-0x3c038661,	0xdfce797f,	0xb44f91b9,	0x6b054e2c,
-0x6c8a55b0,	0x53d4f5cf,	0xa9ef5cc9,	0x6a1497e3,
-0xdad943af,	0x7ac80ff7,	0x0a233ada,	0xdd162f79,
-0x654e8707,	0x6e0d72dc,	0xa7f16610,	0x64af2199,
-0x43cbc05a,	0xa082d85a,	0xa0ecc319,	0xed5fb102,
-0x50e03123,	0x1e691374,	0x76cca719,	0x96a54140,
-0xe637f7ac,	0x0bdceb2c,	0x2509562e,	0xdc493727,
-0x9ae44e2b,	0xbe7c82e6,	0xdd903312,	0x16182680,
-0xab131706,	0x00753d5a,	0x4f018f8a,	0x768bbd06,
-0xda089985,	0x9ec0bf68,	0xcf0ca6d6,	0xef21a479,
-0x10f990bb,	0x976257b1,	0x448acbd0,	0xd6a49e41,
-0x146a9f84,	0x1c462ffe,	0xc1e13fc2,	0x33a89da1,
-0xefe418ba,	0x2157e31e,	0xc9dab388,	0x7a5175f7,
-0x8fca565c,	0x3badf7fa,	0xb6b3ad3c,	0xcdc7c3db,
-0x75c1db40,	0x9f93463f,	0x869e7c18,	0xe3841a98,
-0x47f4b382,	0x5b708e12,	0xb704f263,	0x0977410d,
-0x510dad8c,	0x6e6e5abb,	0x523171ed,	0x0641bebd,
-0x03f8ab45,	0xffb1561a,	0xbac7c413,	0x893143e7,
-0x78f8702e,	0xf3a1a5dc,	0x154f9e24,	0xecee7df8,
-0x887b465c,	0x31ea2f2d,	0x58e06b7f,	0x3e53c9d3,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU168a04.h

diff --git a/cpu/intel/model_68x/microcode-MU168a04.h b/cpu/intel/model_68x/microcode-MU168a04.h
deleted file mode 100644
index d115f89..0000000
--- a/cpu/intel/model_68x/microcode-MU168a04.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU168a04.inc  */
-0x00000001,	0x00000004,	0x12072000,	0x0000068a,
-0x995ec216,	0x00000001,	0x00000020,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x54166188,	0xe535ae13,	0xa1a6ca6c,	0x202f9eb5,
-0xa49ee07b,	0xa4463ba3,	0x0bb8102d,	0x8751cb91,
-0xa6b73e2d,	0x24cc7f4e,	0x821b0492,	0xa67c19c7,
-0x0865af67,	0x806ab137,	0x8b7d96ba,	0x2a50d911,
-0x87d749e0,	0xaadf5ac2,	0x27176ddb,	0x8b1e4c6b,
-0x8247a52f,	0x2f199a4f,	0xab4a3695,	0xaa55f6d0,
-0x25aa931e,	0x89580d05,	0xaae2937e,	0x22df2015,
-0xa58c2053,	0xad480e1e,	0x056a3cdc,	0x8db6e960,
-0xaedb93b5,	0x29fffaa7,	0x8e12d006,	0xa50e3b22,
-0x09a99c8c,	0x8a96ad34,	0x87ac86ba,	0x2dfd44d4,
-0x86c79529,	0xa7f97bcf,	0x222fbee9,	0x838f9436,
-0x8ea6c4b6,	0x2b061994,	0xa718f6c6,	0xabeb6df9,
-0x23c3d2f8,	0x8741db0f,	0xa0f5a92f,	0x287011ae,
-0xaab46662,	0xa6501353,	0x06388553,	0x842f6b80,
-0xaa415ed1,	0x2ba08c21,	0x8bfea0bc,	0xa07dd06f,
-0x08ce70ec,	0x8b195004,	0x8f4735d8,	0x2d4cbb3d,
-0x8e2d8d1b,	0xae340145,	0x29f05708,	0x880b17bf,
-0x8d5459cf,	0x279e9251,	0xa8aa1e38,	0xae09e0ad,
-0x2b4e17bc,	0x86de5f47,	0xac89f48b,	0x2787e6bd,
-0xa2840685,	0xa991f7a3,	0x0bd79f55,	0x897d2734,
-0xa8bef187,	0x2d91e9b8,	0x84a5bd7c,	0xab0ea74f,
-0x09483b60,	0x87534077,	0x8fe56f74,	0x2bea0ee9,
-0x8035a789,	0xa707eac6,	0x233d0de3,	0x880f2a56,
-0x8b75a29f,	0x23eb9b6a,	0xa235532d,	0xa1629f77,
-0x22719b57,	0x82af8ee4,	0xa654ac8d,	0x205b3cc6,
-0xa635195c,	0xac653e14,	0x00aa4ba3,	0x89923f57,
-0xad211654,	0x27964c24,	0x8145519a,	0xae577a1e,
-0x02193c7d,	0x8371bb8f,	0x8e38144b,	0x2e2735bd,
-0x820d4360,	0xa975c934,	0x2ecd7d81,	0x8eefd6af,
-0x8760bc8d,	0x2f732336,	0xa96e2069,	0xadde039a,
-0x2e6fc380,	0x8660772e,	0xa92fa5d3,	0x23db18d7,
-0xafb1af41,	0xad12b1ae,	0x0b832d4c,	0x8c7ec7b4,
-0xa2ab9d5e,	0x2c841a0a,	0x8ef54e2a,	0xa39d1a96,
-0x03d05451,	0x83096867,	0x882ffa2c,	0x226ab470,
-0x8b197086,	0xafe23ffe,	0x24f4b9aa,	0x8bc6470e,
-0x835057b8,	0x2e9a2d6c,	0xace0be7d,	0xafd10f5a,
-0x254a6dfb,	0x80535796,	0xa99f8e3e,	0x2497ad06,
-0xa2da0657,	0xac34677a,	0x06a3cfb1,	0x8737e980,
-0xacb80ed4,	0x215275ec,	0x87bcc694,	0xaeb189c7,
-0x0e46185f,	0x8f5a6a2c,	0x8b3300ae,	0x218ad69a,
-0x808475bb,	0xaa89ecee,	0x2e63d3b2,	0x8137c967,
-0x85552646,	0x21fc5091,	0xaf8c06cd,	0xaa525c28,
-0x21680179,	0x89c7b3e8,	0xd644786f,	0x5e9b9d1d,
-0x2702fe66,	0xfda03d55,	0xd0df4c73,	0x9482b978,
-0xfade6b02,	0x688fd36d,	0x952cf501,	0xfeca27fe,
-0x66abc182,	0x996671b1,	0xf1b7cf4c,	0x232cfb6d,
-0x968efeac,	0xb30f46ec,	0x2a1e24b4,	0x6350447b,
-0xbef74dbd,	0xd1b77677,	0x6036d792,	0x94747eb8,
-0xd321f5f0,	0x4732e7af,	0x9a4a0faa,	0xe38af022,
-0x4e0f8444,	0xade43c54,	0xed08efc0,	0x63207e33,
-0xa76d15da,	0xc189c05a,	0x616b1784,	0x55b07eeb,
-0xc21f088c,	0x6cd19b19,	0x568d2424,	0x374ed20e,
-0x634b7ad1,	0x5aa8cece,	0x342338db,	0x18514c13,
-0x527faf4e,	0x4e30cc1d,	0xc12ae47f,	0x53dcc404,
-0x980e4e30,	0xcb45cda4,	0x3a2a3e9a,	0x63a58248,
-0xa25c4dc3,	0xc7f6786f,	0x6ade3de7,	0xa0b5b6e9,
-0xcfe10078,	0x648ffa56,	0x75e3ad04,	0x2fc1552f,
-0xb0f77ce6,	0x9797eba5,	0x25835592,	0x9f295669,
-0x9518b629,	0x0f6f8490,	0xe86d585e,	0xa799a942,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU168a05.h

diff --git a/cpu/intel/model_68x/microcode-MU168a05.h b/cpu/intel/model_68x/microcode-MU168a05.h
deleted file mode 100644
index 76708b1..0000000
--- a/cpu/intel/model_68x/microcode-MU168a05.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU168a05.inc  */
-0x00000001,	0x00000005,	0x12072000,	0x0000068a,
-0xb82bbbc1,	0x00000001,	0x00000080,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x41347bd8,	0x911d1af5,	0xbf990226,	0x21c0248e,
-0xae9c9087,	0x8ae67595,	0x04e0310d,	0xa3e9215a,
-0xafbc70f4,	0x1042c1bc,	0x96d7567d,	0xb056e38f,
-0x12e3b314,	0x8671b0bb,	0xb8280b8e,	0x17c0582a,
-0x864bef4e,	0x898fffe2,	0x02210693,	0x93159cea,
-0xa7e2f15d,	0x3cfa0fdc,	0xa7423ecf,	0xbf0a256d,
-0x3e69431a,	0xb5fb1776,	0x99be8001,	0x05b07adc,
-0xb394b1a6,	0xa674d032,	0x07e83a6a,	0xa6ab4c4e,
-0x8af11f6e,	0x20286de7,	0xbd9bbc1f,	0x8c6a09e0,
-0x342e30a5,	0x9d4cb289,	0x908edce5,	0x39aeafa3,
-0xb34ba5ac,	0xaca163d8,	0x37588926,	0xbc5e56a7,
-0x8459e3c2,	0x0b3b9ff9,	0xae97715d,	0x88969d8c,
-0x3e75d4f3,	0x9498328f,	0xb6f537c2,	0x018c631e,
-0xae215c90,	0xbdd6b8a0,	0x09857c7d,	0xa9836d89,
-0x940c13b6,	0x25e44062,	0xbc9e2608,	0x99c96188,
-0x2eac1954,	0x85874d2a,	0x970ecbde,	0x192fc565,
-0x8abc734f,	0x80bd71ce,	0x01dc441c,	0xbf71b84a,
-0x9e736705,	0x2dadd0ef,	0x8ba9a609,	0xa00f9d9a,
-0x0abc4362,	0xb816f372,	0x8db28c8c,	0x35bcdaea,
-0xbdd153c3,	0xa42c5de5,	0x2935db78,	0x8aba1a25,
-0xaed0899b,	0x354b0560,	0xa5819406,	0xbee34a2b,
-0x1442293c,	0x89853e8d,	0x87360b9d,	0x1a965d79,
-0x8388a852,	0xaeb2903a,	0x1bb2212e,	0x89083e53,
-0xa640f91c,	0x086e68a7,	0xb15460a3,	0x83476357,
-0x1d240330,	0xb86cc2a7,	0xb76e5b61,	0x1730c3be,
-0x92b5494b,	0xb2feab3e,	0x129f6107,	0xbbf8b20c,
-0xa73c326b,	0x3aa98258,	0xae3195ac,	0x91e12887,
-0x3c06eee4,	0xa9e8c42c,	0x8c6be8e5,	0x25a315c9,
-0xa14d1cfa,	0x87bd5cb1,	0x08674a93,	0x917ed650,
-0x8f2aa2dd,	0x2f45fe2b,	0xab9480cd,	0xb4935ed1,
-0x212f60f9,	0xb8ec56b4,	0x8d0e7f5a,	0x2c3f8cea,
-0x86961452,	0x9ccdae56,	0x159818e6,	0xb96b4352,
-0xb7cd6212,	0x3f2d6c56,	0x8825661b,	0xbc9172af,
-0x2e3a93a2,	0xaeade4a7,	0x9ec4c420,	0x10c6b354,
-0x95bc6ad4,	0x8dda8b59,	0x0cf1d120,	0x9d89ec8d,
-0x8c4c5d61,	0x310352af,	0xae1a306e,	0xbdc79b88,
-0x1973679e,	0xbbfc21e4,	0x82210224,	0x1f5e405b,
-0x97947e94,	0xb050f500,	0x21e01c36,	0xacf12a75,
-0x9ddefc1b,	0x26127f57,	0xbdd5a967,	0xbad4c987,
-0x12a6f074,	0xaba8f359,	0xac21deb9,	0x10a11f38,
-0x88ed207c,	0xb9314cb9,	0x034c2c2a,	0xadf14cb5,
-0xa4d24fe3,	0x39f571fd,	0x8c3d9ec4,	0x8f7f8e7c,
-0x03381979,	0xae96a1d0,	0xc838a487,	0x851b445d,
-0x12423402,	0xc5ba17c8,	0xc6c3f5af,	0xf1d8bba3,
-0xcf9e5715,	0x2b98c03c,	0xc7d43a12,	0x04b5c31e,
-0x0f177aea,	0x0e40ed42,	0x2481d35b,	0x0c9d57fa,
-0x284d6c07,	0x14c680bb,	0x380af49d,	0xaa351008,
-0x04f24363,	0xb6382b7a,	0xad315d2b,	0x490d6a3f,
-0x8ba682dd,	0xd2cd8f95,	0x6270d114,	0x0a114a39,
-0xf0882611,	0xe1711220,	0x20921556,	0x01469a6a,
-0xe5ee16d0,	0xf3565705,	0x01786889,	0x7e5198c8,
-0xdf188aff,	0x631c25ca,	0x73d2953c,	0x56f7eb7f,
-0x6946d516,	0x1ecf52c6,	0x7080c634,	0x978d321c,
-0x0f112244,	0x90a5c4d9,	0xba85c68c,	0xda699171,
-0x9cc834d3,	0x7836026a,	0xf455ee1a,	0x5e6868c0,
-0x5ec93697,	0x0641249c,	0x1305fc1c,	0x62ff2eb5,
-0x7cd7299e,	0x1e12a8b4,	0x67ea1393,	0xeccd8544,
-0x2df22cd2,	0xf3862164,	0x40c38c62,	0x6f983460,
-0x59238962,	0x27384d47,	0xd2b26031,	0x951fb69b,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU268110.h

diff --git a/cpu/intel/model_68x/microcode-MU268110.h b/cpu/intel/model_68x/microcode-MU268110.h
deleted file mode 100644
index 388d4ce..0000000
--- a/cpu/intel/model_68x/microcode-MU268110.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU268110.inc  */
-0x00000001,	0x00000010,	0x09211999,	0x00000681,
-0x04387de5,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x4be8aea8,	0xd011c071,	0x2a691f13,	0xd89f633e,
-0x14e47ca9,	0xf25e7d3e,	0x0517055c,	0xb27eb3e4,
-0xadf16268,	0x1b8191ab,	0x112ca6a0,	0x49430934,
-0x17a305b0,	0xad00ad6f,	0x00e6974a,	0x8951b04d,
-0x99dbff9c,	0x10888ff1,	0x1da8fa08,	0xf7144700,
-0xb505b499,	0x7142bd12,	0x0d1493b6,	0x2136a4fd,
-0x5899d436,	0x15828940,	0x081ef5c7,	0x75077358,
-0xa620a5e2,	0x89c640ca,	0xe3f85a5a,	0xc029fc66,
-0xf80f5032,	0x8f951f5f,	0x9fa70a3a,	0xdb254c57,
-0xc6d62e3a,	0xb50c3264,	0xdd0b50b5,	0xbe3afae4,
-0x0682077d,	0x7c60a795,	0x9916f56d,	0x68aa7525,
-0x2a9a5235,	0x490a38bf,	0x3a42c9de,	0x6e2e5b42,
-0x4878ebde,	0xce48d89d,	0x04f6688a,	0x4e1c326c,
-0x757b9b5f,	0x7752f735,	0x8b4db81c,	0x2c33a81f,
-0x13ca01ef,	0xab71cb68,	0x420caa16,	0x1ffbee7e,
-0xf3174461,	0x7508ac44,	0xf318209a,	0xc99842e7,
-0x87ccd230,	0x53d05be4,	0x29f3de9a,	0x36a65d67,
-0x2d7a9dd9,	0x88ad51ef,	0x25b7fdbb,	0x2b8ca261,
-0xf6e85e6c,	0x1ecf9ed1,	0xc63593f9,	0x8ac9d629,
-0x135d680e,	0xd200f572,	0x207623a5,	0x51b8aa3b,
-0x31b5be82,	0xf3979e00,	0x57784998,	0x7dde484b,
-0x3abccf17,	0x223285bc,	0x79f52876,	0x74c53f13,
-0xce16fe96,	0x2893f18d,	0xd0235541,	0xe7ea5aa5,
-0xb1f4a0ec,	0x7c7da02a,	0xf496b043,	0x7426394a,
-0x02654a4b,	0x32016d19,	0x80a03a11,	0x2b068325,
-0x7c8cb2ba,	0x633b0572,	0x2b850332,	0x1d74c0d6,
-0x2b2d934a,	0xb220186c,	0xb123a130,	0x04075222,
-0x25b47e62,	0xb9b2f4f6,	0xf40dd666,	0x46c90809,
-0xaacdbc09,	0x00481902,	0x124fa0c6,	0xf8b98698,
-0x56ee7359,	0xa9c82490,	0x9b650054,	0x92f037e6,
-0x77f3ea42,	0x4f9aa420,	0x3756a81e,	0x54954b2e,
-0xee31604a,	0x642d998f,	0x0163fd0b,	0x794b452b,
-0xd6819422,	0x11887658,	0xaa2b44ad,	0x484f36c2,
-0xe354ff29,	0x6393ee5e,	0x8642ab8b,	0xb83d39fa,
-0x481f04e3,	0x1ec27310,	0xb0d68b33,	0x844c0d92,
-0x758ee6e8,	0xf7db3d42,	0x9af4d118,	0x7294b5f3,
-0xbe309bfb,	0x63ee1f13,	0x9a734a9b,	0x47241805,
-0xc9b2887f,	0x76e37669,	0xa2ddf49a,	0xc605fa9e,
-0xcd6420d4,	0x46f39785,	0xa0246d51,	0xab10ad59,
-0xbcdddd37,	0x0362abf3,	0xdf85c4e2,	0xd32dfa5e,
-0x7bb483ba,	0xd22c3e77,	0x16e9f835,	0x7b228d06,
-0x22e4a405,	0xd92596df,	0x03653ee5,	0x1d982e39,
-0xb344edc6,	0x25163d17,	0x8fce2be5,	0x0a0183b3,
-0x1006e059,	0xb1cd9f3b,	0x8da1f83d,	0xbd6f26e7,
-0x1a11defb,	0x7102209f,	0x4936f369,	0x429ec072,
-0xfedb6040,	0x9f59ba31,	0x3c6aecd3,	0x38fb1c21,
-0xc93fb52b,	0xa5ab3b8a,	0xacff84b4,	0x64b36e8d,
-0x328fac01,	0x39f8ef94,	0x7999fd1f,	0xf9aa181f,
-0x9b039dcc,	0x10a01aa9,	0x437eb2ea,	0x2a2ddf7d,
-0xc6f8bebe,	0x865e2275,	0x7a987e18,	0xd3b7b1fd,
-0xd9351c1f,	0x16016358,	0xd903741c,	0xc870ebb8,
-0x3af4033b,	0x004ac482,	0xd445896d,	0xad6536af,
-0x80c333fb,	0x1b7caa83,	0x357345c3,	0x934c2630,
-0x1f9a45f6,	0x9729e354,	0x32fdaba8,	0x9cafb4b9,
-0x8e9dda39,	0xa9700b6c,	0xbea0c131,	0xe5a55806,
-0x1b0e2f71,	0x615fa421,	0xce8420ca,	0x893bac43,
-0x0b95b949,	0x9260ab02,	0x31c9a79b,	0xf2a4da18,
-0x73ca1c12,	0xb41c7210,	0xa3908679,	0x2208e3d8,
-0x3797b08e,	0xbfa6a55c,	0x5a8be539,	0xbd9e623a,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode-MU268602.h

diff --git a/cpu/intel/model_68x/microcode-MU268602.h b/cpu/intel/model_68x/microcode-MU268602.h
deleted file mode 100644
index 480a648..0000000
--- a/cpu/intel/model_68x/microcode-MU268602.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU268602.inc  */
-0x00000001,	0x00000002,	0x05042000,	0x00000686,
-0x332c50fc,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x7cf009ee,	0xde212d8f,	0x40fc8031,	0xcc7df987,
-0xd9446c69,	0x534b5354,	0xe8a6009c,	0xb2804e1e,
-0xc923d256,	0xdcecf51c,	0xc412b4bc,	0x73396f2b,
-0xfd04f60f,	0xd0d7f4d8,	0xa8f9dfe5,	0xb8defb40,
-0x4edffe88,	0x646d5420,	0x35e2a45f,	0xd37c054d,
-0xc22954f9,	0xc1146393,	0xd245381e,	0xeae167e3,
-0x43675583,	0x60ab176c,	0x9736b9c6,	0xbff00b26,
-0x16483271,	0x9a701ed5,	0xb458a41c,	0xf5bee887,
-0xed55210f,	0x7c0370e1,	0x820c203f,	0x002add3e,
-0xea958855,	0x61fcdaea,	0x6ad4a71a,	0xb92bc614,
-0xe3a29616,	0x86b62b61,	0xa59b657f,	0xf2c3575b,
-0x5d7ac6e7,	0xddeb874d,	0x8359caa3,	0x897b7a7d,
-0xe3e5e8b7,	0xf49ecd45,	0xc28a6a45,	0xd6dbe138,
-0xb30eaeb2,	0x1eaa65da,	0xb1d64e7c,	0x89cfa875,
-0xafe14ac6,	0x33d31a40,	0x3bf217d8,	0xb5ee8cce,
-0x943e91cd,	0xead5aeab,	0x6d4545f3,	0x0207a17f,
-0x27c0e926,	0x0607325c,	0xfd73ab50,	0xf875a959,
-0x715e91c1,	0x27286747,	0xd9e8d5d7,	0x2b5f4eef,
-0x48e7507c,	0x631e9526,	0xbe652d3c,	0xf44bdee1,
-0x2f0635b5,	0x82f59aa3,	0xc952dd93,	0xdfd7664a,
-0xa6c6a511,	0x05f8a567,	0xdfbdd235,	0x93b0f7fa,
-0xf230a0e8,	0xb3daf958,	0x9cfb1179,	0x581a9a23,
-0xe90d99ec,	0xc6d45f7f,	0x00cc9419,	0xa033e134,
-0x3e0c5427,	0xc51880f8,	0xe53d3f75,	0x76e46b82,
-0x39216716,	0xc7814c59,	0x3e950f77,	0x796fb5c6,
-0xce98e498,	0x93214b85,	0xe3cc1e7c,	0x85a27ccf,
-0x3b6985e5,	0xda99f6dd,	0x2525fa5a,	0xb9597992,
-0x8771a641,	0xc233d544,	0x365b0022,	0xb6f2adb3,
-0xc0a5ae64,	0x11b94f17,	0xd3bc61d7,	0x4b3182fd,
-0x1f3cc702,	0x074b85e3,	0x3abfe94b,	0x2f6e8c3a,
-0x43a39fa5,	0xea95a0cf,	0xec6ca230,	0xeaed2195,
-0x5261d5a7,	0x1e083739,	0x24cfc756,	0x133692f3,
-0x68cb9b9b,	0x40a27089,	0x48962268,	0xca1ec286,
-0x2a5ef51f,	0x3e9aa09f,	0x9cc0581a,	0xad33b532,
-0x1d365147,	0x119e78c5,	0xf99f66bb,	0x14a97e34,
-0x26e61f8a,	0x1f80e435,	0xfec0054e,	0x8369b072,
-0x1492b201,	0x798cbe1b,	0x05f5aa9b,	0x68c5e6e1,
-0xfd3d08a3,	0xf7ce8767,	0xd446e704,	0x9595a872,
-0x1361943f,	0xea238ac6,	0x6b40e36d,	0x3239eb09,
-0x14c1a58f,	0x10a72214,	0x18716029,	0xffba4d2c,
-0xefab5b79,	0x40f2e49a,	0x64518f90,	0xf0983888,
-0x1b6f28f8,	0xb4e9bdac,	0x6617d010,	0xcdb49028,
-0x4fb8325b,	0xd51ae489,	0xc49e5b0c,	0x4ce77f09,
-0x164c5ed6,	0xea407c38,	0xcedd6d50,	0x02ca2e1a,
-0x300ecc34,	0x31f1229f,	0x35b3459c,	0x0a9971e3,
-0x647fcefa,	0xa54d30bc,	0x14e05e16,	0x459e8d66,
-0x42065188,	0x19e93008,	0xda980fa1,	0x71431597,
-0x997abb16,	0x3c39889f,	0x549de523,	0x2420d441,
-0xc87779ef,	0x475d7dbd,	0x68999988,	0x89ad4a7d,
-0xf3da0990,	0x1def1403,	0xedd8d0dd,	0x59eb7a7f,
-0x67642d29,	0xc2454f39,	0x88217cde,	0xcdefaf71,
-0x12588b55,	0xf48d0ce7,	0x88b7c3d3,	0x5c62b02e,
-0x21c05aa4,	0x98cf763b,	0xc02f860e,	0x8a1bf23f,
-0x676d2f90,	0xd73b4c08,	0x02dda911,	0x60ba8c76,
-0x3ed5df97,	0xf4ca9795,	0x9f7b6271,	0x4be6b998,
-0x69a4a139,	0x3a3240cc,	0xaa40b9a8,	0x41e08780,
-0x738f645c,	0x79170059,	0x231ff3b2,	0xe34f6b4e,
-0xa8021b05,	0x8eb72629,	0x18dbccd1,	0x88f020d7,
-0x467dc6b0,	0x72a7070c,	0x0f65f00c,	0x8150ca60,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_68x/microcode.bin

diff --git a/cpu/intel/model_68x/microcode.bin b/cpu/intel/model_68x/microcode.bin
new file mode 100644
index 0000000..c7adc5b
--- /dev/null
+++ b/cpu/intel/model_68x/microcode.bin
Binary files differ

cpu/intel/model_68x/microcode.h

diff --git a/cpu/intel/model_68x/microcode.h b/cpu/intel/model_68x/microcode.h
deleted file mode 100644
index 9ed203c..0000000
--- a/cpu/intel/model_68x/microcode.h
+++ /dev/null
@@ -1,16 +0,0 @@
-
-#include "microcode-MU16810d.h"
-#include "microcode-MU16810e.h"
-#include "microcode-MU16810f.h"
-#include "microcode-MU168111.h"
-#include "microcode-MU268110.h"
-#include "microcode-MU168307.h"
-#include "microcode-MU168308.h"
-#include "microcode-MU168607.h"
-#include "microcode-MU168608.h"
-#include "microcode-MU16860a.h"
-#include "microcode-MU16860c.h"
-#include "microcode-MU268602.h"
-#include "microcode-MU168a01.h"
-#include "microcode-MU168a04.h"
-#include "microcode-MU168a05.h"

cpu/intel/model_69x/microcode-m1069507.h

diff --git a/cpu/intel/model_69x/microcode-m1069507.h b/cpu/intel/model_69x/microcode-m1069507.h
deleted file mode 100644
index 5c9ddcd..0000000
--- a/cpu/intel/model_69x/microcode-m1069507.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m1069507.inc  */
-0x00000001,	0x00000007,	0x11092004,	0x00000695,
-0xf7d0461f,	0x00000001,	0x00000010,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x75ed45d1,	0xa58cfbe2,	0x95b6ecce,	0x3eec60f2,
-0xa3518658,	0x986f23bf,	0x63ade481,	0xe26bbb6a,
-0x94f0ad76,	0x0da53309,	0xc920df0e,	0xe6ee5568,
-0x4a7fa577,	0x86f184bb,	0x98d09cce,	0x63a857b9,
-0xb83f63fd,	0x8a34f546,	0x00f1a9c6,	0xf09c1ba7,
-0xb2dab0ca,	0x1dd0f9f2,	0xb97219e9,	0x91489df9,
-0x0ae22c43,	0x97602252,	0x9452bf66,	0x7b2490ee,
-0x877013a0,	0x80d79558,	0x356747fc,	0xe8a4885f,
-0xf7b0cadd,	0x32e006a9,	0xfa724d13,	0xe6625057,
-0x41c66cbb,	0x9b638ac9,	0x9111e2ed,	0x686ccdc7,
-0xbee8a321,	0xa16a3ae6,	0x5b207450,	0xbaa920d6,
-0xd8887148,	0x386de110,	0x90ae1a00,	0x86f2d14d,
-0x03a0923c,	0x96edf313,	0xc296dd52,	0x7935f549,
-0xf094f7f4,	0xcacc5b02,	0x6b8cf81a,	0xd27d0293,
-0xdb27991c,	0x4f4591d8,	0x91740b1a,	0xe5658e97,
-0x22e267e6,	0xdfeef285,	0xbd99b6db,	0x0ba5a68e,
-0xa8f3ae46,	0xd4e887f0,	0x2ffcb598,	0xb5ab53b7,
-0xa34e5ed7,	0x275d2d86,	0xfb6504c5,	0xbf2ced2c,
-0x5d3adb47,	0xdd90c777,	0xc247d4de,	0x49756808,
-0xa7eccad2,	0xe463e92a,	0x08a1adc2,	0xbb1cdf22,
-0xf56620f8,	0x08f73ae2,	0xe33c259b,	0x8c34f791,
-0x5ac6f701,	0xd1a568a5,	0xb838c440,	0x1119f612,
-0x8067edbf,	0xf891c9d7,	0x792e238a,	0x94aea031,
-0xa6219da9,	0x2e657d19,	0xc0986d6b,	0x86845231,
-0x1196d0c1,	0xbce3eb01,	0xd06a1421,	0x1ef9f318,
-0x8fd9a69c,	0xdd2a5b02,	0x047d44ec,	0xb238dd54,
-0xed7cb49c,	0x3a8c80a3,	0xab9a6453,	0xd53347c2,
-0x59f19199,	0xd6c42520,	0xc6b433c7,	0x1432aff4,
-0xc66caed2,	0xd7b46878,	0x1dee38b5,	0x91a2d549,
-0xc847a196,	0x786ef929,	0xb03390ab,	0xeb92b8c3,
-0x4a81034f,	0x866b4a13,	0xc1cec9d1,	0x14d1b187,
-0xb1588c65,	0xbb04d233,	0x10754b96,	0xfbb7ae86,
-0xf40317be,	0x1f5f6fc6,	0xb09daf2d,	0xa63e4a93,
-0x224eeae8,	0x8a153313,	0xf62508eb,	0x6b3f448c,
-0xab1cc6c7,	0xd90b89a1,	0x766abffe,	0xd96407c3,
-0xde2397c5,	0x5c046b75,	0x94a3c7e9,	0x814d735f,
-0x0ce5a75c,	0x929ea8f1,	0xe4e1bed5,	0x12a32b5c,
-0x91c9e7ba,	0xdfb5f6d9,	0x07089e3f,	0xa39047ec,
-0xc48d6f94,	0x60c7b5c9,	0xe791230b,	0xfe80e488,
-0x77a83870,	0x8788bc87,	0xe8899973,	0x7a26deae,
-0x9328cd9f,	0xcff87fec,	0x704c0630,	0xcf33211f,
-0x8dfc1ede,	0x50e158ad,	0xf1bbe640,	0xeb418193,
-0x6cfd16a6,	0xdfe57412,	0xf0a85131,	0x916cefdf,
-0x68ed7eea,	0x8fd08f4c,	0xe7ad145b,	0x1b406442,
-0xe731af91,	0x8a2bc765,	0x5fb4e4f1,	0x16f46d22,
-0x8f585450,	0xae91ffb5,	0x2b1b8513,	0x3e0a7161,
-0x9e34bb9b,	0x9686df2f,	0x5bd24526,	0x0ef38175,
-0xc1c374b2,	0x953ad1e3,	0x0aebce39,	0xdba94281,
-0xe065a1d4,	0x2f2304d5,	0xe95460fb,	0x05fe2928,
-0x31f7b211,	0x4b01c6ce,	0x579271d7,	0xf10f5f7d,
-0x2a32b09e,	0x8cbae3da,	0xb5641d44,	0xcdc2d181,
-0xeeed868f,	0xe6a8bd7e,	0xf883e150,	0xe365dcf4,
-0xa068d4cb,	0x5c47b100,	0x8c6a0e2b,	0x781d645b,
-0x27c9af23,	0x7987c2e3,	0x521cbd5d,	0x5a85cdb2,
-0x077941ec,	0x76ba48fb,	0xb0b24203,	0x494f73d0,
-0xaf3d76ba,	0xe6a844d5,	0xc9d58989,	0x771cfc9b,
-0x48d3cf56,	0x163fd59b,	0xc15a5942,	0x5d217288,
-0xe0ffdc3f,	0xb298b4d9,	0x3b961d18,	0xb43b0287,
-0xafeb73c6,	0x47f7fdef,	0x0caf84f0,	0xa1fe51ad,
-0xd71618ac,	0xc87934bd,	0xe96101d1,	0x55d1976c,
-0x471c8505,	0x7a36d839,	0x5d62a9ee,	0xf3c54a8a,
-0xa2be15d9,	0x244087c9,	0x042c8037,	0x23224689,
-0x281c5d73,	0x2139ecfc,	0xffb8bc8a,	0x834fdd11,
-0x9cd5a5bd,	0xa3368319,	0x7e5bef0c,	0x4ae2dbda,
-0x86d90089,	0x6675dfce,	0x48876262,	0xcec72538,
-0x11dc5c80,	0x86a730f9,	0x313565c9,	0xe3e5be11,
-0x106d7cce,	0x752b8be2,	0x3d00a5bc,	0xe6f70e95,
-0x44447ac8,	0x600df30c,	0x8335ac3b,	0x8816ddee,
-0x700982fe,	0xee495741,	0x48c7e81c,	0xa3d55da2,
-0xb0172982,	0x70ab2158,	0xd4460621,	0x3a9e528b,
-0x59b18a7b,	0xf4dabc4c,	0xa8454763,	0x70877bb6,
-0x66005c97,	0xaf292c06,	0x7b843db1,	0xf343b59b,
-0x25cdc7b5,	0xa41da617,	0x9e9d895e,	0xc936f475,
-0x7270925a,	0x30024230,	0x8e72f53d,	0x2b6c1b6f,
-0x1a69732c,	0x7ed5aff5,	0xfc18a2a3,	0xaf377cc1,
-0xbff09a78,	0x4b4e0814,	0x95a0b2c1,	0x270398de,
-0x201fca94,	0x2a032a4f,	0x131542b4,	0x0d7306da,
-0x2d1c3496,	0xcc3c6d8d,	0xa814ddc9,	0xa3b3a991,
-0x17ee60c2,	0x852c0b8d,	0x11e5853a,	0x762002a7,
-0x92c5311d,	0x0d4bf7e1,	0xfffec870,	0xe3d35e5b,
-0xff6ecfb9,	0xdedae6ff,	0x0111a772,	0x9808e780,
-0x29c336e8,	0xe9bc05df,	0x5bedde11,	0x945565af,
-0xaff808fe,	0x87e3423d,	0x4de6f98f,	0x93b4adef,
-0xbf704fa4,	0x09120e91,	0xd54f3692,	0xdf8eab1e,
-0xfabbf59c,	0xe74318be,	0xaab87ffc,	0x29fa791c,
-0xe3915552,	0xa652cb9b,	0xa1252e74,	0xb35b723b,
-0x542aa28b,	0x12fcc5b0,	0x3941f962,	0x82bcc6cc,
-0x47b11974,	0xb821611f,	0x78b34250,	0xf1be5659,
-0x561b9e61,	0x6f3bd501,	0x584e6f5c,	0xd54ed547,
-0xacebcd21,	0x7b5ff816,	0xb64ad233,	0x9f2f330d,
-0x69fb1ece,	0xac8710dd,	0x58dc6c60,	0x9bee6139,
-0xbb10ad0e,	0xbd8cd5dd,	0xebc0ce9d,	0xa733274f,
-0x884d9b55,	0x42b08b63,	0xafa54a74,	0x1c7ccf64,
-0x93a20191,	0xaaa3132e,	0xc69831d1,	0x54634889,
-0xfbfe3efc,	0xd3cf68d4,	0x302e3117,	0xf5693131,
-0xc3ce8c6c,	0x1f03cd89,	0x6243334c,	0xf16bc80f,
-0xdca5f130,	0xcb2cd956,	0x4c1bb421,	0xe8de533c,
-0x7f86703a,	0x29aa897e,	0xdd54acad,	0x76b2f2ae,
-0x7ef82b71,	0x2e30970b,	0xba402597,	0x9a653ab4,
-0xd68fcf53,	0x2d9f0d15,	0x7f9efd1c,	0x2363d147,
-0x5327289a,	0xe89229f3,	0xd63a535c,	0x7efe9273,
-0x64f2e3a3,	0x9bdf65a7,	0x26b6edfb,	0x1b9c7bfe,
-0x5d14b3de,	0x54d575fb,	0x6d65db4c,	0x95648b7f,
-0xa8a3b8f0,	0x7cc7ad46,	0xe20e6dbb,	0x8488a45f,
-0x8ebc2932,	0xd4767316,	0x3e8c4b8a,	0xbab7402c,
-0xfc1e217e,	0xe5c5bf82,	0x6928fe2e,	0xc88528e9,
-0x4b2e4e8f,	0xdd938b86,	0x0c964f98,	0xfc88d480,
-0x35fcaf9e,	0xdd7bbe9d,	0x197d005a,	0x4d40b3b3,
-0xcf203155,	0x0d2fa621,	0x752d2c58,	0xb12bac12,
-0x1e7e8c23,	0x94215d54,	0x9854a71c,	0x4de63c64,
-0x7a012529,	0x9c171f8d,	0x9e71def7,	0x3bd17d50,
-0x11f175d9,	0xec78abf3,	0x7b529eee,	0xd3a69fc3,
-0x5b718676,	0x58214d29,	0xa8bd2c34,	0x41ea00ab,
-0xa03f64d6,	0x4ee342b0,	0x32b1e444,	0x1c1801a4,
-0xc8424702,	0x334a7e35,	0x50cf1543,	0x3b22b495,
-0x88683776,	0x8e2e0154,	0x6155c033,	0x4e2fa6ac,
-0x42ace700,	0x8d64f97c,	0xaf9ced17,	0xb2a5cb92,
-0xa558582d,	0x88705de7,	0x9e528d59,	0x84bd45e4,
-0x5cb680c0,	0xcd48fa5c,	0x2722bfa2,	0x10462123,
-0x30080f7d,	0xb346cd81,	0x0049c396,	0x4e24165f,
-0xa7c66809,	0x2e60bdcf,	0xaad70a08,	0xa73ea713,
-0xe28f97a7,	0x283a9eab,	0xd4366489,	0xe776f963,
-0x64ffa8ae,	0xde717b50,	0xbd2ca2b5,	0x3bae5f6d,
-0x8d2bbef1,	0x7e9181e6,	0xf06aa121,	0xd06b2d20,
-0xa83ea826,	0xef935e4f,	0xdfd27456,	0xa3451468,

cpu/intel/model_69x/microcode-m2069507.h

diff --git a/cpu/intel/model_69x/microcode-m2069507.h b/cpu/intel/model_69x/microcode-m2069507.h
deleted file mode 100644
index 49dad22..0000000
--- a/cpu/intel/model_69x/microcode-m2069507.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m2069507.inc  */
-0x00000001,	0x00000007,	0x11092004,	0x00000695,
-0xf7d0460f,	0x00000001,	0x00000020,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x75ed45d1,	0xa58cfbe2,	0x95b6ecce,	0x3eec60f2,
-0xa3518658,	0x986f23bf,	0x63ade481,	0xe26bbb6a,
-0x94f0ad76,	0x0da53309,	0xc920df0e,	0xe6ee5568,
-0x4a7fa577,	0x86f184bb,	0x98d09cce,	0x63a857b9,
-0xb83f63fd,	0x8a34f546,	0x00f1a9c6,	0xf09c1ba7,
-0xb2dab0ca,	0x1dd0f9f2,	0xb97219e9,	0x91489df9,
-0x0ae22c43,	0x97602252,	0x9452bf66,	0x7b2490ee,
-0x877013a0,	0x80d79558,	0x356747fc,	0xe8a4885f,
-0xf7b0cadd,	0x32e006a9,	0xfa724d13,	0xe6625057,
-0x41c66cbb,	0x9b638ac9,	0x9111e2ed,	0x686ccdc7,
-0xbee8a321,	0xa16a3ae6,	0x5b207450,	0xbaa920d6,
-0xd8887148,	0x386de110,	0x90ae1a00,	0x86f2d14d,
-0x03a0923c,	0x96edf313,	0xc296dd52,	0x7935f549,
-0xf094f7f4,	0xcacc5b02,	0x6b8cf81a,	0xd27d0293,
-0xdb27991c,	0x4f4591d8,	0x91740b1a,	0xe5658e97,
-0x22e267e6,	0xdfeef285,	0xbd99b6db,	0x0ba5a68e,
-0xa8f3ae46,	0xd4e887f0,	0x2ffcb598,	0xb5ab53b7,
-0xa34e5ed7,	0x275d2d86,	0xfb6504c5,	0xbf2ced2c,
-0x5d3adb47,	0xdd90c777,	0xc247d4de,	0x49756808,
-0xa7eccad2,	0xe463e92a,	0x08a1adc2,	0xbb1cdf22,
-0xf56620f8,	0x08f73ae2,	0xe33c259b,	0x8c34f791,
-0x5ac6f701,	0xd1a568a5,	0xb838c440,	0x1119f612,
-0x8067edbf,	0xf891c9d7,	0x792e238a,	0x94aea031,
-0xa6219da9,	0x2e657d19,	0xc0986d6b,	0x86845231,
-0x1196d0c1,	0xbce3eb01,	0xd06a1421,	0x1ef9f318,
-0x8fd9a69c,	0xdd2a5b02,	0x047d44ec,	0xb238dd54,
-0xed7cb49c,	0x3a8c80a3,	0xab9a6453,	0xd53347c2,
-0x59f19199,	0xd6c42520,	0xc6b433c7,	0x1432aff4,
-0xc66caed2,	0xd7b46878,	0x1dee38b5,	0x91a2d549,
-0xc847a196,	0x786ef929,	0xb03390ab,	0xeb92b8c3,
-0x4a81034f,	0x866b4a13,	0xc1cec9d1,	0x14d1b187,
-0xb1588c65,	0xbb04d233,	0x10754b96,	0xfbb7ae86,
-0xf40317be,	0x1f5f6fc6,	0xb09daf2d,	0xa63e4a93,
-0x224eeae8,	0x8a153313,	0xf62508eb,	0x6b3f448c,
-0xab1cc6c7,	0xd90b89a1,	0x766abffe,	0xd96407c3,
-0xde2397c5,	0x5c046b75,	0x94a3c7e9,	0x814d735f,
-0x0ce5a75c,	0x929ea8f1,	0xe4e1bed5,	0x12a32b5c,
-0x91c9e7ba,	0xdfb5f6d9,	0x07089e3f,	0xa39047ec,
-0xc48d6f94,	0x60c7b5c9,	0xe791230b,	0xfe80e488,
-0x77a83870,	0x8788bc87,	0xe8899973,	0x7a26deae,
-0x9328cd9f,	0xcff87fec,	0x704c0630,	0xcf33211f,
-0x8dfc1ede,	0x50e158ad,	0xf1bbe640,	0xeb418193,
-0x6cfd16a6,	0xdfe57412,	0xf0a85131,	0x916cefdf,
-0x68ed7eea,	0x8fd08f4c,	0xe7ad145b,	0x1b406442,
-0xe731af91,	0x8a2bc765,	0x5fb4e4f1,	0x16f46d22,
-0x8f585450,	0xae91ffb5,	0x2b1b8513,	0x3e0a7161,
-0x9e34bb9b,	0x9686df2f,	0x5bd24526,	0x0ef38175,
-0xc1c374b2,	0x953ad1e3,	0x0aebce39,	0xdba94281,
-0xe065a1d4,	0x2f2304d5,	0xe95460fb,	0x05fe2928,
-0x31f7b211,	0x4b01c6ce,	0x579271d7,	0xf10f5f7d,
-0x2a32b09e,	0x8cbae3da,	0xb5641d44,	0xcdc2d181,
-0xeeed868f,	0xe6a8bd7e,	0xf883e150,	0xe365dcf4,
-0xa068d4cb,	0x5c47b100,	0x8c6a0e2b,	0x781d645b,
-0x27c9af23,	0x7987c2e3,	0x521cbd5d,	0x5a85cdb2,
-0x077941ec,	0x76ba48fb,	0xb0b24203,	0x494f73d0,
-0xaf3d76ba,	0xe6a844d5,	0xc9d58989,	0x771cfc9b,
-0x48d3cf56,	0x163fd59b,	0xc15a5942,	0x5d217288,
-0xe0ffdc3f,	0xb298b4d9,	0x3b961d18,	0xb43b0287,
-0xafeb73c6,	0x47f7fdef,	0x0caf84f0,	0xa1fe51ad,
-0xd71618ac,	0xc87934bd,	0xe96101d1,	0x55d1976c,
-0x471c8505,	0x7a36d839,	0x5d62a9ee,	0xf3c54a8a,
-0xa2be15d9,	0x244087c9,	0x042c8037,	0x23224689,
-0x281c5d73,	0x2139ecfc,	0xffb8bc8a,	0x834fdd11,
-0x9cd5a5bd,	0xa3368319,	0x7e5bef0c,	0x4ae2dbda,
-0x86d90089,	0x6675dfce,	0x48876262,	0xcec72538,
-0x11dc5c80,	0x86a730f9,	0x313565c9,	0xe3e5be11,
-0x106d7cce,	0x752b8be2,	0x3d00a5bc,	0xe6f70e95,
-0x44447ac8,	0x600df30c,	0x8335ac3b,	0x8816ddee,
-0x700982fe,	0xee495741,	0x48c7e81c,	0xa3d55da2,
-0xb0172982,	0x70ab2158,	0xd4460621,	0x3a9e528b,
-0x59b18a7b,	0xf4dabc4c,	0xa8454763,	0x70877bb6,
-0x66005c97,	0xaf292c06,	0x7b843db1,	0xf343b59b,
-0x25cdc7b5,	0xa41da617,	0x9e9d895e,	0xc936f475,
-0x7270925a,	0x30024230,	0x8e72f53d,	0x2b6c1b6f,
-0x1a69732c,	0x7ed5aff5,	0xfc18a2a3,	0xaf377cc1,
-0xbff09a78,	0x4b4e0814,	0x95a0b2c1,	0x270398de,
-0x201fca94,	0x2a032a4f,	0x131542b4,	0x0d7306da,
-0x2d1c3496,	0xcc3c6d8d,	0xa814ddc9,	0xa3b3a991,
-0x17ee60c2,	0x852c0b8d,	0x11e5853a,	0x762002a7,
-0x92c5311d,	0x0d4bf7e1,	0xfffec870,	0xe3d35e5b,
-0xff6ecfb9,	0xdedae6ff,	0x0111a772,	0x9808e780,
-0x29c336e8,	0xe9bc05df,	0x5bedde11,	0x945565af,
-0xaff808fe,	0x87e3423d,	0x4de6f98f,	0x93b4adef,
-0xbf704fa4,	0x09120e91,	0xd54f3692,	0xdf8eab1e,
-0xfabbf59c,	0xe74318be,	0xaab87ffc,	0x29fa791c,
-0xe3915552,	0xa652cb9b,	0xa1252e74,	0xb35b723b,
-0x542aa28b,	0x12fcc5b0,	0x3941f962,	0x82bcc6cc,
-0x47b11974,	0xb821611f,	0x78b34250,	0xf1be5659,
-0x561b9e61,	0x6f3bd501,	0x584e6f5c,	0xd54ed547,
-0xacebcd21,	0x7b5ff816,	0xb64ad233,	0x9f2f330d,
-0x69fb1ece,	0xac8710dd,	0x58dc6c60,	0x9bee6139,
-0xbb10ad0e,	0xbd8cd5dd,	0xebc0ce9d,	0xa733274f,
-0x884d9b55,	0x42b08b63,	0xafa54a74,	0x1c7ccf64,
-0x93a20191,	0xaaa3132e,	0xc69831d1,	0x54634889,
-0xfbfe3efc,	0xd3cf68d4,	0x302e3117,	0xf5693131,
-0xc3ce8c6c,	0x1f03cd89,	0x6243334c,	0xf16bc80f,
-0xdca5f130,	0xcb2cd956,	0x4c1bb421,	0xe8de533c,
-0x7f86703a,	0x29aa897e,	0xdd54acad,	0x76b2f2ae,
-0x7ef82b71,	0x2e30970b,	0xba402597,	0x9a653ab4,
-0xd68fcf53,	0x2d9f0d15,	0x7f9efd1c,	0x2363d147,
-0x5327289a,	0xe89229f3,	0xd63a535c,	0x7efe9273,
-0x64f2e3a3,	0x9bdf65a7,	0x26b6edfb,	0x1b9c7bfe,
-0x5d14b3de,	0x54d575fb,	0x6d65db4c,	0x95648b7f,
-0xa8a3b8f0,	0x7cc7ad46,	0xe20e6dbb,	0x8488a45f,
-0x8ebc2932,	0xd4767316,	0x3e8c4b8a,	0xbab7402c,
-0xfc1e217e,	0xe5c5bf82,	0x6928fe2e,	0xc88528e9,
-0x4b2e4e8f,	0xdd938b86,	0x0c964f98,	0xfc88d480,
-0x35fcaf9e,	0xdd7bbe9d,	0x197d005a,	0x4d40b3b3,
-0xcf203155,	0x0d2fa621,	0x752d2c58,	0xb12bac12,
-0x1e7e8c23,	0x94215d54,	0x9854a71c,	0x4de63c64,
-0x7a012529,	0x9c171f8d,	0x9e71def7,	0x3bd17d50,
-0x11f175d9,	0xec78abf3,	0x7b529eee,	0xd3a69fc3,
-0x5b718676,	0x58214d29,	0xa8bd2c34,	0x41ea00ab,
-0xa03f64d6,	0x4ee342b0,	0x32b1e444,	0x1c1801a4,
-0xc8424702,	0x334a7e35,	0x50cf1543,	0x3b22b495,
-0x88683776,	0x8e2e0154,	0x6155c033,	0x4e2fa6ac,
-0x42ace700,	0x8d64f97c,	0xaf9ced17,	0xb2a5cb92,
-0xa558582d,	0x88705de7,	0x9e528d59,	0x84bd45e4,
-0x5cb680c0,	0xcd48fa5c,	0x2722bfa2,	0x10462123,
-0x30080f7d,	0xb346cd81,	0x0049c396,	0x4e24165f,
-0xa7c66809,	0x2e60bdcf,	0xaad70a08,	0xa73ea713,
-0xe28f97a7,	0x283a9eab,	0xd4366489,	0xe776f963,
-0x64ffa8ae,	0xde717b50,	0xbd2ca2b5,	0x3bae5f6d,
-0x8d2bbef1,	0x7e9181e6,	0xf06aa121,	0xd06b2d20,
-0xa83ea826,	0xef935e4f,	0xdfd27456,	0xa3451468,

cpu/intel/model_69x/microcode-m8069547.h

diff --git a/cpu/intel/model_69x/microcode-m8069547.h b/cpu/intel/model_69x/microcode-m8069547.h
deleted file mode 100644
index 3531816..0000000
--- a/cpu/intel/model_69x/microcode-m8069547.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m8069547.inc  */
-0x00000001,	0x00000047,	0x11092004,	0x00000695,
-0xa0324f3b,	0x00000001,	0x00000080,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x0c66a43e,	0x6fdc369b,	0x040ec151,	0xaabfb472,
-0xf556e326,	0x3739dbc6,	0x4a14fd4e,	0xbe510a9c,
-0xe70bf636,	0xdc6858b7,	0xf484a559,	0x24802e67,
-0x63d69186,	0x15fdd673,	0x603020db,	0x9f57bd55,
-0x8840215e,	0xcb23ca23,	0xa97dbfc7,	0x714c433f,
-0xaacc8d9a,	0x46531bfd,	0xbd635f18,	0x429f7a10,
-0xa502e1d3,	0x3ba2b6f0,	0xa4f6ca99,	0x0d708861,
-0x1b574fe7,	0x485227a4,	0x18d05856,	0x8db5dcaf,
-0xff1a7545,	0x6866a2ee,	0xc4aa8c37,	0x0080d8c6,
-0xc1cf82f0,	0x2d396ed0,	0x859c1832,	0xa2e48a7e,
-0xe71f5f78,	0x87fb8357,	0xa4322cc7,	0x846d5040,
-0xdb286962,	0x5b18ed9d,	0xf5f81e6d,	0x959e87d7,
-0x8806335e,	0x3c4762a1,	0x21ba50ff,	0x85489e1c,
-0x96128b82,	0xa9857202,	0x803eac9e,	0xea6553f6,
-0x8bd2d706,	0xeb28a554,	0xa7dfda72,	0xa4059899,
-0x88f93cb5,	0x50e1b23b,	0x8dc74029,	0xd9872ffd,
-0x4f6202ed,	0xe396c354,	0xa35b81d1,	0xf8701e2c,
-0xf33b0f6f,	0xbda6e8f3,	0x9e3d786e,	0xaf4d40fa,
-0x35859710,	0x7e460cb0,	0xfdd99345,	0x78f0a992,
-0x3794cb3e,	0x4f402d47,	0xaea20bf4,	0xa50aabd1,
-0x196885ee,	0xb2c84221,	0x14bc44a0,	0x326479c3,
-0x687b0dc6,	0xbc2151d4,	0x686c6647,	0x6ff095b9,
-0x4af5886b,	0x5a49ac48,	0xe1f7533d,	0x24924e25,
-0x5eb4d9e6,	0x7b8ac82f,	0xac929b2b,	0x7482c790,
-0x788a9491,	0x925b2591,	0xb4f3cce2,	0xb91f1662,
-0xd5fb65d4,	0x549aae06,	0x93f073b4,	0xcc26dc33,
-0x05c41dd6,	0x660c52d8,	0xcd4eeee4,	0x87939004,
-0x532c864c,	0x0e94c295,	0x0d2d2251,	0xd6d88925,
-0x9e9dc21a,	0xa6bf396b,	0x911daebd,	0x525e105e,
-0x1d352b27,	0xdcadd5e1,	0x27d95dec,	0x35726567,
-0x03836c6f,	0x4d343b99,	0xa7a18015,	0x23d37d74,
-0x632d35c7,	0x00035697,	0x07e8bab5,	0xf7cf3a02,
-0x068706f6,	0xdfa171be,	0x3aa2c1c1,	0x5a1d954e,
-0xb71b6c1f,	0xbe29fbcf,	0x8de6b15e,	0xf41460cb,
-0x18fd0cea,	0x5bedf3f9,	0xd2f177f2,	0x77518f57,
-0xe3666a03,	0xe24637e3,	0x0f38deb3,	0x293dc567,
-0xfe5e1a23,	0x5177d656,	0x2a9e259b,	0x49fb90bc,
-0x6c865d17,	0xde4c3fc1,	0x5c3cdf10,	0x2b4d5c6e,
-0xeff3d6a5,	0x8bb9bd18,	0x9ee723b1,	0xbc12ba57,
-0x8caa211f,	0xdc83bcdf,	0x208a9ba4,	0xfca21241,
-0xc6a6eefe,	0xded5aed8,	0x73d3ae48,	0xa24f5cb7,
-0xa8f2da15,	0x63cfd2e7,	0x857c975f,	0x7b0d09a4,
-0xe521f32c,	0x05cc1628,	0xb5c210e0,	0x9261386c,
-0x447fe66a,	0x4dcf4214,	0xd0be6ce9,	0x7939347f,
-0x02deebcd,	0x89a90ff9,	0x8b8c5d30,	0xf674503f,
-0xd4c93e7e,	0xfd995ed2,	0xd44dc317,	0xf43a2742,
-0xebfdeaa7,	0xa57ab877,	0x8b5feddc,	0x84fa6995,
-0xa683f7fe,	0x3f075a90,	0x904711b4,	0xe4f402e9,
-0xee714efe,	0xa751db10,	0x4f259590,	0xfebea582,
-0x3a6c0d66,	0x25a452a3,	0xd022c348,	0xdc24602a,
-0x58716977,	0xf6a70e92,	0xfc82cf6e,	0xae09cca1,
-0xa20e842d,	0x15e048d2,	0x96f8fefd,	0xd94fe184,
-0x25316b80,	0xb751593d,	0x8aa614c1,	0x4982c5e5,
-0x6d211294,	0x7b22c753,	0xc29d3f2c,	0x4bcb73f5,
-0x370b4a68,	0x385b671f,	0xc2a023c8,	0x9043117e,
-0x76c07ae3,	0x7c5968cd,	0xf2a48406,	0x5ea944d4,
-0x0e9e6382,	0x4aaedda5,	0xecb4f191,	0xd14cfab3,
-0xf43e8cd5,	0x0946e811,	0x17f743bf,	0xa6665715,
-0x586fdb03,	0xfe41799a,	0x9c5e72fa,	0x585128f4,
-0xd71618ac,	0xc87934bd,	0xe96101d1,	0x55d1976c,
-0x471c8505,	0x7a36d839,	0x5d62a9ee,	0xf3c54a8a,
-0xa2be15d9,	0x244087c9,	0x042c8037,	0x23224689,
-0x281c5d73,	0x2139ecfc,	0xffb8bc8a,	0x834fdd11,
-0x9cd5a5bd,	0xa3368319,	0x7e5bef0c,	0x4ae2dbda,
-0x86d90089,	0x6675dfce,	0x48876262,	0xcec72538,
-0x11dc5c80,	0x86a730f9,	0x313565c9,	0xe3e5be11,
-0x106d7cce,	0x752b8be2,	0x3d00a5bc,	0xe6f70e95,
-0x44447ac8,	0x600df30c,	0x8335ac3b,	0x8816ddee,
-0x700982fe,	0xee495741,	0x48c7e81c,	0xa3d55da2,
-0xb0172982,	0x70ab2158,	0xd4460621,	0x3a9e528b,
-0x59b18a7b,	0xf4dabc4c,	0xa8454763,	0x70877bb6,
-0x66005c97,	0xaf292c06,	0x7b843db1,	0xf343b59b,
-0x25cdc7b5,	0xa41da617,	0x9e9d895e,	0xc936f475,
-0x7270925a,	0x30024230,	0x8e72f53d,	0x2b6c1b6f,
-0x1a69732c,	0x7ed5aff5,	0xfc18a2a3,	0xaf377cc1,
-0xbff09a78,	0x4b4e0814,	0x95a0b2c1,	0x270398de,
-0x201fca94,	0x2a032a4f,	0x131542b4,	0x0d7306da,
-0x2d1c3496,	0xcc3c6d8d,	0xa814ddc9,	0xa3b3a991,
-0x17ee60c2,	0x852c0b8d,	0x11e5853a,	0x762002a7,
-0x92c5311d,	0x0d4bf7e1,	0xfffec870,	0xe3d35e5b,
-0xff6ecfb9,	0xdedae6ff,	0x0111a772,	0x9808e780,
-0x29c336e8,	0xe9bc05df,	0x5bedde11,	0x945565af,
-0xaff808fe,	0x87e3423d,	0x4de6f98f,	0x93b4adef,
-0xbf704fa4,	0x09120e91,	0xd54f3692,	0xdf8eab1e,
-0xfabbf59c,	0xe74318be,	0xaab87ffc,	0x29fa791c,
-0xe3915552,	0xa652cb9b,	0xa1252e74,	0xb35b723b,
-0x542aa28b,	0x12fcc5b0,	0x3941f962,	0x82bcc6cc,
-0x47b11974,	0xb821611f,	0x78b34250,	0xf1be5659,
-0x561b9e61,	0x6f3bd501,	0x584e6f5c,	0xd54ed547,
-0xacebcd21,	0x7b5ff816,	0xb64ad233,	0x9f2f330d,
-0x69fb1ece,	0xac8710dd,	0x58dc6c60,	0x9bee6139,
-0xbb10ad0e,	0xbd8cd5dd,	0xebc0ce9d,	0xa733274f,
-0x884d9b55,	0x42b08b63,	0xafa54a74,	0x1c7ccf64,
-0x93a20191,	0xaaa3132e,	0xc69831d1,	0x54634889,
-0xfbfe3efc,	0xd3cf68d4,	0x302e3117,	0xf5693131,
-0xc3ce8c6c,	0x1f03cd89,	0x6243334c,	0xf16bc80f,
-0xdca5f130,	0xcb2cd956,	0x4c1bb421,	0xe8de533c,
-0x7f86703a,	0x29aa897e,	0xdd54acad,	0x76b2f2ae,
-0x7ef82b71,	0x2e30970b,	0xba402597,	0x9a653ab4,
-0xd68fcf53,	0x2d9f0d15,	0x7f9efd1c,	0x2363d147,
-0x5327289a,	0xe89229f3,	0xd63a535c,	0x7efe9273,
-0x64f2e3a3,	0x9bdf65a7,	0x26b6edfb,	0x1b9c7bfe,
-0x5d14b3de,	0x54d575fb,	0x6d65db4c,	0x95648b7f,
-0xa8a3b8f0,	0x7cc7ad46,	0xe20e6dbb,	0x8488a45f,
-0x8ebc2932,	0xd4767316,	0x3e8c4b8a,	0xbab7402c,
-0xfc1e217e,	0xe5c5bf82,	0x6928fe2e,	0xc88528e9,
-0x4b2e4e8f,	0xdd938b86,	0x0c964f98,	0xfc88d480,
-0x35fcaf9e,	0xdd7bbe9d,	0x197d005a,	0x4d40b3b3,
-0xcf203155,	0x0d2fa621,	0x752d2c58,	0xb12bac12,
-0x1e7e8c23,	0x94215d54,	0x9854a71c,	0x4de63c64,
-0x7a012529,	0x9c171f8d,	0x9e71def7,	0x3bd17d50,
-0x11f175d9,	0xec78abf3,	0x7b529eee,	0xd3a69fc3,
-0x5b718676,	0x58214d29,	0xa8bd2c34,	0x41ea00ab,
-0xa03f64d6,	0x4ee342b0,	0x32b1e444,	0x1c1801a4,
-0xc8424702,	0x334a7e35,	0x50cf1543,	0x3b22b495,
-0x88683776,	0x8e2e0154,	0x6155c033,	0x4e2fa6ac,
-0x42ace700,	0x8d64f97c,	0xaf9ced17,	0xb2a5cb92,
-0xa558582d,	0x88705de7,	0x9e528d59,	0x84bd45e4,
-0x5cb680c0,	0xcd48fa5c,	0x2722bfa2,	0x10462123,
-0x30080f7d,	0xb346cd81,	0x0049c396,	0x4e24165f,
-0xa7c66809,	0x2e60bdcf,	0xaad70a08,	0xa73ea713,
-0xe28f97a7,	0x283a9eab,	0xd4366489,	0xe776f963,
-0x64ffa8ae,	0xde717b50,	0xbd2ca2b5,	0x3bae5f6d,
-0x8d2bbef1,	0x7e9181e6,	0xf06aa121,	0xd06b2d20,
-0xa83ea826,	0xef935e4f,	0xdfd27456,	0xa3451468,

cpu/intel/model_69x/microcode.bin

diff --git a/cpu/intel/model_69x/microcode.bin b/cpu/intel/model_69x/microcode.bin
new file mode 100644
index 0000000..e3d6342
--- /dev/null
+++ b/cpu/intel/model_69x/microcode.bin
Binary files differ

cpu/intel/model_69x/microcode.h

diff --git a/cpu/intel/model_69x/microcode.h b/cpu/intel/model_69x/microcode.h
deleted file mode 100644
index e9e99de..0000000
--- a/cpu/intel/model_69x/microcode.h
+++ /dev/null
@@ -1,4 +0,0 @@
-
-#include "microcode-m1069507.h"
-#include "microcode-m2069507.h"
-#include "microcode-m8069547.h"

cpu/intel/model_6bx/microcode-MU16b11c.h

diff --git a/cpu/intel/model_6bx/microcode-MU16b11c.h b/cpu/intel/model_6bx/microcode-MU16b11c.h
deleted file mode 100644
index 547f7d9..0000000
--- a/cpu/intel/model_6bx/microcode-MU16b11c.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16b11c.inc  */
-0x00000001,	0x0000001c,	0x02152001,	0x000006b1,
-0x6506e1cf,	0x00000001,	0x00000010,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x3ff8d1ac,	0x6ad5a5d7,	0x41bc1a2f,	0xc0cfcf98,
-0xae80b685,	0x4e7fdba5,	0xee70aae6,	0x857f82df,
-0x4c12ad1c,	0xc6eab058,	0x849e97b8,	0x4b425e5a,
-0xe6819908,	0x8134a945,	0x601aea2a,	0xc633b991,
-0x8f9e395f,	0x4699cb55,	0xcbc3795e,	0x85561846,
-0x6f4f5e1f,	0xcf0cf38f,	0xac133e0c,	0x4bbe51fc,
-0xc340f285,	0x8c63f67d,	0x45160027,	0xc85a74bb,
-0xaeb95e32,	0x4f4fc61d,	0xe5033858,	0x8e4e090f,
-0x4b5acb2a,	0xc75bc00c,	0x880daabb,	0x43d6f6af,
-0xefd1d4e8,	0x87575a65,	0x6ef3afc2,	0xc8062d96,
-0x8945ca80,	0x41c583c3,	0xcbb2f0a7,	0x8661bdce,
-0x6d21f128,	0xc24acdc4,	0xaeaf43d5,	0x46dcbcd3,
-0xcf544779,	0x82ea3983,	0x4b1656e2,	0xc3a0de21,
-0xa14ded06,	0x4e779174,	0xe01de86d,	0x80c33ba8,
-0x44762085,	0xc74f0d93,	0x85ca1cfa,	0x4dc7752f,
-0xe0c2bfd0,	0x853e48b1,	0x67f42503,	0xcfed157c,
-0x8d33cb2f,	0x43eb149b,	0xc71e279a,	0x82561424,
-0x60cc4578,	0xce0d779d,	0xa6254192,	0x43e5a2cf,
-0xcaee4715,	0x857afd44,	0x45ad93fa,	0xc6043ebf,
-0xa98f3eee,	0x4f8e481c,	0xee5d3fe4,	0x84e30c80,
-0x464de23b,	0xc76af7c3,	0x8155a3cb,	0x4a425a2f,
-0xe3fd06a4,	0x8b51c2ec,	0x61bda6b9,	0xc71d76c2,
-0x8bd436d3,	0x4e4a5c77,	0xc2cffcfd,	0x833c6a3c,
-0x65d4f768,	0xcbfe0635,	0xa9bd7c0a,	0x49d3018a,
-0xca646403,	0x8776d3d2,	0x426a93f7,	0xc03b8393,
-0xa8e7690c,	0x46d7b40c,	0xe6a47d18,	0x8b927811,
-0x4febdfe3,	0xc38a9d51,	0x8f76a603,	0x49d5cc1c,
-0xe79861ed,	0x8d4c5baa,	0x6c7da6df,	0xc157063a,
-0x87dbd994,	0x472dff09,	0xcc1742f2,	0x8de8e9c7,
-0x641ab500,	0xc437013a,	0xaeaedc04,	0x492e9f4e,
-0xc3de047e,	0x8dbd801d,	0x4cfd2f32,	0xcc34102c,
-0xac06dbb4,	0x4ac3f30b,	0xe83b3458,	0x8634b95b,
-0x444079d2,	0xc807d487,	0x8da4cd9e,	0x4760f318,
-0xec62523f,	0x816240b9,	0x6cba09ce,	0xca86a264,
-0x863f14ca,	0x49b9d4a1,	0xc6bd9715,	0x87edeb98,
-0x6fa1a092,	0xcb36670f,	0xa2edb3a7,	0x43545378,
-0xc3c35ad7,	0x8e2d1255,	0x4a06377c,	0xcd1b61d4,
-0xa83a9bc7,	0x4c48d28d,	0xe8a27b8a,	0x8a47665c,
-0x49a35371,	0xc8a8fb0a,	0x830dc900,	0x4c01d1bc,
-0xee2ffff4,	0x83243d8d,	0x61ead599,	0xc82c0451,
-0x8c19b0ec,	0x465ee1d4,	0xc52df943,	0x8490687c,
-0x68474c0d,	0xcc495773,	0xa04396d5,	0x4824c02c,
-0xceb15f4d,	0x80a78140,	0x4de85a0b,	0x8945e8c5,
-0xc981ea75,	0x7ff89629,	0x4e4ce4e2,	0x6e9ceb88,
-0x7f0b4dff,	0x165e46c8,	0xcf59bf6c,	0x9c430db4,
-0xb55a941c,	0x277a73f1,	0x6dbffb22,	0xb3081fe8,
-0xdebe60c6,	0x691d8c9e,	0x330333a2,	0x0b024599,
-0xe358aa28,	0xe70334b3,	0xe48d7707,	0x16318df8,
-0x0e34f491,	0x1c0d6223,	0x54315b5f,	0x040fcc96,
-0x5557f1d2,	0x5ccf28f6,	0xc0004404,	0x2f7a5fef,
-0x95b65ddd,	0xbaa1a873,	0x077783d4,	0x3f24b63b,
-0x9ae679fe,	0xaf11d97e,	0x51391564,	0xb3247855,
-0xcd10e6dc,	0x704e147c,	0xcc15de9d,	0xa5adf161,
-0x0179c9a6,	0xa579d74c,	0x28704a4d,	0x3e7a2d92,
-0x253437c4,	0x1162b521,	0x14a9c51d,	0x2129abbe,
-0x3b2d07c4,	0x1d84f76a,	0x016cd356,	0x3fd03cad,
-0x3f82ee67,	0x0275b51e,	0x5dd38dae,	0xdd022704,
-0x6b6d2f56,	0xbdb25b55,	0xe4188d73,	0xc03a6c98,
-0x8a303586,	0x4999d605,	0x82c9e7e8,	0x8169c654,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_6bx/microcode-MU16b11d.h

diff --git a/cpu/intel/model_6bx/microcode-MU16b11d.h b/cpu/intel/model_6bx/microcode-MU16b11d.h
deleted file mode 100644
index d3dc26e..0000000
--- a/cpu/intel/model_6bx/microcode-MU16b11d.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16b11d.inc  */
-0x00000001,	0x0000001d,	0x02202001,	0x000006b1,
-0x6d9b5661,	0x00000001,	0x00000020,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x965e94ce,	0xea6ba8df,	0xbfae08d4,	0x3ec50299,
-0xbf2b31ed,	0xbd80d71d,	0x19bfb06d,	0x95e56995,
-0xa52265a7,	0x247242bb,	0x90900442,	0xa4d69328,
-0x15fb69e8,	0x940daeb6,	0x8d930183,	0x2ad6a75d,
-0x970bcd0c,	0xbfc335a6,	0x382df453,	0x8dfa472a,
-0x95f0eda4,	0x2feaf1e8,	0xb6e292dc,	0xb7c32497,
-0x2daa2a09,	0x83b58903,	0xaf122f90,	0x3730c2af,
-0xa8f684d3,	0xa7f33a97,	0x11b46600,	0x8f8af52b,
-0xab23714a,	0x2a87cf3b,	0x9ae73e3e,	0xa032cf57,
-0x0adc600d,	0x96117940,	0x9ac65c28,	0x3a23596e,
-0x94800c0f,	0xbf793392,	0x2c503bb1,	0x8dc252ce,
-0x9b7de53f,	0x2af3d7b4,	0xb7bd4575,	0xbc71e798,
-0x23d62362,	0x8393e39e,	0xafb59604,	0x290633b6,
-0xac09d0f8,	0xbaced873,	0x1fbd177c,	0x9b51acfe,
-0xa4d82134,	0x2dff3e84,	0x86d59af1,	0xa4789758,
-0x0469ae88,	0x9a3f986b,	0x8f18edcb,	0x3a200e44,
-0x8138b3f9,	0xb9aaf81c,	0x25af1d92,	0x8313e883,
-0x9a7ff75e,	0x20a6b69d,	0xa1bb0bbb,	0xbb78f982,
-0x27c1974a,	0x8dafbb13,	0xbc2ac530,	0x2c84f9a8,
-0xa1d686a1,	0xbd6b3d97,	0x07419bad,	0x99535e65,
-0xa1ee3deb,	0x3aca5a6d,	0x9c60ad82,	0xa9ac0d86,
-0x14ba77c2,	0x80b20413,	0x93be9f5f,	0x34c56863,
-0x87e25909,	0xbaaf9373,	0x2e9396d7,	0x836c3f99,
-0x8c81e59b,	0x24c4123f,	0xbc3b2921,	0xa2744f80,
-0x37dec6c6,	0x9e6b0ec7,	0xa6d652e6,	0x349f2dec,
-0xafcf34e5,	0xa81bf9cf,	0x046ce7f0,	0x973ce507,
-0xbd2386a9,	0x336dbfa6,	0x8de954fe,	0xb823c3bd,
-0x13088720,	0x86bec81c,	0x9265d562,	0x24574333,
-0x92f871dc,	0xa34ef2fd,	0x366b59f0,	0x84a9a050,
-0x81e55751,	0x3f326f2a,	0xbbf66ec3,	0xa784062a,
-0x2c9bc339,	0x889b495a,	0xa44822fe,	0x2e9b5fbd,
-0xa69f6830,	0xa446b369,	0x1da26dbb,	0x820f296a,
-0xbe2c600f,	0x27b90904,	0x88f003c9,	0xa9191c49,
-0x024286cb,	0x9fe1354e,	0x91a7670e,	0x38236d32,
-0x9c70820d,	0xbad8c44e,	0x2f9b35eb,	0x8fb157de,
-0x82ea988a,	0x32f204c5,	0xb6a7fd19,	0xbe64276b,
-0x2ad2ea1d,	0x95449132,	0xa7e07868,	0x3ae7a323,
-0xbd4b67ba,	0xa1a1914f,	0x1f964ad2,	0x85f986d7,
-0xa84bc3cc,	0x2739696c,	0x81196fea,	0xa90cd44b,
-0x05728610,	0x8873057c,	0x83035ccc,	0x24e56003,
-0x863ee7bf,	0xb4b92f27,	0x328f2941,	0x8ace163b,
-0x94f39234,	0x39f2eb7f,	0xa10f03e2,	0xbd9ae083,
-0x325e4950,	0x99241d8d,	0xa07f585f,	0xf2ed61ff,
-0x3341f541,	0x68372f11,	0xa01b5b7f,	0xcc5d571c,
-0x7ac343af,	0xa4a1568a,	0x142d7f47,	0x8f0b9477,
-0x720e7fff,	0xf9214071,	0x84fa4a07,	0x5463cfab,
-0xffa780fc,	0xb8fbd2fb,	0x84a2fdb4,	0xef1c1b2e,
-0x7e4ce78b,	0x8a5e9464,	0x60bbad48,	0x463ffc56,
-0x0d9ac7e7,	0x545e8378,	0x595db59f,	0x04edbae3,
-0x5e4540e3,	0x489aaeb4,	0x94b5b57c,	0xbe693e7a,
-0xcc870854,	0x7f6caa27,	0x0a85aa9d,	0xf678f31c,
-0xc0a00529,	0x350ee2b8,	0x163fd3f5,	0x13fc2e76,
-0xd92bb224,	0xdf829dcb,	0x07db061e,	0x2c99066b,
-0xcb0327e8,	0xe3d4e5e8,	0xd7d7da31,	0x643aed9f,
-0x1994a531,	0x73f84914,	0x5f296334,	0x874490b7,
-0x517b63f6,	0xc04b51ef,	0x34d7de4d,	0x478cb112,
-0x66642af0,	0x2f392ef9,	0x1811ec70,	0x943bc492,
-0x70c61209,	0xeec40884,	0x47bb5b01,	0x255afce3,
-0x393fcd34,	0x1cca4e00,	0x3d2ac97e,	0x314450fa,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_6bx/microcode-MU16b401.h

diff --git a/cpu/intel/model_6bx/microcode-MU16b401.h b/cpu/intel/model_6bx/microcode-MU16b401.h
deleted file mode 100644
index 3de3bdf..0000000
--- a/cpu/intel/model_6bx/microcode-MU16b401.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16b401.inc  */
-0x00000001,	0x00000001,	0x01102002,	0x000006b4,
-0x58213e6a,	0x00000001,	0x00000010,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x1016aa4c,	0xba6d2007,	0x139b094a,	0x8d5cd4f5,
-0xece206e4,	0xfac0aa68,	0x26674533,	0x9464601b,
-0x4b3f7f76,	0x64133194,	0x37c151ed,	0x3ee0e278,
-0x7cffc9c4,	0x562be2dc,	0xd1067021,	0xaf8f1728,
-0xbad0534c,	0xf7a67cca,	0xdd34e969,	0x774bb723,
-0x5635256e,	0xd23cce15,	0x3c7c50ce,	0xa5faaecc,
-0x1c717607,	0xcc1e6f3e,	0x16a4c6a7,	0x58bd5816,
-0x0a2e73b3,	0xd65104e4,	0xb873ec1a,	0xe6cdd62e,
-0xcd278f3c,	0x2e081c41,	0xf43f4439,	0xbcdfa892,
-0xbb20c46f,	0xe0c8f8e1,	0xa619c4cc,	0x48eea22e,
-0xcfdf4bc4,	0xefaf4494,	0xa7cac511,	0x783c367e,
-0x6fc43ebc,	0x67e32786,	0xf0c1fbb1,	0xf93d5b0d,
-0x36e9b7e8,	0xc3b4dc36,	0x4beec4fb,	0x88382c9d,
-0x735dd739,	0xc5e23b67,	0x0d325dd4,	0xfe8bd98b,
-0xa0f294f9,	0x1916bcd9,	0x7b73f066,	0x26758acb,
-0xf10be125,	0x5aee77d0,	0xa005f65a,	0xd4d88c84,
-0x02340625,	0x687da1c4,	0x29906f8c,	0x20ca4e9c,
-0xcad37ebf,	0x15ae02ef,	0x06ac0241,	0x60c210b8,
-0x07bb359b,	0x970ada27,	0xd15463c5,	0xb1df482a,
-0x32c0386e,	0x72719013,	0xbe45b1da,	0xda807e08,
-0xe1340a36,	0x9bbc789b,	0x71ae0eb2,	0xa7b0e639,
-0x12948517,	0x8bd37587,	0x083273be,	0x1a73a3be,
-0x2e0cf9a6,	0x3c401aa6,	0xc74c77f8,	0xe6ee9da6,
-0x3188f408,	0xcdfe98ff,	0x71369d02,	0x032e20b7,
-0xb9083418,	0xe5ef65a8,	0x3a9317d2,	0x23117ad6,
-0x6c303cfc,	0xe6aed513,	0x97b7af1e,	0xe277f5aa,
-0xd1f788a7,	0x72305569,	0x2a241259,	0x7f786fa4,
-0xeba79f99,	0x740b14fa,	0x2a8e8a3c,	0x7824a0f2,
-0xb1b4588e,	0xc775677d,	0xbc2372a6,	0xd485e398,
-0x8a989d5d,	0x960199ba,	0xe5dca6a2,	0x818b5c9c,
-0x655f760d,	0x8a75081a,	0x86a6d67a,	0x05e74583,
-0x160d2e9b,	0xecf3f2b6,	0xb0e5f342,	0x162dcc4b,
-0x95d05b92,	0xec736eb1,	0xad367c81,	0x6b98845e,
-0xaea10969,	0x32a923cc,	0x0e20e511,	0x11f1d80d,
-0xa80bff0c,	0xdee5c142,	0x5618820b,	0x9ab1530f,
-0xeb2e5aad,	0x71986a78,	0x4b9f79ab,	0xdcb38492,
-0x5d1df5ee,	0xa6947ea5,	0x4b81b7aa,	0x4fd1194a,
-0x809256af,	0x2d7d2c85,	0xc3a3d15b,	0x4e4dde55,
-0xa275c268,	0xe584005b,	0xe7975491,	0xed9d3d06,
-0x6aaf4acf,	0xf4e3f967,	0x7c04ded2,	0x9fefbb0c,
-0xff806dc8,	0xbe36d1ce,	0xdc9e4a45,	0xe54a5b71,
-0xea53d6aa,	0xf0e13f21,	0x250f7e77,	0x09429ec2,
-0xb34360be,	0xdf249256,	0x4b6b8d57,	0x6f3b9f7d,
-0x1dd4d988,	0x6a68c719,	0x82d171e5,	0x04de6517,
-0xd2628f0d,	0xfe6fd4e1,	0x8f3cbd0b,	0xd8517c88,
-0x7993bb4f,	0x9487f25f,	0x493ad1f1,	0x781b2745,
-0xd25de9ed,	0x63fe8ffa,	0x83be8468,	0x5955efd3,
-0xd07886cb,	0x3cbbf313,	0x10255dcf,	0x4fe6e5df,
-0x2afbe5ce,	0x2731cea5,	0x3ca3a0b4,	0x9a73e5b3,
-0x7022f776,	0x43f0062b,	0xac060c7c,	0x89c88761,
-0xdf86c5be,	0x0f705bcc,	0x811d31cd,	0x56e72be7,
-0x473becc1,	0x74d511a7,	0x7f44e656,	0xc04d3763,
-0x487e15a7,	0x851f93bd,	0xc0cfdff8,	0x11b62ba1,
-0x45ebf606,	0x5ae10f89,	0xcfd063cf,	0x25b52d80,
-0x03b35a1a,	0x7e5be251,	0x643e69b1,	0xe50e0a26,
-0x73a3be25,	0x7bd17fb9,	0x72ac0b0e,	0x2f04ee8b,
-0x8e614214,	0x73fbbb40,	0x6c87f572,	0xc2cca0b1,
-0x3a575557,	0xe38b025c,	0x57d61954,	0x5a77769b,
-0x123d2893,	0xd21f163e,	0xef617597,	0xbfd67b8c,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_6bx/microcode-MU16b402.h

diff --git a/cpu/intel/model_6bx/microcode-MU16b402.h b/cpu/intel/model_6bx/microcode-MU16b402.h
deleted file mode 100644
index 05ce034..0000000
--- a/cpu/intel/model_6bx/microcode-MU16b402.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16b402.inc  */
-0x00000001,	0x00000002,	0x01112002,	0x000006b4,
-0xf512ec8f,	0x00000001,	0x00000020,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x8d14e438,	0x725bfb67,	0x2d37e08c,	0xe7b19dfb,
-0x4c8d3c95,	0xffc6f57a,	0xfccb06b2,	0xc6e24fdf,
-0x1a3c7f2b,	0xa4b0a3ca,	0x09db4042,	0x61f7da54,
-0xf3aa8795,	0x7b8f1487,	0xecd5a1b8,	0xdc8c213d,
-0xcca7e859,	0xea53a869,	0x6029671d,	0xa2aa975e,
-0x5ad10a3c,	0x61dcc9e8,	0x6949a4d4,	0x114d569b,
-0xf3373941,	0x1c1838fd,	0xb175a480,	0x4f01d669,
-0xe91ced35,	0xe1d0c798,	0xc51cb3ea,	0xb1ca685f,
-0xa6d307d8,	0x4abbe7b0,	0xd37e4089,	0x43f218ca,
-0x2c775ea9,	0x3e312577,	0x948e06b0,	0x09cc6398,
-0x0f717e24,	0xac27b46c,	0xbeb41e37,	0xb6f8bcfb,
-0xe357533b,	0xe99f4a97,	0xb20b928d,	0xa3239533,
-0xd483e1ee,	0xbe688435,	0x11ce1bc2,	0xef04a8b7,
-0x10c9a575,	0xd74f47ec,	0x7e1caa09,	0xbdf4f1b4,
-0xbf14445b,	0x21b2f2a2,	0x63f32e79,	0x49df792a,
-0xd81e7458,	0x8d1996f9,	0x0ccd33e5,	0x907d96dc,
-0xd5b4ae37,	0xd743e460,	0x8d1eeb27,	0xbefe322f,
-0x84edfa2e,	0x94a23dcb,	0x5519aa65,	0x60fb77a8,
-0xfb3b499d,	0x5accc8df,	0x7e4fa2ae,	0xee70a051,
-0xa00e5234,	0x7411fac7,	0x9e3bd4ac,	0x8870b19a,
-0x0bf8210d,	0xa13413ee,	0xb18ccc76,	0x72217b46,
-0xbac79caa,	0x3c196591,	0x975b9d8e,	0x8750facc,
-0x4f4ba92a,	0x54a1c0e8,	0x2c30a8bc,	0xcb228a22,
-0x8a1a76a9,	0x20f0b73c,	0xcbf6d97d,	0x2c3d632f,
-0x487e9718,	0xdb39229d,	0x9dec941c,	0x857c67ac,
-0x3fcb6bed,	0x24b8a438,	0x19802922,	0x6e2ef495,
-0x2363800c,	0x8ed26f96,	0xe833a8b4,	0xf0f90321,
-0xeee74569,	0x6fe1b339,	0xb571118c,	0x96faaa1f,
-0xc0a5b115,	0xe0103aa4,	0x09679bc9,	0xe6c7ecc3,
-0xddd7fab7,	0x169d9eab,	0x46de7a6b,	0x8e62dc8d,
-0x0352127f,	0x9bbec1b4,	0xb4a22510,	0x06f94e5f,
-0xd7cc03d6,	0xb2e2c178,	0x8d8a48ea,	0xa089e856,
-0x6f2e29a3,	0xa6de73c0,	0x099bb823,	0xd642a2b6,
-0xd222edee,	0x4d618164,	0x8028d02a,	0xe7462bd9,
-0x993d5b65,	0x0d76b5b0,	0x20166d1b,	0x5000520b,
-0x2d1b6fc8,	0x417d7251,	0x7c13ac74,	0x1aac7da6,
-0xe3843e3d,	0xb76299a0,	0x9fb249c1,	0x4864d56e,
-0xe12eab25,	0x38ce3d26,	0xc0d5b8a5,	0xd4910b5c,
-0xbd428d74,	0x58ff0ae3,	0x78669ee4,	0x10471ff9,
-0x534e002a,	0xe1d8feeb,	0xf4feee35,	0x76f222b0,
-0x68c0270c,	0x0030d599,	0xd4241546,	0x8cfda1d1,
-0x3852f115,	0xd7fb3466,	0x58fe4578,	0x57038162,
-0xdb6dc364,	0x88baec17,	0xaf062790,	0xb70f6e83,
-0x73fd4542,	0x010debbc,	0xdd02bcda,	0xd7b44398,
-0xb2856418,	0x76aa8ecb,	0x72043c88,	0x00ba511e,
-0x58df48d2,	0x8a10f33c,	0x684fd7a5,	0x47f15765,
-0xe38065bf,	0x584d4eed,	0xa434b261,	0xc9254576,
-0xe10ff696,	0x9882bde6,	0xb0967eda,	0x8b12dd5b,
-0x1155b6a9,	0x679e8f2d,	0xe522ca3c,	0xff4432e0,
-0xf1172213,	0x540032ff,	0xeaa78315,	0x003217dc,
-0x96a5e987,	0x02d92ea1,	0x176db865,	0xbff26fc8,
-0xa1ed85cc,	0x8d1e3673,	0xaf598c4d,	0xbb472150,
-0xa522b7dc,	0x755194c6,	0x2cdafab3,	0x8ebd657c,
-0x6197fa59,	0x2ef39c18,	0x8f63f7e8,	0xf1cf5923,
-0x55e21350,	0xd44e22d0,	0xe134e739,	0xbd670fe0,
-0xe2685063,	0x6dae2e19,	0xfbce6e8d,	0x3d4fdea6,
-0xa7f23d9c,	0x1c7fe950,	0x2a23ef65,	0xf3f3a2f6,
-0xa3c1fa25,	0xc5b98bc7,	0xc2f482b2,	0xc7745101,
-0xfcf64472,	0x3f22aecb,	0x92018d3c,	0x24818346,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_6bx/microcode.bin

diff --git a/cpu/intel/model_6bx/microcode.bin b/cpu/intel/model_6bx/microcode.bin
new file mode 100644
index 0000000..9e24d42
--- /dev/null
+++ b/cpu/intel/model_6bx/microcode.bin
Binary files differ

cpu/intel/model_6bx/microcode.h

diff --git a/cpu/intel/model_6bx/microcode.h b/cpu/intel/model_6bx/microcode.h
deleted file mode 100644
index 9a83335..0000000
--- a/cpu/intel/model_6bx/microcode.h
+++ /dev/null
@@ -1,5 +0,0 @@
-
-#include "microcode-MU16b11c.h"
-#include "microcode-MU16b11d.h"
-#include "microcode-MU16b401.h"
-#include "microcode-MU16b402.h"

cpu/intel/model_6dx/microcode-m206d618.h

diff --git a/cpu/intel/model_6dx/microcode-m206d618.h b/cpu/intel/model_6dx/microcode-m206d618.h
deleted file mode 100644
index 1e79591..0000000
--- a/cpu/intel/model_6dx/microcode-m206d618.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m206d618.inc  */
-0x00000001,	0x00000018,	0x10172004,	0x000006d6,
-0xb7b66d41,	0x00000001,	0x00000020,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x8b98468f,	0x3766ea87,	0xb09b21d3,	0x56122294,
-0xc5ea11ed,	0x37f76e26,	0xc0f15ba1,	0xa1e74bba,
-0xf7177ffb,	0x5182564a,	0x45910773,	0x0eda2672,
-0x3657cb88,	0xdb55fdda,	0xd8318d0c,	0x3ebb142d,
-0x522ac44a,	0x83ab943b,	0x61765fa9,	0xea2a1c58,
-0xb5c6855e,	0x36f522c5,	0x679a3940,	0xd9a73e8a,
-0x4296cf82,	0x9a9da755,	0x50632ab2,	0xd20195b5,
-0x0da70fbc,	0xaa54fa84,	0x0d968f90,	0x8885f6e0,
-0x5c5be87b,	0x41b3ef59,	0xd126d9bf,	0x892a09f7,
-0xfe6aaaff,	0xf92fe218,	0x0820627b,	0xee58f87e,
-0x4cf5d03d,	0xfa96f89d,	0x67eb2bca,	0xb9f39726,
-0xffe7cbdf,	0xe306b9c6,	0x7478f683,	0xb3dba716,
-0x1cc1355d,	0xd4df036a,	0x61eaeff1,	0x6db53d06,
-0x9d8cdeb8,	0x3fe76f33,	0x499a5816,	0x767b66d2,
-0xbe7fe0e8,	0xa12b7466,	0x11b91265,	0x399ef7cb,
-0x563f2d7f,	0xb58199af,	0xbd86210c,	0x3ed97fe3,
-0x2281abfa,	0x03128e49,	0x71682563,	0x7473a011,
-0x5bd1eba3,	0x825db526,	0x47bb0d9b,	0xed4b0c1f,
-0xd4f5ef22,	0x1ac56dc7,	0x11c39136,	0x860a45f2,
-0xfa583033,	0xa4b46a27,	0x1092ddd7,	0x3b80bceb,
-0xca39816c,	0xbd71827f,	0x3ec0546b,	0xeb62fa40,
-0x3c90b1cf,	0x7a6f6561,	0x90732e6a,	0xae804456,
-0x33872789,	0x34cc11db,	0x1cf32833,	0x19e8e8a6,
-0xd8263d3e,	0x7789b962,	0x5b62a57d,	0xb82342dd,
-0x2b5109af,	0x2dbf1000,	0x143f181f,	0x9701d7e1,
-0xcf664358,	0xb7e12d61,	0x2d05020b,	0xe0a22ed3,
-0x06d12c8c,	0x001c2b91,	0xfed1cc3e,	0xeb220962,
-0x0214231b,	0xefe9d21a,	0x01c91de7,	0x442d153d,
-0x586a3f62,	0xcd135df5,	0xf5695a08,	0x0882bb15,
-0xb3d35f8c,	0x4c4a9889,	0x0e478731,	0xf48ee282,
-0x414bc1cd,	0xe228649c,	0x6ebe67bd,	0xfb72a712,
-0xf644a517,	0x657672f5,	0xdbe4f19e,	0x1a008de6,
-0x5178a6bd,	0x8c123abb,	0xe922b727,	0xd166b732,
-0x640f2583,	0xe6f2abf1,	0x4053736a,	0xab8e972f,
-0x2f137c09,	0xf04f7151,	0x2c6f72e1,	0xf6c74f8d,
-0xb8f506b3,	0x5de769ce,	0x0131cd04,	0x6cb62594,
-0x4199ecaf,	0xa45b93ae,	0x45642462,	0x63ec25d3,
-0xa793b3a1,	0x2b65326f,	0x4bb6e174,	0xa9ee5e36,
-0xb44e3800,	0x414e7d6e,	0x649210ce,	0xf247e0c7,
-0xf08379b1,	0xb1b2b5e1,	0x4f546ffb,	0xc4c3f671,
-0x41ecb2e0,	0x77178934,	0xeebefb09,	0x1fad39ff,
-0x1350b86f,	0xe140e8ca,	0x4eada8cb,	0x5209c265,
-0x695d5f95,	0x7ad173a7,	0xcd477f42,	0x02aaa026,
-0xd9d5e9c7,	0xa0935c5c,	0xc933399e,	0x33a16934,
-0x65669841,	0x4f3a35d0,	0xcab795eb,	0x34e264ea,
-0x65614bf6,	0x1d2bdc96,	0x4d591da7,	0x1c16d183,
-0xa66ed275,	0x4a954ca9,	0x40ca4e3c,	0x8993d784,
-0x67cfedcf,	0x4cd774e8,	0x81d48fdc,	0x152158f2,
-0xaf252dff,	0xf805bbc3,	0x08a2a759,	0x78888b77,
-0x8a5b7aa4,	0x37df8729,	0xf103811d,	0x6e4aa56f,
-0x7fa87e82,	0xbe5cb863,	0x9d06ede2,	0xb01a3cde,
-0x6118df90,	0xb75068cc,	0x69304bc8,	0x4c197795,
-0x11de2f62,	0x810faad7,	0xac232848,	0x06edff7b,
-0x71dec49b,	0x9f3e44c5,	0x0c4ce897,	0xf2e84f71,
-0x7c3eba7f,	0x5afda074,	0x7c82c2ed,	0x298026a8,
-0xde10e8fc,	0xdad8c483,	0xd6457f94,	0x08cb4a84,
-0xc28290fc,	0x93c335a3,	0xeaf1eeb7,	0xae42c772,
-0x89c88da3,	0x4bc6b949,	0x53bf510b,	0xbc154c2e,
-0xc064d174,	0xc8536311,	0x527a0f13,	0x8a2802a6,
-0xd71618ac,	0xc87934bd,	0xe96101d1,	0x55d1976c,
-0x471c8505,	0x7a36d839,	0x5d62a9ee,	0xf3c54a8a,
-0xa2be15d9,	0x244087c9,	0x042c8037,	0x23224689,
-0x281c5d73,	0x2139ecfc,	0xffb8bc8a,	0x834fdd11,
-0x9cd5a5bd,	0xa3368319,	0x7e5bef0c,	0x4ae2dbda,
-0x86d90089,	0x6675dfce,	0x48876262,	0xcec72538,
-0x11dc5c80,	0x86a730f9,	0x313565c9,	0xe3e5be11,
-0x106d7cce,	0x752b8be2,	0x3d00a5bc,	0xe6f70e95,
-0x44447ac8,	0x600df30c,	0x8335ac3b,	0x8816ddee,
-0x700982fe,	0xee495741,	0x48c7e81c,	0xa3d55da2,
-0xb0172982,	0x70ab2158,	0xd4460621,	0x3a9e528b,
-0x59b18a7b,	0xf4dabc4c,	0xa8454763,	0x70877bb6,
-0x66005c97,	0xaf292c06,	0x7b843db1,	0xf343b59b,
-0x25cdc7b5,	0xa41da617,	0x9e9d895e,	0xc936f475,
-0x7270925a,	0x30024230,	0x8e72f53d,	0x2b6c1b6f,
-0x1a69732c,	0x7ed5aff5,	0xfc18a2a3,	0xaf377cc1,
-0xbff09a78,	0x4b4e0814,	0x95a0b2c1,	0x270398de,
-0x201fca94,	0x2a032a4f,	0x131542b4,	0x0d7306da,
-0x2d1c3496,	0xcc3c6d8d,	0xa814ddc9,	0xa3b3a991,
-0x17ee60c2,	0x852c0b8d,	0x11e5853a,	0x762002a7,
-0x92c5311d,	0x0d4bf7e1,	0xfffec870,	0xe3d35e5b,
-0xff6ecfb9,	0xdedae6ff,	0x0111a772,	0x9808e780,
-0x29c336e8,	0xe9bc05df,	0x5bedde11,	0x945565af,
-0xaff808fe,	0x87e3423d,	0x4de6f98f,	0x93b4adef,
-0xbf704fa4,	0x09120e91,	0xd54f3692,	0xdf8eab1e,
-0xfabbf59c,	0xe74318be,	0xaab87ffc,	0x29fa791c,
-0xe3915552,	0xa652cb9b,	0xa1252e74,	0xb35b723b,
-0x542aa28b,	0x12fcc5b0,	0x3941f962,	0x82bcc6cc,
-0x47b11974,	0xb821611f,	0x78b34250,	0xf1be5659,
-0x561b9e61,	0x6f3bd501,	0x584e6f5c,	0xd54ed547,
-0xacebcd21,	0x7b5ff816,	0xb64ad233,	0x9f2f330d,
-0x69fb1ece,	0xac8710dd,	0x58dc6c60,	0x9bee6139,
-0xbb10ad0e,	0xbd8cd5dd,	0xebc0ce9d,	0xa733274f,
-0x884d9b55,	0x42b08b63,	0xafa54a74,	0x1c7ccf64,
-0x93a20191,	0xaaa3132e,	0xc69831d1,	0x54634889,
-0xfbfe3efc,	0xd3cf68d4,	0x302e3117,	0xf5693131,
-0xc3ce8c6c,	0x1f03cd89,	0x6243334c,	0xf16bc80f,
-0xdca5f130,	0xcb2cd956,	0x4c1bb421,	0xe8de533c,
-0x7f86703a,	0x29aa897e,	0xdd54acad,	0x76b2f2ae,
-0x7ef82b71,	0x2e30970b,	0xba402597,	0x9a653ab4,
-0xd68fcf53,	0x2d9f0d15,	0x7f9efd1c,	0x2363d147,
-0x5327289a,	0xe89229f3,	0xd63a535c,	0x7efe9273,
-0x64f2e3a3,	0x9bdf65a7,	0x26b6edfb,	0x1b9c7bfe,
-0x5d14b3de,	0x54d575fb,	0x6d65db4c,	0x95648b7f,
-0xa8a3b8f0,	0x7cc7ad46,	0xe20e6dbb,	0x8488a45f,
-0x8ebc2932,	0xd4767316,	0x3e8c4b8a,	0xbab7402c,
-0xfc1e217e,	0xe5c5bf82,	0x6928fe2e,	0xc88528e9,
-0x4b2e4e8f,	0xdd938b86,	0x0c964f98,	0xfc88d480,
-0x35fcaf9e,	0xdd7bbe9d,	0x197d005a,	0x4d40b3b3,
-0xcf203155,	0x0d2fa621,	0x752d2c58,	0xb12bac12,
-0x1e7e8c23,	0x94215d54,	0x9854a71c,	0x4de63c64,
-0x7a012529,	0x9c171f8d,	0x9e71def7,	0x3bd17d50,
-0x11f175d9,	0xec78abf3,	0x7b529eee,	0xd3a69fc3,
-0x5b718676,	0x58214d29,	0xa8bd2c34,	0x41ea00ab,
-0xa03f64d6,	0x4ee342b0,	0x32b1e444,	0x1c1801a4,
-0xc8424702,	0x334a7e35,	0x50cf1543,	0x3b22b495,
-0x88683776,	0x8e2e0154,	0x6155c033,	0x4e2fa6ac,
-0x42ace700,	0x8d64f97c,	0xaf9ced17,	0xb2a5cb92,
-0xa558582d,	0x88705de7,	0x9e528d59,	0x84bd45e4,
-0x5cb680c0,	0xcd48fa5c,	0x2722bfa2,	0x10462123,
-0x30080f7d,	0xb346cd81,	0x0049c396,	0x4e24165f,
-0xa7c66809,	0x2e60bdcf,	0xaad70a08,	0xa73ea713,
-0xe28f97a7,	0x283a9eab,	0xd4366489,	0xe776f963,
-0x64ffa8ae,	0xde717b50,	0xbd2ca2b5,	0x3bae5f6d,
-0x8d2bbef1,	0x7e9181e6,	0xf06aa121,	0xd06b2d20,
-0xa83ea826,	0xef935e4f,	0xdfd27456,	0xa3451468,

cpu/intel/model_6dx/microcode.bin

diff --git a/cpu/intel/model_6dx/microcode.bin b/cpu/intel/model_6dx/microcode.bin
new file mode 100644
index 0000000..d11772c
--- /dev/null
+++ b/cpu/intel/model_6dx/microcode.bin
Binary files differ

cpu/intel/model_6dx/microcode.h

diff --git a/cpu/intel/model_6dx/microcode.h b/cpu/intel/model_6dx/microcode.h
deleted file mode 100644
index 39a279f..0000000
--- a/cpu/intel/model_6dx/microcode.h
+++ /dev/null
@@ -1,2 +0,0 @@
-
-#include "microcode-m206d618.h"

cpu/intel/model_6ex/microcode-m206e839.h

diff --git a/cpu/intel/model_6ex/microcode-m206e839.h b/cpu/intel/model_6ex/microcode-m206e839.h
deleted file mode 100644
index 4f177c2..0000000
--- a/cpu/intel/model_6ex/microcode-m206e839.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m206e839.inc  */
-0x00000001,	0x00000039,	0x11152005,	0x000006e8,
-0x00e9d6a3,	0x00000001,	0x00000020,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0xc9226026,	0x31d04cc5,	0xeb5e9216,	0x81b9b739,
-0xb8187c4d,	0xdb2db5c8,	0xac304dd3,	0x56259185,
-0x5cee9dfc,	0xc4c708fc,	0xfbfebb15,	0x4657a346,
-0xd5fdfc56,	0x49ccc684,	0xfe2f1980,	0x23e44e95,
-0xaf7e0890,	0x0a306ae9,	0x0533035c,	0xf747f6c4,
-0xbb7a6356,	0x07415037,	0xb9cd0d46,	0x4dc69422,
-0x19ed8dba,	0x61955793,	0x2c69260d,	0x0e23b80f,
-0xce2c111e,	0x94c5acb3,	0xf2050f28,	0xc4348718,
-0x4496d9b0,	0xec1eb627,	0x8f6d3916,	0xa67909c6,
-0x37bdb9ce,	0x4d7393bc,	0x9b7027a4,	0xc1bfa4b4,
-0x671fb655,	0x447f72ea,	0xf96b0311,	0xbfa5989d,
-0xffa59b41,	0x4af95bb9,	0xeebc0d4e,	0xce0d8017,
-0xad35c182,	0x9fa068f0,	0xcdafa471,	0x5459e6da,
-0x9bb88256,	0xc593800c,	0x327a1e3f,	0x714bfb6f,
-0x8b02e7cd,	0x16020ebb,	0xb0598f84,	0xd021f373,
-0x07d55d88,	0x90774676,	0x6cd1f7ca,	0x99e1bfa7,
-0x3c67877c,	0xdbd380ab,	0x5eb38db2,	0xe0edbfd0,
-0xc5534984,	0x411b21df,	0x16771220,	0x4a8a60f1,
-0xd80ab95f,	0x93090a73,	0x12135fa7,	0xbf0fde89,
-0x50cb4bc6,	0x508ea81f,	0x8f567bbc,	0xecd02b7f,
-0x2b0ceb7b,	0x6fe0367e,	0xce928c01,	0x69589c6f,
-0x0c28f0f7,	0xd9ac3fa8,	0xd6a23e1d,	0x19613ebb,
-0xe455b950,	0xa58b7cf7,	0xeeab2947,	0x1e588aa8,
-0xbb634862,	0x5b6421b2,	0x6297ae0b,	0xbf63b1e9,
-0x530e7f14,	0x5c2c0f79,	0x9cdeebc4,	0xf6d7037e,
-0xbd4ed6d2,	0xd15f0af2,	0xace5591e,	0xa028a00d,
-0x48032c56,	0x67f890ea,	0xbb51ac52,	0x5827bad0,
-0x4b402353,	0xba6c615e,	0xfd5cec66,	0xcfb3d0f8,
-0x57c54520,	0xcfd5fc18,	0x10d35922,	0xcfd3e6c3,
-0xfe68e046,	0x3dc77d26,	0xe9f78a74,	0xa140eb55,
-0x08dd3509,	0xc6defaaa,	0x73febfe9,	0x0b79e780,
-0x73f35b7a,	0x7e9701ec,	0xeeb571a8,	0xed545d8a,
-0x1ecab16f,	0x4d2cdf06,	0x0f8d5bdd,	0xc8d515bd,
-0x2b240de4,	0xda882958,	0x6612e8e7,	0x9bea8737,
-0xf8c88eae,	0x7f6d9fa1,	0xdd249b1a,	0x07541510,
-0xaac8a29b,	0x25d07e85,	0xe9f0f581,	0x3f3c089a,
-0x90d4b3fe,	0x529d1042,	0x1e0bc5d3,	0xacbc4634,
-0xacdf6376,	0x759f6e7a,	0x614eb519,	0xf97894f9,
-0x69e18e24,	0x445adfa4,	0x6fc71d78,	0xb2bd1312,
-0x270e3a49,	0xdf22e530,	0x96d6bfab,	0x2d8153c4,
-0xe487add3,	0x0461fbe4,	0x6179e23b,	0x22bf0ad7,
-0xa527347c,	0xee772c22,	0x94c1c04b,	0x9cff8528,
-0x52f17360,	0x1a381a4f,	0xde59c8b1,	0x5ad6ddd1,
-0x01440596,	0xfb7ca9db,	0xf1b1c83b,	0xe4983438,
-0xdb246883,	0x1044db5d,	0x5e4a560e,	0x8312d13a,
-0x5db5e546,	0xfcf1485e,	0x6a95f22e,	0xebdf4063,
-0xa9e47fe7,	0xff203e14,	0x3e8c08fa,	0xbfdedef2,
-0x380c9a4b,	0xaf19c9c6,	0x75005e66,	0xff492ec9,
-0x28b8e6d0,	0x9cd69fe5,	0x839353d7,	0x8d4df3f1,
-0x38a4f7a0,	0xd5af72ad,	0x7e7ba9b6,	0x9a2c2f5a,
-0xe141e11c,	0x54101bf0,	0x6bd34fba,	0x2aeebd40,
-0xf3c6a02a,	0xfb45a6ea,	0x5f6cc3f9,	0x7d19ace6,
-0xc4e50923,	0xb77d6c3b,	0x28d21508,	0xa68dbda2,
-0x53519ded,	0x7d38215b,	0x6554c1d0,	0xceade8a5,
-0x861dbd69,	0x327694d4,	0x2284cab7,	0x79b7a4a9,
-0x2cb4e91d,	0xe91b5ee1,	0xa886aceb,	0x586f2b2d,
-0x586384c3,	0xed4a41fb,	0xe95f483c,	0x2bc37c1e,
-0xed66debc,	0xc081cc22,	0x13b62693,	0x1f739d44,
-0xb5c64b95,	0x8a6c382b,	0xe372637e,	0x4024aa2b,
-0x6d0cff83,	0x8b23bd82,	0x13251589,	0x9243024c,
-0x452e1d68,	0x22ee9797,	0xc02673e4,	0x8b9a7d37,
-0xa76d6538,	0xa92d6786,	0xa7cfc9a0,	0xa44beca4,
-0x31eb7699,	0xeb54ddc7,	0xa2fe7da1,	0x0ee15251,
-0x614235df,	0xe9cfedbe,	0x892a4e69,	0x9da98557,
-0x335b3fdf,	0x8ea201e5,	0x0946feb6,	0xb5a786df,
-0x022cc831,	0xab624815,	0xbc424527,	0x735f92de,
-0x9936cecb,	0x0e761edf,	0x0090693e,	0xc4a0499a,
-0x6b23228b,	0x1eb11bb0,	0xfa0e532f,	0xf3908bd4,
-0x6d12934f,	0xb0af2c23,	0x8ee4af5c,	0xdc901aa7,
-0x0354b0bf,	0xd130aaa9,	0xcdd548cf,	0x63c30fa9,
-0x2ce21b9d,	0xd28af5fd,	0xd0dd7223,	0xf8037eb4,
-0x475e5121,	0x4da06882,	0x5b5f6d0f,	0x2010ee60,
-0x6b70b26e,	0x34046d99,	0x60d17b52,	0x0ceb5995,
-0xfe843bb5,	0x32bd202f,	0xd253d64e,	0xafbbc103,
-0xfe550a5c,	0xadc17fca,	0xd50e62ac,	0x04aac0c1,
-0xfdc53287,	0x2ca779e0,	0x50d3509c,	0xc6642217,
-0x15a4a216,	0x792dc831,	0x28aaeb0e,	0xd90a51b1,
-0x4aafd019,	0x7120d967,	0x600cc53d,	0xcce4712a,
-0xa51c84bc,	0xa446aea8,	0x2d0434df,	0x7cc7e1bb,
-0xc58d985e,	0x975fd3b5,	0xeabd457e,	0x63019a78,
-0x07dd4acb,	0xf5d1b481,	0x271b33e9,	0x74e6b893,
-0xe1660e8d,	0x3b3857c1,	0xae2228b4,	0xe8971978,
-0xa5e9d620,	0xc42ce628,	0x8a723c90,	0xe1cbd643,
-0xd6b31dd6,	0x10ac4693,	0x30d07574,	0x2ceb736c,
-0xc4534cfb,	0xb1576d35,	0xb7452467,	0x83d90ec1,
-0x136647f4,	0xee1225f9,	0xb018b3ab,	0xe40e1466,
-0x6c39168a,	0x209e1e98,	0x467a80da,	0x39895b4d,
-0x9830701a,	0x08bb3694,	0x944d4ca5,	0x1b345056,
-0xfcd65853,	0x02dd7e3e,	0x8c3fe8ad,	0x4a250b9f,
-0x88f396e9,	0x1c7e6763,	0x8d63d571,	0x46bc5836,
-0x3495194f,	0x612a5504,	0xa3c960aa,	0x206508d5,
-0x0e742fa5,	0x962dc01a,	0xd7c6ae91,	0x7c60637a,
-0x4dd751b0,	0xe9ec6585,	0x7a6a9d8e,	0x97cc23b2,
-0x17c7cd98,	0x6bd0197e,	0x825caffd,	0x1b682617,
-0xb7a146df,	0x6cd43071,	0x46a325ef,	0x606c23cd,
-0xf391543b,	0x0c1273e7,	0xb14311ad,	0xa56c20d6,
-0x4f2b1f6b,	0x027fdd15,	0x153e5b84,	0x230ef754,
-0xddc5231c,	0x27009a47,	0x6a1af01f,	0x3eb1712f,
-0xdd5b0538,	0x1bdd1a17,	0x94a692ee,	0x6569ea36,
-0xbbed3e8c,	0x44be3a3a,	0x322e23fc,	0xb620d922,
-0xb0e4364b,	0xa6e9a5c9,	0x74ade8ba,	0xb619ba36,
-0x1ab260b7,	0x49d93617,	0xf34f51e0,	0x86c922f8,
-0x8b62ae4c,	0x4c5d191b,	0x8af345d3,	0x7dabf68a,
-0x50630f7d,	0x9367968d,	0x9dd2ec02,	0xcbbc9de9,
-0x96ff6002,	0x22557f00,	0xdcb11cef,	0x9a433696,
-0xdafd17fe,	0x4a4f2367,	0xcf03a80a,	0x07f1af6a,
-0xd17f5c02,	0x69d50343,	0x64e5f0ee,	0x1e8f8795,
-0xacb3be79,	0xec758d66,	0x972b429b,	0x70847a5e,
-0x26917ebb,	0x120198ea,	0x9fbc891b,	0x6024a8b3,
-0x21f187be,	0x5fc97d12,	0x8f40dd2b,	0xed5099af,
-0xba1c30f8,	0x42856fe4,	0x4ff70143,	0x3381128d,
-0x68074f27,	0xda4e4f40,	0x92355570,	0x87d9fc1b,
-0x79ba00f8,	0x80188b0a,	0x54d6c99e,	0x0c291886,
-0xae1ba6d8,	0xe1db6d71,	0x812eb8d5,	0xfe443861,
-0x4697dfe3,	0x07e2c123,	0xef211237,	0xe39cf56d,
-0x0dfe17fa,	0xea6030a6,	0xbaf85b2f,	0xb1fb1e75,
-0xb78b8e9d,	0x93d9d1bd,	0x6865386a,	0x85797883,
-0xa4136a38,	0x4c0ab699,	0x0647103e,	0x678defd1,
-0xf54ffe6f,	0x38042e86,	0xc936e167,	0x7e8be786,
-0x37a7a21e,	0x47af9dbd,	0xe223ff47,	0x67a5b932,
-0x8b5ec113,	0x4409c381,	0x17f02fc9,	0x4a2fc757,
-0x076c4f09,	0xafaad84b,	0x280e8dc1,	0x739ed578,
-0x49303f92,	0xe3ad06ce,	0xd6f2cc2b,	0x8c6178a7,
-0x7dd611bc,	0x3ef0622a,	0x7b5624c2,	0xc0d3ab3d,
-0x0886901c,	0xd50b755b,	0x9e5fff5b,	0x6defbd36,
-0x6eb81d52,	0xa83ed60b,	0x5a592ac7,	0xc7106e42,
-0x26c4d503,	0x01e85a02,	0xe5794f2a,	0xe59d8e11,
-0x642424e0,	0xeb729831,	0x2f7c579b,	0x9420638f,
-0x8b262c13,	0x5cbbc0a0,	0x1acd3e84,	0xf4fce699,
-0x5d87578c,	0x7e050318,	0x780e3acb,	0x8285e06a,
-0xbe10054d,	0xd1123dbf,	0x0d19268f,	0x9abdf2da,
-0xb8d42fec,	0xe7cd5df7,	0xd42255a4,	0x21cdd93d,
-0xf4613998,	0xc1f0cbb9,	0x21dac2e1,	0x8e14ad43,
-0xa89284ca,	0xf78bc18f,	0x94b84631,	0x2efa70c7,
-0xd95e5cc3,	0x6c5c9d37,	0x4955d2e5,	0x1986c823,
-0x250ad64e,	0xda87a2c3,	0x872d29e3,	0x43cc29f6,
-0xe667e664,	0xbf46632a,	0x14119b51,	0x2746bed7,
-0x37158545,	0x1e846c85,	0x1b95a555,	0xb7199a1e,
-0xa15c019c,	0xa3387c3d,	0x65ce357c,	0x4262836d,
-0x0cfe418c,	0x24ecb61e,	0x21bae0f7,	0xae0f7d05,
-0x21cb819c,	0x7c6f341c,	0xd40399ff,	0x340603e4,
-0x0c99c59f,	0xf2bfe2c8,	0x3fa6ab62,	0xfd523ff3,
-0x6729a50d,	0x748b60db,	0xd12ce998,	0xab74bee0,
-0xabd8562e,	0x486b62d0,	0xdf54ea64,	0x05706018,
-0xad5f0651,	0x03925450,	0x953c9690,	0xf671def9,
-0x12f2bc25,	0x489088ed,	0xe0821dfe,	0x86fc2ee9,
-0x5337050a,	0x73fe5693,	0xfdb68668,	0x6e3aaf10,
-0x1ff17349,	0xe0ed3f06,	0xf04c6a24,	0xc2ca002d,
-0x4413be0e,	0xf936745e,	0x2ecba010,	0x12d5d285,
-0xac3fbf57,	0x64a4bc04,	0xc8487824,	0xa98ffbcd,
-0xd09f47ed,	0xd55c8fca,	0x48f6b1ba,	0x7c91efae,
-0x996cceee,	0xe4eba045,	0x93231e6b,	0xeec78b5b,
-0x36b57bcb,	0x117e4338,	0x372b2355,	0x858d9058,
-0xcfd6a2ad,	0x0dfcf7ff,	0xb2175d06,	0xc30c0b18,
-0x082676e6,	0xa72aef65,	0x7fe69e25,	0x89e017fc,
-0x0c02475b,	0xfb6db944,	0xa22a7f67,	0x5109be81,
-0x49be8288,	0xe5912a66,	0x3e7f9c57,	0x196a17f2,
-0xc8f6d41d,	0x4a4ed74c,	0xf7068058,	0x530f85f5,
-0x5a62affb,	0x607e69cd,	0x187b3d35,	0xc0ba9105,
-0x09242e0d,	0xb9ed74d1,	0x89ee52f9,	0x304e629f,
-0xff1c5f7a,	0x541468fc,	0x889f2877,	0x009f0823,
-0x1554c91e,	0x4ede3cc6,	0xe8055158,	0x1f875bd4,
-0x7f319b05,	0xfd3b3605,	0xeede9e36,	0xfb91c6a8,
-0x13a4a1f0,	0xcfe5ea7b,	0x72e4742d,	0xfec9bfad,
-0x423111bf,	0xfc123877,	0x9d8a1696,	0xde722ee1,
-0x58581af4,	0xe6d333e3,	0x96480fd1,	0x1ec04bc8,
-0x89cd9328,	0x184a2e72,	0x61250a9a,	0x02a60896,
-0x68c4dc7f,	0x33bc2435,	0xef7ec8e4,	0xc184d4f0,
-0x2cc1046f,	0x022ddcbe,	0x44c1bdaf,	0x7a12cd23,
-0x5b378349,	0xc304a9b6,	0x3bdb987a,	0xbc33e5e1,
-0xb24473fd,	0x3e91a25e,	0xafadce24,	0x69738f5e,
-0x64410ade,	0x74dd6439,	0xe05174a6,	0xfc407a51,
-0x6330fbf3,	0xcb7c8c5a,	0x2ddded66,	0xd3165da8,
-0x023ed9e6,	0x3f2798d0,	0xe58c407c,	0x12f6c6fe,
-0x3d4e93d9,	0x1f44033b,	0x7415ece6,	0x797e18d0,
-0x1960eb38,	0x6d8802e8,	0x9aad531f,	0xacd1bea3,
-0xa437ffb9,	0xa512277d,	0x9ede1f43,	0x30b7894b,
-0x12116f70,	0xe238aa2f,	0x0bb75ff4,	0x1c5d91df,
-0x3636f6c0,	0xe0dfcfeb,	0x5389b29b,	0xa33a7562,
-0x85e4eab9,	0x09fefce5,	0x985ad1c9,	0xd93ff9ea,
-0x4c719a78,	0x4f47e619,	0x1dd726df,	0x4d6ac303,
-0x624e6340,	0x66986a42,	0xe56fa716,	0x055a5b10,
-0x2aaba4ae,	0x247363fe,	0x86dfbbca,	0xb9a66781,
-0x98e93037,	0x5d4e8c15,	0x9cc60f0f,	0x09ce687e,
-0x7948f82e,	0x329ed957,	0x413c9131,	0xd15a62c2,
-0xe19cc4d4,	0xb6435a71,	0xc891e0cb,	0x64067d28,
-0x71b59db7,	0xcd65e65b,	0x127354ee,	0x91b9d9e5,
-0x7159f111,	0x408dde9b,	0x9b50d36e,	0x93eda2f4,
-0x55429b2e,	0xa8b97a22,	0x5b625128,	0x7000e78e,
-0xbe0ffa92,	0xa3473045,	0x0990e748,	0x9f02bfd1,
-0xb4a4b632,	0xacc6e8ef,	0x83f1e4ed,	0x8c539784,
-0xedd466a9,	0x77e6ca09,	0xa453dcb5,	0x247db83a,
-0x4cd641c0,	0x4de6a12e,	0xf8599e34,	0xc825fc73,
-0x48c4ccaf,	0xfc5bba30,	0xd71618ac,	0xc87934bd,
-0xe96101d1,	0x55d1976c,	0x471c8505,	0x7a36d839,
-0x5d62a9ee,	0xf3c54a8a,	0xa2be15d9,	0x244087c9,
-0x042c8037,	0x23224689,	0x281c5d73,	0x2139ecfc,
-0xffb8bc8a,	0x834fdd11,	0x9cd5a5bd,	0xa3368319,
-0x7e5bef0c,	0x4ae2dbda,	0x86d90089,	0x6675dfce,
-0x48876262,	0xcec72538,	0x11dc5c80,	0x86a730f9,
-0x313565c9,	0xe3e5be11,	0x106d7cce,	0x752b8be2,
-0x3d00a5bc,	0xe6f70e95,	0x44447ac8,	0x600df30c,
-0x8335ac3b,	0x8816ddee,	0x700982fe,	0xee495741,
-0x48c7e81c,	0xa3d55da2,	0xb0172982,	0x70ab2158,
-0xd4460621,	0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,
-0xa8454763,	0x70877bb6,	0x66005c97,	0xaf292c06,
-0x7b843db1,	0xf343b59b,	0x25cdc7b5,	0xa41da617,
-0x9e9d895e,	0xc936f475,	0x7270925a,	0x30024230,
-0x8e72f53d,	0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,
-0xfc18a2a3,	0xaf377cc1,	0xbff09a78,	0x4b4e0814,
-0x95a0b2c1,	0x270398de,	0x201fca94,	0x2a032a4f,
-0x131542b4,	0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,
-0xa814ddc9,	0xa3b3a991,	0x17ee60c2,	0x852c0b8d,
-0x11e5853a,	0x762002a7,	0x92c5311d,	0x0d4bf7e1,
-0xfffec870,	0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,
-0x0111a772,	0x9808e780,	0x29c336e8,	0xe9bc05df,
-0x5bedde11,	0x945565af,	0xaff808fe,	0x87e3423d,
-0x4de6f98f,	0x93b4adef,	0xbf704fa4,	0x09120e91,
-0xd54f3692,	0xdf8eab1e,	0xfabbf59c,	0xe74318be,
-0xaab87ffc,	0x29fa791c,	0xe3915552,	0xa652cb9b,
-0xa1252e74,	0xb35b723b,	0x542aa28b,	0x12fcc5b0,
-0x3941f962,	0x82bcc6cc,	0x47b11974,	0xb821611f,
-0x78b34250,	0xf1be5659,	0x561b9e61,	0x6f3bd501,
-0x584e6f5c,	0xd54ed547,	0xacebcd21,	0x7b5ff816,
-0xb64ad233,	0x9f2f330d,	0x69fb1ece,	0xac8710dd,
-0x58dc6c60,	0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,
-0xebc0ce9d,	0xa733274f,	0x884d9b55,	0x42b08b63,
-0xafa54a74,	0x1c7ccf64,	0x93a20191,	0xaaa3132e,
-0xc69831d1,	0x54634889,	0xfbfe3efc,	0xd3cf68d4,
-0x302e3117,	0xf5693131,	0xc3ce8c6c,	0x1f03cd89,
-0x6243334c,	0xf16bc80f,	0xdca5f130,	0xcb2cd956,
-0x4c1bb421,	0xe8de533c,	0x7f86703a,	0x29aa897e,
-0xdd54acad,	0x76b2f2ae,	0x7ef82b71,	0x2e30970b,
-0xba402597,	0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,
-0x7f9efd1c,	0x2363d147,	0x5327289a,	0xe89229f3,
-0xd63a535c,	0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,
-0x26b6edfb,	0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,
-0x6d65db4c,	0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,
-0xe20e6dbb,	0x8488a45f,	0x8ebc2932,	0xd4767316,
-0x3e8c4b8a,	0xbab7402c,	0xfc1e217e,	0xe5c5bf82,
-0x6928fe2e,	0xc88528e9,	0x4b2e4e8f,	0xdd938b86,
-0x0c964f98,	0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,
-0x197d005a,	0x4d40b3b3,	0xcf203155,	0x0d2fa621,
-0x752d2c58,	0xb12bac12,	0x1e7e8c23,	0x94215d54,
-0x9854a71c,	0x4de63c64,	0x7a012529,	0x9c171f8d,
-0x9e71def7,	0x3bd17d50,	0x11f175d9,	0xec78abf3,
-0x7b529eee,	0xd3a69fc3,	0x5b718676,	0x58214d29,
-0xa8bd2c34,	0x41ea00ab,	0xa03f64d6,	0x4ee342b0,
-0x32b1e444,	0x1c1801a4,	0xc8424702,	0x334a7e35,
-0x50cf1543,	0x3b22b495,	0x88683776,	0x8e2e0154,
-0x6155c033,	0x4e2fa6ac,	0x42ace700,	0x8d64f97c,
-0xaf9ced17,	0xb2a5cb92,	0xa558582d,	0x88705de7,
-0x9e528d59,	0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,

cpu/intel/model_6ex/microcode-m206ec54.h

diff --git a/cpu/intel/model_6ex/microcode-m206ec54.h b/cpu/intel/model_6ex/microcode-m206ec54.h
deleted file mode 100644
index d048c79..0000000
--- a/cpu/intel/model_6ex/microcode-m206ec54.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m206ec54.inc  */
-0x00000001,	0x00000054,	0x05012006,	0x000006ec,
-0x7066b518,	0x00000001,	0x00000020,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x7eb963a3,	0x81dd6ce0,	0xded19ca6,	0x9c4c547c,
-0x4ffe6333,	0x9daea9fc,	0xa99d0e45,	0x40d831fb,
-0xc34a48c9,	0xe99943f1,	0x3eb82749,	0xc27adb97,
-0xceb7ce90,	0x2b9fd70b,	0xfdd8cd48,	0xf09bfba3,
-0x0a802e3f,	0xff791e57,	0xd904a6e1,	0x019baa1b,
-0xf06cac6e,	0xc1b92ca8,	0x018a122c,	0xd022163e,
-0xf53aee44,	0x1f932932,	0xe02dd579,	0xca667ac9,
-0x097489dc,	0xe9a6a13d,	0xd55d5d8a,	0x083e1325,
-0xda6c517c,	0xdd28a452,	0x08cf5296,	0xeffe1b21,
-0xebb0eddb,	0x10a96bd1,	0xf23ee356,	0xf70db5c0,
-0x21794b89,	0xe0780e67,	0xd53c387c,	0x2764b1de,
-0xefa8b543,	0xe7c2a535,	0x109bab7f,	0xc3258ea4,
-0xf81eb5fb,	0x264b114c,	0xe8cdad74,	0xc9286033,
-0x2efca9e9,	0xddaf486c,	0xcb174b77,	0x1247cc43,
-0xfc2a5940,	0xd92e965c,	0x298b9cc6,	0xe94519ff,
-0xe9a46566,	0x122a2564,	0xe842bae5,	0xca3cecb0,
-0x0877d766,	0xfc6c5c03,	0xf3c8e775,	0x23cb6009,
-0xdf125f99,	0xf2329969,	0x006cff15,	0xee305a0b,
-0xcaf81e1c,	0x25023329,	0xf5dc3edc,	0xf9ef7bd8,
-0x3f0ba575,	0xc3436132,	0xceca9997,	0x2752a329,
-0xe23a8359,	0xca98871a,	0x18a4219e,	0xdb578317,
-0xe712b71c,	0x3f8acb1b,	0xc8e5a45a,	0xd02a30ba,
-0x246db19d,	0xf01fb657,	0xc98be2a7,	0x0492afea,
-0xd213d7c1,	0xf13b6a40,	0x080a9753,	0xdce3ee84,
-0xc6701e00,	0x3d8b83af,	0xfd65eae8,	0xd198b88f,
-0x1ea955da,	0xc17869b5,	0xdab97efd,	0x19ee3b16,
-0xdae564c1,	0xeb37f38b,	0x07e58300,	0xd1769fd8,
-0xd36e6b01,	0x1458ae64,	0xdff50ee2,	0xe7b8a0cc,
-0x10e2f1cd,	0xf65cbaec,	0xdce4985c,	0x385f8c59,
-0xe6891614,	0xe9671703,	0x13b1ec37,	0xc87574ec,
-0xfe6459a6,	0x31d69428,	0xe6be49e9,	0xfcb184d6,
-0x3c162b7c,	0xc00e5aed,	0xc7e499e5,	0x137f142d,
-0xc2fcf099,	0xd1ebe28e,	0x2b894a14,	0xe065c15c,
-0xc2d3fe1b,	0x35b6e732,	0xff0c845b,	0xf0bf2cb9,
-0x37949535,	0xfc1ba418,	0xe9c0032d,	0x20979496,
-0xeb788c37,	0xccd207ac,	0x19314352,	0xe10c8803,
-0xe15cb069,	0x1c4cc4f1,	0xe82520bb,	0xee079d0a,
-0x38f8c902,	0xd71f01ca,	0xf96c962f,	0x1d4ceefc,
-0xeb6ac91e,	0xd2edee13,	0x2b87dbda,	0xc384d473,
-0xf150d06a,	0x2c35b9ea,	0xd748c5fa,	0xf5fca164,
-0x1f12ec1c,	0xcaec1b94,	0xee804b73,	0x2473054a,
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-0xf5afc9fc,	0x1cebf9c3,	0x350f8f5b,	0x893eefb8,

cpu/intel/model_6ex/microcode-m806ec59.h

diff --git a/cpu/intel/model_6ex/microcode-m806ec59.h b/cpu/intel/model_6ex/microcode-m806ec59.h
deleted file mode 100644
index 0358c7e..0000000
--- a/cpu/intel/model_6ex/microcode-m806ec59.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m806ec59.inc  */
-0x00000001,	0x00000059,	0x09122006,	0x000006ec,
-0x75996a3e,	0x00000001,	0x00000080,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x53b182f4,	0x30d6de9c,	0xfb30545c,	0x58852265,
-0xbf1878d3,	0xaadee666,	0x646fc5fb,	0xa45c8461,
-0xc01f708d,	0x2bcc9025,	0xe7b2edeb,	0xd18292c6,
-0x39069d18,	0xf6e3dd30,	0xfde656b6,	0x3c56e0ed,
-0xcbf70ef8,	0xc1d4f29c,	0x2b66a751,	0xf013e497,
-0xd0cdfa75,	0x36c365d9,	0xd737cae8,	0xd6a746ff,
-0x16c6ccc4,	0xec2b401a,	0xc552a1a8,	0x215f8505,
-0xe6827da1,	0xd0253fa0,	0x0715e1a2,	0xfdef30ba,
-0xe3b1193d,	0x33ed65b0,	0xff7e819e,	0xd3482ae7,
-0x20b90501,	0xe3b17981,	0xf77e9d12,	0x32d5d57b,
-0xdf45911e,	0xdf2b8f2b,	0x2efc8e9b,	0xfd783cd3,
-0xd9150e59,	0x30a56b13,	0xdc573a08,	0xc069a725,
-0x034fbd66,	0xe937436b,	0xc76367b7,	0x35742135,
-0xf4b24300,	0xd4e01c3d,	0x19e3551a,	0xe659ccc7,
-0xebfbf38d,	0x21b42a07,	0xfeaf08fa,	0xd2718636,
-0x3d9d185f,	0xee3bbebf,	0xe9f2c003,	0x3e0c4760,
-0xdc6780eb,	0xd146d676,	0x21aef1ee,	0xea35087d,
-0xc4ad71d3,	0x34637655,	0xc3bc5cab,	0xc47f955c,
-0x1fd13f04,	0xef726be5,	0xcde0dff3,	0x36793a45,
-0xe10f282e,	0xde86914b,	0x10c1bc4b,	0xecfcb0d3,
-0xeebb4405,	0x2316a5b3,	0xf56a4411,	0xc70ab977,
-0x2cd8da1e,	0xfd832a8d,	0xebc57968,	0x38eb999b,
-0xc17bfa75,	0xdd50368c,	0x204d06f7,	0xeb3f056a,
-0xc7222baf,	0x3ce3e58a,	0xca7f225d,	0xc8c07ad1,
-0x1928df0c,	0xf162e92d,	0xc535493c,	0x3087e49a,
-0xed9764f7,	0xd2c87b27,	0x17321630,	0xe1f18656,
-0xec707d61,	0x3aa898cf,	0xfd64ce5a,	0xdb428482,
-0x3a3a4fd7,	0xecc61449,	0xe66c8176,	0x3eddfc7a,
-0xded2b59e,	0xd83bfcd1,	0x2c00e600,	0xef20fe5f,
-0xdd362f16,	0x2979f8d1,	0xcd1a810e,	0xc9dd70e1,
-0x15f81b04,	0xe2320a17,	0xc18c97d9,	0x207ac4f6,
-0xf3bf84eb,	0xd44cf732,	0x010d6975,	0xfdf1e58a,
-0xf0cd3683,	0x21cfbe8b,	0xe4cc6eeb,	0xd3a7995a,
-0x3fe96a01,	0xfde77c17,	0xe28b808e,	0x250aafb0,
-0xcfd0fa1d,	0xc7eef408,	0x3e6961be,	0xeb771a95,
-0xdb0b8a71,	0x2b1af779,	0xd375fe0f,	0xcb1912e2,
-0x0790c573,	0xe39e4519,	0xdc961130,	0x35268a88,
-0xf25c4053,	0xd00d6d63,	0x1e50b357,	0xf849bed1,
-0xf3dfbf1f,	0x24664d59,	0xfbdf925a,	0xd03079ef,
-0x38bbbfd3,	0xffabbf4f,	0xf333775f,	0x32370fa2,
-0xc740822e,	0xc275d779,	0x3f1faa89,	0xf626cdd5,
-0xdc78f618,	0x3209ceb9,	0xc9d6cb0f,	0xddecaa34,
-0x185c45e9,	0xff33258d,	0xdefae69c,	0x29ca332a,
-0xf2b65db4,	0xc9df2ff5,	0x1d3ea2fe,	0xe954e244,
-0xf6287a9d,	0x38933c35,	0xfb4c27dd,	0xc43c1789,
-0x3e915738,	0xfb61d55a,	0xfd02c397,	0x3c0a8693,
-0xd0ee1d5c,	0xcc137695,	0x32e23d26,	0xf25f4c83,
-0xddee1226,	0x312f01d6,	0xd4eee429,	0xda24778a,
-0x1c95aade,	0xe175700b,	0xdb9faf2b,	0x3116bd4d,
-0xec6668b9,	0xdb9716aa,	0x03933541,	0xf69a7c1d,
-0xf4f66d3c,	0x23094b2a,	0xe22f9eac,	0xd6665e91,
-0x35d1ecfc,	0xf779ab44,	0xeaa7e8f8,	0x3de35c5f,
-0xc7812e85,	0xc548e73e,	0x2c9d0b09,	0xeea4f540,
-0xcbc4ea7a,	0x2e16a22e,	0xd655d8fe,	0xc3808b59,
-0x00fa68bd,	0xf0abeed4,	0xc14b4b22,	0x2db8a36b,
-0xfa0948e5,	0xd1b0c247,	0x08bbc94d,	0xe060fc59,
-0xf4231a34,	0x3b09fb37,	0xf31d2c2a,	0xc06d708d,
-0x3be350a6,	0xf895140b,	0xef3cf537,	0x3daafbfd,
-0xd2719d8a,	0xd060bd17,	0x316aaa0c,	0xe0c8fa47,
-0xdd0564cf,	0x2d41fc43,	0xdf854062,	0xdaafc6c7,
-0x0185d1d4,	0xf366135f,	0xcf7a191f,	0x32fe5d9a,
-0xe50a2534,	0xcba071dd,	0x07cbdb8f,	0xf9d80145,
-0xf149ac35,	0x3024ac21,	0xea13d0f1,	0xc977237c,
-0x21ba3409,	0xe6d96f93,	0xf47dc585,	0x25884a15,
-0xc82ac51f,	0xc1e5a5fb,	0x35dd4faa,	0xf76e9556,
-0x7ee314b8,	0x5778adf7,	0x290b8438,	0x4b936098,
-0x1ca31624,	0x3fcc4f34,	0x2ef19518,	0x1f318a4b,
-0x441a2edb,	0xdf2ea7f0,	0x75dd83bf,	0xa0d9970a,
-0xe1671909,	0x3a5efc43,	0x881bc862,	0xbe0d4a66,
-0x3c2bbcd2,	0x9f364688,	0xb42dc4c0,	0x3dcaedc6,
-0xfabddd74,	0x9a5dc61e,	0x58a9ae97,	0xc60ad1f0,
-0xfa32d453,	0x1f197242,	0xaaf4d475,	0xb7ed5053,
-0x7f7a7533,	0xcbc475b3,	0xc1d6847c,	0x0da87a63,
-0xaf002841,	0x9ef5bc45,	0x76287bd3,	0xf7cf9f90,
-0xf0b780c3,	0x9c081385,	0x8e362c7e,	0x0a195cce,
-0xfba79ca8,	0x816adf24,	0x754f3692,	0xe376805f,
-0xf204e0b6,	0x046cb3d1,	0x99555d03,	0x878f7728,
-0x63f11f4e,	0xa963d82e,	0xe6a3b6d5,	0x5e0c9cd7,
-0xd1f46a14,	0xb3a12623,	0x2977d7b3,	0x95c4065d,
-0xda581bf2,	0x5b8b87e4,	0xeaf439b5,	0xb3437cc7,
-0x3d70dcda,	0xe10247eb,	0xc4379e5d,	0x33898528,
-0x88b5b061,	0xf7e87209,	0x5b17ae11,	0xaa90ffb2,
-0x80d8dc2c,	0x409ddf2c,	0xdf1fbca2,	0x9558b6a7,
-0x25249090,	0xd9fec80b,	0xead71a49,	0x2d0732e4,
-0xbc742d06,	0xdb89f2c1,	0x423a13bd,	0x9184fa2a,
-0xa97d9ac7,	0x024a76bf,	0xf045cdad,	0xf6fe6992,
-0x6aae0f46,	0xe6fc887e,	0x859fd956,	0x73d2b957,
-0x9dca69ad,	0x6ae10a7c,	0x10462a8d,	0x6828acb6,
-0x1cbf5062,	0x1e0c6370,	0x1e3400c3,	0x1b72216d,
-0x7f851809,	0xa86037ec,	0x6d4e8a25,	0xd994c4b3,
-0xa422b7a4,	0xb7f4746a,	0xdec5c5e3,	0x76f65170,
-0xac7b3bee,	0x652d4055,	0x612c500b,	0xfb495fa2,
-0x68b608ba,	0xfc2b9032,	0xe88ce6bc,	0xd3b383e1,
-0xc3e1cbca,	0x77f8e4de,	0xfaf83a5e,	0x7a410d85,
-0x7822b5d2,	0x24d1e840,	0x7585a8b5,	0x8a8c683c,
-0x06cdc81b,	0x7dd4ad7c,	0xbc5f49e5,	0x3382c5cc,
-0x7747d721,	0x9643fb77,	0x3cd1a82f,	0x5c0af967,
-0x9a692973,	0x73249cba,	0x5dcee244,	0xd75a5f8c,
-0x64480f09,	0x36935849,	0xdfbfbfd9,	0x1d29c3bc,
-0x3eac276d,	0xe49df3ee,	0x0fe5695f,	0x0d7cb047,
-0xf48676b2,	0xe9df9817,	0x15122e1d,	0xfaff532c,
-0x1fdd56bd,	0x16653852,	0x15d2d1a1,	0x04da9a1f,
-0x54c10acc,	0xb08b55e3,	0x59389450,	0xed7bc040,
-0x27c807fc,	0x4b5b7ac3,	0x64c977bb,	0x3c41bf5c,
-0x7ebadc62,	0x01256f20,	0x100e5b6c,	0x0a3b947d,
-0x041fc183,	0x02043810,	0x0d446df7,	0x1578b1a1,
-0x140c585c,	0x5c9d28f1,	0x11cbd4bc,	0x417433ce,
-0x15559892,	0x143f8382,	0x1dcf3db7,	0x194eb843,
-0x728fec93,	0x13652ece,	0x727dd07c,	0x7b837548,
-0x76ed3ac9,	0x64ecff47,	0x12ab949e,	0x75f21c1a,
-0x136a64b3,	0xcd7f5a4e,	0x13b5472c,	0xc176b2e6,
-0xc3e087ea,	0x8ff78c20,	0xc6ec8424,	0x43a6a233,
-0x42fc6170,	0xb1d5fcda,	0x89c83548,	0x37cd3055,
-0x83afc495,	0x106831f3,	0x0cd1f4fe,	0x1543f6ff,
-0x3c97141e,	0x2d96e82d,	0x28220d54,	0x0e903138,
-0xc4ca1b2c,	0x3261cb0d,	0xe02fb5b7,	0xce18a517,
-0x7092e17e,	0xf3a96e18,	0x94a50092,	0x762d4b36,
-0x6b4b5243,	0xa2222363,	0xf0277678,	0x5303afe6,
-0x63c5a228,	0xf13ee85d,	0x8fa59f6d,	0x7c610767,
-0x5f034eed,	0xe12c923f,	0xcb4f5fbe,	0x30413e0e,
-0xb8e44469,	0x7e5cf715,	0x69f0d6d4,	0x07efe897,
-0x2d30c3f4,	0x6a1a7afd,	0x5ec25d03,	0x2dadd94c,
-0xd885ab27,	0x93118d7a,	0x8f1f5ab7,	0x1aed77cb,
-0x7fb524e5,	0xd983dad4,	0xe89096b1,	0x3dd93136,
-0xc368222f,	0xba5e6656,	0x380eddfc,	0x8434327a,
-0x7e1e8274,	0x4cf89dfa,	0x5da9e9c1,	0x0ae01923,
-0x7d23bcec,	0x85cbb64b,	0x2e8669f2,	0xa9614623,
-0x12da3003,	0x9ac927ae,	0x38d4c9df,	0xbb27f3fc,
-0x2f95b864,	0x73c04583,	0x1737cfa8,	0x6d5e5af8,
-0xee7f0c27,	0x0771affa,	0xd71618ac,	0xc87934bd,
-0xe96101d1,	0x55d1976c,	0x471c8505,	0x7a36d839,
-0x5d62a9ee,	0xf3c54a8a,	0xa2be15d9,	0x244087c9,
-0x042c8037,	0x23224689,	0x281c5d73,	0x2139ecfc,
-0xffb8bc8a,	0x834fdd11,	0x9cd5a5bd,	0xa3368319,
-0x7e5bef0c,	0x4ae2dbda,	0x86d90089,	0x6675dfce,
-0x48876262,	0xcec72538,	0x11dc5c80,	0x86a730f9,
-0x313565c9,	0xe3e5be11,	0x106d7cce,	0x752b8be2,
-0x3d00a5bc,	0xe6f70e95,	0x44447ac8,	0x600df30c,
-0x8335ac3b,	0x8816ddee,	0x700982fe,	0xee495741,
-0x48c7e81c,	0xa3d55da2,	0xb0172982,	0x70ab2158,
-0xd4460621,	0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,
-0xa8454763,	0x70877bb6,	0x66005c97,	0xaf292c06,
-0x7b843db1,	0xf343b59b,	0x25cdc7b5,	0xa41da617,
-0x9e9d895e,	0xc936f475,	0x7270925a,	0x30024230,
-0x8e72f53d,	0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,
-0xfc18a2a3,	0xaf377cc1,	0xbff09a78,	0x4b4e0814,
-0x95a0b2c1,	0x270398de,	0x201fca94,	0x2a032a4f,
-0x131542b4,	0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,
-0xa814ddc9,	0xa3b3a991,	0x17ee60c2,	0x852c0b8d,
-0x11e5853a,	0x762002a7,	0x92c5311d,	0x0d4bf7e1,
-0xfffec870,	0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,
-0x0111a772,	0x9808e780,	0x29c336e8,	0xe9bc05df,
-0x5bedde11,	0x945565af,	0xaff808fe,	0x87e3423d,
-0x4de6f98f,	0x93b4adef,	0xbf704fa4,	0x09120e91,
-0xd54f3692,	0xdf8eab1e,	0xfabbf59c,	0xe74318be,
-0xaab87ffc,	0x29fa791c,	0xe3915552,	0xa652cb9b,
-0xa1252e74,	0xb35b723b,	0x542aa28b,	0x12fcc5b0,
-0x3941f962,	0x82bcc6cc,	0x47b11974,	0xb821611f,
-0x78b34250,	0xf1be5659,	0x561b9e61,	0x6f3bd501,
-0x584e6f5c,	0xd54ed547,	0xacebcd21,	0x7b5ff816,
-0xb64ad233,	0x9f2f330d,	0x69fb1ece,	0xac8710dd,
-0x58dc6c60,	0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,
-0xebc0ce9d,	0xa733274f,	0x884d9b55,	0x42b08b63,
-0xafa54a74,	0x1c7ccf64,	0x93a20191,	0xaaa3132e,
-0xc69831d1,	0x54634889,	0xfbfe3efc,	0xd3cf68d4,
-0x302e3117,	0xf5693131,	0xc3ce8c6c,	0x1f03cd89,
-0x6243334c,	0xf16bc80f,	0xdca5f130,	0xcb2cd956,
-0x4c1bb421,	0xe8de533c,	0x7f86703a,	0x29aa897e,
-0xdd54acad,	0x76b2f2ae,	0x7ef82b71,	0x2e30970b,
-0xba402597,	0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,
-0x7f9efd1c,	0x2363d147,	0x5327289a,	0xe89229f3,
-0xd63a535c,	0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,
-0x26b6edfb,	0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,
-0x6d65db4c,	0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,
-0xe20e6dbb,	0x8488a45f,	0x8ebc2932,	0xd4767316,
-0x3e8c4b8a,	0xbab7402c,	0xfc1e217e,	0xe5c5bf82,
-0x6928fe2e,	0xc88528e9,	0x4b2e4e8f,	0xdd938b86,
-0x0c964f98,	0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,
-0x197d005a,	0x4d40b3b3,	0xcf203155,	0x0d2fa621,
-0x752d2c58,	0xb12bac12,	0x1e7e8c23,	0x94215d54,
-0x9854a71c,	0x4de63c64,	0x7a012529,	0x9c171f8d,
-0x9e71def7,	0x3bd17d50,	0x11f175d9,	0xec78abf3,
-0x7b529eee,	0xd3a69fc3,	0x5b718676,	0x58214d29,
-0xa8bd2c34,	0x41ea00ab,	0xa03f64d6,	0x4ee342b0,
-0x32b1e444,	0x1c1801a4,	0xc8424702,	0x334a7e35,
-0x50cf1543,	0x3b22b495,	0x88683776,	0x8e2e0154,
-0x6155c033,	0x4e2fa6ac,	0x42ace700,	0x8d64f97c,
-0xaf9ced17,	0xb2a5cb92,	0xa558582d,	0x88705de7,
-0x9e528d59,	0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,
-0x2722bfa2,	0x10462123,	0x30080f7d,	0xb346cd81,
-0x0049c396,	0x4e24165f,	0xa7c66809,	0x2e60bdcf,
-0xaad70a08,	0xa73ea713,	0xe28f97a7,	0x283a9eab,
-0xd4366489,	0xe776f963,	0x64ffa8ae,	0xde717b50,
-0xbd2ca2b5,	0x3bae5f6d,	0x8d2bbef1,	0x7e9181e6,
-0xf06aa121,	0xd06b2d20,	0xa83ea826,	0xef935e4f,
-0xdfd27456,	0xa3451468,	0xc6820a63,	0x43463105,
-0x787697aa,	0xcba5543d,	0xdf7e1e2d,	0x6998a8af,
-0x98ce6c08,	0x89de731a,	0x943a3510,	0xb36ead85,
-0xd5258d4b,	0x1cd6df61,	0x82a5c59d,	0xd078e7a4,
-0xa33d4317,	0x24dc45f8,	0x3f3daf27,	0x0478bc6f,
-0x92dfa16c,	0x952a872e,	0x7a34e03f,	0x0f088084,
-0xa40937fe,	0x38fc7749,	0xa157e8a4,	0xbce94344,
-0x7045ff7b,	0xf3e1ab66,	0xe62a6058,	0x5564ff10,
-0x38198f1e,	0xf326f0f1,	0xe262bc0c,	0x2f0b851a,
-0xc7bcbe11,	0xe79f1d1a,	0xc2f93c29,	0x54f3ea9f,
-0x8f8f9141,	0x9f45e13c,	0x7a5b86bd,	0xa764efd8,
-0x35f04729,	0xdd8c4b54,	0x5fa12e51,	0xa5824af9,
-0xad328f71,	0x0f11fbb9,	0x9048e950,	0x04d7a900,
-0x02538d1f,	0x99f745b7,	0xe31f63bb,	0x2c4e3d78,
-0x7cdb9245,	0xa3966ee7,	0x27c4433a,	0xe1d79f3e,
-0xe640fa06,	0x79ce31eb,	0xf25634fa,	0xdd9ce5cb,
-0xb7fab8d2,	0x2f1f0ff2,	0x2acb625c,	0xa0494989,
-0x206d7f11,	0xf268b8ca,	0x292bbf9f,	0x763bd7d0,
-0xea4b14fc,	0x9d3d6aeb,	0x64cca57e,	0x6fc3e29e,
-0x3e7bf4bf,	0x90efc7e3,	0x08e39173,	0xd05bee2c,
-0x5b3c8f37,	0x0921ec6f,	0x3371b715,	0xb324e114,
-0xe3abc53f,	0x576b18f8,	0xc4469024,	0xb2ded6c6,
-0xe7783782,	0xc0a1fd5d,	0xcf324bde,	0x97527c8e,
-0x19f8f48c,	0x3e806a5d,	0x96cff225,	0xe3b9d04a,
-0x0e5856ae,	0x781372f6,	0x9645f2b7,	0x95a743ed,
-0xd0c7eded,	0x86ca3cd9,	0xbab94db0,	0x43a1233a,
-0x89c55554,	0xee776239,	0x34aa0098,	0x66a6e1d4,
-0xae0e233e,	0x717e7b29,	0xb403a4c1,	0x36eb96c5,
-0x42140832,	0x04250936,	0xda375dca,	0x524cb2e6,
-0x86deaa0c,	0x400dc9d1,	0x12c00364,	0xe3ca7cf5,
-0x87f20da7,	0xf57df9ef,	0x580dbdfc,	0x0b3e0369,
-0x014d27fd,	0x4afaf6a1,	0xd1f4ca09,	0x77abc831,
-0x30e49729,	0xec61cd2c,	0x159c1e92,	0xb61b40b1,
-0x17c66fd6,	0xde11c061,	0x79d7f792,	0xc709cbfa,
-0x94201c89,	0xbe65137d,	0x18aea1b4,	0xf248bbc3,
-0x465f957d,	0xcf4a9672,	0xbf293fd2,	0x2c5e31c9,
-0xc2c73011,	0xfb29cbf2,	0x576f7f0b,	0x74de1745,
-0xa76e172b,	0x99b96223,	0x14ce1502,	0x231013fb,
-0x1d4df40a,	0x951b0c16,	0xab173e66,	0x4ff65f74,
-0xc4a87a47,	0x09cc3370,	0x66385490,	0x73e09118,
-0x4ee96432,	0x0164d347,	0x205069b5,	0x158dd226,
-0xc932c238,	0xe9048fa2,	0x100b626a,	0x86ee08cd,
-0xed87cb1c,	0x6353ec37,	0xa36edcc3,	0x8a16dd6b,
-0xd28a4198,	0xebea1127,	0xca0b761a,	0x61c31acf,
-0xced5ff4f,	0xbf4dbd8f,	0xd969d8a7,	0xb6e4e9e8,
-0x8421c402,	0x809d7222,	0xabfd1d2f,	0xc1857ce5,
-0x23958fd7,	0x3226f1d3,	0xd822b4cc,	0x2f1cc3aa,
-0x501fe01e,	0xe36f8c94,	0x7ad27716,	0x3321308b,
-0xa85b957b,	0x38cfdf6e,	0xc7497dd5,	0x2462090c,
-0x8f9e42e7,	0xdf97684a,	0xac8af621,	0xd5224866,
-0xc5f64e50,	0x9724f297,	0xc386097b,	0x48c6f98a,
-0xe1478b1a,	0x2dd23fd8,	0x716b2d85,	0xa5c3789b,
-0x53625e80,	0x9b8b312c,	0xce482165,	0x66161e35,
-0x64ecb56a,	0x9981c46a,	0xe6cb6bb3,	0xe1983186,
-0x75ed470f,	0x4adcbd27,	0x3efeda68,	0x4d193a2a,
-0xbfdb3cd4,	0x7c6167b6,	0xdbddea68,	0x4b0d2d62,
-0x00ba3860,	0x49ec2544,	0xa68698c9,	0x2ce7be1b,
-0xf5afc9fc,	0x1cebf9c3,	0x350f8f5b,	0x893eefb8,

cpu/intel/model_6ex/microcode.bin

diff --git a/cpu/intel/model_6ex/microcode.bin b/cpu/intel/model_6ex/microcode.bin
new file mode 100644
index 0000000..b1634ad
--- /dev/null
+++ b/cpu/intel/model_6ex/microcode.bin
Binary files differ

cpu/intel/model_6ex/microcode.h

diff --git a/cpu/intel/model_6ex/microcode.h b/cpu/intel/model_6ex/microcode.h
deleted file mode 100644
index 06d0969..0000000
--- a/cpu/intel/model_6ex/microcode.h
+++ /dev/null
@@ -1,4 +0,0 @@
-
-#include "microcode-m206e839.h"
-#include "microcode-m206ec54.h"
-#include "microcode-m806ec59.h"

cpu/intel/model_6fx/microcode-m016fbBA.h

diff --git a/cpu/intel/model_6fx/microcode-m016fbBA.h b/cpu/intel/model_6fx/microcode-m016fbBA.h
deleted file mode 100644
index 3f79dd2..0000000
--- a/cpu/intel/model_6fx/microcode-m016fbBA.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m016fbBA.inc  */
-0x00000001,	0x000000ba,	0x10032010,	0x000006fb,
-0x08707b60,	0x00000001,	0x00000001,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x000000ba,
-0x00000035,	0x2a000000,	0x20101002,	0x000002f1,
-0x00000001,	0x000006fb,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x21d97964,	0x9846e570,	0x1d30fb85,	0xb909572f,
-0x88a15af6,	0xcff6f5d8,	0x01ade078,	0x72eac781,
-0x58d10d9f,	0xb7f2421d,	0xe4d5fcf1,	0x02889a15,
-0xad9bed07,	0xa32ab3e6,	0x3491afcc,	0x9c991c37,
-0x2a1c2071,	0xf066191a,	0x3bd898e7,	0x2648d958,
-0xc05f7908,	0x05864b9b,	0xbe4c1eee,	0x1e6c7ef4,
-0x0e7a539e,	0x100b2ab3,	0x1273dceb,	0xfec8847d,
-0x8f37946f,	0x634e3b5c,	0x691dbd61,	0xd89e3cb9,
-0x094639d4,	0x7d972e1a,	0xd6dbd94d,	0x2001c3ec,
-0x34f791f0,	0xeee0d794,	0x88b7459d,	0xc2c73aa3,
-0x607a174d,	0x4f0f8304,	0x65790b35,	0x00532bfe,
-0x1fd1e0cc,	0x7b91f873,	0x154ed42b,	0x7a7108e9,
-0x81637c95,	0x192cb173,	0x28ccd94e,	0xb9bcc372,
-0xac05171b,	0x867f47da,	0xf8e8c47d,	0x1edcdb4a,
-0xd2ca6c2d,	0xe9ee9169,	0x5a6efedc,	0xb6825038,
-0x09277eaa,	0x2a34e580,	0x0f794366,	0x86c99402,
-0x211b98bf,	0xdf8eb0e3,	0xda11d7bd,	0xd440363e,
-0xa7d49f1a,	0x16dd7395,	0x5b23c2fc,	0xab93ea3c,
-0x00000011,	0x3e547655,	0xa3c23fd3,	0xc4b7878e,
-0x8783318c,	0x52cc22bf,	0xaf347896,	0x54342107,
-0x72c7bb6c,	0x3e13b80d,	0x46bc1a33,	0x23cfc252,
-0x0d4ef13b,	0xc21dc600,	0xdb9ec613,	0x0899f190,
-0xafbb3213,	0x0652ed0a,	0x739aaabe,	0xa4d1ce13,
-0x0fb0b628,	0x1270dc1a,	0xb6d7833f,	0x6846a946,
-0xbc8adbe3,	0xb9f43c78,	0x2008edcb,	0x5a9c34a8,
-0xb38931a2,	0x0c0a82a8,	0xf1e458a2,	0xa20645df,
-0xcb6bb4ee,	0x85c91f0c,	0xed3e330d,	0x76c74422,
-0xdde7d6a0,	0x0af339f8,	0x1a7c4dbc,	0xe79f6e3a,
-0x73b720c9,	0xe1e83952,	0x686f7729,	0xf1925af1,
-0x2b154459,	0x1c540322,	0x5ec2fc7d,	0x87597cd3,
-0xb2031f29,	0x94589a6d,	0x55c3330e,	0x33af7895,
-0xedd71f83,	0xa5a11a4a,	0x4bc706ed,	0xf6f04df1,
-0x724cad51,	0x0a677c56,	0xd0356d3b,	0x6068e86c,
-0xd74f070f,	0xc07b0e3a,	0xa0b98d7d,	0x0041181d,
-0x79266ba5,	0x3ff83201,	0xd1b327ee,	0xaf55f568,
-0xe936acaf,	0xaa5dca57,	0xdeae2b1a,	0xd6643058,
-0x389cec0d,	0x7e524e3c,	0xb0b13d46,	0xbe0722c4,
-0x4fe4f260,	0x6569767a,	0x4ded63fd,	0x03474b65,
-0xe1875127,	0x328e6736,	0x2166cb67,	0x50ee94e8,
-0xd0a26ea2,	0x9751ca79,	0x22c0a65f,	0x5c458980,
-0xe9b9c62f,	0xa13221b6,	0xb43292db,	0x36e2b143,
-0xff8ba502,	0x3f42d32d,	0xd043d05c,	0x77bd8a19,
-0x9a652b71,	0xaae1b2d0,	0xe490085a,	0x181145c7,
-0xbfc061c4,	0x18bfd9b0,	0x22b830b4,	0x5201a02d,
-0x5651bc35,	0x535005f8,	0xcbe674e1,	0xe78d03ce,
-0xc52d0fa2,	0xc8b78a1f,	0x1b694c97,	0xce0e7567,
-0x0f2229de,	0x98c847cc,	0xe68554d7,	0xf9864b16,
-0x3cc47a83,	0x941221d2,	0xcc3a7ef4,	0x0170bb22,
-0xc9053a4b,	0x9c7721de,	0xed941a9b,	0x8be05de7,
-0x2f42fd5e,	0x36b0a67f,	0xb306a1f5,	0x34abbc36,
-0x24c17625,	0x6a3de329,	0x01988238,	0x066a1868,
-0xafca471d,	0xd2adc39b,	0x813525b3,	0x00a0acf5,
-0x2aa361cf,	0x4dbe173e,	0xdaf77894,	0xaa889ded,
-0xa3697b54,	0x80d26705,	0x0c2da0f3,	0x58a4b8a4,
-0x39cc0d4e,	0x3c9d4670,	0xd2b5d20e,	0x2724e973,
-0xb1351d5c,	0x20906d79,	0xe24891e5,	0x2035c218,
-0x4e0139ea,	0x56be6bd7,	0x083b0550,	0xbb402759,
-0xfd95c78d,	0x9fb7daa5,	0x60175f4c,	0x32446eb0,
-0x5021b32b,	0xa772bf99,	0x377195f7,	0x442fb939,
-0x4425cf3f,	0xd0413035,	0x515c39e8,	0x869ee778,
-0x8d4c2561,	0x826a5d49,	0xba1d315e,	0xd850a5b1,
-0x3241090d,	0x4bc25949,	0xa08b2d5e,	0xb69c0931,
-0x7c510465,	0xffb294e3,	0xbd919d03,	0x591938b8,
-0x66fce51e,	0x1da2e975,	0x513c2611,	0xd2c89b3b,
-0x55fa8777,	0x7287353f,	0x0e53d7f5,	0x409d5772,
-0x2db94ea8,	0xde0e9927,	0x8a1e2ac7,	0x1f7ec493,
-0x61089e93,	0x6abe868e,	0xc0df9a96,	0x4436a57d,
-0x0c48c8b0,	0xa247ee28,	0x141d6787,	0x1b12b920,
-0x2e21a991,	0xf0ff3f1d,	0xab4b5b32,	0xc0a0ca68,
-0x430e80d8,	0x8d74a965,	0xb54d5f63,	0x5d68e9e4,
-0x6b548ee8,	0xf047d59a,	0x3b4789f9,	0x21b5069c,
-0xf913817b,	0x732e9a9d,	0x2874cc28,	0xa9627bc0,
-0x6fdb58d6,	0x13587cf9,	0x39ce92e1,	0x36b9492d,
-0x5408f555,	0x8ffe55ba,	0xb43c9df5,	0xfac29337,
-0x56cbe2b3,	0x0185d1ed,	0x9be346e7,	0x40a19df7,
-0x3c1a2895,	0x4d26af1f,	0x45a55ab6,	0xa842ab52,
-0x1f747d77,	0xe0d9102c,	0xf971b544,	0x7ee0828a,
-0xfe3c6fac,	0x25395596,	0xc9b47fa3,	0x156ce98b,
-0x8f31e2b0,	0xb6e25664,	0x9640f47b,	0x8ac2d5bf,
-0x840e6610,	0xa97a44b9,	0x3fdc0ea8,	0x06910a51,
-0x2091b59a,	0x9c2e5439,	0xf8842451,	0x3f9a4ff3,
-0x362a0004,	0x12dad719,	0xb2f60dd0,	0xa97a0474,
-0xfa3560c2,	0x7fd81bf8,	0x57f7532e,	0x23486049,
-0xaafefb9f,	0xc66725ee,	0xdb9cd720,	0x63f4e092,
-0xd0a26789,	0x64b0aa78,	0x58af8ea1,	0x585d3712,
-0x1fd2f90f,	0x8e0574b1,	0x50e4b136,	0x2c1dbb31,
-0xc02feb6b,	0xa2714a85,	0x9130f487,	0x4a1253c2,
-0x6bad5346,	0x546c4765,	0x4fd9e206,	0x1e958eea,
-0x9015b920,	0x50328bec,	0x1cb229f7,	0xe68970ce,
-0x6596e986,	0x5bc7ebcb,	0x68a13530,	0x773e1ef7,
-0x705d8d8e,	0x58a4be35,	0xd1b47b52,	0x0c1d7eb9,
-0x94c9bb62,	0x9f8b78f3,	0xeb6f4c67,	0xe1359c6a,
-0xcc9bb75c,	0xc58dbc28,	0x53972a64,	0x1e077ac9,
-0x30b94c6d,	0x85bd7fca,	0x834a8432,	0xa56b0993,
-0xe8298659,	0x75f7aa51,	0xeff8d034,	0x89ff3761,
-0xe5280f0a,	0x62dc4a8e,	0xa3993ac8,	0x71122e79,
-0xd47785e2,	0x34158175,	0x63c8d85b,	0x7ac99eef,
-0xe0bd1e85,	0xd34d96cb,	0xb98776ef,	0x2ced7ad0,
-0x8de1a90b,	0xb91c6986,	0x031585b2,	0x945f0055,
-0xd619c86e,	0xbcd30cf2,	0x4bf7ffbd,	0x723a068b,
-0x19063c35,	0xb1a0bf7e,	0x76712f67,	0xd4a648d3,
-0x2eac160d,	0x284404e3,	0xc8a18a02,	0x2ff33921,
-0x8d56011a,	0xfda7cc43,	0x41e15608,	0xec688d2d,
-0x648eb60c,	0xe67029e2,	0x481e2a28,	0x82748afd,
-0xd243f0e6,	0x7d48b037,	0x8911dd57,	0x9876663d,
-0xdfc8715f,	0xa725ff6a,	0x18ceae0c,	0x571c5836,
-0x017ec3a0,	0x23e2b7bc,	0x8a19e5d1,	0x49f1ad67,
-0x6eb53ff0,	0x70d5e83f,	0x8d587f1b,	0x9fcd1b0d,
-0xb77c9c28,	0x0fa9ffc9,	0x2567087e,	0xd2626fa6,
-0x13a3d9f8,	0x327f16ea,	0xcf6c283d,	0x9cb948d5,
-0x82d61c27,	0xee7df429,	0xdba4362f,	0x873cd73f,
-0x3ea8c681,	0x99914378,	0x3cdb5ad8,	0xaeb85eef,
-0x10100fbb,	0xc99eba28,	0x55f32c4d,	0x676315eb,
-0xe78da6bd,	0x341f250b,	0x0139763f,	0xf9bcdd95,
-0xee95a716,	0x477450bf,	0x0655a8ec,	0x82ba0c7b,
-0x1f8140ba,	0x1ce6ade2,	0xb395d6bd,	0xe420cc72,
-0x00c9379f,	0xd499a95a,	0x04212c33,	0xe02ccdcf,
-0x01ec3905,	0x23d2c3e9,	0x105c1fc3,	0xedf2f621,
-0x0d2e782a,	0x24f4ed1b,	0x8c8e6bfa,	0x43881813,
-0x67bd4cd1,	0x529b5f8c,	0x7dce8273,	0x792b3c08,
-0xd6d49290,	0x141eb20d,	0x90198577,	0x461a9ca2,
-0xe3ce9501,	0xc1888a85,	0x904ce501,	0x04ab4ef9,
-0xfe292a8f,	0x3aded4f3,	0xa9c4673a,	0x384ba9ca,
-0x092f1252,	0xc0464403,	0xcba863b5,	0x509464ba,
-0xe11d075b,	0x26f1c460,	0x167b95ce,	0x4cec6a27,
-0x1d4845f5,	0x4e8a1314,	0x857e5e97,	0xb7195631,
-0x0378dee2,	0xf461bbd3,	0xc8bfc18d,	0x4587627b,
-0x0cb224e9,	0x0332b337,	0x4d566685,	0xbb52863d,
-0x98f4e44f,	0xa504d2e9,	0x6d57f47e,	0x4a015409,
-0xf54d386f,	0x2da77a2b,	0xab04d06d,	0x7bf8ea19,
-0xb0ebc25c,	0x91119128,	0x56c54eea,	0x152f4e23,
-0xa25117ce,	0x99534ada,	0x8842eb0a,	0x3a5dd205,
-0xe97955a6,	0x80950258,	0xb925944d,	0x628b7f30,
-0xb07c3e37,	0xf5c86344,	0x4c36449e,	0xd940801d,
-0x7b3b0da0,	0x16ea7b8d,	0x4a0f4fa0,	0xbd480d07,
-0x82ec44f6,	0x51779667,	0x5bdbb1d3,	0x8deb45ca,
-0x38a66184,	0xfb470fc9,	0x25363fb1,	0xbc129a95,
-0x29d5068f,	0xf517f1bb,	0xf5769dc1,	0x75a0256e,
-0xa6b98e74,	0x2b76fcdd,	0x4de2eb6d,	0x24ed8d53,
-0x1a6cc18f,	0x1736d538,	0xf4b1cbfe,	0xf8922e6d,
-0x70db7017,	0xdb34cf04,	0x3120bfbf,	0xe087fc6a,
-0xae0a91e2,	0x9f2ea090,	0xbc05b13a,	0xc0ed6589,
-0x73ea7422,	0xbabc72c6,	0x4de4ca2f,	0xa9f8d16f,
-0xe4de37b8,	0x353eeb76,	0xdde6b6ed,	0x21d9e183,
-0x7c57e342,	0xf28b9bb1,	0xab7ca9c0,	0x4a085c72,
-0xffb07dd6,	0x63abd7f7,	0x1ae27c52,	0xf77ee0d7,
-0x708b3437,	0x7e2dff0e,	0xb6b319e6,	0x8c84e925,
-0x55087edc,	0x500f35ad,	0xc81640b0,	0x937d864e,
-0x9efa3d5b,	0xf5eebce7,	0xc740d979,	0x62ab9012,
-0x08e825b3,	0xeba1dda6,	0x0052dd87,	0x6d8d8ad4,
-0x4a047831,	0xfcd9bee3,	0x8510f73f,	0xf83c5f7e,
-0x5a09c0f7,	0x95b0eb08,	0x698d240f,	0xa0560b49,
-0xe19b647a,	0xec596c6b,	0xd13d7808,	0xe259263f,
-0x4a6d99ce,	0xbf035717,	0xc410e0c8,	0xebf36b19,
-0x99256c4a,	0x6c9463e3,	0xf4999032,	0x12216280,
-0x3b8d2e40,	0x1bc6337c,	0xdaa5f7e1,	0xa9acb5ab,
-0x6ccb91dd,	0x152fc803,	0x0bcbc7eb,	0xb94d2418,
-0xd65b6f1e,	0x694756a0,	0x14cd941c,	0xa56429e3,
-0x945054a4,	0xd4922be6,	0xd571552e,	0x82b5c823,
-0x668fafe8,	0x2827fdd9,	0x9af3de76,	0x2a5d0078,
-0xf5ae0dd5,	0x223e7253,	0xa0ae4bb4,	0x812bb4ed,
-0x7d2b571b,	0xfa71b182,	0xb0a73540,	0x3ad09e40,
-0xc814ec6e,	0x71a63179,	0x645ac68b,	0x68d1f6ab,
-0x8dad1277,	0x3782a2a8,	0x173335f5,	0xb5aa47cf,
-0x6df9de08,	0xd1175256,	0xe4d4c2f3,	0xaad6edac,
-0xa0dcfa5a,	0x38e7df7b,	0x93e2fbe9,	0xefe7dc23,
-0xef1ec4b8,	0x9b9f7a91,	0x148474cc,	0x03b75bd2,
-0x5210cba7,	0x4a9b1025,	0xebded8fc,	0x7c570275,
-0x3b654b12,	0x484ed1cf,	0xf4765b45,	0x42b55bd4,
-0x33f6be6b,	0x62e0f627,	0x170ad64c,	0xa80f34da,
-0x695c665f,	0x58a7aa98,	0xd51bab9f,	0xc3b18153,
-0x3ce425c2,	0x81977e00,	0x3b692349,	0xcbb9621f,
-0xc7ed3dec,	0x69bb55fc,	0xf68cb3da,	0xa89f69f9,
-0xe9d78668,	0xac0d599c,	0x9338622e,	0xef6a80a7,
-0xcb803262,	0x98db8030,	0xbc0d6a0e,	0xd0406313,
-0x70d22c76,	0xe71a332e,	0xa55ccdc3,	0x8306d4c8,
-0x5a590069,	0x84fcd275,	0xd090c333,	0x61941b43,
-0x05dcb6fc,	0x83302e99,	0x8526a3ca,	0x28217e4a,
-0xeb77a9ef,	0x285993f7,	0x721d0d7c,	0x920ca6d1,
-0x4a707536,	0xd5aedad0,	0xa82d8e14,	0x235d429e,
-0x68deef3a,	0x48508124,	0x39117ab4,	0xcab7d6f7,
-0xe3799e96,	0x0341dc52,	0x9b10cb97,	0xb76cff12,
-0x78cf69ee,	0xd3b239d4,	0x9e7919f6,	0x912b718d,
-0x273f96e4,	0xc50fae20,	0xb56a3ed5,	0x9c26170a,
-0x778d39a6,	0xa8074a03,	0xd958cd31,	0x5c43785c,
-0x7e531c75,	0xc10c8c3a,	0xe85529a8,	0x79a3e6cd,
-0x6fb780b8,	0x6276a99b,	0x3366ea7d,	0xb76be755,
-0x9f22b122,	0x7402e46b,	0x0b2b7f27,	0x3e63819f,
-0x35f48d35,	0x34aebe7b,	0xe23dc95c,	0xadb296a2,
-0x7b2dc075,	0xa28d6220,	0x4923418c,	0x6c13fdbe,
-0x69896994,	0xc70b5cfa,	0xc22cc285,	0xf793d578,
-0xfaf3d9c9,	0xb5dc63a6,	0x7bc0b55e,	0x88d911c1,
-0xdaaab0e9,	0xc1009d00,	0x4e7a0718,	0x1d7a601f,
-0xdd735686,	0x2d2ab1b1,	0xdc390b2f,	0xdf715a5d,
-0x67c956cb,	0xe2b0c8db,	0x24f5fbab,	0x8b458cff,
-0x45dd583b,	0x260a2e69,	0x3563d5ec,	0x73515033,
-0x6c6a106d,	0xccf70121,	0xa30620dd,	0x848bdf18,
-0xaa782383,	0xa7100f7e,	0x4af5403c,	0xcc73a37c,
-0x2d002136,	0xdcb3b05d,	0x896b0ab0,	0x71def25a,
-0xa91d2e05,	0x90e67089,	0x46ca60f4,	0xee8e8ace,
-0x388aadf6,	0x6e1988eb,	0xa5f6ed36,	0x5c09463e,
-0xa45af8d1,	0xd7203f72,	0x899bbf9b,	0xa20ed019,
-0x52b94f4f,	0x0890fdb7,	0xe6bcbdd8,	0xab6cbcf0,
-0x125710db,	0x6e5aefd7,	0x408aee3c,	0x0c56e336,
-0x1870069b,	0x54a56b0a,	0x6d14d42a,	0x0ed50493,
-0xb3c80709,	0x00c1060e,	0x898926fb,	0xf3fea77b,
-0x219356a3,	0xb865d050,	0x76fd954a,	0x982a005f,
-0xa025babe,	0xe27617f9,	0x636f6ae0,	0x59c6452f,
-0x693c6755,	0x3a456552,	0x5f196189,	0xe7c00883,
-0x2f0fadef,	0x50452f3e,	0x8b50e4bd,	0x94da4b3a,
-0x40d27bf5,	0xb5334fdf,	0xb113a8ce,	0x4124b76b,
-0x53e2407b,	0x31ec0c8a,	0x1267ca97,	0x33301cde,
-0x3a1d01fb,	0x51f46d75,	0xb68dec1b,	0xac17cc1a,
-0x2237848c,	0x9e356ef9,	0x409fd21b,	0x5a6ba4ad,
-0x804fd5c3,	0x39425f53,	0x5cfc44d4,	0x829ee224,
-0x9e01e625,	0x683030b0,	0x403c406e,	0x2c0ce2b1,
-0x08d4cfc5,	0x138fa5f0,	0xb7b5c621,	0xa50055ee,
-0xbc026d6b,	0x8774b3fd,	0x76457f21,	0x7e158d98,
-0xf17e4d3d,	0x27f9d37e,	0x31bf03ae,	0xff591765,
-0x5f22a455,	0x80299a95,	0x02e995aa,	0x19b72733,
-0x2a36cd71,	0xcb202152,	0xecec3f36,	0xbbd8de45,
-0xb3553c2e,	0xa591ec2b,	0x252ceaf2,	0x2030103d,
-0xdafe66b3,	0x6525ca46,	0xf2c1995f,	0xdc7d543b,
-0xcc0829c7,	0xf143227e,	0x08dd6c1e,	0xdaae24e4,
-0x384116dd,	0x1500cd26,	0x15efbd7d,	0xce1d02b8,
-0x14273db2,	0xf2deb501,	0x975668ab,	0x4fff60d7,
-0x5b39a8fb,	0x7f1339c7,	0x19a50cd0,	0x9fe08015,
-0xb8387cd7,	0xb49ef60b,	0x9c1dec4c,	0xf42a2288,
-0x351c612c,	0xf98b5940,	0xda049b1c,	0x1451185a,
-0x3b584ae0,	0x27800175,	0x1a3f929e,	0x450582f0,
-0x2ca48d71,	0xc3737df9,	0x1faa4abd,	0x2bf6d0dd,
-0xf477a0a7,	0x98f8b08f,	0x6fe2e1df,	0x64f49023,
-0x964dc2cb,	0xf00a61b8,	0x26294563,	0x5e7e36ba,
-0x0b8b4772,	0x343143d4,	0xfd7b9a81,	0x9b4215ae,
-0x3d4f837e,	0x7068c239,	0xc20a91ba,	0x34dc95d5,
-0x7cf45a03,	0x4718bf5d,	0x5af81981,	0x91d67ef2,
-0x0a8d38ed,	0x61983a39,	0x863c5ac1,	0x92380e97,
-0x4614a926,	0xb7907c48,	0x3fa01934,	0x6db06ba0,
-0xb18a25a1,	0xd9e86af2,	0x7a77c0f4,	0x2a17e9c3,
-0xdc994730,	0xe44256df,	0x1d3bf8aa,	0x28d73d02,
-0xf7f9b680,	0x587eafea,	0x4a86e831,	0x0ffdb37a,
-0xb12010f4,	0xd42ad505,	0x1a61c1bd,	0x6dafc6e0,
-0x1ff46e85,	0x3f809ebf,	0x565d32a1,	0x91d84a75,
-0xdac631a9,	0x6a88da88,	0xec34772b,	0x1fcb5bef,
-0x1dcf8ecb,	0x62653ef3,	0x62ffca63,	0xf8ef085a,
-0x39f12233,	0x04e00586,	0x0ef61e0a,	0x203dcb51,
-0xba26fe41,	0xc955bc0d,	0xc954f298,	0x437baab9,

cpu/intel/model_6fx/microcode-m046fbBC.h

diff --git a/cpu/intel/model_6fx/microcode-m046fbBC.h b/cpu/intel/model_6fx/microcode-m046fbBC.h
deleted file mode 100644
index 457adae..0000000
--- a/cpu/intel/model_6fx/microcode-m046fbBC.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m046fbBC.inc  */
-0x00000001,	0x000000bc,	0x10032010,	0x000006fb,
-0x9394765a,	0x00000001,	0x00000004,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x000000bc,
-0x0000003f,	0x2a000000,	0x20101002,	0x00000341,
-0x00000001,	0x000006fb,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x2af1b833,	0x6fa88145,	0xbb3d706f,	0x102fb136,
-0xdd8a5942,	0x49b592b9,	0x2d3fece0,	0xa8c418ff,
-0x58d10d9f,	0xb7f2421d,	0xe4d5fcf1,	0x02889a15,
-0xad9bed07,	0xa32ab3e6,	0x3491afcc,	0x9c991c37,
-0x2a1c2071,	0xf066191a,	0x3bd898e7,	0x2648d958,
-0xc05f7908,	0x05864b9b,	0xbe4c1eee,	0x1e6c7ef4,
-0x0e7a539e,	0x100b2ab3,	0x1273dceb,	0xfec8847d,
-0x8f37946f,	0x634e3b5c,	0x691dbd61,	0xd89e3cb9,
-0x094639d4,	0x7d972e1a,	0xd6dbd94d,	0x2001c3ec,
-0x34f791f0,	0xeee0d794,	0x88b7459d,	0xc2c73aa3,
-0x607a174d,	0x4f0f8304,	0x65790b35,	0x00532bfe,
-0x1fd1e0cc,	0x7b91f873,	0x154ed42b,	0x7a7108e9,
-0x81637c95,	0x192cb173,	0x28ccd94e,	0xb9bcc372,
-0xac05171b,	0x867f47da,	0xf8e8c47d,	0x1edcdb4a,
-0xd2ca6c2d,	0xe9ee9169,	0x5a6efedc,	0xb6825038,
-0x09277eaa,	0x2a34e580,	0x0f794366,	0x86c99402,
-0x211b98bf,	0xdf8eb0e3,	0xda11d7bd,	0xd440363e,
-0xa7d49f1a,	0x16dd7395,	0x5b23c2fc,	0xab93ea3c,
-0x00000011,	0xf54dfe4d,	0xb8599ebd,	0x68368067,
-0x0c28dcb7,	0x92f2bc78,	0x491ac560,	0x329ab46d,
-0x919a91db,	0xbc3fec07,	0x1a5c33bb,	0xfe4d7c1c,
-0xc4313e4c,	0x601898ae,	0xa2b45d10,	0x8d3de9a1,
-0x987f7385,	0x93000345,	0xb08e3756,	0xfc44c2b0,
-0xf292627f,	0x03af916e,	0x32dde7ee,	0xd34d4cdd,
-0x21cbe9ff,	0x37609266,	0x6666d138,	0x7a91e13b,
-0x46484cf1,	0xf8a7c935,	0x6e897d1b,	0xeb0f7917,
-0xfba989fd,	0x2cc10b53,	0xa7edacb5,	0xf3d60e31,
-0x6374a743,	0x64dc6363,	0x3ab65ed9,	0xdc3cea84,
-0x3ad576cb,	0xfd67599c,	0xc7bb3c17,	0x1dc5d240,
-0x0e2f6ed5,	0xb0ccd630,	0xe9770c9b,	0xc93acfd4,
-0xf4fe7c30,	0xbd49a7af,	0xc23863d7,	0x644a7bb4,
-0x0024b38b,	0x8645d8bd,	0x3cb2b02c,	0x8f1caf00,
-0xb46940eb,	0xa447da2d,	0xa9a9fc7c,	0xfe25e95b,
-0x4083643d,	0x7527659a,	0xb3696697,	0xb8dfb8c0,
-0x45f5aac5,	0x8ba9d1f7,	0x3debba3f,	0x914a09ab,
-0xc773edf6,	0xe0e3b2f0,	0x6d2c375c,	0xe63dff4e,
-0x12711e4a,	0x10903919,	0xebbfc605,	0x800d75f2,
-0xfb00d315,	0xf93dc071,	0x0b2529ad,	0x2c1dadd7,
-0x3714ff07,	0xcae69d1e,	0xd726f1a8,	0x4796a657,
-0x52553fa8,	0x9a296689,	0x90280d12,	0xf4ecfd77,
-0x13fb9c84,	0x12662edd,	0x9cd608d8,	0xd738dc25,
-0x0f7fd9cc,	0x80e84675,	0x797d3a62,	0x74855b0e,
-0x53c9f427,	0xe5b9acc3,	0x3b1b9776,	0x8ee9a613,
-0x26e57210,	0x10a9cf35,	0x9286f2f9,	0xbfbcdb15,
-0x673f4e38,	0xd98ce6dd,	0x4d9ce100,	0xb68f501b,
-0x706f9469,	0x6ea08dd5,	0xc73dc3cd,	0xecc7ae70,
-0x9ab0c6b2,	0xb74f9843,	0x0a3058c3,	0x552778da,
-0xb7cd1fbd,	0xb57a827b,	0x13920a27,	0x27587128,
-0xf8a81ffb,	0x129fae97,	0xa8f49d89,	0xfd025aef,
-0xe0f084f6,	0x9ea0d579,	0xe1c34b93,	0x6b5b5bfa,
-0xcab5907f,	0x46c7f3a0,	0x1257abc0,	0xedb94f10,
-0x723b8f25,	0x9f8310a1,	0x99cb5438,	0xd354620b,
-0x637ce697,	0x93899e66,	0x8d9c4941,	0x9206b17f,
-0x632ffaf6,	0x9cf227dd,	0x1b148ac3,	0xe33969c1,
-0xbbb78c2f,	0xadc65796,	0x8f407d7e,	0x7c1716f0,
-0x6433bbdc,	0xd6084baf,	0x7b39c1fd,	0x214d9c6b,
-0x1d0fd4fa,	0xa993ed02,	0x78e39e0e,	0x66f0b3af,
-0x21d6910d,	0x29110ece,	0x1f7b3033,	0xa91398fd,
-0xb82ff1b1,	0x35ead30f,	0x48ce4ceb,	0x152e94e3,
-0x8ca11179,	0x06a0cd52,	0xfb8a2ebb,	0x3cbe5f77,
-0x6f04dfd7,	0x77d6ab17,	0x5efccae5,	0xb4cf074b,
-0x632dc5a0,	0x4c2bd8d7,	0x4c4f9c01,	0x31ba47a9,
-0x1d11e152,	0x8160ab94,	0x5ac00bfd,	0x65cd6d32,
-0x77efb325,	0xad50b063,	0xaf0f2522,	0xa1b58573,
-0x06b96386,	0x987fb308,	0x60d9087d,	0x9e3dda26,
-0xfe56ed7c,	0xf0a18b07,	0x38d7cdba,	0x2c7b25a3,
-0x564cf58f,	0x0ef16d01,	0xdded6d0c,	0x5e50bf20,
-0xe2455331,	0x8d545107,	0xe0f87c6b,	0x38491372,
-0x05352d41,	0x8e156588,	0x3ff31afe,	0x0b0e1d41,
-0x096d7b4a,	0x4729d48c,	0x6cf3f084,	0x71bebbab,
-0xed13fd71,	0x53a4ecdb,	0x539b8640,	0x7c915e51,
-0x08e1f582,	0xdeb5072a,	0x1a79e7ae,	0x0dfc3090,
-0xe2357f73,	0x283dbbf7,	0x66b9b50f,	0xc98c3eef,
-0xbe4cfbea,	0x6c3328e3,	0xecde6b57,	0x2cd15d3f,
-0xb9e4a4db,	0x279ff953,	0x8691aa73,	0xf7da6500,
-0x23fd6f22,	0x0aedc9f9,	0xdc33d374,	0x755755b2,
-0xad2e5a3f,	0x4c7a58c3,	0x9b6d6b56,	0x08c09167,
-0xfb13baac,	0xff4fdaaf,	0x5085e560,	0xacbeb4ca,
-0x4e8e133f,	0x09f9bc70,	0xff088b13,	0x9eb90d1a,
-0x55a2cecf,	0x44250c30,	0xe2c4491b,	0x4ce59d2e,
-0x7cae16e8,	0x1080a65f,	0x1b190acd,	0xcdb6fde6,
-0xd595a15b,	0xac21a20c,	0xd964edaa,	0xb3b91c87,
-0xfffa075c,	0x5955c04e,	0xc19829ea,	0x6b741f50,
-0x2efa46c2,	0xa408fc4d,	0xf384588d,	0xc6493485,
-0xfee07645,	0x8dfcbf85,	0x58497ed9,	0x16c9736b,
-0x7c84c59b,	0x47d9d806,	0x76bdcfbd,	0x9b0feaf6,
-0x15182bfe,	0xa71c9be1,	0x5f57b773,	0xb8605794,
-0x27b8fefe,	0xb93e45aa,	0x4df89c60,	0x3e6fb188,
-0x18a7371d,	0x9294bb43,	0x93df87e6,	0xd376f269,
-0x492d4b7f,	0xd5c3e116,	0xca94c6fb,	0x33fb3fa8,
-0x6f86b3e4,	0x11668629,	0xe29c3038,	0x81e9e93e,
-0xe50f4ad1,	0x18d587cf,	0x80bc338d,	0xdd51eb4a,
-0x9a4d571d,	0xc9e12b23,	0x0bba3c81,	0x0dbf1583,
-0xf150db23,	0xf6a5a5ca,	0x1f78cb4b,	0x5b8a2173,
-0x69b185d8,	0xd290c81b,	0x6b95fbae,	0xfeec8dd0,
-0xd26cb47a,	0xf979074c,	0xe71f504c,	0xd018d28c,
-0x07ac8483,	0x3a74819d,	0xc0e28813,	0x8a8e6055,
-0x9ad0809f,	0x4518202e,	0xd1918fac,	0xd6d21cee,
-0x2ab78998,	0x47069b78,	0x93effaf6,	0x186285b0,
-0x6e943ade,	0xf989327b,	0xd56eb699,	0x2c97eef4,
-0x53c83bd1,	0xabfff7ab,	0xacd4b255,	0xebf557f6,
-0x30190e40,	0x95515337,	0x386219ff,	0xcccca9fc,
-0x08d03684,	0x61d65074,	0x153005b6,	0x423f8486,
-0x79a92726,	0xeeb69d98,	0xebc58165,	0x99ba884a,
-0x54988107,	0x089eb09d,	0x313f1540,	0xf0592023,
-0x7d796b29,	0x985fd1b4,	0x788a1f6c,	0xb4d3eff0,
-0xd3bc1aca,	0xd94cf2ce,	0x50de76f0,	0xe56b3eab,
-0xf7215599,	0x567ad204,	0xf64f3f54,	0x5e4d93f0,
-0x62c197bf,	0xb0a40dfb,	0xbfdcb171,	0x943db348,
-0x317329a3,	0x5801a712,	0x42b746ee,	0x476de579,
-0xb5764347,	0xe1252fd4,	0x382f7e48,	0x4356b7f0,
-0xc8ac11d2,	0xd1e22f3e,	0xe72f873c,	0xb4d7e96a,
-0xe3cae630,	0x87f22e69,	0xb1650694,	0x278f4cd1,
-0xc3048a06,	0xc97facf8,	0x2e42d24b,	0xfbba463a,
-0x1f74936b,	0xaec9f8c0,	0x28ef73dd,	0xa3e593a4,
-0x0bb57346,	0x4fad2d57,	0x6aded116,	0xd474efc0,
-0x850e4911,	0x0243ed1b,	0x8366c88f,	0xffc30812,
-0x8bca3734,	0x5245b274,	0xc180f403,	0x6976a8c8,
-0x9ddd675b,	0x7cb955a0,	0x9c362c6b,	0x6d67075d,
-0xe776e4c6,	0x590e0fd2,	0x96cb03ae,	0xb082292d,
-0xc5b3b48b,	0xb037fb7e,	0xc643c8c4,	0xf06ca5d4,
-0xe274d411,	0x94b96817,	0xd0eb3729,	0x705d5dd4,
-0xee25ca33,	0xc814771b,	0x398d9c90,	0x585d6910,
-0x345e2b62,	0x4f144351,	0xd4231121,	0xb231765c,
-0x043d91f0,	0x9bf7a950,	0x413b4109,	0x62015026,
-0x71dadb80,	0xae46e301,	0x3b453512,	0x08276e4c,
-0x3062b2a7,	0x9126d5ba,	0x38e1dcc5,	0x1d7ce5da,
-0x029f2ebe,	0xe15f0578,	0x30eb611c,	0x43e547bc,
-0xbc6fc58e,	0x859f12e5,	0x7760c4ea,	0xc3e581f9,
-0x6d1f3f15,	0x0c29c987,	0x8fd0b861,	0x5430e1a2,
-0x8fe570c9,	0xb546cb0f,	0x40a832d6,	0x6fb3aa75,
-0x4a44f3eb,	0xeb79dbc5,	0x14ff0379,	0x4104e36b,
-0x180a30dc,	0xa11d6bb5,	0x1f604ef7,	0x53e5afec,
-0x353499a0,	0xfc8dce9f,	0xa3c18d63,	0x16da59e9,
-0x104aceb5,	0xc885941d,	0xf05ec241,	0x26d9128b,
-0xe5d823f5,	0x0ac0afd1,	0x9fbcc9c2,	0x9df56f90,
-0x403a1c0c,	0xbdc01726,	0xcc48d20c,	0xdccdcf5a,
-0x26d3ac5c,	0xd9501d08,	0xb5ebb2ff,	0x78c2b66c,
-0xb5fd1639,	0x41aa2843,	0x2acec360,	0x504f07e2,
-0x0eb9bb79,	0x96f899a3,	0xb3a67885,	0x74d3ad45,
-0x4b7c823e,	0x0bc912c2,	0x39ce413d,	0x205b6d0b,
-0x4593e836,	0x1891bd36,	0x01ff9e90,	0xe74d3ac9,
-0x867e6d49,	0x9b934421,	0x85d79351,	0xbec5402e,
-0x44df416d,	0x8f84c809,	0xdda36686,	0x05ef6d08,
-0xac06f7b4,	0x3e16c558,	0xe8e004fd,	0x309e47f3,
-0x2c786f7a,	0xf4efac57,	0xfe372834,	0x86a57ba4,
-0x621cc0a3,	0xa9bc1b98,	0x0c54e9e8,	0x9f2f23e1,
-0x2acd232b,	0x6e4330d3,	0x33ce13ea,	0x56e269d7,
-0xbed326e1,	0x6bf3e063,	0x9506a92b,	0x568ac248,
-0xe23a98a1,	0x7e0058e1,	0x8c269a39,	0x1dca56eb,
-0x30d0ccb4,	0x3a33f104,	0x0de0a097,	0x2a751844,
-0x9ef24be7,	0x1b10fb65,	0x8751c66d,	0xdc12e3e0,
-0xd2f33411,	0x8ca390f8,	0x869bafb7,	0x4dfef371,
-0xd92b8bb5,	0x9d8336e9,	0x0a38a943,	0xea891683,
-0xacb636f7,	0x1310c7fd,	0x46817b4f,	0xff032aff,
-0xa23a31fc,	0x4baec586,	0x68197f54,	0xa922467e,
-0x97fd6f7c,	0x4df7ae1f,	0xfc1d89f4,	0x9b41d04a,
-0xf702a2f2,	0xe7fd5757,	0x3fb69294,	0x2da320a7,
-0x5d401a3f,	0x33354c44,	0x50b4d9dc,	0xe359505e,
-0x2b6ed0ee,	0x53aed5a4,	0xbd41d513,	0xa02f7959,
-0xb2a5eab1,	0xbe11b48e,	0xdf7f3024,	0xc6bb2abf,
-0x51399983,	0x4edd217c,	0x0510bb05,	0x065ef8e7,
-0xdc255b1a,	0xc175a79e,	0xfad1b360,	0xb01faec8,
-0x561766d8,	0xd8b688d6,	0x665ae094,	0x4723dc8c,
-0x772aaa08,	0xebef217b,	0xc7d538e1,	0x7164cb3e,
-0x2de6153d,	0x5f204777,	0x4e22d120,	0xbdf2792a,
-0x39123d27,	0xe965ab45,	0xd40327b5,	0x4d275cdb,
-0x4afc642b,	0x31f24023,	0xdc972aaa,	0x653c9cd5,
-0x02a6b933,	0x06a32610,	0x07560903,	0xc8822566,
-0x4a524c27,	0x0dc417a2,	0x3c34ac25,	0x933c6ad3,
-0x9f8518b3,	0x9d1f3635,	0xd9d3304f,	0x60e26930,
-0xb42a7f81,	0x00cbeeff,	0x08397da3,	0xb0aad0cd,
-0xa65f19f0,	0xcc47dda2,	0xa32140df,	0x6599d951,
-0x658f5d23,	0x39b4264b,	0x07cb489d,	0x00efe525,
-0xc405cdf5,	0xaf85ad8b,	0x08fbfbb1,	0xe5f34a87,
-0x24bad177,	0x875c7bb6,	0x3773b3a9,	0x6b1d3327,
-0xe5a5174d,	0x769517b5,	0x3cecf45f,	0x3051eda1,
-0x6f4d61e5,	0x1a0e0709,	0x6a7e72af,	0x46ec1dd2,
-0xb9d3afc6,	0x2cc8ac4c,	0x230af233,	0x195043cf,
-0xa02e1518,	0xcc7b6115,	0xacbcbcc2,	0xb33f7b98,
-0x6edda462,	0xbb330186,	0xdf01879e,	0x0b481a98,
-0xce36297e,	0x23c07f85,	0x4cb47367,	0x5dac5ddf,
-0x929dfaa5,	0x58802592,	0xdb378b6e,	0x7b505e3d,
-0x7e2e8c91,	0x3d6b96e7,	0x5b82f891,	0x9c9b2a91,
-0xe745ab2a,	0xbc75cd7b,	0x13550fed,	0x908b3b9f,
-0x638c9a0c,	0x73b0cd23,	0x2bc2a520,	0x3d6bdcf1,
-0x2a6d650a,	0x51f96a5a,	0x5d162bc9,	0x3527cdbd,
-0xec8860c2,	0x2625e87a,	0x2d88cdcb,	0x9a49b134,
-0x90b871bb,	0x46503f0a,	0x794ec752,	0x2271c4c5,
-0x097279e6,	0x3b1c3b20,	0xd7cf47a4,	0x21d1c246,
-0x9267eecd,	0x57a91fab,	0x28642c9e,	0x24a34f67,
-0x8eaf1cab,	0xd2357539,	0x114dda79,	0xbae9d4f9,
-0x70f35b0b,	0x96cedfbd,	0xe56d151f,	0x02985775,
-0x1942c626,	0xca26e101,	0xe42bcefc,	0xde9fb138,
-0xe0c3bd9a,	0xb0c56071,	0xee5bc46b,	0x21020e85,
-0x3e7e55dc,	0x7eac5bdc,	0x2eb99a45,	0xbb4f367f,
-0x27273bd3,	0x2edba4f8,	0x647244b6,	0x6435fe98,
-0xf10b0869,	0x616a689d,	0xf06318d5,	0x27e97290,
-0x4f3e62b6,	0x9892ec7d,	0xc93e6e3e,	0x9ddef56d,
-0x1a67e9b6,	0x9f0658e4,	0xa8d73f65,	0x3f67d89a,
-0x84390631,	0x6699db59,	0xc772a467,	0xf0df9e0c,
-0x5e493d2f,	0xe922e48a,	0xe11d9b6d,	0xcf825a6b,
-0xfbbbae6d,	0x610ecd9d,	0x5dbf5466,	0x2106ac59,
-0xfb74983b,	0xfc83ba77,	0xbef9cf32,	0x3ce1c086,
-0x157d5021,	0x361abad2,	0x5c2ebdc4,	0xdeb283f7,
-0xa545bacf,	0x617edda0,	0x8e1e8edb,	0x45f02d78,
-0x99891b5e,	0x1b467a4f,	0x7c8efb94,	0x4300a286,
-0xe529db22,	0xfd3726cd,	0xff541cd1,	0xf62ddfb5,
-0x2dc1d333,	0x26a1ca1f,	0x1457c996,	0xbf742fda,
-0x12dd7fd5,	0x5de275ea,	0x7e5bfd23,	0x4d3afe35,
-0x4ad09e7d,	0x0f2d884a,	0xa4cc9f31,	0x3f642de6,
-0x91b187d4,	0x2e1c24ae,	0x76b43c0d,	0xa5d8119d,
-0x50949ef2,	0x2e66a03c,	0xd1ce29d8,	0x1e8aecf2,
-0x0ecddd96,	0x85a7b862,	0x203f0647,	0xa50df33d,
-0x3b642f1e,	0x326f3edb,	0x0668a65d,	0x6a2848a8,
-0xae6dc17c,	0x2920d2dd,	0xbc8e71c0,	0xc9980cce,
-0x9b72c039,	0x720e793f,	0xe5d97d25,	0x51ec93c6,
-0x0d05c915,	0x81d0357a,	0xaa7602c3,	0x98527424,
-0xdb19a443,	0xc60b0035,	0x3c931fc9,	0x799c78d5,
-0xc876b63c,	0x1023ded3,	0x71b6302f,	0x922738b5,
-0xd1ba98af,	0x7a68da81,	0x94cf182a,	0xac3c7096,
-0xa3e7ba74,	0xcf16b0a0,	0x54ebceca,	0x3438ef1e,
-0x322ad7cc,	0x1187bdb3,	0x2a773837,	0x59bed8de,
-0x2de08240,	0x77f31676,	0x439da358,	0xacbda2e0,
-0x0e510125,	0xccee51e1,	0xf37aebae,	0x44f3fa95,
-0xa737688c,	0xe5c2635d,	0x7b73d000,	0x2c29aa6a,
-0x143f41d3,	0x1c5b9f66,	0xc8d39eaa,	0x31a46883,
-0xdffb2ff9,	0x9649d362,	0xb3b0ce2a,	0x38f30f5c,
-0x6a2ef3a7,	0x6521e8a4,	0x7f0c23ba,	0xf50d857c,
-0xbe208e70,	0x2267c3a2,	0xf4cb3b59,	0xe7320643,
-0x8c40d62c,	0x47c0f73b,	0x79a81df1,	0x4bc995c9,
-0x22fbdebf,	0x7d3d2140,	0x251cdf70,	0x98ae7c3d,
-0xbc1091e0,	0xecf5b270,	0xa7e6481d,	0x616041e7,
-0xbcd520cb,	0x9f9b3504,	0xd2587397,	0xbaabd954,
-0x8a5be0f8,	0xb3aebea2,	0x7bd23055,	0x5da84cd9,
-0xe18cbd98,	0x7578bc03,	0x91139ebc,	0x95f47022,
-0x0bf89d26,	0x8840e640,	0x64f05a83,	0x19e4bbd8,
-0x6d692db5,	0xd365d778,	0x404e2c29,	0x9e5beb17,
-0x907f8164,	0xceae0c0f,	0x5183fe28,	0xab1dc0d3,
-0x073bc707,	0x39ba58cd,	0x2ebfb51c,	0xe5739667,
-0x5299eb88,	0xee95378a,	0x5755a4d3,	0xd94ec160,
-0xc1f9e441,	0x048073dd,	0x3ac849ad,	0xccf21d91,
-0xf4e708b1,	0xd7987ccf,	0xc7f7828e,	0x797cc29f,
-0xa34eba7c,	0x6783af5f,	0x82e4e461,	0x0cc5c1e1,
-0xbaacc272,	0x8d0815fd,	0x03d4ecd2,	0xd6c139d3,
-0x130d703c,	0xc815e185,	0x7e1e0ca7,	0x191c84fe,
-0x30aa28be,	0xb9711c38,	0x736c3f74,	0xc7d3f4e9,

cpu/intel/model_6fx/microcode-m086fbBB.h

diff --git a/cpu/intel/model_6fx/microcode-m086fbBB.h b/cpu/intel/model_6fx/microcode-m086fbBB.h
deleted file mode 100644
index a7d9f61..0000000
--- a/cpu/intel/model_6fx/microcode-m086fbBB.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m086fbBB.inc  */
-0x00000001,	0x000000bb,	0x10032010,	0x000006fb,
-0xe7fbf398,	0x00000001,	0x00000008,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x000000bb,
-0x00000036,	0x2a000000,	0x20101002,	0x00000301,
-0x00000001,	0x000006fb,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x84d7de29,	0x8154e0da,	0x2ad08a76,	0x21579689,
-0x46e8c3cf,	0x19314570,	0x4ceed8ac,	0x5891a4da,
-0x58d10d9f,	0xb7f2421d,	0xe4d5fcf1,	0x02889a15,
-0xad9bed07,	0xa32ab3e6,	0x3491afcc,	0x9c991c37,
-0x2a1c2071,	0xf066191a,	0x3bd898e7,	0x2648d958,
-0xc05f7908,	0x05864b9b,	0xbe4c1eee,	0x1e6c7ef4,
-0x0e7a539e,	0x100b2ab3,	0x1273dceb,	0xfec8847d,
-0x8f37946f,	0x634e3b5c,	0x691dbd61,	0xd89e3cb9,
-0x094639d4,	0x7d972e1a,	0xd6dbd94d,	0x2001c3ec,
-0x34f791f0,	0xeee0d794,	0x88b7459d,	0xc2c73aa3,
-0x607a174d,	0x4f0f8304,	0x65790b35,	0x00532bfe,
-0x1fd1e0cc,	0x7b91f873,	0x154ed42b,	0x7a7108e9,
-0x81637c95,	0x192cb173,	0x28ccd94e,	0xb9bcc372,
-0xac05171b,	0x867f47da,	0xf8e8c47d,	0x1edcdb4a,
-0xd2ca6c2d,	0xe9ee9169,	0x5a6efedc,	0xb6825038,
-0x09277eaa,	0x2a34e580,	0x0f794366,	0x86c99402,
-0x211b98bf,	0xdf8eb0e3,	0xda11d7bd,	0xd440363e,
-0xa7d49f1a,	0x16dd7395,	0x5b23c2fc,	0xab93ea3c,
-0x00000011,	0xf112a9c3,	0xa4bb682e,	0x58d741d3,
-0x60af7dbd,	0x38b863ba,	0x2a3b61ab,	0x466b095e,
-0xffc5a1d0,	0xb7968035,	0x50b98e03,	0x9d057a20,
-0x89c75e52,	0xb45e8a92,	0xc93387e5,	0xc393bd14,
-0x099e643b,	0x832e4c3d,	0x7786b8e2,	0xca9c7d1a,
-0x0f742bd3,	0xa78b4b24,	0xfea55210,	0xb53de384,
-0x81fd531d,	0xcdf9c1cb,	0x1eed1ffe,	0xfc7e6554,
-0xc5588dac,	0x01f8913d,	0x929f5c40,	0x23283e5d,
-0x963bb76c,	0x856ee9ff,	0xc328fb38,	0xa646ab2d,
-0xfebcf099,	0xf9d532d6,	0xe1d27138,	0x010dba05,
-0xac2984c9,	0x87439c78,	0x22502053,	0xeaa7b37e,
-0xe6d9c59e,	0x49fc20ac,	0x67a4e6ff,	0xb20abe47,
-0xd1e10978,	0xc29b2566,	0xc7bae6ce,	0x5d45c73a,
-0xae5c85bd,	0x750d99ac,	0x8d407ce9,	0x592c8eb6,
-0x69b5405d,	0x9388059c,	0xe2f54796,	0xb1f3078a,
-0x204fd937,	0x864dff93,	0x0bdf1b64,	0x9e4d2bc7,
-0x1ffc5167,	0x3dcb47f2,	0xf3c62d6e,	0x37a0ce15,
-0xa4a428cd,	0x38a07fee,	0x2dbd7c8c,	0x62695cfc,
-0x64279cda,	0xc8a3ac26,	0x908e16a5,	0x1092a2ae,
-0x149cdbd9,	0xe830cccb,	0x375138f7,	0x156fcf19,
-0x11105098,	0x819fd72d,	0xf102b7c3,	0x4142a1ec,
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cpu/intel/model_6fx/microcode-m106f76a.h

diff --git a/cpu/intel/model_6fx/microcode-m106f76a.h b/cpu/intel/model_6fx/microcode-m106f76a.h
deleted file mode 100644
index 88249c7..0000000
--- a/cpu/intel/model_6fx/microcode-m106f76a.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m106f76a.inc  */
-0x00000001,	0x0000006a,	0x10022010,	0x000006f7,
-0x9911aaf2,	0x00000001,	0x00000010,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x467900ad,	0x38137995,	0x56875a02,	0xff45c996,
-0xa6e65694,	0x50239910,	0xd40e99d6,	0xaa81c1b0,
-0x7f6753f4,	0xdf33c1bf,	0xa3f5d2dd,	0x51255f68,
-0xd185980a,	0x8a6c6bbd,	0x56206d2e,	0xd574f7ea,
-0xab0039ec,	0x7d979417,	0xc886c0ae,	0xac9f89f0,
-0x05c980f4,	0xe9304e5b,	0xf101387f,	0x0ff35cf1,
-0xfa7af25f,	0xd8982e54,	0x2c6e66a2,	0xf52a98fb,
-0x7c463009,	0x03a62c8a,	0x3d62b7d0,	0x6aba4ed3,
-0x63710e97,	0x0c810355,	0x5f6e2a8e,	0x66215303,
-0x9a67de8d,	0x7d69da22,	0x8644304f,	0x94b0f909,
-0x38814d11,	0xade3d3bd,	0xa1e437b5,	0x3a520f8e,
-0x1535edd7,	0x8c3053fc,	0xc86bf30a,	0x12e16f6d,
-0xfa8ea835,	0xc97ce663,	0x142ac49b,	0xd9f8a8a1,
-0xeb81cd91,	0x3f176047,	0xd6bf3ad6,	0xe15afea8,
-0x3e6fcdb5,	0xf773c0c4,	0xc5c06705,	0x3b19d195,
-0xc6b6c86f,	0xe76d0f45,	0x2298f0e0,	0xc3bfb0f7,
-0xc626a77f,	0x2f998c16,	0xee25f7e6,	0xeb9f6f6f,
-0xebb8e9f7,	0xc1a27a12,	0x2b5a8783,	0xe43daebb,
-0xe021ddff,	0x0bd9c080,	0xf7f51900,	0xe4e23ea1,
-0x38341c94,	0xdbbc9ec6,	0xd057e4b2,	0x3f9087c4,
-0xe0836a7e,	0xfbab954a,	0x20cb1cfb,	0xec44e02d,
-0xed064a13,	0x0dd2ba59,	0xe7910f97,	0xe3bd2ff7,
-0x0f42cd09,	0xc5693dea,	0xdabfa55b,	0x0b37cdaa,
-0xfdab5e9d,	0xfa629a43,	0x4d7e04a6,	0xef7721ed,
-0x969c8f94,	0x731c9ad6,	0xd97315a8,	0x9c0fc269,
-0x6c5bb8d4,	0xf0dfa788,	0x9ed34221,	0x64a19420,
-0xfeb3dde8,	0xb4aac191,	0x703c3a68,	0xffaa4126,
-0x81a11023,	0x527d6594,	0x953e0bdf,	0x89d309c7,
-0x706552d8,	0xb319a8e5,	0xe72b29c5,	0x74a17f01,
-0x7469d5f9,	0xc3c82f69,	0xb43bbb5a,	0x7b9684b3,
-0xcc521bc4,	0x957ea566,	0x4e5089c6,	0xcb43c097,
-0x9a88374a,	0x6a2b75f0,	0xdc8be721,	0x96417d2c,
-0x425ea1f5,	0xd83c7c39,	0x99ef90c4,	0x6b942bf9,
-0x1a38e4b1,	0xb8768f7d,	0xef3bc621,	0x130bdcd0,
-0xf320a161,	0xc9d19f54,	0x1b0f921f,	0xfa173f7c,
-0xd8bf4ba4,	0x31784a00,	0xfdd3b782,	0xd9f29e65,
-0x2fca2b6b,	0xd98178bc,	0xf3c7c83a,	0x2c9fd971,
-0x3b457c52,	0xdfdbd7ed,	0xcee1e271,	0x3cd258fd,
-0xfe8414a6,	0xc7ff14a0,	0x0f777bf6,	0xd4078c2c,
-0xfaa46ab2,	0x217857f9,	0xdeb1fd27,	0xf95ff110,
-0x2d696863,	0xdfd1b233,	0xff0b0fad,	0x2a779904,
-0xdaab3743,	0xf92ddd3d,	0x651d7a49,	0xcbf75de8,
-0x90bee476,	0x5c136996,	0xf2c6e6fa,	0x96fbc745,
-0x6c4afb94,	0xdaf21aaa,	0xda6afd90,	0x6c201765,
-0xd2ecb5ee,	0xd1f04c0b,	0x38037c3d,	0xfc2529ce,
-0xe8f7cf93,	0x1215d824,	0xfcbb5531,	0xebcfb824,
-0x1db0706e,	0xde4516f9,	0xf3603b4f,	0x111300ec,
-0xc7632db7,	0xde38178a,	0x7f8527ac,	0xdb7ebd67,
-0x90695cad,	0x61c29861,	0xfb41797e,	0xba145aea,
-0x68744bcc,	0xd7722657,	0xd6c3e32e,	0x7c751560,
-0x94d4981a,	0xc2b530fd,	0x588be7ba,	0x955c8ce7,
-0xc142c441,	0x540814da,	0xbf0a8009,	0xdd725d00,
-0x528f28f7,	0xa4efcb57,	0xf0d6816f,	0x75247184,
-0xa83a9e3f,	0xd9e23ae7,	0x332a6b16,	0xb7ce76ff,
-0xb3300aa2,	0x2f385af4,	0x92b7ab48,	0x9b061b31,
-0x25543cec,	0xb7f6802f,	0xdb8fee9d,	0x32adf93c,
-0xd529ded1,	0xc74e0a48,	0x1cba55c0,	0xfdd9984a,
-0xc545d97a,	0x3a1b5e8d,	0xb5e96bf0,	0xd81d0c49,
-0x5af79a7a,	0xa03aba1e,	0xfee63088,	0x7cedce60,
-0xaee8cd08,	0xde99d9e1,	0x7534b44f,	0xa3b38aa4,
-0xd531b401,	0x767658f3,	0xae20c30f,	0xfb861670,
-0x7e41afa4,	0x860919f1,	0xf96f8cb2,	0x795c56e1,
-0x895cf6a3,	0xfe3db059,	0x76449fce,	0xa109eb6d,
-0xfb236091,	0x5ec3e406,	0xae727227,	0xf3ebfeeb,
-0x5da08e88,	0xa9c528ef,	0xfbfdeeff,	0x7c002344,
-0x6592efb8,	0xd56778e2,	0xbffcae86,	0x6357f2e1,
-0xf6b66a36,	0x999e43f7,	0x7e5401c6,	0xf8da55a9,
-0xe5fe7540,	0x5a995ae8,	0xadf7455f,	0xe54c0153,
-0x4a25a1e8,	0x85fcdd7f,	0xc0d2fd41,	0x4dbab13c,
-0xa5569b27,	0xe1e6e33f,	0x20d2308d,	0xb340b0f4,
-0xae132ad1,	0x17c027c9,	0xa187fbc4,	0xa2e1fc77,
-0x85947d4c,	0x80665121,	0x0b40e119,	0x98cb1f57,
-0xa83ea3d4,	0x1cfd9756,	0x9c4fb97e,	0xc171df91,
-0x16da9798,	0xf912ea52,	0xe87c78ee,	0x1f7d9a96,
-0xb06a25d3,	0xee67d526,	0x6de442a7,	0x9e1fc5b2,
-0xf22dde11,	0x4ffb6394,	0x9c099dc2,	0xf3450821,
-0x54680f36,	0xbfde3715,	0xeee3c9b8,	0x5fde38d6,
-0x9e2d43b2,	0xcafe0f04,	0x45cbb6a9,	0x9e9adcf4,
-0xdb1e6605,	0x40dd6cab,	0x8547565f,	0xfd8356a8,
-0x5d406ce4,	0xa49896c2,	0xe53854a5,	0x57587912,
-0x81f4383d,	0xefc917b8,	0x73be9606,	0xaf9910a7,
-0xdd46562b,	0x5c704155,	0x8ff48ef2,	0xd639651c,
-0x59022602,	0xa612d777,	0xc714df51,	0x5b0be096,
-0xb98e057d,	0xe6308419,	0x50fe12a3,	0xb3fa0a11,
-0xe1c70728,	0x7fda9ada,	0xab3d2bc2,	0xeb10be70,
-0x4edc71e4,	0x8138b998,	0x8c945763,	0x4977b017,
-0xc8d93aaf,	0xa69699f9,	0x7126311a,	0xcb682988,
-0x98463fc5,	0x5d1e8d3d,	0xc3b0c3ec,	0x970246cd,
-0x55e32172,	0xc0bf4d41,	0x87018756,	0x7c6fb145,
-0xc5666ac6,	0xabbb1ca3,	0x755fc521,	0xc351f97b,
-0xb1182f96,	0x5e6cf247,	0xe569ff84,	0xb9898eef,
-0x5773e1fd,	0xcd43a8a7,	0xcce24944,	0x4e5dd0d2,
-0xbc91926d,	0xd39fdbae,	0x781362b6,	0x9e9b0776,
-0x02c8fd51,	0x59e2742a,	0x1d46a07c,	0x1762d917,
-0x3cfb6489,	0x0a42f945,	0x065f34c7,	0x1881bd85,
-0x3d5fabda,	0x2ed6169f,	0x249a76db,	0x28be1c03,
-0x3a384209,	0x1863ce4d,	0x1053f896,	0x38eda520,
-0x30fabde9,	0x394b43f9,	0x0346e58a,	0x37389cb3,
-0x15d0fdf8,	0x29c594fd,	0x2b844453,	0x1be6f155,
-0x1f65fed4,	0x0c7d2f55,	0x10d370f3,	0x14a15608,
-0x07544d7e,	0x336c4e5d,	0x272174d0,	0x0043bd76,
-0x38b5ec11,	0x04b4759b,	0x3b34f8fa,	0x3269ff80,
-0x49025f2e,	0x3f90baef,	0x7127e9a1,	0x6271ca7b,
-0x3d1028ba,	0x5d56e2ab,	0x613bf11a,	0x3f4ff929,
-0x5bd625a9,	0x6bc896f0,	0x363183c4,	0x72d3a8d4,
-0x4b651437,	0x1921047c,	0x5c438f32,	0x44de33f1,
-0x3e7bf308,	0x7b2393c8,	0x57938b77,	0x349e8f28,
-0x6e59b36f,	0x73a3289b,	0x1ecd5543,	0x6304510c,
-0x7fac64fa,	0x38d47220,	0x7a658ff6,	0x7bf0f9f4,
-0x1b3ff185,	0x57ac2f56,	0x421f6dcf,	0x1f55c7f8,
-0x75b029fa,	0x68da8367,	0x3f08def7,	0x7849cc08,
-0x6adf4961,	0x19fbf6f4,	0x5c4900d4,	0x6ee55292,
-0x08bda979,	0x57f98bc6,	0x58f94af2,	0x29505e91,
-0xa7714c73,	0x7818edd4,	0xd0bc6104,	0xa5f06560,
-0x6a327033,	0xd56eff93,	0x8c110cb8,	0x4432fcf3,
-0xca96ce30,	0xa991abe4,	0x6926da11,	0xd3806567,
-0x97851a39,	0x500d6865,	0xd1f7055c,	0x916bfd12,
-0x620509b9,	0xfdab4525,	0x82145b4a,	0x69bb6370,
-0xca80e455,	0xaffaaadd,	0x6a3b14b2,	0xcadda778,
-0xc3273ce6,	0x419d0a9f,	0xe2a2e847,	0xc94e558a,
-0x27db9596,	0xe5d7c9bf,	0xc19b7dfa,	0x226dafd3,
-0xc25cb5e0,	0xd549d017,	0x49c30516,	0xcb44c231,
-0xbc366efa,	0x5ce205e2,	0xdb5b45da,	0x9e74dd29,
-0x678d0840,	0xf2aedb93,	0xb0ee577f,	0x6673b353,
-0xddf51766,	0xb99c0106,	0x656a1243,	0xfb21bcbd,
-0xbe15df52,	0x416fff37,	0xbabbdd4c,	0xa4e038dd,
-0x263e8e86,	0xaa0c1fb3,	0x9be89c2d,	0x01b00c69,
-0xbe6653b3,	0xb08136ee,	0x026094bc,	0xb5f1e378,
-0xbc7cb22c,	0x01230952,	0xb0c001c3,	0x9ff6cc39,
-0x2c26d59b,	0x836582bf,	0x9417e914,	0xb728712e,
-0x5af61259,	0x86b23ca8,	0xc4b5fa54,	0x4f1b3b6e,
-0xf22f778a,	0xf595a7e2,	0x39b6ab30,	0xc895fbb8,
-0xb45c4295,	0x1e71039a,	0x8ac7d99d,	0x96e1f963,
-0x305cdd70,	0x31bb9b43,	0xbdf867ae,	0x84ab631e,
-0x76055642,	0xfb283940,	0xc5ce4d0c,	0x332d739a,
-0x905f250c,	0x9b3214cb,	0x56fcab7c,	0xcd748445,
-0x8ae38533,	0x8adc91d7,	0xd171c1de,	0x5b21a33f,
-0xe155bf7b,	0x891a97e1,	0x304c0e0c,	0xb28c36d3,
-0x835cada5,	0x6aa2b21d,	0xbc915992,	0xd93422df,
-0x4f245e34,	0x9105bdb3,	0xf718e087,	0x6e4c6c6c,
-0x8db4a1fe,	0xab306f24,	0x74c3b694,	0xdc06d0e8,
-0xa7c8390d,	0x293a651e,	0xde9c3baa,	0xf580331e,
-0x078779ed,	0x1fa73391,	0xd6b29fb0,	0xc365a048,
-0x3bbfeed3,	0xef02e271,	0xe85602c3,	0x08233e55,
-0x95b34c2a,	0xfa8aa369,	0x783d990c,	0x844731f6,
-0x95484c0f,	0x2621318c,	0xedf2f7a9,	0xcc2a8404,
-0x011be86d,	0x6fb0fabf,	0xe2010cb5,	0x82bd264c,
-0x0180848b,	0x0a886f1a,	0xeed63b9b,	0xea24f41a,
-0x4e65eb79,	0x5d0ebf96,	0xa6d3f1c0,	0xf9781841,
-0x065e84ea,	0xa9dcf869,	0xa918f949,	0x014adfeb,
-0xd7c00654,	0xf5961eff,	0x7b167f5c,	0x8aa0e16b,
-0x8305642b,	0x7e9ac948,	0xf0786018,	0x86e2d609,
-0x0e655ba9,	0x9bfc718e,	0xf9e5d4a1,	0x6935cc03,
-0xe55b063a,	0xfcd46a75,	0x1db444af,	0xe9ac0c5e,
-0xfb6bca84,	0x1e54c8f3,	0xec5d1e75,	0xf110aaf2,
-0x1dfed11f,	0x8b86c98b,	0xf1106794,	0x87cc12fb,
-0x82c4b867,	0x3cbe8cb6,	0x8d7fd9df,	0x41382210,
-0x34717cb6,	0x59cfafd9,	0x4d0fce18,	0xec5c2e40,
-0x56ff68d9,	0xb6ba95e2,	0xe74de373,	0xa9a0abc7,
-0xb1058df3,	0x87b21c0b,	0xa436577c,	0xd729aec7,
-0x8abea59d,	0x60147adc,	0xd18be0bd,	0x72ebe878,
-0x4fbc81f6,	0xb213152b,	0x5b148454,	0x1de9e9bb,
-0xb1302af5,	0x6cd7738a,	0x18bb8c58,	0x8c6a7111,
-0x65c06cca,	0xe2171813,	0x850e9ed0,	0x9ff21291,
-0xe6e74dee,	0x4bdb99ba,	0x9a3c6aa1,	0x4ad15cfa,
-0x2b2cec1f,	0xd50d3dd0,	0x23d4f65b,	0x01753fab,
-0xdab7ae3b,	0xc5b60f52,	0x031255c9,	0x3349eb6c,
-0xca894813,	0xfbe29df5,	0x3bcb4d51,	0x33dd1c23,
-0xf5e58f7d,	0x98ca49c6,	0x3427a25d,	0x54b0e657,
-0x9fa05130,	0xc0a78e14,	0x5726c729,	0x626eddd3,
-0xc7300d11,	0x210ac1e2,	0x61ca285a,	0xb59d217e,
-0x258b84c6,	0x0094edf8,	0xbb65edab,	0x4929fee9,
-0x0d8e85a1,	0xadd10473,	0x498cf830,	0xe54006a7,
-0x57744ea7,	0x44d79b45,	0x1b6f404e,	0x5a47604f,
-0x731ccf5c,	0xa1dc8f68,	0x6d541762,	0xc0a610b1,
-0x66ab9ec8,	0xb6101475,	0x081c5b64,	0xb773bb0e,
-0x6bc3c7d3,	0x19552503,	0x6f115809,	0x7bb54967,
-0xdd1f50d9,	0x6c5549b7,	0xb1489ffc,	0xd13cd9a1,
-0x70a70248,	0x88d270cc,	0xc77e059e,	0x45d1599d,
-0x494f5fe7,	0x9e9f4796,	0x88880c65,	0x19a78899,
-0x48f717fe,	0xbc5beafb,	0xcac443f4,	0x7615ae5a,
-0xe0f97ce3,	0xc186d276,	0x254fa6c9,	0xe1aa0be5,
-0x3838cfd4,	0x1f29b320,	0x17476863,	0x053bd0ad,
-0x8b43749e,	0x649b7510,	0x9332ebe7,	0xf7e889b0,
-0x35d41705,	0xb79ec634,	0xa909c026,	0x11f810b3,
-0x9011c6a8,	0x8010da65,	0x389c5169,	0xb6d68b7d,
-0x290833db,	0xd13371e4,	0x170e3b23,	0xca769fb2,
-0xf6836f23,	0x7733243b,	0xef6f831b,	0x9501fe05,
-0x2bb2bdc4,	0x304ca4d5,	0xc0b0a7bb,	0xf08b938e,
-0xac52c602,	0x515f0e6f,	0x61f0d676,	0x3f92c984,
-0x8a4bb49f,	0xee9cfeca,	0xe1184181,	0x005c72f3,
-0x3ae2bc1e,	0x50631f7e,	0xd18021cb,	0x8d5b9362,
-0x71fd63ef,	0xdbcb9d68,	0xa435dd9d,	0x7e50217b,
-0xe7d9fd19,	0xa8cb6ee7,	0xd71618ac,	0xc87934bd,
-0xe96101d1,	0x55d1976c,	0x471c8505,	0x7a36d839,
-0x5d62a9ee,	0xf3c54a8a,	0xa2be15d9,	0x244087c9,
-0x042c8037,	0x23224689,	0x281c5d73,	0x2139ecfc,
-0xffb8bc8a,	0x834fdd11,	0x9cd5a5bd,	0xa3368319,
-0x7e5bef0c,	0x4ae2dbda,	0x86d90089,	0x6675dfce,
-0x48876262,	0xcec72538,	0x11dc5c80,	0x86a730f9,
-0x313565c9,	0xe3e5be11,	0x106d7cce,	0x752b8be2,
-0x3d00a5bc,	0xe6f70e95,	0x44447ac8,	0x600df30c,
-0x8335ac3b,	0x8816ddee,	0x700982fe,	0xee495741,
-0x48c7e81c,	0xa3d55da2,	0xb0172982,	0x70ab2158,
-0xd4460621,	0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,
-0xa8454763,	0x70877bb6,	0x66005c97,	0xaf292c06,
-0x7b843db1,	0xf343b59b,	0x25cdc7b5,	0xa41da617,
-0x9e9d895e,	0xc936f475,	0x7270925a,	0x30024230,
-0x8e72f53d,	0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,
-0xfc18a2a3,	0xaf377cc1,	0xbff09a78,	0x4b4e0814,
-0x95a0b2c1,	0x270398de,	0x201fca94,	0x2a032a4f,
-0x131542b4,	0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,
-0xa814ddc9,	0xa3b3a991,	0x17ee60c2,	0x852c0b8d,
-0x11e5853a,	0x762002a7,	0x92c5311d,	0x0d4bf7e1,
-0xfffec870,	0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,
-0x0111a772,	0x9808e780,	0x29c336e8,	0xe9bc05df,
-0x5bedde11,	0x945565af,	0xaff808fe,	0x87e3423d,
-0x4de6f98f,	0x93b4adef,	0xbf704fa4,	0x09120e91,
-0xd54f3692,	0xdf8eab1e,	0xfabbf59c,	0xe74318be,
-0xaab87ffc,	0x29fa791c,	0xe3915552,	0xa652cb9b,
-0xa1252e74,	0xb35b723b,	0x542aa28b,	0x12fcc5b0,
-0x3941f962,	0x82bcc6cc,	0x47b11974,	0xb821611f,
-0x78b34250,	0xf1be5659,	0x561b9e61,	0x6f3bd501,
-0x584e6f5c,	0xd54ed547,	0xacebcd21,	0x7b5ff816,
-0xb64ad233,	0x9f2f330d,	0x69fb1ece,	0xac8710dd,
-0x58dc6c60,	0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,
-0xebc0ce9d,	0xa733274f,	0x884d9b55,	0x42b08b63,
-0xafa54a74,	0x1c7ccf64,	0x93a20191,	0xaaa3132e,
-0xc69831d1,	0x54634889,	0xfbfe3efc,	0xd3cf68d4,
-0x302e3117,	0xf5693131,	0xc3ce8c6c,	0x1f03cd89,
-0x6243334c,	0xf16bc80f,	0xdca5f130,	0xcb2cd956,
-0x4c1bb421,	0xe8de533c,	0x7f86703a,	0x29aa897e,
-0xdd54acad,	0x76b2f2ae,	0x7ef82b71,	0x2e30970b,
-0xba402597,	0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,
-0x7f9efd1c,	0x2363d147,	0x5327289a,	0xe89229f3,
-0xd63a535c,	0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,
-0x26b6edfb,	0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,
-0x6d65db4c,	0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,
-0xe20e6dbb,	0x8488a45f,	0x8ebc2932,	0xd4767316,
-0x3e8c4b8a,	0xbab7402c,	0xfc1e217e,	0xe5c5bf82,
-0x6928fe2e,	0xc88528e9,	0x4b2e4e8f,	0xdd938b86,
-0x0c964f98,	0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,
-0x197d005a,	0x4d40b3b3,	0xcf203155,	0x0d2fa621,
-0x752d2c58,	0xb12bac12,	0x1e7e8c23,	0x94215d54,
-0x9854a71c,	0x4de63c64,	0x7a012529,	0x9c171f8d,
-0x9e71def7,	0x3bd17d50,	0x11f175d9,	0xec78abf3,
-0x7b529eee,	0xd3a69fc3,	0x5b718676,	0x58214d29,
-0xa8bd2c34,	0x41ea00ab,	0xa03f64d6,	0x4ee342b0,
-0x32b1e444,	0x1c1801a4,	0xc8424702,	0x334a7e35,
-0x50cf1543,	0x3b22b495,	0x88683776,	0x8e2e0154,
-0x6155c033,	0x4e2fa6ac,	0x42ace700,	0x8d64f97c,
-0xaf9ced17,	0xb2a5cb92,	0xa558582d,	0x88705de7,
-0x9e528d59,	0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,

cpu/intel/model_6fx/microcode-m106fbBA.h

diff --git a/cpu/intel/model_6fx/microcode-m106fbBA.h b/cpu/intel/model_6fx/microcode-m106fbBA.h
deleted file mode 100644
index c40ce9b..0000000
--- a/cpu/intel/model_6fx/microcode-m106fbBA.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m106fbBA.inc  */
-0x00000001,	0x000000ba,	0x10032010,	0x000006fb,
-0xed247070,	0x00000001,	0x00000010,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x000000ba,
-0x00000035,	0x2a000000,	0x20101002,	0x000002f1,
-0x00000001,	0x000006fb,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x21d97964,	0x9846e570,	0x1d30fb85,	0xb909572f,
-0x88a15af6,	0xcff6f5d8,	0x01ade078,	0x72eac781,
-0x58d10d9f,	0xb7f2421d,	0xe4d5fcf1,	0x02889a15,
-0xad9bed07,	0xa32ab3e6,	0x3491afcc,	0x9c991c37,
-0x2a1c2071,	0xf066191a,	0x3bd898e7,	0x2648d958,
-0xc05f7908,	0x05864b9b,	0xbe4c1eee,	0x1e6c7ef4,
-0x0e7a539e,	0x100b2ab3,	0x1273dceb,	0xfec8847d,
-0x8f37946f,	0x634e3b5c,	0x691dbd61,	0xd89e3cb9,
-0x094639d4,	0x7d972e1a,	0xd6dbd94d,	0x2001c3ec,
-0x34f791f0,	0xeee0d794,	0x88b7459d,	0xc2c73aa3,
-0x607a174d,	0x4f0f8304,	0x65790b35,	0x00532bfe,
-0x1fd1e0cc,	0x7b91f873,	0x154ed42b,	0x7a7108e9,
-0x81637c95,	0x192cb173,	0x28ccd94e,	0xb9bcc372,
-0xac05171b,	0x867f47da,	0xf8e8c47d,	0x1edcdb4a,
-0xd2ca6c2d,	0xe9ee9169,	0x5a6efedc,	0xb6825038,
-0x09277eaa,	0x2a34e580,	0x0f794366,	0x86c99402,
-0x211b98bf,	0xdf8eb0e3,	0xda11d7bd,	0xd440363e,
-0xa7d49f1a,	0x16dd7395,	0x5b23c2fc,	0xab93ea3c,
-0x00000011,	0x3e547655,	0xa3c23fd3,	0xc4b7878e,
-0x8783318c,	0x52cc22bf,	0xaf347896,	0x54342107,
-0x72c7bb6c,	0x3e13b80d,	0x46bc1a33,	0x23cfc252,
-0x0d4ef13b,	0xc21dc600,	0xdb9ec613,	0x0899f190,
-0xafbb3213,	0x0652ed0a,	0x739aaabe,	0xa4d1ce13,
-0x0fb0b628,	0x1270dc1a,	0xb6d7833f,	0x6846a946,
-0xbc8adbe3,	0xb9f43c78,	0x2008edcb,	0x5a9c34a8,
-0xb38931a2,	0x0c0a82a8,	0xf1e458a2,	0xa20645df,
-0xcb6bb4ee,	0x85c91f0c,	0xed3e330d,	0x76c74422,
-0xdde7d6a0,	0x0af339f8,	0x1a7c4dbc,	0xe79f6e3a,
-0x73b720c9,	0xe1e83952,	0x686f7729,	0xf1925af1,
-0x2b154459,	0x1c540322,	0x5ec2fc7d,	0x87597cd3,
-0xb2031f29,	0x94589a6d,	0x55c3330e,	0x33af7895,
-0xedd71f83,	0xa5a11a4a,	0x4bc706ed,	0xf6f04df1,
-0x724cad51,	0x0a677c56,	0xd0356d3b,	0x6068e86c,
-0xd74f070f,	0xc07b0e3a,	0xa0b98d7d,	0x0041181d,
-0x79266ba5,	0x3ff83201,	0xd1b327ee,	0xaf55f568,
-0xe936acaf,	0xaa5dca57,	0xdeae2b1a,	0xd6643058,
-0x389cec0d,	0x7e524e3c,	0xb0b13d46,	0xbe0722c4,
-0x4fe4f260,	0x6569767a,	0x4ded63fd,	0x03474b65,
-0xe1875127,	0x328e6736,	0x2166cb67,	0x50ee94e8,
-0xd0a26ea2,	0x9751ca79,	0x22c0a65f,	0x5c458980,
-0xe9b9c62f,	0xa13221b6,	0xb43292db,	0x36e2b143,
-0xff8ba502,	0x3f42d32d,	0xd043d05c,	0x77bd8a19,
-0x9a652b71,	0xaae1b2d0,	0xe490085a,	0x181145c7,
-0xbfc061c4,	0x18bfd9b0,	0x22b830b4,	0x5201a02d,
-0x5651bc35,	0x535005f8,	0xcbe674e1,	0xe78d03ce,
-0xc52d0fa2,	0xc8b78a1f,	0x1b694c97,	0xce0e7567,
-0x0f2229de,	0x98c847cc,	0xe68554d7,	0xf9864b16,
-0x3cc47a83,	0x941221d2,	0xcc3a7ef4,	0x0170bb22,
-0xc9053a4b,	0x9c7721de,	0xed941a9b,	0x8be05de7,
-0x2f42fd5e,	0x36b0a67f,	0xb306a1f5,	0x34abbc36,
-0x24c17625,	0x6a3de329,	0x01988238,	0x066a1868,
-0xafca471d,	0xd2adc39b,	0x813525b3,	0x00a0acf5,
-0x2aa361cf,	0x4dbe173e,	0xdaf77894,	0xaa889ded,
-0xa3697b54,	0x80d26705,	0x0c2da0f3,	0x58a4b8a4,
-0x39cc0d4e,	0x3c9d4670,	0xd2b5d20e,	0x2724e973,
-0xb1351d5c,	0x20906d79,	0xe24891e5,	0x2035c218,
-0x4e0139ea,	0x56be6bd7,	0x083b0550,	0xbb402759,
-0xfd95c78d,	0x9fb7daa5,	0x60175f4c,	0x32446eb0,
-0x5021b32b,	0xa772bf99,	0x377195f7,	0x442fb939,
-0x4425cf3f,	0xd0413035,	0x515c39e8,	0x869ee778,
-0x8d4c2561,	0x826a5d49,	0xba1d315e,	0xd850a5b1,
-0x3241090d,	0x4bc25949,	0xa08b2d5e,	0xb69c0931,
-0x7c510465,	0xffb294e3,	0xbd919d03,	0x591938b8,
-0x66fce51e,	0x1da2e975,	0x513c2611,	0xd2c89b3b,
-0x55fa8777,	0x7287353f,	0x0e53d7f5,	0x409d5772,
-0x2db94ea8,	0xde0e9927,	0x8a1e2ac7,	0x1f7ec493,
-0x61089e93,	0x6abe868e,	0xc0df9a96,	0x4436a57d,
-0x0c48c8b0,	0xa247ee28,	0x141d6787,	0x1b12b920,
-0x2e21a991,	0xf0ff3f1d,	0xab4b5b32,	0xc0a0ca68,
-0x430e80d8,	0x8d74a965,	0xb54d5f63,	0x5d68e9e4,
-0x6b548ee8,	0xf047d59a,	0x3b4789f9,	0x21b5069c,
-0xf913817b,	0x732e9a9d,	0x2874cc28,	0xa9627bc0,
-0x6fdb58d6,	0x13587cf9,	0x39ce92e1,	0x36b9492d,
-0x5408f555,	0x8ffe55ba,	0xb43c9df5,	0xfac29337,
-0x56cbe2b3,	0x0185d1ed,	0x9be346e7,	0x40a19df7,
-0x3c1a2895,	0x4d26af1f,	0x45a55ab6,	0xa842ab52,
-0x1f747d77,	0xe0d9102c,	0xf971b544,	0x7ee0828a,
-0xfe3c6fac,	0x25395596,	0xc9b47fa3,	0x156ce98b,
-0x8f31e2b0,	0xb6e25664,	0x9640f47b,	0x8ac2d5bf,
-0x840e6610,	0xa97a44b9,	0x3fdc0ea8,	0x06910a51,
-0x2091b59a,	0x9c2e5439,	0xf8842451,	0x3f9a4ff3,
-0x362a0004,	0x12dad719,	0xb2f60dd0,	0xa97a0474,
-0xfa3560c2,	0x7fd81bf8,	0x57f7532e,	0x23486049,
-0xaafefb9f,	0xc66725ee,	0xdb9cd720,	0x63f4e092,
-0xd0a26789,	0x64b0aa78,	0x58af8ea1,	0x585d3712,
-0x1fd2f90f,	0x8e0574b1,	0x50e4b136,	0x2c1dbb31,
-0xc02feb6b,	0xa2714a85,	0x9130f487,	0x4a1253c2,
-0x6bad5346,	0x546c4765,	0x4fd9e206,	0x1e958eea,
-0x9015b920,	0x50328bec,	0x1cb229f7,	0xe68970ce,
-0x6596e986,	0x5bc7ebcb,	0x68a13530,	0x773e1ef7,
-0x705d8d8e,	0x58a4be35,	0xd1b47b52,	0x0c1d7eb9,
-0x94c9bb62,	0x9f8b78f3,	0xeb6f4c67,	0xe1359c6a,
-0xcc9bb75c,	0xc58dbc28,	0x53972a64,	0x1e077ac9,
-0x30b94c6d,	0x85bd7fca,	0x834a8432,	0xa56b0993,
-0xe8298659,	0x75f7aa51,	0xeff8d034,	0x89ff3761,
-0xe5280f0a,	0x62dc4a8e,	0xa3993ac8,	0x71122e79,
-0xd47785e2,	0x34158175,	0x63c8d85b,	0x7ac99eef,
-0xe0bd1e85,	0xd34d96cb,	0xb98776ef,	0x2ced7ad0,
-0x8de1a90b,	0xb91c6986,	0x031585b2,	0x945f0055,
-0xd619c86e,	0xbcd30cf2,	0x4bf7ffbd,	0x723a068b,
-0x19063c35,	0xb1a0bf7e,	0x76712f67,	0xd4a648d3,
-0x2eac160d,	0x284404e3,	0xc8a18a02,	0x2ff33921,
-0x8d56011a,	0xfda7cc43,	0x41e15608,	0xec688d2d,
-0x648eb60c,	0xe67029e2,	0x481e2a28,	0x82748afd,
-0xd243f0e6,	0x7d48b037,	0x8911dd57,	0x9876663d,
-0xdfc8715f,	0xa725ff6a,	0x18ceae0c,	0x571c5836,
-0x017ec3a0,	0x23e2b7bc,	0x8a19e5d1,	0x49f1ad67,
-0x6eb53ff0,	0x70d5e83f,	0x8d587f1b,	0x9fcd1b0d,
-0xb77c9c28,	0x0fa9ffc9,	0x2567087e,	0xd2626fa6,
-0x13a3d9f8,	0x327f16ea,	0xcf6c283d,	0x9cb948d5,
-0x82d61c27,	0xee7df429,	0xdba4362f,	0x873cd73f,
-0x3ea8c681,	0x99914378,	0x3cdb5ad8,	0xaeb85eef,
-0x10100fbb,	0xc99eba28,	0x55f32c4d,	0x676315eb,
-0xe78da6bd,	0x341f250b,	0x0139763f,	0xf9bcdd95,
-0xee95a716,	0x477450bf,	0x0655a8ec,	0x82ba0c7b,
-0x1f8140ba,	0x1ce6ade2,	0xb395d6bd,	0xe420cc72,
-0x00c9379f,	0xd499a95a,	0x04212c33,	0xe02ccdcf,
-0x01ec3905,	0x23d2c3e9,	0x105c1fc3,	0xedf2f621,
-0x0d2e782a,	0x24f4ed1b,	0x8c8e6bfa,	0x43881813,
-0x67bd4cd1,	0x529b5f8c,	0x7dce8273,	0x792b3c08,
-0xd6d49290,	0x141eb20d,	0x90198577,	0x461a9ca2,
-0xe3ce9501,	0xc1888a85,	0x904ce501,	0x04ab4ef9,
-0xfe292a8f,	0x3aded4f3,	0xa9c4673a,	0x384ba9ca,
-0x092f1252,	0xc0464403,	0xcba863b5,	0x509464ba,
-0xe11d075b,	0x26f1c460,	0x167b95ce,	0x4cec6a27,
-0x1d4845f5,	0x4e8a1314,	0x857e5e97,	0xb7195631,
-0x0378dee2,	0xf461bbd3,	0xc8bfc18d,	0x4587627b,
-0x0cb224e9,	0x0332b337,	0x4d566685,	0xbb52863d,
-0x98f4e44f,	0xa504d2e9,	0x6d57f47e,	0x4a015409,
-0xf54d386f,	0x2da77a2b,	0xab04d06d,	0x7bf8ea19,
-0xb0ebc25c,	0x91119128,	0x56c54eea,	0x152f4e23,
-0xa25117ce,	0x99534ada,	0x8842eb0a,	0x3a5dd205,
-0xe97955a6,	0x80950258,	0xb925944d,	0x628b7f30,
-0xb07c3e37,	0xf5c86344,	0x4c36449e,	0xd940801d,
-0x7b3b0da0,	0x16ea7b8d,	0x4a0f4fa0,	0xbd480d07,
-0x82ec44f6,	0x51779667,	0x5bdbb1d3,	0x8deb45ca,
-0x38a66184,	0xfb470fc9,	0x25363fb1,	0xbc129a95,
-0x29d5068f,	0xf517f1bb,	0xf5769dc1,	0x75a0256e,
-0xa6b98e74,	0x2b76fcdd,	0x4de2eb6d,	0x24ed8d53,
-0x1a6cc18f,	0x1736d538,	0xf4b1cbfe,	0xf8922e6d,
-0x70db7017,	0xdb34cf04,	0x3120bfbf,	0xe087fc6a,
-0xae0a91e2,	0x9f2ea090,	0xbc05b13a,	0xc0ed6589,
-0x73ea7422,	0xbabc72c6,	0x4de4ca2f,	0xa9f8d16f,
-0xe4de37b8,	0x353eeb76,	0xdde6b6ed,	0x21d9e183,
-0x7c57e342,	0xf28b9bb1,	0xab7ca9c0,	0x4a085c72,
-0xffb07dd6,	0x63abd7f7,	0x1ae27c52,	0xf77ee0d7,
-0x708b3437,	0x7e2dff0e,	0xb6b319e6,	0x8c84e925,
-0x55087edc,	0x500f35ad,	0xc81640b0,	0x937d864e,
-0x9efa3d5b,	0xf5eebce7,	0xc740d979,	0x62ab9012,
-0x08e825b3,	0xeba1dda6,	0x0052dd87,	0x6d8d8ad4,
-0x4a047831,	0xfcd9bee3,	0x8510f73f,	0xf83c5f7e,
-0x5a09c0f7,	0x95b0eb08,	0x698d240f,	0xa0560b49,
-0xe19b647a,	0xec596c6b,	0xd13d7808,	0xe259263f,
-0x4a6d99ce,	0xbf035717,	0xc410e0c8,	0xebf36b19,
-0x99256c4a,	0x6c9463e3,	0xf4999032,	0x12216280,
-0x3b8d2e40,	0x1bc6337c,	0xdaa5f7e1,	0xa9acb5ab,
-0x6ccb91dd,	0x152fc803,	0x0bcbc7eb,	0xb94d2418,
-0xd65b6f1e,	0x694756a0,	0x14cd941c,	0xa56429e3,
-0x945054a4,	0xd4922be6,	0xd571552e,	0x82b5c823,
-0x668fafe8,	0x2827fdd9,	0x9af3de76,	0x2a5d0078,
-0xf5ae0dd5,	0x223e7253,	0xa0ae4bb4,	0x812bb4ed,
-0x7d2b571b,	0xfa71b182,	0xb0a73540,	0x3ad09e40,
-0xc814ec6e,	0x71a63179,	0x645ac68b,	0x68d1f6ab,
-0x8dad1277,	0x3782a2a8,	0x173335f5,	0xb5aa47cf,
-0x6df9de08,	0xd1175256,	0xe4d4c2f3,	0xaad6edac,
-0xa0dcfa5a,	0x38e7df7b,	0x93e2fbe9,	0xefe7dc23,
-0xef1ec4b8,	0x9b9f7a91,	0x148474cc,	0x03b75bd2,
-0x5210cba7,	0x4a9b1025,	0xebded8fc,	0x7c570275,
-0x3b654b12,	0x484ed1cf,	0xf4765b45,	0x42b55bd4,
-0x33f6be6b,	0x62e0f627,	0x170ad64c,	0xa80f34da,
-0x695c665f,	0x58a7aa98,	0xd51bab9f,	0xc3b18153,
-0x3ce425c2,	0x81977e00,	0x3b692349,	0xcbb9621f,
-0xc7ed3dec,	0x69bb55fc,	0xf68cb3da,	0xa89f69f9,
-0xe9d78668,	0xac0d599c,	0x9338622e,	0xef6a80a7,
-0xcb803262,	0x98db8030,	0xbc0d6a0e,	0xd0406313,
-0x70d22c76,	0xe71a332e,	0xa55ccdc3,	0x8306d4c8,
-0x5a590069,	0x84fcd275,	0xd090c333,	0x61941b43,
-0x05dcb6fc,	0x83302e99,	0x8526a3ca,	0x28217e4a,
-0xeb77a9ef,	0x285993f7,	0x721d0d7c,	0x920ca6d1,
-0x4a707536,	0xd5aedad0,	0xa82d8e14,	0x235d429e,
-0x68deef3a,	0x48508124,	0x39117ab4,	0xcab7d6f7,
-0xe3799e96,	0x0341dc52,	0x9b10cb97,	0xb76cff12,
-0x78cf69ee,	0x7580b0b5,	0xd320eca4,	0x8c8916f0,
-0x8f04862e,	0xfe38abd1,	0x6af5a6f1,	0x66f216ea,
-0x859c936f,	0xa90c4401,	0x8fe63969,	0xc90d9d23,
-0xdfab6b8b,	0x3b9464de,	0xd4ace239,	0xc8a7a433,
-0xcac0d44c,	0xebe91b1f,	0xb4b10e97,	0x54710112,
-0x14a46abd,	0x6dc859f8,	0x2aed77f0,	0x273d89e5,
-0x17a3c103,	0x761102a3,	0xd2491878,	0x18574db8,
-0x42dd690e,	0xa8e72afe,	0x7a65f1aa,	0x901ed923,
-0xafb8241d,	0xe30986ea,	0xf47a2659,	0xa81ec77e,
-0x8a2534e5,	0x88b8a2cc,	0xeaa1925c,	0x659bb838,
-0x803efa9e,	0xa9ce4dd0,	0x1acc5aa8,	0x047e971e,
-0x16104e25,	0x75340f02,	0x1ef59151,	0xd59d05c9,
-0x815bdc70,	0x3317e826,	0xf02214b5,	0x7ef593e5,
-0xf11dd120,	0x2f5af673,	0xb7a36369,	0xde04b6e3,
-0x70a3698b,	0x8a6a7125,	0x49f9a042,	0xe91787f1,
-0x3c4eca64,	0xf07e2e3c,	0x639f7f1f,	0x29f31127,
-0x7ec2c0c0,	0x5ad15e5e,	0x3841a8f6,	0xe92c1f13,
-0xe17428fb,	0x0520dd9b,	0xad7dc436,	0xd0f9ea71,
-0x6af99936,	0xa98ff1fb,	0xea4d63de,	0x14fc27e8,
-0xf0f310e7,	0x81e089fb,	0xcb968a2e,	0x398deb9d,
-0x08dd9475,	0xb93e206a,	0x6e263c42,	0x6a7db788,
-0xbaf2550a,	0xe8b2f1a5,	0x52c429a5,	0x86914709,
-0x151337b3,	0x72b0fc5a,	0xc2c8b2f8,	0x25fdc9d8,
-0x8d277a69,	0x085053eb,	0x53b0eefc,	0xa3174f8f,
-0xd63c8985,	0x9dabc0e2,	0xfec0af7d,	0x93fe2b0a,
-0x77c80d92,	0x22251dce,	0x365ff8cf,	0x8848fa18,
-0xd8d69de1,	0x4ad3cc19,	0x82a61ab9,	0x4f5c14be,
-0x18aee9cb,	0x688b99c3,	0x9989a836,	0xc8ed5c3c,
-0x67f9594f,	0xb429f789,	0x6ec3958d,	0x20700d5b,
-0xc4d93f4c,	0xb117da5a,	0xeb489006,	0x46ac68a0,
-0x345acaec,	0x5fbf7ec6,	0x0250cab0,	0xc6cd7acf,
-0x06c7fc31,	0x875e8d46,	0x3afcfde8,	0x1019d628,
-0xb6e606a6,	0x09b1600a,	0x0c6bf04c,	0x0c363f57,
-0x6cb49893,	0xcc7e67b7,	0xf6acee2b,	0x1c1d5686,
-0xa4aa0517,	0xe2089ec1,	0x2af868d4,	0xc1f88447,
-0xd8302e27,	0xd2110970,	0x99a3fb15,	0xb623834c,
-0xa66ead4d,	0x76339df5,	0xe9f550bf,	0x841fcd37,
-0x3fb5f706,	0xaea711f1,	0x63ca054e,	0x616b9e4d,
-0x46a13dc7,	0xaf6dda31,	0xec4b56a5,	0xa3590ba2,
-0xbabe700a,	0xd7a9b0e3,	0x5795f4af,	0xa4ec6ce4,
-0x4da3178b,	0xb0de3f9d,	0x9d87e82d,	0x8e4351a1,
-0x859d41c8,	0x13a2c468,	0x07afcc0e,	0xf1da5180,
-0xb8829fca,	0xbfe9b071,	0x12b08a30,	0x694b7b44,
-0xd8acd12c,	0x21d16561,	0xcec3605c,	0x2e4767de,
-0xe1dcdd25,	0x53ffe036,	0x1425b454,	0x5ca3a48c,
-0x1f2d956f,	0x83293d38,	0xe552cbad,	0x752d6b53,
-0x164dba6f,	0x42a461f0,	0x9859d7de,	0xf66c3edb,
-0xece40962,	0xa14a6eea,	0xdefb7686,	0xd80ee1ab,
-0xaeb77e49,	0x403e1906,	0x0e51f3c0,	0x5c9f28c0,
-0x0d272689,	0x545beab0,	0x54cdf4b3,	0x904f5db6,
-0xfe9f71ce,	0x9418f3c3,	0x7ee39ce1,	0x0800f2bd,
-0xa2c3d6df,	0x27711007,	0x78dd3877,	0x4297a11a,
-0x2b8eb39e,	0xea70e965,	0x1fb677b6,	0x675e3093,
-0x26da7820,	0x1f56907e,	0x85427150,	0xe6c21bf9,
-0x8299ade0,	0x1adb2cd3,	0x05614260,	0x6d45f108,
-0xcc26813c,	0x29e466ae,	0x9435f2ca,	0x6c98707b,
-0xef50c1ed,	0xf9a34dca,	0x9e1a6c08,	0x3be4d7e7,
-0x1cbc99a9,	0x409c5101,	0x0ae056a0,	0x25e0ee1c,
-0xa2397cbd,	0x8ef74f44,	0x63983a83,	0x4fbfd861,
-0x90f34161,	0x74c1757b,	0xe62046db,	0xe4edda98,
-0x38643fd9,	0xe479426f,	0x3f94a6c8,	0x9b72900f,
-0x7b9882c1,	0xfe4f4b6d,	0x036d4e10,	0x13f2dde4,
-0x64ec547e,	0x4d4289ec,	0x9f266d7a,	0xf8414ac6,
-0x16a6a163,	0x5543e30e,	0x4e5da63a,	0xd237f10b,
-0x18c3e60f,	0x5d3f91f9,	0xd70f4dd9,	0xb4a8cd4b,

cpu/intel/model_6fx/microcode-m16f25d.h

diff --git a/cpu/intel/model_6fx/microcode-m16f25d.h b/cpu/intel/model_6fx/microcode-m16f25d.h
deleted file mode 100644
index 81882be..0000000
--- a/cpu/intel/model_6fx/microcode-m16f25d.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m16f25d.inc  */
-0x00000001,	0x0000005d,	0x10022010,	0x000006f2,
-0x9384a573,	0x00000001,	0x00000001,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0xe32da2e3,	0x0b02d145,	0xf44f9d92,	0x8e379b7a,
-0x6f4270f9,	0x19a2c835,	0xcda45382,	0x74f246d6,
-0x2feb8c1b,	0x4cc03667,	0xb452ba26,	0x9629f921,
-0x76c647d2,	0x9b290b2e,	0xae8abaa3,	0x0ee9d110,
-0x36caf351,	0xd31d8388,	0xcdfefd5c,	0x0c07e711,
-0xac032201,	0xf798593f,	0x0abae9b1,	0xd27ed06f,
-0x7af763f0,	0xd04899e1,	0x02794968,	0x6f911ee5,
-0xa65f5664,	0xe2bad0fe,	0x20fd3ea5,	0x8e80e0e6,
-0xb3a9d037,	0xaef70189,	0x01e60aae,	0x35916cdd,
-0xda9968d9,	0x04b7ba73,	0xeb640ca0,	0x43cf6483,
-0xb9ee837e,	0x40cddcea,	0xc4e0c7f2,	0xd4375d72,
-0x24507f5c,	0x33b59dd8,	0x24af2ecb,	0xf95d623e,
-0x84251660,	0x81c2c5be,	0x87a0eefc,	0xda609566,
-0x98f7b1a5,	0x8b99cf9f,	0x91262115,	0xe1e70b3e,
-0xfd618422,	0x4e271d9e,	0x30dde85c,	0x1eef4f8f,
-0x5414ab71,	0xcdd17175,	0x53447f57,	0x65aed0fc,
-0x26da26fb,	0xf18c45c7,	0x9ac02699,	0x8b3bdf8f,
-0x56855380,	0x0b6fe851,	0xe0806eba,	0x63b4f9a9,
-0x0165c133,	0x78195a10,	0x208274ed,	0xfb5fc52d,
-0x93dba36f,	0x5229dd36,	0xfd4da34a,	0xe20acf6a,
-0xb752fec5,	0x539da293,	0x5dd55f32,	0x1e7a9b1f,
-0x0fbc9023,	0xe917cfec,	0x145d11ec,	0xcf57352a,
-0xbba8cc49,	0xd9fa2f27,	0x44d0ce61,	0x83e1113f,
-0x46bff28f,	0x3963fb31,	0x45c8f622,	0xa035479f,
-0x5d795ca6,	0x04cd2117,	0xffff23c6,	0x63104ad9,
-0x75ed6ef6,	0xddc7b671,	0x5ba4b3f8,	0x5dd86d6f,
-0x3b5e04f7,	0xe717c51e,	0x0ecc5aa3,	0x944daa3f,
-0x095f39eb,	0x6192ee8d,	0x70a62ea1,	0x85c7a8a7,
-0xabb1e226,	0x16d8e7d6,	0x1c941e73,	0x9afe1f9b,
-0x3f8ca013,	0x8678a083,	0xca83cf32,	0x059dffe0,
-0x594a2eab,	0x0d2efbf3,	0x9a0e10bf,	0x7a18e8c6,
-0x976e235e,	0x217be329,	0xa8251bcf,	0xc05527ff,
-0xeaceeb11,	0x7ab35f69,	0x2121fd18,	0x65164cdf,
-0x5bc340d8,	0x6f7504c3,	0x49b6a1ea,	0x3db80d0f,
-0xd9bce615,	0xcc3cee35,	0x2fed7b82,	0xc71ef96c,
-0x277117c5,	0x798af695,	0xc81e9619,	0xb0f29d92,
-0xe3f9aa6e,	0x3df3ccfd,	0xc24ac0ad,	0x3652b337,
-0xbb082497,	0x619f4764,	0x723b778a,	0x65fd9f80,
-0x445733b6,	0xd9fa2f27,	0x11859b34,	0xd6b4446a,
-0xb9400d70,	0x6c36ae64,	0x45c8f622,	0x0a9fed35,
-0xf7d3f60c,	0x51987442,	0x5555896c,	0x63104ad9,
-0x8a129109,	0x2238498e,	0xf10e1952,	0xa2279290,
-0x3b5e04f7,	0xb242904b,	0x5b990ff6,	0x6bb255c0,
-0x5c0a6cbe,	0x6192ee8d,	0xda0c840b,	0x2f6d020d,
-0xfee4b773,	0xbc724d7c,	0x1c941e73,	0x6501e064,
-0xc0735fec,	0x2cd20a29,	0x357c30cd,	0x059dffe0,
-0x0c1f7bfe,	0x587baea6,	0x65f1ef40,	0x2f4dbd93,
-0x976e235e,	0x8bd14983,	0x028fb165,	0x950072aa,
-0x406441bb,	0x7ab35f69,	0xdede02e7,	0x9ae9b320,
-0xf169ea72,	0x908afb3c,	0x49b6a1ea,	0x68ed585a,
-0x8ce9b340,	0x33c311ca,	0x7ab82ed7,	0xc71ef96c,
-0x8ddbbd6f,	0xd3205c3f,	0x9d4bc34c,	0x1a583738,
-0xe3f9aa6e,	0xc20c3302,	0x3db53f52,	0x9cf8199d,
-0x44f7db68,	0x619f4764,	0x276e22df,	0x30a8cad5,
-0xbba8cc49,	0x8caf7a72,	0x11859b34,	0x7c1eeec0,
-0x13eaa7da,	0x3963fb31,	0xef625c88,	0x0a9fed35,
-0x082c09f3,	0xae678bbd,	0xffff23c6,	0x9cefb526,
-0x8a129109,	0x776d1cdb,	0xa45b4c07,	0x5dd86d6f,
-0x6e0b51a2,	0xb242904b,	0xf133a55c,	0xc118ff6a,
-0x095f39eb,	0xcb384427,	0xda0c840b,	0xd092fdf2,
-0x011b488c,	0x16d8e7d6,	0xe36be18c,	0x6501e064,
-0x95260ab9,	0x79875f7c,	0xca83cf32,	0x50c8aab5,
-0x0c1f7bfe,	0xf2d1040c,	0xcf5b45ea,	0x7a18e8c6,
-0x3dc489f4,	0x8bd14983,	0xfd704e9a,	0x6aff8d55,
-0xeaceeb11,	0x854ca096,	0xdede02e7,	0xcfbce675,
-0x841e172f,	0xd1836ef6,	0x21358ab3,	0xe64e765d,
-0x2bb7c3ee,	0x17cb5221,	0x4981ba51,	0xd47a3843,
-0xc14b7136,	0x5ec4dde8,	0xd7aeddf7,	0xdf283450,
-0xd9de9c89,	0x2f21dd24,	0x7a829f8d,	0x6d7a7409,
-0x6793a056,	0x4acebaa3,	0x19bce883,	0xb6f3589a,
-0x8c34a416,	0x26287ee2,	0xc53af3ab,	0x8776aecb,
-0x82ae7486,	0x7beede7d,	0x6297c66c,	0xa7d5a0ef,
-0xcc5b7d98,	0x652585b7,	0xe86e07fd,	0x72bfdbbe,
-0xab43328b,	0xd589f8dd,	0x6a8d330e,	0x48205271,
-0x595b8430,	0x3e929a43,	0xf708ae20,	0xf2b48517,
-0xdcc430bd,	0xa4b61a94,	0x35cc1c1e,	0x40867959,
-0x4b2a02e4,	0x42a2d44f,	0xf9ee857b,	0x85803a4f,
-0xd7ce570a,	0x919287af,	0x9720bd2b,	0x7a35c799,
-0x93a74932,	0x8c7d168b,	0x2dfbd120,	0xfc6d06d9,
-0xd1d76878,	0xc378161d,	0x7afc2a57,	0xfc1e2b22,
-0x273d6014,	0xc9d26cd4,	0xd7168218,	0xc6f5b7e3,
-0x6338ed3e,	0x9760c540,	0x5217a284,	0x94f810bb,
-0x44b788a1,	0x7569fdd8,	0x43b0e151,	0xe4fa7267,
-0xf3a4bac7,	0xe2da00dd,	0x3bb70657,	0x9c809ae6,
-0x41e40a20,	0x39aba1f8,	0xabf9231e,	0x3600aa33,
-0x14eeb867,	0x3433aa5f,	0x6210db34,	0xc12dd01f,
-0x6412c75e,	0xcfc021ff,	0x51854f6a,	0x63024aba,
-0x2b9dd405,	0x68eae8f3,	0x6b229e90,	0x66715ad3,
-0x9356cdea,	0x1785f8a4,	0x9f47b815,	0x135ce0fe,
-0x948a1572,	0x3bd66ec5,	0x278af48f,	0xc41d3127,
-0xa0315a8d,	0x8b258120,	0xbbb987f1,	0xf8104f94,
-0xaf6005de,	0x7836d3d8,	0xdaf3b84c,	0x7badf86b,
-0x64929c4e,	0xd3445b54,	0x0665cbeb,	0x25d7c7bc,
-0xf024a9ae,	0xeb09f55c,	0xcd4b8599,	0x6797c0c4,
-0xdc937428,	0xc2bb99c3,	0xf27ddec7,	0x9409bbd2,
-0x50cbcae2,	0x643648bb,	0x579dc153,	0x21ae1281,
-0xb89e62d4,	0x82744722,	0x3b1ee274,	0x530ad116,
-0xe8c74d35,	0x697614af,	0x39c136ae,	0xd214cb09,
-0xa654055c,	0x4905314f,	0x8413e9fe,	0x7a3f264b,
-0xa9debb13,	0xace6e93b,	0xc18078eb,	0x8ea864be,
-0xf65b119c,	0xafe6e0b1,	0x0a793d31,	0xb24669a9,
-0x54229960,	0xdb54c384,	0xaafb33b0,	0xe749beaf,
-0x5c95dc0a,	0xaeefa011,	0x004b6be4,	0xdd056986,
-0x039cc3ce,	0xe9621de8,	0x780b5909,	0x66269c2d,
-0x0c18be2a,	0x7bd4e50a,	0xad055d0c,	0xe8bc6a72,
-0x3e3ce765,	0xf2b327fa,	0xd449b96d,	0x55dd5fc3,
-0x08aa0917,	0x629b02d2,	0x5bc7d844,	0xb3ec2289,
-0x9ea39052,	0xbe24bcb2,	0xf10e21b1,	0xca8f54aa,
-0xe5dfd399,	0x8a77ac1c,	0x15621798,	0xbc73d912,
-0x2dd02667,	0x008fe60f,	0xe0712f7e,	0xcb52fa84,
-0xfa02f3b7,	0xc2c1d7aa,	0x30f14516,	0xd153f9d9,
-0x4932076e,	0x322da42b,	0xc74f4c86,	0x0fdad2b2,
-0x7225b3c8,	0x4c1fcbfe,	0x7db6b2da,	0x73e9ba8c,
-0x51f0d91c,	0xe340eb1d,	0x142834c5,	0xc2fe27ef,
-0x11455e6d,	0xb0a81649,	0xf42bb2fd,	0x320c73dc,
-0xf75a52c1,	0xdb1f8d74,	0xf01370d4,	0xf2935fff,
-0x426bedb6,	0x1da97d16,	0x096657f9,	0x650daf73,
-0xc030af66,	0xc1f98259,	0x95578020,	0x3f0f12e0,
-0x499864d0,	0x72aba0d2,	0xa6313b0f,	0x803a192d,
-0xa5e9bd05,	0x28d3f8a3,	0xf0b40844,	0xc5b1cfa2,
-0x42e1f771,	0x4b9e8bc7,	0x8df27c91,	0xb8e97ed1,
-0xb2f6d24e,	0xe976e881,	0x2ff6f140,	0x67e5cc26,
-0xebb7ea0f,	0xfc4bc0c8,	0xa635853c,	0x8c383b6e,
-0x11e0ec8c,	0x1664f9ce,	0x662a022e,	0xf95f2e20,
-0xa9916fae,	0xd02e8ea0,	0x77ac001d,	0x8907dac1,
-0xfbdb442b,	0xe5b1da5a,	0x9b234c30,	0xec06dfa4,
-0xb1935f2e,	0x02744a30,	0xea7d891f,	0xd338ead4,
-0x827cf3d2,	0xa64f0c10,	0x9456cd05,	0x5d3a44d1,
-0x6b896551,	0x37212b1d,	0x1c3b90d9,	0x867acae9,
-0x43a8cffe,	0x26ac3587,	0x479e2f5b,	0x29d45ade,
-0x9edcae55,	0x7c399c2f,	0x659f60ec,	0x1f12668d,
-0x665e8299,	0x3ce905ce,	0x4d9269fc,	0x65c972b0,
-0xdaebf783,	0x2c5652da,	0x179506fd,	0x780b4fe3,
-0xa5c89ed9,	0xd809e8a3,	0xea5d6e58,	0x936b35b6,
-0x630225b8,	0x0df201ce,	0x4fa4e548,	0x2f6c222b,
-0x220ccafd,	0x79f23f73,	0x6c2e9033,	0x21ecc2b1,
-0xb0a71983,	0xd7da09f1,	0x8507d4aa,	0x2ec9a44a,
-0x842f64c5,	0x2af4e665,	0x6468c09c,	0x529ed76c,
-0xc5052e0d,	0x7a30d053,	0xfccfbe50,	0xdf8441d9,
-0x39264212,	0xf939bfaf,	0x51d6cc43,	0xa726bde0,
-0xf0dbed71,	0xa1677334,	0x600ce569,	0x1c60ae34,
-0x8d8af918,	0x0a33ca58,	0x4f81b899,	0x50b6ba29,
-0x90f675d5,	0xbaaa14a6,	0x578e8479,	0x50f1c394,
-0x634fe68d,	0xbddb8f72,	0xde6c561b,	0x99a6f900,
-0xe6c6b254,	0x3dfc9b96,	0x17b0084e,	0x03a374e8,
-0x4e04d64e,	0x4571fcd8,	0x7ba89007,	0xa30d1f2d,
-0x362d1eff,	0x016db87e,	0x4d1b6729,	0x4128e42b,
-0x39a427c4,	0xd17aff31,	0x1006af68,	0x555d2ee3,
-0x7a24cb0f,	0xe486ddce,	0xe573336e,	0x9b848ef3,
-0x76235bf9,	0xc39a61bc,	0xbea1c0fa,	0x0e7224f9,
-0xe5266a04,	0x82c2d268,	0x5ead8790,	0x052c15d8,
-0xa68b818b,	0xb6c26a05,	0x741164fd,	0x3f651e4d,
-0x20d47197,	0xdf799be8,	0xc05b22a4,	0xd48c2322,
-0xe7800dc6,	0x21a8cbfd,	0xdfbe6d72,	0x80e41eae,
-0xc9a780b7,	0xf0a0ba8d,	0x44c123cc,	0x53e4fd29,
-0x7503b4ff,	0x1fe494dd,	0xf04f2097,	0x1f5090df,
-0xd89de95d,	0x9a668851,	0x5bbf8ee1,	0xdfa0993a,
-0x8ec2eba2,	0xa7d2ecd3,	0x297cb3aa,	0x913a63fd,
-0x8458609d,	0x34b63916,	0xdebb9f98,	0x7102bea3,
-0xf3e6572a,	0xeea44330,	0xa9d423f6,	0x6551f7b5,
-0x79cb9a5c,	0x4f15a94a,	0x8f245b06,	0xdb46a06c,
-0x20690ce7,	0xb6849988,	0xfabb8acc,	0xd4de67a0,
-0x89b037cd,	0x945537e2,	0xcee35238,	0x6e1acc40,
-0xcc2e5e43,	0x55f98a38,	0xe9ffd2d4,	0xcc03be34,
-0x8ab39677,	0xcb526709,	0x0f6aacf4,	0xf8c8f351,
-0x54d90ac2,	0x1582eb5c,	0x53fd29fd,	0x0ec3d5cf,
-0xb7b1957d,	0xf6fba1e3,	0x9d4847ee,	0xab7bc4d8,
-0xe8776ba3,	0x5b862408,	0x8a585e2a,	0x8ba8e1dd,
-0x02e72853,	0x4fb8242a,	0xfbe29faf,	0xbc9dd031,
-0x6df58e36,	0xf6369a2c,	0x820613f1,	0xc6d06960,
-0xc8c66a0e,	0xf7db5fda,	0x495b06d6,	0xac6bdef7,
-0x577a0057,	0x3315d487,	0xd7e79c20,	0x156aef71,
-0x91671aa5,	0x97e953a9,	0xd0c5a16f,	0x8c6c44d0,
-0x232fc8b4,	0x11464407,	0x81c52c1e,	0x50095bc9,
-0xac03b66f,	0xa5160415,	0x4f698f1d,	0x15fd9072,
-0x6374e42e,	0xa9cd1d3a,	0x6b737d7e,	0xbaa55c08,
-0x4b40489e,	0xa9e86b57,	0xb98663d0,	0xaadeb5d2,
-0x39a47edc,	0x06cfb4eb,	0x26a6d63e,	0x7fa0e17d,
-0x080f7c92,	0x7de4eb45,	0x59aef735,	0x085ac525,
-0xacdcb7c3,	0x85184612,	0xe7bfe4b2,	0xf1709e9f,
-0xb1bc06c0,	0x9bdebe28,	0x2fef5921,	0x5dba465d,
-0xc00bcdf6,	0x85c29171,	0x12f3a26e,	0xe31f2664,
-0xcbd8e556,	0x0db43396,	0x6cc4ea81,	0xd6e28684,
-0x0818e78c,	0x665bd09d,	0x47864efd,	0x32ef4114,
-0x2da7740b,	0x7cefc19b,	0x84658fcf,	0x8e3864fd,
-0x59728a4d,	0xb7e5a853,	0x43a3484b,	0xc4ac99ff,
-0xaecf3f4f,	0x1456e8ce,	0xc32b52f1,	0x5fdf0c89,
-0xb2da86c7,	0xd2697b5e,	0x0bae940d,	0x8201f02c,
-0xf5924444,	0x7a15b8c9,	0x4d7e3a13,	0x7b44d113,
-0xaa6987b1,	0xbf1899f2,	0x5eb17cfb,	0xd9047563,
-0x60dca8f8,	0x10385ace,	0x6d20bada,	0x0a66dccd,
-0xf1811aa5,	0x52557a20,	0xd8f60251,	0x7031d250,
-0xfe7b6b71,	0xdc339eab,	0xef5403db,	0x95860075,
-0x5f6f40a2,	0xf4ab5329,	0xd71618ac,	0xc87934bd,
-0xe96101d1,	0x55d1976c,	0x471c8505,	0x7a36d839,
-0x5d62a9ee,	0xf3c54a8a,	0xa2be15d9,	0x244087c9,
-0x042c8037,	0x23224689,	0x281c5d73,	0x2139ecfc,
-0xffb8bc8a,	0x834fdd11,	0x9cd5a5bd,	0xa3368319,
-0x7e5bef0c,	0x4ae2dbda,	0x86d90089,	0x6675dfce,
-0x48876262,	0xcec72538,	0x11dc5c80,	0x86a730f9,
-0x313565c9,	0xe3e5be11,	0x106d7cce,	0x752b8be2,
-0x3d00a5bc,	0xe6f70e95,	0x44447ac8,	0x600df30c,
-0x8335ac3b,	0x8816ddee,	0x700982fe,	0xee495741,
-0x48c7e81c,	0xa3d55da2,	0xb0172982,	0x70ab2158,
-0xd4460621,	0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,
-0xa8454763,	0x70877bb6,	0x66005c97,	0xaf292c06,
-0x7b843db1,	0xf343b59b,	0x25cdc7b5,	0xa41da617,
-0x9e9d895e,	0xc936f475,	0x7270925a,	0x30024230,
-0x8e72f53d,	0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,
-0xfc18a2a3,	0xaf377cc1,	0xbff09a78,	0x4b4e0814,
-0x95a0b2c1,	0x270398de,	0x201fca94,	0x2a032a4f,
-0x131542b4,	0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,
-0xa814ddc9,	0xa3b3a991,	0x17ee60c2,	0x852c0b8d,
-0x11e5853a,	0x762002a7,	0x92c5311d,	0x0d4bf7e1,
-0xfffec870,	0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,
-0x0111a772,	0x9808e780,	0x29c336e8,	0xe9bc05df,
-0x5bedde11,	0x945565af,	0xaff808fe,	0x87e3423d,
-0x4de6f98f,	0x93b4adef,	0xbf704fa4,	0x09120e91,
-0xd54f3692,	0xdf8eab1e,	0xfabbf59c,	0xe74318be,
-0xaab87ffc,	0x29fa791c,	0xe3915552,	0xa652cb9b,
-0xa1252e74,	0xb35b723b,	0x542aa28b,	0x12fcc5b0,
-0x3941f962,	0x82bcc6cc,	0x47b11974,	0xb821611f,
-0x78b34250,	0xf1be5659,	0x561b9e61,	0x6f3bd501,
-0x584e6f5c,	0xd54ed547,	0xacebcd21,	0x7b5ff816,
-0xb64ad233,	0x9f2f330d,	0x69fb1ece,	0xac8710dd,
-0x58dc6c60,	0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,
-0xebc0ce9d,	0xa733274f,	0x884d9b55,	0x42b08b63,
-0xafa54a74,	0x1c7ccf64,	0x93a20191,	0xaaa3132e,
-0xc69831d1,	0x54634889,	0xfbfe3efc,	0xd3cf68d4,
-0x302e3117,	0xf5693131,	0xc3ce8c6c,	0x1f03cd89,
-0x6243334c,	0xf16bc80f,	0xdca5f130,	0xcb2cd956,
-0x4c1bb421,	0xe8de533c,	0x7f86703a,	0x29aa897e,
-0xdd54acad,	0x76b2f2ae,	0x7ef82b71,	0x2e30970b,
-0xba402597,	0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,
-0x7f9efd1c,	0x2363d147,	0x5327289a,	0xe89229f3,
-0xd63a535c,	0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,
-0x26b6edfb,	0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,
-0x6d65db4c,	0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,
-0xe20e6dbb,	0x8488a45f,	0x8ebc2932,	0xd4767316,
-0x3e8c4b8a,	0xbab7402c,	0xfc1e217e,	0xe5c5bf82,
-0x6928fe2e,	0xc88528e9,	0x4b2e4e8f,	0xdd938b86,
-0x0c964f98,	0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,
-0x197d005a,	0x4d40b3b3,	0xcf203155,	0x0d2fa621,
-0x752d2c58,	0xb12bac12,	0x1e7e8c23,	0x94215d54,
-0x9854a71c,	0x4de63c64,	0x7a012529,	0x9c171f8d,
-0x9e71def7,	0x3bd17d50,	0x11f175d9,	0xec78abf3,
-0x7b529eee,	0xd3a69fc3,	0x5b718676,	0x58214d29,
-0xa8bd2c34,	0x41ea00ab,	0xa03f64d6,	0x4ee342b0,
-0x32b1e444,	0x1c1801a4,	0xc8424702,	0x334a7e35,
-0x50cf1543,	0x3b22b495,	0x88683776,	0x8e2e0154,
-0x6155c033,	0x4e2fa6ac,	0x42ace700,	0x8d64f97c,
-0xaf9ced17,	0xb2a5cb92,	0xa558582d,	0x88705de7,
-0x9e528d59,	0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,

cpu/intel/model_6fx/microcode-m16f6d0.h

diff --git a/cpu/intel/model_6fx/microcode-m16f6d0.h b/cpu/intel/model_6fx/microcode-m16f6d0.h
deleted file mode 100644
index 98ee672..0000000
--- a/cpu/intel/model_6fx/microcode-m16f6d0.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m16f6d0.inc  */
-0x00000001,	0x000000d0,	0x09302010,	0x000006f6,
-0xb61ec71a,	0x00000001,	0x00000001,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x5cbc7680,	0x8999fbc9,	0xbced8740,	0x47843619,
-0x585ff247,	0xb54c5bc4,	0xf97a7f8b,	0xe23f377d,
-0x6fe30075,	0x557f5b11,	0xabecf266,	0x48ef1bd0,
-0x2ed831ca,	0x12314239,	0x6f45d230,	0x98098330,
-0xbd1031a7,	0x0d9d4223,	0x17ae7f56,	0x681f75b5,
-0x5a609828,	0x97c39d85,	0xdf59fa11,	0x7de3fca7,
-0xfce6aa1d,	0x0b7501d2,	0x8941f37f,	0x81be81a5,
-0xe0c7c6e3,	0x729c6824,	0xb36b3966,	0x61bff1be,
-0x11f94541,	0x0a1ddabe,	0xf02e33b5,	0xe80036a2,
-0xbb36d9f7,	0x7cd46b63,	0xd81ff2dc,	0x7160eb26,
-0x60856ebb,	0x6305acd2,	0xae7988a5,	0xa4f66112,
-0x17588a96,	0x430f5284,	0xf47caf1a,	0xa91188cc,
-0x96a5df64,	0x00407a38,	0x7d3a9dcd,	0xd6c23fd0,
-0xa66e2ef9,	0x909e57f4,	0xfb945644,	0x31319ac2,
-0x7ef3851c,	0xcc56ed66,	0xca6c7a2c,	0x478b840e,
-0x238a219b,	0x9a15c897,	0x889083e7,	0x833b25c7,
-0x99264c88,	0xc590a8ab,	0x747b914f,	0xf33dbc25,
-0x9ff090a3,	0x3b9e69e8,	0x6da52774,	0x87abc3f1,
-0x28ee787c,	0x71bc3bc8,	0xfb3c92ec,	0x802353e3,
-0x9e6cad93,	0x1711487d,	0x64c75d38,	0xa77ea762,
-0x8fb9a957,	0xd35e1329,	0xe0bd4ffb,	0x793b78bd,
-0x238fadcd,	0xcf5ccad5,	0xa92aa4d6,	0x717a8fda,
-0x3bcd31e9,	0xc81e2d96,	0x834eb28f,	0xa62899ca,
-0x22c1c0c1,	0xf554bddd,	0xda7e66de,	0x41175474,
-0x3d6d45dd,	0xc29482fb,	0x716889d8,	0x48735926,
-0x7f5f05b6,	0x43e46278,	0xfc10d02b,	0x085f41c8,
-0xf922bc38,	0x7876fb5b,	0xe3adefa1,	0x3377bde8,
-0x6a2c2459,	0x174804f3,	0xe6cb28cf,	0x721bdef7,
-0x1725d176,	0xba3a7025,	0xcc5b1458,	0x047f5f5b,
-0xc8a6cabe,	0x2c34ecbd,	0xb7b86f20,	0x2e349ca5,
-0xfbb1e07a,	0x3e9b5538,	0x2d01ec7c,	0xa247b264,
-0x545f4321,	0xaad23d7b,	0x1fcbde1a,	0x32ac7c71,
-0x25ec882c,	0xa7386995,	0xaa35f913,	0xf702c91d,
-0xe1733f3d,	0x24be5875,	0x2334f5dc,	0x14f06462,
-0x46ec757c,	0xc7f7dcc3,	0x7b7bcce2,	0xd7b62f56,
-0xbe78cf3d,	0x3f99a219,	0x4eb47adb,	0x896ab895,
-0x697bf24c,	0x6444e260,	0x1bc4e629,	0x3dcfb9e1,
-0xcc7d261f,	0x48572db4,	0x3d3ee9c1,	0xc46cec41,
-0xf8d4cad5,	0xb870a9ea,	0x11f9f931,	0xfe550c4c,
-0x75be8e07,	0x55a74285,	0xf7b3c793,	0xaace416e,
-0x7b7069bd,	0x4071176c,	0xcfd33a4f,	0x3090196b,
-0x7c56c1e1,	0x846fcec4,	0x04140cbc,	0x839838be,
-0x4cfcef7e,	0xccc8e501,	0xefe667d8,	0x6d598934,
-0x5ad949f6,	0xdf5d1bc4,	0x219dbb66,	0x182e4c40,
-0xe2b1f162,	0x068fb62e,	0xdf1f2358,	0x1f176b8f,
-0xc1b857a6,	0x9705ac72,	0x21a35ef8,	0x3400b7b8,
-0x65c52a95,	0x0fb522ab,	0x1dd48132,	0x7e88b074,
-0xb3f5c88b,	0x8659a950,	0xebe39208,	0xdbcc7784,
-0x89643912,	0x455e6fa7,	0x0040d553,	0x1b3173d8,
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cpu/intel/model_6fx/microcode-m16fda4.h

diff --git a/cpu/intel/model_6fx/microcode-m16fda4.h b/cpu/intel/model_6fx/microcode-m16fda4.h
deleted file mode 100644
index 8b07438..0000000
--- a/cpu/intel/model_6fx/microcode-m16fda4.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m16fda4.inc  */
-0x00000001,	0x000000a4,	0x10022010,	0x000006fd,
-0x9ace6116,	0x00000001,	0x00000001,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x7f914831,	0x7f280950,	0xcc39293b,	0xe0137d67,
-0x25a22f1a,	0xc7d8e840,	0xe609cbee,	0x26a84b50,
-0xc85354c6,	0xe397b7c6,	0x2242c9b9,	0xe0bc9aab,
-0xe5a1f3ca,	0x040ad2ae,	0xeb88afeb,	0xe47ce2bc,
-0x0529444f,	0xea4b23f9,	0xecce0288,	0x2a97ea69,
-0xe8db41ed,	0xcde8afe0,	0x287c2c4d,	0xe1fb67db,
-0xcfe5fe88,	0x21c8c817,	0xec9d32f9,	0xef42ab3e,
-0x2d362cd3,	0xcfcdb590,	0xeedc5247,	0x256173c2,
-0xcfa8fc16,	0xe7ccf864,	0x2771c55d,	0xe72a2a73,
-0xed1aaac2,	0x05d9700a,	0xe41338c9,	0xe8199a01,
-0x07091a2e,	0xef7d983c,	0xeb1ff270,	0x29f83510,
-0xe7e56beb,	0xc1c2e8ff,	0x2b17c7dc,	0xef8c0c30,
-0xcd709efb,	0x2c80ef6d,	0xe4a44893,	0xeee55636,
-0x238c0560,	0xccec88f1,	0xe323272d,	0x26365c26,
-0xc68e9a8e,	0xebf1571d,	0x2938c56e,	0xe9cf0fdd,
-0xe74cbdc1,	0x03bb4075,	0xe085209d,	0xe7820854,
-0x0db1b449,	0xeee44fa7,	0xe99e54de,	0x21257916,
-0xe44b936f,	0xc48e22fd,	0x27d76bae,	0xee7b649b,
-0xc19abfde,	0x2dd42a7c,	0xe69fd84e,	0xebf23110,
-0x22312129,	0xc82f7083,	0xe7b142aa,	0x2f8d059e,
-0xcc7cc6ae,	0xe30b9bf7,	0x2dd4bfee,	0xe7d41cee,
-0xef85526b,	0x060b57a9,	0xef0b3942,	0xef2969c5,
-0x01d7493c,	0xe880a203,	0xec0d6932,	0x2b0ac8b7,
-0xe06d9134,	0xc9e1f69f,	0x23be1ff0,	0xe7003514,
-0xc277744c,	0x296a86d8,	0xeb89e47b,	0xe0dbb817,
-0x2cb39966,	0xc52b3e10,	0xe6e4a36b,	0x2ca60c46,
-0xc4f282bd,	0xe66d7a92,	0x2a2fbdfd,	0xe8bf157a,
-0xe380b895,	0x044a9754,	0xe3cef9f3,	0xe6ee481f,
-0x0d95c4d1,	0xe13f8025,	0xead12877,	0x2327147b,
-0xe4194617,	0xce6dce34,	0x289214fd,	0xe8207eef,
-0xceb61061,	0x2e046d71,	0xe6a08bee,	0xe979f3c2,
-0x24e27654,	0xc668dffc,	0xee41de56,	0x23a3fcef,
-0xc11e4883,	0xe94f7250,	0x2e0a9386,	0xe1909db4,
-0xe98ca63a,	0x0e248f56,	0xec457525,	0xec35146b,
-0x0fc2600e,	0xe0dfef2a,	0xed159a8d,	0x294082b5,
-0xee01f8c0,	0xc48f8345,	0x2b5bf3f1,	0xed975f49,
-0xcb9cf329,	0x27dbf7da,	0xe42e98af,	0xe2a1cfe7,
-0x22250230,	0xcab63bd2,	0xec4b3b56,	0x267aa6a3,
-0xcc50b117,	0xe367a614,	0x2c449c82,	0xeb4a4510,
-0xeeaa0758,	0x0227e0b7,	0xe31963eb,	0xeaa673f9,
-0x0492017c,	0xe835adc7,	0xe8abaa8d,	0x23fe84cd,
-0xed9fe20f,	0xc7ef7b0a,	0x20824add,	0xe9a10b7c,
-0xc8766bef,	0x28ef7911,	0xe88a9a71,	0xe230d0c5,
-0x25717aac,	0xc9a9bd9c,	0xe35b5c0f,	0x2653ba3a,
-0xcae1d0ef,	0xeaff2875,	0x2c4c2521,	0xe7bfe871,
-0xedd73936,	0x0ccb7213,	0xea27c1f5,	0xe1aa4007,
-0x066507c7,	0xe2912003,	0xeca7157d,	0x259b89a5,
-0xedf87aed,	0xcd96574d,	0x2ff8b1d8,	0xed1622d3,
-0xc18c03c3,	0x2b71f0b7,	0xe55a4705,	0xe89be9a4,
-0x260e0dba,	0xc13cec48,	0xe529f238,	0x2196cc88,
-0xcced8255,	0xe134a48b,	0x27ace2e0,	0xe58fec14,
-0xec6dee21,	0x05f13b71,	0xe1bb97bf,	0xe3d2412f,
-0x0de00a6a,	0xe3211560,	0xe8bf4c7f,	0x298029d8,
-0xe7a07e6a,	0xc6c4fe3c,	0x25ca5a7f,	0xef79822b,
-0xc496fc94,	0x23410562,	0xe0c7d1e6,	0xe1d499a7,
-0x26788fac,	0xcf740894,	0xea5cfa3e,	0x2cf20081,
-0xcc9b4d3d,	0xe94fb63e,	0x2eca3c16,	0xe798d9cd,
-0xe45e9f23,	0x0272400f,	0xee06be50,	0xe578343c,
-0x09e00ebb,	0xe8c8c4e1,	0xeb95b883,	0x2cd26f30,
-0xea3cb684,	0xc6b8cea4,	0x293caafe,	0xeedbdbe4,
-0xc6d6e44a,	0x2d756447,	0xe6c63524,	0xea0ba0e6,
-0x2b5b934f,	0xc1cee629,	0xef8b197b,	0x2b98f34c,
-0xcd06599b,	0xedb7b212,	0x228c4551,	0xed102fbf,
-0xe13578b7,	0x0804a0ed,	0xe445ad7e,	0xe943b724,
-0x0e020e25,	0xeadbb2ad,	0xe9991a5b,	0x2633de6c,
-0xe049cac7,	0xce0a0ca5,	0x6864caf2,	0xf7d55f4f,
-0xb115e7ee,	0x5e4ba2c0,	0xd46f4cd5,	0x99d7f745,
-0xcfddde23,	0xd6d0f22c,	0x3980cb83,	0xc4021fea,
-0xf56a0652,	0x304936e0,	0xf31fe215,	0xf45b9204,
-0x40bf5961,	0xf570501e,	0xa654981b,	0x42d846ae,
-0xeae6f9b2,	0xa0a65c38,	0x6d68812a,	0xcca7f340,
-0x09e1e321,	0x483b0132,	0x0748f5d6,	0x1ec48ee6,
-0x2b8ff862,	0x31581bce,	0x2d08d925,	0x09da6c1c,
-0xaffb005a,	0x27ce6a21,	0xc692ac71,	0xa4bed23f,
-0x45631b61,	0xe7597f61,	0x9e2898ce,	0x6c8fb6e5,
-0x75b78116,	0x914e01f9,	0xc4ea2379,	0x735c8476,
-0x99ffefe7,	0xea2676c9,	0x4e97ac98,	0xb9a25044,
-0xde8248c4,	0x4f0b7232,	0xfe659700,	0xda32e4fe,
-0x0d6b8ff4,	0xdc2822ef,	0xca64fff2,	0x27929668,
-0x25c5ab1b,	0xc0cc4ef4,	0xea31ddc4,	0x27e5fe71,
-0xe90185c9,	0xc2da31db,	0x309e76da,	0xcd3cd4c3,
-0xf5cf45e4,	0x3ff1e893,	0xf398e5ca,	0xf0a16da4,
-0x0362d00f,	0xfd2169da,	0xec190995,	0x0eb0f290,
-0xd0f80a1b,	0xed5d50ab,	0x506df840,	0xdc8fd35c,
-0xafd97707,	0x5ea52fcb,	0xf80ace57,	0xa4ba5890,
-0x40524dc8,	0xf375878e,	0xe686742a,	0x47fb24d4,
-0xa4a47665,	0xcf142d99,	0x653d49dd,	0x8570e383,
-0xcafac093,	0x616bf439,	0xfbf8637b,	0xdc6fa376,
-0x15fc680c,	0xeb725bf1,	0xe7ce12b6,	0x1c24efa8,
-0x3035e762,	0xea122123,	0x922fa067,	0x28760697,
-0x862a3133,	0x8e85e6e0,	0x39c291c8,	0x8dc3c577,
-0xadc6ec89,	0x300ef14b,	0xc14da686,	0xbc825b5f,
-0x40c4a0a8,	0xfdfe67d4,	0xbdd68cb8,	0x6d7c14db,
-0xcaf384fd,	0xbdcd0023,	0x76ad805c,	0xd79da753,
-0x9b643d15,	0x45b22c31,	0xd88c5161,	0xba18ad9d,
-0x6179b1f2,	0xdd324cb5,	0x9310bb3e,	0x71545f27,
-0xd201934f,	0xa6c4815f,	0x4f90c3e8,	0xf5db1f7a,
-0xb82d7cdd,	0x4c4d74e8,	0xf531b446,	0xa5fa063e,
-0x64050ec5,	0xc2ed99f2,	0xb7726c94,	0x4fac111c,
-0xc32b4379,	0xb83d819c,	0x7c1518ee,	0xc416397f,
-0xb4261160,	0x774802de,	0xf298c616,	0xb39c2606,
-0xb4f79481,	0xffb1e8c8,	0x60318988,	0xb3283520,
-0xf9bbdba2,	0x4b9d48df,	0xad52f49f,	0xddc2eb10,
-0x78190f4e,	0xaae99813,	0xd6e5c066,	0x58cb1e21,
-0xabd2a669,	0xf0c6d09d,	0x49fb834b,	0xa1392147,
-0x90b72907,	0x43ebe243,	0xf66d7020,	0x9a9ae4ec,
-0x615681c1,	0xfe18af31,	0xa5641fd4,	0x67982a14,
-0xc415a16d,	0xa25328ee,	0x68a79f60,	0xdf5b1629,
-0x82bb2ad4,	0x5fe84bfe,	0xf4b35f6b,	0x8d0de53b,
-0x52b95234,	0xdf1482b1,	0x8f37da27,	0x5128333b,
-0xfe2a1eb2,	0xab521426,	0x5c080d14,	0xd43c8e79,
-0x8a9f5cc4,	0x5d26763b,	0xcf024c5e,	0x9e2660a4,
-0x64b22b57,	0xd9085aa4,	0x95192214,	0x49bfbf2f,
-0xfab57ae0,	0xbb0e076e,	0x45d3417f,	0xf2ae3908,
-0xbeab771d,	0x4a5041e8,	0xf95895a8,	0x9f84a66c,
-0x4f37487f,	0xded740fa,	0x9fba5434,	0x46ca9981,
-0xd5104ebc,	0x9f64c009,	0x4dc22d1f,	0xf8327865,
-0x9a756819,	0x65735a2b,	0xf1d7e7f0,	0x9c14db6b,
-0x6e86f9a2,	0xf8fca776,	0x90a9c636,	0x45df3ae8,
-0xf33d98d5,	0xbd342aef,	0x4bcde82b,	0xf96b51ce,
-0xb9689be4,	0x4ac17555,	0xfa57e7c4,	0x96fbfc20,
-0x474a0aaa,	0xd0d6cb66,	0x9ecaefec,	0x422ca1c4,
-0xd38042f7,	0x9d4bc834,	0x4c982e66,	0xf0102312,
-0x9f1c3560,	0x68311f39,	0xf757001a,	0x96a962c9,
-0x6608d1bb,	0xffd3cfb7,	0x97a21537,	0x42198caa,
-0xc4aeaa5e,	0xb150220f,	0x6bf5e435,	0xce7c0f19,
-0xa22ebd19,	0x405b4bee,	0xf9842846,	0x89ede122,
-0x48e5e781,	0xf99193fb,	0x82950d12,	0x4fd33665,
-0x9ee664f4,	0x87930fe2,	0x21ded336,	0x943e59e0,
-0x255409e9,	0x1819eec8,	0x231d7525,	0x0681cb7e,
-0x58dc4eb0,	0x483d1096,	0x7e461818,	0x3d290697,
-0x33c2d2f5,	0x7dbe2a0f,	0x43cdbd36,	0x3d0d2196,
-0x2407748e,	0x130e0ceb,	0x624c6b26,	0x734bdd68,
-0x5a7984b7,	0xfd39fd9c,	0x3b0ad891,	0xcbac1264,
-0xe5acb841,	0x08df5569,	0xdf958fb9,	0xd86b8277,
-0x524c81ce,	0xb54056dd,	0x81567b9e,	0x374d4515,
-0xeec6fa40,	0x3301767c,	0x60b0f1b9,	0x514f700a,
-0x21f52aa1,	0x483f3449,	0x4e3ba650,	0x06d22e4c,
-0x1a90d4db,	0xe97e6d78,	0x524b9616,	0xbccb57e3,
-0xfa46b9de,	0xaa642c97,	0xa9f72127,	0x0b177a62,
-0xef46dd1a,	0xffc46c3a,	0x4d1096b6,	0xbdde556c,
-0xa2f47f3d,	0x5f45e4a8,	0xe32e4fe1,	0xb241ae2f,
-0x033dec3e,	0x20924d41,	0xe10a81ef,	0xc1f10763,
-0x75d661af,	0x3008c555,	0x9e3ac84b,	0xabeefd59,
-0x40007f3f,	0xaff388ba,	0xd8f8a9f5,	0x7af34b81,
-0xdaa7dfb2,	0x42552f54,	0x09ca5b35,	0x4ad0c847,
-0x37d8b94f,	0x9abd5c27,	0x36cb64ee,	0xa6968f51,
-0xe0634c21,	0x0d1868b9,	0xd83117d2,	0xd38a78d3,
-0x7ee43c80,	0x26f55fd1,	0xaa70d5c6,	0x8e53b620,
-0x54fa99ae,	0x565b0640,	0xfa4ef821,	0xa9123e22,
-0x2e3d0dea,	0x72f69599,	0xdd6ba118,	0xae16a900,
-0x0ff27140,	0xe78209c3,	0xd3d4100a,	0x3419f8b5,
-0x926bdf4c,	0xd20bbbc1,	0x4855839a,	0x938a2bb7,
-0xabdf85fa,	0x4dd349df,	0xeb6639fa,	0xa7d33e68,
-0x45b530ed,	0xea017f8a,	0xa4e1a2f2,	0x48b5fb02,
-0xec141665,	0x21ad191a,	0x4c25dc15,	0x9f53f39f,
-0x2099a272,	0x1e6eb1ee,	0x90297aab,	0x72d42e1b,
-0x1496fdce,	0x048039ba,	0x7ad82625,	0x815d87c5,
-0x0a811470,	0x38629c79,	0x87b5d17f,	0x473043c4,
-0x36006763,	0xb15511e0,	0x4c5f3c9b,	0x3bf666db,
-0x92eff23a,	0xd0a259fe,	0x13451600,	0x32358f70,
-0xd1415db9,	0xe67e42e0,	0x39320c2f,	0x213f5b8d,
-0xe375d554,	0x5d16b554,	0x2dc268a4,	0x81a3ba66,
-0x59a06dc4,	0xd891c126,	0x88b7a790,	0xc6d4b89e,
-0xbc5f3b6b,	0xd4d618ad,	0xa4bef51e,	0x8f1300ed,
-0xd0c96dae,	0xc4353314,	0x84a49853,	0xb7f7b6d6,
-0xcdc514ef,	0xc8016279,	0xba353c96,	0x83bac6b1,
-0xcb56413c,	0x47330102,	0x807d5321,	0x3d46c48b,
-0x49ce0cf8,	0x1da536f6,	0x31a263a0,	0xd912f713,
-0x133a44d0,	0x8a734292,	0xd78c1910,	0x5c7e7acf,
-0x7fef5b51,	0xd6b502bf,	0xa9ad020e,	0x72d0934d,
-0xb2db6114,	0x25678bab,	0x1df4f7e7,	0x325f42ae,
-0x6f5a5373,	0xd0ad7cdd,	0x783e918e,	0xae0911dc,
-0xa2a90916,	0x2c7ce025,	0xd5cf763e,	0xf7ac5a63,
-0x97e1ab8d,	0x20eec0fe,	0x48076419,	0x6dfc45ab,
-0xfed0b83b,	0x7feb8ae0,	0xbecff335,	0xcc1096ce,
-0x14eeb4dc,	0x44a3171e,	0xa931484d,	0xe375ac04,
-0xdb062d00,	0x6af0f4e0,	0x7c7d1519,	0x191cea88,
-0x13939ee3,	0x7df26a04,	0x6b97b7fb,	0x14c2726a,
-0xa7a5b43e,	0x3e0f5f83,	0xc99da4d5,	0xf617e90c,
-0x4e4d7d95,	0xb3921925,	0x8c673c13,	0x3f94c204,
-0xf9f83ece,	0x2d6a54da,	0x7bff3079,	0x53e2b8b5,
-0xbf764166,	0xe18cbb4b,	0xca616193,	0x2c011d88,
-0xd29b7326,	0x5084d426,	0x13c277fa,	0x436a1815,
-0x19b4b9d0,	0x56caca92,	0x08ee14a8,	0x5bf9285d,
-0x960b6cbb,	0x0f1337b5,	0x97a20b46,	0x969ae8cc,
-0x009aa11e,	0x9535b093,	0x9271fdf6,	0x0c67dba8,
-0x033d95ef,	0xa78d8a5b,	0x9a2e9e29,	0x347fa867,
-0xe91d758b,	0xa2a2c2e3,	0x793e0dbd,	0xd05c4ed8,
-0x3cd9477a,	0xd28a4cd9,	0x4aa58942,	0x93056cb8,
-0xbc2864fc,	0xe4acfc2a,	0xf7dd070a,	0x1aa90b56,
-0x0dbbefc4,	0xa15f0477,	0xfdc84914,	0x580511aa,
-0x8eabb367,	0xa4c8f643,	0x74f0eb55,	0xdfa86d6b,
-0xc1146003,	0x991ec567,	0xd71618ac,	0xc87934bd,
-0xe96101d1,	0x55d1976c,	0x471c8505,	0x7a36d839,
-0x5d62a9ee,	0xf3c54a8a,	0xa2be15d9,	0x244087c9,
-0x042c8037,	0x23224689,	0x281c5d73,	0x2139ecfc,
-0xffb8bc8a,	0x834fdd11,	0x9cd5a5bd,	0xa3368319,
-0x7e5bef0c,	0x4ae2dbda,	0x86d90089,	0x6675dfce,
-0x48876262,	0xcec72538,	0x11dc5c80,	0x86a730f9,
-0x313565c9,	0xe3e5be11,	0x106d7cce,	0x752b8be2,
-0x3d00a5bc,	0xe6f70e95,	0x44447ac8,	0x600df30c,
-0x8335ac3b,	0x8816ddee,	0x700982fe,	0xee495741,
-0x48c7e81c,	0xa3d55da2,	0xb0172982,	0x70ab2158,
-0xd4460621,	0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,
-0xa8454763,	0x70877bb6,	0x66005c97,	0xaf292c06,
-0x7b843db1,	0xf343b59b,	0x25cdc7b5,	0xa41da617,
-0x9e9d895e,	0xc936f475,	0x7270925a,	0x30024230,
-0x8e72f53d,	0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,
-0xfc18a2a3,	0xaf377cc1,	0xbff09a78,	0x4b4e0814,
-0x95a0b2c1,	0x270398de,	0x201fca94,	0x2a032a4f,
-0x131542b4,	0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,
-0xa814ddc9,	0xa3b3a991,	0x17ee60c2,	0x852c0b8d,
-0x11e5853a,	0x762002a7,	0x92c5311d,	0x0d4bf7e1,
-0xfffec870,	0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,
-0x0111a772,	0x9808e780,	0x29c336e8,	0xe9bc05df,
-0x5bedde11,	0x945565af,	0xaff808fe,	0x87e3423d,
-0x4de6f98f,	0x93b4adef,	0xbf704fa4,	0x09120e91,
-0xd54f3692,	0xdf8eab1e,	0xfabbf59c,	0xe74318be,
-0xaab87ffc,	0x29fa791c,	0xe3915552,	0xa652cb9b,
-0xa1252e74,	0xb35b723b,	0x542aa28b,	0x12fcc5b0,
-0x3941f962,	0x82bcc6cc,	0x47b11974,	0xb821611f,
-0x78b34250,	0xf1be5659,	0x561b9e61,	0x6f3bd501,
-0x584e6f5c,	0xd54ed547,	0xacebcd21,	0x7b5ff816,
-0xb64ad233,	0x9f2f330d,	0x69fb1ece,	0xac8710dd,
-0x58dc6c60,	0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,
-0xebc0ce9d,	0xa733274f,	0x884d9b55,	0x42b08b63,
-0xafa54a74,	0x1c7ccf64,	0x93a20191,	0xaaa3132e,
-0xc69831d1,	0x54634889,	0xfbfe3efc,	0xd3cf68d4,
-0x302e3117,	0xf5693131,	0xc3ce8c6c,	0x1f03cd89,
-0x6243334c,	0xf16bc80f,	0xdca5f130,	0xcb2cd956,
-0x4c1bb421,	0xe8de533c,	0x7f86703a,	0x29aa897e,
-0xdd54acad,	0x76b2f2ae,	0x7ef82b71,	0x2e30970b,
-0xba402597,	0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,
-0x7f9efd1c,	0x2363d147,	0x5327289a,	0xe89229f3,
-0xd63a535c,	0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,
-0x26b6edfb,	0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,
-0x6d65db4c,	0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,
-0xe20e6dbb,	0x8488a45f,	0x8ebc2932,	0xd4767316,
-0x3e8c4b8a,	0xbab7402c,	0xfc1e217e,	0xe5c5bf82,
-0x6928fe2e,	0xc88528e9,	0x4b2e4e8f,	0xdd938b86,
-0x0c964f98,	0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,
-0x197d005a,	0x4d40b3b3,	0xcf203155,	0x0d2fa621,
-0x752d2c58,	0xb12bac12,	0x1e7e8c23,	0x94215d54,
-0x9854a71c,	0x4de63c64,	0x7a012529,	0x9c171f8d,
-0x9e71def7,	0x3bd17d50,	0x11f175d9,	0xec78abf3,
-0x7b529eee,	0xd3a69fc3,	0x5b718676,	0x58214d29,
-0xa8bd2c34,	0x41ea00ab,	0xa03f64d6,	0x4ee342b0,
-0x32b1e444,	0x1c1801a4,	0xc8424702,	0x334a7e35,
-0x50cf1543,	0x3b22b495,	0x88683776,	0x8e2e0154,
-0x6155c033,	0x4e2fa6ac,	0x42ace700,	0x8d64f97c,
-0xaf9ced17,	0xb2a5cb92,	0xa558582d,	0x88705de7,
-0x9e528d59,	0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,

cpu/intel/model_6fx/microcode-m206f25c.h

diff --git a/cpu/intel/model_6fx/microcode-m206f25c.h b/cpu/intel/model_6fx/microcode-m206f25c.h
deleted file mode 100644
index b3fc781..0000000
--- a/cpu/intel/model_6fx/microcode-m206f25c.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m206f25c.inc  */
-0x00000001,	0x0000005c,	0x10022010,	0x000006f2,
-0xc335a60f,	0x00000001,	0x00000020,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x1b26fd03,	0xd21db0c4,	0x87a944f1,	0x8cef80a3,
-0x3c3a9518,	0xf997c9a3,	0x8ae424d2,	0xbe26d038,
-0x1dabd74d,	0xbaffdea0,	0xaf215749,	0x53734fce,
-0x838ef9b3,	0x0ad0b0ca,	0xe2a9c052,	0xfdd95e31,
-0x82909fc9,	0x749d2c92,	0x041f40d0,	0xee7145ee,
-0x984d8b58,	0x87a9612c,	0x85e1cd39,	0x00b8982c,
-0xcd4b8b89,	0x413f7e0c,	0xfb61c097,	0x142ca23b,
-0xb4b67950,	0x7993eb01,	0x775cbb24,	0xf54c5e0a,
-0xca3a75e0,	0x8b0813b8,	0xc43f37df,	0x6cb9b554,
-0x3930c5ed,	0x73b2a236,	0x85c157f7,	0xfe568382,
-0x76fd31fe,	0x17457261,	0xfa1412cd,	0x86448a5b,
-0x33980fc7,	0x2d136266,	0xe0ad02a7,	0x63a7c8f5,
-0xaf00a7c4,	0x6e42381b,	0x4e8342a5,	0x332132a0,
-0x46a315d1,	0xf9731223,	0xd35a1db5,	0x68b50e9d,
-0x88bf24ab,	0x800217db,	0x1e342281,	0xdba512ba,
-0x3b871e9d,	0x1bd639dc,	0x1a97daa1,	0x41af2d7e,
-0x952df8b6,	0xbada3006,	0x08fddce1,	0xe34a959b,
-0x5c531910,	0x895bcccc,	0x2fcc1f48,	0x9783d8fa,
-0x39ff2c01,	0x414ba021,	0x572df63f,	0x003b2f67,
-0x4c4c6a72,	0xb0afc9d9,	0xa7b8e94d,	0xcd352082,
-0x1e7e50aa,	0x08f598f5,	0xf9d7e716,	0xd5eb0993,
-0xd5d85c26,	0x14d076c6,	0xeaf56638,	0x84e6640a,
-0x4a4f9c0c,	0x18c42ac6,	0xd15efccf,	0xfcd0fece,
-0x23786f89,	0x5cf7ee38,	0xc19add2a,	0x79e4379a,
-0xd72da86b,	0x6afb109f,	0xe6c97926,	0x23c8fb90,
-0x1973cadd,	0x18ef8f6c,	0xa60f7f32,	0x82a703d0,
-0xaa4ea86b,	0x480e629f,	0x669a567f,	0xfb96cd0d,
-0xa4de47a4,	0xba0f960b,	0xfdf894cb,	0xfb912b44,
-0xee881cc8,	0x317d5142,	0x710f1bc2,	0x943ae93e,
-0xa4fe3c81,	0xd41dc286,	0x2a69726e,	0x58a26707,
-0xee2100f6,	0xd99caf57,	0x8b5cf30d,	0xe3ce8b5d,
-0xa0c1b8ec,	0x2d18eaf7,	0xf4f80641,	0x40a81b36,
-0xefb80e36,	0xb1e9e36a,	0x5778eb88,	0x237cdf8e,
-0x57e0982c,	0x0704a0b7,	0xe5ec18b7,	0x879a4b77,
-0x4d73dee3,	0xed5474ab,	0xad2f3bbd,	0x128f90fa,
-0x3942cf6c,	0x31e8f2c5,	0x79de27e3,	0x716494f9,
-0x84859866,	0x4c7d1b8c,	0x3e69016d,	0x60bf70e5,
-0xa41815cf,	0xc485381c,	0x54608b32,	0x8dd871d2,
-0x5219a77a,	0xa2fc8fe1,	0xa28b03a3,	0xad34e72a,
-0x110318f5,	0xa9a4ee25,	0x55d3fecc,	0x5a5b1e8c,
-0x5e19b54c,	0xb0d26cbf,	0xa7fea0cb,	0x70de1484,
-0xa378945d,	0x5d51d34c,	0xb3089cf0,	0xe43053f3,
-0xe5648b24,	0xbab5b02f,	0x9738d028,	0xbab02072,
-0xbc03a045,	0x3b4b177c,	0x2f72ac70,	0xb9f4eda5,
-0xbd55174d,	0x0f3048db,	0x4ca4cd60,	0xcb46d1a1,
-0xb3f0b47f,	0xfeaf6827,	0xfc544849,	0xd2ce07ee,
-0x20c69753,	0x2db12680,	0xb183035c,	0x59d61a7a,
-0x4b91945c,	0xed7f6218,	0x26c6037c,	0xee0221f7,
-0xafc3558b,	0xb0f29743,	0xfa546c22,	0x59d53087,
-0xe409381c,	0x51543c6f,	0x585aaf68,	0x1ecfe5ef,
-0x331ed250,	0xc7fc307f,	0x91dfb162,	0xa1e83b07,
-0x219b1a12,	0x5a64edec,	0xbcf5286b,	0x7794094f,
-0x644701ff,	0x3d8ae10a,	0xfb3db125,	0x9d79df0a,
-0xc9fdd39f,	0xe5357185,	0xad005070,	0xa314d7c3,
-0x124e8b8b,	0x76121ac5,	0xf5999ea3,	0x8930dfb9,
-0xaeb64cd3,	0xae41855a,	0xa6cba7d7,	0x82eae9c9,
-0xb0dd0b30,	0x47148188,	0xfe806db7,	0xda6f880f,
-0x60f27ef2,	0xc2030b44,	0xe8f282e3,	0xef0b91a7,
-0xcdf0264b,	0x08adedd8,	0x76cbc87d,	0x90b6152a,
-0x0adf2bd9,	0xf1eb69ab,	0x20e0c2ba,	0x29bfcbf2,
-0x00840a14,	0x9bfc2588,	0xb350d250,	0xe37594b7,
-0x9a067a97,	0xab9eb679,	0xdc70fcee,	0x1d353245,
-0x29dd940a,	0xfba0bd7c,	0x1973ebba,	0xfc240dfa,
-0xeff18193,	0x0a0e7a84,	0x03b980fc,	0x7b5168db,
-0x55267024,	0xb2bb9aa0,	0x6925594e,	0xd74d73e2,
-0x147f88d5,	0xf1b3bc2c,	0x39454e44,	0xb0fec6d3,
-0xd7bd797a,	0xbbf4b2a0,	0x2e6a5be3,	0x82ebae6d,
-0xa15daea7,	0xd60e451a,	0x5d8d0f66,	0x8ae1d84f,
-0x0d9f8140,	0xb4d182d0,	0x68494d71,	0xfcc24fc0,
-0xbd8651f6,	0xbfafbf94,	0xa1c48c01,	0x25dfca33,
-0x295562f6,	0x90adc9f1,	0x7fe85c82,	0x2733bf76,
-0x330593aa,	0x62d46cdb,	0xd1833fce,	0xf4ac17a0,
-0x5c30c745,	0xcd8e1527,	0x230bad60,	0x3b8fdffe,
-0x792ab8e7,	0x32d8c714,	0x431b7668,	0x68374de9,
-0x2fb8475c,	0x9d964710,	0xaf08fa18,	0x48fc9d57,
-0x4aa3d819,	0x1c2b0cb9,	0xda7d98a7,	0xa3f7ec81,
-0xbd3d0569,	0x6588348b,	0x04c268be,	0x505dac23,
-0x5beb56e3,	0x9d5e3c06,	0xa7f03e1a,	0xf62cc848,
-0x2db3b180,	0x2b3d12ab,	0x8cd03d1b,	0x2a9ae49c,
-0x8fa3adf4,	0x6702253f,	0x99377253,	0x6aec0f31,
-0x4215ff50,	0x45c2dde3,	0xaddd38e7,	0xe7a49181,
-0xb1c43888,	0x24f74abd,	0x69203a3c,	0x890f1a4f,
-0x80788351,	0xe0ab8cac,	0x3c4ae338,	0x50da6385,
-0x513c32b1,	0x2afb254a,	0xcb06e297,	0x197552f3,
-0xa3b8ea49,	0x8e3cbad8,	0x61e873a2,	0xea8b59e4,
-0xb40b0ad7,	0x044c43fc,	0xa8c7360b,	0x59297172,
-0xed906d04,	0x1d1f7d23,	0xfab0bf7c,	0x23747224,
-0x447b30f5,	0xf1721b28,	0xab9b996c,	0xe718dff3,
-0x54213508,	0xc9a902e1,	0x71955768,	0xcc7116db,
-0x915033bc,	0xf66cc5c5,	0x093713e0,	0x0a853e08,
-0x98d26732,	0x023b50a4,	0x6f4ad3a6,	0x2abe98af,
-0xb7ad44e9,	0x0561d975,	0x48655ae6,	0x56eab2e1,
-0x3ed80250,	0x0b2544de,	0x383307ad,	0xaf473f8c,
-0xba88886c,	0xd77d7479,	0x6f822580,	0x1233a6d1,
-0xbf4f8744,	0x49b3de29,	0x858c5f99,	0x7c35d06b,
-0x064ce53b,	0x9a819395,	0x05ba22b3,	0x45e85745,
-0x5062e9fb,	0x7ef4985a,	0x91f38b31,	0x106d0311,
-0x17f284dd,	0x7db3acce,	0xb77b1ecb,	0x5a669ab9,
-0xd5af93e6,	0xaaf20015,	0x446c0c78,	0x292635a9,
-0x53a2dd64,	0x9b7694ab,	0x6a22a17b,	0x31fa34a8,
-0xb4b22ce0,	0xde51fdf3,	0x50bbfa2a,	0x82cca0db,
-0x20a065ed,	0x49c0d99a,	0xc3a8086b,	0xc245fbb3,
-0xdb203f9d,	0x2e8d599c,	0x45acf14c,	0xc0e84739,
-0xd6e667c9,	0x759745ee,	0xf78afb3a,	0xdf1960ab,
-0x749d78d3,	0xebfd60d5,	0x38e9c925,	0x53769f42,
-0x204c68a8,	0x9a34d05b,	0xdb5e56a9,	0x666abcf2,
-0x3196e094,	0x9826ea35,	0x5f41cc1c,	0x8a550de3,
-0x113e7a6c,	0x7d10fae9,	0x692bca9b,	0x58570e7b,
-0xc56bbc50,	0x91250951,	0x5b640bd7,	0x9e544e5d,
-0xeb17dde7,	0x255174f1,	0x482a3a43,	0xd522a3cf,
-0x05d5c24b,	0xefb96af2,	0x8cbcfdec,	0x86dae21d,
-0x01b66bbb,	0xde764519,	0x05bf62d0,	0x2072a91e,
-0x43b8c445,	0xdce2e051,	0xb33dbbb1,	0x6ecd4ba3,
-0x42010827,	0x0d76e82b,	0x726f05eb,	0x2f8b2891,
-0x060125b6,	0xd7b11c1e,	0xed4a0b1f,	0x16ba2ff9,
-0x504bd2b5,	0x8ebeb436,	0x1c694ee1,	0x3c9055b5,
-0xd8cbfd47,	0x8b349768,	0x32bc9536,	0x59f7a205,
-0xd8952eba,	0xefcf4c28,	0x8aefc190,	0x810d79c4,
-0xba57969d,	0x8f58c0f0,	0xcd98ab53,	0x9c1c06ac,
-0x0dd44162,	0x7f9dc0dd,	0x190cde55,	0x45c8e757,
-0x7193f60d,	0x7cbca632,	0xc721c2c8,	0xace085f9,
-0x8c7d0202,	0x8d7107a7,	0x6bb4eeb1,	0x79e0f71f,
-0x6d807c6b,	0x1cc11126,	0xff71f823,	0x664125ee,
-0x7a7fd32b,	0xc3dbbdd9,	0xf3b34ff3,	0xd533c95f,
-0xe487f390,	0x4f8380b4,	0xf68ac91b,	0x03953d46,
-0xbe7ab73f,	0x8dda40b8,	0xac15af0f,	0x8dcab6e6,
-0xf68e1be4,	0xbe51fe0d,	0x23347015,	0x170073ea,
-0x6e4a1364,	0xcf708271,	0x184649f1,	0x1915e9b3,
-0x9f8b98f4,	0x4a96e734,	0x3081a08e,	0x3cfdf5d3,
-0x836b2412,	0x55b46bd5,	0x98013339,	0x8d142c58,
-0xdd5edd38,	0x57e67a01,	0x9f3ac916,	0x5de7375e,
-0x1e8db6f5,	0x3642b030,	0x9f3f52d3,	0x0d13c783,
-0x3d1206ec,	0x8545f3af,	0xa4f31ae1,	0x2e3c0129,
-0x66708818,	0xdf4a96db,	0x50ff060c,	0xa2642150,
-0xdf9df58c,	0x160d47ea,	0xb7ee65ee,	0xb28445a7,
-0xaf3f0f5e,	0x75b3c6a6,	0xd3c7484a,	0x1b549690,
-0xf4f0ed04,	0xb61dedcd,	0xbd57e8f2,	0xeba17757,
-0x83eca654,	0xd54cfb71,	0xa8e183a9,	0xbe3227a8,
-0x6f321d97,	0xd25abd41,	0x4e58e4b0,	0xb4284b35,
-0xcfe33780,	0x1a25e447,	0xf2f9ad56,	0x5585b9bb,
-0x4d90382d,	0x5fd92ce9,	0x1531afdd,	0x2f8e6e88,
-0x7a7a7f3f,	0x588f7292,	0xd5e8b818,	0xcc4fc966,
-0x3c8ad06b,	0x9145e687,	0x4d258e67,	0x5fae76cc,
-0x92a2c2c4,	0x1a0499ee,	0xbf754c4b,	0x644ccb7b,
-0xa99f20d0,	0x25fc626a,	0x00e136db,	0xaf43df3c,
-0x83ef88d4,	0xdc089216,	0x8b9bb531,	0x6897c80a,
-0xf9c63046,	0x2b3479ea,	0x2c7b9180,	0xce56fcc3,
-0x7272a0d0,	0x6bd774e6,	0x6af29640,	0xc7090bc3,
-0xd80cfef8,	0xe1858e84,	0x463db271,	0x691408ea,
-0xfe143fd6,	0x06ad4c18,	0x969bced5,	0x666431d9,
-0xe467b691,	0x2b077b31,	0xb6a12eff,	0x73e27a22,
-0x8cfdaf14,	0xc37667df,	0x508199e5,	0x8c74a9a0,
-0xe5e6568a,	0xab749682,	0x9a3f782d,	0x54bec389,
-0x58ef997e,	0x8f5abfac,	0xa397ccbb,	0x7fb7e75c,
-0xb153b2a1,	0x042197a7,	0x47a40db4,	0x515d555a,
-0x8c16e81f,	0xac4196f4,	0x3a98daa5,	0xc5c67c59,
-0xd6112948,	0x1328e4ae,	0xfba6ab9d,	0x47cb6983,
-0x24b5fcc0,	0x1fcd81b3,	0xc823e126,	0x351ae2b0,
-0xd37cf571,	0xb2a1e02c,	0x99f3bfb4,	0xf14cb17a,
-0xada36215,	0xf4c02d24,	0x4e743749,	0x0d6813ef,
-0xa3000b22,	0x23a513a0,	0xdecc7c3f,	0xd971f199,
-0x133a45f6,	0x1af56282,	0xd4f4320c,	0xfc71fbda,
-0x0846d1b3,	0xdc66fdc4,	0xf361c7c8,	0x7f3a6610,
-0xd1ae19bc,	0xe264b334,	0xf3606e31,	0x04f7e5dc,
-0xc72cd6ff,	0x781d6e3a,	0xe36fd40f,	0xba799753,
-0xad4d6d9b,	0x0d702541,	0x5072ce6c,	0xf8d93341,
-0x07f56a9d,	0x72db6e20,	0xb254fe22,	0x88df5a6a,
-0x4569508a,	0x52480b1c,	0x510b01f2,	0xd434a120,
-0xf8fff273,	0xd908fca0,	0x636c4ebc,	0x0234e212,
-0xaa42b087,	0x71676f12,	0x538d392e,	0x18704171,
-0xaa806c9e,	0x639ec9d1,	0xd11a846b,	0xb4456cbd,
-0x829bf03e,	0x4df0906f,	0x99863937,	0xf42d1a92,
-0x2a60caab,	0xed976817,	0xb5f1601b,	0xd9faa1e4,
-0x9c6f5310,	0xac160bad,	0x9c7b3bae,	0x57681b3a,
-0x483a0857,	0x03a080af,	0x045d7c94,	0x7bb24301,
-0x692b6af1,	0xba70957c,	0x2c5055ba,	0x895be04f,
-0x3e71c0ff,	0x9165b8bb,	0x7bc533bd,	0x3355ddd1,
-0x57ec4d50,	0xb268345b,	0x2711e040,	0x5b8c5792,
-0xfecc7a8b,	0x8462ae5d,	0x5ac5c5d8,	0x1cbf6807,
-0x1a3861e2,	0x1c976424,	0x283bd5f3,	0x31bd6a73,
-0x68c9de6e,	0x64770f4b,	0x904f104e,	0xba014c26,
-0xfe407ea0,	0xb04e487f,	0xf8cfa3fa,	0xbf173258,
-0xa1a0cf2f,	0x692b3200,	0x609abaea,	0xde11f4b0,
-0x29bca417,	0x514b30e8,	0x744e92c4,	0x424ed029,
-0xf42b530a,	0x7b70be34,	0x5b083aae,	0x414b9d11,
-0x1b3fc6e7,	0x9414edba,	0x8643fd9c,	0x088b23fd,
-0x309d1453,	0x7801d4ad,	0xdc7c28e5,	0xb1e84413,
-0x4d2e9157,	0x20cb06a2,	0xbd82a64e,	0x2f6b309a,
-0x9764f1f4,	0x31396c74,	0x059eca64,	0x941b4009,
-0xac093191,	0xd50a6cb9,	0x1dd9da8f,	0x817f804a,
-0xb907e66d,	0x78685370,	0x5d01f70f,	0x74c33b7d,
-0xac657774,	0x4fb10251,	0x82aa4504,	0x50bb021a,
-0xee72abc0,	0x85bec45d,	0x1563750c,	0xa288eee0,
-0xa7832733,	0x660113b2,	0xd71618ac,	0xc87934bd,
-0xe96101d1,	0x55d1976c,	0x471c8505,	0x7a36d839,
-0x5d62a9ee,	0xf3c54a8a,	0xa2be15d9,	0x244087c9,
-0x042c8037,	0x23224689,	0x281c5d73,	0x2139ecfc,
-0xffb8bc8a,	0x834fdd11,	0x9cd5a5bd,	0xa3368319,
-0x7e5bef0c,	0x4ae2dbda,	0x86d90089,	0x6675dfce,
-0x48876262,	0xcec72538,	0x11dc5c80,	0x86a730f9,
-0x313565c9,	0xe3e5be11,	0x106d7cce,	0x752b8be2,
-0x3d00a5bc,	0xe6f70e95,	0x44447ac8,	0x600df30c,
-0x8335ac3b,	0x8816ddee,	0x700982fe,	0xee495741,
-0x48c7e81c,	0xa3d55da2,	0xb0172982,	0x70ab2158,
-0xd4460621,	0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,
-0xa8454763,	0x70877bb6,	0x66005c97,	0xaf292c06,
-0x7b843db1,	0xf343b59b,	0x25cdc7b5,	0xa41da617,
-0x9e9d895e,	0xc936f475,	0x7270925a,	0x30024230,
-0x8e72f53d,	0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,
-0xfc18a2a3,	0xaf377cc1,	0xbff09a78,	0x4b4e0814,
-0x95a0b2c1,	0x270398de,	0x201fca94,	0x2a032a4f,
-0x131542b4,	0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,
-0xa814ddc9,	0xa3b3a991,	0x17ee60c2,	0x852c0b8d,
-0x11e5853a,	0x762002a7,	0x92c5311d,	0x0d4bf7e1,
-0xfffec870,	0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,
-0x0111a772,	0x9808e780,	0x29c336e8,	0xe9bc05df,
-0x5bedde11,	0x945565af,	0xaff808fe,	0x87e3423d,
-0x4de6f98f,	0x93b4adef,	0xbf704fa4,	0x09120e91,
-0xd54f3692,	0xdf8eab1e,	0xfabbf59c,	0xe74318be,
-0xaab87ffc,	0x29fa791c,	0xe3915552,	0xa652cb9b,
-0xa1252e74,	0xb35b723b,	0x542aa28b,	0x12fcc5b0,
-0x3941f962,	0x82bcc6cc,	0x47b11974,	0xb821611f,
-0x78b34250,	0xf1be5659,	0x561b9e61,	0x6f3bd501,
-0x584e6f5c,	0xd54ed547,	0xacebcd21,	0x7b5ff816,
-0xb64ad233,	0x9f2f330d,	0x69fb1ece,	0xac8710dd,
-0x58dc6c60,	0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,
-0xebc0ce9d,	0xa733274f,	0x884d9b55,	0x42b08b63,
-0xafa54a74,	0x1c7ccf64,	0x93a20191,	0xaaa3132e,
-0xc69831d1,	0x54634889,	0xfbfe3efc,	0xd3cf68d4,
-0x302e3117,	0xf5693131,	0xc3ce8c6c,	0x1f03cd89,
-0x6243334c,	0xf16bc80f,	0xdca5f130,	0xcb2cd956,
-0x4c1bb421,	0xe8de533c,	0x7f86703a,	0x29aa897e,
-0xdd54acad,	0x76b2f2ae,	0x7ef82b71,	0x2e30970b,
-0xba402597,	0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,
-0x7f9efd1c,	0x2363d147,	0x5327289a,	0xe89229f3,
-0xd63a535c,	0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,
-0x26b6edfb,	0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,
-0x6d65db4c,	0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,
-0xe20e6dbb,	0x8488a45f,	0x8ebc2932,	0xd4767316,
-0x3e8c4b8a,	0xbab7402c,	0xfc1e217e,	0xe5c5bf82,
-0x6928fe2e,	0xc88528e9,	0x4b2e4e8f,	0xdd938b86,
-0x0c964f98,	0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,
-0x197d005a,	0x4d40b3b3,	0xcf203155,	0x0d2fa621,
-0x752d2c58,	0xb12bac12,	0x1e7e8c23,	0x94215d54,
-0x9854a71c,	0x4de63c64,	0x7a012529,	0x9c171f8d,
-0x9e71def7,	0x3bd17d50,	0x11f175d9,	0xec78abf3,
-0x7b529eee,	0xd3a69fc3,	0x5b718676,	0x58214d29,
-0xa8bd2c34,	0x41ea00ab,	0xa03f64d6,	0x4ee342b0,
-0x32b1e444,	0x1c1801a4,	0xc8424702,	0x334a7e35,
-0x50cf1543,	0x3b22b495,	0x88683776,	0x8e2e0154,
-0x6155c033,	0x4e2fa6ac,	0x42ace700,	0x8d64f97c,
-0xaf9ced17,	0xb2a5cb92,	0xa558582d,	0x88705de7,
-0x9e528d59,	0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,

cpu/intel/model_6fx/microcode-m206f6d1.h

diff --git a/cpu/intel/model_6fx/microcode-m206f6d1.h b/cpu/intel/model_6fx/microcode-m206f6d1.h
deleted file mode 100644
index 6baefde..0000000
--- a/cpu/intel/model_6fx/microcode-m206f6d1.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m206f6d1.inc  */
-0x00000001,	0x000000d1,	0x10012010,	0x000006f6,
-0xc3efba8f,	0x00000001,	0x00000020,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x965c1896,	0xd07bfcf0,	0x7b07577a,	0xae971342,
-0xf109a79c,	0x7adfc4ad,	0x8d30b3ea,	0xfd218da2,
-0x576ff53a,	0xaa25accf,	0xe1201462,	0x53057f46,
-0xb5b48fbf,	0xc9cc439f,	0x7bb46e63,	0xbd48777f,
-0xce3fbcd0,	0x5537400b,	0xaa5e588c,	0xc0472d72,
-0x7ebdf968,	0x84cc404d,	0xfb638455,	0x7fb86b5f,
-0xa4df4b7e,	0xd2b8c2a0,	0x59c7e5dc,	0xafae5f50,
-0xdd3d9046,	0x7bb5160a,	0x996edf9c,	0xd47ba5c4,
-0x73871d20,	0xbd5c08c7,	0xf7a59a6d,	0x7a84b57f,
-0x9c21bba1,	0xd616a35b,	0x45a872a4,	0x9afaa4b6,
-0xd28a8a24,	0x65dcf000,	0xa7b4be6e,	0xdcf4e501,
-0x50793667,	0x8f0d4210,	0xdc642f39,	0x5bab5998,
-0x9dc8298a,	0xde24ef46,	0x7d723328,	0xb94f6da6,
-0x4ccdc7ee,	0x5af407d1,	0x58940773,	0x54d28c5e,
-0x37ef85e1,	0x422e2b5f,	0x5a0a0872,	0x54c48bd7,
-0x4f962349,	0x3cc4934b,	0x7e533da1,	0x4feb25fa,
-0x7b0cb744,	0x7d225464,	0x3bccb602,	0x59aa051a,
-0x6f398fa2,	0x18c51f3e,	0x54459025,	0x6d9dceaf,
-0x055d9e9b,	0x7efe8dae,	0x72a17959,	0x01811a1f,
-0x583c51e6,	0x55ac81a2,	0x1a9376cc,	0x5aa8113e,
-0x4314a883,	0x138f035d,	0x44543deb,	0x65e9e03f,
-0x0d51122a,	0x6b232988,	0x408aa9de,	0x00d3ee73,
-0x781c5d9a,	0x4d355629,	0x3db6ae06,	0x5bc49a15,
-0xbbf6254b,	0x1058555c,	0xabf3fe56,	0xbac5f1aa,
-0x0fb4eea3,	0xa7044771,	0x918ea94b,	0x2ea5bcd1,
-0xbd88c375,	0xb4705a29,	0x03b803a9,	0xa7b74bb2,
-0x8c13fad5,	0x375ff8ff,	0xaab2e276,	0x8979c51f,
-0x098b2df6,	0x8f182271,	0xb386996c,	0x04d7ea53,
-0x92c26118,	0xbac86438,	0x0ec1160a,	0xb6b03b6b,
-0x92f395e1,	0x2b5ac686,	0xf0b09a2c,	0x80b3c69d,
-0x4131f408,	0xea12b43b,	0xbcfd7084,	0x693069ff,
-0xe7990a85,	0x95ac7010,	0x4e91ad6e,	0xe1b2e425,
-0xaf37d653,	0x66e4b544,	0xcdde3ff4,	0xa63bf453,
-0x4b184f82,	0xef944bb4,	0x9f8afede,	0x4f430188,
-0x919ce98c,	0x9b4ad7c8,	0x21fa468a,	0xbeff7800,
-0xb3633a42,	0x0579bb57,	0xd17b1e46,	0xa4f7ff99,
-0x4f91aee3,	0xc9b3255c,	0x8a8300bf,	0x42056f14,
-0xc17cb77a,	0x82f52e66,	0x69bd0ec5,	0xd296ddaa,
-0x812ae627,	0x70984d16,	0xf406c97f,	0xa66aa1e6,
-0x71133e80,	0xd3183ef0,	0xec6e1000,	0x6e6ddc92,
-0xb4b6cd65,	0xfeb1cb8f,	0x4299c5ed,	0x904ae993,
-0xf0ae54c1,	0x6df419d3,	0xd618c06c,	0xee54a554,
-0x0f5c2b74,	0xc8381eb6,	0xc0cf3bf7,	0x218ef2ba,
-0xc1634787,	0xe11b8a39,	0x63207574,	0xd776a45f,
-0x815f2d29,	0x79be3345,	0xf6a0927e,	0xa4ce7be5,
-0x74aff413,	0xd452cb84,	0xa1458f9e,	0x7adef9e3,
-0xd8e274b1,	0xafa5960c,	0x799da850,	0xfef34e22,
-0xa758da76,	0x5e630c23,	0xf3a68c80,	0xae7d4996,
-0x554f1a6f,	0xf5630c09,	0xa59ba003,	0x7807f81a,
-0xf673536d,	0x876c9b85,	0x789609b7,	0xf93183fa,
-0x87313765,	0x7f1a44c3,	0xf0700569,	0xa600f7e8,
-0x741e8329,	0xdd3bd56f,	0xad068c42,	0x7f5d2cf2,
-0xdf4794c6,	0xab6b86ad,	0x7872cec5,	0xf2f9599f,
-0xa91ee6dc,	0x5a460e1d,	0xf18b4bad,	0xab495927,
-0x505b65f7,	0xf1a114b2,	0xaa37286f,	0x71513b34,
-0xff986d2e,	0x86bac264,	0x71da4aed,	0xfb3a2c4b,
-0x8f842ddf,	0x78a9a377,	0xff3239c6,	0xa6345d94,
-0x747ad071,	0xd6f7c5c9,	0xa678fed5,	0x7f0cfeaa,
-0xdec60ade,	0xae8fba4f,	0x716a0e60,	0xfeadaf5b,
-0xa0e990ec,	0x5fa5fa56,	0xf870a292,	0xad70c6b2,
-0x5eb0d3c1,	0xfef7bf57,	0xa8d267b9,	0x76038748,
-0xfddfb4dd,	0x872c4a1b,	0x7960b633,	0xf16806bd,
-0x89ab2ddd,	0x7a2a82a9,	0xf731e57e,	0xa22afa6b,
-0x76b1fdfa,	0xd7082969,	0xa7f8ba1c,	0x78e23df4,
-0xd3f35a7c,	0xad3d911f,	0x74a8b545,	0xfcfd9792,
-0xba5e1451,	0x59f7d9bc,	0xbaeda3ca,	0xbc7942a8,
-0x005f88b6,	0x9b473913,	0x957fb16c,	0x090a1e4f,
-0x9857a526,	0xb388013f,	0x78436ae8,	0x863e14b7,
-0xc2481047,	0x6d7d1f14,	0xba316aa1,	0xe618e170,
-0xb572713e,	0x9658a65f,	0x6452e9c4,	0xa06d79b8,
-0xfd3de8fb,	0x7b140dd4,	0xb938cd37,	0xdeebab99,
-0x46eabc7a,	0x94d8ea64,	0xcedfdce7,	0x50efb74c,
-0xad825cbc,	0xd6a152d3,	0x6159e62c,	0x8bd4febc,
-0xed549a2b,	0x4d0bf09a,	0xacc16fe1,	0xedb278aa,
-0x4f32c37f,	0x86eaa5eb,	0xf1be8b78,	0x46a61b93,
-0x9811b38f,	0xdec9cfa5,	0x42a34f6c,	0x90e2ede0,
-0xd13cc49e,	0x623eee02,	0x8189f59c,	0xd3433e52,
-0x52b6ed15,	0xae8482c0,	0xbaee309f,	0x56354579,
-0xe6ce3c6a,	0x96db7391,	0x625abb50,	0xef5854f0,
-0xa43426ae,	0x442cdfc6,	0xe4602733,	0xa83eb9b3,
-0x465a1b35,	0xeb2256b3,	0xb63a3154,	0x62c3a1b8,
-0xfde482b9,	0x99737daa,	0x7e530510,	0xf8fa3165,
-0xa10d46ac,	0x56f83fe6,	0xee481fa5,	0xaaa15251,
-0x5a75a55a,	0xcfd712fd,	0x9294efd7,	0x5fe5fdbc,
-0xc1d21d02,	0x907fe631,	0x6335b67f,	0xe85c257d,
-0x825f4903,	0x479dc9e4,	0xc1ad5263,	0x8dc07e28,
-0x4e8c04de,	0xed66882b,	0x9bc134a2,	0x4fae29a0,
-0xc3b14dd0,	0xbbedf12d,	0x71af0dd1,	0xc45ac637,
-0xa9a23629,	0x56c717a7,	0xc8839126,	0xa95d3818,
-0x4d1883a8,	0xee22ccb7,	0x872dadcf,	0x4f5fa1f5,
-0xcce09dc2,	0x8087ccca,	0x6776dfbb,	0xe88d972f,
-0xa0a9d198,	0x441d4457,	0xe978e2ed,	0xa44e64f6,
-0x6424cfaa,	0xc472723c,	0xbe30df8f,	0x6883f963,
-0xb8852598,	0x9db3cb5c,	0x3a1a3557,	0xbce352d4,
-0x8940c762,	0x1f6b8a25,	0x962dce30,	0x828f5d7a,
-0xb3d070a1,	0xb5b0e263,	0x40c38cde,	0xaa4ec1aa,
-0xd931d522,	0x74659a76,	0x9e267123,	0xd871e8b9,
-0xe98cf852,	0xbf71b5f5,	0x3d1d1eac,	0xec90e42b,
-0xf736f07c,	0x15e44e49,	0xddcb61f3,	0xf2ca5be7,
-0xabe43619,	0xf18b2b9b,	0x0fd5da9f,	0xa6ad309c,
-0x801c0d47,	0x08720cfb,	0xa62d6657,	0xa3f31d88,
-0x2be04e92,	0x88db11f5,	0xa9dce31f,	0x2b111b18,
-0x8bd6d20a,	0x8b951802,	0x039a5ba3,	0x85b6c291,
-0xa12e473e,	0x232f5873,	0x94eabc8b,	0xa1598ffa,
-0x1d48c2e6,	0xbdf9104f,	0x98e7c969,	0x1a41bca8,
-0xa0576ec1,	0xb18dda12,	0x136cb6bc,	0xa75fa561,
-0xb1d79465,	0x3027664a,	0x9aa1c631,	0xba80b56d,
-0x4a384b65,	0xbe506ee3,	0xf4fa3413,	0x4566fff0,
-0x93c3d3bb,	0xf7f20b82,	0x5d06c988,	0xb92840af,
-0xc35c38e0,	0x75d02992,	0xb93925fc,	0xc7132e92,
-0x79515935,	0xbaa38295,	0xd76b3e7f,	0x5fca8ec2,
-0x236451ff,	0xf0b960f5,	0xdd3d1989,	0x26ca6797,
-0xf1cc386a,	0xf07077a8,	0x314de9a8,	0xf51898be,
-0xeeebc84a,	0x1aa25331,	0xdf7d00e3,	0xe658ddf8,
-0x6dc0ae0f,	0xf17adc4e,	0x89f8eb60,	0x6b36d821,
-0xcf2fff4f,	0xa3ace7f9,	0x66da4d8d,	0xc6b6664c,
-0xa0b097c2,	0x47206aa4,	0xe05fe51f,	0xadde146d,
-0x21df0004,	0xc96371bb,	0x89297ecc,	0x254cd3e9,
-0xa3f17bc0,	0x80e975c5,	0x2d13a802,	0xab65c08d,
-0x005b1324,	0x2e2672a2,	0x78b456e8,	0x10f56e75,
-0x5d49599d,	0x45961097,	0x29d48e70,	0x59786d0e,
-0x978b7a65,	0x031b3349,	0x9f3660c1,	0x929deec1,
-0x0c98ccab,	0xbfce15f1,	0xa5bfe421,	0x0518f937,
-0xe2009224,	0x88c5ed01,	0x273e02e2,	0xfe545e31,
-0xe466b269,	0x355376ed,	0xd99efbda,	0xc5383a2d,
-0x4677d091,	0xffc53c06,	0xaa60c17f,	0x4c8548d7,
-0xeecc7086,	0xa75068f2,	0x7c738226,	0xcc45c6c3,
-0x9079c770,	0x5b5b1301,	0xc8c56803,	0x98f4818d,
-0x4cafe5f9,	0xc6e89794,	0xac14abdc,	0x6c8edc5d,
-0x5eed56b6,	0xcb18bd4c,	0x8d078ccf,	0xd8e76429,
-0x24edeba0,	0x3722ecf0,	0xae8812de,	0x9bae67d7,
-0x42fd6237,	0xf62ba0ec,	0xe5b29dd1,	0x11b3e084,
-0xbecd5671,	0x71151130,	0x5f70f6f9,	0x2d379832,
-0x5aa1c8f1,	0x20870270,	0x07383de8,	0x27d9a443,
-0x6db700e6,	0x749fe33e,	0x62bab353,	0x168efc05,
-0x19e1048f,	0x051f0c5e,	0x779bf311,	0x794b272b,
-0x19d28256,	0x3b6ce30a,	0x629082d9,	0x5d457c5e,
-0x550e1243,	0x4e8abe63,	0x34daf454,	0x71345026,
-0x45bdda51,	0x2035271b,	0x7765b4a1,	0x572018a7,
-0x0ed79a6e,	0x7fb5b549,	0x79538268,	0x07156ddc,
-0x6efb9d55,	0x7dd30110,	0x1267cb93,	0x67474355,
-0x78246bb1,	0xd6516c07,	0x62de23f4,	0xb8923432,
-0xf97c03e5,	0x3ef87b93,	0x9a339985,	0xaac3a049,
-0x167acc56,	0x5fbd0ab1,	0x8354dcf9,	0xdbb05773,
-0x29e7f000,	0x2bdf8ea7,	0xa53839c8,	0x817b3a47,
-0x285a8fc1,	0x70a54363,	0x860f1453,	0xffcffe84,
-0x1c4e0572,	0x95121a39,	0x9a2dc3ce,	0x0468d9fc,
-0xfdf89cf0,	0x94f0c5a3,	0x6bd7da9d,	0xf833f8a8,
-0xbf98e9c7,	0x353238eb,	0xd45d39e8,	0xee15e325,
-0x51e274af,	0x8a280503,	0x8fe0a88f,	0x08e261f0,
-0xcb66652a,	0x2b748738,	0x40bd97f1,	0x66a589d8,
-0x77db4e3d,	0xf8334db7,	0x3eed90b4,	0xc481bf68,
-0x82847bf8,	0xe0ecdd49,	0xb6ca5eff,	0x5301c380,
-0x9ee2877c,	0x315e438b,	0x21781354,	0x1a6e7b41,
-0x35d5e2f7,	0x24d3f7ee,	0x1ec61d3e,	0x37b651f3,
-0x2e2c7339,	0x60422031,	0x34e33094,	0xa4e65a14,
-0x6d066d40,	0x9e69aa1f,	0xa24e37e6,	0xcedd4254,
-0x9eb7ae70,	0x51fd30f8,	0xce68f293,	0x6ccb8e2c,
-0x52aa81dc,	0x71d3cee0,	0x689c8c49,	0xeb351c4e,
-0x788e13cf,	0x9f9db68c,	0xe777e2f0,	0x85938dc4,
-0x92a16bb7,	0xdd044ca2,	0x880cecb5,	0x92decc36,
-0xf86af1ba,	0xda55b5b3,	0xb28f3b76,	0x94564dfc,
-0xd8d99fec,	0x991b65f3,	0x9b9cede6,	0xfea11102,
-0x9433fcea,	0x30eb5261,	0xf76a6e8c,	0x31a6d55e,
-0x361f4786,	0x03866a0d,	0x37747762,	0xa028ed03,
-0x6a1ba8ce,	0x9cacf9e9,	0xc9374f85,	0xaf5a0445,
-0x9132ee48,	0x3e81072b,	0xa5bcc165,	0x6accdf99,
-0x306b1dfd,	0x356e4825,	0x6c0b8fb6,	0xa20f99d5,
-0x34804212,	0xd88562a2,	0xa792e8aa,	0x84c5a856,
-0xdb3a4bfc,	0x5f299b3b,	0x8433db39,	0x2f7cb314,
-0x5ba4678a,	0x28b937a2,	0x2592b791,	0xfdda8a10,
-0x2db307b0,	0xd5f6d980,	0xfd81c0f6,	0x2e77ab1b,
-0x2668eefa,	0xe2cc4cf7,	0xddf6e022,	0x336921cb,
-0x9879f6b3,	0xfb6d8af0,	0x46ff44ec,	0xbb1bc99c,
-0x5f2c45d9,	0x4697780f,	0x1a988d70,	0x597fea79,
-0xeee72ecd,	0x7cdcfd9e,	0xf862c760,	0x82596552,
-0x823268c2,	0x66441964,	0x7a0e57cc,	0x1d4aa66a,
-0xf9fa81df,	0x286c2a30,	0x8834aa62,	0xab542b93,
-0x818b871a,	0xbf9502fb,	0x0743b800,	0xba47f765,
-0x74b3468a,	0x0d51147c,	0x7c3eb6d6,	0x7ed21418,
-0x8d7b2c3e,	0xe13ed619,	0xfdd84fcc,	0x150816bc,
-0x81a852fe,	0x1f2bb352,	0x7d73f5bf,	0x6c81082c,
-0x495c219d,	0x892f3812,	0x3691f3c4,	0xb4bc18a7,
-0x3bcb6f5a,	0x3d01dada,	0x0627f1b8,	0x3467560d,
-0xc57c882a,	0xdd770d9b,	0xc3c2122b,	0x1c33cb75,
-0xfc35153d,	0xff362278,	0x3c05fb69,	0xc0785f67,
-0x0c82b867,	0x5ce4d4d1,	0x37b1f461,	0x61ce39b5,
-0xfcd1ee1c,	0xb97df3e6,	0xc18c360b,	0x70e4aadb,
-0x0422113d,	0x3b29697c,	0xc372ed8e,	0xf03e7f1b,
-0x72ad4e52,	0x9aa15d93,	0xb819d0f2,	0x235cb721,
-0x6bb77b8c,	0xd9d5a960,	0xd91b4329,	0x07170cca,
-0xee427a42,	0x0456c1ed,	0x3181ca96,	0x3a73db14,
-0xe1baa271,	0xfb099171,	0xd0e7d92a,	0x222bedfe,
-0xada12d33,	0xfbe26e2b,	0xd71618ac,	0xc87934bd,
-0xe96101d1,	0x55d1976c,	0x471c8505,	0x7a36d839,
-0x5d62a9ee,	0xf3c54a8a,	0xa2be15d9,	0x244087c9,
-0x042c8037,	0x23224689,	0x281c5d73,	0x2139ecfc,
-0xffb8bc8a,	0x834fdd11,	0x9cd5a5bd,	0xa3368319,
-0x7e5bef0c,	0x4ae2dbda,	0x86d90089,	0x6675dfce,
-0x48876262,	0xcec72538,	0x11dc5c80,	0x86a730f9,
-0x313565c9,	0xe3e5be11,	0x106d7cce,	0x752b8be2,
-0x3d00a5bc,	0xe6f70e95,	0x44447ac8,	0x600df30c,
-0x8335ac3b,	0x8816ddee,	0x700982fe,	0xee495741,
-0x48c7e81c,	0xa3d55da2,	0xb0172982,	0x70ab2158,
-0xd4460621,	0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,
-0xa8454763,	0x70877bb6,	0x66005c97,	0xaf292c06,
-0x7b843db1,	0xf343b59b,	0x25cdc7b5,	0xa41da617,
-0x9e9d895e,	0xc936f475,	0x7270925a,	0x30024230,
-0x8e72f53d,	0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,
-0xfc18a2a3,	0xaf377cc1,	0xbff09a78,	0x4b4e0814,
-0x95a0b2c1,	0x270398de,	0x201fca94,	0x2a032a4f,
-0x131542b4,	0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,
-0xa814ddc9,	0xa3b3a991,	0x17ee60c2,	0x852c0b8d,
-0x11e5853a,	0x762002a7,	0x92c5311d,	0x0d4bf7e1,
-0xfffec870,	0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,
-0x0111a772,	0x9808e780,	0x29c336e8,	0xe9bc05df,
-0x5bedde11,	0x945565af,	0xaff808fe,	0x87e3423d,
-0x4de6f98f,	0x93b4adef,	0xbf704fa4,	0x09120e91,
-0xd54f3692,	0xdf8eab1e,	0xfabbf59c,	0xe74318be,
-0xaab87ffc,	0x29fa791c,	0xe3915552,	0xa652cb9b,
-0xa1252e74,	0xb35b723b,	0x542aa28b,	0x12fcc5b0,
-0x3941f962,	0x82bcc6cc,	0x47b11974,	0xb821611f,
-0x78b34250,	0xf1be5659,	0x561b9e61,	0x6f3bd501,
-0x584e6f5c,	0xd54ed547,	0xacebcd21,	0x7b5ff816,
-0xb64ad233,	0x9f2f330d,	0x69fb1ece,	0xac8710dd,
-0x58dc6c60,	0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,
-0xebc0ce9d,	0xa733274f,	0x884d9b55,	0x42b08b63,
-0xafa54a74,	0x1c7ccf64,	0x93a20191,	0xaaa3132e,
-0xc69831d1,	0x54634889,	0xfbfe3efc,	0xd3cf68d4,
-0x302e3117,	0xf5693131,	0xc3ce8c6c,	0x1f03cd89,
-0x6243334c,	0xf16bc80f,	0xdca5f130,	0xcb2cd956,
-0x4c1bb421,	0xe8de533c,	0x7f86703a,	0x29aa897e,
-0xdd54acad,	0x76b2f2ae,	0x7ef82b71,	0x2e30970b,
-0xba402597,	0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,
-0x7f9efd1c,	0x2363d147,	0x5327289a,	0xe89229f3,
-0xd63a535c,	0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,
-0x26b6edfb,	0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,
-0x6d65db4c,	0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,
-0xe20e6dbb,	0x8488a45f,	0x8ebc2932,	0xd4767316,
-0x3e8c4b8a,	0xbab7402c,	0xfc1e217e,	0xe5c5bf82,
-0x6928fe2e,	0xc88528e9,	0x4b2e4e8f,	0xdd938b86,
-0x0c964f98,	0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,
-0x197d005a,	0x4d40b3b3,	0xcf203155,	0x0d2fa621,
-0x752d2c58,	0xb12bac12,	0x1e7e8c23,	0x94215d54,
-0x9854a71c,	0x4de63c64,	0x7a012529,	0x9c171f8d,
-0x9e71def7,	0x3bd17d50,	0x11f175d9,	0xec78abf3,
-0x7b529eee,	0xd3a69fc3,	0x5b718676,	0x58214d29,
-0xa8bd2c34,	0x41ea00ab,	0xa03f64d6,	0x4ee342b0,
-0x32b1e444,	0x1c1801a4,	0xc8424702,	0x334a7e35,
-0x50cf1543,	0x3b22b495,	0x88683776,	0x8e2e0154,
-0x6155c033,	0x4e2fa6ac,	0x42ace700,	0x8d64f97c,
-0xaf9ced17,	0xb2a5cb92,	0xa558582d,	0x88705de7,
-0x9e528d59,	0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,

cpu/intel/model_6fx/microcode-m206fbBA.h

diff --git a/cpu/intel/model_6fx/microcode-m206fbBA.h b/cpu/intel/model_6fx/microcode-m206fbBA.h
deleted file mode 100644
index f0c38d5..0000000
--- a/cpu/intel/model_6fx/microcode-m206fbBA.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m206fbBA.inc  */
-0x00000001,	0x000000ba,	0x10032010,	0x000006fb,
-0x9777492e,	0x00000001,	0x00000020,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x000000ba,
-0x00000035,	0x2a000000,	0x20101002,	0x000002f1,
-0x00000001,	0x000006fb,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x21d97964,	0x9846e570,	0x1d30fb85,	0xb909572f,
-0x88a15af6,	0xcff6f5d8,	0x01ade078,	0x72eac781,
-0x58d10d9f,	0xb7f2421d,	0xe4d5fcf1,	0x02889a15,
-0xad9bed07,	0xa32ab3e6,	0x3491afcc,	0x9c991c37,
-0x2a1c2071,	0xf066191a,	0x3bd898e7,	0x2648d958,
-0xc05f7908,	0x05864b9b,	0xbe4c1eee,	0x1e6c7ef4,
-0x0e7a539e,	0x100b2ab3,	0x1273dceb,	0xfec8847d,
-0x8f37946f,	0x634e3b5c,	0x691dbd61,	0xd89e3cb9,
-0x094639d4,	0x7d972e1a,	0xd6dbd94d,	0x2001c3ec,
-0x34f791f0,	0xeee0d794,	0x88b7459d,	0xc2c73aa3,
-0x607a174d,	0x4f0f8304,	0x65790b35,	0x00532bfe,
-0x1fd1e0cc,	0x7b91f873,	0x154ed42b,	0x7a7108e9,
-0x81637c95,	0x192cb173,	0x28ccd94e,	0xb9bcc372,
-0xac05171b,	0x867f47da,	0xf8e8c47d,	0x1edcdb4a,
-0xd2ca6c2d,	0xe9ee9169,	0x5a6efedc,	0xb6825038,
-0x09277eaa,	0x2a34e580,	0x0f794366,	0x86c99402,
-0x211b98bf,	0xdf8eb0e3,	0xda11d7bd,	0xd440363e,
-0xa7d49f1a,	0x16dd7395,	0x5b23c2fc,	0xab93ea3c,
-0x00000011,	0x3e547655,	0xa3c23fd3,	0xc4b7878e,
-0x8783318c,	0x52cc22bf,	0xaf347896,	0x54342107,
-0x72c7bb6c,	0x3e13b80d,	0x46bc1a33,	0x23cfc252,
-0x0d4ef13b,	0xc21dc600,	0xdb9ec613,	0x0899f190,
-0xafbb3213,	0x0652ed0a,	0x739aaabe,	0xa4d1ce13,
-0x0fb0b628,	0x1270dc1a,	0xb6d7833f,	0x6846a946,
-0xbc8adbe3,	0xb9f43c78,	0x2008edcb,	0x5a9c34a8,
-0xb38931a2,	0x0c0a82a8,	0xf1e458a2,	0xa20645df,
-0xcb6bb4ee,	0x85c91f0c,	0xed3e330d,	0x76c74422,
-0xdde7d6a0,	0x0af339f8,	0x1a7c4dbc,	0xe79f6e3a,
-0x73b720c9,	0xe1e83952,	0x686f7729,	0xf1925af1,
-0x2b154459,	0x1c540322,	0x5ec2fc7d,	0x87597cd3,
-0xb2031f29,	0x94589a6d,	0x55c3330e,	0x33af7895,
-0xedd71f83,	0xa5a11a4a,	0x4bc706ed,	0xf6f04df1,
-0x724cad51,	0x0a677c56,	0xd0356d3b,	0x6068e86c,
-0xd74f070f,	0xc07b0e3a,	0xa0b98d7d,	0x0041181d,
-0x79266ba5,	0x3ff83201,	0xd1b327ee,	0xaf55f568,
-0xe936acaf,	0xaa5dca57,	0xdeae2b1a,	0xd6643058,
-0x389cec0d,	0x7e524e3c,	0xb0b13d46,	0xbe0722c4,
-0x4fe4f260,	0x6569767a,	0x4ded63fd,	0x03474b65,
-0xe1875127,	0x328e6736,	0x2166cb67,	0x50ee94e8,
-0xd0a26ea2,	0x9751ca79,	0x22c0a65f,	0x5c458980,
-0xe9b9c62f,	0xa13221b6,	0xb43292db,	0x36e2b143,
-0xff8ba502,	0x3f42d32d,	0xd043d05c,	0x77bd8a19,
-0x9a652b71,	0xaae1b2d0,	0xe490085a,	0x181145c7,
-0xbfc061c4,	0x18bfd9b0,	0x22b830b4,	0x5201a02d,
-0x5651bc35,	0x535005f8,	0xcbe674e1,	0xe78d03ce,
-0xc52d0fa2,	0xc8b78a1f,	0x1b694c97,	0xce0e7567,
-0x0f2229de,	0x98c847cc,	0xe68554d7,	0xf9864b16,
-0x3cc47a83,	0x941221d2,	0xcc3a7ef4,	0x0170bb22,
-0xc9053a4b,	0x9c7721de,	0xed941a9b,	0x8be05de7,
-0x2f42fd5e,	0x36b0a67f,	0xb306a1f5,	0x34abbc36,
-0x24c17625,	0x6a3de329,	0x01988238,	0x066a1868,
-0xafca471d,	0xd2adc39b,	0x813525b3,	0x00a0acf5,
-0x2aa361cf,	0x4dbe173e,	0xdaf77894,	0xaa889ded,
-0xa3697b54,	0x80d26705,	0x0c2da0f3,	0x58a4b8a4,
-0x39cc0d4e,	0x3c9d4670,	0xd2b5d20e,	0x2724e973,
-0xb1351d5c,	0x20906d79,	0xe24891e5,	0x2035c218,
-0x4e0139ea,	0x56be6bd7,	0x083b0550,	0xbb402759,
-0xfd95c78d,	0x9fb7daa5,	0x60175f4c,	0x32446eb0,
-0x5021b32b,	0xa772bf99,	0x377195f7,	0x442fb939,
-0x4425cf3f,	0xd0413035,	0x515c39e8,	0x869ee778,
-0x8d4c2561,	0x826a5d49,	0xba1d315e,	0xd850a5b1,
-0x3241090d,	0x4bc25949,	0xa08b2d5e,	0xb69c0931,
-0x7c510465,	0xffb294e3,	0xbd919d03,	0x591938b8,
-0x66fce51e,	0x1da2e975,	0x513c2611,	0xd2c89b3b,
-0x55fa8777,	0x7287353f,	0x0e53d7f5,	0x409d5772,
-0x2db94ea8,	0xde0e9927,	0x8a1e2ac7,	0x1f7ec493,
-0x61089e93,	0x6abe868e,	0xc0df9a96,	0x4436a57d,
-0x0c48c8b0,	0xa247ee28,	0x141d6787,	0x1b12b920,
-0x2e21a991,	0xf0ff3f1d,	0xab4b5b32,	0xc0a0ca68,
-0x430e80d8,	0x8d74a965,	0xb54d5f63,	0x5d68e9e4,
-0x6b548ee8,	0xf047d59a,	0x3b4789f9,	0x21b5069c,
-0xf913817b,	0x732e9a9d,	0x2874cc28,	0xa9627bc0,
-0x6fdb58d6,	0x13587cf9,	0x39ce92e1,	0x36b9492d,
-0x5408f555,	0x8ffe55ba,	0xb43c9df5,	0xfac29337,
-0x56cbe2b3,	0x0185d1ed,	0x9be346e7,	0x40a19df7,
-0x3c1a2895,	0x4d26af1f,	0x45a55ab6,	0xa842ab52,
-0x1f747d77,	0xe0d9102c,	0xf971b544,	0x7ee0828a,
-0xfe3c6fac,	0x25395596,	0xc9b47fa3,	0x156ce98b,
-0x8f31e2b0,	0xb6e25664,	0x9640f47b,	0x8ac2d5bf,
-0x840e6610,	0xa97a44b9,	0x3fdc0ea8,	0x06910a51,
-0x2091b59a,	0x9c2e5439,	0xf8842451,	0x3f9a4ff3,
-0x362a0004,	0x12dad719,	0xb2f60dd0,	0xa97a0474,
-0xfa3560c2,	0x7fd81bf8,	0x57f7532e,	0x23486049,
-0xaafefb9f,	0xc66725ee,	0xdb9cd720,	0x63f4e092,
-0xd0a26789,	0x64b0aa78,	0x58af8ea1,	0x585d3712,
-0x1fd2f90f,	0x8e0574b1,	0x50e4b136,	0x2c1dbb31,
-0xc02feb6b,	0xa2714a85,	0x9130f487,	0x4a1253c2,
-0x6bad5346,	0x546c4765,	0x4fd9e206,	0x1e958eea,
-0x9015b920,	0x50328bec,	0x1cb229f7,	0xe68970ce,
-0x6596e986,	0x5bc7ebcb,	0x68a13530,	0x773e1ef7,
-0x705d8d8e,	0x58a4be35,	0xd1b47b52,	0x0c1d7eb9,
-0x94c9bb62,	0x9f8b78f3,	0xeb6f4c67,	0xe1359c6a,
-0xcc9bb75c,	0xc58dbc28,	0x53972a64,	0x1e077ac9,
-0x30b94c6d,	0x85bd7fca,	0x834a8432,	0xa56b0993,
-0xe8298659,	0x75f7aa51,	0xeff8d034,	0x89ff3761,
-0xe5280f0a,	0x62dc4a8e,	0xa3993ac8,	0x71122e79,
-0xd47785e2,	0x34158175,	0x63c8d85b,	0x7ac99eef,
-0xe0bd1e85,	0xd34d96cb,	0xb98776ef,	0x2ced7ad0,
-0x8de1a90b,	0xb91c6986,	0x031585b2,	0x945f0055,
-0xd619c86e,	0xbcd30cf2,	0x4bf7ffbd,	0x723a068b,
-0x19063c35,	0xb1a0bf7e,	0x76712f67,	0xd4a648d3,
-0x2eac160d,	0x284404e3,	0xc8a18a02,	0x2ff33921,
-0x8d56011a,	0xfda7cc43,	0x41e15608,	0xec688d2d,
-0x648eb60c,	0xe67029e2,	0x481e2a28,	0x82748afd,
-0xd243f0e6,	0x7d48b037,	0x8911dd57,	0x9876663d,
-0xdfc8715f,	0xa725ff6a,	0x18ceae0c,	0x571c5836,
-0x017ec3a0,	0x23e2b7bc,	0x8a19e5d1,	0x49f1ad67,
-0x6eb53ff0,	0x70d5e83f,	0x8d587f1b,	0x9fcd1b0d,
-0xb77c9c28,	0x0fa9ffc9,	0x2567087e,	0xd2626fa6,
-0x13a3d9f8,	0x327f16ea,	0xcf6c283d,	0x9cb948d5,
-0x82d61c27,	0xee7df429,	0xdba4362f,	0x873cd73f,
-0x3ea8c681,	0x99914378,	0x3cdb5ad8,	0xaeb85eef,
-0x10100fbb,	0xc99eba28,	0x55f32c4d,	0x676315eb,
-0xe78da6bd,	0x341f250b,	0x0139763f,	0xf9bcdd95,
-0xee95a716,	0x477450bf,	0x0655a8ec,	0x82ba0c7b,
-0x1f8140ba,	0x1ce6ade2,	0xb395d6bd,	0xe420cc72,
-0x00c9379f,	0xd499a95a,	0x04212c33,	0xe02ccdcf,
-0x01ec3905,	0x23d2c3e9,	0x105c1fc3,	0xedf2f621,
-0x0d2e782a,	0x24f4ed1b,	0x8c8e6bfa,	0x43881813,
-0x67bd4cd1,	0x529b5f8c,	0x7dce8273,	0x792b3c08,
-0xd6d49290,	0x141eb20d,	0x90198577,	0x461a9ca2,
-0xe3ce9501,	0xc1888a85,	0x904ce501,	0x04ab4ef9,
-0xfe292a8f,	0x3aded4f3,	0xa9c4673a,	0x384ba9ca,
-0x092f1252,	0xc0464403,	0xcba863b5,	0x509464ba,
-0xe11d075b,	0x26f1c460,	0x167b95ce,	0x4cec6a27,
-0x1d4845f5,	0x4e8a1314,	0x857e5e97,	0xb7195631,
-0x0378dee2,	0xf461bbd3,	0xc8bfc18d,	0x4587627b,
-0x0cb224e9,	0x0332b337,	0x4d566685,	0xbb52863d,
-0x98f4e44f,	0xa504d2e9,	0x6d57f47e,	0x4a015409,
-0xf54d386f,	0x2da77a2b,	0xab04d06d,	0x7bf8ea19,
-0xb0ebc25c,	0x91119128,	0x56c54eea,	0x152f4e23,
-0xa25117ce,	0x99534ada,	0x8842eb0a,	0x3a5dd205,
-0xe97955a6,	0x80950258,	0xb925944d,	0x628b7f30,
-0xb07c3e37,	0xf5c86344,	0x4c36449e,	0xd940801d,
-0x7b3b0da0,	0x16ea7b8d,	0x4a0f4fa0,	0xbd480d07,
-0x82ec44f6,	0x51779667,	0x5bdbb1d3,	0x8deb45ca,
-0x38a66184,	0xfb470fc9,	0x25363fb1,	0xbc129a95,
-0x29d5068f,	0xf517f1bb,	0xf5769dc1,	0x75a0256e,
-0xa6b98e74,	0x2b76fcdd,	0x4de2eb6d,	0x24ed8d53,
-0x1a6cc18f,	0x1736d538,	0xf4b1cbfe,	0xf8922e6d,
-0x70db7017,	0xdb34cf04,	0x3120bfbf,	0xe087fc6a,
-0xae0a91e2,	0x9f2ea090,	0xbc05b13a,	0xc0ed6589,
-0x73ea7422,	0xbabc72c6,	0x4de4ca2f,	0xa9f8d16f,
-0xe4de37b8,	0x353eeb76,	0xdde6b6ed,	0x21d9e183,
-0x7c57e342,	0xf28b9bb1,	0xab7ca9c0,	0x4a085c72,
-0xffb07dd6,	0x63abd7f7,	0x1ae27c52,	0xf77ee0d7,
-0x708b3437,	0x7e2dff0e,	0xb6b319e6,	0x8c84e925,
-0x55087edc,	0x500f35ad,	0xc81640b0,	0x937d864e,
-0x9efa3d5b,	0xf5eebce7,	0xc740d979,	0x62ab9012,
-0x08e825b3,	0xeba1dda6,	0x0052dd87,	0x6d8d8ad4,
-0x4a047831,	0xfcd9bee3,	0x8510f73f,	0xf83c5f7e,
-0x5a09c0f7,	0x95b0eb08,	0x698d240f,	0xa0560b49,
-0xe19b647a,	0xec596c6b,	0xd13d7808,	0xe259263f,
-0x4a6d99ce,	0xbf035717,	0xc410e0c8,	0xebf36b19,
-0x99256c4a,	0x6c9463e3,	0xf4999032,	0x12216280,
-0x3b8d2e40,	0x1bc6337c,	0xdaa5f7e1,	0xa9acb5ab,
-0x6ccb91dd,	0x152fc803,	0x0bcbc7eb,	0xb94d2418,
-0xd65b6f1e,	0x694756a0,	0x14cd941c,	0xa56429e3,
-0x945054a4,	0xd4922be6,	0xd571552e,	0x82b5c823,
-0x668fafe8,	0x2827fdd9,	0x9af3de76,	0x2a5d0078,
-0xf5ae0dd5,	0x223e7253,	0xa0ae4bb4,	0x812bb4ed,
-0x7d2b571b,	0xfa71b182,	0xb0a73540,	0x3ad09e40,
-0xc814ec6e,	0x71a63179,	0x645ac68b,	0x68d1f6ab,
-0x8dad1277,	0x3782a2a8,	0x173335f5,	0xb5aa47cf,
-0x6df9de08,	0xd1175256,	0xe4d4c2f3,	0xaad6edac,
-0xa0dcfa5a,	0x38e7df7b,	0x93e2fbe9,	0xefe7dc23,
-0xef1ec4b8,	0x9b9f7a91,	0x148474cc,	0x03b75bd2,
-0x5210cba7,	0x4a9b1025,	0xebded8fc,	0x7c570275,
-0x3b654b12,	0x484ed1cf,	0xf4765b45,	0x42b55bd4,
-0x33f6be6b,	0x62e0f627,	0x170ad64c,	0xa80f34da,
-0x695c665f,	0x58a7aa98,	0xd51bab9f,	0xc3b18153,
-0x3ce425c2,	0x81977e00,	0x3b692349,	0xcbb9621f,
-0xc7ed3dec,	0x69bb55fc,	0xf68cb3da,	0xa89f69f9,
-0xe9d78668,	0xac0d599c,	0x9338622e,	0xef6a80a7,
-0xcb803262,	0x98db8030,	0xbc0d6a0e,	0xd0406313,
-0x70d22c76,	0xe71a332e,	0xa55ccdc3,	0x8306d4c8,
-0x5a590069,	0x84fcd275,	0xd090c333,	0x61941b43,
-0x05dcb6fc,	0x83302e99,	0x8526a3ca,	0x28217e4a,
-0xeb77a9ef,	0x285993f7,	0x721d0d7c,	0x920ca6d1,
-0x4a707536,	0xd5aedad0,	0xa82d8e14,	0x235d429e,
-0x68deef3a,	0x48508124,	0x39117ab4,	0xcab7d6f7,
-0xe3799e96,	0x0341dc52,	0x9b10cb97,	0xb76cff12,
-0x78cf69ee,	0x8970288b,	0x4b4dc210,	0x617fd486,
-0xe714c612,	0x43bced55,	0x759335f1,	0xfa2cf191,
-0x1ce2278b,	0x20c1a720,	0xf01415fd,	0x0c1923f1,
-0xfe04d73a,	0x93f8ce91,	0xbcf31c33,	0x5d592412,
-0xeed0de72,	0x0ed18fcb,	0xf8cbecb3,	0x9bda800a,
-0x804d1bdc,	0xb3b59009,	0xe7647016,	0xa7f67eb0,
-0xe32e1750,	0x94bf7ae8,	0xdd83eac0,	0x179ef1e6,
-0x6bd1b25e,	0xcdb4067b,	0x32fea012,	0x98ca93af,
-0x11d77730,	0x5bee1f0e,	0x17ee87cf,	0xea8516af,
-0xd75f0c7b,	0x8e1af57d,	0x4c1d285a,	0xc30a1439,
-0xfec99a04,	0x028f6d00,	0xf8a12dff,	0xb7d746c4,
-0xc5c31f61,	0x8d38aef2,	0xb09977d2,	0x1a923dfe,
-0xcd9f6621,	0xcd1452eb,	0x6e48fc27,	0x7dc791a1,
-0x55d4105b,	0x046c853d,	0x41f4fb51,	0xd13c7864,
-0x1f41289c,	0x1d0d1a21,	0xedf8444e,	0x7c5636fc,
-0x5a70ae2c,	0xac7d232a,	0x2f922896,	0xcd7c1505,
-0x3d8fbe37,	0xe2be7cab,	0x5229d192,	0xf17fc306,
-0x6c69956f,	0x49f01aa6,	0xbd61e1bd,	0xef1c261a,
-0xeef77876,	0xf48560f7,	0xe10da128,	0x90ac207b,
-0x7a697de9,	0x468a7556,	0x0439a4d2,	0xa72c353b,
-0xae95f251,	0xeda01d6b,	0xea71c037,	0xa8bda5d5,
-0xd50d28ba,	0x0538e66c,	0x0ddb538d,	0x6f1314d6,
-0x007e4ccb,	0xd9c388ca,	0xd4730dc9,	0x1d0b3d4b,
-0xa799ecef,	0xf8d83235,	0x779b3d02,	0xed9bf4cd,
-0x29f1195c,	0x26f0f33e,	0xba5ef2b0,	0x6b3d2f3f,
-0xc25c5995,	0x21dc25e8,	0x64ca2239,	0xcd097928,
-0xf485b093,	0x46d45cfa,	0x113dab41,	0x17d74a14,
-0xc7734cec,	0x64ab29f7,	0xb0b3e3be,	0x6540b947,
-0x2d863102,	0xef06d6b1,	0x5be045a0,	0x77503f23,
-0xcab91ba1,	0xee734c5e,	0x2a1a9fd0,	0x94caace4,
-0x624bc780,	0xe7990ec5,	0x3f7ea429,	0x2c600af9,
-0x101fd527,	0x46017b07,	0xe35353b8,	0x9b77b604,
-0x3772e0db,	0xf8bda873,	0xe4c292ac,	0xb18fc5b5,
-0x093b4caa,	0xdefeec30,	0x5b81d7a0,	0x51f53ce5,
-0x4f69a2f8,	0x315611e7,	0x38fea48a,	0x95d9383b,
-0xeec151d3,	0x09f2329c,	0x871be798,	0xe2ee2a4c,
-0x2fe9755c,	0x51e0eef4,	0x4bbaba5f,	0xc427b65c,
-0xa374c6c1,	0x884af386,	0x16f33ba5,	0xbcc33d85,
-0x13ce7c1c,	0xf54325c3,	0x4bcf6c51,	0x95e99a5b,
-0x66f81148,	0x0ca663b7,	0x4545b59d,	0xaca1c158,
-0xcb4060c9,	0x89d93306,	0x01f464f9,	0x6bf12234,
-0xf1298bf3,	0xa45eca1f,	0xce7a462d,	0x6e78a63c,
-0x4f3c5719,	0x2f14e2f4,	0xeed92a03,	0xd59b8193,
-0x64da4a4c,	0x43e53431,	0xd1d57351,	0x1f4d2ae8,
-0xef09a5d8,	0xb410ef49,	0xf7274758,	0x96673691,
-0x143d2742,	0xf06d9aec,	0x9be9085d,	0xc5002fbd,
-0xc2a20d2c,	0x863122e3,	0xb9129006,	0x074c7284,
-0x3e0e89c6,	0xc80ada43,	0x3bb89c43,	0xacf8d13b,
-0x907e6320,	0x1bc04cf6,	0x810bd209,	0x6ff87dc9,
-0xecec843d,	0x780066c0,	0xbf4b59e3,	0x73fbec14,
-0x3115a934,	0x33699e49,	0x55f9b374,	0x08151397,
-0x85e6b786,	0xa3ec3a58,	0xb777f30a,	0xec5f95ed,
-0xb1eecc1d,	0xcf9d00a6,	0xba46666e,	0xc8439778,
-0x9ffb972b,	0x300a774c,	0x7d4494bc,	0xe1355826,
-0x9e327260,	0x98817734,	0x4f540740,	0x88356313,
-0x70b578a8,	0x96d81298,	0x7d06a905,	0x7024c1e2,
-0x8b588b6c,	0x61f11351,	0x7f5840ff,	0xecd2dc8b,
-0x6a78a90a,	0x7e9cc93d,	0xc0e3b740,	0x96167bbd,
-0x747017d8,	0x53444f79,	0xcf2d7dbf,	0x98fddde8,
-0x079a5000,	0x68116222,	0xb30f9909,	0xb3966e2e,
-0x17f8e692,	0x84081654,	0x3fbd2c4e,	0xb6a5ffc0,
-0x8db946c0,	0x91f31323,	0x9513ea68,	0xadb427a5,
-0x56a181d8,	0xcd48215f,	0xdc7129b0,	0x65b2f606,
-0x961defca,	0x68ac72bb,	0xa5f97c32,	0x8795ad4e,
-0x31cb626d,	0x55448a5b,	0x7c78b68a,	0x1bbe6418,

cpu/intel/model_6fx/microcode-m206fda4.h

diff --git a/cpu/intel/model_6fx/microcode-m206fda4.h b/cpu/intel/model_6fx/microcode-m206fda4.h
deleted file mode 100644
index be96494..0000000
--- a/cpu/intel/model_6fx/microcode-m206fda4.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m206fda4.inc  */
-0x00000001,	0x000000a4,	0x10022010,	0x000006fd,
-0x9ace60f7,	0x00000001,	0x00000020,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x7f914831,	0x7f280950,	0xcc39293b,	0xe0137d67,
-0x25a22f1a,	0xc7d8e840,	0xe609cbee,	0x26a84b50,
-0xc85354c6,	0xe397b7c6,	0x2242c9b9,	0xe0bc9aab,
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-0x260e0dba,	0xc13cec48,	0xe529f238,	0x2196cc88,
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-0x3941f962,	0x82bcc6cc,	0x47b11974,	0xb821611f,
-0x78b34250,	0xf1be5659,	0x561b9e61,	0x6f3bd501,
-0x584e6f5c,	0xd54ed547,	0xacebcd21,	0x7b5ff816,
-0xb64ad233,	0x9f2f330d,	0x69fb1ece,	0xac8710dd,
-0x58dc6c60,	0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,
-0xebc0ce9d,	0xa733274f,	0x884d9b55,	0x42b08b63,
-0xafa54a74,	0x1c7ccf64,	0x93a20191,	0xaaa3132e,
-0xc69831d1,	0x54634889,	0xfbfe3efc,	0xd3cf68d4,
-0x302e3117,	0xf5693131,	0xc3ce8c6c,	0x1f03cd89,
-0x6243334c,	0xf16bc80f,	0xdca5f130,	0xcb2cd956,
-0x4c1bb421,	0xe8de533c,	0x7f86703a,	0x29aa897e,
-0xdd54acad,	0x76b2f2ae,	0x7ef82b71,	0x2e30970b,
-0xba402597,	0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,
-0x7f9efd1c,	0x2363d147,	0x5327289a,	0xe89229f3,
-0xd63a535c,	0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,
-0x26b6edfb,	0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,
-0x6d65db4c,	0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,
-0xe20e6dbb,	0x8488a45f,	0x8ebc2932,	0xd4767316,
-0x3e8c4b8a,	0xbab7402c,	0xfc1e217e,	0xe5c5bf82,
-0x6928fe2e,	0xc88528e9,	0x4b2e4e8f,	0xdd938b86,
-0x0c964f98,	0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,
-0x197d005a,	0x4d40b3b3,	0xcf203155,	0x0d2fa621,
-0x752d2c58,	0xb12bac12,	0x1e7e8c23,	0x94215d54,
-0x9854a71c,	0x4de63c64,	0x7a012529,	0x9c171f8d,
-0x9e71def7,	0x3bd17d50,	0x11f175d9,	0xec78abf3,
-0x7b529eee,	0xd3a69fc3,	0x5b718676,	0x58214d29,
-0xa8bd2c34,	0x41ea00ab,	0xa03f64d6,	0x4ee342b0,
-0x32b1e444,	0x1c1801a4,	0xc8424702,	0x334a7e35,
-0x50cf1543,	0x3b22b495,	0x88683776,	0x8e2e0154,
-0x6155c033,	0x4e2fa6ac,	0x42ace700,	0x8d64f97c,
-0xaf9ced17,	0xb2a5cb92,	0xa558582d,	0x88705de7,
-0x9e528d59,	0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,

cpu/intel/model_6fx/microcode-m406f76b.h

diff --git a/cpu/intel/model_6fx/microcode-m406f76b.h b/cpu/intel/model_6fx/microcode-m406f76b.h
deleted file mode 100644
index 392f81f..0000000
--- a/cpu/intel/model_6fx/microcode-m406f76b.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m406f76b.inc  */
-0x00000001,	0x0000006b,	0x10022010,	0x000006f7,
-0xcc4deed3,	0x00000001,	0x00000040,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x39e89091,	0xe80354c3,	0x3a586ae4,	0xb0338c3a,
-0xb9c0ab50,	0x5a2525bf,	0xa9ff426b,	0xb4b7ab59,
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-0x2396655b,	0x29e40144,	0x1734ee49,	0x4b458fd0,
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-0xdd9bdd89,	0xe063d48c,	0x28f7b28f,	0xe5fc43b2,
-0xe8eff74f,	0x1e8f6fcf,	0x16d4e3fa,	0x236ae648,
-0xebe46a80,	0x6e853675,	0x335a89eb,	0xec85401d,
-0xdb14474f,	0x5e54513f,	0x62ac0fb9,	0xc0631457,
-0x995cc376,	0x2c377a62,	0xc881fb68,	0x686eaf81,
-0xa5a1e98e,	0x1750ae2a,	0x80eefd16,	0x1c9fae3f,
-0xeeb5f5d2,	0x0d703f1f,	0xb70e6489,	0x40705886,
-0xf431cc8b,	0xfde99df2,	0xd78f35e5,	0x7ef9f1f6,
-0xf2ce4a0a,	0x1be5288d,	0x074e92fe,	0x2069fca7,
-0x70d4a148,	0x1f27d962,	0x06a9b54d,	0xacf217b6,
-0x8d482699,	0x987da26e,	0x94dd96f7,	0x088666e8,
-0x1a47fa32,	0x8f1a4620,	0x857bd167,	0x4747924d,
-0x6af12671,	0x8acd93e0,	0x8f6b70cd,	0xda7089a8,
-0xca15a0cd,	0xd7e86da2,	0x995c3578,	0xc372acdf,
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-0x496d8a1b,	0xafbc5272,	0x892ef00e,	0x0a63b511,
-0xda18085c,	0xf3b30892,	0xa7cc35c2,	0x7c293441,
-0x7feb54b9,	0xf2678dd9,	0x95e21558,	0xf22f28ce,
-0x33ab977d,	0xac56a101,	0xb8434d87,	0x31c4506c,
-0xd390b9dc,	0xcec395d1,	0x753291a5,	0x83d2e7ec,
-0x95c301d2,	0xa2f08514,	0xd20076b7,	0xaa26941e,
-0x5dd0e6d1,	0x38c67704,	0x86cf271c,	0x034100a9,
-0x743c3a5b,	0xcf227358,	0x9ef67697,	0x5bb83d62,
-0x27e971df,	0x2bc8aaca,	0x39af5ea2,	0x5eb2db34,
-0xc322930b,	0x10cdf73c,	0x896be049,	0x10a4fa55,
-0x4767d733,	0xae5dfbbf,	0x0b55d61c,	0x5b5c18ee,
-0xa835b782,	0x0910e97c,	0xdcdb2cd2,	0x6f05f857,
-0x27adf411,	0x57eb8a29,	0xa0341e83,	0x4720978e,
-0xcebb50ce,	0x9a794f07,	0xaba97873,	0x567d0451,
-0x838f8f04,	0x8545421c,	0x9318fbd0,	0x9c4cfb17,
-0x6b6c97fa,	0xec866d2f,	0x206d7c5c,	0xd8aa673a,
-0x48668858,	0xf720b96d,	0xccb112c7,	0x127f62e0,
-0x558dc1a6,	0xa25da835,	0x3fef0b3c,	0x6fa3579d,
-0x8c4b9ec5,	0x98d5f1ab,	0x23f07a89,	0x3b682c71,
-0xaa6aae94,	0xbfbcbf71,	0x4bae24a1,	0x85bd7d43,
-0x0407976b,	0xc9db77e5,	0xb28eb1ff,	0x926bfa12,
-0xc4fbd50e,	0x800f863a,	0xc52d8cb8,	0xc6485ce9,
-0x171f3210,	0xd6916e40,	0x381fb7a8,	0x07cf9abe,
-0xd60c8b06,	0x35aafed7,	0x128287b7,	0x97a45ca3,
-0x9269686c,	0x4996ca60,	0x863474b1,	0xe7198416,
-0xb3b112d6,	0xfdcea295,	0xa15ef3a5,	0x89012eff,
-0xbd50f5a8,	0x4ae1fe9b,	0x596d0673,	0x97356ed2,
-0x4ad6e6a7,	0x665f9ce0,	0xd71618ac,	0xc87934bd,
-0xe96101d1,	0x55d1976c,	0x471c8505,	0x7a36d839,
-0x5d62a9ee,	0xf3c54a8a,	0xa2be15d9,	0x244087c9,
-0x042c8037,	0x23224689,	0x281c5d73,	0x2139ecfc,
-0xffb8bc8a,	0x834fdd11,	0x9cd5a5bd,	0xa3368319,
-0x7e5bef0c,	0x4ae2dbda,	0x86d90089,	0x6675dfce,
-0x48876262,	0xcec72538,	0x11dc5c80,	0x86a730f9,
-0x313565c9,	0xe3e5be11,	0x106d7cce,	0x752b8be2,
-0x3d00a5bc,	0xe6f70e95,	0x44447ac8,	0x600df30c,
-0x8335ac3b,	0x8816ddee,	0x700982fe,	0xee495741,
-0x48c7e81c,	0xa3d55da2,	0xb0172982,	0x70ab2158,
-0xd4460621,	0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,
-0xa8454763,	0x70877bb6,	0x66005c97,	0xaf292c06,
-0x7b843db1,	0xf343b59b,	0x25cdc7b5,	0xa41da617,
-0x9e9d895e,	0xc936f475,	0x7270925a,	0x30024230,
-0x8e72f53d,	0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,
-0xfc18a2a3,	0xaf377cc1,	0xbff09a78,	0x4b4e0814,
-0x95a0b2c1,	0x270398de,	0x201fca94,	0x2a032a4f,
-0x131542b4,	0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,
-0xa814ddc9,	0xa3b3a991,	0x17ee60c2,	0x852c0b8d,
-0x11e5853a,	0x762002a7,	0x92c5311d,	0x0d4bf7e1,
-0xfffec870,	0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,
-0x0111a772,	0x9808e780,	0x29c336e8,	0xe9bc05df,
-0x5bedde11,	0x945565af,	0xaff808fe,	0x87e3423d,
-0x4de6f98f,	0x93b4adef,	0xbf704fa4,	0x09120e91,
-0xd54f3692,	0xdf8eab1e,	0xfabbf59c,	0xe74318be,
-0xaab87ffc,	0x29fa791c,	0xe3915552,	0xa652cb9b,
-0xa1252e74,	0xb35b723b,	0x542aa28b,	0x12fcc5b0,
-0x3941f962,	0x82bcc6cc,	0x47b11974,	0xb821611f,
-0x78b34250,	0xf1be5659,	0x561b9e61,	0x6f3bd501,
-0x584e6f5c,	0xd54ed547,	0xacebcd21,	0x7b5ff816,
-0xb64ad233,	0x9f2f330d,	0x69fb1ece,	0xac8710dd,
-0x58dc6c60,	0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,
-0xebc0ce9d,	0xa733274f,	0x884d9b55,	0x42b08b63,
-0xafa54a74,	0x1c7ccf64,	0x93a20191,	0xaaa3132e,
-0xc69831d1,	0x54634889,	0xfbfe3efc,	0xd3cf68d4,
-0x302e3117,	0xf5693131,	0xc3ce8c6c,	0x1f03cd89,
-0x6243334c,	0xf16bc80f,	0xdca5f130,	0xcb2cd956,
-0x4c1bb421,	0xe8de533c,	0x7f86703a,	0x29aa897e,
-0xdd54acad,	0x76b2f2ae,	0x7ef82b71,	0x2e30970b,
-0xba402597,	0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,
-0x7f9efd1c,	0x2363d147,	0x5327289a,	0xe89229f3,
-0xd63a535c,	0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,
-0x26b6edfb,	0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,
-0x6d65db4c,	0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,
-0xe20e6dbb,	0x8488a45f,	0x8ebc2932,	0xd4767316,
-0x3e8c4b8a,	0xbab7402c,	0xfc1e217e,	0xe5c5bf82,
-0x6928fe2e,	0xc88528e9,	0x4b2e4e8f,	0xdd938b86,
-0x0c964f98,	0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,
-0x197d005a,	0x4d40b3b3,	0xcf203155,	0x0d2fa621,
-0x752d2c58,	0xb12bac12,	0x1e7e8c23,	0x94215d54,
-0x9854a71c,	0x4de63c64,	0x7a012529,	0x9c171f8d,
-0x9e71def7,	0x3bd17d50,	0x11f175d9,	0xec78abf3,
-0x7b529eee,	0xd3a69fc3,	0x5b718676,	0x58214d29,
-0xa8bd2c34,	0x41ea00ab,	0xa03f64d6,	0x4ee342b0,
-0x32b1e444,	0x1c1801a4,	0xc8424702,	0x334a7e35,
-0x50cf1543,	0x3b22b495,	0x88683776,	0x8e2e0154,
-0x6155c033,	0x4e2fa6ac,	0x42ace700,	0x8d64f97c,
-0xaf9ced17,	0xb2a5cb92,	0xa558582d,	0x88705de7,
-0x9e528d59,	0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,

cpu/intel/model_6fx/microcode-m406fbBC.h

diff --git a/cpu/intel/model_6fx/microcode-m406fbBC.h b/cpu/intel/model_6fx/microcode-m406fbBC.h
deleted file mode 100644
index 37c0091..0000000
--- a/cpu/intel/model_6fx/microcode-m406fbBC.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m406fbBC.inc  */
-0x00000001,	0x000000bc,	0x10032010,	0x000006fb,
-0xf1a7a484,	0x00000001,	0x00000040,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x000000bc,
-0x0000003f,	0x2a000000,	0x20101002,	0x00000341,
-0x00000001,	0x000006fb,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x2af1b833,	0x6fa88145,	0xbb3d706f,	0x102fb136,
-0xdd8a5942,	0x49b592b9,	0x2d3fece0,	0xa8c418ff,
-0x58d10d9f,	0xb7f2421d,	0xe4d5fcf1,	0x02889a15,
-0xad9bed07,	0xa32ab3e6,	0x3491afcc,	0x9c991c37,
-0x2a1c2071,	0xf066191a,	0x3bd898e7,	0x2648d958,
-0xc05f7908,	0x05864b9b,	0xbe4c1eee,	0x1e6c7ef4,
-0x0e7a539e,	0x100b2ab3,	0x1273dceb,	0xfec8847d,
-0x8f37946f,	0x634e3b5c,	0x691dbd61,	0xd89e3cb9,
-0x094639d4,	0x7d972e1a,	0xd6dbd94d,	0x2001c3ec,
-0x34f791f0,	0xeee0d794,	0x88b7459d,	0xc2c73aa3,
-0x607a174d,	0x4f0f8304,	0x65790b35,	0x00532bfe,
-0x1fd1e0cc,	0x7b91f873,	0x154ed42b,	0x7a7108e9,
-0x81637c95,	0x192cb173,	0x28ccd94e,	0xb9bcc372,
-0xac05171b,	0x867f47da,	0xf8e8c47d,	0x1edcdb4a,
-0xd2ca6c2d,	0xe9ee9169,	0x5a6efedc,	0xb6825038,
-0x09277eaa,	0x2a34e580,	0x0f794366,	0x86c99402,
-0x211b98bf,	0xdf8eb0e3,	0xda11d7bd,	0xd440363e,
-0xa7d49f1a,	0x16dd7395,	0x5b23c2fc,	0xab93ea3c,
-0x00000011,	0xf54dfe4d,	0xb8599ebd,	0x68368067,
-0x0c28dcb7,	0x92f2bc78,	0x491ac560,	0x329ab46d,
-0x919a91db,	0xbc3fec07,	0x1a5c33bb,	0xfe4d7c1c,
-0xc4313e4c,	0x601898ae,	0xa2b45d10,	0x8d3de9a1,
-0x987f7385,	0x93000345,	0xb08e3756,	0xfc44c2b0,
-0xf292627f,	0x03af916e,	0x32dde7ee,	0xd34d4cdd,
-0x21cbe9ff,	0x37609266,	0x6666d138,	0x7a91e13b,
-0x46484cf1,	0xf8a7c935,	0x6e897d1b,	0xeb0f7917,
-0xfba989fd,	0x2cc10b53,	0xa7edacb5,	0xf3d60e31,
-0x6374a743,	0x64dc6363,	0x3ab65ed9,	0xdc3cea84,
-0x3ad576cb,	0xfd67599c,	0xc7bb3c17,	0x1dc5d240,
-0x0e2f6ed5,	0xb0ccd630,	0xe9770c9b,	0xc93acfd4,
-0xf4fe7c30,	0xbd49a7af,	0xc23863d7,	0x644a7bb4,
-0x0024b38b,	0x8645d8bd,	0x3cb2b02c,	0x8f1caf00,
-0xb46940eb,	0xa447da2d,	0xa9a9fc7c,	0xfe25e95b,
-0x4083643d,	0x7527659a,	0xb3696697,	0xb8dfb8c0,
-0x45f5aac5,	0x8ba9d1f7,	0x3debba3f,	0x914a09ab,
-0xc773edf6,	0xe0e3b2f0,	0x6d2c375c,	0xe63dff4e,
-0x12711e4a,	0x10903919,	0xebbfc605,	0x800d75f2,
-0xfb00d315,	0xf93dc071,	0x0b2529ad,	0x2c1dadd7,
-0x3714ff07,	0xcae69d1e,	0xd726f1a8,	0x4796a657,
-0x52553fa8,	0x9a296689,	0x90280d12,	0xf4ecfd77,
-0x13fb9c84,	0x12662edd,	0x9cd608d8,	0xd738dc25,
-0x0f7fd9cc,	0x80e84675,	0x797d3a62,	0x74855b0e,
-0x53c9f427,	0xe5b9acc3,	0x3b1b9776,	0x8ee9a613,
-0x26e57210,	0x10a9cf35,	0x9286f2f9,	0xbfbcdb15,
-0x673f4e38,	0xd98ce6dd,	0x4d9ce100,	0xb68f501b,
-0x706f9469,	0x6ea08dd5,	0xc73dc3cd,	0xecc7ae70,
-0x9ab0c6b2,	0xb74f9843,	0x0a3058c3,	0x552778da,
-0xb7cd1fbd,	0xb57a827b,	0x13920a27,	0x27587128,
-0xf8a81ffb,	0x129fae97,	0xa8f49d89,	0xfd025aef,
-0xe0f084f6,	0x9ea0d579,	0xe1c34b93,	0x6b5b5bfa,
-0xcab5907f,	0x46c7f3a0,	0x1257abc0,	0xedb94f10,
-0x723b8f25,	0x9f8310a1,	0x99cb5438,	0xd354620b,
-0x637ce697,	0x93899e66,	0x8d9c4941,	0x9206b17f,
-0x632ffaf6,	0x9cf227dd,	0x1b148ac3,	0xe33969c1,
-0xbbb78c2f,	0xadc65796,	0x8f407d7e,	0x7c1716f0,
-0x6433bbdc,	0xd6084baf,	0x7b39c1fd,	0x214d9c6b,
-0x1d0fd4fa,	0xa993ed02,	0x78e39e0e,	0x66f0b3af,
-0x21d6910d,	0x29110ece,	0x1f7b3033,	0xa91398fd,
-0xb82ff1b1,	0x35ead30f,	0x48ce4ceb,	0x152e94e3,
-0x8ca11179,	0x06a0cd52,	0xfb8a2ebb,	0x3cbe5f77,
-0x6f04dfd7,	0x77d6ab17,	0x5efccae5,	0xb4cf074b,
-0x632dc5a0,	0x4c2bd8d7,	0x4c4f9c01,	0x31ba47a9,
-0x1d11e152,	0x8160ab94,	0x5ac00bfd,	0x65cd6d32,
-0x77efb325,	0xad50b063,	0xaf0f2522,	0xa1b58573,
-0x06b96386,	0x987fb308,	0x60d9087d,	0x9e3dda26,
-0xfe56ed7c,	0xf0a18b07,	0x38d7cdba,	0x2c7b25a3,
-0x564cf58f,	0x0ef16d01,	0xdded6d0c,	0x5e50bf20,
-0xe2455331,	0x8d545107,	0xe0f87c6b,	0x38491372,
-0x05352d41,	0x8e156588,	0x3ff31afe,	0x0b0e1d41,
-0x096d7b4a,	0x4729d48c,	0x6cf3f084,	0x71bebbab,
-0xed13fd71,	0x53a4ecdb,	0x539b8640,	0x7c915e51,
-0x08e1f582,	0xdeb5072a,	0x1a79e7ae,	0x0dfc3090,
-0xe2357f73,	0x283dbbf7,	0x66b9b50f,	0xc98c3eef,
-0xbe4cfbea,	0x6c3328e3,	0xecde6b57,	0x2cd15d3f,
-0xb9e4a4db,	0x279ff953,	0x8691aa73,	0xf7da6500,
-0x23fd6f22,	0x0aedc9f9,	0xdc33d374,	0x755755b2,
-0xad2e5a3f,	0x4c7a58c3,	0x9b6d6b56,	0x08c09167,
-0xfb13baac,	0xff4fdaaf,	0x5085e560,	0xacbeb4ca,
-0x4e8e133f,	0x09f9bc70,	0xff088b13,	0x9eb90d1a,
-0x55a2cecf,	0x44250c30,	0xe2c4491b,	0x4ce59d2e,
-0x7cae16e8,	0x1080a65f,	0x1b190acd,	0xcdb6fde6,
-0xd595a15b,	0xac21a20c,	0xd964edaa,	0xb3b91c87,
-0xfffa075c,	0x5955c04e,	0xc19829ea,	0x6b741f50,
-0x2efa46c2,	0xa408fc4d,	0xf384588d,	0xc6493485,
-0xfee07645,	0x8dfcbf85,	0x58497ed9,	0x16c9736b,
-0x7c84c59b,	0x47d9d806,	0x76bdcfbd,	0x9b0feaf6,
-0x15182bfe,	0xa71c9be1,	0x5f57b773,	0xb8605794,
-0x27b8fefe,	0xb93e45aa,	0x4df89c60,	0x3e6fb188,
-0x18a7371d,	0x9294bb43,	0x93df87e6,	0xd376f269,
-0x492d4b7f,	0xd5c3e116,	0xca94c6fb,	0x33fb3fa8,
-0x6f86b3e4,	0x11668629,	0xe29c3038,	0x81e9e93e,
-0xe50f4ad1,	0x18d587cf,	0x80bc338d,	0xdd51eb4a,
-0x9a4d571d,	0xc9e12b23,	0x0bba3c81,	0x0dbf1583,
-0xf150db23,	0xf6a5a5ca,	0x1f78cb4b,	0x5b8a2173,
-0x69b185d8,	0xd290c81b,	0x6b95fbae,	0xfeec8dd0,
-0xd26cb47a,	0xf979074c,	0xe71f504c,	0xd018d28c,
-0x07ac8483,	0x3a74819d,	0xc0e28813,	0x8a8e6055,
-0x9ad0809f,	0x4518202e,	0xd1918fac,	0xd6d21cee,
-0x2ab78998,	0x47069b78,	0x93effaf6,	0x186285b0,
-0x6e943ade,	0xf989327b,	0xd56eb699,	0x2c97eef4,
-0x53c83bd1,	0xabfff7ab,	0xacd4b255,	0xebf557f6,
-0x30190e40,	0x95515337,	0x386219ff,	0xcccca9fc,
-0x08d03684,	0x61d65074,	0x153005b6,	0x423f8486,
-0x79a92726,	0xeeb69d98,	0xebc58165,	0x99ba884a,
-0x54988107,	0x089eb09d,	0x313f1540,	0xf0592023,
-0x7d796b29,	0x985fd1b4,	0x788a1f6c,	0xb4d3eff0,
-0xd3bc1aca,	0xd94cf2ce,	0x50de76f0,	0xe56b3eab,
-0xf7215599,	0x567ad204,	0xf64f3f54,	0x5e4d93f0,
-0x62c197bf,	0xb0a40dfb,	0xbfdcb171,	0x943db348,
-0x317329a3,	0x5801a712,	0x42b746ee,	0x476de579,
-0xb5764347,	0xe1252fd4,	0x382f7e48,	0x4356b7f0,
-0xc8ac11d2,	0xd1e22f3e,	0xe72f873c,	0xb4d7e96a,
-0xe3cae630,	0x87f22e69,	0xb1650694,	0x278f4cd1,
-0xc3048a06,	0xc97facf8,	0x2e42d24b,	0xfbba463a,
-0x1f74936b,	0xaec9f8c0,	0x28ef73dd,	0xa3e593a4,
-0x0bb57346,	0x4fad2d57,	0x6aded116,	0xd474efc0,
-0x850e4911,	0x0243ed1b,	0x8366c88f,	0xffc30812,
-0x8bca3734,	0x5245b274,	0xc180f403,	0x6976a8c8,
-0x9ddd675b,	0x7cb955a0,	0x9c362c6b,	0x6d67075d,
-0xe776e4c6,	0x590e0fd2,	0x96cb03ae,	0xb082292d,
-0xc5b3b48b,	0xb037fb7e,	0xc643c8c4,	0xf06ca5d4,
-0xe274d411,	0x94b96817,	0xd0eb3729,	0x705d5dd4,
-0xee25ca33,	0xc814771b,	0x398d9c90,	0x585d6910,
-0x345e2b62,	0x4f144351,	0xd4231121,	0xb231765c,
-0x043d91f0,	0x9bf7a950,	0x413b4109,	0x62015026,
-0x71dadb80,	0xae46e301,	0x3b453512,	0x08276e4c,
-0x3062b2a7,	0x9126d5ba,	0x38e1dcc5,	0x1d7ce5da,
-0x029f2ebe,	0xe15f0578,	0x30eb611c,	0x43e547bc,
-0xbc6fc58e,	0x859f12e5,	0x7760c4ea,	0xc3e581f9,
-0x6d1f3f15,	0x0c29c987,	0x8fd0b861,	0x5430e1a2,
-0x8fe570c9,	0xb546cb0f,	0x40a832d6,	0x6fb3aa75,
-0x4a44f3eb,	0xeb79dbc5,	0x14ff0379,	0x4104e36b,
-0x180a30dc,	0xa11d6bb5,	0x1f604ef7,	0x53e5afec,
-0x353499a0,	0xfc8dce9f,	0xa3c18d63,	0x16da59e9,
-0x104aceb5,	0xc885941d,	0xf05ec241,	0x26d9128b,
-0xe5d823f5,	0x0ac0afd1,	0x9fbcc9c2,	0x9df56f90,
-0x403a1c0c,	0xbdc01726,	0xcc48d20c,	0xdccdcf5a,
-0x26d3ac5c,	0xd9501d08,	0xb5ebb2ff,	0x78c2b66c,
-0xb5fd1639,	0x41aa2843,	0x2acec360,	0x504f07e2,
-0x0eb9bb79,	0x96f899a3,	0xb3a67885,	0x74d3ad45,
-0x4b7c823e,	0x0bc912c2,	0x39ce413d,	0x205b6d0b,
-0x4593e836,	0x1891bd36,	0x01ff9e90,	0xe74d3ac9,
-0x867e6d49,	0x9b934421,	0x85d79351,	0xbec5402e,
-0x44df416d,	0x8f84c809,	0xdda36686,	0x05ef6d08,
-0xac06f7b4,	0x3e16c558,	0xe8e004fd,	0x309e47f3,
-0x2c786f7a,	0xf4efac57,	0xfe372834,	0x86a57ba4,
-0x621cc0a3,	0xa9bc1b98,	0x0c54e9e8,	0x9f2f23e1,
-0x2acd232b,	0x6e4330d3,	0x33ce13ea,	0x56e269d7,
-0xbed326e1,	0x6bf3e063,	0x9506a92b,	0x568ac248,
-0xe23a98a1,	0x7e0058e1,	0x8c269a39,	0x1dca56eb,
-0x30d0ccb4,	0x3a33f104,	0x0de0a097,	0x2a751844,
-0x9ef24be7,	0x1b10fb65,	0x8751c66d,	0xdc12e3e0,
-0xd2f33411,	0x8ca390f8,	0x869bafb7,	0x4dfef371,
-0xd92b8bb5,	0x9d8336e9,	0x0a38a943,	0xea891683,
-0xacb636f7,	0x1310c7fd,	0x46817b4f,	0xff032aff,
-0xa23a31fc,	0x4baec586,	0x68197f54,	0xa922467e,
-0x97fd6f7c,	0x4df7ae1f,	0xfc1d89f4,	0x9b41d04a,
-0xf702a2f2,	0xe7fd5757,	0x3fb69294,	0x2da320a7,
-0x5d401a3f,	0x33354c44,	0x50b4d9dc,	0xe359505e,
-0x2b6ed0ee,	0x53aed5a4,	0xbd41d513,	0xa02f7959,
-0xb2a5eab1,	0xbe11b48e,	0xdf7f3024,	0xc6bb2abf,
-0x51399983,	0x4edd217c,	0x0510bb05,	0x065ef8e7,
-0xdc255b1a,	0xc175a79e,	0xfad1b360,	0xb01faec8,
-0x561766d8,	0xd8b688d6,	0x665ae094,	0x4723dc8c,
-0x772aaa08,	0xebef217b,	0xc7d538e1,	0x7164cb3e,
-0x2de6153d,	0x5f204777,	0x4e22d120,	0xbdf2792a,
-0x39123d27,	0xe965ab45,	0xd40327b5,	0x4d275cdb,
-0x4afc642b,	0x31f24023,	0xdc972aaa,	0x653c9cd5,
-0x02a6b933,	0x06a32610,	0x07560903,	0xc8822566,
-0x4a524c27,	0x0dc417a2,	0x3c34ac25,	0x933c6ad3,
-0x9f8518b3,	0x9d1f3635,	0xd9d3304f,	0x60e26930,
-0xb42a7f81,	0x00cbeeff,	0x08397da3,	0xb0aad0cd,
-0xa65f19f0,	0xcc47dda2,	0xa32140df,	0x6599d951,
-0x658f5d23,	0x39b4264b,	0x07cb489d,	0x00efe525,
-0xc405cdf5,	0xaf85ad8b,	0x08fbfbb1,	0xe5f34a87,
-0x24bad177,	0x875c7bb6,	0x3773b3a9,	0x6b1d3327,
-0xe5a5174d,	0x769517b5,	0x3cecf45f,	0x3051eda1,
-0x6f4d61e5,	0x1a0e0709,	0x6a7e72af,	0x46ec1dd2,
-0xb9d3afc6,	0x2cc8ac4c,	0x230af233,	0x195043cf,
-0xa02e1518,	0xcc7b6115,	0xacbcbcc2,	0xb33f7b98,
-0x6edda462,	0xbb330186,	0xdf01879e,	0x0b481a98,
-0xce36297e,	0x23c07f85,	0x4cb47367,	0x5dac5ddf,
-0x929dfaa5,	0x58802592,	0xdb378b6e,	0x7b505e3d,
-0x7e2e8c91,	0x3d6b96e7,	0x5b82f891,	0x9c9b2a91,
-0xe745ab2a,	0xbc75cd7b,	0x13550fed,	0x908b3b9f,
-0x638c9a0c,	0x73b0cd23,	0x2bc2a520,	0x3d6bdcf1,
-0x2a6d650a,	0x51f96a5a,	0x5d162bc9,	0x3527cdbd,
-0xec8860c2,	0x2625e87a,	0x2d88cdcb,	0x9a49b134,
-0x90b871bb,	0x46503f0a,	0x794ec752,	0x2271c4c5,
-0x097279e6,	0x3b1c3b20,	0xd7cf47a4,	0x21d1c246,
-0x9267eecd,	0x57a91fab,	0x28642c9e,	0x24a34f67,
-0x8eaf1cab,	0xd2357539,	0x114dda79,	0xbae9d4f9,
-0x70f35b0b,	0x96cedfbd,	0xe56d151f,	0x02985775,
-0x1942c626,	0xca26e101,	0xe42bcefc,	0xde9fb138,
-0xe0c3bd9a,	0xb0c56071,	0xee5bc46b,	0x21020e85,
-0x3e7e55dc,	0x7eac5bdc,	0x2eb99a45,	0xbb4f367f,
-0x27273bd3,	0x2edba4f8,	0x647244b6,	0x6435fe98,
-0xf10b0869,	0x616a689d,	0xf06318d5,	0x27e97290,
-0x4f3e62b6,	0x9892ec7d,	0xc93e6e3e,	0x9ddef56d,
-0x1a67e9b6,	0x9f0658e4,	0xa8d73f65,	0x3f67d89a,
-0x84390631,	0x6699db59,	0xc772a467,	0xf0df9e0c,
-0x5e493d2f,	0xe922e48a,	0xe11d9b6d,	0xcf825a6b,
-0xfbbbae6d,	0x8a34ff52,	0x75057a2a,	0x33d7a02c,
-0x30411288,	0xffad0c51,	0x8aae3a12,	0x8de17734,
-0xcde94e6f,	0x67ad7b4f,	0x9f2ca81f,	0xa9d0d2f5,
-0xd070ef8e,	0x2d801ab2,	0xbb005a17,	0x766c1d4d,
-0x1fd1337d,	0xee4290bc,	0x485fdbcf,	0xee81508b,
-0x4618e079,	0x2b3a0eb0,	0xeed52038,	0x1dbc9587,
-0x699bb540,	0x6cc63a6b,	0x3ad4bbae,	0xe324d0ab,
-0xc66961ec,	0x5a211272,	0x96a6ff38,	0xdbd2da75,
-0xd12e4c61,	0x4b4ee062,	0xec2f9c1f,	0x922f168e,
-0x28008dd2,	0x030f972b,	0x7683ab26,	0xd3941cb9,
-0xa6343d8f,	0xe8e7bdcb,	0x56f26488,	0xec4ea47b,
-0xdcb279d8,	0x9ec6827e,	0x16fde6b1,	0x29d2abca,
-0x44afc82a,	0x01ba5b4b,	0xaef1bd20,	0x6328e0e6,
-0x5152971a,	0xedc6f901,	0x8703a4c8,	0xa7f5a2ad,
-0x01b66ce5,	0x0e41db97,	0x5cebeef4,	0x760397e7,
-0x41013704,	0xacf7e1e1,	0x8f64775c,	0x402b50cb,
-0x4beb19df,	0x04f4a3d4,	0xd5ce1df2,	0xd1ce21f5,
-0xce53fcd0,	0xeef6f752,	0x80f130b9,	0x828f83f4,
-0x27cbfa7c,	0xdb4e6f12,	0x8b61dfa1,	0xbe555240,
-0x661d2165,	0x2463345d,	0x4217c1d2,	0xc994d84e,
-0xa6723145,	0x88dfb2b3,	0x36a500e3,	0xa361044a,
-0x1a44efa8,	0x5a509f52,	0x2947959f,	0x1ddcbe05,
-0x6db182d6,	0xd5c9798f,	0x4a7e3417,	0xc5767923,
-0xff6bfff6,	0xa61bee42,	0x4e6632b2,	0xcf869d7f,
-0x3e3a42b9,	0x7118b335,	0xb31424e4,	0x79d84154,
-0xa6d3b321,	0x688f34f0,	0xb10803f3,	0x212cd8e4,
-0x7f972012,	0x17cce949,	0x8b151e4a,	0x7aafa9aa,
-0xc71b0ff5,	0xcc03e014,	0x907d5e82,	0x0a5aa6a2,
-0xf3f0cdcd,	0x4396e4dc,	0x8fed115e,	0x745f0742,
-0x919706db,	0x06db0d47,	0x63592f2f,	0x615891a0,
-0x1efe38a5,	0xad04a370,	0x5666dd5c,	0x34937538,
-0x487fe50d,	0x33052ffb,	0x9c22d2e6,	0xa7b4e4d0,
-0xb8d1307c,	0x371a936c,	0xa8b9efe2,	0x7f7e065f,
-0x8867d6e6,	0x7cf00194,	0xae60f9d7,	0xceb1555b,
-0x576c0e23,	0x77718970,	0xa36a45eb,	0xcb55d8d4,
-0xac9d53f9,	0xc4e76e8f,	0x3bb8df77,	0xd8d4c799,
-0x57e81d12,	0x3d4751d4,	0xbb68f5b7,	0x3af303b7,
-0x431f6bde,	0x2f92d2b8,	0x962a9883,	0xbede9836,
-0x79f920e5,	0x9b68922d,	0xe2542056,	0x094e91d0,
-0x651973d9,	0xd7b19b36,	0x3ad353c2,	0x955b6348,
-0xc075bdd9,	0x935d7dcb,	0x8f690d54,	0xbfaf8034,
-0x863386d2,	0xc406deee,	0xed847b07,	0x09f3c606,
-0xb93598d1,	0x84e202c5,	0x0c1bc33a,	0x2a7c2d7f,
-0x5c6594f9,	0x12068a6a,	0xb2b42b89,	0x29f45995,
-0x7a04a2d4,	0xef079cf9,	0x8ba258e8,	0xdbf42961,

cpu/intel/model_6fx/microcode-m46f6d2.h

diff --git a/cpu/intel/model_6fx/microcode-m46f6d2.h b/cpu/intel/model_6fx/microcode-m46f6d2.h
deleted file mode 100644
index 73e1334..0000000
--- a/cpu/intel/model_6fx/microcode-m46f6d2.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m46f6d2.inc  */
-0x00000001,	0x000000d2,	0x10012010,	0x000006f6,
-0x6618cfff,	0x00000001,	0x00000004,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x678e2fdf,	0xcd00eba0,	0xcd130279,	0xc1f46f0a,
-0xabee0770,	0x11bf14b2,	0x89c06f55,	0xa43c89e1,
-0x0399e088,	0x26869bd4,	0xacf4c5c2,	0x0359b350,
-0x6e73278b,	0xaa53b1cf,	0x08023ff5,	0x393bff4b,
-0xa1b3af33,	0xdeffca5c,	0x416c957f,	0x53fa2acc,
-0xc66651c7,	0x77761e61,	0x5e389da7,	0xbd2ed152,
-0x12f83a57,	0x5ccbd078,	0x59b83ed1,	0xadf31986,
-0x7a6876a1,	0x85d73aae,	0xe95d04ed,	0x4388655d,
-0xa0b0d497,	0x2c6a7024,	0xf1a4dd74,	0x727db2b1,
-0xc6754f1c,	0xa415d28c,	0x30eef95a,	0x7a666cea,
-0x46fbf49c,	0x5a025875,	0x9ca5a567,	0xa733b313,
-0xf12f6d90,	0x311cf9e5,	0xdd8dd045,	0x1dc3e7ae,
-0xa2244073,	0x3c6e226d,	0x1f41a59a,	0xbe9e8a9f,
-0xe1aeb300,	0x0ae56455,	0x86b5a9b0,	0x703d1db2,
-0x93d12152,	0x74c7edaf,	0xce7613ff,	0x64e51d14,
-0x9647890b,	0x2b58dd1a,	0x3e6ae7a2,	0xbe115253,
-0xf53fab3f,	0x7c330770,	0x2b638229,	0x3818ee02,
-0x8dde2c6f,	0x4460890a,	0x3e9e0e94,	0x26849a8d,
-0xc1b2650b,	0xf3f7ae06,	0xfbc053e9,	0xc34ca163,
-0x4ec223d3,	0xd36c1e5a,	0xdcac208f,	0x66c35123,
-0x9b4ee0f9,	0xbc93432c,	0xc0c01601,	0x32b155f6,
-0x8b34d4ac,	0x4d6fe308,	0x2dc615ae,	0xfbba948c,
-0x33b44c6c,	0x7c81f21d,	0x58be544a,	0x1affca18,
-0x0f154ffd,	0x42a98896,	0xa0cce907,	0x05312e20,
-0xa6426074,	0xe1471d00,	0x49ae6b6a,	0x72ed1d80,
-0x941717c9,	0x1d337582,	0x79d00ff1,	0x8a33442e,
-0xb4b8048e,	0xb10f5e29,	0xe49adb1f,	0xf606d936,
-0x9e64a48a,	0x2798ca4c,	0x5bc89516,	0x896226b9,
-0xb0646e9c,	0x226f5c42,	0x66781db5,	0x6f9a01ce,
-0xd97151c0,	0xa45d99a0,	0x845444e3,	0xa3a892aa,
-0x834c639a,	0x023448c9,	0x7b26e665,	0x7940d360,
-0x9ed67063,	0x08fca668,	0x3c1a2590,	0x92394899,
-0x351be05d,	0x559909d6,	0x9cd99043,	0x1acdb27f,
-0x2d8930b8,	0x8df9e8a4,	0x3d7ead35,	0xc869e9dc,
-0xd8120806,	0xbb6a186f,	0x9db90814,	0x52cd6f02,
-0x95b53a7c,	0x6e92399e,	0x3f00ba76,	0x09a35b31,
-0xe2e645ef,	0x6944b5ae,	0x5e69f59d,	0x1a631079,
-0xfdd43365,	0xe83a78c3,	0x3ba16d56,	0x2554f72e,
-0xa44fe15b,	0xc09dd248,	0xb63e4d82,	0x7572edc9,
-0x0c6ee455,	0xdf3be237,	0x33456703,	0x0b8a647e,
-0x4c475cb9,	0x16841559,	0xab64dce7,	0x3a25aaa9,
-0xa2ce8a2b,	0xbd102516,	0x15a79361,	0xbbde9e34,
-0xeb49e937,	0x17e30184,	0x8a748c74,	0x7adb053e,
-0xdfaa9cc5,	0x87726609,	0x40733e38,	0xc30353b7,
-0xee8526f9,	0xc476c3ec,	0xc1b61e75,	0xb24fdb4d,
-0x26b0b013,	0x9d69934d,	0x7fcad18e,	0x27071b9e,
-0x8d37b0a3,	0x9a2c22f5,	0x6c32b757,	0xdf475284,
-0xef6ca6ac,	0xe3043191,	0x843e1f7b,	0x18370498,
-0x89c0fa3a,	0x4272153f,	0xb2ba7587,	0xbfcd3cc4,
-0x07636f04,	0xcc77befb,	0x028bbb3d,	0x89e44bac,
-0x57bd037d,	0x82afd10f,	0x9db9582d,	0x7b711a6c,
-0xfdbdb2b5,	0x94e2764f,	0xc53a20dd,	0x18138802,
-0xbb75568c,	0xc8cca231,	0x11fee743,	0xdd337e00,
-0xe6f94e17,	0x505bbac5,	0xb08d48cb,	0x61c1867a,
-0x5dfb2dc5,	0xf2a8863f,	0xcc820db5,	0xaf51b84c,
-0x66e172a4,	0xc07e1384,	0x8e82c130,	0x89f6e0ad,
-0x694da862,	0x3a8ac6ed,	0x09ad8825,	0xf1b0090c,
-0x4cd32378,	0x410696e6,	0x192edc8a,	0x39134d0a,
-0xa7a1382e,	0x784a8368,	0xba7abc9b,	0x88949b96,
-0x2578dcf4,	0xa4b7ce08,	0xbed48d02,	0x1a9b01e4,
-0xf9633fec,	0xae7e2742,	0x227d4b81,	0xbdf30185,
-0x224dea60,	0xee81accd,	0x25f2b08b,	0xde2ee35f,
-0xb0d65f1f,	0xf1aab589,	0x7a91f930,	0xdfb1981d,
-0x3d3da3b0,	0xe181d149,	0xfbcb31ee,	0x5b4aa474,
-0x9168c11e,	0x0f08e481,	0xb18f7c33,	0x1ca7037e,
-0x4e6f5655,	0x923448d7,	0x1f6fce9b,	0x837719d2,
-0xa987db8a,	0xc8ae46ee,	0x8b05f69a,	0xb35172ff,
-0x3f3a85ad,	0xe57d43c5,	0xa2283900,	0x3373e247,
-0x02e8b610,	0xdec5ab79,	0x31c68d88,	0xec759c54,
-0x81217f7d,	0xc5341bbf,	0xfda829f6,	0xc33589dc,
-0xa91f0f8e,	0x60c93c2d,	0x5e538ca8,	0x90e49c0e,
-0xc0b69780,	0x153df7e5,	0x6ae2de2a,	0x616ff1d4,
-0xcca0bf75,	0x1f8ae53a,	0xc244f3d9,	0xc91c8472,
-0x9f936556,	0x6c662ca7,	0x4d2b5f45,	0xccf8b9cb,
-0xbb68825f,	0xe52a4c8e,	0x9ee37080,	0x3fbce3d8,
-0xf643e0dc,	0xff5fd921,	0x84cb06b3,	0x51a5145e,
-0x7b2c2695,	0x13c7e8d3,	0x9ed66926,	0x1341cb47,
-0x42cc8568,	0x9938749e,	0xcde43726,	0x0258a7bd,
-0x43a10696,	0x7a884a65,	0x6d83dd91,	0x95812dda,
-0x9f21a22f,	0xa19a9b9d,	0xeaf443e8,	0x5f8a5291,
-0xc1e642e5,	0x6062a500,	0x385b2216,	0xe9f4131c,
-0x5f3ff193,	0xf6bce64a,	0x830fedcc,	0x48664d0c,
-0x0e2c257e,	0xb1accb6e,	0xed5fa45f,	0xf8db51cd,
-0xc52f7dc0,	0xfd3c5827,	0x1c3205a1,	0x880aebfe,
-0x8ede639f,	0x33b571e8,	0xc3e0654b,	0x7ede09e2,
-0xc9e68670,	0xac7cd171,	0xe2edd7a1,	0xa45ddcc7,
-0xfcc7d984,	0xf02c9b03,	0x52394e1d,	0xa6cfaaf4,
-0x23baef7a,	0x8b96bf49,	0x93e80294,	0x8055a06b,
-0x5898e892,	0x617d96af,	0x37350bad,	0x8fc3dff3,
-0x60a52f0b,	0x9def79c4,	0x9d6f94f9,	0x9e556075,
-0xb944be10,	0xcf5e2714,	0x10c907b4,	0x0d76da26,
-0xeeb77532,	0x548e93f9,	0xfb998635,	0x2dc37462,
-0x42062f78,	0xe388ed30,	0xd97fa29e,	0xa267e5f0,
-0x85212e17,	0x6609d6fd,	0xd64892a4,	0x932f7670,
-0xc277546f,	0x8a70d43c,	0x8702feb6,	0x0b36605b,
-0x6147fc62,	0xe5ec14c7,	0x82f2c3a7,	0x17b60a70,
-0x2416386f,	0x8afe5984,	0x31ac1998,	0xcc197865,
-0xa989b0dd,	0x55a7375c,	0x369fa535,	0x568688f8,
-0x27b70c7f,	0x61bd2659,	0x3ab883b1,	0x88b14a56,
-0x460f2182,	0x98a1dc7c,	0xce522d1b,	0xee6d1b6c,
-0x2f4bb32f,	0x74f14df4,	0xfb6144d1,	0xc3fcbf6f,
-0x1b7856d2,	0x74dafb9c,	0x51d77f6a,	0x38d4d4e7,
-0x69627fb5,	0x9a92c599,	0xe546cd12,	0x1a8dfc51,
-0x6f839ef0,	0xfdadec74,	0x89f78d83,	0x5d38f865,
-0x8ca4e5a7,	0x76dd90a5,	0x6df3aee4,	0x6ea6597b,
-0x94f4852e,	0x4fe64699,	0x922f2dd4,	0x6349472b,
-0xa4faae98,	0x9552c266,	0xf19796f8,	0xf92ba4d1,
-0xcec2c512,	0xe6d8ec88,	0x806a6510,	0x591a8029,
-0xb27e0e75,	0x4b498ae2,	0x8229ced6,	0xec572cff,
-0xca6b1c90,	0xb3554e0a,	0xca75d97e,	0xec4fd94f,
-0xf20f74aa,	0xe6279bff,	0xd2f39977,	0x0fcdfe05,
-0x1145a1aa,	0x1a8546fa,	0x9a170744,	0xa3162881,
-0xa007a442,	0xec46d8b5,	0x081a42fa,	0x22422349,
-0x84c31269,	0xb303f015,	0x2e900aaa,	0x3b7e907b,
-0x97a1993a,	0x0284ddc7,	0x1cb4c670,	0xf9d8434b,
-0x83576a7e,	0x9eaaadd7,	0x55810058,	0x1a1606a7,
-0x3610625b,	0xe69c59a5,	0x10afd0de,	0x1634a5e2,
-0x7fc9a724,	0x7c6187fa,	0x6235f7bd,	0x73944f07,
-0xec8074c8,	0xdfce3d7b,	0xe614796b,	0x7e986a41,
-0x5f4d958d,	0x56f802fa,	0x21f6b36b,	0x3756c152,
-0x3e4a6199,	0x5be0e06e,	0x9d523fe0,	0x72fda3ff,
-0x1163d5cc,	0x774fc8d8,	0x4c0db698,	0x5a2a11e5,
-0xefdb4f36,	0xc5c5ee63,	0xd84fadce,	0x2a2a161e,
-0x03c8f569,	0x10fdc78b,	0xb9794421,	0xc4d077d0,
-0x3978bd0e,	0x1c5ade2d,	0x45b455e8,	0xf48c9fe2,
-0xbc26f839,	0x4b713c85,	0xc193aad9,	0xce5eaf94,
-0x432faf89,	0x410dab7e,	0xe1abcbf1,	0xd6b13174,
-0xeb011212,	0x371be2b7,	0xc399bba1,	0x0ffe277e,
-0x46cbb9c6,	0x7ff9db28,	0x6056db1b,	0x0ba02d79,
-0x0a65731f,	0xff62546f,	0x7d812358,	0x612fcd9d,
-0xf9210ff0,	0x97bb1fc6,	0x4d2249de,	0xf95bf80b,
-0x3afa6490,	0x8c0fe761,	0x79171dd1,	0xe8e994bc,
-0x31a2c316,	0xc2bbc146,	0xd43c3d42,	0xe5f2cc54,
-0x1eee7dde,	0x823303ba,	0xa3604384,	0x1cc7d7ad,
-0xe5559ebc,	0xf018b78a,	0xd90a9e8e,	0x9e094d25,
-0x6c707edc,	0xbfb5a38e,	0x85982dc4,	0x4411003e,
-0xe8fdd369,	0xd8b906c5,	0x352a0347,	0xaac3354c,
-0xa75dbd61,	0x4af3960b,	0xcdd38fb1,	0x7956c4b5,
-0x73227797,	0xdaf8600b,	0xf40250fb,	0xd19b63bb,
-0x29635cfe,	0x627b51dd,	0x90d757b6,	0x8f974700,
-0x983e3273,	0x8a717fd2,	0x17cd36fc,	0x600df009,
-0x53e42b03,	0x7a2bda37,	0xade90954,	0x788a22c9,
-0xb0167c4a,	0xe8480a66,	0x7fc4ded0,	0x5143e0be,
-0xf4b3da8e,	0x48cd18d0,	0x272fd36e,	0xbb72da4d,
-0x3099ffc4,	0xadfa2cc6,	0x938a3510,	0x93d3c8db,
-0xd6f68de5,	0x419f1575,	0xf1c4bb2c,	0x790daf62,
-0x2ba89c2d,	0x3a0ac185,	0xe0a8c467,	0x865ee271,
-0xec621c02,	0x2ff3cfc4,	0xf9f4a354,	0x33af9bd9,
-0x708aacf6,	0x9dffa81f,	0xebf49f94,	0x845bf6c2,
-0x6d29a726,	0x43e36b77,	0x293fe7ef,	0xc9d2eae3,
-0x074b9fa4,	0xc9bad66a,	0x1062c791,	0x3fd77f6e,
-0x0d3683c3,	0xc9fb01b8,	0x471e0a05,	0x8063b387,
-0xc18ca25e,	0x7e2164fd,	0x209476dd,	0x12f9f7be,
-0xd9188d27,	0x5d890aad,	0xf25774e4,	0x4d02e791,
-0xa607ecb4,	0x25fca908,	0x936dfb38,	0x1890ec41,
-0x96085379,	0x5ab84c61,	0x395ca1b4,	0x1ebb2147,
-0x0b9322b4,	0x9be07783,	0x61fcdc95,	0x7aa96834,
-0xdab5d16f,	0xe41afed5,	0x214ddb2a,	0x25697ca9,
-0xc9393707,	0x2c585095,	0xdfb5c330,	0x6b533070,
-0xb7306018,	0xeccbcd83,	0x9a50dc30,	0x142425d2,
-0x070e244b,	0x1118e0bc,	0xf68febd7,	0x5a9a1397,
-0x779288d3,	0x151703ad,	0x23724d8c,	0x0b8da97f,
-0x1de2739a,	0x489c3a40,	0x1dad73c4,	0xdfdf0387,
-0x103c12c9,	0x3a8f8def,	0x0b9943ea,	0xde546074,
-0xdf870baa,	0xbec7392a,	0xfc9e7d02,	0xdb73b6db,
-0xc42184e6,	0x6905096c,	0x69ae51b4,	0xffb2d6cc,
-0x879a440b,	0x76f8555e,	0xcc503ef0,	0xa565fc1d,
-0xc39b393c,	0x1e5d123b,	0x59fb03ff,	0xd4813539,
-0x7b058d78,	0xe2aaed04,	0xf3c8df0f,	0xfc90fb1e,
-0x64907388,	0x7de95aee,	0x68dbfb56,	0xdbb295c2,
-0x00fd35e6,	0x9fcb3ea4,	0x813d9a1a,	0xe1b5dd56,
-0x15725952,	0x107472da,	0x2efb4170,	0x27d0e494,
-0xef9116ff,	0xe8b76c6a,	0x5a7df8ff,	0x67daed68,
-0xc8186ae4,	0xe37d9374,	0xbecac2ec,	0xf26219a1,
-0xbc4aab4e,	0x8a19a1e8,	0xf9605e6e,	0x28748ce6,
-0xc05154b9,	0x1432b9e4,	0x56347eaa,	0x9eb98f93,
-0x0825fc1e,	0xe118206b,	0x5da3e763,	0xc6d33e9d,
-0x3a3a42d6,	0x2312c6d6,	0x849e45ad,	0x7271e432,
-0x89dbc974,	0x33d476ee,	0x013348df,	0x61b7fa2c,
-0xf054e2d8,	0xdc783dd5,	0x74237443,	0xb26e60ae,
-0x5e6af18a,	0xaf21f496,	0xb37d6f6d,	0xda12fb93,
-0x3861c214,	0x927216db,	0xe395ee9a,	0x7619606e,
-0x4977fd38,	0xfc6c7787,	0x6873a07f,	0xe5575869,
-0xf07d93e4,	0xc055393d,	0xcd31c834,	0x383010fa,
-0x41a54b2c,	0xc32b4f05,	0x012bce95,	0x3e12d82f,
-0x2ff3e71f,	0xb5c30436,	0x05cc0dd2,	0x1367d514,
-0x77506a56,	0xbb3034bc,	0x52335401,	0x7b415346,
-0x12393af6,	0x79f4a81a,	0xbbd645ba,	0x4d79ad9d,
-0x6323bf7c,	0xf5f51839,	0xa2940281,	0x2f09745c,
-0x0e815109,	0x98a63023,	0x8c7a24d3,	0x63d48867,
-0x0e15331f,	0xf2e3dca2,	0xa5a92c2d,	0x514a6a29,
-0xf35a8648,	0x1896a171,	0xe7afe546,	0xe96c4978,
-0x4c999244,	0xeecf15c0,	0xf47200f8,	0x69284fb6,
-0x24f56331,	0x61ae3f24,	0xd71618ac,	0xc87934bd,
-0xe96101d1,	0x55d1976c,	0x471c8505,	0x7a36d839,
-0x5d62a9ee,	0xf3c54a8a,	0xa2be15d9,	0x244087c9,
-0x042c8037,	0x23224689,	0x281c5d73,	0x2139ecfc,
-0xffb8bc8a,	0x834fdd11,	0x9cd5a5bd,	0xa3368319,
-0x7e5bef0c,	0x4ae2dbda,	0x86d90089,	0x6675dfce,
-0x48876262,	0xcec72538,	0x11dc5c80,	0x86a730f9,
-0x313565c9,	0xe3e5be11,	0x106d7cce,	0x752b8be2,
-0x3d00a5bc,	0xe6f70e95,	0x44447ac8,	0x600df30c,
-0x8335ac3b,	0x8816ddee,	0x700982fe,	0xee495741,
-0x48c7e81c,	0xa3d55da2,	0xb0172982,	0x70ab2158,
-0xd4460621,	0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,
-0xa8454763,	0x70877bb6,	0x66005c97,	0xaf292c06,
-0x7b843db1,	0xf343b59b,	0x25cdc7b5,	0xa41da617,
-0x9e9d895e,	0xc936f475,	0x7270925a,	0x30024230,
-0x8e72f53d,	0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,
-0xfc18a2a3,	0xaf377cc1,	0xbff09a78,	0x4b4e0814,
-0x95a0b2c1,	0x270398de,	0x201fca94,	0x2a032a4f,
-0x131542b4,	0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,
-0xa814ddc9,	0xa3b3a991,	0x17ee60c2,	0x852c0b8d,
-0x11e5853a,	0x762002a7,	0x92c5311d,	0x0d4bf7e1,
-0xfffec870,	0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,
-0x0111a772,	0x9808e780,	0x29c336e8,	0xe9bc05df,
-0x5bedde11,	0x945565af,	0xaff808fe,	0x87e3423d,
-0x4de6f98f,	0x93b4adef,	0xbf704fa4,	0x09120e91,
-0xd54f3692,	0xdf8eab1e,	0xfabbf59c,	0xe74318be,
-0xaab87ffc,	0x29fa791c,	0xe3915552,	0xa652cb9b,
-0xa1252e74,	0xb35b723b,	0x542aa28b,	0x12fcc5b0,
-0x3941f962,	0x82bcc6cc,	0x47b11974,	0xb821611f,
-0x78b34250,	0xf1be5659,	0x561b9e61,	0x6f3bd501,
-0x584e6f5c,	0xd54ed547,	0xacebcd21,	0x7b5ff816,
-0xb64ad233,	0x9f2f330d,	0x69fb1ece,	0xac8710dd,
-0x58dc6c60,	0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,
-0xebc0ce9d,	0xa733274f,	0x884d9b55,	0x42b08b63,
-0xafa54a74,	0x1c7ccf64,	0x93a20191,	0xaaa3132e,
-0xc69831d1,	0x54634889,	0xfbfe3efc,	0xd3cf68d4,
-0x302e3117,	0xf5693131,	0xc3ce8c6c,	0x1f03cd89,
-0x6243334c,	0xf16bc80f,	0xdca5f130,	0xcb2cd956,
-0x4c1bb421,	0xe8de533c,	0x7f86703a,	0x29aa897e,
-0xdd54acad,	0x76b2f2ae,	0x7ef82b71,	0x2e30970b,
-0xba402597,	0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,
-0x7f9efd1c,	0x2363d147,	0x5327289a,	0xe89229f3,
-0xd63a535c,	0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,
-0x26b6edfb,	0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,
-0x6d65db4c,	0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,
-0xe20e6dbb,	0x8488a45f,	0x8ebc2932,	0xd4767316,
-0x3e8c4b8a,	0xbab7402c,	0xfc1e217e,	0xe5c5bf82,
-0x6928fe2e,	0xc88528e9,	0x4b2e4e8f,	0xdd938b86,
-0x0c964f98,	0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,
-0x197d005a,	0x4d40b3b3,	0xcf203155,	0x0d2fa621,
-0x752d2c58,	0xb12bac12,	0x1e7e8c23,	0x94215d54,
-0x9854a71c,	0x4de63c64,	0x7a012529,	0x9c171f8d,
-0x9e71def7,	0x3bd17d50,	0x11f175d9,	0xec78abf3,
-0x7b529eee,	0xd3a69fc3,	0x5b718676,	0x58214d29,
-0xa8bd2c34,	0x41ea00ab,	0xa03f64d6,	0x4ee342b0,
-0x32b1e444,	0x1c1801a4,	0xc8424702,	0x334a7e35,
-0x50cf1543,	0x3b22b495,	0x88683776,	0x8e2e0154,
-0x6155c033,	0x4e2fa6ac,	0x42ace700,	0x8d64f97c,
-0xaf9ced17,	0xb2a5cb92,	0xa558582d,	0x88705de7,
-0x9e528d59,	0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,

cpu/intel/model_6fx/microcode-m806fa95.h

diff --git a/cpu/intel/model_6fx/microcode-m806fa95.h b/cpu/intel/model_6fx/microcode-m806fa95.h
deleted file mode 100644
index 828a0ea..0000000
--- a/cpu/intel/model_6fx/microcode-m806fa95.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m806fa95.inc  */
-0x00000001,	0x00000095,	0x10022010,	0x000006fa,
-0x9f4b38d8,	0x00000001,	0x00000080,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x266c1f19,	0x352c0de2,	0x3acdf837,	0x5496754c,
-0xd5254881,	0x499f34c5,	0x7898fca2,	0xb1e19b6b,
-0x8fe8f579,	0x6706f2db,	0xb031d49b,	0x86a19a7c,
-0xca13c14b,	0xa8a547ec,	0xd66db20f,	0x4ed88a89,
-0x19f9aae9,	0x19d77426,	0xdc41870a,	0x7ff6c327,
-0x2ba8b6e2,	0x6f83d3d4,	0x15572089,	0x8cfdb896,
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-0xfd9c06c4,	0x4eacf789,	0xff837a16,	0x71f46189,
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-0xe0811bd9,	0x9a78235d,	0x7408f19d,	0xdd58cd25,
-0x9c0d85c3,	0xc537342d,	0xaf517762,	0x044ffaee,
-0x14ceac9d,	0x6423b9b6,	0xa6415e77,	0xfbed71a6,
-0x3e63dbd5,	0x58d97b5c,	0xda3deb0a,	0x60225b8c,
-0xb99b0a8b,	0x14927963,	0x9b9ac0d1,	0xb7a80b79,
-0x7e13e359,	0x0424b873,	0xa4b3916d,	0x921ca677,
-0xf120013b,	0x24d32d92,	0x34701298,	0xa1818766,
-0x20054137,	0x4b55259d,	0x6d8eb154,	0x662b974f,
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-0xa3791b2a,	0x4f08929d,	0x2dcad5fc,	0x0214885f,
-0x4518a0ae,	0xea6bc9ee,	0x628553b2,	0xaae89146,
-0x0e2cbd3c,	0x9513f8e2,	0xbabbe1f0,	0x1b04a7d5,
-0xafc23288,	0xb6960ac1,	0xe3f4d62a,	0xa7299342,
-0xec3d1c26,	0x5aad53ec,	0x155133b9,	0x58787e9f,
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-0x1f7ee426,	0xcf2d7608,	0x7408f19d,	0x77f2678f,
-0x36a72f69,	0x90626178,	0x05fbddc8,	0x044ffaee,
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-0x3e63dbd5,	0x0d8c2e09,	0x8f68be5f,	0x9fdda473,
-0xecce5fde,	0x14927963,	0x31306a7b,	0x1d02a1d3,
-0x2b46b60c,	0xae8e12d9,	0xa4b3916d,	0x6de35988,
-0x0edffec4,	0x8e798738,	0xcb8fed67,	0xa1818766,
-0x75501462,	0x1e0070c8,	0x92714eab,	0x337ec21a,
-0xa8c95391,	0xb1530876,	0xaad62f43,	0x71f46189,
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-0x87f9850b,	0x908f593c,	0xaeb0c80c,	0x2465158a,
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-0xa645ce0d,	0xf3414185,	0x7831b93e,	0xe6b757f7,
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-0x165393c5,	0xb91f41c1,	0xd92c45f5,	0xb3880143,
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-0xe9093fb0,	0x7ebe1951,	0x3374ed2e,	0x83a0586d,
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-0x9c98a224,	0xf62047c3,	0xaf7b6133,	0xfc4886e2,
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-0x6cadf7b7,	0xb1e21555,	0x7b3c1391,	0x82008b3c,
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-0x78b34250,	0xf1be5659,	0x561b9e61,	0x6f3bd501,
-0x584e6f5c,	0xd54ed547,	0xacebcd21,	0x7b5ff816,
-0xb64ad233,	0x9f2f330d,	0x69fb1ece,	0xac8710dd,
-0x58dc6c60,	0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,
-0xebc0ce9d,	0xa733274f,	0x884d9b55,	0x42b08b63,
-0xafa54a74,	0x1c7ccf64,	0x93a20191,	0xaaa3132e,
-0xc69831d1,	0x54634889,	0xfbfe3efc,	0xd3cf68d4,
-0x302e3117,	0xf5693131,	0xc3ce8c6c,	0x1f03cd89,
-0x6243334c,	0xf16bc80f,	0xdca5f130,	0xcb2cd956,
-0x4c1bb421,	0xe8de533c,	0x7f86703a,	0x29aa897e,
-0xdd54acad,	0x76b2f2ae,	0x7ef82b71,	0x2e30970b,
-0xba402597,	0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,
-0x7f9efd1c,	0x2363d147,	0x5327289a,	0xe89229f3,
-0xd63a535c,	0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,
-0x26b6edfb,	0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,
-0x6d65db4c,	0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,
-0xe20e6dbb,	0x8488a45f,	0x8ebc2932,	0xd4767316,
-0x3e8c4b8a,	0xbab7402c,	0xfc1e217e,	0xe5c5bf82,
-0x6928fe2e,	0xc88528e9,	0x4b2e4e8f,	0xdd938b86,
-0x0c964f98,	0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,
-0x197d005a,	0x4d40b3b3,	0xcf203155,	0x0d2fa621,
-0x752d2c58,	0xb12bac12,	0x1e7e8c23,	0x94215d54,
-0x9854a71c,	0x4de63c64,	0x7a012529,	0x9c171f8d,
-0x9e71def7,	0x3bd17d50,	0x11f175d9,	0xec78abf3,
-0x7b529eee,	0xd3a69fc3,	0x5b718676,	0x58214d29,
-0xa8bd2c34,	0x41ea00ab,	0xa03f64d6,	0x4ee342b0,
-0x32b1e444,	0x1c1801a4,	0xc8424702,	0x334a7e35,
-0x50cf1543,	0x3b22b495,	0x88683776,	0x8e2e0154,
-0x6155c033,	0x4e2fa6ac,	0x42ace700,	0x8d64f97c,
-0xaf9ced17,	0xb2a5cb92,	0xa558582d,	0x88705de7,
-0x9e528d59,	0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,

cpu/intel/model_6fx/microcode-m806fbBA.h

diff --git a/cpu/intel/model_6fx/microcode-m806fbBA.h b/cpu/intel/model_6fx/microcode-m806fbBA.h
deleted file mode 100644
index 3ec5c6c..0000000
--- a/cpu/intel/model_6fx/microcode-m806fbBA.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m806fbBA.inc  */
-0x00000001,	0x000000ba,	0x10032010,	0x000006fb,
-0xf953dc67,	0x00000001,	0x00000080,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x000000a1,	0x00020001,	0x000000ba,
-0x00000035,	0x2a000000,	0x20101002,	0x000002f1,
-0x00000001,	0x000006fb,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x21d97964,	0x9846e570,	0x1d30fb85,	0xb909572f,
-0x88a15af6,	0xcff6f5d8,	0x01ade078,	0x72eac781,
-0x58d10d9f,	0xb7f2421d,	0xe4d5fcf1,	0x02889a15,
-0xad9bed07,	0xa32ab3e6,	0x3491afcc,	0x9c991c37,
-0x2a1c2071,	0xf066191a,	0x3bd898e7,	0x2648d958,
-0xc05f7908,	0x05864b9b,	0xbe4c1eee,	0x1e6c7ef4,
-0x0e7a539e,	0x100b2ab3,	0x1273dceb,	0xfec8847d,
-0x8f37946f,	0x634e3b5c,	0x691dbd61,	0xd89e3cb9,
-0x094639d4,	0x7d972e1a,	0xd6dbd94d,	0x2001c3ec,
-0x34f791f0,	0xeee0d794,	0x88b7459d,	0xc2c73aa3,
-0x607a174d,	0x4f0f8304,	0x65790b35,	0x00532bfe,
-0x1fd1e0cc,	0x7b91f873,	0x154ed42b,	0x7a7108e9,
-0x81637c95,	0x192cb173,	0x28ccd94e,	0xb9bcc372,
-0xac05171b,	0x867f47da,	0xf8e8c47d,	0x1edcdb4a,
-0xd2ca6c2d,	0xe9ee9169,	0x5a6efedc,	0xb6825038,
-0x09277eaa,	0x2a34e580,	0x0f794366,	0x86c99402,
-0x211b98bf,	0xdf8eb0e3,	0xda11d7bd,	0xd440363e,
-0xa7d49f1a,	0x16dd7395,	0x5b23c2fc,	0xab93ea3c,
-0x00000011,	0x3e547655,	0xa3c23fd3,	0xc4b7878e,
-0x8783318c,	0x52cc22bf,	0xaf347896,	0x54342107,
-0x72c7bb6c,	0x3e13b80d,	0x46bc1a33,	0x23cfc252,
-0x0d4ef13b,	0xc21dc600,	0xdb9ec613,	0x0899f190,
-0xafbb3213,	0x0652ed0a,	0x739aaabe,	0xa4d1ce13,
-0x0fb0b628,	0x1270dc1a,	0xb6d7833f,	0x6846a946,
-0xbc8adbe3,	0xb9f43c78,	0x2008edcb,	0x5a9c34a8,
-0xb38931a2,	0x0c0a82a8,	0xf1e458a2,	0xa20645df,
-0xcb6bb4ee,	0x85c91f0c,	0xed3e330d,	0x76c74422,
-0xdde7d6a0,	0x0af339f8,	0x1a7c4dbc,	0xe79f6e3a,
-0x73b720c9,	0xe1e83952,	0x686f7729,	0xf1925af1,
-0x2b154459,	0x1c540322,	0x5ec2fc7d,	0x87597cd3,
-0xb2031f29,	0x94589a6d,	0x55c3330e,	0x33af7895,
-0xedd71f83,	0xa5a11a4a,	0x4bc706ed,	0xf6f04df1,
-0x724cad51,	0x0a677c56,	0xd0356d3b,	0x6068e86c,
-0xd74f070f,	0xc07b0e3a,	0xa0b98d7d,	0x0041181d,
-0x79266ba5,	0x3ff83201,	0xd1b327ee,	0xaf55f568,
-0xe936acaf,	0xaa5dca57,	0xdeae2b1a,	0xd6643058,
-0x389cec0d,	0x7e524e3c,	0xb0b13d46,	0xbe0722c4,
-0x4fe4f260,	0x6569767a,	0x4ded63fd,	0x03474b65,
-0xe1875127,	0x328e6736,	0x2166cb67,	0x50ee94e8,
-0xd0a26ea2,	0x9751ca79,	0x22c0a65f,	0x5c458980,
-0xe9b9c62f,	0xa13221b6,	0xb43292db,	0x36e2b143,
-0xff8ba502,	0x3f42d32d,	0xd043d05c,	0x77bd8a19,
-0x9a652b71,	0xaae1b2d0,	0xe490085a,	0x181145c7,
-0xbfc061c4,	0x18bfd9b0,	0x22b830b4,	0x5201a02d,
-0x5651bc35,	0x535005f8,	0xcbe674e1,	0xe78d03ce,
-0xc52d0fa2,	0xc8b78a1f,	0x1b694c97,	0xce0e7567,
-0x0f2229de,	0x98c847cc,	0xe68554d7,	0xf9864b16,
-0x3cc47a83,	0x941221d2,	0xcc3a7ef4,	0x0170bb22,
-0xc9053a4b,	0x9c7721de,	0xed941a9b,	0x8be05de7,
-0x2f42fd5e,	0x36b0a67f,	0xb306a1f5,	0x34abbc36,
-0x24c17625,	0x6a3de329,	0x01988238,	0x066a1868,
-0xafca471d,	0xd2adc39b,	0x813525b3,	0x00a0acf5,
-0x2aa361cf,	0x4dbe173e,	0xdaf77894,	0xaa889ded,
-0xa3697b54,	0x80d26705,	0x0c2da0f3,	0x58a4b8a4,
-0x39cc0d4e,	0x3c9d4670,	0xd2b5d20e,	0x2724e973,
-0xb1351d5c,	0x20906d79,	0xe24891e5,	0x2035c218,
-0x4e0139ea,	0x56be6bd7,	0x083b0550,	0xbb402759,
-0xfd95c78d,	0x9fb7daa5,	0x60175f4c,	0x32446eb0,
-0x5021b32b,	0xa772bf99,	0x377195f7,	0x442fb939,
-0x4425cf3f,	0xd0413035,	0x515c39e8,	0x869ee778,
-0x8d4c2561,	0x826a5d49,	0xba1d315e,	0xd850a5b1,
-0x3241090d,	0x4bc25949,	0xa08b2d5e,	0xb69c0931,
-0x7c510465,	0xffb294e3,	0xbd919d03,	0x591938b8,
-0x66fce51e,	0x1da2e975,	0x513c2611,	0xd2c89b3b,
-0x55fa8777,	0x7287353f,	0x0e53d7f5,	0x409d5772,
-0x2db94ea8,	0xde0e9927,	0x8a1e2ac7,	0x1f7ec493,
-0x61089e93,	0x6abe868e,	0xc0df9a96,	0x4436a57d,
-0x0c48c8b0,	0xa247ee28,	0x141d6787,	0x1b12b920,
-0x2e21a991,	0xf0ff3f1d,	0xab4b5b32,	0xc0a0ca68,
-0x430e80d8,	0x8d74a965,	0xb54d5f63,	0x5d68e9e4,
-0x6b548ee8,	0xf047d59a,	0x3b4789f9,	0x21b5069c,
-0xf913817b,	0x732e9a9d,	0x2874cc28,	0xa9627bc0,
-0x6fdb58d6,	0x13587cf9,	0x39ce92e1,	0x36b9492d,
-0x5408f555,	0x8ffe55ba,	0xb43c9df5,	0xfac29337,
-0x56cbe2b3,	0x0185d1ed,	0x9be346e7,	0x40a19df7,
-0x3c1a2895,	0x4d26af1f,	0x45a55ab6,	0xa842ab52,
-0x1f747d77,	0xe0d9102c,	0xf971b544,	0x7ee0828a,
-0xfe3c6fac,	0x25395596,	0xc9b47fa3,	0x156ce98b,
-0x8f31e2b0,	0xb6e25664,	0x9640f47b,	0x8ac2d5bf,
-0x840e6610,	0xa97a44b9,	0x3fdc0ea8,	0x06910a51,
-0x2091b59a,	0x9c2e5439,	0xf8842451,	0x3f9a4ff3,
-0x362a0004,	0x12dad719,	0xb2f60dd0,	0xa97a0474,
-0xfa3560c2,	0x7fd81bf8,	0x57f7532e,	0x23486049,
-0xaafefb9f,	0xc66725ee,	0xdb9cd720,	0x63f4e092,
-0xd0a26789,	0x64b0aa78,	0x58af8ea1,	0x585d3712,
-0x1fd2f90f,	0x8e0574b1,	0x50e4b136,	0x2c1dbb31,
-0xc02feb6b,	0xa2714a85,	0x9130f487,	0x4a1253c2,
-0x6bad5346,	0x546c4765,	0x4fd9e206,	0x1e958eea,
-0x9015b920,	0x50328bec,	0x1cb229f7,	0xe68970ce,
-0x6596e986,	0x5bc7ebcb,	0x68a13530,	0x773e1ef7,
-0x705d8d8e,	0x58a4be35,	0xd1b47b52,	0x0c1d7eb9,
-0x94c9bb62,	0x9f8b78f3,	0xeb6f4c67,	0xe1359c6a,
-0xcc9bb75c,	0xc58dbc28,	0x53972a64,	0x1e077ac9,
-0x30b94c6d,	0x85bd7fca,	0x834a8432,	0xa56b0993,
-0xe8298659,	0x75f7aa51,	0xeff8d034,	0x89ff3761,
-0xe5280f0a,	0x62dc4a8e,	0xa3993ac8,	0x71122e79,
-0xd47785e2,	0x34158175,	0x63c8d85b,	0x7ac99eef,
-0xe0bd1e85,	0xd34d96cb,	0xb98776ef,	0x2ced7ad0,
-0x8de1a90b,	0xb91c6986,	0x031585b2,	0x945f0055,
-0xd619c86e,	0xbcd30cf2,	0x4bf7ffbd,	0x723a068b,
-0x19063c35,	0xb1a0bf7e,	0x76712f67,	0xd4a648d3,
-0x2eac160d,	0x284404e3,	0xc8a18a02,	0x2ff33921,
-0x8d56011a,	0xfda7cc43,	0x41e15608,	0xec688d2d,
-0x648eb60c,	0xe67029e2,	0x481e2a28,	0x82748afd,
-0xd243f0e6,	0x7d48b037,	0x8911dd57,	0x9876663d,
-0xdfc8715f,	0xa725ff6a,	0x18ceae0c,	0x571c5836,
-0x017ec3a0,	0x23e2b7bc,	0x8a19e5d1,	0x49f1ad67,
-0x6eb53ff0,	0x70d5e83f,	0x8d587f1b,	0x9fcd1b0d,
-0xb77c9c28,	0x0fa9ffc9,	0x2567087e,	0xd2626fa6,
-0x13a3d9f8,	0x327f16ea,	0xcf6c283d,	0x9cb948d5,
-0x82d61c27,	0xee7df429,	0xdba4362f,	0x873cd73f,
-0x3ea8c681,	0x99914378,	0x3cdb5ad8,	0xaeb85eef,
-0x10100fbb,	0xc99eba28,	0x55f32c4d,	0x676315eb,
-0xe78da6bd,	0x341f250b,	0x0139763f,	0xf9bcdd95,
-0xee95a716,	0x477450bf,	0x0655a8ec,	0x82ba0c7b,
-0x1f8140ba,	0x1ce6ade2,	0xb395d6bd,	0xe420cc72,
-0x00c9379f,	0xd499a95a,	0x04212c33,	0xe02ccdcf,
-0x01ec3905,	0x23d2c3e9,	0x105c1fc3,	0xedf2f621,
-0x0d2e782a,	0x24f4ed1b,	0x8c8e6bfa,	0x43881813,
-0x67bd4cd1,	0x529b5f8c,	0x7dce8273,	0x792b3c08,
-0xd6d49290,	0x141eb20d,	0x90198577,	0x461a9ca2,
-0xe3ce9501,	0xc1888a85,	0x904ce501,	0x04ab4ef9,
-0xfe292a8f,	0x3aded4f3,	0xa9c4673a,	0x384ba9ca,
-0x092f1252,	0xc0464403,	0xcba863b5,	0x509464ba,
-0xe11d075b,	0x26f1c460,	0x167b95ce,	0x4cec6a27,
-0x1d4845f5,	0x4e8a1314,	0x857e5e97,	0xb7195631,
-0x0378dee2,	0xf461bbd3,	0xc8bfc18d,	0x4587627b,
-0x0cb224e9,	0x0332b337,	0x4d566685,	0xbb52863d,
-0x98f4e44f,	0xa504d2e9,	0x6d57f47e,	0x4a015409,
-0xf54d386f,	0x2da77a2b,	0xab04d06d,	0x7bf8ea19,
-0xb0ebc25c,	0x91119128,	0x56c54eea,	0x152f4e23,
-0xa25117ce,	0x99534ada,	0x8842eb0a,	0x3a5dd205,
-0xe97955a6,	0x80950258,	0xb925944d,	0x628b7f30,
-0xb07c3e37,	0xf5c86344,	0x4c36449e,	0xd940801d,
-0x7b3b0da0,	0x16ea7b8d,	0x4a0f4fa0,	0xbd480d07,
-0x82ec44f6,	0x51779667,	0x5bdbb1d3,	0x8deb45ca,
-0x38a66184,	0xfb470fc9,	0x25363fb1,	0xbc129a95,
-0x29d5068f,	0xf517f1bb,	0xf5769dc1,	0x75a0256e,
-0xa6b98e74,	0x2b76fcdd,	0x4de2eb6d,	0x24ed8d53,
-0x1a6cc18f,	0x1736d538,	0xf4b1cbfe,	0xf8922e6d,
-0x70db7017,	0xdb34cf04,	0x3120bfbf,	0xe087fc6a,
-0xae0a91e2,	0x9f2ea090,	0xbc05b13a,	0xc0ed6589,
-0x73ea7422,	0xbabc72c6,	0x4de4ca2f,	0xa9f8d16f,
-0xe4de37b8,	0x353eeb76,	0xdde6b6ed,	0x21d9e183,
-0x7c57e342,	0xf28b9bb1,	0xab7ca9c0,	0x4a085c72,
-0xffb07dd6,	0x63abd7f7,	0x1ae27c52,	0xf77ee0d7,
-0x708b3437,	0x7e2dff0e,	0xb6b319e6,	0x8c84e925,
-0x55087edc,	0x500f35ad,	0xc81640b0,	0x937d864e,
-0x9efa3d5b,	0xf5eebce7,	0xc740d979,	0x62ab9012,
-0x08e825b3,	0xeba1dda6,	0x0052dd87,	0x6d8d8ad4,
-0x4a047831,	0xfcd9bee3,	0x8510f73f,	0xf83c5f7e,
-0x5a09c0f7,	0x95b0eb08,	0x698d240f,	0xa0560b49,
-0xe19b647a,	0xec596c6b,	0xd13d7808,	0xe259263f,
-0x4a6d99ce,	0xbf035717,	0xc410e0c8,	0xebf36b19,
-0x99256c4a,	0x6c9463e3,	0xf4999032,	0x12216280,
-0x3b8d2e40,	0x1bc6337c,	0xdaa5f7e1,	0xa9acb5ab,
-0x6ccb91dd,	0x152fc803,	0x0bcbc7eb,	0xb94d2418,
-0xd65b6f1e,	0x694756a0,	0x14cd941c,	0xa56429e3,
-0x945054a4,	0xd4922be6,	0xd571552e,	0x82b5c823,
-0x668fafe8,	0x2827fdd9,	0x9af3de76,	0x2a5d0078,
-0xf5ae0dd5,	0x223e7253,	0xa0ae4bb4,	0x812bb4ed,
-0x7d2b571b,	0xfa71b182,	0xb0a73540,	0x3ad09e40,
-0xc814ec6e,	0x71a63179,	0x645ac68b,	0x68d1f6ab,
-0x8dad1277,	0x3782a2a8,	0x173335f5,	0xb5aa47cf,
-0x6df9de08,	0xd1175256,	0xe4d4c2f3,	0xaad6edac,
-0xa0dcfa5a,	0x38e7df7b,	0x93e2fbe9,	0xefe7dc23,
-0xef1ec4b8,	0x9b9f7a91,	0x148474cc,	0x03b75bd2,
-0x5210cba7,	0x4a9b1025,	0xebded8fc,	0x7c570275,
-0x3b654b12,	0x484ed1cf,	0xf4765b45,	0x42b55bd4,
-0x33f6be6b,	0x62e0f627,	0x170ad64c,	0xa80f34da,
-0x695c665f,	0x58a7aa98,	0xd51bab9f,	0xc3b18153,
-0x3ce425c2,	0x81977e00,	0x3b692349,	0xcbb9621f,
-0xc7ed3dec,	0x69bb55fc,	0xf68cb3da,	0xa89f69f9,
-0xe9d78668,	0xac0d599c,	0x9338622e,	0xef6a80a7,
-0xcb803262,	0x98db8030,	0xbc0d6a0e,	0xd0406313,
-0x70d22c76,	0xe71a332e,	0xa55ccdc3,	0x8306d4c8,
-0x5a590069,	0x84fcd275,	0xd090c333,	0x61941b43,
-0x05dcb6fc,	0x83302e99,	0x8526a3ca,	0x28217e4a,
-0xeb77a9ef,	0x285993f7,	0x721d0d7c,	0x920ca6d1,
-0x4a707536,	0xd5aedad0,	0xa82d8e14,	0x235d429e,
-0x68deef3a,	0x48508124,	0x39117ab4,	0xcab7d6f7,
-0xe3799e96,	0x0341dc52,	0x9b10cb97,	0xb76cff12,
-0x78cf69ee,	0xdddafcb3,	0x4d10fe41,	0xaedc7c7c,
-0xd47ffff0,	0x4510f77c,	0x0e9cdf7a,	0x02b610fc,
-0xe09dfedb,	0xd0466756,	0x538b16a0,	0x6357852e,
-0xa9f3ee39,	0x35ecd996,	0x83201137,	0xbed0c164,
-0xaa841ca1,	0x6eed4982,	0x71a40aa0,	0x792ad4cd,
-0x6a5241dc,	0x7a8b08c6,	0x76137758,	0x23a6b315,
-0xb1ffcfb2,	0xbcc3ba63,	0x5e475847,	0xc63d0183,
-0x4c68c0fe,	0xaf49ea38,	0xc2fe856e,	0x3e02a4a3,
-0x0ac869ba,	0x6517bcf9,	0xcab8b42a,	0xc2907ef0,
-0x9c7e5e14,	0xadf81764,	0xba5ca17d,	0x69444ba2,
-0xc58be4e7,	0x71e65788,	0x4624459d,	0x2c1083b1,
-0x344f342a,	0x6214d8d5,	0x4975198d,	0x64d05bad,
-0x4d066ba3,	0xd0a7f7a6,	0xa82aaa73,	0x4cc915db,
-0xd055fe52,	0x573bddf9,	0xcc60f7bb,	0xf70e1103,
-0xe6882fa7,	0xb5c119d4,	0xa119c19c,	0xbf397be3,
-0xbd2b0b75,	0xccb4af64,	0xc163d236,	0x5adca84e,
-0xfb6d23be,	0x26295dad,	0xbebf1691,	0xe841d6bd,
-0x6db3a0cb,	0x19c7b4b8,	0xfffcde59,	0xcc02752c,
-0x79cb2e4d,	0x13338348,	0x63962c89,	0xf04be5b7,
-0xf3ba53e7,	0x27625d08,	0xee87a033,	0xc38963fb,
-0xadc4a550,	0x8d8e9228,	0x5ca43533,	0xfb98d0c9,
-0xb54e1da3,	0x046d6e89,	0x26374b41,	0x9bd309ff,
-0x523372ba,	0xbae66980,	0x81738c76,	0xd689d74a,
-0x6835e459,	0x2a4d0682,	0x802b39ab,	0x40b34883,
-0xd7882c2a,	0x9a729ae2,	0x44134396,	0xfe843761,
-0xab6bf131,	0xaeae5d37,	0xd35f89a6,	0x71a4b609,
-0xf986f482,	0xdb5b9ba9,	0xd7be6ec6,	0xf028615b,
-0xafd1a74a,	0x96b0d7b3,	0x084cd25d,	0x5decbff8,
-0xa5a6fae4,	0x14015fec,	0x8e6ac68c,	0xe31a9fb7,
-0x15763d3d,	0x0b7bf437,	0xdc4a6429,	0x0e69c348,
-0xa9abc9cd,	0x50cdd9a9,	0x9baad1ec,	0xc15d8bba,
-0x5b6ca2e5,	0x7b7a5a33,	0x2f7483a9,	0x438d73d0,
-0xd1c5750e,	0xbed3bd0f,	0x6a126b0e,	0x9a08f35d,
-0x33b959bc,	0x685d6f33,	0x22a491d9,	0xe5d61697,
-0x608b9173,	0x4dba9441,	0x779a2b4c,	0x47b4dc99,
-0x6727836e,	0x36c0437a,	0x9c955100,	0x6bb585ad,
-0xd1d98b0c,	0xce8c01ac,	0xcc789f87,	0xbb739e6c,
-0x0e19dca6,	0x1035b730,	0x9a99401f,	0xfd0dca2a,
-0x2cafbe0d,	0xf75b34f5,	0x59df7e6f,	0x7751b790,
-0x023f4862,	0x57a208fb,	0x285eb25a,	0x0d305f73,
-0xede0d167,	0x36253388,	0x44525632,	0xba8b6a38,
-0x156bdf97,	0x8329a15b,	0xc0ccef32,	0xab28f14c,
-0xcafec9f9,	0x91c6969e,	0xe19337d7,	0xe5e54a4b,
-0xb729493c,	0x82a7199f,	0x00dee1f3,	0xd9c03903,
-0x6b91da3a,	0xa919244d,	0x017e3e84,	0x024f6349,
-0x2e66aff1,	0xc6ed3dd6,	0x05b07031,	0xdcb04c68,
-0x149a556c,	0xf58d8298,	0x77903139,	0xda000d7f,
-0x18fa2031,	0x0e417612,	0xec7da038,	0x0897b582,
-0xf7e61ba4,	0x07f4aae3,	0x1555685b,	0x104d784a,
-0x8fbc12d3,	0x32efb775,	0x494fe549,	0x661abd36,
-0x7e16e6ea,	0x5418c7fb,	0x371b0cbb,	0x246092a0,
-0x8abffca0,	0x69ed2f13,	0x1aa3b7cc,	0xcf4d1751,
-0x2435be69,	0x0bee2da0,	0xe183d063,	0x7d463f17,
-0xf3755c0c,	0x06ac6641,	0xbfd4fa70,	0x9aaf7c0f,
-0xc86f634b,	0x3393f983,	0x1ce1198c,	0x4f9f9cf4,
-0x8a9594d7,	0x1edfb30a,	0x2c11b0a2,	0xb7c2201a,
-0xc56e8c92,	0x89d095d5,	0xdfeaf3a6,	0x18344032,
-0xb74bcb7e,	0x1027910c,	0x8ba6c9ef,	0xb50da74c,
-0x999f512a,	0x53a09d44,	0x40952cf7,	0x5e2180e7,
-0x5ccc0647,	0x70630e78,	0x6b2cfe53,	0xd92225f9,
-0xebd57c4f,	0xd78ee7e1,	0x6a0a90c1,	0x9f22bfac,
-0x0ea2ce8d,	0x98782231,	0x5a215dd8,	0xee5ec5b9,
-0x36276a55,	0xaa4019be,	0xe53d9d3b,	0x41e65923,
-0x8561ce9e,	0xcae75a6f,	0xda6e9633,	0x212b57df,
-0x06fe3c41,	0x9206827f,	0xe87b67da,	0x925e2946,

cpu/intel/model_6fx/microcode-m806fda4.h

diff --git a/cpu/intel/model_6fx/microcode-m806fda4.h b/cpu/intel/model_6fx/microcode-m806fda4.h
deleted file mode 100644
index 7077da4..0000000
--- a/cpu/intel/model_6fx/microcode-m806fda4.h
+++ /dev/null
@@ -1,291 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m806fda4.inc  */
-0x00000001,	0x000000a4,	0x10022010,	0x000006fd,
-0x9ace6097,	0x00000001,	0x00000080,	0x00000fd0,
-0x00001000,	0x00000000,	0x00000000,	0x00000000,
-0x7f914831,	0x7f280950,	0xcc39293b,	0xe0137d67,
-0x25a22f1a,	0xc7d8e840,	0xe609cbee,	0x26a84b50,
-0xc85354c6,	0xe397b7c6,	0x2242c9b9,	0xe0bc9aab,
-0xe5a1f3ca,	0x040ad2ae,	0xeb88afeb,	0xe47ce2bc,
-0x0529444f,	0xea4b23f9,	0xecce0288,	0x2a97ea69,
-0xe8db41ed,	0xcde8afe0,	0x287c2c4d,	0xe1fb67db,
-0xcfe5fe88,	0x21c8c817,	0xec9d32f9,	0xef42ab3e,
-0x2d362cd3,	0xcfcdb590,	0xeedc5247,	0x256173c2,
-0xcfa8fc16,	0xe7ccf864,	0x2771c55d,	0xe72a2a73,
-0xed1aaac2,	0x05d9700a,	0xe41338c9,	0xe8199a01,
-0x07091a2e,	0xef7d983c,	0xeb1ff270,	0x29f83510,
-0xe7e56beb,	0xc1c2e8ff,	0x2b17c7dc,	0xef8c0c30,
-0xcd709efb,	0x2c80ef6d,	0xe4a44893,	0xeee55636,
-0x238c0560,	0xccec88f1,	0xe323272d,	0x26365c26,
-0xc68e9a8e,	0xebf1571d,	0x2938c56e,	0xe9cf0fdd,
-0xe74cbdc1,	0x03bb4075,	0xe085209d,	0xe7820854,
-0x0db1b449,	0xeee44fa7,	0xe99e54de,	0x21257916,
-0xe44b936f,	0xc48e22fd,	0x27d76bae,	0xee7b649b,
-0xc19abfde,	0x2dd42a7c,	0xe69fd84e,	0xebf23110,
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-0xcc7cc6ae,	0xe30b9bf7,	0x2dd4bfee,	0xe7d41cee,
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-0xe06d9134,	0xc9e1f69f,	0x23be1ff0,	0xe7003514,
-0xc277744c,	0x296a86d8,	0xeb89e47b,	0xe0dbb817,
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-0x6e86f9a2,	0xf8fca776,	0x90a9c636,	0x45df3ae8,
-0xf33d98d5,	0xbd342aef,	0x4bcde82b,	0xf96b51ce,
-0xb9689be4,	0x4ac17555,	0xfa57e7c4,	0x96fbfc20,
-0x474a0aaa,	0xd0d6cb66,	0x9ecaefec,	0x422ca1c4,
-0xd38042f7,	0x9d4bc834,	0x4c982e66,	0xf0102312,
-0x9f1c3560,	0x68311f39,	0xf757001a,	0x96a962c9,
-0x6608d1bb,	0xffd3cfb7,	0x97a21537,	0x42198caa,
-0xc4aeaa5e,	0xb150220f,	0x6bf5e435,	0xce7c0f19,
-0xa22ebd19,	0x405b4bee,	0xf9842846,	0x89ede122,
-0x48e5e781,	0xf99193fb,	0x82950d12,	0x4fd33665,
-0x9ee664f4,	0x87930fe2,	0x21ded336,	0x943e59e0,
-0x255409e9,	0x1819eec8,	0x231d7525,	0x0681cb7e,
-0x58dc4eb0,	0x483d1096,	0x7e461818,	0x3d290697,
-0x33c2d2f5,	0x7dbe2a0f,	0x43cdbd36,	0x3d0d2196,
-0x2407748e,	0x130e0ceb,	0x624c6b26,	0x734bdd68,
-0x5a7984b7,	0xfd39fd9c,	0x3b0ad891,	0xcbac1264,
-0xe5acb841,	0x08df5569,	0xdf958fb9,	0xd86b8277,
-0x524c81ce,	0xb54056dd,	0x81567b9e,	0x374d4515,
-0xeec6fa40,	0x3301767c,	0x60b0f1b9,	0x514f700a,
-0x21f52aa1,	0x483f3449,	0x4e3ba650,	0x06d22e4c,
-0x1a90d4db,	0xe97e6d78,	0x524b9616,	0xbccb57e3,
-0xfa46b9de,	0xaa642c97,	0xa9f72127,	0x0b177a62,
-0xef46dd1a,	0xffc46c3a,	0x4d1096b6,	0xbdde556c,
-0xa2f47f3d,	0x5f45e4a8,	0xe32e4fe1,	0xb241ae2f,
-0x033dec3e,	0x20924d41,	0xe10a81ef,	0xc1f10763,
-0x75d661af,	0x3008c555,	0x9e3ac84b,	0xabeefd59,
-0x40007f3f,	0xaff388ba,	0xd8f8a9f5,	0x7af34b81,
-0xdaa7dfb2,	0x42552f54,	0x09ca5b35,	0x4ad0c847,
-0x37d8b94f,	0x9abd5c27,	0x36cb64ee,	0xa6968f51,
-0xe0634c21,	0x0d1868b9,	0xd83117d2,	0xd38a78d3,
-0x7ee43c80,	0x26f55fd1,	0xaa70d5c6,	0x8e53b620,
-0x54fa99ae,	0x565b0640,	0xfa4ef821,	0xa9123e22,
-0x2e3d0dea,	0x72f69599,	0xdd6ba118,	0xae16a900,
-0x0ff27140,	0xe78209c3,	0xd3d4100a,	0x3419f8b5,
-0x926bdf4c,	0xd20bbbc1,	0x4855839a,	0x938a2bb7,
-0xabdf85fa,	0x4dd349df,	0xeb6639fa,	0xa7d33e68,
-0x45b530ed,	0xea017f8a,	0xa4e1a2f2,	0x48b5fb02,
-0xec141665,	0x21ad191a,	0x4c25dc15,	0x9f53f39f,
-0x2099a272,	0x1e6eb1ee,	0x90297aab,	0x72d42e1b,
-0x1496fdce,	0x048039ba,	0x7ad82625,	0x815d87c5,
-0x0a811470,	0x38629c79,	0x87b5d17f,	0x473043c4,
-0x36006763,	0xb15511e0,	0x4c5f3c9b,	0x3bf666db,
-0x92eff23a,	0xd0a259fe,	0x13451600,	0x32358f70,
-0xd1415db9,	0xe67e42e0,	0x39320c2f,	0x213f5b8d,
-0xe375d554,	0x5d16b554,	0x2dc268a4,	0x81a3ba66,
-0x59a06dc4,	0xd891c126,	0x88b7a790,	0xc6d4b89e,
-0xbc5f3b6b,	0xd4d618ad,	0xa4bef51e,	0x8f1300ed,
-0xd0c96dae,	0xc4353314,	0x84a49853,	0xb7f7b6d6,
-0xcdc514ef,	0xc8016279,	0xba353c96,	0x83bac6b1,
-0xcb56413c,	0x47330102,	0x807d5321,	0x3d46c48b,
-0x49ce0cf8,	0x1da536f6,	0x31a263a0,	0xd912f713,
-0x133a44d0,	0x8a734292,	0xd78c1910,	0x5c7e7acf,
-0x7fef5b51,	0xd6b502bf,	0xa9ad020e,	0x72d0934d,
-0xb2db6114,	0x25678bab,	0x1df4f7e7,	0x325f42ae,
-0x6f5a5373,	0xd0ad7cdd,	0x783e918e,	0xae0911dc,
-0xa2a90916,	0x2c7ce025,	0xd5cf763e,	0xf7ac5a63,
-0x97e1ab8d,	0x20eec0fe,	0x48076419,	0x6dfc45ab,
-0xfed0b83b,	0x7feb8ae0,	0xbecff335,	0xcc1096ce,
-0x14eeb4dc,	0x44a3171e,	0xa931484d,	0xe375ac04,
-0xdb062d00,	0x6af0f4e0,	0x7c7d1519,	0x191cea88,
-0x13939ee3,	0x7df26a04,	0x6b97b7fb,	0x14c2726a,
-0xa7a5b43e,	0x3e0f5f83,	0xc99da4d5,	0xf617e90c,
-0x4e4d7d95,	0xb3921925,	0x8c673c13,	0x3f94c204,
-0xf9f83ece,	0x2d6a54da,	0x7bff3079,	0x53e2b8b5,
-0xbf764166,	0xe18cbb4b,	0xca616193,	0x2c011d88,
-0xd29b7326,	0x5084d426,	0x13c277fa,	0x436a1815,
-0x19b4b9d0,	0x56caca92,	0x08ee14a8,	0x5bf9285d,
-0x960b6cbb,	0x0f1337b5,	0x97a20b46,	0x969ae8cc,
-0x009aa11e,	0x9535b093,	0x9271fdf6,	0x0c67dba8,
-0x033d95ef,	0xa78d8a5b,	0x9a2e9e29,	0x347fa867,
-0xe91d758b,	0xa2a2c2e3,	0x793e0dbd,	0xd05c4ed8,
-0x3cd9477a,	0xd28a4cd9,	0x4aa58942,	0x93056cb8,
-0xbc2864fc,	0xe4acfc2a,	0xf7dd070a,	0x1aa90b56,
-0x0dbbefc4,	0xa15f0477,	0xfdc84914,	0x580511aa,
-0x8eabb367,	0xa4c8f643,	0x74f0eb55,	0xdfa86d6b,
-0xc1146003,	0x991ec567,	0xd71618ac,	0xc87934bd,
-0xe96101d1,	0x55d1976c,	0x471c8505,	0x7a36d839,
-0x5d62a9ee,	0xf3c54a8a,	0xa2be15d9,	0x244087c9,
-0x042c8037,	0x23224689,	0x281c5d73,	0x2139ecfc,
-0xffb8bc8a,	0x834fdd11,	0x9cd5a5bd,	0xa3368319,
-0x7e5bef0c,	0x4ae2dbda,	0x86d90089,	0x6675dfce,
-0x48876262,	0xcec72538,	0x11dc5c80,	0x86a730f9,
-0x313565c9,	0xe3e5be11,	0x106d7cce,	0x752b8be2,
-0x3d00a5bc,	0xe6f70e95,	0x44447ac8,	0x600df30c,
-0x8335ac3b,	0x8816ddee,	0x700982fe,	0xee495741,
-0x48c7e81c,	0xa3d55da2,	0xb0172982,	0x70ab2158,
-0xd4460621,	0x3a9e528b,	0x59b18a7b,	0xf4dabc4c,
-0xa8454763,	0x70877bb6,	0x66005c97,	0xaf292c06,
-0x7b843db1,	0xf343b59b,	0x25cdc7b5,	0xa41da617,
-0x9e9d895e,	0xc936f475,	0x7270925a,	0x30024230,
-0x8e72f53d,	0x2b6c1b6f,	0x1a69732c,	0x7ed5aff5,
-0xfc18a2a3,	0xaf377cc1,	0xbff09a78,	0x4b4e0814,
-0x95a0b2c1,	0x270398de,	0x201fca94,	0x2a032a4f,
-0x131542b4,	0x0d7306da,	0x2d1c3496,	0xcc3c6d8d,
-0xa814ddc9,	0xa3b3a991,	0x17ee60c2,	0x852c0b8d,
-0x11e5853a,	0x762002a7,	0x92c5311d,	0x0d4bf7e1,
-0xfffec870,	0xe3d35e5b,	0xff6ecfb9,	0xdedae6ff,
-0x0111a772,	0x9808e780,	0x29c336e8,	0xe9bc05df,
-0x5bedde11,	0x945565af,	0xaff808fe,	0x87e3423d,
-0x4de6f98f,	0x93b4adef,	0xbf704fa4,	0x09120e91,
-0xd54f3692,	0xdf8eab1e,	0xfabbf59c,	0xe74318be,
-0xaab87ffc,	0x29fa791c,	0xe3915552,	0xa652cb9b,
-0xa1252e74,	0xb35b723b,	0x542aa28b,	0x12fcc5b0,
-0x3941f962,	0x82bcc6cc,	0x47b11974,	0xb821611f,
-0x78b34250,	0xf1be5659,	0x561b9e61,	0x6f3bd501,
-0x584e6f5c,	0xd54ed547,	0xacebcd21,	0x7b5ff816,
-0xb64ad233,	0x9f2f330d,	0x69fb1ece,	0xac8710dd,
-0x58dc6c60,	0x9bee6139,	0xbb10ad0e,	0xbd8cd5dd,
-0xebc0ce9d,	0xa733274f,	0x884d9b55,	0x42b08b63,
-0xafa54a74,	0x1c7ccf64,	0x93a20191,	0xaaa3132e,
-0xc69831d1,	0x54634889,	0xfbfe3efc,	0xd3cf68d4,
-0x302e3117,	0xf5693131,	0xc3ce8c6c,	0x1f03cd89,
-0x6243334c,	0xf16bc80f,	0xdca5f130,	0xcb2cd956,
-0x4c1bb421,	0xe8de533c,	0x7f86703a,	0x29aa897e,
-0xdd54acad,	0x76b2f2ae,	0x7ef82b71,	0x2e30970b,
-0xba402597,	0x9a653ab4,	0xd68fcf53,	0x2d9f0d15,
-0x7f9efd1c,	0x2363d147,	0x5327289a,	0xe89229f3,
-0xd63a535c,	0x7efe9273,	0x64f2e3a3,	0x9bdf65a7,
-0x26b6edfb,	0x1b9c7bfe,	0x5d14b3de,	0x54d575fb,
-0x6d65db4c,	0x95648b7f,	0xa8a3b8f0,	0x7cc7ad46,
-0xe20e6dbb,	0x8488a45f,	0x8ebc2932,	0xd4767316,
-0x3e8c4b8a,	0xbab7402c,	0xfc1e217e,	0xe5c5bf82,
-0x6928fe2e,	0xc88528e9,	0x4b2e4e8f,	0xdd938b86,
-0x0c964f98,	0xfc88d480,	0x35fcaf9e,	0xdd7bbe9d,
-0x197d005a,	0x4d40b3b3,	0xcf203155,	0x0d2fa621,
-0x752d2c58,	0xb12bac12,	0x1e7e8c23,	0x94215d54,
-0x9854a71c,	0x4de63c64,	0x7a012529,	0x9c171f8d,
-0x9e71def7,	0x3bd17d50,	0x11f175d9,	0xec78abf3,
-0x7b529eee,	0xd3a69fc3,	0x5b718676,	0x58214d29,
-0xa8bd2c34,	0x41ea00ab,	0xa03f64d6,	0x4ee342b0,
-0x32b1e444,	0x1c1801a4,	0xc8424702,	0x334a7e35,
-0x50cf1543,	0x3b22b495,	0x88683776,	0x8e2e0154,
-0x6155c033,	0x4e2fa6ac,	0x42ace700,	0x8d64f97c,
-0xaf9ced17,	0xb2a5cb92,	0xa558582d,	0x88705de7,
-0x9e528d59,	0x84bd45e4,	0x5cb680c0,	0xcd48fa5c,

cpu/intel/model_6fx/microcode.bin

diff --git a/cpu/intel/model_6fx/microcode.bin b/cpu/intel/model_6fx/microcode.bin
new file mode 100644
index 0000000..60fb36f
--- /dev/null
+++ b/cpu/intel/model_6fx/microcode.bin
Binary files differ

cpu/intel/model_6fx/microcode.h

diff --git a/cpu/intel/model_6fx/microcode.h b/cpu/intel/model_6fx/microcode.h
deleted file mode 100644
index 92de097..0000000
--- a/cpu/intel/model_6fx/microcode.h
+++ /dev/null
@@ -1,19 +0,0 @@
-
-#include "microcode-m16f25d.h"
-#include "microcode-m206f25c.h"
-#include "microcode-m16f6d0.h"
-#include "microcode-m206f6d1.h"
-#include "microcode-m46f6d2.h"
-#include "microcode-m106f76a.h"
-#include "microcode-m406f76b.h"
-#include "microcode-m806fa95.h"
-#include "microcode-m016fbBA.h"
-#include "microcode-m046fbBC.h"
-#include "microcode-m086fbBB.h"
-#include "microcode-m106fbBA.h"
-#include "microcode-m206fbBA.h"
-#include "microcode-m406fbBC.h"
-#include "microcode-m806fbBA.h"
-#include "microcode-m16fda4.h"
-#include "microcode-m206fda4.h"
-#include "microcode-m806fda4.h"

cpu/intel/model_6xx/microcode-MU16600a.h

diff --git a/cpu/intel/model_6xx/microcode-MU16600a.h b/cpu/intel/model_6xx/microcode-MU16600a.h
deleted file mode 100644
index 8815951..0000000
--- a/cpu/intel/model_6xx/microcode-MU16600a.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU16600a.inc  */
-0x00000001,	0x0000000a,	0x05051999,	0x00000660,
-0x05b795f4,	0x00000001,	0x00000001,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x4cce67de,	0xa5bf8c3f,	0x32a4809d,	0x834da372,
-0xebefca4e,	0x2434e86d,	0xfd5a5db8,	0x8e6b398d,
-0x55992335,	0xa4332cb1,	0xb83d2dc0,	0x5cf2827b,
-0xc60d321e,	0xb810d991,	0x10bef54b,	0xa78c0441,
-0xe4e17eac,	0x286b11d1,	0xa671919a,	0xd250d9c4,
-0x379ee265,	0xc2839bcb,	0xf856f68a,	0x2e7a8104,
-0xda21efb6,	0xccdb7c08,	0x2c02f111,	0xfa6d54f5,
-0x94ba6c6e,	0x2f1e8d3b,	0xff31de8f,	0xf0eb4e4a,
-0x5ef28f35,	0x80e05fd5,	0xd7b633ca,	0x51eb2ac5,
-0x97ed41ac,	0xc05679e5,	0x79080c9e,	0xb9d1aa9a,
-0x92ae8b93,	0x5d309b94,	0x94462097,	0xab6cc687,
-0x14d3570a,	0xf71b9f19,	0xba5782df,	0x767bb600,
-0x8ce6d620,	0xbc378afb,	0x0421dd6a,	0xfd2ce01c,
-0xea774aae,	0x7f59277e,	0xcc25d565,	0xf43bc0e0,
-0x4bad25ad,	0xf5881f9c,	0xb08fcd01,	0x2ad9861d,
-0xe6adc0dd,	0xa7a986b7,	0x475fb8ef,	0xaa145653,
-0x8c255f6a,	0x7bdc94c9,	0xb4190639,	0x9c2375e7,
-0x4339888b,	0xe3c7bae1,	0x885d7df1,	0x5e66da0d,
-0xcccb82eb,	0xeecc36ea,	0x260cfc25,	0xfec3a6f3,
-0xf090487e,	0x369a58cb,	0xc73ebd0b,	0xe53b8eeb,
-0x5cc40a0e,	0x838f0ef8,	0x8465b6c5,	0x72892bfd,
-0x84fd5959,	0xa3546de5,	0x754bd7b0,	0xc033d6ca,
-0xfe244df9,	0x64d5f3bc,	0xd85fee9a,	0x904169d0,
-0x24143452,	0xe41530fe,	0xb5ad3d6a,	0x5f17b744,
-0x8a8bd14c,	0x97e3c34d,	0x7f859df5,	0xcf5f5ee3,
-0xbea2e386,	0x19eecd45,	0x89bad6bc,	0xbbae906a,
-0x78d839f7,	0xa7b9cb2b,	0xb46b1935,	0x75181e1b,
-0xea49e613,	0xe9584bc5,	0x33c0e65a,	0xfe24a9c8,
-0x98ffa853,	0x41c32d55,	0x8e17f7fc,	0xe65d6dfb,
-0x6e39614f,	0xf9ca105c,	0xc9ce257b,	0x0c75a137,
-0xabbc7e07,	0x8857f4d5,	0x1473c95d,	0xa8666dcb,
-0xf9ef2a6a,	0x77d6e876,	0xec079135,	0xbcf41ae9,
-0x05d3a1eb,	0x9e17f380,	0xc4d7fb7a,	0x17d0a44e,
-0x84878cf6,	0xfb7de61f,	0x488930a8,	0xd84d601a,
-0xb0f12609,	0x1292c5bb,	0x9e9af007,	0xb40da879,
-0x6d28dac9,	0x87b9dfde,	0xdf0a960c,	0x520e698e,
-0xb3dedc2d,	0xd05b3e4f,	0x1ed592cb,	0x9197efc4,
-0xf62b2b8f,	0x09c440f2,	0xea8c3f00,	0xe2755129,
-0x19c1a016,	0xbbf776c4,	0xad622a16,	0x0c474162,
-0x99b8c2b5,	0x86ca4635,	0x34c1942e,	0x9989309b,
-0x9976d3a0,	0x5217db64,	0x802afec6,	0xf606b06d,
-0x30d7019f,	0xf5648b65,	0xc710830d,	0x3b24b040,
-0xa552be27,	0xf7225873,	0x4502fca7,	0xb15183a5,
-0x9ccc29df,	0x96f66773,	0x18534ce5,	0xb15d8a7e,
-0xb8a2e9ae,	0x2491fcf9,	0xf58b364b,	0x7e96b5e2,
-0x108ef9ba,	0x370c5585,	0x2000847c,	0x4738ffe6,
-0x5c88c789,	0x73657dd9,	0x406f3d28,	0x0e33ea60,
-0x369376bc,	0x39b123a8,	0x6800959b,	0x2f3dea60,
-0x7aed7374,	0x0bfdb4e1,	0x00de8ee7,	0x036c11c1,
-0x77e82217,	0xc295c17c,	0x1a255852,	0xdaabd2c7,
-0xb54a14ed,	0x34338868,	0x82c38010,	0xe221b872,
-0x519bc47a,	0x3dd7df3b,	0x82d0f932,	0xd766c9c9,
-0x566ba389,	0xa994de3d,	0xe15e1bdb,	0xc3bdb882,
-0xa542a8de,	0xf7e32a2c,	0x93be1c7e,	0xf04633d2,
-0x809ded28,	0x35361629,	0x57e56e43,	0xa47e8434,
-0x965d1c9b,	0x7c6aed87,	0x7069f4e3,	0x9734a6e2,
-0xca52becf,	0x033b7c7c,	0xf33a503d,	0x641ab77b,
-0x23bf89fc,	0x21e85f51,	0xfbdf410d,	0x5e52b172,
-0xfa6b2b47,	0xbcb4e5a8,	0x00f51032,	0x3dc21da8,
-0x55021389,	0xb5c017ea,	0x46b898ec,	0x52cdb1bf,
-0x99f5f480,	0xf303a3de,	0x84e3c67f,	0x1b46dd60,
-0x141448a3,	0xb8b977ad,	0xe7996448,	0x1fa609a1,
-0xa9a00a94,	0x1fc40ca5,	0x5685ee87,	0x061c73dd,
-0xee71c124,	0xe4599538,	0xa8700f90,	0xf5a9849a,
-0x3effe339,	0x790e00f5,	0x6e3843e0,	0xd9301376,
-0x3b54bbd8,	0x79c68090,	0x1dd1fe0f,	0x02602b35,
-0xa20dce30,	0x7ec589db,	0x9d504ad2,	0x2cc84db5,
-0x8b6bb987,	0x4fa45bc3,	0x2dd5f507,	0xe0cd37f7,
-0x043e9d49,	0x7652025b,	0xb6a429a4,	0x36ac261f,
-0x08f1fcf9,	0x3219dad1,	0x70119bc3,	0xf977976c,
-0xe0872445,	0xca99977c,	0xee8b289e,	0x2a20923f,
-0xd79e0af2,	0x42cdc3c9,	0x8d9bfb8c,	0xe265681a,
-0x5b61b8ef,	0x6c01c84b,	0x3adc3209,	0x97e9f99c,
-0x74a22a40,	0x58e46eae,	0xa107ffa8,	0xbf1d7a89,
-0xa2bfb311,	0x3071e5cb,	0xb2eb522b,	0xce4fb5be,
-0x16b6e3a8,	0x6106458a,	0x966df562,	0xa0a3d140,
-0x4e19ec71,	0x334e9307,	0xef8f374a,	0x3918922e,
-0x0e1281f3,	0xbd554469,	0x8b640c00,	0xe57f20cb,
-0xbe6440d6,	0x357e4505,	0x6b1db1b7,	0xc1874c75,
-0x246891e7,	0xa57d794b,	0x2effd4c9,	0x99b64fae,
-0x7e140e0a,	0xfd65c2ce,	0xe16b33b1,	0x2e681417,
-0xfcf1624c,	0x869f843f,	0x21d8c306,	0xd6cff670,
-0xa123b3d3,	0xb6eba56c,	0xafcf5185,	0x83fa0a9e,
-0x746483ea,	0x63641749,	0x55ffac01,	0x23cfdf9d,
-0x250613fb,	0x5377d7e5,	0x35224177,	0x6407c393,
-0x00f2498f,	0x33f07673,	0x6f1046fe,	0xd53b87bc,
-0x50b01249,	0xe9ed1741,	0x31b85bd1,	0x6dd5c47d,
-0x125647fb,	0x45e9f7c3,	0x221ead49,	0x6d1d9d53,
-0x149a1485,	0x16b67287,	0x27649add,	0x9e2c04e2,
-0x71c3d5f9,	0x9c778341,	0x95bfda26,	0xfaf580ec,
-0x6ab88278,	0x5bb3cac1,	0xb9801ade,	0xaf4b6e4f,
-0xa1f18c51,	0x504012f7,	0xc20a2ae0,	0x7bcfc50d,
-0xb68245e8,	0x805052f4,	0x0ce09a23,	0x79005c46,
-0x3f15c5cb,	0xef6732ec,	0xd095debe,	0x3a2eae3e,
-0x24ee4a9f,	0xf16d102b,	0x27d9f8ef,	0x508a1c57,
-0x5ee61f2f,	0xdd958128,	0x7c759709,	0x2e18b30a,
-0x0c6ffe63,	0x2174596f,	0x5245b98b,	0x68b46e00,
-0xf097f744,	0xb3f02db2,	0x7241d709,	0x5d13fbf7,
-0x4cfdd101,	0xe84957c4,	0x7578803c,	0x31c402cf,
-0x1ce1eed7,	0xa1197a97,	0xb00f8403,	0x3a25e38d,
-0xb011b436,	0xe3538636,	0x7c459351,	0xb97bfe4c,
-0xa5f968a9,	0xc93d3bd9,	0xe5736542,	0x05d67655,
-0x489c9bd6,	0xd57731cd,	0xb3075b0d,	0x0b247601,
-0x47960987,	0xa5fe5782,	0xd387a40a,	0x2e29f2d3,
-0xd317fda2,	0x071ff98b,	0x2791e1b9,	0x8f83f16e,
-0x16ec3837,	0x66844598,	0xacde4baa,	0xaea64994,
-0x15765169,	0xa62c4e7e,	0x093a539d,	0x6cdfea23,
-0xe2b19d80,	0x4f729028,	0x758dc967,	0x70519d1f,
-0x3f3290e8,	0x2605f3ab,	0x08d67f03,	0xe6fd4ba4,
-0x931da42d,	0x1af05337,	0x632c6c86,	0xa9b3c1fa,
-0x493db7f1,	0x9f917e1d,	0xb8bd542f,	0xbf23f37c,
-0x89e7f900,	0x58a3bccd,	0x3cd1e651,	0x3ed0beae,
-0x56104447,	0x3137d4d9,	0xecc5656a,	0x94183130,
-0x02420ac9,	0xcdb38cf2,	0xbb11ca10,	0x212e4bc5,
-0x11a0b5b3,	0x5edbb0e9,	0x1a4666ff,	0x42224649,
-0x70e68a4a,	0xd4c595ac,	0xe8040d0c,	0xafd353c3,
-0x11640dfb,	0x71e61d50,	0xb80faf34,	0x4303e651,
-0xe405ea4e,	0xbe003b08,	0x7f3d868d,	0x17467335,
-0x345050eb,	0xd939f71e,	0x9e7db651,	0x0e08b6cd,
-0x6359df9f,	0x2f07f30b,	0x4dd66fd8,	0xb18b789d,
-0x02da044b,	0x893e6d58,	0x6764969e,	0x77f1cf45,
-0x5019e0fd,	0x8303c5bb,	0x9261e436,	0x662be487,
-0x0efcafdf,	0x5bda8102,	0xce198c62,	0x13083943,
-0xc4f9a736,	0x2a9acd22,	0x5cf660f4,	0x0a2c6979,
-0x54265d72,	0x7072852a,	0x0f7475e7,	0x8f12704c,

cpu/intel/model_6xx/microcode-MU166503.h

diff --git a/cpu/intel/model_6xx/microcode-MU166503.h b/cpu/intel/model_6xx/microcode-MU166503.h
deleted file mode 100644
index fc5365f..0000000
--- a/cpu/intel/model_6xx/microcode-MU166503.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU166503.inc  */
-0x00000001,	0x00000003,	0x05051999,	0x00000665,
-0x2b9733f1,	0x00000001,	0x00000010,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x358c92da,	0xa753eb19,	0x24588215,	0xa462f72c,
-0x9ae43792,	0x393cc0d3,	0xe8f43249,	0x1bec1833,
-0xd0b7e8ea,	0x135d58f1,	0x8a2e1ff9,	0xde9451b5,
-0x82d2a3f6,	0x05a7c378,	0x75179336,	0xd7007b9b,
-0x1683d5bb,	0xd4a252e7,	0x2f40aa9f,	0x3e83129c,
-0x2c00fa9a,	0x51d02e05,	0xa1646c98,	0x87f8ac05,
-0xce1aaa32,	0x4a82d045,	0x86880792,	0xe4974edd,
-0x8061e878,	0xa1881b5f,	0x04e837b6,	0x2769c989,
-0xe74ecda4,	0x33654340,	0x61baeeb7,	0x35c98030,
-0xc8df4eec,	0x5c5bb984,	0x6e98f123,	0xf6d7dcea,
-0x10dc19f9,	0x3b01a4e3,	0xafff281e,	0x6e161f3b,
-0x17948731,	0xc65afafb,	0xabe182f2,	0x69955a64,
-0x3a12b07a,	0xe495100d,	0x554994c5,	0xbd57e186,
-0xebe0ac49,	0xe389fa05,	0xb009da9b,	0x0ff85b98,
-0x809e9a10,	0x16254c1f,	0x304faeb4,	0x5d57d991,
-0x11d772e5,	0xbef29e38,	0xd7a975e3,	0x9d097f71,
-0x6106bb0b,	0xba8cf6b9,	0x5ace7130,	0x5031e613,
-0x51a1a606,	0x9c0a1169,	0x872dcb66,	0x40f99c93,
-0x7ca932d1,	0x5a6d449d,	0xe140f2c9,	0x84860c6a,
-0x8af3229e,	0x4afaf036,	0x7e55d4f6,	0x46128b9d,
-0xf46348a0,	0x9d95bcdf,	0x31943826,	0xf88de2e6,
-0x9e44d646,	0xb3ee3161,	0xf92a68c8,	0x60f9bace,
-0x7ca722a3,	0x9990bb83,	0xafb51d20,	0x07bfb960,
-0x1df64349,	0xdcc1f002,	0x739aa18b,	0x38ea1e28,
-0xa2dae978,	0x574c14bc,	0xc1f81ca6,	0x203c604c,
-0x282967d8,	0x385855a9,	0xa1b12ee3,	0xa2109df8,
-0x86e9a39f,	0x1790c5a9,	0x64804f3a,	0x7d2752d9,
-0xa94f4f26,	0xa26c6a31,	0x5198ff0b,	0x5e94ce74,
-0xf1077560,	0x54e98c79,	0xde5d0d82,	0xf4bfad49,
-0xe7320b71,	0x856bc9a0,	0x82d0be13,	0x5ee2ba88,
-0xef5d3f1a,	0x8069358d,	0x084c6414,	0x10ec7c70,
-0x91d623a6,	0x74a78915,	0x8eb0321a,	0x3d80ac81,
-0xe512e8fa,	0x8fb07c28,	0xb328603c,	0x0ef99b7e,
-0x47ea27ec,	0x6be33ed1,	0x3f4da715,	0xabbbd675,
-0x69a18bfe,	0xb128d04d,	0x043e4ba0,	0x6915ac2d,
-0x042b7f54,	0x976ce0bc,	0x6d0c1f2a,	0x56bfb408,
-0xbfe963c2,	0x7df8d0c0,	0xb2a7ed5b,	0x897a09b9,
-0x6bd60b68,	0xcd6d9697,	0x48646873,	0xf973598e,
-0x4ab445df,	0x87f8f3c6,	0x8c7ac00c,	0x0bdde45b,
-0x7be6ecd2,	0xd0c6e842,	0xdd711cea,	0xeb22b612,
-0xe6ab1500,	0xaad6042b,	0x2e5cae33,	0x47ec8dbb,
-0xcbd123b9,	0xad6bad77,	0x0d8f347e,	0xa71a183d,
-0x66fe5476,	0xebe8a076,	0xdf99392a,	0xe8f9d3cb,
-0x14c99a25,	0xf6f36332,	0x2e4d9e17,	0x9f160e14,
-0xe113d044,	0xec57bb4f,	0x3768415a,	0x8e76bb31,
-0x1e3002c7,	0x3f34fde4,	0x63227f0c,	0x43bbe307,
-0x04076f7d,	0x0508bc78,	0x1f85f189,	0xa1cc81cf,
-0x86542205,	0xebaedc53,	0xe2c3c19b,	0x909eff45,
-0xa069f9da,	0xbc6b88b0,	0xc525d56a,	0xa17fa1ec,
-0x72ceb073,	0x79763bba,	0xd6c220b9,	0x850cd04d,
-0x036fb53f,	0xb56d501d,	0x79ce6c72,	0x6f257e0a,
-0xdf5b0c82,	0x4cfbe232,	0xfb6dc8e1,	0x70fda82a,
-0xca25fe30,	0xbec9ae31,	0x519816a5,	0x41edeeeb,
-0xd5cea131,	0xb6906cb9,	0xb8972484,	0x867b1154,
-0x666a8484,	0x3f32c15b,	0xf41e4c2b,	0x96204780,
-0x3e5bbc2f,	0x3b7ca3be,	0x06174d9d,	0xee03e984,
-0xec331aec,	0xdb3c13ce,	0x3a8ab1a3,	0x9e4b50b1,
-0xe15b5adc,	0x17470f1b,	0x208a3d17,	0xbb455669,
-0x7aad5d15,	0x78a9e932,	0x74bb450e,	0xdc2ce482,
-0x471e52d9,	0xd8b193ae,	0xb9036a57,	0x77e42d3a,
-0x27ec2977,	0x06169fe7,	0x2d2bdb69,	0x869a5b44,
-0x9f799f33,	0x3a64040f,	0xc3cfd2c0,	0x98a3a439,
-0xb3b8101c,	0x38d8bd22,	0xd12bdc7c,	0x466e5b9f,
-0x9fee2968,	0x95ce4e32,	0xdc57c7de,	0xf2fb9d1e,
-0x27bded67,	0xc1ad6483,	0x223deb45,	0x86e63082,
-0x4a203789,	0x7403fb65,	0x78a3e835,	0x8b61edb2,
-0x5463c05d,	0x766c0055,	0x9125ef4a,	0xa539a0b7,
-0x5534a196,	0xcf9f76e8,	0x9c37844d,	0x6fce6dbc,
-0xef915a04,	0x4e6a1cdf,	0x4c29c215,	0xb81bb506,
-0x8dd4519a,	0x74b38e0b,	0x381e1eab,	0x17b67703,
-0xf4abdd68,	0xc27be868,	0x9f0faf2f,	0xefc53838,
-0x3622c3a0,	0x60d7f011,	0x8ad7ebdc,	0xc40d6551,
-0x04983f91,	0x2cf8b33a,	0x531ff419,	0xf5e93714,
-0x65c885aa,	0x2320ae43,	0x806c5268,	0xdf4e166c,
-0xc5bdc782,	0x29b46f9d,	0x0f1c4065,	0x4dc28062,
-0x69e7b7c7,	0x3c26bbe8,	0x12646ad3,	0x5d6a6a1e,
-0x44048e46,	0xf60531d8,	0xb74e3592,	0xb40024ea,
-0x252a8bf9,	0x7dfc6e4a,	0xa7bf7fa9,	0x1bdac22f,
-0x50cdfee7,	0xd0c5b034,	0xcd79e72e,	0x7eddf775,
-0x6fb3c649,	0x6c3bfcaf,	0x750b8d6d,	0x41928264,
-0xe301566a,	0x5a49c2f5,	0xd0e55ac1,	0xfe0f0cc8,
-0x772e3cc0,	0x9bf80060,	0xdc49c2ac,	0x9f099089,
-0x770823d8,	0xf463e468,	0x9e5807d0,	0xdacb3baf,
-0x1eba5767,	0x13c5f4a9,	0xcd01ffec,	0x0e36d465,
-0x6ec3c83b,	0x226eb0d5,	0xd01557e5,	0x77c79cef,
-0x5efe9046,	0xabbfb6c8,	0x243a57b7,	0xd28db7bc,
-0x719bf699,	0xe93b667e,	0x1de82685,	0x51380b53,
-0xa623f364,	0x6d780611,	0x0c768e91,	0xf907a65a,
-0xcc7733f9,	0x2f2465b3,	0xbd12413a,	0x5cd5a39f,
-0x37d09ec8,	0xf40603c2,	0x5dbe9b04,	0xb8178e07,
-0xd1bb5765,	0x1bfeb0b7,	0xc059e78c,	0x69d6449c,
-0x8d28427a,	0xcbffb328,	0xfd972598,	0xcfb55e89,
-0x395009e3,	0x791e6bd2,	0x78064b04,	0x80ee0f16,
-0xb4cfa086,	0xd37b798a,	0x3f0808d7,	0xe95589aa,
-0x8098467a,	0x115a5d4f,	0xd1dc0f2a,	0x4453e5d1,
-0xb2f20cf0,	0x9a0f9e31,	0x4295d145,	0xf7ef8330,
-0x4a7bda37,	0x110a6d71,	0xb923c984,	0x4fbfed95,
-0xe12fedc2,	0xc0cfca64,	0x56483d6d,	0x97f840e6,
-0xbf5fe41e,	0x66022685,	0x76a0819c,	0x98640d2c,
-0x4eb43b01,	0x5a54896c,	0x55a1bdd7,	0x6f65ba91,
-0xed2b5538,	0x1f9834d1,	0x109a30fb,	0xccf76d5e,
-0x201ffeb9,	0x4ab1c88f,	0x09acf508,	0x8dae69fa,
-0x2744708f,	0xcea1e69e,	0xaad64322,	0xb5b1f8f2,
-0xef9bd4ee,	0xa7805716,	0x88ec378a,	0xcbc7caea,
-0x668e4b26,	0xe577ac32,	0xe69a15a2,	0x9447dcb0,
-0x2cce6bad,	0x17d2664b,	0x97660be8,	0x2c27db29,
-0xa9724c0a,	0x17ee97d7,	0x42ac77ff,	0x83f2075e,
-0x7cde02f9,	0x34420971,	0x06a2aaa7,	0x3ac69a7c,
-0x53d3ac43,	0xbb5bddd2,	0x7b542bbe,	0xd961a9ca,
-0x1a6decdb,	0xe6e1b5d4,	0x15a67e4d,	0x6d188aae,
-0x8f19f6d6,	0x26945471,	0xea55646c,	0x82d1b6b5,
-0x35a40d61,	0xcb49c2bc,	0xd0f5a364,	0x82122f86,
-0xaa2b88cb,	0x11eff3f5,	0xe6f54792,	0x67f462ec,
-0x542a5a8a,	0x8e8fe970,	0x729a6876,	0xe22b8ecc,
-0x7970112a,	0xf74356aa,	0x25fe6cb3,	0xca01a532,
-0xb1235c63,	0x4f47c539,	0xc217ce08,	0xff59b048,
-0xb6ca10fe,	0x71e838d6,	0x19b45d57,	0xa3adb657,
-0x9d37acf3,	0xfd89535e,	0x747406a5,	0xb5141dc2,
-0x61a05b4c,	0x9eaff8c4,	0x51da150b,	0x0932911b,
-0xde897842,	0xbaed7325,	0x8c35f6d0,	0xa84d6305,
-0x1eda951f,	0x7bf216b8,	0xdbb78152,	0x88427248,
-0x10c3fc59,	0x3a8465db,	0xb963b514,	0xa77f8dd3,
-0x98dbb57d,	0x4984b500,	0xa21601b6,	0x881258aa,
-0x0508093f,	0x20e84ec3,	0xb98409fa,	0x0a9eadf9,
-0xdf8b856c,	0xe8bd17dd,	0xcd37e7c0,	0xa95b8505,

cpu/intel/model_6xx/microcode-MU166a0b.h

diff --git a/cpu/intel/model_6xx/microcode-MU166a0b.h b/cpu/intel/model_6xx/microcode-MU166a0b.h
deleted file mode 100644
index a4be50d..0000000
--- a/cpu/intel/model_6xx/microcode-MU166a0b.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU166a0b.inc  */
-0x00000001,	0x0000000b,	0x05051999,	0x0000066a,
-0x5320efc2,	0x00000001,	0x00000020,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xf164feae,	0x70f1545b,	0xee75139a,	0xdb7fca71,
-0x48ba7994,	0x996e84b6,	0x6830ad5a,	0x38a129e1,
-0x323ac914,	0xc779a51d,	0x1d7c40fb,	0x36adafee,
-0xee2d4f67,	0x086d4fe2,	0x8f8d65d7,	0x801e7fcd,
-0xef612579,	0xf4806ed7,	0xe7617b53,	0x4c5ee9a4,
-0x967f5a46,	0x5a10ec0c,	0x12513274,	0xc71b9991,
-0xfc32bc01,	0x8f671aad,	0xb0e538eb,	0xb02838de,
-0xe999bcdf,	0x4ca0bdda,	0x4278da2c,	0x9f0a03d3,
-0xd29ae2e6,	0xb035934b,	0x3e0019da,	0xd1f07ee9,
-0x19852922,	0x38ba3efb,	0x29097d22,	0x208c367b,
-0x573ff3a4,	0x62eb70cd,	0x14ae776d,	0x300117d2,
-0x16cbcea4,	0x5e9c61ca,	0x09869e23,	0x28468eb9,
-0x66b5973a,	0xf7991cbb,	0xf9cac013,	0xbe478a7c,
-0x17a95a20,	0x9646dd8d,	0xdd0138d4,	0xf87e407f,
-0xa99cdaa6,	0x4987bfdf,	0x8e75e743,	0x9d6cfb25,
-0x2eec08a9,	0xc5e6dddf,	0x4a45c31c,	0xae85c0eb,
-0x0c875f17,	0xfcb911d0,	0x064197d2,	0x8bc57376,
-0xbcc472ec,	0xd12f07ec,	0xa868540e,	0x9a7c9efb,
-0x8d36c3df,	0x00865944,	0x7ec588af,	0x0efd17fe,
-0xbb5b2af3,	0xd7b06dc5,	0x38db16da,	0xaaff291f,
-0xcdd2f6ea,	0x9f70cd4b,	0x93ebefc3,	0x6e90b1f1,
-0x64b6b7b3,	0x89cd79e4,	0x4c62692e,	0x144e9e9f,
-0x98063595,	0x7f835929,	0xfa447038,	0xe981b269,
-0x4067c432,	0x2d2f5e5f,	0x5642fbf5,	0xe2b8f7bc,
-0x2c82dd3d,	0x8bb61d10,	0x0b0e0a20,	0xffeddd78,
-0xeff7b857,	0xe11a2323,	0x48b657d8,	0x56000020,
-0xe65844fe,	0x5231e1b9,	0x50a84875,	0x8cafb679,
-0x06cfce7c,	0xf37089a9,	0x4db86f6b,	0xa63d0376,
-0x72227dee,	0x30933db5,	0xda329301,	0x2dff90cc,
-0x43d5e2d6,	0x3e19da42,	0x220fdc3d,	0x85b47386,
-0x649e61bd,	0x5c1c72f5,	0x2fd4c456,	0x585388b4,
-0x4c12229d,	0x618fc4a8,	0x5db2f8d6,	0xd30ce359,
-0xbbb6a155,	0x807e7b29,	0x587dc9d8,	0xfda6fdc3,
-0x55bc6b34,	0xfc231424,	0x90b2ed33,	0xefdcbd79,
-0x5f82e9ff,	0x0646a8ad,	0x3cb3c86a,	0xfe19fc8a,
-0xe8c2485e,	0x0dc0f5d6,	0xb80b9c65,	0xedfb28b0,
-0x4c56c7c6,	0x2cc2fcc0,	0x223d0e54,	0x5352e027,
-0xfcc3527e,	0x2c6426ff,	0x46fb21cf,	0xb9a78245,
-0xab4b1ec5,	0xa40ac11c,	0x671db533,	0x31410024,
-0x66671b38,	0xe51ac22f,	0x39e40aa7,	0xc7e7311d,
-0x28b64fca,	0xf450fa23,	0xfa7ec04c,	0xaf43495f,
-0x0fdd7af3,	0xc9f94232,	0x9ee4f700,	0x6e669c5a,
-0xdb6d0c3c,	0xe2bee5ac,	0xab2a3699,	0x127347e3,
-0x2830b102,	0xa24bba08,	0x5e341110,	0x2f56ed4c,
-0xd0387126,	0x76b07220,	0x15829272,	0x46bebe97,
-0x64f7b851,	0x4ce007dd,	0x3a3022fd,	0xc2570ed3,
-0x9a5b66d3,	0x8abb4abe,	0x92165dae,	0x80c23f24,
-0xf8244059,	0xf240d2e2,	0x0853c211,	0x1bace652,
-0xd682f3dd,	0x8e14f139,	0x68800f29,	0x0ef3a910,
-0x2ac47b34,	0xdb4fbe5e,	0x9020e7c2,	0x036e4b1f,
-0x8d6d3b46,	0x934cd045,	0x29fc2721,	0x08f275fa,
-0x4a0320c8,	0xaf7261fa,	0x6ab8b9cb,	0x0ec88462,
-0xfbd1eefd,	0x468ab905,	0x9e1a18f6,	0x4012ffc4,
-0xe30a12bb,	0x6fca14c1,	0xb42b0ba8,	0xdbeb3652,
-0x1fbbc466,	0x0d504189,	0x7c644ce9,	0x77877afd,
-0xcea6f7c7,	0x7f5381dd,	0x905e0569,	0xd757cbac,
-0x0fd855e9,	0xbc8c2690,	0x1bdbb85b,	0x5b479eed,
-0x090e7c3b,	0x17484ec2,	0xc320e0d3,	0x969cbbe3,
-0x792f3c3a,	0x3c5fb90e,	0x1ed121be,	0x29c3abd6,
-0xd9075f20,	0xeb4806b8,	0x3cf8b650,	0x0cc4a95d,
-0x6b37d4db,	0xa4d965cf,	0x8f6ba7cf,	0xddb966de,
-0x62f431cb,	0x30048443,	0x12bc521b,	0x98682eaa,
-0xaa95dde0,	0x8eadfdf0,	0xde0f2b31,	0x56600129,
-0x86ce2e2e,	0xc0d5f0cc,	0xb0644830,	0xf8cf62dc,
-0x89a5e8e5,	0x6f9220f4,	0x138a2161,	0x8377c077,
-0xe57b4954,	0xf8119c9e,	0xdf31d61e,	0xd7b552b8,
-0x200a83f1,	0xd69be026,	0x1bdff0eb,	0xcf778290,
-0x2562ca46,	0x718e7a02,	0x45f0ab66,	0xb84bcd06,
-0xbaebcf08,	0x44622ecb,	0xf095b256,	0x2e542743,
-0x5265ca0d,	0x6aa19d3d,	0xc8df6999,	0x574be28f,
-0x3cedfc3b,	0x8af8622c,	0xf8b3b02a,	0x7d841052,
-0x3df0b3ac,	0x2222bc96,	0xe9cb2435,	0x0aea6617,
-0x7e37cf8d,	0x2df6b192,	0x68bfe6f1,	0xe3fda186,
-0xdee3c430,	0x3864b05a,	0x27f7e0c7,	0x22da6c6d,
-0xac701f04,	0xc271b644,	0xa2bd8531,	0x3234c0ac,
-0xb1a98a9f,	0x0f3ff2cd,	0x602c16d3,	0x4855cc53,
-0xaabc52ac,	0x4f01eb8b,	0x96356b71,	0x42225587,
-0x18266801,	0x2a082039,	0x2caa2fe7,	0xde119e92,
-0x71c1e48b,	0xabba2eae,	0x202cac3b,	0x5739c9df,
-0xb9c00f5c,	0x8d9576e5,	0x453c0787,	0x6043bdf5,
-0x6fa7e0a7,	0xe2333ef2,	0x6b2a0c15,	0x7e71897f,
-0xe35c05ba,	0x20405717,	0xdf236b3e,	0xc4a14743,
-0xe813650a,	0x8d823da6,	0x4f328186,	0xee43822a,
-0xe75f2227,	0x09dac319,	0x0d2c9a93,	0xda621940,
-0x542a21c1,	0x3a3c2e0d,	0xb1c9b51c,	0x669fa3af,
-0x7db40da4,	0x13badf34,	0x1f98c70a,	0xaa3a54b8,
-0xc293d8ca,	0xc677756e,	0xe5fb8158,	0x91005fce,
-0x23bcc33e,	0x08b671b1,	0x0430942f,	0xd65fdc74,
-0x3773de35,	0xc1c95b17,	0x0c4a72c9,	0x605a2a55,
-0x7c600ffa,	0x152462d7,	0xa6359789,	0xfa89d53a,
-0x0c749805,	0xcd4b8848,	0x72ba47f2,	0x7121f90b,
-0xb00412e2,	0x26dc3ceb,	0x4e73d8a1,	0x0bee25d1,
-0x50b5fe45,	0xfb8f884e,	0xf4d57158,	0x694fc3b7,
-0xcc8dbcfc,	0x4d32ac36,	0x032e50fd,	0xb941f702,
-0x28e41afb,	0x30ae4873,	0x5ba0918c,	0x58580421,
-0x25665153,	0x18fdff01,	0xe8276c28,	0xcabe3394,
-0x2f208a33,	0x823997fb,	0xbd9dfd10,	0x17323611,
-0xb36fe4ec,	0xfc93a594,	0x9ead87a5,	0x82140854,
-0xd311f9f0,	0x974da82f,	0xded93a6d,	0xa854574c,
-0x7513ded1,	0xabc9b23a,	0xa57f7303,	0xfa7b6404,
-0xb9dfaa3c,	0x087c8c57,	0x90d58229,	0x97b267a0,
-0xce357806,	0x7bf65936,	0xb8e5efc4,	0x88ad776d,
-0x1e2fed21,	0xbfdbb9ba,	0x12983ed1,	0x5ac1e8d3,
-0xe83d3b98,	0xc3ef70d3,	0x32a83173,	0x1adc355b,
-0x3028a6a2,	0x590487a0,	0x70aa8ce8,	0xb07d5eab,
-0x1210868f,	0x3c0bf159,	0x6a0a5d94,	0x98bfd28e,
-0x756dcccd,	0x8109af55,	0xe50dbaf8,	0x0156cef1,
-0x201207f1,	0x5e20750e,	0x13d20bb7,	0x438c45d9,
-0x2927e7a5,	0x5683cc1d,	0x374bc98b,	0xbf43416f,
-0xcc2b40c3,	0xc581b83c,	0xa245c55c,	0x15fac7fb,
-0x9bf99137,	0xc985db40,	0x1c67eb27,	0xc5bd3fe9,
-0x15c20413,	0x8f0a1928,	0xa52b860f,	0x243c53bf,
-0x940df584,	0xfba7bc08,	0x96ea0452,	0xb9b75629,
-0xa1bbf6e4,	0xb90c181e,	0x29cc3b57,	0xfc0b25ec,
-0xad06529c,	0x9fffafbd,	0x56d82b99,	0x69aa91f6,
-0x1a7e1041,	0x835fd763,	0x1aea44bb,	0x049e3d4f,
-0xb80b7881,	0x5b23d9a5,	0x19b6297f,	0x2d8a031b,
-0x8ff01930,	0xcf599b40,	0xa0c9f3c6,	0xdea7daa8,
-0x1bc2493f,	0x2328bf0a,	0x0a8bf88f,	0x46ca3b61,
-0xd7752cbb,	0x7fd049fe,	0x81360bfe,	0xc45e00c6,
-0x345038db,	0x9fa3c734,	0x21e04551,	0x4065ce89,
-0xebf537ea,	0xd917ebe4,	0x7f7442e8,	0xe979f46e,
-0xb35dcd5c,	0x89afbb69,	0x85b5ee4b,	0x4ecfd25f,
-0x4dd879c4,	0xe1092b39,	0xbc45c012,	0xdb2fbc66,
-0x000e1ecf,	0x0bdc46f3,	0xe9958406,	0xafff5eab,

cpu/intel/model_6xx/microcode-MU166a0c.h

diff --git a/cpu/intel/model_6xx/microcode-MU166a0c.h b/cpu/intel/model_6xx/microcode-MU166a0c.h
deleted file mode 100644
index 8cbc019..0000000
--- a/cpu/intel/model_6xx/microcode-MU166a0c.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU166a0c.inc  */
-0x00000001,	0x0000000c,	0x05051999,	0x0000066a,
-0x1d9d265a,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x7ee84cf6,	0xdef59a0b,	0x2c39a0ba,	0xa83caa36,
-0xc9b1f450,	0x388df7ac,	0xd69f91c3,	0xf7861ebf,
-0x0184e389,	0xf6a6a084,	0xf4f6e81d,	0x079188a1,
-0xf8d333e7,	0xd1f2d4b1,	0x5ba1ec8d,	0xecb245c8,
-0x846469bc,	0x6c891841,	0xc8afb827,	0xadcd33d1,
-0x4275c0fd,	0xffa3860b,	0x9c0cbbc3,	0x7fdc4c98,
-0xc538b727,	0xba0f7d64,	0x48f8d69d,	0xe5da2ada,
-0x88b8af10,	0x6af3e9c7,	0xe50d84f0,	0xb8058b2a,
-0x2fd44bdd,	0xd92a9b06,	0xfecd2cde,	0x2400081e,
-0x943b6d3f,	0xbc60f43c,	0x0faea953,	0xdbe48e6a,
-0xd5817cff,	0x00da0bae,	0xd96d0612,	0xd5431cbb,
-0x4547dcb2,	0xdc693998,	0x9ddb4562,	0x6b553f57,
-0xd399b87c,	0xb8d58069,	0x69e549ab,	0xd01cc4e0,
-0xf2fa23cd,	0x60944ee4,	0x9f86103a,	0xd7f0bdd6,
-0x6a737f51,	0xbebd48fd,	0xd2d170e5,	0x651a6175,
-0xf3bc9031,	0xd111c145,	0x2b571986,	0xd3595d17,
-0xdc7ac14c,	0x0e3227b2,	0xdb4c417e,	0xd514c15c,
-0x4f6dc212,	0xd639cda4,	0x9d4f9cd7,	0x69396105,
-0xdfb2ece3,	0xbad52f1d,	0x6c5bfd60,	0xd87ed851,
-0xfab9bdc2,	0x6d12697a,	0x9f0ee2c0,	0xda658c6a,
-0x635cbebb,	0xbdcbd5c9,	0xd1bc6b04,	0x6c415204,
-0xf0d34549,	0xddca0b2e,	0x2d43a106,	0xdcc99c8e,
-0xdfdab7bc,	0x0b4a54a9,	0xd93a19b4,	0xd526d677,
-0x41446f81,	0xd94b20c0,	0x9d895736,	0x62f70de9,
-0xd200abad,	0xbd42c587,	0x6fad3a66,	0xd304e4a3,
-0xf13ede57,	0x6a939756,	0x990b77ea,	0xd54494df,
-0x6dd8f816,	0xb9271c02,	0xd7238862,	0x6c0119a4,
-0xfeb583e0,	0xdef9450e,	0x23b2d340,	0xd4df2c30,
-0xd1075deb,	0x0a9ddb8c,	0xd6f4c463,	0xdb5e2fe2,
-0x45071dcb,	0xd814e4d9,	0x96a13be8,	0x666f23ee,
-0xde297b1b,	0xb8956c64,	0x6bf48b36,	0xdfa05659,
-0xfbdcec61,	0x6cb0be5b,	0x9e78bce3,	0xde94cb88,
-0x6315b350,	0xb98e69cb,	0xdb532347,	0x694227ee,
-0xf4f14336,	0xd1a59a01,	0x28c408bb,	0xd1f9a64a,
-0xd5c00563,	0x04930cd2,	0xd0f5ccec,	0xdd4320da,
-0x485b7656,	0xddd958a6,	0x9fe639c0,	0x6fe20678,
-0xdcdcfdbf,	0xb09b15d9,	0x6df8c827,	0xd6b0ccde,
-0xf9c3d0f6,	0x6496b15c,	0x9a91694a,	0xda644682,
-0x6c1293df,	0xb2df9b38,	0xddb61da1,	0x6968a238,
-0xfc6bbbb5,	0xdf19c18a,	0x2a56c306,	0xd67e52de,
-0xd2290d0a,	0x04a145ad,	0xd49153e1,	0xde5b167b,
-0x4848312d,	0xdddec3a8,	0x90a1f1b8,	0x6b8f4446,
-0xda37eea7,	0xbbcf471c,	0x993f1cc0,	0x3f91a8af,
-0xd61f988a,	0x47b6419b,	0x95657dde,	0xb2ffa26c,
-0x44930f12,	0xf34ed623,	0xbc7f7fc3,	0x118b4f74,
-0xf12d0c9e,	0xe81231e9,	0x1110db16,	0x1d41dffb,
-0xe06619ee,	0xf32a7d08,	0x357fa00d,	0xd2e3c5eb,
-0xdc38223b,	0x062d166c,	0xd182874c,	0x3b1d6a6a,
-0x0142363d,	0x347bf43f,	0x3e818e62,	0xe5fff804,
-0x305f3377,	0x2cdca236,	0xe1afc577,	0xeae0c285,
-0x269653e8,	0xc40756ba,	0xe0d8b540,	0xc44824ab,
-0xca5d4d9b,	0x0a51f0bf,	0xc8593df7,	0x3040056b,
-0x09282276,	0xc2ba9356,	0x383d94a3,	0xf61535ef,
-0xc65ab8bc,	0x3ee5709a,	0xcbfd2b50,	0xfe5787a1,
-0x09dd6022,	0xf7ec8ee2,	0xe2b1e3b8,	0x580ec41a,
-0xeaa5a2da,	0xbd800565,	0x7946c0b2,	0x76b9828b,
-0x9bb28f85,	0xe3932a08,	0x7960d4db,	0xf3001b13,
-0xec1e8232,	0x1f4d97dd,	0x2856139b,	0xc11609a4,
-0xc69b6b22,	0x02829529,	0x0224403c,	0xcb7ee7b0,
-0xe093e6a8,	0xa6841fee,	0x60c5b601,	0x2b99dd31,
-0xae77ce16,	0xf6b997f0,	0x3eae0d83,	0x1299fe49,
-0xef836ea8,	0xfc5fd4ea,	0x404801c9,	0x1588ce31,
-0xf3136926,	0x5b2db34f,	0x2fddf729,	0x3aedff67,
-0xc1198e78,	0xdd360cae,	0x81cc641e,	0xbd23f38e,
-0x9521c3a9,	0xe5dd3bbc,	0x7f89f543,	0xad637f67,
-0xb94d65df,	0x44ea2049,	0xd2a5314f,	0xf6b52ed0,
-0xc1582e64,	0x696fa343,	0x6fc79d19,	0xc10008ce,
-0x259496a3,	0xf4e1babc,	0xe1ab5f9c,	0x33ffd383,
-0x3decbc22,	0xae09ede6,	0xf42b65f2,	0x9a49d828,
-0x9ce3c48d,	0xd4055914,	0xbf360754,	0xe44b2727,
-0xca93c1aa,	0xd14f31b5,	0x11d02919,	0x8b485bfc,
-0x5fb21565,	0x4eb9ca57,	0x3d17e2bb,	0xd45be14a,
-0x808855c4,	0xa66c16ae,	0x3f46a1d2,	0x737db4d1,
-0xb7f5b0f2,	0xb6e5af8a,	0x4ea7ce1b,	0x8e79ab73,
-0x3279d139,	0x160056e1,	0xc4a5ed68,	0x1ff6352d,
-0x592640ff,	0xa3edfbbc,	0x68be47b8,	0xba69a126,
-0xcca14ed1,	0x7e343e52,	0x1b860b23,	0xab2fe19c,
-0xc0357151,	0x52b873f0,	0xe1adefe0,	0x7d73cfef,
-0xb4b82b50,	0x12b02b0b,	0x4efc5c49,	0xdd37f0a2,
-0x939b6fb3,	0x05ac2f31,	0x514e08d9,	0xda59b756,
-0x29ee8585,	0x3c960d13,	0x5b9c2425,	0x8b904acc,
-0x03506beb,	0x64ae1683,	0xf0f5f6e6,	0x1166c8e3,
-0xa4fdbe30,	0xfa8de670,	0x8f8007f8,	0xf93f0a9d,
-0x28c817bf,	0xdd2564ee,	0xfb77c058,	0x005ae81f,
-0x3819f821,	0x40be4b2f,	0xea398f14,	0x36cbfca1,
-0x66f826fb,	0x01f82781,	0x0d2e8d71,	0x827fea8d,
-0xeefb9818,	0x58cbe155,	0x7cdfa2bd,	0x823c1f5c,
-0xca57cf62,	0xeb8bbd3a,	0x83ee2876,	0xd09e17b6,
-0x2ed8c4e2,	0x41dde0e9,	0xca0c0e36,	0xa716235a,
-0x68dc48c2,	0x97c65728,	0xdf0b7db6,	0xe0f5a926,
-0x1662e74a,	0x109a93f3,	0x25d1fecd,	0x5e5feb1f,
-0xc1fb4ce1,	0x4a0c7854,	0x1f5e1b77,	0xc74f4a67,
-0xddd32a11,	0x4f23d67f,	0x15c683c9,	0xae9e0b36,
-0x1eae9783,	0xeb4575c0,	0x273ab1fe,	0x14f498f9,
-0x36e1fa03,	0x5d26968e,	0xb1000e70,	0x4bd84a27,
-0xf1656674,	0x69d7f679,	0x1a769399,	0x38a6a468,
-0xacc185e5,	0xcfc3542f,	0x0016f20d,	0xf791207a,
-0x3619f97d,	0x19aa7383,	0xbe6a3488,	0xdeab6e3c,
-0x042a3e83,	0xd1a1a166,	0x5d1be3e5,	0xe0d338b5,
-0xd2421262,	0x1420b7eb,	0xd9e9ab1a,	0x50cc69fe,
-0x9b5056a2,	0x82e9a23d,	0xd3ab7b3e,	0x0424ef61,
-0xf4d374ee,	0x982060b4,	0x954e2f92,	0xd64bfd36,
-0xc9e9430d,	0x593e8cbc,	0x80d7b169,	0x8b87d305,
-0x764466e8,	0x6a125ce8,	0xda699c3a,	0x13f3ff6b,
-0x412e3a89,	0x7fc628e8,	0xf33761a4,	0x2e84242b,
-0x388a3019,	0x33da6d91,	0xb493ed5a,	0x6c063a26,
-0x6bd1b5e1,	0x372850cf,	0x8ae1c93d,	0x9220555a,
-0x87199a47,	0xe4dfa5b2,	0xb0a1c13c,	0x5e4be8ed,
-0xce0befd8,	0x358a7073,	0xd96a0778,	0xa8e18b1b,
-0x76ec713c,	0x1208ea58,	0x3cebd827,	0xe8093948,
-0x6592653c,	0x069405db,	0x01ea9da1,	0x12ce1bf5,
-0x467402bf,	0x55ba728a,	0x0946945f,	0xe405cac2,
-0x099a54d1,	0x6b662117,	0x18f3eeff,	0x7d6c106e,
-0xbda99e98,	0xafda474e,	0x67067a30,	0x6a882ede,
-0xcadb3f5f,	0xbaabe426,	0x849fc0d7,	0x03c0a313,
-0x8e02168e,	0xe5cfc3ac,	0xa901afe4,	0x3152692b,
-0x538a67b0,	0x408a0315,	0x5c83ba73,	0x8e51c069,
-0xb2743e6c,	0xe27e14b0,	0x83917dbf,	0xebad6f2a,
-0x475c528d,	0x9ea643ec,	0xc9b3e51c,	0x332886f7,
-0xcf756bf6,	0x1650b95d,	0x6c89ce09,	0xaa5fa869,
-0xa38a46b8,	0x2c23feb3,	0x66ca2c19,	0x95c7c745,
-0x92fbf6f8,	0xd72602be,	0xfb41ad08,	0x3bae6e6b,
-0x1ec6cd00,	0x55ae9d6e,	0x9fd7dcb2,	0x473683dc,
-0x147cb939,	0xc06b93d8,	0x488bc90d,	0x8b5d8cbb,
-0x894a3028,	0xfd651c2c,	0x1276262f,	0x25fa7147,

cpu/intel/model_6xx/microcode-MU166a0d.h

diff --git a/cpu/intel/model_6xx/microcode-MU166a0d.h b/cpu/intel/model_6xx/microcode-MU166a0d.h
deleted file mode 100644
index 40bd01b..0000000
--- a/cpu/intel/model_6xx/microcode-MU166a0d.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU166a0d.inc  */
-0x00000001,	0x0000000d,	0x05051999,	0x0000066a,
-0xbb94bae6,	0x00000001,	0x00000008,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xf98cb58c,	0xf8e34c9b,	0x9a83585c,	0x17590b99,
-0xcfc53493,	0x836f4a96,	0x67f4ce01,	0xf4c650a5,
-0xbe7e43ed,	0x4fd5a804,	0xf214c3ca,	0xbdc6d158,
-0x4e6a28c6,	0xd9efd75b,	0xefcb715b,	0x5596eee6,
-0x8138ddf8,	0xd04c7f6f,	0x72f449c1,	0xa11e07b1,
-0xf0219ce4,	0x44120d45,	0x9d8bb862,	0xca6839ef,
-0x785b4174,	0xb1771be4,	0xf3b2f061,	0x5f013a5d,
-0x8975168d,	0xd3ceeee2,	0x5917e02f,	0xb577c84f,
-0x96f5525f,	0x64384565,	0xf9a4f42f,	0x99450ef7,
-0x255e1f35,	0xb96bade5,	0xbf46da06,	0x6ebe8d43,
-0xdfce4d6c,	0xb43849bc,	0x63fc13d0,	0xd12e4a9c,
-0xff549463,	0x6261160d,	0x9e6aec4c,	0xd78c76a0,
-0x60894bad,	0xb7d60ed4,	0xd851d683,	0x6f36e6a4,
-0xf2dfa83a,	0xda86c5a7,	0x20466088,	0xd9584bb9,
-0xddb2f004,	0x03ffa24b,	0xdc7d5080,	0xda1b66ca,
-0x44bd49b9,	0xd887e55d,	0x98230b4e,	0x643f54b1,
-0xd75b6f46,	0xbbb7afe7,	0x659761e5,	0xd841dd93,
-0xfa74ad9c,	0x63d43828,	0x9d12781f,	0xd88c6120,
-0x64311175,	0xbc633234,	0xd1a2de89,	0x6646226f,
-0xf9a69f9c,	0xd122c0b2,	0x21059d21,	0xd84d2aab,
-0xd1020ed2,	0x03550e7a,	0xdc8d15fe,	0xd1302d28,
-0x48d1cdbe,	0xda8a600e,	0x977918d2,	0x6a8923e6,
-0xd29281a5,	0xbe794a67,	0x6e08c98b,	0xdba8ba3d,
-0xfe5676d7,	0x6a5edef2,	0x9ecd0698,	0xdd1f5c8a,
-0x6804847e,	0xbc7a64d5,	0xd098bb85,	0x6c0184f2,
-0xfe734948,	0xd67dc462,	0x27156111,	0xdd05dabd,
-0xd860b2a2,	0x0a9269e4,	0xd76fce34,	0xd4dcfefd,
-0x4f8377b2,	0xddc2e081,	0x9f6f47d0,	0x6b90d56f,
-0xd175a856,	0xb2699bae,	0x63339eed,	0xd44f87f8,
-0xf967c3e2,	0x60ca74e0,	0x9f414eb4,	0xd81dd3fc,
-0x6a74ea09,	0xb116cbe0,	0xda00af62,	0x69b5f577,
-0xf281002f,	0xd3f01bdf,	0x23fdddfd,	0xd8502b48,
-0xdb19dfb8,	0x049ea37d,	0xd4feaca5,	0xd4d899db,
-0x49089ace,	0xd043ba71,	0x9ea0664f,	0x66e79d5c,
-0xdb834bdd,	0xb03f29b3,	0x65678c33,	0xd72c89d3,
-0xffa17c2b,	0x6e3563b9,	0x9f5a3fc8,	0xd6451f32,
-0x6d4808dd,	0xb4eab099,	0xda846cbb,	0x67e8563d,
-0xf081a73c,	0xd102f387,	0x2ae35611,	0xd6911a2e,
-0xd65ede54,	0x0ab85a57,	0xdea46bac,	0xdb39c874,
-0x4a61ffee,	0xd4405144,	0x9134e1ef,	0x638bb72d,
-0xdf219a3e,	0xb54a59e2,	0x6f24712a,	0xdc311585,
-0xfc33d659,	0x6bc88815,	0x970ba24f,	0xd46e58a2,
-0x685e4b19,	0xb71c790b,	0xbdd49fef,	0x9331b0bd,
-0x6aaf8043,	0xd27dda73,	0xb5bcfd6b,	0x6f021da1,
-0xd6797be5,	0xb049884c,	0x651d75d9,	0xd3b8e79b,
-0xbde67aa8,	0x6898134e,	0xd1ef428d,	0x43f0276e,
-0x6b1ccad8,	0x2f5d0470,	0x6ea98b5b,	0x816f7a52,
-0x0a8117d2,	0x885b127f,	0x89ef8b1e,	0xeae19c5b,
-0x8d3424b1,	0x6a847189,	0xe8cfdd5e,	0x65edb529,
-0x6afbd40c,	0xfccb5463,	0x65fe313f,	0x99b34252,
-0xf58115ed,	0x6a7188cb,	0x95600f1f,	0xaeb80763,
-0x6d16d13f,	0xc44bb6b8,	0xa2aab691,	0xc9d57050,
-0xcc63b3f5,	0xfb61657b,	0xc97b26f6,	0x36a6e2b7,
-0xf846a502,	0xc29b6e00,	0x7e21dd94,	0xf65cf6d5,
-0x8e6e9290,	0x77fb8077,	0x10e3d5af,	0xd6e64ac6,
-0x906e156c,	0x4d3b0efa,	0x0839de96,	0xfda92900,
-0x92df7861,	0x66182851,	0xfdd34871,	0xe0263245,
-0x6f3e8b65,	0x838dcb4f,	0x8715c68a,	0x9927f441,
-0xe0db9e74,	0x7bcda352,	0x9399462b,	0xe41bbedf,
-0xe17beed2,	0x1910e614,	0x4b547390,	0x8f9d9f91,
-0xb525c77e,	0xc3bb9156,	0x322bfbff,	0x20488d87,
-0xec17a2bc,	0x5ef1b557,	0xd12b8fc4,	0x6016582c,
-0x0bda9d9b,	0xa819a4c1,	0x5bce9374,	0x5a3c4c40,
-0xe88f4d3e,	0x08f4376b,	0xa59c45cc,	0x33c46dab,
-0xdff3a2f4,	0xca974e43,	0x0d40e3a7,	0x8e963b66,
-0x745c501e,	0xa877d75c,	0xc7774bf9,	0x4c6bf397,
-0x47aeaa4c,	0xc35d51e5,	0x8a1a23dc,	0xb1db577d,
-0x76700f27,	0xf469d22e,	0x97157a8b,	0xe953ef78,
-0x52bbc871,	0x801185ad,	0x2771ed5f,	0xe617cf0a,
-0x7f44701a,	0x292ab6ee,	0x364e4bcd,	0xa741d8d8,
-0x6a53d427,	0xa3da51a2,	0xabddbb74,	0xdacb829a,
-0x28cc5ac5,	0x68a1e69f,	0xe8715c0a,	0xe07e193a,
-0xb12be636,	0xe75b2fd1,	0xaf716b67,	0x2cfe84b5,
-0x768038ec,	0x1a38144b,	0x725be985,	0x0cca8c2d,
-0x6377d96b,	0x78be2c3e,	0xfbc7bc7c,	0xc73599e0,
-0x3556765b,	0x4acfc4fb,	0x7a625486,	0x216fff33,
-0x36f1ca89,	0x5ba664f2,	0xebf1cffe,	0x417ab8a4,
-0x5bc200d9,	0x0cd0cfb7,	0xe8579f5a,	0xf133b1d4,
-0xbacd9856,	0xc93789f6,	0xcc87a934,	0x41508988,
-0x69bbc82b,	0xd81fdd84,	0x4591ee49,	0x8c5bd59d,
-0xb7c1639f,	0x901e5d50,	0x3ba0ad68,	0xd9bbe716,
-0xc8b73e1b,	0xea23e96e,	0x1cec0793,	0xa0ae0e12,
-0x90040f2a,	0x747c330a,	0x88ce23de,	0xeb455dd4,
-0x2badd673,	0xa5c3c07a,	0x5ab5d387,	0xd971f0bc,
-0x9f4bbfbf,	0x8ff5712d,	0x152cb5e1,	0x83f3ac4d,
-0xef1186f6,	0xf36381b0,	0xacc9dc6a,	0x3f6a8524,
-0x9acc5c26,	0xb1b40fbc,	0xb34beeb8,	0x3f4a4307,
-0x78dc4772,	0xa0ea1e1c,	0xe27bce86,	0x98dfc4d1,
-0xf13c0d26,	0xbe5e18c2,	0x0746bbad,	0xa64fc488,
-0x987f91ad,	0xc1bdd8c2,	0x4ca3f823,	0xc9981b4a,
-0x2ad2bd8a,	0x1016284b,	0xe6adec04,	0x8f8b855b,
-0xe6f5e16c,	0x0ec6c6ab,	0x1d96c986,	0x32d7e61b,
-0x49449a1a,	0xd683ec58,	0xb89db106,	0x7f020c08,
-0x26b2347b,	0x46644ee1,	0xc92754fb,	0x1367f4c5,
-0x27ca9199,	0x76cda4f5,	0xd5a81dfe,	0x063a9117,
-0xa3ab8a9f,	0x8c81aa67,	0x64afcec9,	0xe78a08d6,
-0xdb15d4d2,	0xeb99a428,	0xe7e3a832,	0x243a7f0d,
-0x935a659e,	0xca856449,	0x07060d35,	0xc90755d5,
-0x1162568f,	0x250ecdfa,	0x4ae8a6ea,	0xa585f274,
-0x74b04948,	0x0f54d98f,	0x287e0889,	0xcf260148,
-0x72604b94,	0x68d01875,	0x6bc9d36f,	0x842839d4,
-0x70263b5c,	0xef51b93e,	0x02ee5b0f,	0x6ea9a2b9,
-0xff49aaac,	0xb2060b9c,	0x2920c904,	0x47a055b7,
-0xb7b043aa,	0xe4678462,	0xf1abc10c,	0xd9d9c3ae,
-0x72d1aca1,	0x1154417f,	0x32fe84fb,	0x64fa78a0,
-0xe6c5ebf4,	0xadfc0e00,	0xd18f98ca,	0x607c5fb2,
-0xa1324c34,	0x0ce4e61d,	0x6afbe693,	0x9eb7871f,
-0x625bc005,	0xb0effb22,	0x60ee628e,	0xcfd76448,
-0xd81dc632,	0x005a3783,	0x44302f17,	0x64e097b4,
-0xb8e9cda2,	0x57ae42d1,	0x9f9e40a4,	0xd2af30ff,
-0x3eca1965,	0x7cda05b9,	0x233081cf,	0x34fc72eb,
-0x02642499,	0x721bae11,	0x2ef47751,	0x514e1759,
-0x35f0868f,	0xa90c32c6,	0xbe0f6405,	0xfa0d134a,
-0x404256ad,	0x959e57ea,	0xb1c5ecde,	0xd175dae0,
-0xb7c4107a,	0xa11832b0,	0x7c683cfe,	0x6c9e255b,
-0xbd77f7a6,	0x7d1a2d6a,	0x2c6aa994,	0xd66d311d,
-0xb7fbfbf2,	0xd69f8b84,	0xd74fd600,	0x72b087a4,
-0x6e7e1d4d,	0x68f86d92,	0x64b857ba,	0x40fe4197,
-0x83ce4fba,	0x70cc5546,	0xb957da5c,	0x7fcbcab1,
-0x5149df69,	0x7f1c2970,	0x4201c39b,	0xaf6825d4,
-0x21f0549f,	0xac41ba00,	0xde9b5750,	0xf4f7b104,
-0xcd4fd7c4,	0x2aeec406,	0x2d245b77,	0xdd756960,
-0xb2981564,	0x3b2875b9,	0x34b03c29,	0x80b7af2b,
-0x1388a227,	0x7d527262,	0x706daf9f,	0x046c89c1,
-0xcf7bded4,	0xa5245678,	0x3aa7da2f,	0x7f146ba8,

cpu/intel/model_6xx/microcode-MU166d05.h

diff --git a/cpu/intel/model_6xx/microcode-MU166d05.h b/cpu/intel/model_6xx/microcode-MU166d05.h
deleted file mode 100644
index d881e3c..0000000
--- a/cpu/intel/model_6xx/microcode-MU166d05.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU166d05.inc  */
-0x00000001,	0x00000005,	0x03121999,	0x0000066d,
-0x270b86cf,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x3eecc08a,	0xa62586a7,	0x408e7837,	0x0dc3d177,
-0xedde0b05,	0xa3109474,	0x647d05b0,	0x082dd37a,
-0x9508f533,	0x27791251,	0xc76466c7,	0x59d04ed1,
-0x0058218c,	0x9bbc0b3c,	0x578a3165,	0x38f67e1b,
-0x9016dfd8,	0xddd13c58,	0xfcf10eba,	0xcb62d04c,
-0xd2d35472,	0x4f401811,	0x983eee95,	0x67c7e2ca,
-0x09661754,	0xf083039e,	0xbc5c8e2b,	0xd033a5f7,
-0xdd29decc,	0xb08e45c3,	0x178f020c,	0x6aedb152,
-0xb0a543e6,	0x05eb6675,	0x085278cb,	0x8638047b,
-0x0ecbe074,	0x1ec99c22,	0x06b43447,	0x58ea9289,
-0xc306e6fe,	0x0a457488,	0x3bd17bf1,	0xa7a1c60d,
-0xd4d10167,	0xd5f97ee3,	0x7e5b7118,	0xeeb9e726,
-0x25fbb795,	0x8f265c96,	0x31dfab47,	0x8e16f37f,
-0x30feea5e,	0xf7ad09f4,	0x3f183cca,	0xa093c433,
-0x087dec7a,	0x4cba9e59,	0xfcc38136,	0x709092d5,
-0x182dffa0,	0x33edcab7,	0x6dfabfa4,	0x9ce2ef89,
-0xcac4dec7,	0xcb107150,	0x7735b4f2,	0x3cd277a9,
-0x7230d8e3,	0xb2d7ce42,	0x4a40b6fb,	0x0b0a8f86,
-0xb9cb10e8,	0x42fa5d95,	0xfc2754ba,	0x92c173b2,
-0xd8d2157c,	0xfee978a5,	0x68fa268c,	0x5036fb2a,
-0x464a1736,	0xa03ca83e,	0xdc9bab6f,	0x7ddb5f53,
-0x59e8f8a9,	0x4ca42caa,	0x7ba80904,	0x7ca57b6f,
-0x4ce8bc6e,	0x7b7c4916,	0xe2254a6c,	0x278d62b4,
-0x5b421da8,	0xe4376e72,	0xb7dd55da,	0xceb0629b,
-0x498b4e10,	0xa40c2942,	0x644dd7ee,	0x81168e6e,
-0xdb1b5481,	0xe4235208,	0xf8a65d72,	0x9be1e523,
-0xde3c6046,	0x0acbd5c1,	0xb463150d,	0xca5eec67,
-0xb8aee1f1,	0x5f90ee6f,	0x5c16d75c,	0x7c7db98d,
-0x5325f5b3,	0x4935ebe9,	0xb54b36ff,	0x2903946c,
-0x683eed6b,	0xef118016,	0xe0848cd4,	0xc0d1ab12,
-0x1fa732d1,	0x832958be,	0xc46f4b10,	0x69e330d7,
-0x682c04c7,	0x4d54e3c9,	0x9a3c4e4c,	0x704f2e3a,
-0x05fde6d4,	0x2bacfe0b,	0x01feeb9e,	0xa7acd834,
-0x53900d41,	0xb7c39057,	0xf2e749b7,	0xb22892b4,
-0x02bc3b6a,	0xa9bf07ab,	0x0f21554e,	0x94051643,
-0xdfd19589,	0x1d0aa78f,	0x90d6d4c6,	0x1f44d198,
-0x41d8fd4c,	0x989126ab,	0x4b4bb83e,	0x6b7efe1e,
-0xed1a4871,	0xe14f08ae,	0xe4c9c7a4,	0x60f865a9,
-0xb4d07706,	0xc1ac0423,	0xfe52bb9f,	0xa262816b,
-0xa8e6d91f,	0x99e12111,	0x17a958f6,	0x2fa56e8b,
-0x26a3e40b,	0xb99a86b4,	0x1975e2a7,	0x12c7d158,
-0xf04c89ce,	0x1e63c5a8,	0x45fc89ca,	0x08669d2a,
-0xefc329cd,	0xcdfa4217,	0x46fdd0d4,	0x832598a5,
-0xe66c4533,	0xa082c44a,	0xd3fa6222,	0x16ee47f3,
-0x8b90b067,	0xfa7fb243,	0x107a6c75,	0x20a9caeb,
-0x32c97825,	0xae4c758c,	0xfac2c32c,	0x7b2c99e2,
-0xc67a6b3d,	0x2da13198,	0x40bfb7a1,	0xa86e1b40,
-0xdb6fc09e,	0xe9294017,	0xd327adb9,	0x11110cac,
-0xbbd27303,	0xae5d51f5,	0x7669ab98,	0xdad9463f,
-0xc749fa60,	0x7b9d09e4,	0xb306ff5d,	0x858aa60f,
-0x3310d43f,	0x39519ef8,	0xfe9932b5,	0x417fa945,
-0x8dad55b5,	0xe3e8de26,	0x35007ade,	0x3492880a,
-0xab849e4f,	0xcd774b5c,	0x28544c48,	0x8b498f40,
-0xe884eb7b,	0x20241491,	0xc6a03ed4,	0xd328186f,
-0xc591ccd9,	0x92750413,	0xc9557d4e,	0x88ef0aaf,
-0xa53b30fe,	0x4f1325f8,	0xe6f7379f,	0xd7484b44,
-0x88d273b4,	0x916e3b39,	0x4b044249,	0xa7b28fbf,
-0xfd49d863,	0x79d3dec6,	0x7dd8135d,	0x948845d1,
-0x55db29d1,	0xaf6408a7,	0x600c14a6,	0x89d463a8,
-0xb2bd82af,	0x61e04014,	0x326681f3,	0x6053a6c9,
-0x250c7a7d,	0x0a642a61,	0x2a6689fd,	0x01c6c9d1,
-0x445fc371,	0xc8c5d01e,	0x813c4130,	0xf61f837e,
-0x2f243919,	0xce51a67c,	0xb14232a6,	0x1a79eb11,
-0x8e5b7f19,	0x94a777cd,	0xd0e61396,	0xc1bb9eec,
-0x509fe53f,	0x90bde780,	0xfdabe75a,	0x97af888d,
-0xc525cb70,	0x45ea7624,	0x2736a36d,	0xe3ef2095,
-0x16b685b9,	0xb8d00570,	0x3a3a5365,	0x2cf032c7,
-0x26b4c03e,	0x4271dc33,	0xab85bcfa,	0x3afe2205,
-0xc81b634d,	0xc32a2a5a,	0x63028408,	0x7b3fac4b,
-0x5a7df74b,	0x35a60cfb,	0x06aace89,	0xc2b02ebe,
-0xc50788c0,	0xa1f41242,	0xa5976893,	0x712469a0,
-0xd17a0c5a,	0x706e3d86,	0xc2f9685f,	0xf449c450,
-0xe72f42e0,	0x1cd28b33,	0xc1155247,	0xaaa41150,
-0x261c1d3b,	0x492ff4db,	0xac49bcc4,	0x2692d23e,
-0xe1c9a072,	0x30edf533,	0x660e7470,	0xd145fbde,
-0x7c5c49b0,	0x7bcf8c05,	0x2ff02005,	0xedcd3a12,
-0xa18bf23e,	0x70ebc247,	0x96986456,	0xfc0fb3d6,
-0xe1ad3385,	0x89b3ae09,	0xbcc18862,	0x7bc64f50,
-0xacac4b0c,	0x64f1f67b,	0x06489941,	0x0f8675c1,
-0xad097e7f,	0x19c4d7f0,	0x23180e2b,	0xffbb5788,
-0x82e1ffa4,	0xeaa3a7d8,	0x7a37ec77,	0x1db0b023,
-0xdee55066,	0x5863d8c3,	0xf4c56ba0,	0x067a0a3b,
-0xfd5f26ce,	0x952b7e63,	0x28fa1941,	0xc6118388,
-0x8135d105,	0x577c5188,	0xe5217d10,	0xda4410f0,
-0xaede1954,	0x0d2c3425,	0x1aa63ce7,	0x95b44276,
-0x0770aa23,	0x6e703548,	0x2904c0be,	0xe2df8736,
-0x4393f1f9,	0x70ce1525,	0x88d256b0,	0x671bf175,
-0xae8b8785,	0x9a26490c,	0xd6bfd6f6,	0x05947a91,
-0xe1340d8a,	0xb3b37f6f,	0x3e93c7e7,	0xc24dc70c,
-0xdcff96f4,	0xdd05a3dc,	0x462c01ff,	0x05286a87,
-0x86f78acd,	0xff056306,	0xf87fd3d2,	0x3cd4abc2,
-0x82c0083a,	0x9ef42ebe,	0x709da61f,	0xe1ddc8a4,
-0x6d91ca8b,	0x116ac1f5,	0xc4ae1fb8,	0xd9adba26,
-0x79418d23,	0x0d5824bd,	0x50edc99f,	0x3980786d,
-0x673bef89,	0x9f063042,	0x62b432e5,	0x6967beb9,
-0xe37fd96a,	0x7b1592dd,	0x437094c6,	0xa7524f6a,
-0x3fa85e93,	0xb17f53f9,	0xa3a7f69a,	0xea03b804,
-0x8dea22e6,	0xc095d826,	0x65fbd1dd,	0x241a9527,
-0x1c103e6f,	0x07fe651d,	0xca1f3625,	0xe7095692,
-0x4e7ca154,	0x9bbc25a4,	0xf7e36d2e,	0x661e8328,
-0xdb27f7e2,	0x7725adb7,	0xea2f1ecd,	0xd97d7ce8,
-0x64a80e81,	0x0fedfe61,	0xba01f4fe,	0x4125c4f5,
-0x7525b5b9,	0x491e09d1,	0x4971bfd7,	0x87e7bf91,
-0xd9642634,	0xc613b75c,	0x4eac1995,	0x0676f816,
-0x5bbde4bd,	0x9d896773,	0xbef78a8e,	0x664de511,
-0xdf272637,	0x6c91f7a5,	0x99b42d3e,	0xe4d12c19,
-0xda29b3b0,	0xc99346a3,	0x135ad23b,	0xf63565f2,
-0x31e84e51,	0x17503841,	0x2074a43f,	0x4884627f,
-0x751d935f,	0xb7de396c,	0x60ac4c22,	0x26a3ecbd,
-0x771c6046,	0x9fb24436,	0x69c094e0,	0x3b500ed1,
-0x4acfb68f,	0x489263d3,	0x72878f8d,	0xb41fd5f8,
-0x9dba1fe0,	0x049eb891,	0x5df03769,	0xc47d9696,
-0x72f59209,	0xb151fbe0,	0x260095c7,	0x88adb02f,
-0x3e35d2ed,	0xca7b8454,	0xa6d56623,	0x48cfd15d,
-0x5ec65c94,	0xdd45c99e,	0xc9ab3a13,	0x1bd8bbe3,
-0xfa87c12a,	0x5b32688a,	0x0fcc1d53,	0xea8f88a4,
-0x38f68efa,	0xcd13a712,	0x7da1b9bb,	0xd29f6ba2,
-0xde23b46a,	0x6622783e,	0xe5a7fb42,	0xe981f7fc,
-0x45bc6405,	0xf6e40044,	0x93763406,	0x5f8be3f3,
-0xbe01786f,	0x40389874,	0x56bbc03f,	0x02ec4ce9,
-0x42ce5877,	0xa658533e,	0xee412a3e,	0x22a47b5d,
-0x98965b02,	0x43d40037,	0xd2e1ce86,	0xd19426f0,
-0xc763ab1a,	0x5c97b009,	0x6297ffab,	0x896e3a68,
-0xf5d7abea,	0x30e0b88a,	0x6b6faa67,	0x2dc017a1,
-0xa42fdcb8,	0x304838ab,	0x16907995,	0x6ef05b9a,

cpu/intel/model_6xx/microcode-MU166d06.h

diff --git a/cpu/intel/model_6xx/microcode-MU166d06.h b/cpu/intel/model_6xx/microcode-MU166d06.h
deleted file mode 100644
index ec32d55..0000000
--- a/cpu/intel/model_6xx/microcode-MU166d06.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU166d06.inc  */
-0x00000001,	0x00000006,	0x03121999,	0x0000066d,
-0x5a11f8b1,	0x00000001,	0x00000008,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x5438e02a,	0xac0baef5,	0xf9af9ee5,	0x7daa9469,
-0xc72a2473,	0xed1bc9f3,	0x0a5b4dfd,	0xf04f2cfd,
-0xd6c32dc9,	0x23309edb,	0xf3afb18c,	0xdbc53f4c,
-0x29db6ed7,	0xdff96f41,	0x8ce7acb8,	0x3d2bfd5e,
-0x8beb4597,	0xb91f261e,	0x1faef98c,	0xa1c19c06,
-0x9d0ba2f2,	0x21f025c1,	0x946df216,	0xaf4cdaeb,
-0x18548806,	0xbfc15b01,	0x95fae116,	0x3dfbd428,
-0x8843cbe6,	0xb1dc2df7,	0x36a6d1ee,	0xb5334ca4,
-0xfda770fc,	0x0cbca559,	0xf48e7cc2,	0xf54eb67e,
-0x4024db53,	0xbf714641,	0xd4975b91,	0x0e0f66da,
-0xd0b27e7f,	0xd8563c7c,	0x0758ffcc,	0xd876e9c8,
-0x9a3f0365,	0x0a6b995d,	0x980275f6,	0xb181ab45,
-0x06cb2f41,	0xb001af81,	0xbd6bcee5,	0x09bc6806,
-0xf9e3f297,	0xb352816b,	0x462611ca,	0xdc6d5552,
-0xbdb5af42,	0x6689779f,	0xd1e348f7,	0xbe74550e,
-0x2d19da39,	0xdd1f8553,	0xf3baaa2d,	0x0907706c,
-0xdc8fb8a3,	0xdba419ed,	0x0086c036,	0xd5d3ae68,
-0x93c55fcd,	0x04a1ae8d,	0x9afe94eb,	0xb96489ac,
-0x09a60b6c,	0xb3d0c99b,	0xb4e1072f,	0x0afad454,
-0xfa453558,	0xb09ee184,	0x4a31efeb,	0xdfcd940d,
-0xb13cde6c,	0x64962b75,	0xd47bd3d1,	0xbd963b9e,
-0x2219d435,	0xd244d090,	0xf21378af,	0x0faf36f8,
-0xd2794a73,	0xd5318695,	0x0ec5272a,	0xd22a3506,
-0x91a9ad03,	0x0d59901c,	0x9e57c7e7,	0xb55e7c49,
-0x0925b26d,	0xb95d2a8c,	0xbdc13885,	0x035bf2db,
-0xfead6a85,	0xbcac5c7e,	0x4fe8bf18,	0xd847f308,
-0xb4eff243,	0x6e82abea,	0xd174e54a,	0xbac0865b,
-0x28e70f71,	0xde040c76,	0xfb529490,	0x084911ed,
-0xd2f91422,	0xdaa64854,	0x0c7eaf9e,	0xdefdbaac,
-0x9132b630,	0x0a9b6342,	0x9de92427,	0xbed14ecd,
-0x090fc874,	0xbc6a926e,	0xb19d1dd0,	0x0c7c92b5,
-0xfd9a9fb9,	0xb688faf8,	0x4c848221,	0xd2c427bf,
-0xbf128678,	0x6c185794,	0xd07a1ee3,	0xb966f436,
-0x2f741a19,	0xd3de45c4,	0xf65148fe,	0x0f4e7e86,
-0xd2e39990,	0xdd7556b8,	0x04392416,	0xd47f4676,
-0x97107c76,	0x05e43678,	0x9b25ef6a,	0xb7aa1e88,
-0x0c6afeec,	0xb9255789,	0xb2b414cd,	0x0a22b967,
-0xf095af1a,	0xb854fa48,	0x42f3a9bd,	0xd0fa341c,
-0xbcf0ca66,	0x6aba8362,	0xdb58dba7,	0xba6ddb6d,
-0x23d32744,	0xd3eec90e,	0xf1c62281,	0x038fa057,
-0xd66aacd5,	0xd05d164a,	0x061ff1a1,	0xd928d8bc,
-0x96588418,	0x02c45cb6,	0x9dcb3ea1,	0xb3b9ce27,
-0x08b10dab,	0xb01dfe0e,	0xa2f4cb9e,	0x8eb386f9,
-0x0e6e8abb,	0xae9f10a1,	0xa8f3102c,	0x9b7550fc,
-0xa56f673c,	0x38f6bcb5,	0x93b14bb8,	0xe586077f,
-0x321cee2c,	0xd6aef87b,	0xe707d1d2,	0x32354de0,
-0xd0ebeabe,	0xe5c5458d,	0x1b203412,	0x8ef41355,
-0xc755edd0,	0x4546df73,	0x8c9145f4,	0x6065fcf2,
-0x491779ac,	0x26a4c7cb,	0x65ba6bc5,	0x191cef28,
-0x2f8d1fc5,	0xc259a55c,	0x19b8cd78,	0xd90b3d5b,
-0xc78d366a,	0x10ad9c8a,	0xd61a969e,	0x268b96a5,
-0x125232e3,	0x38224f2c,	0x2fa6b4fd,	0x1db52ece,
-0x3c86b9c7,	0x2048a10b,	0xe7ca7b91,	0x17f5aeb1,
-0xdd8dcc96,	0xc9c71faa,	0xefd34be3,	0xd4f4dac8,
-0x37b10389,	0xe015ce04,	0xd1db5065,	0x05418033,
-0xed8b22e1,	0xe242b352,	0x51f4d0c1,	0xac0cae18,
-0xbbb5d914,	0x1f755f53,	0x7b4c7d10,	0xefefa07a,
-0xcd461f2a,	0x2d464311,	0xe8ccc9e3,	0xf3a14b4b,
-0x2942e286,	0xd6490328,	0x46201fae,	0xa0792235,
-0xc5517483,	0x1022100d,	0x7e4a2c0c,	0x7acbd787,
-0xd0b803e2,	0xe57d5e6e,	0xf06d89f0,	0xe2cf8b74,
-0xf9738fb2,	0x724bd029,	0xfddbd156,	0x9e05f522,
-0x191feedf,	0x59b48812,	0x60f5d73f,	0x3b420bf7,
-0x0baac57d,	0x24f20b27,	0xa3f7efce,	0x78ee2b7e,
-0xa25e08ba,	0xee5f647c,	0x43f8b240,	0xa00b7761,
-0xf6da02ec,	0x6c69c94f,	0x33e43cfb,	0x3f3abf64,
-0x1e1ad77e,	0x5c99bcf1,	0xbf7ff97a,	0x45a5e379,
-0x3b6c8705,	0x4e8bb4e3,	0xce65e064,	0x7e1fb79f,
-0xf3797330,	0xcef73cbb,	0x87103d74,	0x6a066804,
-0x3f4462d3,	0xf2ab9a30,	0x51c5f393,	0x7c565cf2,
-0x9f2405da,	0x418ff11f,	0x3bae40bb,	0xb49f9ed0,
-0xadc9f958,	0x01a0e781,	0xb9c8020e,	0x9a11ba27,
-0x133e4b83,	0xe1f5c968,	0xcbe377ce,	0x966c23a2,
-0xd7e17fa4,	0x05c02d15,	0x7fb1895f,	0xb10a1c06,
-0x176e1233,	0x6f4216df,	0xd3b3893e,	0xa9de1442,
-0x13f47cbb,	0xcadd9d3c,	0xfa49790c,	0x74739159,
-0xa8d9b9f0,	0x9a0a0cc8,	0xfca5cd8c,	0x12ee9077,
-0x1de249a5,	0xbe558c3a,	0xbdd5b2a0,	0xd1056ae4,
-0x5a27b4c5,	0x6464406e,	0x5dbdcf47,	0xdf0f3a0d,
-0x77179167,	0x4ef7f05b,	0xfc1b89a0,	0x4cf5bb75,
-0xb37c06ba,	0x81e62916,	0xdb83caf0,	0x653bb4c5,
-0xc677d10e,	0x4d1de1e1,	0xe4634396,	0x67f9d7cd,
-0x927fc5d7,	0xb7a3a00e,	0x87fe2f14,	0xa5e6266e,
-0x3867d7a1,	0x4a9c1b17,	0x03729809,	0xfb49d6b4,
-0x8a559a23,	0x3c386097,	0x02b21c37,	0xab05b6cc,
-0xdecd4628,	0xfac77846,	0xa38c3080,	0x999810fa,
-0x43a83da5,	0x17b487fd,	0xd8a3e4e4,	0xe8120fa8,
-0x11120fa9,	0x927977b5,	0x2c782885,	0xef1ba162,
-0xdc97fc66,	0x83b01586,	0xe45b8da2,	0x99fddcca,
-0xcc19f92c,	0x2804b9ae,	0x837b8d9f,	0x218de4b1,
-0x48ce346f,	0x4b406a7e,	0xadde4cfa,	0x27404bfd,
-0x124a19bb,	0x13428075,	0x6b5ddf57,	0x301ff9b5,
-0xb171d5c4,	0x2afeca28,	0xcab20b74,	0x7fcf8d05,
-0x4b885a5d,	0x4d843055,	0xe4658f32,	0x538c4131,
-0xd525e274,	0x30fbd9d1,	0x3ddde395,	0x7d2451a8,
-0xa53bf61a,	0xd1a3cf94,	0x8c5780bb,	0x5e03ddf1,
-0x6811ee83,	0x1cd220bb,	0xd7e5a1e8,	0x42304db3,
-0x7249f9fb,	0xfbf5867c,	0xfe79897a,	0x1b4234b9,
-0x73db9ff7,	0xbf958830,	0x96d444f2,	0x9b6bb6ed,
-0x8b17c507,	0xea4f1f55,	0x3391f0f5,	0xb0796c55,
-0xb7aa2eda,	0x5bdddb7d,	0x06287d43,	0x5ecbc51d,
-0xad8d8847,	0xdc098664,	0xe1e5f0b6,	0xfc5fed8a,
-0x0820e537,	0x05be47e5,	0x9eee2d56,	0xcbc83208,
-0xdd11c6be,	0x91f849f4,	0xdd3d3443,	0xf72de322,
-0xaf679f11,	0x02cedcaf,	0x27a7e9bf,	0xeb55b97c,
-0xc285d57c,	0xae701a4c,	0x76dc5928,	0x1298b9e3,
-0xcd254a73,	0x2a240b27,	0x145e78ff,	0xefe9993c,
-0x0c565b83,	0x154a49b5,	0xdd896ee6,	0x99d3a097,
-0xb67d6763,	0x44562693,	0xe69353a2,	0x957a1116,
-0xce61d1e0,	0x4bda4c75,	0x7d8c770c,	0x11980805,
-0x561a87ea,	0x6b79e439,	0x8d54242a,	0x817de2cd,
-0xe2140396,	0xd8f538d7,	0x60a7e51f,	0x981a22f4,
-0x8c1bd013,	0x6b23db67,	0xc51f4727,	0xa2ebd226,
-0x46528dae,	0xa4f44720,	0x8e241ea6,	0x4510662f,
-0x8e2d75df,	0x206c055f,	0x77fe4b1c,	0x923824f2,
-0x7f805f32,	0x59ac5198,	0x6ac7fb2b,	0x89b0087a,
-0x4772415d,	0xd9e73d6b,	0x1d767093,	0xf15922f2,
-0xf783392a,	0xc2715489,	0x18d84435,	0x90af82a1,
-0xb8900c90,	0xb7adc0d2,	0x1a8e2a13,	0xcbc595f0,
-0x5dc62e9f,	0x2c1bee3b,	0xd817354d,	0x9e460f6a,
-0x57ae4385,	0x0b54aedd,	0x21cc9c23,	0xf67349b4,
-0x072a2495,	0xc501def4,	0x65d1fbf9,	0x70282b9c,
-0x7072643e,	0xb7ed88d7,	0x93341d4c,	0x6fd88c08,
-0x4e185215,	0xfcf788fc,	0x5ccc37c1,	0x9d8c1602,
-0x84017ec9,	0x9213b205,	0xdc4db616,	0xbfe9acb0,

cpu/intel/model_6xx/microcode-MU166d07.h

diff --git a/cpu/intel/model_6xx/microcode-MU166d07.h b/cpu/intel/model_6xx/microcode-MU166d07.h
deleted file mode 100644
index ba359ee..0000000
--- a/cpu/intel/model_6xx/microcode-MU166d07.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  MU166d07.inc  */
-0x00000001,	0x00000007,	0x05051999,	0x0000066d,
-0x35ba5e6e,	0x00000001,	0x00000020,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x5e56252c,	0x4f0fc459,	0x0dda7564,	0x89df7fe8,
-0xc1985cef,	0x196e2272,	0xf4673aca,	0xfcb4c8d7,
-0x260334ef,	0xd745755a,	0xf26f8cbc,	0x28c29161,
-0xdc0d9885,	0xd470cec7,	0x771e836a,	0xceffe4e2,
-0x8442e471,	0x4d6acd9f,	0xe0355eba,	0xac9da82d,
-0x6dd914ff,	0xd4221e41,	0x909effc1,	0x58cd3b0b,
-0xe1479a6d,	0xb5ef2a86,	0x63693ab6,	0xc2f046cc,
-0x8adbf768,	0x4c57d2e2,	0xca5aa305,	0xb3106fbc,
-0x06603d00,	0xf8c94ed8,	0xf69d93af,	0x059aca0e,
-0xbcd57674,	0xb72b359a,	0x260152ed,	0xfe40d0e0,
-0xdcfc0d55,	0x2ff005a0,	0xf509b0fd,	0xd214bccc,
-0x630bcf58,	0xf8cfbe29,	0x92002aba,	0x4ca1f743,
-0xfc65a494,	0xb9fc0c5b,	0x487580f4,	0xffcee67b,
-0xf5f92e08,	0x47e81f3c,	0xbd252485,	0xd0c23904,
-0x4000c37d,	0x9f6833f5,	0xdeca61bc,	0x404d81e7,
-0xd72db92f,	0xd58aacd4,	0x068f4951,	0xf08a13de,
-0xd053146e,	0x2fd1f26c,	0xf5c81ca1,	0xd25ae1e2,
-0x66f007f0,	0xfba6eeac,	0x99bcc45a,	0x4666a0bb,
-0xf03ff585,	0xb32bc3bd,	0x4ebd2cad,	0xf60c2303,
-0xf5644201,	0x4cbec874,	0xbd2f4b21,	0xdb73feb4,
-0x44442781,	0x9a36bb55,	0xd5ef6337,	0x41f78df4,
-0xd9045692,	0xd4fdda07,	0x03361727,	0xf031b248,
-0xde253f06,	0x270a6b41,	0xfabee114,	0xd44db762,
-0x6f6e7d0b,	0xf3aa07dc,	0x9f784b10,	0x49628bde,
-0xfee63a21,	0xba75f2f7,	0x4936344c,	0xfbf2abef,
-0xf5f80b10,	0x449ba636,	0xbb45c68c,	0xd5e90822,
-0x4411803a,	0x909026db,	0xdb9c09dd,	0x49da46d8,
-0xd0920f17,	0xd75eeeea,	0x0a481e97,	0xfa0aed77,
-0xdcb2d33c,	0x2668c527,	0xf69e1af7,	0xdb258690,
-0x6789ce72,	0xf9255b26,	0x950c1bdd,	0x4dd4d88a,
-0xffa406fc,	0xb4a02bb5,	0x46db6c15,	0xfb60e40f,
-0xf813df80,	0x4b684e51,	0xb13bc892,	0xdad679b0,
-0x44d0e6b8,	0x986dbc15,	0xdb39a619,	0x40e2dfd1,
-0xd98d6cc5,	0xd2d46188,	0x09918e75,	0xf10f8b27,
-0xd0762674,	0x238338f3,	0xfe1fde17,	0xd5322a2e,
-0x65a842bc,	0xfb313c5c,	0x9264995e,	0x4ae7a364,
-0xf82fec15,	0xb988a3c4,	0x408bf6ca,	0xf8291760,
-0xfa087dd2,	0x4fc95069,	0xbf0c517e,	0xdbdab8d2,
-0x4e0dc819,	0x955d89b9,	0xd57c93f3,	0x445c0771,
-0xd7df5deb,	0xd499e424,	0x01a24a0f,	0xf6f249fa,
-0xd790a20d,	0x2d78aa5c,	0xf2891b04,	0xdc212d68,
-0x6ea2d816,	0xf81db2c5,	0x95f9716f,	0x4b09451b,
-0xf91d11d6,	0xb01920bd,	0xfab65a11,	0x6cb5e00f,
-0xf2c998f0,	0x007116c1,	0xfdac4ae7,	0x24a2cd9b,
-0x073c27cb,	0x2cfeffbb,	0x23998e30,	0x11fbf8b6,
-0x24a3acc0,	0x352fdfbd,	0x1e4b3aac,	0x15820bb1,
-0x3f02c3e3,	0x25eb76a0,	0x3e1c9a8d,	0x00b9e149,
-0x0d8a9e7a,	0x07d85c98,	0x04bae543,	0x26b7fd43,
-0x03d5b79e,	0x2946001d,	0x2dea0cf8,	0x43b4610e,
-0x2506bb04,	0x9ac11105,	0x4edb0263,	0xfb327e1b,
-0x93448267,	0x66c4f588,	0xf48d483a,	0x113d6078,
-0x61e5eefb,	0x768e81cc,	0x12daba21,	0xfc5f39c5,
-0x731b6ba4,	0x770a963f,	0xfc148bd3,	0x6b04e3d5,
-0x735eea30,	0x1793f64a,	0xa2d6e850,	0x7cb00909,
-0xd858cbfe,	0xa3f24121,	0x4c994609,	0xdfcbff3f,
-0x9725e9fc,	0x4f3543fe,	0x59c0c1a1,	0x18cb9e57,
-0xc1c3562a,	0xdacd316b,	0x26490ed3,	0x9d8fe37a,
-0xe90e7a6a,	0x79ed9044,	0xabb894d5,	0xa0374350,
-0x47ced1f5,	0xe85f29ed,	0x0e54c3fa,	0xa0f907e9,
-0xc1755fcf,	0x4cc7bd45,	0x7f08499c,	0xc6d36e55,
-0x7e2612b4,	0xc4c9891e,	0x3b5408e7,	0x710f9c03,
-0xb4ddd9b0,	0xd2558968,	0x7a3bdb65,	0x06acc5d7,
-0x58e1c843,	0x181e5813,	0xfe930ba6,	0x82c7bb45,
-0x694bc111,	0x046ec31f,	0x7c83855b,	0xcd97a1ec,
-0x941639d2,	0xac2630bc,	0x6c8bd957,	0x476c9982,
-0x39087f73,	0x05c6832f,	0x3e85c189,	0xb3abdfde,
-0xccc779ec,	0x84597ce5,	0xeca12503,	0x83d674fc,
-0x9bd3f064,	0x1292a463,	0xee679bf6,	0x82823ef4,
-0xed7f4d18,	0x6dafa853,	0x8bba73b2,	0xde5badfe,
-0x86f9e16b,	0xe08b4380,	0x8fd032aa,	0x952be076,
-0x8e43a9dd,	0x5e9ca0d0,	0x5c3a9c6e,	0x3ed246d3,
-0xcd3d920c,	0xfee73f4e,	0x5be235af,	0x3842c7ac,
-0x549a38c1,	0xd7155622,	0xd609483d,	0x2e8c63c1,
-0x7ee633d4,	0x365cb896,	0x21486709,	0x09da59e1,
-0x5385d44f,	0x40923a13,	0x368e7227,	0x3865cb0b,
-0x49b86a4b,	0xe91d9222,	0xa4261ac2,	0x5987de57,
-0x6b90090d,	0x4e07c06b,	0xe0ade732,	0x48b064ff,
-0xd8fbcaf4,	0x72e5f0b7,	0xfe1fb6e4,	0x8865fe58,
-0xaabd9585,	0x5bebdeef,	0xbccdc668,	0x0d44bbe3,
-0x35745d5d,	0x88e5bb1f,	0xfe5d3374,	0x69064530,
-0xac93ea3e,	0xd0358d6a,	0x98d400d4,	0x55767bfe,
-0x256a1b09,	0x99d61a1e,	0x89879a7b,	0x9f7fa025,
-0xfa19a9c0,	0x7a5a45a4,	0x8827d97b,	0x721df39b,
-0x8ca26f82,	0x2debf883,	0xf9bf8802,	0x0168de7d,
-0x69d62893,	0xf34f8364,	0x43b06563,	0x958f92ff,
-0xcc61b852,	0x46de8312,	0x7eadaa11,	0xf5d7317e,
-0x7fcbed41,	0xfd8b4472,	0x89ce0b98,	0x33a26c73,
-0x2372c4fc,	0xbfe3a890,	0x7d7840ac,	0xd561ac76,
-0xcd84304e,	0xe5058896,	0x7e6c051e,	0x61a9b441,
-0x0e14570f,	0xadaf99cb,	0xf0c39de0,	0x4a1dc4ab,
-0x52045c44,	0xdf33d196,	0x0af0dd01,	0x368040ad,
-0xa611a20d,	0xbe7b4987,	0xc8b7a5b2,	0xafa1d162,
-0xd9cf8dac,	0x6b09a341,	0x3e3df047,	0x2a780a01,
-0x02b0cb81,	0x99f9ec8c,	0x4afa4e2d,	0x73048be6,
-0x5ef2130d,	0xb1000354,	0xacbbedf6,	0x7767aa87,
-0x98b36af1,	0x416479a5,	0x72b01f54,	0x72d98f7d,
-0x68e9ecef,	0xe309f9a2,	0xd051571b,	0x78a5de85,
-0x9a6409e6,	0x6f6c2998,	0x507db337,	0x5f37d973,
-0x6cc44dd8,	0x9ca00fec,	0x6865feb9,	0x0b0a0443,
-0x5786a3ea,	0xf84bf72c,	0x6a8e35d4,	0x19b6490b,
-0x2d021a57,	0x42b5d1fd,	0xd9d989da,	0xece79c06,
-0x9d622680,	0x29b81f2b,	0x1c83e53b,	0x156a1f8f,
-0x19aa68ed,	0x63c44d9a,	0x8f17ef88,	0x1e18c81c,
-0x16b9f137,	0x2ae4a05d,	0xf7839170,	0xb6e98047,
-0xb0460222,	0x17be9291,	0x5805f8c9,	0x3fedccc9,
-0xabd75591,	0x5c89bb87,	0x22361c7f,	0xb449f07c,
-0xdbd7e082,	0x601c32a5,	0xca07c0a2,	0xf53f9056,
-0xe2801718,	0xb8dd7373,	0xb8c1fa68,	0x7521d777,
-0x54e7b093,	0x87d1c19f,	0xa0043422,	0x42641b0d,
-0x3df7eb55,	0x33960ceb,	0x2ccab13c,	0x7289fe79,
-0x017a50dd,	0x83585544,	0x1a62924b,	0xed311733,
-0x9f07f9ce,	0x19e88eb3,	0xa57658fe,	0x971210d4,
-0x551651e9,	0x50a40561,	0x5f05ec29,	0xdcfb5112,
-0xa3f15c0d,	0x728a4196,	0x5f6c1bb9,	0x9ed61bc8,
-0xb0c1763d,	0x572a6bbc,	0xd957a4be,	0x7a9e36ee,
-0x08809d99,	0x5db2305d,	0x0cd2b571,	0x776a0ea1,
-0xc3023262,	0xc7e2241e,	0x9a3bf11a,	0x10685917,
-0x05f63bf9,	0x7515a7cd,	0x354df431,	0x9fe23aa6,
-0xe7dd2ce1,	0xfd3f4c4e,	0xb8175841,	0x2a33e9cd,
-0xb31a26b8,	0x2becb6ae,	0x960637fe,	0x88d5d321,
-0x88dbbe41,	0xdb3c0412,	0xaed4333a,	0xf5553d5a,
-0x64323f5a,	0x2eeaadca,	0x819df2e5,	0xf45b6d56,
-0x7d027108,	0x2f49ed39,	0xbfd62d0c,	0xa0a64a08,
-0x0b06d96b,	0xc4459fe8,	0x404028e9,	0x560a808e,
-0x68d481c2,	0x1062ab83,	0x51ffc2c7,	0xbc762820,

cpu/intel/model_6xx/microcode-mu26a003.h

diff --git a/cpu/intel/model_6xx/microcode-mu26a003.h b/cpu/intel/model_6xx/microcode-mu26a003.h
deleted file mode 100644
index 1e07ce9..0000000
--- a/cpu/intel/model_6xx/microcode-mu26a003.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  mu26a003.inc  */
-0x00000001,	0x00000003,	0x01102000,	0x000006a0,
-0xdff45617,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x3178fc44,	0xfd2d6c5b,	0x28009450,	0x947b9751,
-0xd6a28dec,	0x5e09fb62,	0xf044b3ff,	0x843a9280,
-0x6aade48d,	0x801ae197,	0xf259ccd2,	0x771a35d1,
-0xabb20a93,	0xc7f266a6,	0x31cffc14,	0xffdf0618,
-0xbfb77be4,	0x26fd9509,	0x9ae8c81b,	0xc2635165,
-0x7ac26cc4,	0x976b8074,	0xd8d4a3a3,	0x6d4664f9,
-0xe66a36b4,	0x9741da01,	0x356eb9a9,	0xf6742e78,
-0xa88cf726,	0x74bb245e,	0x8baaf4bc,	0xf6fc71a0,
-0x5b3bb726,	0xcf9f8902,	0xb89da8f4,	0x65b345a0,
-0x938c67a6,	0xe4aae8d1,	0x7d69421f,	0xc01dd8d0,
-0x88ec622a,	0x0beca3b7,	0x9daed2d4,	0xc0609133,
-0x26706b8a,	0xb4408beb,	0xe0dceb6f,	0x2c352416,
-0xdc35aea6,	0xd69cd883,	0x0ca7500c,	0x83914075,
-0xc82b76d3,	0x155990a5,	0xff91c631,	0xd5bbbfc8,
-0x2b80f306,	0xd7b89878,	0xf2501891,	0x2a98f0d3,
-0xa86be9e0,	0xe58aab32,	0x364ffe79,	0x873fe5d0,
-0x972b765c,	0x33605773,	0xe507a817,	0x9cc1b237,
-0x730c85bc,	0x9ea45b18,	0xd2d2ba23,	0x4aa64ebb,
-0xc3c02974,	0xe2c678d3,	0x5fddc66f,	0xd392ab7b,
-0xe625b2bb,	0x6fa1bf87,	0xadb819f2,	0xbffc438d,
-0x29a75a42,	0x8273bb3d,	0xa2ebbbaf,	0x44751af3,
-0xd1336dc9,	0xb8ea2a01,	0x507c00b5,	0xbc5d1ae2,
-0xec3d52dd,	0x3b420cfa,	0xb5903c32,	0xe27e323f,
-0x635fcc3a,	0x837a737c,	0xe0a93c8b,	0x49c32b2c,
-0xa2b28a0c,	0xc4910f2d,	0x7823090f,	0xdd207b5e,
-0xace44b45,	0x6b07aebb,	0xf1de2791,	0x9b43ed2c,
-0x2a290c51,	0xd846b2a3,	0xcd082cc2,	0x593253a9,
-0xa71a8bfc,	0xe84ebaea,	0x7a1dbc25,	0xa8ed8941,
-0xbad427df,	0x24ea60d9,	0x8bb91a75,	0xaf896799,
-0x42edd33a,	0xcdda6c02,	0x855e1351,	0x2f9a8925,
-0x9de00122,	0xbfdcdd31,	0x3adaad66,	0x95b46ddd,
-0xef100e3b,	0x42c8f68a,	0xa0e8c87e,	0x964e792c,
-0x2f95bc90,	0x8c072bd7,	0xcc21c070,	0x0c266694,
-0x85c49295,	0xd120e46c,	0x1dc291d7,	0x9e857b79,
-0xd6e85535,	0x692671b1,	0xe8fc9aa5,	0xf79cdf25,
-0x3b703fbe,	0xb09ae23e,	0x948b08e9,	0x4a49df51,
-0xb903210d,	0x8fb8b6f6,	0x0e9503c5,	0x970ca0e3,
-0xc4a1d8fb,	0x772a97b3,	0xcdeeef55,	0xa9bbd8d3,
-0x4980089f,	0xbeec79a4,	0xc47571eb,	0x71c7b097,
-0xe597f149,	0xe2640676,	0x23d49990,	0xbe334a4a,
-0xd8918d52,	0x677fdbb4,	0xb83811cc,	0xe2516308,
-0x2e959c61,	0xd49eccff,	0xd362bb93,	0x734b6342,
-0x9ad68a98,	0xb645ea96,	0xda4164dc,	0xe9a108e9,
-0xfc0f2aba,	0x1771bdac,	0xd2a20f4d,	0xebc4a613,
-0x16dbc8b9,	0xb7216f3e,	0x86226957,	0x64ac2fd8,
-0x8dcf6c5d,	0xc7650467,	0x3dd5eb2a,	0xaab71dee,
-0xa84d32a9,	0x0c302583,	0xbcfe09a1,	0xab924a16,
-0x155e7a1f,	0xe7fae2f9,	0xca1b2b22,	0x56ef5e84,
-0x948dbc62,	0xd924664b,	0x40ef5230,	0xfc806b91,
-0xddc257f0,	0x13b601b6,	0xcd076bce,	0xa403b0ed,
-0x687b7197,	0x8c43494f,	0xb1656423,	0x3608cde7,
-0xb1fc13f2,	0xde76b60c,	0x2707c239,	0xf8800625,
-0x9a01f190,	0x16bad602,	0x91e499b9,	0xa66a5f6a,
-0x53ebe018,	0x2fb101ac,	0xf7375808,	0x9f389ac9,
-0x02731d5b,	0x4332c74e,	0xa88298cc,	0x0915f8ed,
-0x72cbccc0,	0xaefe2a36,	0xb9462942,	0xb96c3734,
-0x5ebc9539,	0x2233e83a,	0xbc061e53,	0xcec70013,
-0x2fdf4e90,	0xcb3922cd,	0xbb18ac4d,	0xbeacb4f9,
-0xc244558d,	0x7eaf183b,	0xa26e73b5,	0xa43ed7c5,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_6xx/microcode-mu26a101.h

diff --git a/cpu/intel/model_6xx/microcode-mu26a101.h b/cpu/intel/model_6xx/microcode-mu26a101.h
deleted file mode 100644
index ffd878f..0000000
--- a/cpu/intel/model_6xx/microcode-mu26a101.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  mu26a101.inc  */
-0x00000001,	0x00000001,	0x03062000,	0x000006a1,
-0xdac0a4cd,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x1a925620,	0x4b81f389,	0x1f55b086,	0x3a3c0b72,
-0x97aa26c2,	0x79093d54,	0x0e67ec11,	0x5c37053d,
-0x64e4158f,	0x404d78a9,	0xba6219f9,	0x2e08686b,
-0xe5a3d552,	0x09577ec7,	0xaaaa3c45,	0x060fc36e,
-0x278c17c5,	0xe0d35e8f,	0x38bb2b7e,	0x44df5aa7,
-0xff8034bf,	0xdaf298f0,	0xf404d040,	0x8db62d81,
-0xbf0b5755,	0x37273dfd,	0xf067eddc,	0x85556d3c,
-0xe028c3fb,	0x361c0e61,	0xe1c91916,	0xf666a76e,
-0xad25dcd1,	0x6896a9b5,	0xe62a7960,	0xecdeec60,
-0xb4614eec,	0x4ef1446d,	0x8c1b5dea,	0x26dce335,
-0xb51a21dc,	0x158dfc3b,	0xac9098dc,	0x6329e4ed,
-0xee0fbfc4,	0x42e4ee1f,	0xd42c51be,	0xfbeffdd0,
-0x8eb807f7,	0x02940987,	0xb55bf142,	0x51295e5e,
-0x0c4bb416,	0x288405da,	0x4044a714,	0x25487c10,
-0xc5d42317,	0xa19a5e54,	0x6f591e6a,	0x658d900e,
-0xd3e31ed4,	0x9a1e7945,	0x1e822af9,	0xcfa745be,
-0xdb4a0bb8,	0x70c034a3,	0x97d53091,	0x0bcb1625,
-0xb9757831,	0x607a4345,	0xa8dbefe4,	0xc57d0b71,
-0x65068d6b,	0xce8b60c0,	0x13b8d077,	0xc8cdd270,
-0x5cfd60f1,	0xba1de286,	0x25fec114,	0x138531a1,
-0x98ead827,	0x342e0dc5,	0x184f447d,	0xc39c38c1,
-0xdef43d07,	0x3f112321,	0xe56bcd08,	0x21a8954e,
-0x9284b430,	0x3f6080b4,	0x26ff7c9f,	0xb87d987d,
-0x6c880fc0,	0xfbc48334,	0x896daf3d,	0x2869dce3,
-0xb049cd04,	0xacd94d1a,	0x3cd9c76d,	0xd625bf61,
-0x3fd33f6c,	0xedc9dfbd,	0x4587d43b,	0x14f024f2,
-0x4bb68abf,	0x0be6e522,	0x817cbf56,	0xcd807794,
-0x2a3776bc,	0x2d4cc675,	0xa93197cd,	0xd159ea13,
-0x4a2f31f8,	0xf9c8483e,	0x5dd3484c,	0xa5e6aa91,
-0x56b30ab4,	0x54d8ad98,	0x122cf2a9,	0x0ea32a2c,
-0x8c106052,	0xa75018ee,	0xf1ef861c,	0x8eef2c7a,
-0x54a3ac2f,	0x236634de,	0xc0b93a7b,	0x624c67ba,
-0x7ca4151f,	0x63f5d46a,	0xbf3fc81c,	0x4de97caa,
-0x96b26301,	0x53d3d263,	0x9a56b4eb,	0xe9227bd7,
-0x6349dca1,	0x1463a57a,	0xe94a8a76,	0x2c1b2f29,
-0x408fd765,	0x79c92226,	0x2cdae01e,	0xc0711ae9,
-0x6dcad071,	0xc4c848b7,	0x0ad4dc9a,	0xecae9f21,
-0xbadc192b,	0x453060e4,	0x05f774cd,	0xc659c877,
-0x304c4fa4,	0x7eda6154,	0x7b34f620,	0x14cb0180,
-0x95dd0a99,	0x7faf3248,	0x7405b38e,	0x9b83e3dc,
-0xc6c13c20,	0x75640563,	0xd138fa21,	0xed2aa41b,
-0xdd655165,	0x3604d602,	0x459c69c4,	0x21582dd4,
-0xa2609dbf,	0xfe8d29d9,	0x945c3b01,	0x4f77f55d,
-0x24ec2ec4,	0x9b88285e,	0x6758ebfe,	0x773bd171,
-0xd6c6d39f,	0xdcbbf9e5,	0xa80ba71e,	0x095e3dbb,
-0xcd99eb28,	0x4901a58f,	0x34df1c21,	0x8e586420,
-0x1cbfdf50,	0x95085823,	0xa2ae7016,	0xaaaef150,
-0x14c815f5,	0x8f7c9723,	0x1fd00fa3,	0x0390f0fe,
-0xf6e3fcf4,	0x8250779c,	0x421efd91,	0x2f6bf608,
-0xea9704ad,	0x448f975c,	0xd68cc3d1,	0xead4e5e7,
-0xc52eb1b1,	0x83cb45a7,	0xebc29c1a,	0xcdfc2b79,
-0xa6d9ea12,	0x429a8bd2,	0xaf53233b,	0x9b729f98,
-0x91e763fa,	0x839af791,	0x31a8072d,	0x78235953,
-0x36931de4,	0xdebe9744,	0x3b4d0ee1,	0xd3e19156,
-0x860b50a3,	0x5a9e107d,	0x7172d726,	0x6bcb1274,
-0xf239330c,	0x474f913e,	0x466f82cc,	0x97f831d3,
-0xc0cbc28c,	0x1a95f8b6,	0xc4799e3e,	0x3d90176d,
-0x6d8510a9,	0x248ffa74,	0xb08a8d46,	0x892fdea7,
-0x0ffadac7,	0x763e7d4d,	0xe350936d,	0x6dc3fd4c,
-0x838ba96f,	0x4f0239d3,	0xf295395e,	0xb3c38631,
-0x7ea7a143,	0x157a4e43,	0x46f8173f,	0xfbc18d4a,
-0xc401e17a,	0xc4620358,	0xd2ab5437,	0xa01db06f,
-0x58ce91fc,	0x850de1a3,	0x9b542dba,	0xee77f038,
-0xddd3ced6,	0xc225d2ce,	0x63a3f765,	0x3342a06c,
-0x6a780c2f,	0xfaa925b2,	0x366ebeec,	0xbcc9abea,
-0xc7b3fa4e,	0xf4f1123d,	0x5198702c,	0x3e3458b7,
-0x0b1ce9a1,	0x51b1bd7f,	0x711e791e,	0x927d8bed,
-0x91dbaea9,	0x7eefbda9,	0x7a19edd9,	0xdf7b8dce,
-0x5bb40613,	0x0b0c1e0f,	0x85b82c98,	0x18da4dc1,
-0xc5fd78ac,	0x57c1e31d,	0x4c4001b5,	0xe31d2643,
-0xa6afbf58,	0xad200e68,	0xf0114ba4,	0xd6a620f2,
-0xc753a720,	0xac9022a0,	0x28a41f01,	0x22a4ba95,
-0xc00b7531,	0x23d42795,	0xcd836a86,	0x90262708,
-0x3292cad0,	0x40022e39,	0xc1581b0a,	0xe5101550,
-0x6538096b,	0x208c549d,	0x3ce2bf88,	0xa71df38e,
-0x3dec3685,	0xca3949f1,	0x79f3ad1b,	0x3ee8b300,
-0x9d305fc6,	0x7a2e5288,	0xbe81a2f2,	0x7ada0c06,
-0x191c7f01,	0x58dfcbd1,	0xc78dee72,	0x72364226,
-0x1866de12,	0x8d22305c,	0x943a0f0e,	0xc81967ff,
-0x4d55fb0f,	0xaf199be1,	0x90bbda61,	0x4e7c234f,
-0x90cfec16,	0x9b4bcf26,	0x21622023,	0x0926f0fa,
-0x1d504377,	0xa58db427,	0x8d93ce2b,	0x90bfe900,
-0x29e67397,	0x2c1261ed,	0x4ace9474,	0xd5c60282,
-0xe53fb300,	0x8a61a0ab,	0xa7aa0918,	0x4389d7c5,
-0xd09d605c,	0x6c5bedb5,	0xd6d54c51,	0x433dea21,
-0x7ad9e677,	0x813bff76,	0x5a162c75,	0x1ee0661f,
-0x9b6c2030,	0x8e8dc989,	0xcd4bc9fc,	0x4454675b,
-0x8d583c9c,	0xe3400094,	0x116ebb83,	0xe847bc9a,
-0x2a4622dd,	0x2a901e6f,	0xd789b1c0,	0x094e2bbb,
-0x056e563f,	0x9f17e606,	0x8bc79b8d,	0xd2c535c1,
-0x06a45a27,	0x9dc56771,	0xa06649e2,	0x5ff25ac8,
-0x6554961e,	0x98e583d9,	0x38ba93da,	0xdee1de18,
-0x037cb9d5,	0x6b17f195,	0x3431faaf,	0x13860a0d,
-0x28bca10d,	0x0a54c011,	0x9957cdb6,	0x3aa1f429,
-0x9d41b7b3,	0x9aea5be2,	0x60c7ce6b,	0x4cd1c10b,
-0x24ddddcd,	0xe28412ba,	0xa03a5466,	0xa1896879,
-0x59edcb87,	0x1b241765,	0x157bf161,	0xf219f950,
-0xe86ff526,	0x262005d9,	0x11769531,	0xbca15d95,
-0x28f5ef17,	0x1f27e725,	0xc32631d2,	0x07249e61,
-0x1ba851e3,	0x4f49b577,	0xe2a1df5e,	0x826fa7ff,
-0xc34e1e2e,	0x7fe26024,	0xbc19800f,	0x0d368dc9,
-0xe03da0c6,	0xadaa4f9c,	0x9ad1e43c,	0x96f84e44,
-0x0b6cd695,	0x1bb46971,	0x942d6e5b,	0x6316170d,
-0x3164509f,	0xc6659450,	0xb2a0370a,	0xabc208e8,
-0x6d479811,	0x3684bc0e,	0x80b7b101,	0xa50b7bb5,
-0x43d21233,	0xb423559d,	0xf41dcd16,	0xdfd3c276,
-0x3e586469,	0xd9b7630a,	0xb88f9e44,	0x0cda6f4d,
-0xe5bf5844,	0x8709f788,	0xdae37da6,	0x1fb41777,
-0x1d903f69,	0x34383b69,	0xd409ae70,	0xd1c99758,
-0xdedfd7a4,	0xa4bdf018,	0xf4058202,	0x8565d66f,
-0x5365aed9,	0xfa69742e,	0x2cfbfbcf,	0x88a00b60,
-0x506c0713,	0x2866475b,	0x3e1df573,	0xb86f7feb,
-0x31d23a7f,	0xc6320e6a,	0x3ebbc2a5,	0x83a1d4ef,
-0x15169f5f,	0x42a61753,	0x893e553e,	0x4ddbc66d,
-0x7449ec1f,	0x76f65d22,	0x0622e13b,	0x32986f89,
-0x21181b4b,	0x99a80c0a,	0xd6fe00b0,	0x282c0e81,
-0x9fc1cf88,	0x919b855d,	0x618257d8,	0x82c448b8,
-0xe22537a1,	0xa90de388,	0xba73b90c,	0xd765eeb0,
-0x62b2727e,	0xa08dfe20,	0x70b3c8c5,	0x3ef04007,
-0x9f73732b,	0x2201edd7,	0xb836219c,	0xf913af7c,
-0xf50f64ca,	0x93ac107a,	0xf509f84a,	0x6f6026f6,
-0xd9bb8eac,	0x4b268cfa,	0xa65a3fa6,	0x9837cb75,
-0x784fb835,	0x2060576d,	0xb1604cae,	0xb9da4116,
-0xab320cf2,	0x60a1b501,	0x0c73fa79,	0x8d5a6f1e,
-0x57688086,	0x218e4005,	0xca054e3d,	0xc1a3c3ec,

cpu/intel/model_6xx/microcode.bin

diff --git a/cpu/intel/model_6xx/microcode.bin b/cpu/intel/model_6xx/microcode.bin
new file mode 100644
index 0000000..134d847
--- /dev/null
+++ b/cpu/intel/model_6xx/microcode.bin
Binary files differ

cpu/intel/model_6xx/microcode.h

diff --git a/cpu/intel/model_6xx/microcode.h b/cpu/intel/model_6xx/microcode.h
deleted file mode 100644
index ceb462f..0000000
--- a/cpu/intel/model_6xx/microcode.h
+++ /dev/null
@@ -1,11 +0,0 @@
-
-#include "microcode-MU16600a.h"
-#include "microcode-MU166503.h"
-#include "microcode-MU166a0b.h"
-#include "microcode-MU166a0c.h"
-#include "microcode-MU166a0d.h"
-#include "microcode-MU166d05.h"
-#include "microcode-MU166d06.h"
-#include "microcode-MU166d07.h"
-#include "microcode-mu26a003.h"
-#include "microcode-mu26a101.h"

cpu/intel/model_f0x/microcode-2f0708.h

diff --git a/cpu/intel/model_f0x/microcode-2f0708.h b/cpu/intel/model_f0x/microcode-2f0708.h
deleted file mode 100644
index 382fa3d..0000000
--- a/cpu/intel/model_f0x/microcode-2f0708.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  2f0708.inc  */
-0x00000001,	0x00000008,	0x11152000,	0x00000f07,
-0xb7b473e7,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x4dddb0e3,	0x5a70c760,	0xe3027e6a,	0x257e0d6e,
-0x1cc3bc7f,	0x58220fe4,	0x6b5f6eb7,	0x631a1665,
-0x8a7512c0,	0x06161f7e,	0x8069e964,	0x528fd53c,
-0x13223d11,	0xd432b7bc,	0x14e91b7c,	0x0a9ef7d5,
-0x0e260983,	0xffe44ab3,	0xd1feef0b,	0xc132aee8,
-0xe5ea6fc4,	0x18948b86,	0x1008c031,	0xd750f306,
-0xf362cdc5,	0xf610851a,	0x27ea5d51,	0x18849a2c,
-0x21f0c897,	0xe7bc3877,	0x9865d834,	0xdfbd8ab7,
-0xd1b7adf4,	0x1d116923,	0x46d71883,	0xe2b172f4,
-0x12065b5e,	0x23984b09,	0x86922920,	0x20ffc1a4,
-0x3d53d90c,	0x02603eda,	0x972c6c24,	0x319bb9d4,
-0x60df61b9,	0x0e86675f,	0xc4b3e000,	0x77691725,
-0x8e2cb3ae,	0xb174fafb,	0x6973c230,	0x5099b0af,
-0xeb3b208b,	0xa8629bfd,	0x4eee644e,	0xdf345074,
-0x4966d636,	0x4f84bb76,	0x58920fc9,	0xca68b22f,
-0xc3e6e2fa,	0x344c1773,	0xb38ceb98,	0x7bd94b4c,
-0xa7b02c1d,	0x6c49d324,	0xbee89d2c,	0x05e29d38,
-0x832e9907,	0x7a1b71ef,	0x707cdbae,	0x5302f267,
-0xdd3ace44,	0xe735b7e6,	0xe9801d71,	0x4fa2cf9b,
-0xecef5578,	0xa59d0bb0,	0xc7ee559a,	0x73a22e03,
-0x379f0f17,	0xdee4fa9e,	0x994460b9,	0xb789e510,
-0x9727b82b,	0x45363eeb,	0x87ffd67b,	0x725908e9,
-0x0295aee8,	0x3a70dcb1,	0xb2b6eef2,	0x7ebc23d3,
-0x3d692d9b,	0x43aa7591,	0x59713bdc,	0xc98911f7,
-0x2ca95380,	0xe577f8b3,	0x7bf4a277,	0x986a17b2,
-0xa153447d,	0x78da542f,	0x0c4c2f50,	0xc0dbc22f,
-0x2729eecc,	0x51051362,	0x79bc3129,	0x6cfd32f6,
-0xaab0a714,	0xc77a2a0d,	0x0b9bb7f6,	0x5f4ea4f0,
-0xa04ab8f2,	0x23d7c066,	0x9a3a61e8,	0xc95e854b,
-0x6c5365ee,	0xcde17650,	0x0f2f0760,	0x28c82126,
-0x00087588,	0x3678486c,	0x8746fc87,	0xd2f54238,
-0x0cc355e5,	0xf2f3ba75,	0xf80d5eb5,	0x0c091c89,
-0xbc7f9b03,	0xfbd7bea9,	0xe2197cce,	0xf23e9ce9,
-0xd2ba317e,	0xf795879d,	0xa7ddd184,	0xf320b681,
-0xa1d665b5,	0x10ac8bb4,	0x8ee3146a,	0x5b458e3c,
-0xb89da052,	0xda575cc6,	0x0d230bff,	0x9c3cadeb,
-0xcd68ee26,	0xd032b247,	0x43658df3,	0xf9f4168e,
-0x861b4409,	0x1d279790,	0x866591d7,	0xea409a91,
-0x1351048d,	0xf3067a37,	0x6861790e,	0x3b35f621,
-0x22a9af0b,	0x28a7042d,	0x890f7f0c,	0xc93dbc2c,
-0x20adb3a8,	0xcb7b5697,	0x40c73f52,	0x3f4fde23,
-0xd2eb1eed,	0xdc77e6de,	0xd1d59d5d,	0xd975315b,
-0x2d37da7e,	0x86dd3507,	0x2012e431,	0xcd197ca7,
-0x7cfabd26,	0x56ed3b6a,	0xc6c179b9,	0xb133a293,
-0xd1988106,	0xdfdcc553,	0x925f894d,	0x610915a5,
-0x9daceed2,	0x1dc3be8d,	0xd92f2d7d,	0xd8ce4067,
-0xe0fe80a3,	0xc4c5be9f,	0x4b79f5a6,	0x07f2e89c,
-0x104ff0b1,	0xf9d80a95,	0xb469af7f,	0xdeb4e632,
-0xe20e68b1,	0xb04c906f,	0xae96d5f0,	0xe8807571,
-0x69e653cd,	0x73634a9d,	0x0359cf6c,	0x895bbbdd,
-0xddc8e603,	0xd0c6ecf7,	0x55d8d699,	0x6b6c87aa,
-0xfb5fa64c,	0x280e725a,	0xf469add1,	0xc71b2676,
-0x0d3ffa86,	0xc18b8e6e,	0xe9d5c8fd,	0x388a62fa,
-0x96486eb2,	0xe343b757,	0x2d7e5b9a,	0xcdd2fdd7,
-0xf37f535f,	0xc22d20f5,	0xb56229ef,	0xf84c2873,
-0x3bb8166f,	0x3047942c,	0x0c0c34e6,	0xffb18af5,
-0xba123d95,	0xd03ca2c9,	0x492f6877,	0x11123a60,
-0x12a4ed70,	0x1359ecf1,	0x54d06dbb,	0xf46dee9f,
-0xc12b4b91,	0xed32e734,	0x365d205b,	0x3f4bac05,
-0xf9107418,	0xfa1f3314,	0xbf4b26f3,	0xfb727a4a,
-0x0491c7f7,	0xae00a8c9,	0x8ae416e6,	0xd6452a4d,
-0x37a5613a,	0x63099fa2,	0xe9e1ab5c,	0x8d522050,
-0x13df8316,	0xf83472a2,	0x25ebaa4f,	0x760db85f,
-0x75ac1227,	0x2c5a02ef,	0xfc6a75ba,	0xc73e3d4f,
-0xda41add6,	0xc0cf63a3,	0x9f8b7c51,	0x1edcc855,
-0xdafd1090,	0xeaa1f5f6,	0x9f5ab9be,	0xf519b1f9,
-0x220ada81,	0xec9b6297,	0x8661ea2c,	0xce9b083c,
-0xd9066bd8,	0x3580f9c8,	0x654096f0,	0xcd89c00a,
-0xa1cb9789,	0xd81005e0,	0xb38c9d26,	0x16fe94f6,
-0xfd7ed18a,	0x7f082e86,	0x46232eb1,	0xdca4c40c,
-0x09c2a72f,	0xa457e090,	0x9b006010,	0x6e0ef594,
-0x8c2db173,	0xee25f9b6,	0x4b5eac90,	0xa5c29e8b,
-0x38287db2,	0x9d44981f,	0x64683efb,	0xd4d7b3c1,
-0xcc04d5d9,	0x492e3520,	0x2f4c5009,	0x9166154e,
-0x0611df13,	0xe072a1a8,	0x91c621ce,	0x77075850,
-0xf167a5e5,	0x21e75939,	0xdea1ea39,	0xd92a1119,
-0x1dcf8ad4,	0xd08c8eda,	0xe448b734,	0x3aca7fec,
-0x2ac02c01,	0xd190cfc2,	0x5db28d4b,	0xd035d0d1,
-0xa3d4ea09,	0x875a7ac8,	0x01905ca5,	0xf5d11ebd,
-0x52bb11d7,	0x61d7dde8,	0x1b75b331,	0x8d7519d8,
-0x078e4250,	0xd26b936c,	0xb5782301,	0x4b31a8b7,
-0x6ec83a0f,	0xf61c0c35,	0xfffa8aa1,	0xd4dfb0c8,
-0xc6f66653,	0x118cfdcc,	0x4d21b9b7,	0xfefcad12,
-0x0966781a,	0xc924b099,	0x917c8608,	0x13ab58b4,
-0x15dd0d17,	0x5e556a71,	0xccede394,	0xfda4dcb2,
-0x21302bf2,	0x8753f833,	0x034ff898,	0x7f33ba69,
-0x198d898b,	0xf209df4e,	0xfe8c6dbd,	0x82c24300,
-0xfa8e133f,	0xe7ead557,	0x38713537,	0xe910e818,
-0x85427524,	0x20188bbe,	0x3bffd95e,	0xdf8dff60,
-0x54000988,	0xfc26f171,	0xdc175ac5,	0x33ccf2d2,
-0xc28930c4,	0x798af4bc,	0xd3038720,	0xf6194887,
-0x4d4ff6dc,	0x8ae765df,	0x861a86a3,	0x534d3360,
-0x5ef12290,	0xee55d0b0,	0x80a81e9b,	0x9f0db628,
-0xe9feb243,	0xaa83d0ba,	0x1d81638e,	0xc8d34c16,
-0x94c9c754,	0x5b036e00,	0x1d3fdd62,	0xaa5702d3,
-0x78e42d61,	0xf3b33904,	0x7a64e85a,	0x7c81119e,
-0x7c8a9214,	0x9c47cab6,	0x169fce10,	0x63714659,
-0x6503c9fb,	0xa04376ee,	0xecce86ff,	0x880b1193,
-0x52a10bc7,	0xf59865de,	0x26b855b2,	0xd74a8d70,
-0x8cfda341,	0xbd75fa8d,	0x417fd8af,	0x8899f8ae,
-0xfbccde06,	0x99bdd436,	0x27f2377f,	0x7a861733,
-0x44b70631,	0x84112f62,	0x33523bca,	0xc2dbf2c7,
-0x65747162,	0x407eb3ba,	0xd552a9a0,	0x81896a57,
-0xd2f2bff9,	0x6a8fc9d9,	0x5cde0cbc,	0x58b714be,
-0xdfc21b97,	0x00bd281f,	0x38e403e9,	0x6fb80b04,
-0x7c9ad9ac,	0x9e3e07c6,	0xa9c6ae35,	0x1c648e56,
-0x49b3aa31,	0x78c74846,	0x285f5d6b,	0x5ccb7142,
-0xabc6cc11,	0xce36f1f5,	0x093926cf,	0x88b774ab,
-0xabea55d0,	0x5d61bca4,	0x594f92a2,	0x6ae8eec6,
-0x325ea3d5,	0x8ee663a7,	0x9a00db31,	0x09787a75,
-0x13c2726a,	0xa97f00fa,	0x4794b06c,	0x38a57549,
-0x9850bc54,	0x15d84a9b,	0xd8ba56e4,	0xec52fbfa,
-0xb400471b,	0x31714eae,	0x9e60c723,	0x2d2f238b,
-0xcd154356,	0xf2395c4a,	0x07a37c04,	0xac6f6c10,
-0x32be7e7e,	0x366b17ea,	0xcaa7d96b,	0xcb3563a1,
-0xb15983b5,	0xba2af198,	0xd89900f3,	0xf9437ccf,
-0x47e26662,	0x1d5d5c22,	0x17ae16e7,	0x7e0ef361,
-0xec639aa4,	0xf46503c1,	0x9b88a712,	0xb7f2ae9b,
-0x9bfc2db9,	0x6d75e8f8,	0x896ba8a8,	0xfed54e37,
-0x3563eae0,	0xbbd0294c,	0x89b47800,	0xce87a4a4,
-0xb15ebb4a,	0xc29f09ef,	0x5830a869,	0x24ebaba5,
-0xf1504a05,	0xd58a8084,	0x87157d74,	0x182dced4,
-0x2ae81a28,	0x3397700c,	0x72ad1146,	0xbacdc632,
-0x7ea7fdd3,	0x23c147b2,	0x7203b0c0,	0x6ee52c7e,
-0xff0899af,	0xaaa7dfcd,	0x99012d4b,	0x1580a45f,

cpu/intel/model_f0x/microcode-m01f0712.h

diff --git a/cpu/intel/model_f0x/microcode-m01f0712.h b/cpu/intel/model_f0x/microcode-m01f0712.h
deleted file mode 100644
index 56da43d..0000000
--- a/cpu/intel/model_f0x/microcode-m01f0712.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m01f0712.inc  */
-0x00000001,	0x00000012,	0x07162002,	0x00000f07,
-0x39e69ff0,	0x00000001,	0x00000001,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xffffffe9,	0x8bb66866,	0x1d79ea57,	0xeae74f1b,
-0x361e4a7a,	0x55e2826d,	0x5f734071,	0xb2843de5,
-0xae7971bb,	0xe25004de,	0x405dafe0,	0x7d53f66f,
-0x4df56461,	0x7b57d0ce,	0xea17af39,	0xedbb1ebc,
-0xe9e38d20,	0x8b12c950,	0x4a0b7e87,	0x52c078c1,
-0x726e683c,	0xca3f7181,	0xc20dded4,	0x923fe6f8,
-0xfc2c31f4,	0xfc1dbb1d,	0xe4d7cd63,	0xe2fbcd17,
-0xa8ad72e0,	0x33fea0d3,	0x71d5d527,	0xc456c0fb,
-0x4ca199ba,	0xeb863e4b,	0x43210553,	0x05454fcc,
-0xdedf6095,	0x5ac66851,	0xc5b84d9d,	0xf1775630,
-0xa50e817b,	0x8393f563,	0x4d6a58a4,	0x641c876e,
-0x4598072d,	0xfb1875c5,	0x0efb05e9,	0xa5a840dd,
-0x54e9190a,	0xe9ebafdb,	0x7bfaa19d,	0xdae03c5e,
-0x141069e3,	0x178fbeef,	0xbdf33f79,	0xcdbdd066,
-0x07ae0fc7,	0xf45750a0,	0x6f3810e9,	0x6415e0bf,
-0x2b46112e,	0x21be86cd,	0x29245980,	0xbb58f310,
-0xfb665f23,	0xfeeb9aad,	0xcea2257c,	0x5175328e,
-0x0d3d2bd7,	0x81ce7ea2,	0x9a6de78a,	0x9850b5e3,
-0xbbee4402,	0xb6319fb0,	0xc010158c,	0xbbb913ff,
-0x395f312a,	0x24579055,	0x2ae58ef0,	0x9cc2b14a,
-0xc76a13bd,	0x88def903,	0xa9b67b9e,	0x3feb492d,
-0x707975d5,	0x5c9559b9,	0xf52a12ac,	0x87d2efe2,
-0x2b2e52a8,	0xd0d7df0f,	0x4f1c6f19,	0xebb81a13,
-0x80210238,	0x1b3c07f0,	0x7a499318,	0xde7c5eb3,
-0x9f875ea6,	0xad68ad52,	0xdf0ad02f,	0x88665580,
-0xc1e124bc,	0x2078c537,	0x31428f38,	0x91ab5aa2,
-0xc1a64ad2,	0x87cc2159,	0x718ebfd5,	0xc2c3532e,
-0x7e7ec93c,	0x1cdda579,	0xcffccb9b,	0x583c8d7e,
-0xdd8a3faf,	0x60aa9835,	0x61aba793,	0x3e57affa,
-0xa681cda5,	0xb225323f,	0x4b3f7fd0,	0x4d30f709,
-0x6d206bbf,	0x51689b07,	0x3040283d,	0x95d95684,
-0x53d4f28d,	0x4c5372c8,	0x0e2e293f,	0x7c660707,
-0x06a15ae1,	0x1452111f,	0x3c5a0df0,	0x61fef67e,
-0x8c9f26e8,	0x879dd434,	0x84937130,	0x28a9c507,
-0x9d05cdc4,	0xa58e51f9,	0x78250d1a,	0xb4aa4867,
-0x2f277408,	0x1d4281e2,	0x03f7a5c9,	0xb90aa91b,
-0x09ddba69,	0x219ff884,	0x63c7aa86,	0x3ac8cae8,
-0x3217bb61,	0x166844cd,	0x45518869,	0xb23d4145,
-0x444a751c,	0x2c4ea3cf,	0x574cd48f,	0x859e01ae,
-0x79901e63,	0x28701f07,	0xf31897aa,	0x0bfbabff,
-0x18148ee5,	0x3aa01696,	0x08b8c6e8,	0x073ef026,
-0x4bbd2163,	0x278a5b5d,	0xca4f43fe,	0x1581b955,
-0xdd310608,	0x4c47f8aa,	0xc4748e35,	0x0938dd48,
-0xa7dbd247,	0x4f9c9284,	0x4fd12ae0,	0x4122817e,
-0x57af6bb7,	0x1b1cbf56,	0x01713ae5,	0x4693a2a4,
-0xd361471c,	0xfb5e5fb9,	0xd57ecb2e,	0x1396b134,
-0x6c1ef975,	0xf0ba5604,	0x2bc5fc46,	0xe8e75240,
-0xdc5a04ef,	0x0c7fec2b,	0xff44a7d1,	0xf1752a97,
-0x4c64f1a6,	0x5f5b6971,	0xf80425d4,	0x26a2d408,
-0xdc3661d1,	0x641f52d4,	0xc14d1641,	0x6db4a92b,
-0x7ab7b4f4,	0x15c03f01,	0x120456f8,	0x434b9b0b,
-0xecd8fd05,	0xe791871f,	0xf115d632,	0x362e7192,
-0xb2f6d067,	0xc38caf36,	0x38916496,	0xdb0b52f0,
-0x4435b1b4,	0x1e33bc83,	0xdbec3c07,	0xc8a80185,
-0x7f5c6ad1,	0x0759aede,	0xfb9afeeb,	0x3da4804e,
-0x02b98265,	0x1fdc99d3,	0xe3238746,	0x0b485f0d,
-0xc8452172,	0x21f980ed,	0x115b5f9f,	0x2fdb1ab6,
-0x51f0b309,	0x07ec0a64,	0x1371f802,	0x1af7b884,
-0x2b63d9be,	0x064d5257,	0x9247a258,	0x2e7d9ef4,
-0xebc76e82,	0x3744e142,	0x327498ed,	0x1efe2eaa,
-0xf4b47f03,	0xd56b8a80,	0xd9df7063,	0x38b6093e,
-0xe8952237,	0xd4c3cb00,	0x427aaa2f,	0xde11b0dc,
-0xc6389e16,	0x2775052a,	0xb53c88c3,	0xdcc0d91f,
-0xa372dba9,	0x56082310,	0xd5eb095a,	0x06bf07de,
-0xab0cfa42,	0x450af2c0,	0xb64ae4fb,	0x4b29950c,
-0xf66c4395,	0x0878b9c7,	0xbcd15704,	0x634b7b14,
-0xdb3de5f4,	0xb08f50bb,	0x831e6abb,	0x010abe5c,
-0x4d081d89,	0xb522a1b5,	0xfaf4f82a,	0x8932dcd1,
-0x439fdb05,	0x0cacc3de,	0x56e8393b,	0xaaa12d2b,
-0xb3c38358,	0x304b273e,	0xd2a231fe,	0x2211e77c,
-0x70f73dee,	0x2e5b056e,	0x01df2fde,	0x0d39db76,
-0x2c2137b2,	0x11638742,	0x2c160d57,	0x1e29cf1d,
-0x62157d15,	0xd71cf60c,	0xcc2012e5,	0x1ef8e889,
-0x7438d083,	0xfab2d9e9,	0xcd1e6cfb,	0xe37d919e,
-0x738e3e70,	0x2f511109,	0xc88b544a,	0xcb5231cc,
-0xb4aabced,	0x20f74006,	0xdf5b722b,	0x0f299cd5,
-0x324f3630,	0x139a0348,	0xd45349ea,	0x208af30b,
-0x8f2b48fc,	0x38a7e62a,	0xe5eb7bef,	0x18028e8f,
-0x365eeece,	0xde32aa2b,	0xb7c86e79,	0x22b3a1a3,
-0x3a66b2db,	0xd628c336,	0x2d3a3be9,	0xd82f8a9f,
-0x049bc319,	0x3973ea2f,	0x66ef9dec,	0xfd5ed712,
-0x8945b138,	0x5a3f99ff,	0xecd0b3b8,	0x29471ee6,
-0x6b2a42e5,	0x45c3cc05,	0x2301d9d8,	0x702b2528,
-0x1d75be7a,	0x3324b767,	0xe3add8b4,	0x7c0a4bae,
-0x791010e8,	0xda59d2bc,	0x612eac2f,	0x235021b0,
-0xc18567dc,	0xd15f9148,	0xca5d86fb,	0xc10bc63f,
-0x2b8f4c36,	0x2d891b63,	0xa7977c9f,	0xdadb398f,
-0x083f6a6a,	0x230e398e,	0x19420c4f,	0x1cc52b2a,
-0xae8d117d,	0x2c32000d,	0xad13069e,	0x3a113635,
-0xc6522f49,	0x074a7ddc,	0xea16a043,	0x35662b0a,
-0xb3bd25b8,	0x18b45214,	0x9f142cbe,	0x1b7c6938,
-0xe5f764de,	0x3b252a68,	0xd0c84dde,	0x1d74a684,
-0x0b394830,	0x18d2add6,	0x0e14d7e3,	0x2812c01a,
-0xb1426e75,	0x97c7426c,	0xca2425ce,	0x3b07c144,
-0x92c538a2,	0xb50a1bc5,	0x6b7867a8,	0xb147634f,
-0x39d1a5b6,	0x38dd638b,	0x84102bc9,	0xaeaf04e9,
-0x75d6755a,	0x359fdcd9,	0x9859936d,	0x801f6834,
-0xbba00552,	0xd8c96732,	0x9769642a,	0x92ab9c4d,
-0x4b44a4ea,	0x6f3f380d,	0xf112e9a3,	0x8768532a,
-0x958c163d,	0xa4a7c80f,	0x6873ae6b,	0x9b0e78b2,
-0xd7ab7060,	0x4d9f8791,	0x370f29eb,	0x16e6a4df,
-0x2eaa46b8,	0xcc64bf8b,	0x423c788c,	0xeef8371a,
-0x497e76e3,	0xe49e1ed6,	0xb6890ea8,	0x7562648f,
-0xd30c433a,	0xb967a3d2,	0x17b665fd,	0x0499210d,
-0x0df41a8b,	0x60261315,	0x61d25715,	0xf7dfc43e,
-0x1567841c,	0xac38e452,	0xb76be7a9,	0xfabea796,
-0x017a95c6,	0xd7d2b0da,	0xa24fb7a3,	0x14ec0a12,
-0xd3446440,	0xaa70e820,	0x81620b96,	0x466c02e6,
-0x9f67c135,	0xee4ff616,	0x509161ad,	0x263587d2,
-0x11169e0f,	0x5c46175a,	0xeed237e5,	0xefe242bd,
-0x2aed7440,	0xde3f737f,	0xd6ba63eb,	0xe8d8304e,
-0x8a1ad7a7,	0xff53828a,	0x0d2c073b,	0x6dc5dbfa,
-0xcb76174a,	0xfa1b2c30,	0x384ac449,	0x1f5ea4be,
-0xde50549d,	0x5f6e5977,	0x6d5c33e5,	0x2b9b8ab4,
-0x8be0c16c,	0x021db150,	0xf3a99a6e,	0x9a4dcfc5,
-0x7bc75f76,	0x243be7b0,	0xe53d1b04,	0x38fd5ab9,
-0x4d26ca07,	0x90ef6dff,	0x4c8c02db,	0xdf986343,
-0xc84edd73,	0x2a46005c,	0x6ebe028e,	0x1d68a9dc,
-0x97f23c83,	0x2dda5fde,	0xaf56b1e9,	0xc4f04b0a,
-0x97a355a9,	0x3f5b604b,	0x8a4c5c33,	0x4fb3c292,
-0x5be0edd7,	0xd05af070,	0x1623da74,	0xb55ff7af,
-0x40929043,	0x62e96e20,	0xde5afdec,	0x5bbe38bb,
-0x47918b57,	0xba53cfb7,	0xa613b0cb,	0x3c794832,
-0x69c9f5b2,	0x62ad3086,	0x2afc0271,	0xdb900632,
-0x65d6c7ea,	0x0dd8b907,	0x52f3cabd,	0xf77a8c51,

cpu/intel/model_f0x/microcode-m01f0a13.h

diff --git a/cpu/intel/model_f0x/microcode-m01f0a13.h b/cpu/intel/model_f0x/microcode-m01f0a13.h
deleted file mode 100644
index 3d5794e..0000000
--- a/cpu/intel/model_f0x/microcode-m01f0a13.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m01f0a13.inc  */
-0x00000001,	0x00000013,	0x07162002,	0x00000f0a,
-0x2a2cc3cb,	0x00000001,	0x00000001,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xffffffe9,	0x80e0e61a,	0x7cb2c607,	0xbe1e2fc9,
-0xacaf1526,	0x31514e28,	0x9252d426,	0xb999ebf8,
-0x8469bb8a,	0x95e72fd2,	0x5f7c5472,	0x254adcf0,
-0xf706b236,	0x21ef3efb,	0x82d05526,	0x8b10bd77,
-0x268ab8bd,	0x929739a5,	0x0f180e02,	0x3ad1cc5a,
-0x23a10814,	0xbc4257f8,	0x026ded8d,	0x84bf45be,
-0xe13e69f3,	0xbb0edf16,	0x85218fd2,	0x898af4e1,
-0xcd635f26,	0x846ab0c6,	0x85a5d5cd,	0x077b4a16,
-0x71514de0,	0xbff893a6,	0x47536ab0,	0x1fc4b546,
-0x906f4b85,	0xc1f997d5,	0x0ba4b594,	0xa823eb50,
-0x416ee239,	0x659b0dbd,	0xf240ad67,	0xe042d532,
-0xce92f455,	0x9f318d9f,	0xac11fada,	0x6fc234ab,
-0x18cddb76,	0x67e52b4f,	0xa6f01943,	0xba695e2a,
-0x245bd123,	0xce05288f,	0x6582101b,	0x5be73a23,
-0x6ab67d0e,	0x873ac6f3,	0xab4c48f2,	0xe0d64284,
-0x65f33ddb,	0xd33abb56,	0x8dd411c3,	0x86f370ea,
-0x1c3726b9,	0xd561edb5,	0xa0484b79,	0x63bdccd0,
-0x54d42183,	0x05d9b9c2,	0xd1d2e489,	0x572f0b07,
-0x6b804808,	0x9ee441c8,	0x87e1e425,	0x0d4d3c3e,
-0xbb9188fd,	0xa7f1243b,	0x807be6fb,	0x8f828057,
-0xfe37dd84,	0x104ef504,	0x5aa650b4,	0x2f1b611f,
-0xd021e808,	0x1d4ca877,	0xdefabd4d,	0xaa0cbe35,
-0xa4e89854,	0xa880cfc1,	0x08ed71f1,	0xb58e8625,
-0x2f4bee9d,	0xfef8678d,	0x2868ade1,	0xcdd1c7a4,
-0x2b823a15,	0x4788ea69,	0x7a1de61f,	0x24a51210,
-0x4373e00c,	0x7f8e55c9,	0xb2c5092b,	0x74f9e0db,
-0x2f54f62d,	0x13e3b1c8,	0x835863dc,	0x7401feb0,
-0x82d9962c,	0xc321a358,	0x8db3eec1,	0x3d70aa8a,
-0x9e8d115a,	0xd1f258ce,	0x3db0262c,	0xdedf4ecf,
-0x2b43787d,	0x01bba4ab,	0x5533bfb0,	0xf25756a2,
-0x6748ff85,	0x49a04cf9,	0x15a3fceb,	0x2b0045b1,
-0x354d82dd,	0x51baaaae,	0x9cdb8826,	0x4a5e79d5,
-0xc0b783a0,	0x244ee819,	0xc9d7ec82,	0x61b5df6b,
-0xa3b0ab47,	0xf4201580,	0x16a9bda3,	0x2ac3fb2a,
-0xf2d45287,	0xc775c470,	0xca49165e,	0xf011aa96,
-0x7cc3f776,	0x128e7d4c,	0x53a7cb48,	0xc678c16a,
-0x704d85ff,	0x5ac3438c,	0x22a4255f,	0x06f4eb73,
-0x6d2c4918,	0x7ec8d353,	0x02f64898,	0x402caba1,
-0xa2dcd74c,	0x2ec84768,	0x19aaacb3,	0x641e9f60,
-0x610245fb,	0xbcde5b34,	0x5b2ad9e6,	0x26d2e619,
-0x3c5f7fc3,	0x8a4644e1,	0x6cc1f8fb,	0xb2ec0e52,
-0x02186480,	0x1c597a86,	0xea7cb92f,	0x8484972d,
-0x90f10aef,	0x7032ba2f,	0x8d51693a,	0x075f7010,
-0xef88324e,	0x5fbf378f,	0x1416ae8a,	0x5eac1f31,
-0x70e65677,	0x0224e031,	0x1305f1ac,	0x53209b14,
-0xb5037676,	0x99e958fb,	0xecb8fe97,	0x20fb5890,
-0x568e98e9,	0x87d42ce4,	0x03de50e2,	0x89728dac,
-0xdca95447,	0x36114e7b,	0x2aab8e7a,	0xa0529d9c,
-0x9901c79d,	0x4ff191b5,	0x7500cebf,	0x210bcc07,
-0x815fd1e8,	0x4ebd3be0,	0xbce22cf0,	0xcf2df323,
-0xfffa8eb1,	0x016b1ca2,	0xf87846a6,	0xddbf1474,
-0x435c41b5,	0x56245808,	0x050eace9,	0x128491f7,
-0x48c6fdda,	0x5775ded7,	0x0b4775a1,	0x7ce11409,
-0x0d9822a0,	0x084ca742,	0x8f2c8c8b,	0x4278fdfc,
-0xe45d26c7,	0xd92793fb,	0xe963acf5,	0x346473ea,
-0x28069586,	0xcd7423ab,	0xdd07fab1,	0xf2dd3f15,
-0xf924720b,	0x0047adff,	0x3935bd42,	0xde1d799f,
-0x03a4afd9,	0x4f0ea217,	0x5f3dd4df,	0x09f611a1,
-0x8ecf894c,	0x5111dde5,	0xd79db940,	0x4e2da85d,
-0x64622e3d,	0x00ed0f85,	0x192b2af6,	0x526fcc87,
-0x3e233c92,	0xdfa9d04d,	0x5a8a7d19,	0x18205eef,
-0x3ff5734e,	0xf3ba744e,	0xac73c051,	0xc2cf8a70,
-0x3ba41433,	0x123eb210,	0xe3f05134,	0xcfd54fd8,
-0x7995e0d1,	0x1760b323,	0x310a7810,	0x2706d0c8,
-0x15cf732d,	0x3c0ee597,	0x83e36338,	0x272058a7,
-0xff3e9fda,	0x0c22fe44,	0x11a26627,	0x061a17a0,
-0xd784b930,	0xb40ed3ca,	0x014eaa98,	0x2cfd7ef7,
-0xd3f700a6,	0xa2e0e5ad,	0xf6682e43,	0xbab69f7a,
-0x185c3430,	0x10a4a66d,	0x41698b7a,	0x89666812,
-0x1cdc431a,	0x301a8774,	0x056fa032,	0x08e5b4ac,
-0xd8e66808,	0x06cb04c2,	0x086f09ef,	0x09404e44,
-0x4b166a00,	0x1f244ff1,	0x096548b7,	0x3d066268,
-0x11c22583,	0x87d98b53,	0x83c785d8,	0x0c295204,
-0xa3693e8d,	0x8ca5c952,	0xa52c8190,	0xa9ac34de,
-0xe640e56f,	0x16d5715c,	0xf40bac7c,	0x940d757e,
-0x0955d322,	0xbd3e2f65,	0x6553293f,	0x0b25fcb7,
-0x14875a5e,	0xb5efd0af,	0x79cf151f,	0xa74e5acb,
-0x4b249263,	0x14a844ff,	0x4c547880,	0xb598f6b8,
-0xe9fffbc6,	0xe983f09b,	0xa5384013,	0x36baf1e7,
-0xe3a76c06,	0xde3df31a,	0x25d38aaa,	0xc19d9fa9,
-0x2c05457a,	0x0a4fd8f6,	0x01086f65,	0xdf7e10b3,
-0xa5f16786,	0x46d77f4a,	0x08336cd2,	0x1d06cb5f,
-0xe453696c,	0x6f662a90,	0x40d33558,	0x76c640d5,
-0x4e7e4c97,	0x10cb0f79,	0xb1cfbb1c,	0x4f3f0521,
-0x8cda32ee,	0x84c3e958,	0xaac41cc9,	0x023e7572,
-0xf3266bf6,	0xb4193d39,	0x3a31f7df,	0xbd83c248,
-0xc812df3c,	0x0af7f510,	0x82bb61f9,	0x95db6415,
-0xf7b12fa8,	0x7a7f4f9c,	0x2ec8f061,	0x3fa8e99c,
-0xc19bea78,	0x470c4315,	0x0bcf3abe,	0x787b97b7,
-0x78f992b4,	0x05a7b74c,	0x93fc4db2,	0x41094fe3,
-0x3e7fe41b,	0xa367bc2d,	0x90b393db,	0x3ec58fe0,
-0xb74cc79f,	0x9ed83f74,	0x10daeeae,	0xa524f1ac,
-0xafcd0f29,	0x11423945,	0x52319e75,	0x9978031d,
-0xa78bb8be,	0x1a8a86d8,	0xf9a5c6db,	0x15d9760b,
-0x00028056,	0x2d0f7fc3,	0x7734d88a,	0x1b877e63,
-0x7b1db862,	0x25037d9d,	0x5a210d59,	0x1875f3e4,
-0x0299248c,	0x90ae4f18,	0x949d7d41,	0x713deba7,
-0xa6ff8ffe,	0x243c5296,	0x6020828d,	0xe420ae82,
-0xf02eeda6,	0x3a8090e3,	0xaef23b89,	0x40d2cb8a,
-0xaaddddad,	0x220c269f,	0x288d2d4e,	0x8689e116,
-0x42de5c86,	0x95ff5e35,	0xdcaabe42,	0x3fbb05e5,
-0x4ade7e4b,	0xd6612d65,	0x44ad598c,	0x984eeabb,
-0x218696b2,	0xf9c83206,	0x881e3b4e,	0x54844f30,
-0x1f980f2a,	0x0aec3158,	0xdd92450c,	0xb8a3906d,
-0x0ccc7c23,	0x196b48db,	0x08ffaef9,	0x2c44b86d,
-0x05fcc149,	0x079869d4,	0x5f3f5d0b,	0x1086de9f,
-0x638432c5,	0x1dbe89c0,	0x882041a8,	0x05a6756a,
-0x306e76ea,	0x49ad9a0d,	0xbc24d1af,	0x2a113e7d,
-0x8a333131,	0x775f70a6,	0x49629224,	0x8e089d24,
-0x34e60e07,	0x280eb8c9,	0xcbf3805c,	0x528c0bdf,
-0x46c79b94,	0x543c88dd,	0x2b2e55b0,	0x252bf38c,
-0x0757335c,	0x56405b4d,	0x7f0894ef,	0xa2417da9,
-0xf4f8c5d2,	0x2be63c2f,	0xcfb400fd,	0x4b9f4e99,
-0xbed450c7,	0xbc3cdea6,	0x216f9223,	0x3d2920ad,
-0x97284d1d,	0xb5b05c58,	0xa5075b63,	0x8ec8c059,
-0xf9c2f270,	0x0f79cbf3,	0x71253a77,	0x66896241,
-0x5cb14622,	0x8d439f45,	0x21d61b98,	0xddb46338,
-0x1b2fb78d,	0x78389389,	0xe3e92811,	0xd7b0a62b,
-0xeec11a6f,	0xf98e84dc,	0xe26a6dde,	0x7767cc48,
-0x04f5492f,	0xcfb9fbbf,	0x4bc7fb18,	0x86e5876a,
-0x6cec34b8,	0x44f1e0ac,	0xf60995fc,	0xd56fc8c1,
-0x3843fa32,	0xbbb021d6,	0x8269ba6e,	0xfc91d4da,
-0x092f051d,	0xcf0ecdc1,	0xec5f10a8,	0x16575ab3,
-0x3b956ded,	0xeccdcf22,	0xb68dbf1d,	0x42bf3c8c,
-0x0bbc80c3,	0x13b6dec2,	0xcc51edc6,	0x6b44ec54,

cpu/intel/model_f0x/microcode-m02f0a15.h

diff --git a/cpu/intel/model_f0x/microcode-m02f0a15.h b/cpu/intel/model_f0x/microcode-m02f0a15.h
deleted file mode 100644
index 9db3109..0000000
--- a/cpu/intel/model_f0x/microcode-m02f0a15.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m02f0a15.inc  */
-0x00000001,	0x00000015,	0x08212002,	0x00000f0a,
-0x63e49a0c,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xffffffe9,	0x80e0e61a,	0x7cb2c607,	0xbe1e2fc9,
-0xacaf1526,	0x31514e28,	0x9252d426,	0xb999ebf8,
-0x8469bb8a,	0x95e72fd2,	0x5f7c5472,	0x254adcf0,
-0xf706b236,	0x21ef3efb,	0x82d05526,	0x8b10bd77,
-0x268ab8bd,	0x929739a5,	0x0f180e02,	0x3ad1cc5a,
-0x23a10814,	0xbc4257f8,	0x026ded8d,	0x84bf45be,
-0xe13e69f3,	0xbb0edf16,	0x85218fd2,	0x898af4e1,
-0xcd635f26,	0x846ab0c6,	0x85a5d5cd,	0x077b4a16,
-0x71514de0,	0xbff893a6,	0x47536ab0,	0x1fc4b546,
-0x906f4b85,	0xc1f997d5,	0x0ba4b594,	0xa823eb50,
-0x416ee239,	0x659b0dbd,	0xf240ad67,	0xe042d532,
-0xce92f455,	0x9f318d9f,	0xac11fada,	0x6fc234ab,
-0x18cddb76,	0x67e52b4f,	0xa6f01943,	0xba695e2a,
-0x245bd123,	0xce05288f,	0x6582101b,	0x5be73a23,
-0x6ab67d0e,	0x873ac6f3,	0xab4c48f2,	0xe0d64284,
-0x65f33ddb,	0xd33abb56,	0x8dd411c3,	0x86f370ea,
-0x1c3726b9,	0xd561edb5,	0xa0484b79,	0x63bdccd0,
-0x54d42183,	0x05d9b9c2,	0xd1d2e489,	0x572f0b07,
-0x6b804808,	0x9ee441c8,	0x87e1e425,	0x0d4d3c3e,
-0xbb9188fd,	0xa7f1243b,	0x807be6fb,	0x8f828057,
-0xfe37dd84,	0x104ef504,	0x5aa650b4,	0x2f1b611f,
-0xd021e808,	0x1d4ca877,	0xdefabd4d,	0xaa0cbe35,
-0xa4e89854,	0xa880cfc1,	0x08ed71f1,	0xb58e8625,
-0x2f4bee9d,	0xfef8678d,	0x2868ade1,	0xcdd1c7a4,
-0x2b823a15,	0x4788ea69,	0x7a1de61f,	0x24a51210,
-0x4373e00c,	0x7f8e55c9,	0xb2c5092b,	0x74f9e0db,
-0x2f54f62d,	0x13e3b1c8,	0x835863dc,	0x7401feb0,
-0x82d9962c,	0xc321a358,	0x8db3eec1,	0x3d70aa8a,
-0x9e8d115a,	0xd1f258ce,	0x3db0262c,	0xdedf4ecf,
-0x2b43787d,	0x01bba4ab,	0x5533bfb0,	0xf25756a2,
-0x6748ff85,	0x49a04cf9,	0x15a3fceb,	0x2b0045b1,
-0x354d82dd,	0x51baaaae,	0x9cdb8826,	0x4a5e79d5,
-0xc0b783a0,	0x244ee819,	0xc9d7ec82,	0x61b5df6b,
-0xa3b0ab47,	0xf4201580,	0x16a9bda3,	0x2ac3fb2a,
-0xf2d45287,	0xc775c470,	0xca49165e,	0xf011aa96,
-0x7cc3f776,	0x128e7d4c,	0x53a7cb48,	0xc678c16a,
-0x704d85ff,	0x5ac3438c,	0x22a4255f,	0x06f4eb73,
-0x6d2c4918,	0x7ec8d353,	0x02f64898,	0x402caba1,
-0xa2dcd74c,	0x2ec84768,	0x19aaacb3,	0x641e9f60,
-0x610245fb,	0xbcde5b34,	0x5b2ad9e6,	0x26d2e619,
-0x3c5f7fc3,	0x8a4644e1,	0x6cc1f8fb,	0xb2ec0e52,
-0x02186480,	0x1c597a86,	0xea7cb92f,	0x8484972d,
-0x90f10aef,	0x7032ba2f,	0x8d51693a,	0x075f7010,
-0xef88324e,	0x5fbf378f,	0x1416ae8a,	0x5eac1f31,
-0x70e65677,	0x0224e031,	0x1305f1ac,	0x53209b14,
-0xb5037676,	0x99e958fb,	0xecb8fe97,	0x20fb5890,
-0x568e98e9,	0x87d42ce4,	0x03de50e2,	0x89728dac,
-0xdca95447,	0x36114e7b,	0x2aab8e7a,	0xa0529d9c,
-0x9901c79d,	0x4ff191b5,	0x7500cebf,	0x210bcc07,
-0x815fd1e8,	0x4ebd3be0,	0xbce22cf0,	0xcf2df323,
-0xfffa8eb1,	0x016b1ca2,	0xf87846a6,	0xddbf1474,
-0x435c41b5,	0x56245808,	0x050eace9,	0x128491f7,
-0x48c6fdda,	0x5775ded7,	0x0b4775a1,	0x7ce11409,
-0x0d9822a0,	0x084ca742,	0x8f2c8c8b,	0x4278fdfc,
-0xe45d26c7,	0xd92793fb,	0xe963acf5,	0x346473ea,
-0x28069586,	0xcd7423ab,	0xdd07fab1,	0xf2dd3f15,
-0xf924720b,	0x0047adff,	0x3935bd42,	0xde1d799f,
-0x03a4afd9,	0x4f0ea217,	0x5f3dd4df,	0x09f611a1,
-0x8ecf894c,	0x5111dde5,	0xd79db940,	0x4e2da85d,
-0x64622e3d,	0x00ed0f85,	0x192b2af6,	0x526fcc87,
-0x3e233c92,	0xdfa9d04d,	0x5a8a7d19,	0x18205eef,
-0x3ff5734e,	0xf3ba744e,	0xac73c051,	0xc2cf8a70,
-0x3ba41433,	0x123eb210,	0xe3f05134,	0xcfd54fd8,
-0x7995e0d1,	0x1760b323,	0x310a7810,	0x2706d0c8,
-0x15cf732d,	0x3c0ee597,	0x83e36338,	0x272058a7,
-0xff3e9fda,	0x0c22fe44,	0x11a26627,	0x061a17a0,
-0xd784b930,	0xb40ed3ca,	0x014eaa98,	0x2cfd7ef7,
-0xd3f700a6,	0xa2e0e5ad,	0xf6682e43,	0xbab69f7a,
-0x185c3430,	0x10a4a66d,	0x41698b7a,	0x89666812,
-0x1cdc431a,	0x301a8774,	0x056fa032,	0x08e5b4ac,
-0xd8e66808,	0x06cb04c2,	0x086f09ef,	0x09404e44,
-0x4b166a00,	0x1f244ff1,	0x096548b7,	0x3d066268,
-0x11c22583,	0x87d98b53,	0x83c785d8,	0x0c295204,
-0xa3693e8d,	0x8ca5c952,	0xa52c8190,	0xa9ac34de,
-0xe640e56f,	0x16d5715c,	0xf40bac7c,	0x940d757e,
-0x0955d322,	0xbd3e2f65,	0x6553293f,	0x0b25fcb7,
-0x14875a5e,	0xb5efd0af,	0x79cf151f,	0xa74e5acb,
-0x4b249263,	0x14a844ff,	0x4c547880,	0xb598f6b8,
-0xe9fffbc6,	0xe983f09b,	0xa5384013,	0x36baf1e7,
-0xe3a76c06,	0xde3df31a,	0x25d38aaa,	0xc19d9fa9,
-0x2c05457a,	0x0a4fd8f6,	0x01086f65,	0xdf7e10b3,
-0xa5f16786,	0x46d77f4a,	0x08336cd2,	0x1d06cb5f,
-0xe453696c,	0x6f662a90,	0x40d33558,	0x76c640d5,
-0x4e7e4c97,	0x10cb0f79,	0xb1cfbb1c,	0x4f3f0521,
-0x8cda32ee,	0x84c3e958,	0xaac41cc9,	0x023e7572,
-0xf3266bf6,	0xb4193d39,	0x3a31f7df,	0xbd83c248,
-0xc812df3c,	0x0af7f510,	0x82bb61f9,	0x95db6415,
-0xf7b12fa8,	0x7a7f4f9c,	0x2ec8f061,	0x3fa8e99c,
-0xc19bea78,	0x470c4315,	0x0bcf3abe,	0x787b97b7,
-0x78f992b4,	0x05a7b74c,	0x93fc4db2,	0x41094fe3,
-0x3e7fe41b,	0xa367bc2d,	0x90b393db,	0x3ec58fe0,
-0xb74cc79f,	0x9ed83f74,	0x10daeeae,	0xa524f1ac,
-0xafcd0f29,	0x11423945,	0x52319e75,	0x9978031d,
-0xa78bb8be,	0x1a8a86d8,	0xf9a5c6db,	0x15d9760b,
-0x00028056,	0x2d0f7fc3,	0x7734d88a,	0x1b877e63,
-0x7b1db862,	0x25037d9d,	0x5a210d59,	0x1875f3e4,
-0x0299248c,	0x90ae4f18,	0x949d7d41,	0x713deba7,
-0xa6ff8ffe,	0x243c5296,	0x6020828d,	0xe420ae82,
-0xf02eeda6,	0x3a8090e3,	0xaef23b89,	0x40d2cb8a,
-0xaaddddad,	0x220c269f,	0x288d2d4e,	0x8689e116,
-0x42de5c86,	0x95ff5e35,	0xdcaabe42,	0x3fbb05e5,
-0x4ade7e4b,	0xd6612d65,	0x44ad598c,	0x984eeabb,
-0x218696b2,	0xf9c83206,	0x881e3b4e,	0x54844f30,
-0x1f980f2a,	0x0aec3158,	0xdd92450c,	0xb8a3906d,
-0x0ccc7c23,	0x196b48db,	0x08ffaef9,	0x2c44b86d,
-0x05fcc149,	0x079869d4,	0x5f3f5d0b,	0x1086de9f,
-0x638432c5,	0x1dbe89c0,	0x882041a8,	0x05a6756a,
-0x306e76ea,	0x49ad9a0d,	0xbc24d1a9,	0x2a113e7d,
-0x75f3c2fd,	0x48a08a9f,	0x49629224,	0x78bc1e06,
-0x6cf37a29,	0x350cf5be,	0x44139fa4,	0x8d46fe52,
-0xab806472,	0x942992a6,	0xd17e2f91,	0xe2141f73,
-0xfa427c43,	0x8faa955f,	0x1a46e5e1,	0x3565549d,
-0x614a5a2f,	0xce97ff83,	0x11c7054c,	0x079587e3,
-0x08c226bb,	0x33d4dfc4,	0x01e29a03,	0xfe8383f7,
-0x4896c322,	0xc2b8bf34,	0xeb519cd8,	0x87a369b6,
-0x2896c199,	0xf31cda89,	0x95882efc,	0xcf69e53c,
-0x27fbdd3b,	0x8491be72,	0x866ba50e,	0xf63845c1,
-0x74862a52,	0xd27ee1ad,	0xa20b324c,	0x34481857,
-0x7d154913,	0xcdfaf533,	0x86c43d02,	0x84a53719,
-0xc686aeaa,	0x3b1c1991,	0xd2757700,	0x7c0300e5,
-0x9a79cf8b,	0xb5cf5135,	0xa515be91,	0xde62d956,
-0x15075fe1,	0x50e9c78e,	0x4b411050,	0x03e28d50,
-0xe86bf955,	0xc760da3c,	0x9c1645d7,	0x29f8de00,
-0xe2905e2f,	0x3755c59e,	0x2c2a0a58,	0xd4f48945,
-0x78f6c3c5,	0x3d7ca7ef,	0xf3bf6b34,	0x6a42e9df,

cpu/intel/model_f0x/microcode-m04f0a14.h

diff --git a/cpu/intel/model_f0x/microcode-m04f0a14.h b/cpu/intel/model_f0x/microcode-m04f0a14.h
deleted file mode 100644
index ea23166..0000000
--- a/cpu/intel/model_f0x/microcode-m04f0a14.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m04f0a14.inc  */
-0x00000001,	0x00000014,	0x07162002,	0x00000f0a,
-0x64731550,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xffffffe9,	0x80e0e61a,	0x7cb2c607,	0xbe1e2fc9,
-0xacaf1526,	0x31514e28,	0x9252d426,	0xb999ebf8,
-0x8469bb8a,	0x95e72fd2,	0x5f7c5472,	0x254adcf0,
-0xf706b236,	0x21ef3efb,	0x82d05526,	0x8b10bd77,
-0x268ab8bd,	0x929739a5,	0x0f180e02,	0x3ad1cc5a,
-0x23a10814,	0xbc4257f8,	0x026ded8d,	0x84bf45be,
-0xe13e69f3,	0xbb0edf16,	0x85218fd2,	0x898af4e1,
-0xcd635f26,	0x846ab0c6,	0x85a5d5cd,	0x077b4a16,
-0x71514de0,	0xbff893a6,	0x47536ab0,	0x1fc4b546,
-0x906f4b85,	0xc1f997d5,	0x0ba4b594,	0xa823eb50,
-0x416ee239,	0x659b0dbd,	0xf240ad67,	0xe042d532,
-0xce92f455,	0x9f318d9f,	0xac11fada,	0x6fc234ab,
-0x18cddb76,	0x67e52b4f,	0xa6f01943,	0xba695e2a,
-0x245bd123,	0xce05288f,	0x6582101b,	0x5be73a23,
-0x6ab67d0e,	0x873ac6f3,	0xab4c48f2,	0xe0d64284,
-0x65f33ddb,	0xd33abb56,	0x8dd411c3,	0x86f370ea,
-0x1c3726b9,	0xd561edb5,	0xa0484b79,	0x63bdccd0,
-0x54d42183,	0x05d9b9c2,	0xd1d2e489,	0x572f0b07,
-0x6b804808,	0x9ee441c8,	0x87e1e425,	0x0d4d3c3e,
-0xbb9188fd,	0xa7f1243b,	0x807be6fb,	0x8f828057,
-0xfe37dd84,	0x104ef504,	0x5aa650b4,	0x2f1b611f,
-0xd021e808,	0x1d4ca877,	0xdefabd4d,	0xaa0cbe35,
-0xa4e89854,	0xa880cfc1,	0x08ed71f1,	0xb58e8625,
-0x2f4bee9d,	0xfef8678d,	0x2868ade1,	0xcdd1c7a4,
-0x2b823a15,	0x4788ea69,	0x7a1de61f,	0x24a51210,
-0x4373e00c,	0x7f8e55c9,	0xb2c5092b,	0x74f9e0db,
-0x2f54f62d,	0x13e3b1c8,	0x835863dc,	0x7401feb0,
-0x82d9962c,	0xc321a358,	0x8db3eec1,	0x3d70aa8a,
-0x9e8d115a,	0xd1f258ce,	0x3db0262c,	0xdedf4ecf,
-0x2b43787d,	0x01bba4ab,	0x5533bfb0,	0xf25756a2,
-0x6748ff85,	0x49a04cf9,	0x15a3fceb,	0x2b0045b1,
-0x354d82dd,	0x51baaaae,	0x9cdb8826,	0x4a5e79d5,
-0xc0b783a0,	0x244ee819,	0xc9d7ec82,	0x61b5df6b,
-0xa3b0ab47,	0xf4201580,	0x16a9bda3,	0x2ac3fb2a,
-0xf2d45287,	0xc775c470,	0xca49165e,	0xf011aa96,
-0x7cc3f776,	0x128e7d4c,	0x53a7cb48,	0xc678c16a,
-0x704d85ff,	0x5ac3438c,	0x22a4255f,	0x06f4eb73,
-0x6d2c4918,	0x7ec8d353,	0x02f64898,	0x402caba1,
-0xa2dcd74c,	0x2ec84768,	0x19aaacb3,	0x641e9f60,
-0x610245fb,	0xbcde5b34,	0x5b2ad9e6,	0x26d2e619,
-0x3c5f7fc3,	0x8a4644e1,	0x6cc1f8fb,	0xb2ec0e52,
-0x02186480,	0x1c597a86,	0xea7cb92f,	0x8484972d,
-0x90f10aef,	0x7032ba2f,	0x8d51693a,	0x075f7010,
-0xef88324e,	0x5fbf378f,	0x1416ae8a,	0x5eac1f31,
-0x70e65677,	0x0224e031,	0x1305f1ac,	0x53209b14,
-0xb5037676,	0x99e958fb,	0xecb8fe97,	0x20fb5890,
-0x568e98e9,	0x87d42ce4,	0x03de50e2,	0x89728dac,
-0xdca95447,	0x36114e7b,	0x2aab8e7a,	0xa0529d9c,
-0x9901c79d,	0x4ff191b5,	0x7500cebf,	0x210bcc07,
-0x815fd1e8,	0x4ebd3be0,	0xbce22cf0,	0xcf2df323,
-0xfffa8eb1,	0x016b1ca2,	0xf87846a6,	0xddbf1474,
-0x435c41b5,	0x56245808,	0x050eace9,	0x128491f7,
-0x48c6fdda,	0x5775ded7,	0x0b4775a1,	0x7ce11409,
-0x0d9822a0,	0x084ca742,	0x8f2c8c8b,	0x4278fdfc,
-0xe45d26c7,	0xd92793fb,	0xe963acf5,	0x346473ea,
-0x28069586,	0xcd7423ab,	0xdd07fab1,	0xf2dd3f15,
-0xf924720b,	0x0047adff,	0x3935bd42,	0xde1d799f,
-0x03a4afd9,	0x4f0ea217,	0x5f3dd4df,	0x09f611a1,
-0x8ecf894c,	0x5111dde5,	0xd79db940,	0x4e2da85d,
-0x64622e3d,	0x00ed0f85,	0x192b2af6,	0x526fcc87,
-0x3e233c92,	0xdfa9d04d,	0x5a8a7d19,	0x18205eef,
-0x3ff5734e,	0xf3ba744e,	0xac73c051,	0xc2cf8a70,
-0x3ba41433,	0x123eb210,	0xe3f05134,	0xcfd54fd8,
-0x7995e0d1,	0x1760b323,	0x310a7810,	0x2706d0c8,
-0x15cf732d,	0x3c0ee597,	0x83e36338,	0x272058a7,
-0xff3e9fda,	0x0c22fe44,	0x11a26627,	0x061a17a0,
-0xd784b930,	0xb40ed3ca,	0x014eaa98,	0x2cfd7ef7,
-0xd3f700a6,	0xa2e0e5ad,	0xf6682e43,	0xbab69f7a,
-0x185c3430,	0x10a4a66d,	0x41698b7a,	0x89666812,
-0x1cdc431a,	0x301a8774,	0x056fa032,	0x08e5b4ac,
-0xd8e66808,	0x06cb04c2,	0x086f09ef,	0x09404e44,
-0x4b166a00,	0x1f244ff1,	0x096548b7,	0x3d066268,
-0x11c22583,	0x87d98b53,	0x83c785d8,	0x0c295204,
-0xa3693e8d,	0x8ca5c952,	0xa52c8190,	0xa9ac34de,
-0xe640e56f,	0x16d5715c,	0xf40bac7c,	0x940d757e,
-0x0955d322,	0xbd3e2f65,	0x6553293f,	0x0b25fcb7,
-0x14875a5e,	0xb5efd0af,	0x79cf151f,	0xa74e5acb,
-0x4b249263,	0x14a844ff,	0x4c547880,	0xb598f6b8,
-0xe9fffbc6,	0xe983f09b,	0xa5384013,	0x36baf1e7,
-0xe3a76c06,	0xde3df31a,	0x25d38aaa,	0xc19d9fa9,
-0x2c05457a,	0x0a4fd8f6,	0x01086f65,	0xdf7e10b3,
-0xa5f16786,	0x46d77f4a,	0x08336cd2,	0x1d06cb5f,
-0xe453696c,	0x6f662a90,	0x40d33558,	0x76c640d5,
-0x4e7e4c97,	0x10cb0f79,	0xb1cfbb1c,	0x4f3f0521,
-0x8cda32ee,	0x84c3e958,	0xaac41cc9,	0x023e7572,
-0xf3266bf6,	0xb4193d39,	0x3a31f7df,	0xbd83c248,
-0xc812df3c,	0x0af7f510,	0x82bb61f9,	0x95db6415,
-0xf7b12fa8,	0x7a7f4f9c,	0x2ec8f061,	0x3fa8e99c,
-0xc19bea78,	0x470c4315,	0x0bcf3abe,	0x787b97b7,
-0x78f992b4,	0x05a7b74c,	0x93fc4db2,	0x41094fe3,
-0x3e7fe41b,	0xa367bc2d,	0x90b393db,	0x3ec58fe0,
-0xb74cc79f,	0x9ed83f74,	0x10daeeae,	0xa524f1ac,
-0xafcd0f29,	0x11423945,	0x52319e75,	0x9978031d,
-0xa78bb8be,	0x1a8a86d8,	0xf9a5c6db,	0x15d9760b,
-0x00028056,	0x2d0f7fc3,	0x7734d88a,	0x1b877e63,
-0x7b1db862,	0x25037d9d,	0x5a210d59,	0x1875f3e4,
-0x0299248c,	0x90ae4f18,	0x949d7d41,	0x713deba7,
-0xa6ff8ffe,	0x243c5296,	0x6020828d,	0xe420ae82,
-0xf02eeda6,	0x3a8090e3,	0xaef23b89,	0x40d2cb8a,
-0xaaddddad,	0x220c269f,	0x288d2d4e,	0x8689e116,
-0x42de5c86,	0x95ff5e35,	0xdcaabe42,	0x3fbb05e5,
-0x4ade7e4b,	0xd6612d65,	0x44ad598c,	0x984eeabb,
-0x218696b2,	0xf9c83206,	0x881e3b4e,	0x54844f30,
-0x1f980f2a,	0x0aec3158,	0xdd92450c,	0xb8a3906d,
-0x0ccc7c23,	0x196b48db,	0x08ffaef9,	0x2c44b86d,
-0x05fcc149,	0x079869d4,	0x5f3f5d0b,	0x1086de9f,
-0x638432c5,	0x1dbe89c0,	0x882041a8,	0x05a6756a,
-0x306e76ea,	0x49ad9a0d,	0xbc24d1a8,	0x2a113e7d,
-0xdf53ea5f,	0x420a2194,	0x49629224,	0xb9bb75e9,
-0x72258daf,	0x1eb90fe8,	0xf9439af0,	0x402b7c8f,
-0x4994bf4f,	0x70620662,	0x9a6981d3,	0xcd5e28e3,
-0xadd1673c,	0x4914c072,	0xc7173eaf,	0x6027e504,
-0x2398e683,	0xd095d218,	0xca775065,	0x019f8a00,
-0x4a0eea46,	0x7b31d964,	0xdf392c14,	0x8ce173c6,
-0x6395a8a4,	0xcc11282e,	0xbaca1acd,	0x810a079d,
-0x3a3d48c6,	0x8368b975,	0x35d4f800,	0x1144a108,
-0x2bce5a1b,	0x8b5fd002,	0xd9240882,	0xba73d873,
-0xdb3c7feb,	0x1d8755c3,	0x5933a76f,	0x309afa30,
-0x2b4c22e3,	0xa283f4de,	0xb1702590,	0x7e644fc1,
-0xd5510885,	0x0e14fb98,	0x91e3912d,	0x32d33a71,
-0x4665a82c,	0x5c1ff27b,	0xf44a1fbe,	0x58af67ec,
-0x1a448167,	0x2384ef77,	0xfa605bb2,	0x125db403,
-0x73ca61a9,	0x5cab2971,	0x7c8d471e,	0x0425bdd8,
-0x1f5a3268,	0x0f512485,	0x5b27cc48,	0x0e2839bd,
-0x056fda54,	0x383a2b7c,	0xa5e6f401,	0x5773b15d,

cpu/intel/model_f0x/microcode.bin

diff --git a/cpu/intel/model_f0x/microcode.bin b/cpu/intel/model_f0x/microcode.bin
new file mode 100644
index 0000000..662f975
--- /dev/null
+++ b/cpu/intel/model_f0x/microcode.bin
Binary files differ

cpu/intel/model_f0x/microcode.h

diff --git a/cpu/intel/model_f0x/microcode.h b/cpu/intel/model_f0x/microcode.h
deleted file mode 100644
index 1f5027b..0000000
--- a/cpu/intel/model_f0x/microcode.h
+++ /dev/null
@@ -1,6 +0,0 @@
-
-#include "microcode-2f0708.h"
-#include "microcode-m01f0712.h"
-#include "microcode-m01f0a13.h"
-#include "microcode-m02f0a15.h"
-#include "microcode-m04f0a14.h"

cpu/intel/model_f1x/microcode-m04f122e.h

diff --git a/cpu/intel/model_f1x/microcode-m04f122e.h b/cpu/intel/model_f1x/microcode-m04f122e.h
deleted file mode 100644
index f6724aa..0000000
--- a/cpu/intel/model_f1x/microcode-m04f122e.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m04f122e.inc  */
-0x00000001,	0x0000002e,	0x05022003,	0x00000f12,
-0xb2548d0a,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xffffffe9,	0xe6b36263,	0x6f9eaf78,	0x632770bd,
-0xb11f8920,	0xbc42e776,	0xbd797134,	0x9768e716,
-0x1dce3da1,	0xe0dbe21b,	0x30349ee3,	0xb0aae4c6,
-0x1591358e,	0x6646707a,	0x147f6ddc,	0x639c59e3,
-0xed11c0d6,	0x2707c252,	0x8053be8a,	0xb432051c,
-0x941732da,	0x80e55dca,	0xf389d8f4,	0x738a68e3,
-0x85f7042d,	0xe1904f35,	0x1e2e7f3d,	0xf1d4b55d,
-0xf9829802,	0x0b8d6394,	0x252d74ca,	0x7b6a0be4,
-0x13ec2030,	0x7d8c3429,	0x32380fdb,	0xb595854c,
-0x6ab18d3b,	0xfe241438,	0x79ee3c90,	0xf7c80ed2,
-0x9735dffb,	0xbba18676,	0x2687be0c,	0x9fb2e5ef,
-0x28f85fb1,	0xea0b3223,	0xf1e3f263,	0xffd47414,
-0x86a09efc,	0x3b23b61f,	0x03600e24,	0x0f59519b,
-0x8868d3b5,	0x1cd3ddcd,	0x174364a6,	0xced7c4ea,
-0x637cf55d,	0xab80c838,	0xb2ccd05c,	0x968f8d6f,
-0x77f66b77,	0xdf34ebcb,	0xfece6f5e,	0xb819e030,
-0x1d73c1d0,	0xf6d86e15,	0xfed82c81,	0x4ac93249,
-0x4358711e,	0xe558a942,	0xc19f602c,	0x3d51db79,
-0xbc5b9f59,	0x1dcbf598,	0x09326724,	0xae712704,
-0x686bb2d8,	0x8cb848bf,	0xd1f00d90,	0x6cebdd80,
-0xe9827e3b,	0x7ffc9a62,	0x52851c33,	0xd9f6d8b7,
-0x89294625,	0x5cc9e522,	0x416df615,	0x7b4b8c1d,
-0xa819df83,	0x458483f8,	0x12c2a1c8,	0x3219f4be,
-0x20a99f23,	0x30c8cb2b,	0x0284107f,	0xcaf74794,
-0x3b8408e5,	0xe3915f05,	0xfe89b7f1,	0x3b30f859,
-0xf6c214a4,	0x53ea7021,	0xf1ae6ce6,	0x300771c2,
-0x7c769103,	0x59c4f9ec,	0x954321c1,	0x0010217c,
-0x60f87712,	0x9531a33c,	0x6516e8b2,	0x7e6af0e1,
-0x159c0a30,	0x5c0df59b,	0x2763d9c5,	0xc5c08122,
-0x80be5172,	0x96d9c015,	0x227f4d84,	0x104ad707,
-0x7cd7de50,	0xc58e569a,	0xd2129ffd,	0xe9afedf3,
-0x61e19908,	0xecd27e20,	0x36ef4ae8,	0xcda53aff,
-0xdfbd8a65,	0xaad6eef6,	0x3720e8cb,	0x061f85c6,
-0x60643ad4,	0x0e3cd18c,	0x9d19ec4f,	0xec94bb30,
-0x9f53ebe5,	0x3f591c58,	0xdb015450,	0xade7e0c7,
-0x305be3b2,	0x4cb29bc5,	0x7b57cbb4,	0x3aa89078,
-0xfbe6e43d,	0x0b761e6e,	0xed8b5baf,	0x3b4e756d,
-0x6a148c9f,	0x1a3a01a8,	0x1d33ac7a,	0x3e3dd3e2,
-0xbfb4392c,	0xca1ce690,	0xd1af4a34,	0xa931d9c3,
-0xa86836be,	0x34d86f8a,	0x21cb75f0,	0x37c152a4,
-0x95b9c9a4,	0xc30f3c29,	0x1b821c8e,	0x637851df,
-0x069cc4f8,	0xd88ead11,	0xf5f5728d,	0x1b0ffed7,
-0xfd846742,	0xf76f607d,	0x5d8a4740,	0xad48d963,
-0x6a9ffcc0,	0x1b320e79,	0xc49b22c3,	0xde2c0048,
-0x5fcaddfe,	0x708e63ca,	0x294d5d69,	0xa3dce328,
-0xb847b4d2,	0x611c0a2b,	0xcd4513c8,	0xfa1bfa75,
-0x45ca8ca2,	0x3681b381,	0xc27f6c94,	0xcd958d01,
-0x7b55386f,	0xa4b2c59c,	0xaa58ef1f,	0x752c6c71,
-0xdd97125c,	0xdfc2881a,	0xb9d5036e,	0x5148d9ff,
-0x24e6b06d,	0x8390116a,	0xea6d4d44,	0x7378ffef,
-0xd1833cf6,	0x3415528c,	0xcf3622fe,	0x76729d17,
-0xcd1ba4ad,	0x1885ed72,	0xde02375a,	0xa49131ff,
-0x3be6df31,	0x6cf2c534,	0x90aacc16,	0xa2eda106,
-0xa7aaecef,	0x5831a9fd,	0x5f142437,	0xaf30f7fc,
-0xc8f6cdab,	0xda69d12d,	0x5871249f,	0xc011e372,
-0x33c8e75d,	0x8087d9fb,	0xc595c587,	0x9cc36c3e,
-0x676b2c58,	0x4f242c1b,	0x6b77d07c,	0xa1c8543b,
-0x2824e9c7,	0x84be15a4,	0xc0b4a308,	0x0e41511b,
-0xfaf3dbbe,	0xc1777e7b,	0x199d042b,	0xb0b35558,
-0x9bf8cb58,	0xf68d5c43,	0xf359b550,	0x993d82d1,
-0xa8388458,	0x56d3c256,	0x11cbc33f,	0x3c28a56f,
-0xe6aa09f9,	0xd41f6c39,	0x11020cd2,	0x985c89db,
-0x3705b46f,	0xaf90c2dc,	0xf7ecfc96,	0x355eee96,
-0x078e9048,	0x2fd05bf1,	0x48eab9e0,	0xafaab712,
-0xcf0c3e12,	0x8095ae6d,	0x8364131e,	0x7221ba38,
-0xad0e42d6,	0x20741356,	0x8698ad29,	0x024d1baf,
-0xb87c4a77,	0xa4169a47,	0xa487c4c8,	0x966a2b68,
-0x9821bace,	0xe64b1014,	0x22eda535,	0x4cc48e4e,
-0xb1a80833,	0x0e9ec179,	0xf6bb1c55,	0x95489311,
-0xefe8a663,	0xc4cf14f9,	0xe3591c5d,	0x86c3c61b,
-0x9fe18d90,	0x3b75ff1b,	0x5ca3d992,	0x8c072f42,
-0xecf16b8e,	0x672b72c7,	0x4603e497,	0x45e015d4,
-0xd918406b,	0x4f25a635,	0x5feb56b4,	0xf9f94d06,
-0x7bd31a73,	0x1ab03fc0,	0xb85fdbd8,	0x4c3e81d9,
-0xefc2c666,	0x59a7afcd,	0x8a02428a,	0x73af7adb,
-0xd8ea36e0,	0x991a6fd9,	0x7f9c2019,	0x2d3a85d6,
-0x8f3295c0,	0x93809471,	0xa5d313f5,	0x8cd5ea3b,
-0x7b982971,	0x5e4f0172,	0xcedcb6e6,	0xea24e209,
-0x8a46f8b2,	0x74331527,	0xd77ed523,	0xaba69d6a,
-0xebd38b4b,	0x04c01b27,	0xcf51542c,	0x25e75d87,
-0x69f4e24a,	0xeb1c3f81,	0xdd4508da,	0x0cc85856,
-0xd006d573,	0x79a7c5cb,	0x1cc2e951,	0xd1ac0710,
-0xa78fbeba,	0x90877b5f,	0x7972ab18,	0xd866ac15,
-0xc287620f,	0x54fdeb69,	0x9c2d264f,	0x6c2e6ff9,
-0xa12c2962,	0x87f99490,	0x5a9f5f5c,	0x5fd88f09,
-0xf6b7e966,	0x02abc4f2,	0xde5eddd1,	0x6ccd06e7,
-0x7747ee88,	0x9bc9622a,	0xb807d839,	0x1d14fe6b,
-0x1c4676e8,	0xb9add7e1,	0x5a84fc84,	0xa0d232ab,
-0xf09b95a0,	0xbd7481db,	0x9f68639a,	0x4870d114,
-0x60ebc8a5,	0x42d4d24b,	0xf64d2815,	0xaab0da5f,
-0xcba7f41c,	0x44dcd89b,	0x613d50e6,	0x180e700c,
-0x18a6bdad,	0x54883f08,	0xa0a9fc4b,	0x9af3ec0b,
-0xba3f74f2,	0x9469aa23,	0xc89de01e,	0xe7963adb,
-0x8cb13661,	0xdbbd276c,	0x42e113df,	0x4947dfd7,
-0x513cc410,	0x57c6db1c,	0x8911377d,	0x01405fa9,
-0x7163e406,	0x995a0db3,	0x2e9b208b,	0x4c77dfbc,
-0x33f30f4c,	0x5aad99da,	0xcca61b32,	0x027fa2ce,
-0x2b5387aa,	0xafca9d2b,	0x7fbe4c67,	0xee92fc72,
-0xc3857c05,	0x5e425769,	0x4ae6558f,	0x499427f8,
-0x15900b70,	0x3aae1260,	0xa7bfc2a1,	0xdfa73e71,
-0x8b79b206,	0x6552c432,	0x56b81866,	0x86d6e834,
-0x91685add,	0x7c34051c,	0x4ef8db74,	0xbab855ee,
-0x083ab156,	0xc82a579d,	0xec1e3ae3,	0xdfea24a6,
-0x9554ee6e,	0xd53b8bd1,	0x9a4bda63,	0x884e86e5,
-0x9acf4763,	0x540b9ded,	0x5fde4bca,	0x541d2dd4,
-0xc5637486,	0x5fdfc527,	0x6cc50628,	0xc701a605,
-0x7fba696e,	0x053a6cd0,	0x3796571c,	0xd11ec6f6,
-0x2a653ec1,	0x69a1ade5,	0x16171235,	0x3aa406c1,
-0x825d106f,	0xb2f62dd2,	0x5aa895d9,	0xac55d308,
-0x3f01278d,	0xb6153d8a,	0x98cc1fa3,	0x65327e2d,
-0x7dd8e033,	0x9c399398,	0x94a8f0ba,	0x4336f0e7,
-0x87f425fd,	0x8f1d3e0d,	0x05ff65d4,	0xe4a1a06a,
-0xf5dd16e6,	0xc4bcdc31,	0x363f2b98,	0xcd01dfec,
-0x442c1d49,	0x3a5cb899,	0x0ea2945e,	0xa91470dd,
-0xb629ae00,	0x2a25ffd7,	0xaf24dcea,	0x4bf22512,
-0x2f4c1a13,	0x9d76a33e,	0x28a3e7b7,	0x17ea3463,
-0x0a831542,	0x1ae4a98a,	0xcc8066c9,	0x51b4e2a1,
-0xa030bf19,	0xa19596da,	0xe0e5af95,	0x86a6f7a4,
-0x6f51d56f,	0xed2d0511,	0x31a1430c,	0x6a9fd0d7,
-0x481515f9,	0x423cb82a,	0x3811455c,	0x475610cb,
-0xdecb5b82,	0x52bd1ebe,	0x3373db79,	0xdc7c458d,
-0x462cf8cc,	0xfe353c25,	0x91dc7f41,	0x60b84709,
-0xc29de95b,	0x97acf20e,	0xdba91f15,	0xbb26e2cd,
-0xbb150856,	0x5683c1cf,	0x6bc7ffbf,	0xa00deea3,
-0x5a1c103d,	0x2b0d6b33,	0x241c3306,	0xf86d7e81,

cpu/intel/model_f1x/microcode.bin

diff --git a/cpu/intel/model_f1x/microcode.bin b/cpu/intel/model_f1x/microcode.bin
new file mode 100644
index 0000000..a789e0d
--- /dev/null
+++ b/cpu/intel/model_f1x/microcode.bin
Binary files differ

cpu/intel/model_f1x/microcode.h

diff --git a/cpu/intel/model_f1x/microcode.h b/cpu/intel/model_f1x/microcode.h
deleted file mode 100644
index abf1d44..0000000
--- a/cpu/intel/model_f1x/microcode.h
+++ /dev/null
@@ -1,2 +0,0 @@
-
-#include "microcode-m04f122e.h"

cpu/intel/model_f2x/microcode-m01f2529.h

diff --git a/cpu/intel/model_f2x/microcode-m01f2529.h b/cpu/intel/model_f2x/microcode-m01f2529.h
deleted file mode 100644
index de99b61..0000000
--- a/cpu/intel/model_f2x/microcode-m01f2529.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m01f2529.inc  */
-0x00000001,	0x00000029,	0x08112004,	0x00000f25,
-0x2795ba4b,	0x00000001,	0x00000001,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x017464fa,	0xd2fb3494,	0xaf1850af,	0x5af88989,
-0xd3a0a9dd,	0x8e8bd3ad,	0x8c288786,	0xf15f02b0,
-0xf51c1471,	0x6c675200,	0x9c63f3e5,	0xbeb2d710,
-0xbfb6d14e,	0x6ba07894,	0x4b08036d,	0x71a24d5a,
-0x953125c3,	0x2cee5c1f,	0x744a15b1,	0x43a6f67c,
-0x66087dce,	0x58bc5f0c,	0x09c1f187,	0x29065a8c,
-0xb46dcc30,	0x597c4675,	0x2ce2fd55,	0x7329e04a,
-0xe92adf75,	0x0a4f1f59,	0x6939b7e1,	0x586b6cb9,
-0x9e9090f2,	0x612aeaa6,	0x908cfbac,	0x381a3a1d,
-0xc0028180,	0xe7759a09,	0x9a41f6d0,	0x49004723,
-0x447b0a1e,	0x84cea1bf,	0xdb6cfd61,	0xfa3fe8a1,
-0x60569cec,	0x4ed55542,	0xc40d1fbb,	0x9766fe4a,
-0xbffcd59e,	0xc0ec45af,	0x34da2fa6,	0x57a8f38b,
-0x7cf8ab33,	0x991f0a4b,	0x83c635f3,	0xfaa6b412,
-0xd6cfe7cd,	0x7eb7773c,	0xda12abb8,	0xae7f78c6,
-0x0c82ad31,	0x28e15d48,	0x80a0cf1e,	0x6b8a9a75,
-0x1a9aa64f,	0x4a2969ee,	0x9273d48d,	0x7179df33,
-0x06fc27f8,	0x7de9a40b,	0xaaa80cac,	0x83d82561,
-0xe0646103,	0xa72284fa,	0xb39b5822,	0xed08ed9d,
-0x95760781,	0x2f84666f,	0xd1d45bed,	0x96a86c3a,
-0xe4679e8a,	0xfa71d608,	0x86baebc4,	0xf116edb0,
-0xd3a7263f,	0x237b4f06,	0x794f33e6,	0x0d783309,
-0x2df3bb25,	0x02a800b8,	0x97b8ce5a,	0x2123dc61,
-0xee1a5dbe,	0x185cf436,	0x84e325f6,	0x163e3ac3,
-0x62288e57,	0xe5901f0f,	0xef985c3e,	0x1b9291fe,
-0xb58de2b0,	0xe69eeadb,	0x42eefa7f,	0x0472359e,
-0xb1fd90dc,	0x49d374d3,	0x49684482,	0x1156a2ac,
-0xd0a6114a,	0x995f94a6,	0xbcf9ed4f,	0x51d161c3,
-0xcc68e39f,	0x3d050ca9,	0x8cd08b93,	0x6ed69d22,
-0x5fd5cc93,	0xe2783743,	0x5a1816c3,	0xda5a0ea4,
-0x9b5c7903,	0xc25d6a23,	0x25cd54ee,	0xe1ab0174,
-0x518ffebc,	0x28125044,	0x7ff130d8,	0xfbea3a8d,
-0xe093582b,	0xf60baa3d,	0xe4674a15,	0x18a6322c,
-0x21cfa3bf,	0x71a1a376,	0xdd4de139,	0xed578831,
-0x0ab06a62,	0x9cee036d,	0x11ee0350,	0x62ee22d0,
-0x83681acb,	0xef69ded4,	0x65000a40,	0x9ac7ab74,
-0xd76792db,	0xf2e662f2,	0xdcae14a5,	0xfa39ba60,
-0xf746cf70,	0x0bea4f1b,	0x9b384717,	0xf8dafd90,
-0xb2ffc2ab,	0xf3fa97e4,	0x5f22e0c3,	0x04536e9d,
-0x22c99598,	0x34631815,	0x9fc99bfa,	0xfe067ae7,
-0x03fbd87a,	0xdc73bcd2,	0xc49a0fbc,	0x3138c419,
-0x62643c63,	0xfa2597c7,	0x4c84afef,	0xdba2817e,
-0xe818ed14,	0x74a5ad6b,	0x9cf3ced5,	0xf633dd12,
-0x4ba39a46,	0x8b37b668,	0x65637f55,	0x67c7ce04,
-0xe860a2e3,	0xf264ba03,	0x47b91726,	0x887f4d41,
-0xb10685e0,	0x95958791,	0xcb835bbc,	0xf1af6594,
-0x42fb5a5b,	0x78ff5368,	0xb201a575,	0x8a6b189c,
-0xc3f6e3a0,	0xe2bb320e,	0xd75004dc,	0x735b0c3b,
-0x70ccd09f,	0x4d157775,	0xc0663e58,	0xf2170355,
-0x4d86c74b,	0xace253a3,	0x09fedbf3,	0x5288ffb6,
-0xc577a648,	0xf808ffc9,	0x6f1b81ee,	0xa56d4123,
-0x60626a1b,	0xc88b4d17,	0x280e44c5,	0xf56c8ddd,
-0x9110c257,	0x2d65519d,	0xc96c1ad5,	0xcfdea3e5,
-0xa69ea62f,	0xf3ed57ab,	0xbe725f8c,	0x2e3c86df,
-0x23635626,	0x7d2607f6,	0x67fe2874,	0xe64ade4d,
-0x5fe967da,	0x88cb5547,	0x468c3eb5,	0x73313404,
-0x36b6cc3f,	0xf352d0fc,	0xcbd702bd,	0x969a1606,
-0xead2f56d,	0xf4c93dd8,	0xd2395873,	0xe5304e3c,
-0xdbe3e804,	0x1daf81c0,	0xfd6cbdac,	0xfbb07447,
-0x1970d752,	0xff97a936,	0x1cf114a2,	0x03b678d5,
-0x6edaacf8,	0xd4a869c9,	0x6db6f5fa,	0xe48335d1,
-0x6c59f701,	0x2cd977a6,	0x02079375,	0xc573f27b,
-0xd26f8f28,	0xe637b462,	0xb9ef5a9d,	0x2483a550,
-0x8e020039,	0x01d2e9d0,	0x8e69c688,	0xfbf941b7,
-0x86dcab40,	0xe99730b6,	0x0e57bd5d,	0x11ace616,
-0x3a5c73dd,	0xe29052c6,	0x6728d6e3,	0xf5a73743,
-0x6ef89691,	0xffa40f45,	0xd1a1b739,	0xf12697be,
-0xfc849142,	0x1a6daa37,	0xc52c54a3,	0xe600bbb2,
-0x6c90e1e9,	0xf9ba4ed6,	0x118b0436,	0x0d864deb,
-0xa574b526,	0x6f2da0ae,	0x7297e467,	0xe33a4e82,
-0x6e8a340f,	0x9524f758,	0xb7d9d387,	0x67ed6069,
-0x3fcef9be,	0xf3684381,	0xb8012434,	0x86d3a9a9,
-0xdb45b646,	0x8de08c40,	0x37a91d86,	0xfd107ef4,
-0x0b1db4d3,	0x73988186,	0x74b646a5,	0x92e5a61f,
-0x72239610,	0xf9b6564d,	0xce99179a,	0x61ebb35c,
-0xfb2495bd,	0x36ab39d8,	0x7cca0da4,	0xec4b5d5c,
-0x3210c169,	0xda27c02b,	0xd80c5c8c,	0x38518cea,
-0x5daa2473,	0xf15b6134,	0x733e7412,	0xd6a5ae78,
-0x3b0d4f4d,	0xc6304bb2,	0x7f6df8e6,	0xf6b0e912,
-0x2da01433,	0x2cf7b1ce,	0x32e046e7,	0xcd50021d,
-0xe39d167d,	0xef608f10,	0x5d96e85e,	0x38a113a7,
-0x3ce761fa,	0x26a0250e,	0xa27c2468,	0xfd563262,
-0x9f6f6866,	0xda194d33,	0xa5458a6c,	0x32aa53c8,
-0x2517e3bb,	0xe5070380,	0x72d71801,	0xdee77333,
-0x63f71503,	0xe4cc9d5a,	0x1f684f79,	0xebab1828,
-0xcfdcbec2,	0x1913c83c,	0x72abfe52,	0xfcadec5a,
-0x9a32da3e,	0xf730dc13,	0x529ec685,	0x1d558dfa,
-0x3fb232f2,	0x041148b4,	0xd10bb0b7,	0xeb6821e2,
-0x070d709f,	0xf92b67a4,	0x6d6af041,	0x1724d766,
-0xf21a821d,	0xea6e49d8,	0x9d30cef2,	0xe0c055b1,
-0x67901316,	0xb37f63f9,	0x5984e1b1,	0xf83466f0,
-0x1404ac22,	0x4345d90c,	0xa14ef8b7,	0xa812e742,
-0x62593a25,	0xf08c3643,	0x3b376203,	0x5ddf0e1a,
-0x429c87d0,	0x31c7a9f9,	0x18f25314,	0xf55e9515,
-0xd26dde06,	0xd07605c7,	0x51877d68,	0x31054918,
-0x668e3ae2,	0xe273138d,	0xef9b9beb,	0xcf19359e,
-0x7ccb675b,	0xca018219,	0x1a614824,	0xa1ac60f6,
-0x512484e2,	0x249d2429,	0xa4e02fce,	0x85c52616,
-0xfc3e1b33,	0x11885bef,	0xf1729589,	0x78342f7a,
-0x3a115d84,	0x74698c2a,	0x59b804d6,	0x96598928,
-0xeafb3b9f,	0x788556ba,	0xf956a1c4,	0x5ae7d9b0,
-0xe86bc7d9,	0x7483aa3f,	0xa2126202,	0x5852027c,
-0xbb2db21b,	0xdf7dcaec,	0x3eaa745c,	0x49390086,
-0x60575f57,	0xba173f97,	0x90bd11ab,	0x0db322ea,
-0x2a57df73,	0x89157540,	0x57bdf2fb,	0x32b0919b,
-0x135b0600,	0xaaeb1076,	0x2a7b30ed,	0x73f755fe,
-0x81650eb2,	0x4640b0f0,	0x6f89926c,	0x4bd8b89b,
-0xb8233621,	0x24a33dcf,	0x1a6bbb6b,	0xeb01530f,
-0xf481b825,	0xcdc1c14e,	0xbb207fb0,	0xd83e142b,
-0x95b20b94,	0xe50ac19f,	0x6d3e3ef6,	0x266e4143,
-0x27a006aa,	0x2ec25d26,	0x85235a01,	0xd049df42,
-0x1ce6650f,	0x3a1657ed,	0xe5f9ecbf,	0x6d18d58f,
-0x0da6ed67,	0x3d9f6f19,	0xeb186779,	0x0bd00e5f,
-0x21fe220d,	0x742ccb0a,	0x622e21ef,	0x96cedf92,
-0x11240fea,	0xf6b746d7,	0xff91e400,	0xecaeab21,
-0x072c35cd,	0x9ac8fc0d,	0xa263d5a6,	0x3fd105f9,
-0xb81600fd,	0x0a292f3f,	0x89b9c1ce,	0xd16a28e5,
-0xfc7f3fdf,	0x2450c2d6,	0x494e87c4,	0x1d9b4dd9,
-0x1b40fac1,	0xcee2e920,	0x7cee58ef,	0x361ab9f6,
-0x1bac7d85,	0x0bd85367,	0x2df2f60b,	0x07bbc733,
-0xd8b22847,	0x2e54d3f4,	0x76b49bfc,	0x336f0ea5,
-0xd93b81d1,	0x1eceed7b,	0x563bb551,	0x80a5f398,
-0xd9ff04c6,	0x30a4f554,	0x56c69654,	0x725b2af5,
-0x9c07b877,	0x9da21f3a,	0x730581ce,	0xf2dfc2ed,
-0x45d0c7b2,	0x748ef602,	0x7d186c9b,	0x633aaa77,

cpu/intel/model_f2x/microcode-m02f241f.h

diff --git a/cpu/intel/model_f2x/microcode-m02f241f.h b/cpu/intel/model_f2x/microcode-m02f241f.h
deleted file mode 100644
index b727b4f..0000000
--- a/cpu/intel/model_f2x/microcode-m02f241f.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m02f241f.inc  */
-0x00000001,	0x0000001f,	0x06052003,	0x00000f24,
-0x1f19b59b,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xffffffe9,	0x5715f121,	0x440ce2fa,	0xd5d090eb,
-0x70b3e977,	0x92320e8c,	0x4f989906,	0x36907442,
-0xcc4b12e2,	0xb456a6ae,	0x0ad5bcf7,	0xe9f0a425,
-0x70b932d2,	0xe66202c9,	0x350f8d4b,	0xd560a828,
-0x763e8420,	0x4595b38a,	0xa66d6637,	0xe2adc7be,
-0xc5d9515e,	0x7d6d08cd,	0xc930e826,	0x528d413f,
-0xce5ac17a,	0x86b9646b,	0xe7845b29,	0x0c56e922,
-0xad8a85f2,	0x8e9d478d,	0xd6faa7f5,	0xda7ac699,
-0x10859ceb,	0x0c7c1cd8,	0xfd7bc59d,	0xb847dddd,
-0xe545057b,	0x5af340d6,	0x1e2f8c45,	0x26c9c8c6,
-0x8b6ea51c,	0x75280c65,	0xeb953366,	0x6400e75d,
-0xfe0be614,	0x4b47f2ca,	0xac119100,	0x2f973c6e,
-0xe3600377,	0xe234bd6c,	0x6010f6fb,	0x497c113b,
-0x10824bec,	0xe897a508,	0x0de50694,	0x8202b8a6,
-0x79dc657d,	0xa82cd03c,	0x6df4b693,	0xe2586379,
-0xba899b59,	0xcfdfd29e,	0x207d1458,	0xd91fc2d7,
-0x55ef9753,	0x6ea6860a,	0x69fe1ea1,	0xc8f4b482,
-0x4796d795,	0x87f1131c,	0x3a1e5b4d,	0x57d06ed0,
-0xb627f7ff,	0x0390c72b,	0x5a8794bb,	0xba43f4d0,
-0x1b13f093,	0x9fcffdce,	0xb92dcf40,	0x22d7e700,
-0x268be4ea,	0xec5f28bf,	0x8b9eceb1,	0xd47c7c9e,
-0x2d379513,	0xfd0dc66c,	0x65da5790,	0xe51abca8,
-0x3eb9df98,	0x64471d12,	0xab28627b,	0xe223a431,
-0xeaae03e8,	0xe42404dc,	0x27573c06,	0x1784daf2,
-0xdbdcc49e,	0x2797692c,	0x5220fd9a,	0x80d0ff11,
-0xd74f16e1,	0xe65046ac,	0x681585b6,	0x33c86d05,
-0xfdfb0a45,	0xc53ad831,	0x9453c37a,	0xef236977,
-0x16558437,	0x21d8f503,	0xd30f65ce,	0xa1e80048,
-0x841b0747,	0xac5a8d0a,	0x82cb186f,	0x57fa0ccd,
-0x200de1f2,	0xa3bf1cee,	0xbdad77bf,	0xfe703486,
-0x00049233,	0xef4a7506,	0xe84d309d,	0xaead661e,
-0xcc185f9e,	0x18d07342,	0x7accaa17,	0xadcdf48b,
-0x24ac2c5f,	0xe50cbf43,	0x08cf27ed,	0x6106b55c,
-0x830a0dae,	0x2435eb4d,	0x776f15d7,	0xdc0eb92f,
-0x4733331f,	0xe9a8b196,	0xfcd516fb,	0x2f17ac9a,
-0x1ae63b82,	0xadb5be5b,	0x7c650339,	0xfd2ce3cd,
-0x9dcf7535,	0xda1e0685,	0x3c41984b,	0x9001047b,
-0x39a6808a,	0x7cd929d6,	0xbbe27a05,	0xe502919d,
-0xbd0f8d68,	0x1ae3ca80,	0xa85576e2,	0x5ffd286b,
-0x89bea08a,	0x8b6ccf11,	0xd8caa1c1,	0x20bc02ad,
-0x0b0074f6,	0xf03d2e7a,	0x925a05f5,	0xfcfb6cdb,
-0x26adbe25,	0x4bbb3d3b,	0x3e79e740,	0xa26a1af1,
-0x4c81a93e,	0x1972b943,	0xa0a01b9c,	0x1da11031,
-0x0c3a95e7,	0x0d7b0835,	0x813788b9,	0x3bde2fa6,
-0x25bf03b7,	0x4f6939ac,	0x5174c8c0,	0x596a33a7,
-0x07a9f755,	0x9171ec2b,	0xa7ba9b6d,	0x4613926f,
-0xe7cf7e0f,	0xae9f8542,	0x1166b060,	0x9b742e82,
-0x1f3bbb89,	0x29e8e508,	0xe99db755,	0xa75422ca,
-0x21b59115,	0x5a8d61a5,	0xb34148bd,	0x28f52ce5,
-0xa0eb85e1,	0x4395cd32,	0xa5d2bfde,	0x408cd485,
-0x7f96b5f8,	0xd7113b26,	0xcd0df97c,	0x28af3a7b,
-0xe3299dbf,	0x74ac44c4,	0x78524806,	0xce4c00d9,
-0x4ca8c7eb,	0x196d4c86,	0x0302ba3c,	0x4092a270,
-0xd6dc06e2,	0x0c373839,	0xafcf07fa,	0x1a7e415f,
-0x18fb4cc0,	0xa99c5f02,	0x61d6d815,	0x45f219f3,
-0x3a36a838,	0xea95523d,	0xfbe05004,	0xeb5cb78c,
-0xdd141102,	0x486c0cf7,	0x2aa493e5,	0x9fd4bacc,
-0x1bc9944a,	0x225984e5,	0xfc026ee0,	0x6d2fcc70,
-0xd49bcfcc,	0x23bff82f,	0xb16855f7,	0x622e4b35,
-0xd8bb11e3,	0x5fb5ca0f,	0x07201920,	0x1e810ba3,
-0x251d4fed,	0xb4af51e6,	0x85e13f71,	0x181e4f28,
-0x64bd7d03,	0x547f675c,	0xc227f1e7,	0xbb7a79ec,
-0x02c75036,	0x8f691aa5,	0x42381ac1,	0x5e865d0d,
-0xe97bf6bb,	0x70d917df,	0x91b87cb5,	0xa2b40540,
-0x995beac8,	0xaddb86b3,	0x6505a561,	0x5000e8e6,
-0x5ccbdbf0,	0x9cadcd0d,	0xe2cfad13,	0xa40c1f02,
-0x6383e8f7,	0xd5b28b36,	0x89e279a4,	0xf62515ca,
-0x1141fead,	0x7675f500,	0xf091e74c,	0xba19befe,
-0x06a3bad2,	0x838d52df,	0x4f600866,	0x2c74de22,
-0x9d2c0209,	0x6d1447fa,	0x6a029510,	0xfc185749,
-0x2bb38280,	0xf3b753cd,	0x7e2d1c7e,	0x09b1f4cc,
-0x813c4246,	0xe7de9137,	0x2a4a5e53,	0xf7462270,
-0x22c8934b,	0x8c3068a5,	0x9475dfb0,	0xca3d63c5,
-0x049303a9,	0x4264ff48,	0x6743887b,	0x90e39264,
-0x3c283155,	0x937ab964,	0x4915ab48,	0x432e2d26,
-0xc0f232a6,	0x1e2242fc,	0x4d632b13,	0xc9f83231,
-0x617c0605,	0xe2e3611a,	0xcead2a98,	0x3487ab1e,
-0xebbd2233,	0x89fd5fab,	0xb15023b7,	0xcc6e3add,
-0x26fc7908,	0xad4eeacc,	0x32fd0f30,	0x8f2ee30d,
-0x8d80ab0a,	0x6cc4dfb1,	0xa184df64,	0xec10053f,
-0x316764d9,	0xa2de5bcf,	0x71e15024,	0x3577ef82,
-0x1e778c21,	0x7ba95277,	0xc7ca2153,	0xc1450741,
-0x1e6e0544,	0xe23afc78,	0x2c2bca85,	0x73f5e5d8,
-0x143be075,	0xc8329359,	0xa2e3e11a,	0xcdce223e,
-0x1bf0dc1c,	0xace3982b,	0x12bb4158,	0xe62eb96b,
-0x5b457af7,	0x6c93e00f,	0x01376b8f,	0xa4a6e161,
-0xfb333708,	0x9d7451c9,	0xd69ec6d4,	0x20ec9396,
-0x9c8d181e,	0x555e322d,	0x8a1cfffe,	0xfdf773af,
-0xf345058a,	0xbfd0ef18,	0x9f62c8ec,	0x444f1d96,
-0xd24d6bd5,	0xe060264a,	0x90a09309,	0x8ca7e78d,
-0xcfa08cfe,	0xe1a70200,	0xe1f46b36,	0xd2934b88,
-0x8ef5384c,	0x1f8b54f4,	0x50164c32,	0xf08c1564,
-0x8b217ebf,	0x91682eb2,	0x70699e3a,	0x091f32a3,
-0x7b9213e3,	0x505cdcbb,	0xfd171a85,	0x8f8b7203,
-0xdc2bd0cf,	0x8d9f8b1f,	0x7d66348b,	0x6d94e761,
-0xf140d4c8,	0xf8377cbf,	0xa06a1b59,	0x87b4be17,
-0xc349c49a,	0xbb546fdd,	0xd8386467,	0xce833bce,
-0x2f37d875,	0xa939f441,	0xecf6020f,	0xb2dd210c,
-0xe7234869,	0xb30a55ca,	0xd6a33c86,	0x4aa0e617,
-0x4a0fbe69,	0x01196fb8,	0xc4526ae2,	0x1ede9d7c,
-0xc1f93fa5,	0x5272f02f,	0x3a2d469a,	0x8434c542,
-0x9bdee4df,	0x47439e5a,	0x4bcbbe3a,	0x5c0afa2a,
-0x5c87d7ee,	0x3e5d40f4,	0x3ee86436,	0xac66c772,
-0x373c2e07,	0x1a688ade,	0xe7f2922d,	0x4d27b3c7,
-0x3af4e288,	0x139e43ec,	0xbf8c93c4,	0xdfb75db2,
-0x8a83e530,	0xc04410f1,	0xd2078dbb,	0x375b20a9,
-0xca4506de,	0x19bfe101,	0x676b0a36,	0xa0af8c82,
-0x47e0cd27,	0x2ea6fcac,	0xbd9fc102,	0xbeedff19,
-0xcff74bbb,	0x845b3c5c,	0x974e6e96,	0x53c9140c,
-0xd76e5b60,	0x9064f35b,	0x02555ff0,	0x21dc8658,
-0x92fa2cf6,	0xa9122e4a,	0x94de922d,	0x127f1a1d,
-0xa8b72474,	0x58e76f8c,	0x363d276e,	0x315e3464,
-0xb53354d2,	0x70e794f4,	0xd91f7f17,	0xd8d7322a,
-0x719c7c85,	0x3bb6719a,	0x7af1b4db,	0x4a6630d5,
-0xe6fc3575,	0xfbf4d5bb,	0xb4e3990a,	0x28f239ca,
-0xa27ec578,	0xf360f7a9,	0xcb1b669e,	0x39809f83,
-0x656bc617,	0x4db0e850,	0xab7f6043,	0x5225bb7a,
-0x3a69084f,	0x2821ab20,	0x624da16b,	0x3a303af2,
-0xd5c9132a,	0x1d587f13,	0x1712680a,	0x876484da,
-0x57d88391,	0x52926e6b,	0x36205838,	0x569050b8,
-0x9417d289,	0xe321e75c,	0x1a4cfaf2,	0x8fde123c,
-0xa1f24d2c,	0x005e5dd9,	0xfce4239d,	0xa401a507,
-0x556608bc,	0xbeb767c5,	0xe98daaca,	0xe8a11e58,
-0x06e79615,	0xbc4dfda6,	0x9ab20d3d,	0x6e86a15b,
-0xf1220acb,	0xc4ea8029,	0x336ed96b,	0x9f3dd547,

cpu/intel/model_f2x/microcode-m02f252a.h

diff --git a/cpu/intel/model_f2x/microcode-m02f252a.h b/cpu/intel/model_f2x/microcode-m02f252a.h
deleted file mode 100644
index 14e673e..0000000
--- a/cpu/intel/model_f2x/microcode-m02f252a.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m02f252a.inc  */
-0x00000001,	0x0000002a,	0x08112004,	0x00000f25,
-0xad53035d,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x017464fa,	0xd2fb3494,	0xaf1850af,	0x5af88989,
-0xd3a0a9dd,	0x8e8bd3ad,	0x8c288786,	0xf15f02b0,
-0xf51c1471,	0x6c675200,	0x9c63f3e5,	0xbeb2d710,
-0xbfb6d14e,	0x6ba07894,	0x4b08036d,	0x71a24d5a,
-0x953125c3,	0x2cee5c1f,	0x744a15b1,	0x43a6f67c,
-0x66087dce,	0x58bc5f0c,	0x09c1f187,	0x29065a8c,
-0xb46dcc30,	0x597c4675,	0x2ce2fd55,	0x7329e04a,
-0xe92adf75,	0x0a4f1f59,	0x6939b7e1,	0x586b6cb9,
-0x9e9090f2,	0x612aeaa6,	0x908cfbac,	0x381a3a1d,
-0xc0028180,	0xe7759a09,	0x9a41f6d0,	0x49004723,
-0x447b0a1e,	0x84cea1bf,	0xdb6cfd61,	0xfa3fe8a1,
-0x60569cec,	0x4ed55542,	0xc40d1fbb,	0x9766fe4a,
-0xbffcd59e,	0xc0ec45af,	0x34da2fa6,	0x57a8f38b,
-0x7cf8ab33,	0x991f0a4b,	0x83c635f3,	0xfaa6b412,
-0xd6cfe7cd,	0x7eb7773c,	0xda12abb8,	0xae7f78c6,
-0x0c82ad31,	0x28e15d48,	0x80a0cf1e,	0x6b8a9a75,
-0x1a9aa64f,	0x4a2969ee,	0x9273d48d,	0x7179df33,
-0x06fc27f8,	0x7de9a40b,	0xaaa80cac,	0x83d82561,
-0xe0646103,	0xa72284fa,	0xb39b5822,	0xed08ed9d,
-0x95760781,	0x2f84666f,	0xd1d45bed,	0x96a86c3a,
-0xe4679e8a,	0xfa71d608,	0x86baebc4,	0xf116edb0,
-0xd3a7263f,	0x237b4f06,	0x794f33e6,	0x0d783309,
-0x2df3bb25,	0x02a800b8,	0x97b8ce5a,	0x2123dc61,
-0xee1a5dbe,	0x185cf436,	0x84e325f6,	0x163e3ac3,
-0x62288e57,	0xe5901f0f,	0xef985c3e,	0x1b9291fe,
-0xb58de2b0,	0xe69eeadb,	0x42eefa7f,	0x0472359e,
-0xb1fd90dc,	0x49d374d3,	0x49684482,	0x1156a2ac,
-0xd0a6114a,	0x995f94a6,	0xbcf9ed4f,	0x51d161c3,
-0xcc68e39f,	0x3d050ca9,	0x8cd08b93,	0x6ed69d22,
-0x5fd5cc93,	0xe2783743,	0x5a1816c3,	0xda5a0ea4,
-0x9b5c7903,	0xc25d6a23,	0x25cd54ee,	0xe1ab0174,
-0x518ffebc,	0x28125044,	0x7ff130d8,	0xfbea3a8d,
-0xe093582b,	0xf60baa3d,	0xe4674a15,	0x18a6322c,
-0x21cfa3bf,	0x71a1a376,	0xdd4de139,	0xed578831,
-0x0ab06a62,	0x9cee036d,	0x11ee0350,	0x62ee22d0,
-0x83681acb,	0xef69ded4,	0x65000a40,	0x9ac7ab74,
-0xd76792db,	0xf2e662f2,	0xdcae14a5,	0xfa39ba60,
-0xf746cf70,	0x0bea4f1b,	0x9b384717,	0xf8dafd90,
-0xb2ffc2ab,	0xf3fa97e4,	0x5f22e0c3,	0x04536e9d,
-0x22c99598,	0x34631815,	0x9fc99bfa,	0xfe067ae7,
-0x03fbd87a,	0xdc73bcd2,	0xc49a0fbc,	0x3138c419,
-0x62643c63,	0xfa2597c7,	0x4c84afef,	0xdba2817e,
-0xe818ed14,	0x74a5ad6b,	0x9cf3ced5,	0xf633dd12,
-0x4ba39a46,	0x8b37b668,	0x65637f55,	0x67c7ce04,
-0xe860a2e3,	0xf264ba03,	0x47b91726,	0x887f4d41,
-0xb10685e0,	0x95958791,	0xcb835bbc,	0xf1af6594,
-0x42fb5a5b,	0x78ff5368,	0xb201a575,	0x8a6b189c,
-0xc3f6e3a0,	0xe2bb320e,	0xd75004dc,	0x735b0c3b,
-0x70ccd09f,	0x4d157775,	0xc0663e58,	0xf2170355,
-0x4d86c74b,	0xace253a3,	0x09fedbf3,	0x5288ffb6,
-0xc577a648,	0xf808ffc9,	0x6f1b81ee,	0xa56d4123,
-0x60626a1b,	0xc88b4d17,	0x280e44c5,	0xf56c8ddd,
-0x9110c257,	0x2d65519d,	0xc96c1ad5,	0xcfdea3e5,
-0xa69ea62f,	0xf3ed57ab,	0xbe725f8c,	0x2e3c86df,
-0x23635626,	0x7d2607f6,	0x67fe2874,	0xe64ade4d,
-0x5fe967da,	0x88cb5547,	0x468c3eb5,	0x73313404,
-0x36b6cc3f,	0xf352d0fc,	0xcbd702bd,	0x969a1606,
-0xead2f56d,	0xf4c93dd8,	0xd2395873,	0xe5304e3c,
-0xdbe3e804,	0x1daf81c0,	0xfd6cbdac,	0xfbb07447,
-0x1970d752,	0xff97a936,	0x1cf114a2,	0x03b678d5,
-0x6edaacf8,	0xd4a869c9,	0x6db6f5fa,	0xe48335d1,
-0x6c59f701,	0x2cd977a6,	0x02079375,	0xc573f27b,
-0xd26f8f28,	0xe637b462,	0xb9ef5a9d,	0x2483a550,
-0x8e020039,	0x01d2e9d0,	0x8e69c688,	0xfbf941b7,
-0x86dcab40,	0xe99730b6,	0x0e57bd5d,	0x11ace616,
-0x3a5c73dd,	0xe29052c6,	0x6728d6e3,	0xf5a73743,
-0x6ef89691,	0xffa40f45,	0xd1a1b739,	0xf12697be,
-0xfc849142,	0x1a6daa37,	0xc52c54a3,	0xe600bbb2,
-0x6c90e1e9,	0xf9ba4ed6,	0x118b0436,	0x0d864deb,
-0xa574b526,	0x6f2da0ae,	0x7297e467,	0xe33a4e82,
-0x6e8a340f,	0x9524f758,	0xb7d9d387,	0x67ed6069,
-0x3fcef9be,	0xf3684381,	0xb8012434,	0x86d3a9a9,
-0xdb45b646,	0x8de08c40,	0x37a91d86,	0xfd107ef4,
-0x0b1db4d3,	0x73988186,	0x74b646a5,	0x92e5a61f,
-0x72239610,	0xf9b6564d,	0xce99179a,	0x61ebb35c,
-0xfb2495bd,	0x36ab39d8,	0x7cca0da4,	0xec4b5d5c,
-0x3210c169,	0xda27c02b,	0xd80c5c8c,	0x38518cea,
-0x5daa2473,	0xf15b6134,	0x733e7412,	0xd6a5ae78,
-0x3b0d4f4d,	0xc6304bb2,	0x7f6df8e6,	0xf6b0e912,
-0x2da01433,	0x2cf7b1ce,	0x32e046e7,	0xcd50021d,
-0xe39d167d,	0xef608f10,	0x5d96e85e,	0x38a113a7,
-0x3ce761fa,	0x26a0250e,	0xa27c2468,	0xfd563262,
-0x9f6f6866,	0xda194d33,	0xa5458a6c,	0x32aa53c8,
-0x2517e3bb,	0xe5070380,	0x72d71801,	0xdee77333,
-0x63f71503,	0xe4cc9d5a,	0x1f684f79,	0xebab1828,
-0xcfdcbec2,	0x1913c83c,	0x72abfe52,	0xfcadec5a,
-0x9a32da3e,	0xf730dc13,	0x529ec685,	0x1d558dfa,
-0x3fb232f2,	0x041148b4,	0xd10bb0b7,	0xeb6821e2,
-0x070d709f,	0xf92b67a4,	0x6d6af041,	0x1724d766,
-0xf21a821d,	0xea6e49d8,	0x9d30cef2,	0xe0c055b1,
-0x67901316,	0xb37f63f9,	0x5984e1b1,	0xf83466f0,
-0x1404ac22,	0x4345d90c,	0xa14ef8b7,	0xa812e742,
-0x62593a25,	0xf08c3643,	0x3b376203,	0x5ddf0e1a,
-0x429c87d0,	0x31c7a9f9,	0x18f25314,	0xf55e9515,
-0xd26dde06,	0xd07605c7,	0x51877d68,	0x31054918,
-0x668e3ae2,	0xe273138d,	0xef9b9beb,	0xcf19359e,
-0x7ccb675b,	0xca018219,	0x1a614824,	0xa1ac60f6,
-0x512484e2,	0x249d2429,	0xa4e02fce,	0x85c52616,
-0xfc3e1b33,	0x11885bef,	0xf1729589,	0x78342f7a,
-0x3a115d84,	0x74698c2a,	0x59b804d6,	0x96598928,
-0xeafb3b9f,	0x788556ba,	0xf956a1c4,	0x5ae7d9b0,
-0xe86bc7d9,	0x7483aa3f,	0xa2126202,	0x5852027c,
-0xbb2db21b,	0xdf7dcaec,	0x3eaa745c,	0x49390086,
-0x60575f57,	0xba173f97,	0x90bd11ab,	0x0db322ea,
-0x2a57df73,	0x89157540,	0x57bdf2fb,	0x32b0919b,
-0x135b0600,	0xaaeb1076,	0x2a7b30ed,	0x73f755fe,
-0x81650eb2,	0x4640b0f0,	0x6f89926c,	0x4bd8b89b,
-0xb8233621,	0x24a33dcf,	0x1a6bbb68,	0xeb01530f,
-0xcc259353,	0xc17c16d6,	0xbb207fb0,	0x27c1ebd4,
-0xed585fe7,	0xf2edcabe,	0x859eca51,	0xc2f2d4b6,
-0x3f779a7c,	0xdbdfe2eb,	0x6e7afe41,	0x875cec34,
-0xa297ecdd,	0xc4593faf,	0x51764582,	0x2045ab44,
-0x82c1ff7a,	0x9e654d1a,	0xef96a26e,	0xf9c5a8e2,
-0x1949c1ec,	0xdb0c039e,	0x501af00f,	0x5aa5de51,
-0x3020a51a,	0xe17c9fd5,	0x422906c5,	0xb768b789,
-0xf0125395,	0xb5144500,	0x8ff2edf5,	0xdcba4acb,
-0xf5918257,	0xb202af03,	0x1e50ed84,	0x72e3fca5,
-0xf48d1811,	0x2800e62a,	0x2ed0487d,	0x4730996e,
-0x55c149a1,	0x65dd8078,	0xdf3c47f3,	0x004ce5e8,
-0x12d22a38,	0x56c81e58,	0x0093d696,	0xe362be3c,
-0xbd7908e5,	0x1448356e,	0x72673597,	0xc94a3b8e,
-0xae21f2cc,	0xf1bc2614,	0x79c1eac1,	0x16f59499,
-0x008f11a5,	0xd86396c1,	0x56781c3c,	0x718694c7,
-0xf6948d20,	0x164cfd4b,	0xbfead8fc,	0x6014c180,
-0xb17136f8,	0x6d26d710,	0xd46ca41d,	0xaea0181b,

cpu/intel/model_f2x/microcode-m02f2610.h

diff --git a/cpu/intel/model_f2x/microcode-m02f2610.h b/cpu/intel/model_f2x/microcode-m02f2610.h
deleted file mode 100644
index 342f832..0000000
--- a/cpu/intel/model_f2x/microcode-m02f2610.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m02f2610.inc  */
-0x00000001,	0x00000010,	0x08052004,	0x00000f26,
-0x17ccab58,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x364630c3,	0x90d32ac3,	0xe0b20ae8,	0xd6f51dd2,
-0xab715fb0,	0x65eb6c09,	0xdbedd52a,	0x82b77a09,
-0x3de6132a,	0xdb7e70d3,	0xf0d480d5,	0xcc178c48,
-0xdfcccab8,	0x54dd452a,	0xf3cad623,	0x52223cbd,
-0x952b83c7,	0x9f19f457,	0x0ccfdeb4,	0x7db5026d,
-0x91b4355b,	0x7578f9da,	0x867c4004,	0x9dfd38ba,
-0xd917eb1d,	0x4cd599fc,	0xb02762c7,	0x6a515d1d,
-0x9ce55e63,	0xb83a89ce,	0x61770991,	0xf502a3eb,
-0xaebb7c0b,	0x48a70ecb,	0x7e70e003,	0xa0445809,
-0x61483a7c,	0xd3e42cf4,	0x73e16c21,	0xe3703903,
-0x4bb336a4,	0x2a7e6441,	0x5f7c8f18,	0x61fe955e,
-0xacad1745,	0x46610311,	0xa438f675,	0x0794bebf,
-0x9bcf7916,	0x289ed394,	0xf18602f5,	0xd15fd3ee,
-0x21d63004,	0xf8e18369,	0xbd736d58,	0x6cfa6fb2,
-0x216e824b,	0x816bb370,	0x87b6b9fc,	0x018352a0,
-0x6c7e0fb9,	0x2e73ee68,	0x42932799,	0x030a14a5,
-0x7e949147,	0x1c7b903b,	0x202a628b,	0x2b3c29db,
-0xb36cbf4b,	0xb8b682c9,	0x52edf51c,	0x21dea18a,
-0x3d45795b,	0x17a486b1,	0x0b33ee81,	0xae0e781f,
-0x6a51cda0,	0x038a0886,	0xb3803c2a,	0xd37b7663,
-0x3fdd3f29,	0x206ff7a2,	0xc4e1d566,	0x4733a703,
-0x4109f081,	0x00e13389,	0x8f6a551a,	0x876c6b0d,
-0xab5f37cf,	0xa7587856,	0xf2e40d9d,	0x8f96ff94,
-0x643ba33d,	0x0a714d2f,	0x9e4cebf5,	0x23be7659,
-0x1f1185a3,	0xb7867804,	0x43154b8a,	0x2b410278,
-0xfc50256c,	0x0fdbe07f,	0x5323861a,	0xa7743e4d,
-0x360f5bbb,	0x0b6dfc4c,	0x6bc99b1f,	0xbfc3cec8,
-0x01bae442,	0xbc865050,	0x1c47f2ea,	0xa733d377,
-0x114a8e51,	0x4d2fc034,	0x2a1f62e6,	0x295e4b45,
-0xa60fe075,	0xcec0b254,	0xd2db93f1,	0x75b76415,
-0x9fa15d8f,	0x2f6be332,	0x60969457,	0x4f09bd8d,
-0x3cb33e73,	0xe5bfbb05,	0xcaa4318d,	0x469bc154,
-0x0c88e1dd,	0x7f0efe55,	0x87caeb36,	0xa30e9e5b,
-0x4bfa16e3,	0xd8831e15,	0x859b4752,	0x5c8b8239,
-0x7a5f2b0c,	0x3666be1e,	0xf4eed737,	0x5351de66,
-0x126fc2c5,	0xfb125bb9,	0x1bf57cce,	0x9305002e,
-0xc7fcc490,	0xb5df57e9,	0x3997066b,	0xf7f80664,
-0x0f6a3e29,	0x6f8049a5,	0xd7ad0e02,	0xa5a4be93,
-0x4e18215e,	0xf431e0c7,	0xb6d9c296,	0x530772c1,
-0xa889c064,	0x72a08e3f,	0xf66c4dba,	0xe9de2ecc,
-0x3de3883a,	0x800f091d,	0xc60b5c4b,	0x5eb1f9da,
-0xedbefcbd,	0xeefd1890,	0x0094667b,	0x9931c091,
-0x5b15313f,	0xf3ea84ab,	0x589cddc7,	0xefa38e33,
-0xc7ff3dae,	0x122b6d85,	0x6cca8449,	0xddac8bae,
-0xee017de3,	0xfb2642f0,	0xb04ea8d1,	0x18a20bc1,
-0xbb1f1040,	0x68ce0f26,	0x24f8cc6f,	0xc05a61a4,
-0x53142944,	0xbb95814b,	0x0fc3cf29,	0x59dddd7e,
-0x53831c7c,	0x8c03946f,	0xa0fd5834,	0xb04b9149,
-0x39d5796f,	0xdfc3721b,	0xdb868f07,	0x8ff124ec,
-0xa53443ee,	0xc5b7b007,	0x5b9a16f0,	0xa3185b04,
-0x1befb1ad,	0x3fdbae2d,	0x924cb3b3,	0xc3954c6d,
-0x38d92964,	0x6b7ee259,	0x0fdaf976,	0x706f01f0,
-0x6c174791,	0xd6041055,	0xfe603ead,	0x78da5102,
-0xa7f1006e,	0xb4aa08ce,	0x981f3922,	0xc247e9a8,
-0x27ad39d5,	0x9f510faf,	0xf6e307eb,	0xa1f8a352,
-0xfb4943b9,	0x030440d6,	0xc9d8cd88,	0xb7e1375d,
-0x4503a334,	0x57f6cc3e,	0x897cb70b,	0x52df60cd,
-0x7f6e55b3,	0x8c56d27f,	0x4c1a5070,	0x2cb3b3a5,
-0x952934d9,	0xb95db21b,	0xd5772d64,	0x4f0ed27c,
-0x2ce5e335,	0xca2ce0ad,	0x8e617972,	0x000eb112,
-0xab28976f,	0x7a3e7a12,	0x063ea698,	0xb64f9bab,
-0xe5f6e7ee,	0xda973eeb,	0x3e75505b,	0x5b6b8806,
-0x7d7b4301,	0x8e6d0b29,	0x7e27b696,	0xf8b2678f,
-0x50ebc3f4,	0xdc9d8698,	0xb3be1dd6,	0x9f7c949e,
-0xa477da84,	0x713d613e,	0xe1434fc6,	0xe39897c6,
-0xcdfa740d,	0xa57b09e1,	0x080626d3,	0x548606b6,
-0xbe306932,	0x4e765892,	0xbb7bba2a,	0x8ac2ce69,
-0xd8c2ce64,	0xc95b1b7f,	0x1a2a003d,	0x73d5e9bf,
-0x2063ff00,	0xb3cf5ddb,	0xbb16f840,	0xefa92e9f,
-0xa2bacb3b,	0xe709c06f,	0x498304d6,	0xbb736f46,
-0x04745718,	0x56318102,	0x936001b7,	0xe2f76c7d,
-0x5ca8b5f6,	0xa609c8ef,	0xb9aa872f,	0x65029242,
-0xba28ff9b,	0x4cd3f475,	0x60701e93,	0x9f843fd8,
-0x2b89fca8,	0xc55a166d,	0xc2526f94,	0x69271a70,
-0xbc7a90f8,	0x926668f6,	0x54e72586,	0xebb05b4a,
-0x73cfe779,	0xf94f39cd,	0x70545f32,	0xa849637e,
-0x315a5607,	0x70bba510,	0x349ed3b3,	0xd6341c9f,
-0x4d6ba61b,	0x98300075,	0x629fd7d9,	0x4c413dd3,
-0x7e721ef5,	0x12fc530b,	0xbb4b01cc,	0x9324d6c1,
-0x6b2a1feb,	0x90faaf1d,	0x51055400,	0x024dc75b,
-0x693d1d5c,	0xb7a952be,	0x1398625b,	0x8ffed6e8,
-0xb5e8fa2e,	0x90c83b11,	0x7f7b9e9b,	0x8c06d718,
-0x9615a0e3,	0x3d7eda6d,	0xadd850a0,	0xbff9c56c,
-0xb9d865a4,	0x95cddce4,	0xe45e6864,	0x04c45d0c,
-0x9af72854,	0x2f4df675,	0xd9dc6b39,	0x934e8bb3,
-0x49600334,	0xb1df0a72,	0xa0de7818,	0x320e1233,
-0x06e0b01c,	0xb8b8dd15,	0x86340fbb,	0x8f338436,
-0x99fdb250,	0xe7708e28,	0x2c5de73c,	0xa940eea8,
-0xdfc66f15,	0x67d5d880,	0x2db5f20a,	0xd8237025,
-0x5224912a,	0x9d2b819a,	0x68d2ba9f,	0x4a43bf62,
-0xe01c249f,	0x4ac4e110,	0xb59c4d20,	0xbc0af1b3,
-0xec57e2c3,	0xf3dc0277,	0xfa65392a,	0x678eaa4f,
-0x757fa21f,	0x9e848a1c,	0x075804cb,	0xd6ab98a1,
-0x8e402f59,	0xf5ee99f0,	0x6d45a523,	0x92ce470e,
-0xa47332e6,	0x7a62c67b,	0x58f6c4df,	0xcf79a794,
-0xd42229ca,	0x8f0bb326,	0xb4e397d4,	0x5db56269,
-0xe47dbe8f,	0x0de0a469,	0x71bf3754,	0x51517bbb,
-0xae5fbe76,	0x3a0067d0,	0x8c3b07d3,	0xdfebc15a,
-0x87955daf,	0x0d73af50,	0x71a73c6f,	0xbc247916,
-0x63e1a157,	0x77e92d44,	0xf6193d40,	0xb4c09193,
-0xbc415098,	0xfbedcb0e,	0x2f68cbff,	0x5be3f2d5,
-0x01b49b44,	0x29bb787d,	0x0e58f10a,	0x43042b8e,
-0xd424849c,	0xfad28134,	0xefff8e12,	0x3d9bcadf,
-0x67f9aa5c,	0x34129664,	0x710c9e14,	0xdb1c0ba3,
-0xfe75b38d,	0x5a421286,	0x8bf94933,	0x7e4446e1,
-0x79d4ef3e,	0x85124855,	0x2640de62,	0xec172eac,
-0x70d6d02e,	0xe6bd1522,	0xbe71363f,	0xf88dac30,
-0x7b6c146e,	0xc979a8e3,	0x177d9714,	0xc4552929,
-0xb8de5377,	0x26262eaa,	0xa650654c,	0x363846d3,
-0x4773b4a1,	0xcfe7dd20,	0xbd29e2da,	0xfbb3811f,
-0x75bb90ce,	0xe8e6fd74,	0x209fe1d7,	0xc06fb9fc,
-0xc95cf776,	0xf73f0253,	0x81ee0e10,	0x30dababc,
-0x99c09050,	0xd9390ebe,	0x0f32124f,	0x2aaac59f,
-0xfbaac523,	0xd9d6dbd8,	0x81509734,	0x9b3a6e21,
-0xf2933052,	0x2159de94,	0xd69d47c9,	0x4c6a2a83,
-0x2b6b0832,	0x4be2739e,	0x5e19abef,	0xb8f3e429,
-0x96cb048f,	0x735638c4,	0x663b3bcc,	0x07a86d81,
-0x31de29c5,	0x90c9a217,	0x6fb5bc34,	0x4099b35d,
-0x1e000237,	0xc4b3e07e,	0x1f969255,	0xb8b58110,
-0x2df57649,	0x7f6911b6,	0x096e9f23,	0x5914dec9,
-0x5ec6efd0,	0xb236d75a,	0x03a70758,	0xd2011163,
-0x4e9603f0,	0x683d1d35,	0x4558d5d7,	0x2c77e721,
-0xe2bc28b9,	0xd2252e46,	0xdd0a1a50,	0x0dbcbadc,
-0x29435c48,	0x091e76e2,	0x8b3f2627,	0xf320f8f2,
-0xc8bcb1cd,	0x36e35ca8,	0x82a5ea04,	0xe8ebc0cd,

cpu/intel/model_f2x/microcode-m02f2738.h

diff --git a/cpu/intel/model_f2x/microcode-m02f2738.h b/cpu/intel/model_f2x/microcode-m02f2738.h
deleted file mode 100644
index 578fb3c..0000000
--- a/cpu/intel/model_f2x/microcode-m02f2738.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m02f2738.inc  */
-0x00000001,	0x00000038,	0x06042003,	0x00000f27,
-0x6d330d4a,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xffffffe9,	0x0000005e,	0x96f952a6,	0xaa368f02,
-0x53d271e6,	0xf8286513,	0x484b4e9a,	0x9e0c09c2,
-0x03b11314,	0xdfb67c98,	0xa2957d16,	0xf07f25de,
-0xb84a2555,	0x72ec8b35,	0x3445c734,	0x7744f543,
-0xc3da0cc0,	0xeb36172d,	0x8b2cf574,	0x29c867a2,
-0xe79dfaf0,	0x54714bb5,	0x524dfb69,	0x0df65433,
-0x0b95ec14,	0x3dc09ca2,	0x584ba068,	0x2aa558ce,
-0x8cd679c8,	0x3b2609d0,	0xa06306d1,	0x80bfa93a,
-0x482678d8,	0x0cdf1ce6,	0x5ec4e912,	0x8a19f7a6,
-0x76f215be,	0x577d92c2,	0x479cd4ba,	0x63d1f415,
-0x5af98bc5,	0x8889bb4f,	0x8e70943d,	0xb5528299,
-0xfd63e347,	0x836fcfd0,	0x4951a701,	0xf4613cdb,
-0xaa7c2f52,	0xa0e290c7,	0xf646a80b,	0xda5b5a03,
-0x93517b47,	0x553d99d1,	0xafac198e,	0x486b6c6b,
-0x4efa01d8,	0xdc6ce226,	0xdac3a149,	0x9b7cf27f,
-0x6c6246a0,	0xb6055a39,	0xb68cc841,	0x87b6adee,
-0x1c36edb4,	0x3ee76d20,	0xdbffab67,	0xed12fda6,
-0xc1aff2f2,	0xc110932f,	0x0933ccfe,	0x58fa2281,
-0x285d5ec1,	0xd05b216a,	0x76315645,	0x570c5c8f,
-0x6cc52f1c,	0xaa977e52,	0x066f4e03,	0x812bfd2c,
-0xbfbfd7a9,	0x70828199,	0x60182af7,	0x2a04e000,
-0x30f413b7,	0x327cef32,	0xac73aa51,	0x7c418d9f,
-0xf493ce0e,	0x6c14258d,	0xa5e2755e,	0xd39f994a,
-0xee638b08,	0x55d50476,	0x9b7afc5c,	0x5da2ed13,
-0xb75bf9f4,	0x2606c01d,	0x8a1d00eb,	0x0f73428f,
-0xb29c4fb4,	0xac13e554,	0xa7648fe0,	0xbe56837b,
-0xd34fa9ff,	0x59c855a2,	0x7d3cc7d7,	0xb5b0cb50,
-0xe6626c0b,	0xf07010b7,	0xd8054587,	0x01a5327a,
-0x3ceae28b,	0xa3bf737f,	0x3d1a37e7,	0x6ce48d1d,
-0xc9d91222,	0x42f28fae,	0xe8dff3e4,	0xfd6898d0,
-0xe772ab47,	0xbe452c12,	0xf188ee09,	0x08edb79c,
-0xad4d48fb,	0x5cb75d1d,	0x251f4e02,	0x6b7bb6e3,
-0xcada2f09,	0x536d74eb,	0xacfa627a,	0x51e2ffd2,
-0xe4655767,	0x311dbbec,	0x1011b68a,	0x6f6e8deb,
-0x4298665d,	0xc0522b3c,	0x2c3a19dc,	0x2c48f2ae,
-0x49bca621,	0xb6a747fe,	0xa1606c81,	0x9b2a5318,
-0x0ac114c3,	0xb5b35aa0,	0x3f4ee00d,	0x8b427e75,
-0xb539fcd3,	0xa99fba84,	0x821fc647,	0xe0ac6d6e,
-0x912f6f88,	0xf2009cd8,	0xb32330b3,	0xd0b80514,
-0x6f25f157,	0xdba2f463,	0x88ef17d1,	0x147c5f21,
-0x6e29cd75,	0xec14e5d1,	0xdcfffd24,	0xccc2c510,
-0xe5e40798,	0xb24814e1,	0xaf0cdaf2,	0x825cf5e2,
-0x12acac6b,	0x439c5f36,	0x0c533619,	0x8e776e71,
-0x319b44f5,	0x19c0b404,	0x54111b2a,	0x6a767513,
-0xb16944ef,	0x30ef18ce,	0x85df0862,	0x0737ff49,
-0x77fe06f2,	0xb2de0d2f,	0x71625e95,	0xc722c5a2,
-0x03b401a9,	0xe8b030b4,	0x7f9e62ab,	0xbff8c966,
-0x726bfeca,	0x6adf3831,	0xab85067e,	0x5167e87a,
-0xb06ad00c,	0xdd974309,	0x5704880d,	0xb7279a43,
-0x38aeda19,	0x52f5a31f,	0xd66d79e2,	0x83dad3db,
-0xa138d066,	0x0b4674d4,	0x07e7dd7a,	0x7f5c70c7,
-0x4aade5f0,	0x4fcd220f,	0x2ae8ab6f,	0x6fb11f68,
-0xbf134ecc,	0x71d3125c,	0x3cc3f6ba,	0x92809507,
-0xb4a9b236,	0x97a2ef5f,	0xe20e5f23,	0x5610bfa9,
-0xad16eba9,	0x5207dfba,	0x0caa3d20,	0xc57cccba,
-0x7983d15d,	0x09ced949,	0xec698959,	0x53a4b153,
-0x63c74107,	0xacf58270,	0xbc2982cd,	0x42bf9c41,
-0x26aff8b4,	0x9832bd6e,	0x34e98158,	0x434f0f43,
-0xcb80ccda,	0xd81471b6,	0xbd176071,	0xab13735c,
-0x4e80e2c1,	0xcf7815f0,	0xb4e6ae37,	0x1a90c457,
-0x79426d6f,	0xa4ac1e2c,	0xf76de77b,	0x1808cd61,
-0xd72ea071,	0x1f02af0e,	0x9613b531,	0xe83f2e9a,
-0x99a5262a,	0x0e8a756d,	0xbc229ac4,	0x2cb1af6b,
-0x8a8720d6,	0xc84d2c77,	0x8547ad96,	0xeb794e72,
-0xb51119ea,	0x1c0121ea,	0x9f8ae83b,	0x16459999,
-0x5c17deaf,	0x278a3e3b,	0xf2bbb704,	0x54df1a00,
-0x521ef94e,	0xd40de734,	0xca5badee,	0xa2fe3027,
-0x2ffe3ada,	0x1df00fb9,	0x5feb168c,	0x81674308,
-0x99713c0e,	0x56aae017,	0xe62e68f3,	0xaa15163a,
-0x31ac7b10,	0xe6a86d9c,	0xa006782e,	0x9baefc91,
-0x111277d5,	0x80f63a4b,	0x624044d6,	0xd91a5de5,
-0x5d0255d6,	0x92b82310,	0x08faf5e5,	0xe482ff69,
-0x0a1f1757,	0xdc010e34,	0x9cd07e48,	0x677fcfa3,
-0x0384138d,	0xa104220a,	0x5431c7ec,	0x0e8b7efb,
-0xf1ebcd61,	0x97ae7029,	0x191ff006,	0x4308b147,
-0xa11e05f7,	0x2c7cb5a4,	0x1d345971,	0x28d23638,
-0xc5a7a5bb,	0x3307c971,	0x0d3782ae,	0x2b798842,
-0x1fc27334,	0x4ff82ddb,	0x543ba685,	0x47732c7a,
-0xad094a6e,	0xb8ff60e4,	0x43f9ee2f,	0xe9a114e8,
-0xf036be6e,	0x3fb488a0,	0x280b2d46,	0xb1887c58,
-0x54ae583a,	0x454b6ce6,	0xe617a2c1,	0xb9335ac3,
-0x72361e12,	0xc856637a,	0x741b6cbe,	0xcf1f6f25,
-0x9f405fff,	0xd2525b02,	0x22d8b05a,	0x16860f11,
-0xb02983e9,	0x388b9c2c,	0x196cb2f2,	0xfca5f1a2,
-0x9e60965d,	0x5bed99ff,	0x59e361fc,	0x9361bde8,
-0xa1527365,	0x3f300237,	0xb0f5e2b8,	0x8fb00a40,
-0x71cb9744,	0x3327e8d3,	0xe89994d4,	0x3987e389,
-0x28c6d8f7,	0xb2ba9fc4,	0xdf109e0e,	0x622634b2,
-0x4904a82e,	0x576c3c2f,	0xe95eae46,	0xfb773013,
-0xf98b91de,	0x4edc30d5,	0xc6e60080,	0xebefab96,
-0xd7684df2,	0x9cd2c3e1,	0xd433902a,	0x7b9aa9eb,
-0x3c99cbaa,	0x5a0fa53d,	0x77297830,	0x869db621,
-0xaee2d56a,	0x2ce907c1,	0x0aa5097c,	0x662e7862,
-0xa5bfbc61,	0x2610f3bf,	0x3a741865,	0x99a5836d,
-0x2e533e3b,	0x812aa485,	0x0d7eb66d,	0xb325db47,
-0x6ac77937,	0xa1757eb7,	0xb7765633,	0x8845f18f,
-0xde7e37f8,	0x08a17789,	0x8af720ca,	0x1f7a530f,
-0xadcbb072,	0xd02e2dae,	0x16fbe58f,	0x0e4df085,
-0x80663766,	0xdcff020e,	0x4c242d70,	0x3d16d122,
-0x154a029b,	0x40c95a2e,	0x5f98eb6f,	0x637ffc42,
-0xcdf10a5c,	0xf2211055,	0x998ddc8b,	0xcee90fd8,
-0x1ddc7fad,	0x7034d80c,	0xf5bf0592,	0x479205bc,
-0x0900e9c9,	0x7bef8c77,	0xc128cebf,	0x9e7dd814,
-0xedca7a5e,	0xf15af942,	0x40e55228,	0x065ea7ce,
-0x9603da92,	0xa6611211,	0xea9dad76,	0x4fd9d974,
-0xea19cb68,	0xeabf508d,	0xd460f6c0,	0x3951733a,
-0x249a4453,	0x04356966,	0xac6ec71e,	0x5253e669,
-0xfca78245,	0x8ef4d888,	0x6c031fe0,	0x8c49e3df,
-0x67cd07b8,	0xc916f082,	0x3a350c13,	0x17a9b757,
-0x5681f1c3,	0x0e656ece,	0x2ae1d3df,	0xb9cd5476,
-0xd425f4e0,	0x8b45dee8,	0x8f02eb98,	0x6f00c0fb,
-0x1b90977a,	0x521e8094,	0x9b5b08ec,	0x5b504450,
-0x449f84f6,	0xb63e6384,	0xf389e505,	0x0b2aab9f,
-0x945ecdbf,	0x721a5b10,	0x6a2c6884,	0xd74f9926,
-0x9c178148,	0x1f44fd1b,	0xf63a6ffa,	0x4506529a,
-0x797d01b4,	0x442147f8,	0xc90a759b,	0x44f0a0fb,
-0xdd26e42c,	0x55fcf1d5,	0xaeeee197,	0xbee8c900,
-0xf8c70f2f,	0xc32d2eee,	0x5857e821,	0x5ac38d25,
-0x873b3c45,	0xa1db703a,	0xf1b7a2a6,	0xc2c7829d,
-0xeecb2edb,	0x19f0fe3c,	0xd6f35737,	0x5000b318,
-0xcd217d92,	0xc72ec374,	0x321b9e86,	0xfd256b8a,
-0x7e9331c9,	0x8a7edd90,	0x8af83898,	0x222c1f2b,
-0xb722eb67,	0xdc087998,	0xa512fefc,	0xa5c1bafe,
-0x642b8b83,	0x3a617c41,	0x2d081db3,	0xda5ef119,
-0xde847082,	0x83d113c3,	0x273dcb52,	0xafbf83b8,

cpu/intel/model_f2x/microcode-m02f292d.h

diff --git a/cpu/intel/model_f2x/microcode-m02f292d.h b/cpu/intel/model_f2x/microcode-m02f292d.h
deleted file mode 100644
index 6791a2b..0000000
--- a/cpu/intel/model_f2x/microcode-m02f292d.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m02f292d.inc  */
-0x00000001,	0x0000002d,	0x08112004,	0x00000f29,
-0x76e56915,	0x00000001,	0x00000002,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x3329bed4,	0x074ca74b,	0x76a4c9be,	0xb3d0ac3b,
-0x59c1ebd3,	0x9d06facf,	0xa272f2b8,	0x185d2aed,
-0x1dbb2394,	0x86f96351,	0x12652c86,	0x873bf0a8,
-0x4f6956f8,	0xbc5754f1,	0xd43f9485,	0xb0484217,
-0x88993f58,	0x071366b3,	0xbb49ef1d,	0xb8ec50b3,
-0xd6dd7d67,	0xafae9594,	0xafbcf523,	0x04e3cefb,
-0xf6125942,	0x6c58f3aa,	0xa28b05f4,	0xbb31e4f0,
-0xde633bba,	0xc2cc4d76,	0x2fc95cef,	0x465474bc,
-0x6148f606,	0xa8245d1a,	0x167d68d0,	0xc38533b2,
-0xcbfb5881,	0xb912dc66,	0xbb9cc137,	0xbaa2ca73,
-0xa9cee564,	0x3edd2b89,	0x2e3ffeed,	0xa68b49eb,
-0x0b85b10b,	0xb968370f,	0xd5c4deb8,	0x2d2883d4,
-0x288e44af,	0x37b10c8a,	0xa75c2ef5,	0xa5242ad7,
-0xff96f783,	0xab3f2161,	0x3921290b,	0x1094e053,
-0x9eae586d,	0x9878a4f3,	0xa2d41b7f,	0xb29cc218,
-0x93898d3c,	0xdd152eec,	0x638ab207,	0xa7536a0f,
-0x5accf54d,	0x798a56a0,	0x8e925de6,	0xe2fec0a0,
-0x8b6100f7,	0x910d43f8,	0xb3bcb1ab,	0x3f032f10,
-0x667b024d,	0x5303ab2e,	0x50a68459,	0xdbdae9ae,
-0x61cab195,	0x8b080d7b,	0xe1c9c484,	0xc0a9cc33,
-0xf3c786cb,	0xa226e2f7,	0x4509e980,	0x2ff4bb80,
-0x943a2b9b,	0xb0e2d78c,	0xdce9f9df,	0xb9302df9,
-0x2f095be2,	0x46f9e8cf,	0x097129ec,	0x5f7ba01f,
-0x49e26e4c,	0xde9ff6ce,	0x5d194de6,	0x9114a73f,
-0x5114f3e1,	0x9832e8b3,	0xd116f967,	0xfcddf0e7,
-0x3011f78c,	0x5d84b6d5,	0xb465a082,	0x8eb129ad,
-0x5390d983,	0xdfad741a,	0xef927af0,	0xa062e4fd,
-0x94a1b0f5,	0x6c9dcff9,	0x15192e6a,	0x11a1f0b8,
-0xbc5f9758,	0x01c1070c,	0x6f5a81c6,	0x7ee5b238,
-0xdf75b957,	0x8b5cbac1,	0x5f7cd16a,	0xf7faa6dc,
-0x5b74dbb5,	0x0980f147,	0x4aa350ab,	0x7e96c732,
-0xdaeacc94,	0x29fd397d,	0xf62b5325,	0x3c519a56,
-0x5dbc6524,	0x201364ea,	0x05ee717f,	0x39c8c28c,
-0x9ab2580c,	0x95550f9c,	0xfb0eb0ac,	0x242c6155,
-0xdd52b4d4,	0xa04672cf,	0xa81f5b28,	0xac10d5f7,
-0xd6afd049,	0x323e700a,	0xb710054c,	0x88b48cc0,
-0x4c1d370d,	0xb303457b,	0xbc5bf726,	0x2dfc0600,
-0xa86d0d2e,	0x9ec95b49,	0xeec42301,	0xa0ddf041,
-0xd3697b0d,	0x1cf23cd4,	0xe511afa1,	0x99677ab6,
-0xcb82d8fe,	0x03d837ed,	0xcf59b6eb,	0x117c6438,
-0x793db420,	0x01210ef0,	0x2f16aa63,	0x092aa912,
-0x188fcfe1,	0x0cd78643,	0x4725f2b0,	0x141b4064,
-0x060cb591,	0xdb59b5b9,	0x08ca7893,	0x03b02ee2,
-0xefdabca5,	0xedc23083,	0x48d71720,	0xc44417e0,
-0xb0f5f326,	0x04e0ca58,	0x1cbc21e9,	0xc47f8d91,
-0x5465c94d,	0x6f5c300b,	0xce250158,	0x39d3ff3f,
-0xb9ba60a4,	0x7e15fc75,	0x6481b42f,	0x4a822d4c,
-0x6b251985,	0x01c3f0ff,	0xb961c2c0,	0x56233348,
-0x4322f327,	0xfaf3a4b4,	0xa5e2f209,	0x0086e35f,
-0x5665e8c8,	0xd284182d,	0x7c66dc76,	0xdead8651,
-0x3948f967,	0x29e2cdc5,	0xa85bf1c4,	0xfc81e608,
-0x95129e56,	0x39e8ccc0,	0x8a55171d,	0x0ca75f6d,
-0x76b3b76a,	0x07063184,	0x40a355b6,	0x0dc9ae64,
-0x2f0bcdc9,	0x3c98d57e,	0xbd9f6fc9,	0x0b3b70e8,
-0x6598b670,	0x98adb5b0,	0xe38efec2,	0x1b72b2a1,
-0xd7760f5b,	0xa5ff1aa2,	0x21d65a27,	0x85170ab7,
-0x4f19b28e,	0x147ab845,	0xc61a001a,	0xbf15e323,
-0xbea79403,	0x0e9fd315,	0xa5ce5dc1,	0x3dec0102,
-0xe344f20f,	0x26772148,	0xe3c335c8,	0x14698661,
-0x02045f22,	0x1b9fe294,	0x18fd4760,	0x2b0dcc84,
-0x3719068f,	0xe16a4bd5,	0x69b449a0,	0x088176ec,
-0x66231f59,	0xe4c8477f,	0x3ccfd123,	0xd67be9aa,
-0x8df1652c,	0x11f29283,	0xb13a6168,	0xd79e71f5,
-0xdf064c6c,	0x63bbaea0,	0xa32b027f,	0x17fa40de,
-0x62dad42b,	0x4a2ba3d1,	0x97566ec5,	0x7ce0870a,
-0x7c6ac399,	0x075eae21,	0x02811d28,	0x6effb228,
-0xbdffa992,	0xfc9706c7,	0xa2c158ad,	0x3a407afd,
-0x94b88ec5,	0xc9019e3e,	0x10cf018e,	0xf08b1e2d,
-0xaa09594a,	0x0d896d4a,	0xf83a743f,	0xfc82a2c3,
-0xe863355e,	0x619ef2f4,	0x2170df86,	0x34112254,
-0x615d93e1,	0x7c25d947,	0xbda74d18,	0x4188f6d8,
-0x02a61d07,	0x262bad07,	0x3939c06e,	0x76480101,
-0x26697ea6,	0xfce41af7,	0x9bece83f,	0x309c0b9e,
-0xdfc2bc12,	0xedcccfee,	0x4f095c0d,	0xd9b08cce,
-0x45da7530,	0x2f8e37c0,	0x5f273652,	0xc13511e0,
-0xcdb90088,	0x79c7d87a,	0x3df67681,	0x05a0a8d3,
-0xf2d2756a,	0x56041d39,	0x185b97c5,	0x62644b35,
-0xba24ad0c,	0x0d8ba3a3,	0x90e4793a,	0x4a04a884,
-0x05e64fdf,	0xfe710b2b,	0x85703d05,	0x1abc37e1,
-0x8db28c4e,	0xdde1b1d5,	0x03682e82,	0xf4d092fa,
-0x067f6a0d,	0x3c142430,	0xf2d8bc9a,	0xf546da72,
-0x660ec359,	0x4171e4dc,	0xa29d94b2,	0x151add4d,
-0x57f35f12,	0x7258f732,	0x9db66fba,	0x77e39897,
-0x8a8711c7,	0x1f5db10a,	0x58792090,	0x68600a9a,
-0xb2a89ac2,	0xa4a1f018,	0xc27e695f,	0x00aabd02,
-0x3f750dbe,	0x9a2e2bd2,	0x70ac647b,	0x9959d044,
-0x7669de0e,	0x2f98c181,	0x1c25a4fd,	0xbfa6a204,
-0xfb47f2d8,	0x440f46ff,	0x53a2dcfc,	0x1bf83a80,
-0x2d0b22d7,	0x4f518fde,	0xc1d17dbc,	0x7e92459e,
-0x95608150,	0x04486d5e,	0xd30e6f8a,	0x7e5a4a39,
-0xb01dee81,	0x04e7acdf,	0xf7ada4a4,	0x0795880e,
-0x26dc8256,	0x0a5aa3c3,	0x8f029565,	0x2f470e3c,
-0xa373fc51,	0x1c7e7b45,	0x267796b8,	0x1bcb4991,
-0xcec801f8,	0x6c9a6957,	0xc1ce18c5,	0x043c7ab6,
-0x3bd723ed,	0x6093b8ab,	0x2f768aa1,	0x4c6de3ce,
-0x71b2965a,	0x31ed9427,	0xbdab13e4,	0x7e9eba94,
-0x06508808,	0x5867bccf,	0xc0c8c85d,	0x846300c9,
-0x03891b7b,	0xe1150b81,	0x56116659,	0xdff07740,
-0x6eb9e465,	0x3a8a5801,	0xc54290e2,	0xeef47a33,
-0x4c71e22d,	0xd1dcc6be,	0x7075ccca,	0xa14f574c,
-0xfa205fcc,	0x71fd97f4,	0x285b90c3,	0x6f4ec636,
-0xe5fcc6ac,	0xaaa6e7b4,	0xb02d6ce1,	0x8e6fc58c,
-0x0d8c03e5,	0x5f1490ac,	0xa7c85aa5,	0x079a36a1,
-0xcf0a5098,	0x596d1e33,	0x23a0615d,	0x90b97898,
-0x7bc12833,	0x5c6b310c,	0xb72adacf,	0xff8538e0,
-0x750587e9,	0xcda7274f,	0x7e439b7e,	0x57e0932f,
-0x3fc98dff,	0x92a8077e,	0xff3c4325,	0xee308b69,
-0x72caf71c,	0xb2f163f8,	0xc024caa2,	0xa86d0b31,
-0x41e7bc48,	0x1c34e4e6,	0x8d2082c1,	0x79732888,
-0xce59daaf,	0x92755a37,	0x76394314,	0xa23c081c,
-0xd3b089f6,	0x99827d27,	0x3a4ae173,	0x2a3e8487,
-0x20bbdf78,	0x7a48f87e,	0x223e1ce6,	0x4579c5e7,
-0x03e1a14b,	0x28f640fc,	0x3bd0f8b0,	0xe005b408,
-0x8c289156,	0x83a0f027,	0xee139c51,	0x630fd758,
-0x7e7b2a23,	0xe8460ecc,	0x9ffa8bff,	0x53380048,
-0x0afa3850,	0xb1bf8f67,	0x96a14fc6,	0x44b25a59,
-0xd82b8d56,	0x4c882db3,	0x0f2fa046,	0x90bed183,
-0xbe9e1fb1,	0x5f4c0686,	0xed5cc524,	0x2650ed51,
-0x59164cc3,	0xb6af6348,	0xcb09a53c,	0x841e16d2,
-0x73bcae6c,	0x2f19b19b,	0x7c974049,	0xa8a81c25,
-0x2606dbbf,	0xbcb3a630,	0x87274992,	0x66d21787,
-0x2cb53251,	0xbb04cccd,	0xf8b53f17,	0x58751075,
-0x9264e9e6,	0x431412f5,	0x6fb4b734,	0x2361e760,
-0xd42e17d0,	0x7d9077e3,	0x3e73d73e,	0x70c66cf7,
-0x477e7d07,	0x330f4048,	0x26ba1aff,	0xb035e29e,

cpu/intel/model_f2x/microcode-m04f241e.h

diff --git a/cpu/intel/model_f2x/microcode-m04f241e.h b/cpu/intel/model_f2x/microcode-m04f241e.h
deleted file mode 100644
index 5d347ca..0000000
--- a/cpu/intel/model_f2x/microcode-m04f241e.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m04f241e.inc  */
-0x00000001,	0x0000001e,	0x06052003,	0x00000f24,
-0x9ba58d71,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xffffffe9,	0x5715f121,	0x440ce2fa,	0xd5d090eb,
-0x70b3e977,	0x92320e8c,	0x4f989906,	0x36907442,
-0xcc4b12e2,	0xb456a6ae,	0x0ad5bcf7,	0xe9f0a425,
-0x70b932d2,	0xe66202c9,	0x350f884b,	0xd560a828,
-0x5c4c5cb4,	0x7b142329,	0xd9e25719,	0x98b1dbb0,
-0xb11af93f,	0xe83b07eb,	0x9b6d35a1,	0x0df761c2,
-0x1a5e6da5,	0x3c978798,	0x08a7acd8,	0xd20a3b15,
-0x0aaeef40,	0xa4ed3a47,	0xb8d15785,	0x2ac39380,
-0x153a5ad7,	0xeddc8222,	0xc02510f4,	0xc7cdc21c,
-0x09adfdce,	0xf4dc290a,	0xc6e2f5bc,	0x8e60359b,
-0xf097f2fd,	0x24ac2ac0,	0x770ecf17,	0x9f80b3f0,
-0xf250a757,	0xad071b7e,	0x51d432ef,	0x3c095fc8,
-0x3574394a,	0x23e0e092,	0x8c9e2505,	0x927dc9fb,
-0x3bfcface,	0xb93be3de,	0x46c03521,	0x00192a46,
-0xc6a53c55,	0xfcdbb872,	0xb56349f6,	0xf0bf598e,
-0xe86afccc,	0xef930d0a,	0x905ada75,	0x9508c261,
-0x8a8cb340,	0x5010a4fa,	0x92437678,	0xa7799056,
-0xedd0ea8d,	0x3c25bdc8,	0x914f3f08,	0x27ff4d02,
-0xd104ca12,	0x972d1570,	0xadb4a6f9,	0x34f31516,
-0xb0aca99e,	0xd05b7382,	0x5fcaeecd,	0x83edf7c4,
-0x1b15099f,	0x14146a3c,	0x6150ae4a,	0xd8715907,
-0x6d405215,	0x307ebd9a,	0x248fcdf4,	0x1650a34e,
-0xa8070739,	0x5fde05cc,	0x1a9433c3,	0x3f5770d9,
-0xcedfa47f,	0x1f3c7660,	0xa3bdf9f6,	0x3a2d9d3b,
-0x01833189,	0xfebaa041,	0xbc4bf2c8,	0x50c5f238,
-0xb132e653,	0xd301e92a,	0x2b094386,	0xfdb557b3,
-0xd4ed60d6,	0x75da1146,	0xfedf34fe,	0xa21665bb,
-0xd6b6d496,	0x46d9c114,	0x20f26f66,	0x5ee354c2,
-0x801aba92,	0x0973251a,	0x63748328,	0x01b293f4,
-0x1a13ec73,	0xf17ea3dc,	0xcaf6a499,	0x1cd356e3,
-0xa6b450be,	0x6200d2b7,	0xc4b88872,	0xf6aa6f70,
-0xdbc917f9,	0x1cf3d760,	0x5d60d15b,	0x48c2407e,
-0x9210b35a,	0x171df657,	0xfb14733d,	0x1c837746,
-0x6df3dd50,	0xc096efa2,	0xa9202472,	0x56917067,
-0x40620e92,	0xd739c7d4,	0x89cce286,	0x8882ee44,
-0x2362cb14,	0x3e03d986,	0x6519adee,	0xd7aec296,
-0x23a91210,	0x77229af4,	0x97fd4c79,	0x422707b5,
-0xbea05034,	0x2ef3b3a4,	0xe3291146,	0x40a0cc32,
-0x96b557c6,	0x5aa836bf,	0x9dff3965,	0x31e80540,
-0xa0556e13,	0xc08b88ca,	0x3f3e1144,	0x4f093862,
-0x96bc622c,	0x497ec377,	0x992d7899,	0xf881becb,
-0xc65d3299,	0x827a9be4,	0x78b851b6,	0x8314b5d1,
-0xeda31b10,	0x471764db,	0x905d2df0,	0x19e376c0,
-0xcf6af8a5,	0x4355d3d3,	0xb2033a88,	0x00f2c0d6,
-0x537a95be,	0x6938a3c7,	0x8d85a10e,	0x19f996f8,
-0xe5334524,	0xec2cc18b,	0xc540afec,	0x14206bbe,
-0x89601729,	0xf21d5916,	0x11c39ad0,	0x93a73d2f,
-0xbd8a681e,	0x3d62394c,	0xe43d9c1a,	0xb1b85b09,
-0x48e87b21,	0x3dc66cb4,	0xad066e73,	0x745fb4b0,
-0x47f5cdd2,	0x28e9dc7c,	0x94515ceb,	0x3a94e085,
-0x0fcdb0e4,	0x55cdbb93,	0x38d990f1,	0xa8f13bff,
-0x497471f6,	0x4e74b9f0,	0x6212615b,	0xec6ed687,
-0xc984443e,	0xd3852197,	0x35ee920a,	0x690a7b44,
-0x4c2ad071,	0x8b9e3890,	0x4114aba9,	0xea796a19,
-0x0d968acc,	0x97709071,	0x20274074,	0xcecfce72,
-0xbfdde5ee,	0x4d694e1e,	0x800d6bfa,	0x969027a0,
-0x9417fe60,	0x9cadfc0e,	0x6a103bda,	0x375fc4e8,
-0xf309280c,	0x945f197b,	0x5cb77b5d,	0xdf5d5708,
-0xced4272d,	0x6b04b696,	0x78e44dc2,	0x8c41f9d4,
-0x92650f39,	0xae3d250a,	0x07c91401,	0x1ca1360b,
-0x2078a46e,	0x7e0b1a9d,	0x5a667dd3,	0xefdd072c,
-0xeee2f749,	0xc1115ebd,	0x743c2890,	0x525d7fa8,
-0x4d86d130,	0xc4470f2f,	0xcbd9dc73,	0x88230f84,
-0x7476f692,	0xbcdeb696,	0x981f3fd4,	0xba7f6c3a,
-0xe073e123,	0x1dfb3790,	0x6ab7fc48,	0xc519cc6e,
-0x5383ddda,	0x964da863,	0x1d041e19,	0x5f2288d4,
-0x5ff7c34d,	0x73a197c1,	0xd086d7c9,	0xb0314861,
-0xbc63a785,	0xe072a384,	0xf37e9d90,	0x63a7a4ac,
-0xa33622ab,	0x802471f9,	0x0841f065,	0xff4ea8fd,
-0x343caaaa,	0xcb8594f5,	0xf5756925,	0xcc946e7e,
-0x9043d824,	0x49812185,	0x1f555515,	0xb62ffebf,
-0xa27e379d,	0xa2386704,	0xaf19ccbd,	0x644130f0,
-0x29abc386,	0x7d044e0f,	0x5274c8e1,	0xc8298400,
-0xc08a2e85,	0x8f13dec2,	0x79f40342,	0x10ed42a2,
-0x75541795,	0x9c9608c5,	0x11798ba6,	0x9a7e40ff,
-0x4e44f869,	0xb0e0ac45,	0x9865be8d,	0xc361cdf1,
-0x88cf2cf2,	0x5cb47192,	0xceaeb1a6,	0xd6c4b77e,
-0x567e8aae,	0xd0eaf865,	0x30a9e8f4,	0x049e1005,
-0x96c4842e,	0x4d97f912,	0x2837581a,	0x8dd154c0,
-0xe88f85e3,	0xd5b8c4bd,	0xf6ae181c,	0x524a4d74,
-0x17e15bed,	0xa200218f,	0x241d1c1b,	0x9efc70a7,
-0x9e1adbae,	0xf115df9e,	0xda54c448,	0x8fe3ebc3,
-0x0b312745,	0x4f0075d9,	0xc2867e55,	0xa19131db,
-0xc244a076,	0xbfd954bc,	0x65a49f64,	0x3e99ece9,
-0x80940945,	0x626f0b5f,	0x683bb192,	0x9fbb14c6,
-0xe4136229,	0xd76f54e7,	0xd8b2b363,	0x049f372e,
-0x5f391828,	0xbf27f2b8,	0xc9ba89f6,	0x83047de6,
-0x6b9816c7,	0xa37232c5,	0xe86bda74,	0x8c426e07,
-0xfca755b4,	0x5d7f53d6,	0x6a123e2e,	0xbef86cef,
-0x0ff79e5c,	0xc160e69f,	0x3d9332ee,	0x14b3246c,
-0xb1ee9faa,	0x72827d5c,	0x825683a2,	0xbf3143f4,
-0x501cad6c,	0xbb872e29,	0x086f7851,	0x392df63f,
-0x0013ae33,	0xd643c1ff,	0x5dc4b349,	0xcdf75234,
-0x206f8869,	0x9cc8c8b2,	0x872c6d84,	0xc518e0a6,
-0x2bdbed94,	0x2cea60cd,	0xd4542cd2,	0xbf5f7c4a,
-0x03fd6694,	0x857030b4,	0x932ce1f7,	0x1b24d617,
-0x8342fbb9,	0x2484a61e,	0xa76945b6,	0x39c08823,
-0xcc4e48b9,	0x31b73d47,	0xe2699dfb,	0x3f43284f,
-0xce602dfb,	0x0b50541c,	0x5ecb56d1,	0xefc75a88,
-0xdba5beb3,	0xe0e80051,	0x11360a93,	0x27cc6d6a,
-0x884a2e79,	0x4c5c9256,	0xe2c4c758,	0xf2422d67,
-0x2736306d,	0x60f34846,	0xf41738eb,	0x9286cbe5,
-0x27f5c292,	0x410fae37,	0x980f0a33,	0x2522d4db,
-0x5c5b5beb,	0xdbd795c2,	0x2fcf3eb9,	0xf13709fc,
-0xc76339cc,	0xfef3cf76,	0x152585dc,	0xc321c271,
-0x2731085e,	0x676bce0a,	0x93299b87,	0x76e24635,
-0x2dad2f9f,	0x4ee82851,	0x45f18669,	0x85a46c9c,
-0x430f4c5e,	0xa95cbcc9,	0x42f64717,	0x532ec8ec,
-0x2bb74e8e,	0xb23de16c,	0x211fa366,	0x8d3254ae,
-0xa950af8b,	0x18a677a5,	0x15efecfd,	0xdf69f07d,
-0x8452ab6c,	0x5406396d,	0x88dc53e6,	0x8a0085ac,
-0x0d99aeef,	0xcd61d2de,	0xdbef2853,	0x61666ed3,
-0x204f160d,	0x954367d9,	0xe98d05bc,	0x8dddc5e8,
-0xf67b6d6e,	0x18ce6930,	0x2547eb2b,	0x9f3a4858,
-0x8ea6adfb,	0xb1469ac9,	0x67e08b98,	0x50ccc5ad,
-0xd1ef2c5e,	0x15d5d2f7,	0x167b96b6,	0x6c7cf41b,
-0x9e4a7bba,	0x2b09511b,	0xa05187c3,	0xd6c93b77,
-0xe5d5a827,	0x7c0c4a12,	0xe20c53f3,	0x04bebe94,
-0xfad3cb34,	0xa410ba0c,	0xa0d19f1a,	0x3f802e05,
-0xc42673c4,	0x2b9414ef,	0xd17334b0,	0x21f0bc8e,
-0x4bdc73b1,	0x37dad34a,	0xba9ee740,	0x98cb9b36,
-0xb0f63a1c,	0x3cef6043,	0x9c5247e2,	0xbc165396,
-0xf5686c77,	0xb2dec708,	0x3b3e979b,	0xa1b35fb1,
-0xb41af92a,	0xf8f22ace,	0x5ebd44c1,	0x4c133891,
-0x997d6952,	0xa2fd9241,	0x1a81ea5e,	0x612d0955,

cpu/intel/model_f2x/microcode-m04f252b.h

diff --git a/cpu/intel/model_f2x/microcode-m04f252b.h b/cpu/intel/model_f2x/microcode-m04f252b.h
deleted file mode 100644
index 43cc00d..0000000
--- a/cpu/intel/model_f2x/microcode-m04f252b.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m04f252b.inc  */
-0x00000001,	0x0000002b,	0x08112004,	0x00000f25,
-0xe4dcce66,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x017464fa,	0xd2fb3494,	0xaf1850af,	0x5af88989,
-0xd3a0a9dd,	0x8e8bd3ad,	0x8c288786,	0xf15f02b0,
-0xf51c1471,	0x6c675200,	0x9c63f3e5,	0xbeb2d710,
-0xbfb6d14e,	0x6ba07894,	0x4b08036d,	0x71a24d5a,
-0x953125c3,	0x2cee5c1f,	0x744a15b1,	0x43a6f67c,
-0x66087dce,	0x58bc5f0c,	0x09c1f187,	0x29065a8c,
-0xb46dcc30,	0x597c4675,	0x2ce2fd55,	0x7329e04a,
-0xe92adf75,	0x0a4f1f59,	0x6939b7e1,	0x586b6cb9,
-0x9e9090f2,	0x612aeaa6,	0x908cfbac,	0x381a3a1d,
-0xc0028180,	0xe7759a09,	0x9a41f6d0,	0x49004723,
-0x447b0a1e,	0x84cea1bf,	0xdb6cfd61,	0xfa3fe8a1,
-0x60569cec,	0x4ed55542,	0xc40d1fbb,	0x9766fe4a,
-0xbffcd59e,	0xc0ec45af,	0x34da2fa6,	0x57a8f38b,
-0x7cf8ab33,	0x991f0a4b,	0x83c635f3,	0xfaa6b412,
-0xd6cfe7cd,	0x7eb7773c,	0xda12abb8,	0xae7f78c6,
-0x0c82ad31,	0x28e15d48,	0x80a0cf1e,	0x6b8a9a75,
-0x1a9aa64f,	0x4a2969ee,	0x9273d48d,	0x7179df33,
-0x06fc27f8,	0x7de9a40b,	0xaaa80cac,	0x83d82561,
-0xe0646103,	0xa72284fa,	0xb39b5822,	0xed08ed9d,
-0x95760781,	0x2f84666f,	0xd1d45bed,	0x96a86c3a,
-0xe4679e8a,	0xfa71d608,	0x86baebc4,	0xf116edb0,
-0xd3a7263f,	0x237b4f06,	0x794f33e6,	0x0d783309,
-0x2df3bb25,	0x02a800b8,	0x97b8ce5a,	0x2123dc61,
-0xee1a5dbe,	0x185cf436,	0x84e325f6,	0x163e3ac3,
-0x62288e57,	0xe5901f0f,	0xef985c3e,	0x1b9291fe,
-0xb58de2b0,	0xe69eeadb,	0x42eefa7f,	0x0472359e,
-0xb1fd90dc,	0x49d374d3,	0x49684482,	0x1156a2ac,
-0xd0a6114a,	0x995f94a6,	0xbcf9ed4f,	0x51d161c3,
-0xcc68e39f,	0x3d050ca9,	0x8cd08b93,	0x6ed69d22,
-0x5fd5cc93,	0xe2783743,	0x5a1816c3,	0xda5a0ea4,
-0x9b5c7903,	0xc25d6a23,	0x25cd54ee,	0xe1ab0174,
-0x518ffebc,	0x28125044,	0x7ff130d8,	0xfbea3a8d,
-0xe093582b,	0xf60baa3d,	0xe4674a15,	0x18a6322c,
-0x21cfa3bf,	0x71a1a376,	0xdd4de139,	0xed578831,
-0x0ab06a62,	0x9cee036d,	0x11ee0350,	0x62ee22d0,
-0x83681acb,	0xef69ded4,	0x65000a40,	0x9ac7ab74,
-0xd76792db,	0xf2e662f2,	0xdcae14a5,	0xfa39ba60,
-0xf746cf70,	0x0bea4f1b,	0x9b384717,	0xf8dafd90,
-0xb2ffc2ab,	0xf3fa97e4,	0x5f22e0c3,	0x04536e9d,
-0x22c99598,	0x34631815,	0x9fc99bfa,	0xfe067ae7,
-0x03fbd87a,	0xdc73bcd2,	0xc49a0fbc,	0x3138c419,
-0x62643c63,	0xfa2597c7,	0x4c84afef,	0xdba2817e,
-0xe818ed14,	0x74a5ad6b,	0x9cf3ced5,	0xf633dd12,
-0x4ba39a46,	0x8b37b668,	0x65637f55,	0x67c7ce04,
-0xe860a2e3,	0xf264ba03,	0x47b91726,	0x887f4d41,
-0xb10685e0,	0x95958791,	0xcb835bbc,	0xf1af6594,
-0x42fb5a5b,	0x78ff5368,	0xb201a575,	0x8a6b189c,
-0xc3f6e3a0,	0xe2bb320e,	0xd75004dc,	0x735b0c3b,
-0x70ccd09f,	0x4d157775,	0xc0663e58,	0xf2170355,
-0x4d86c74b,	0xace253a3,	0x09fedbf3,	0x5288ffb6,
-0xc577a648,	0xf808ffc9,	0x6f1b81ee,	0xa56d4123,
-0x60626a1b,	0xc88b4d17,	0x280e44c5,	0xf56c8ddd,
-0x9110c257,	0x2d65519d,	0xc96c1ad5,	0xcfdea3e5,
-0xa69ea62f,	0xf3ed57ab,	0xbe725f8c,	0x2e3c86df,
-0x23635626,	0x7d2607f6,	0x67fe2874,	0xe64ade4d,
-0x5fe967da,	0x88cb5547,	0x468c3eb5,	0x73313404,
-0x36b6cc3f,	0xf352d0fc,	0xcbd702bd,	0x969a1606,
-0xead2f56d,	0xf4c93dd8,	0xd2395873,	0xe5304e3c,
-0xdbe3e804,	0x1daf81c0,	0xfd6cbdac,	0xfbb07447,
-0x1970d752,	0xff97a936,	0x1cf114a2,	0x03b678d5,
-0x6edaacf8,	0xd4a869c9,	0x6db6f5fa,	0xe48335d1,
-0x6c59f701,	0x2cd977a6,	0x02079375,	0xc573f27b,
-0xd26f8f28,	0xe637b462,	0xb9ef5a9d,	0x2483a550,
-0x8e020039,	0x01d2e9d0,	0x8e69c688,	0xfbf941b7,
-0x86dcab40,	0xe99730b6,	0x0e57bd5d,	0x11ace616,
-0x3a5c73dd,	0xe29052c6,	0x6728d6e3,	0xf5a73743,
-0x6ef89691,	0xffa40f45,	0xd1a1b739,	0xf12697be,
-0xfc849142,	0x1a6daa37,	0xc52c54a3,	0xe600bbb2,
-0x6c90e1e9,	0xf9ba4ed6,	0x118b0436,	0x0d864deb,
-0xa574b526,	0x6f2da0ae,	0x7297e467,	0xe33a4e82,
-0x6e8a340f,	0x9524f758,	0xb7d9d387,	0x67ed6069,
-0x3fcef9be,	0xf3684381,	0xb8012434,	0x86d3a9a9,
-0xdb45b646,	0x8de08c40,	0x37a91d86,	0xfd107ef4,
-0x0b1db4d3,	0x73988186,	0x74b646a5,	0x92e5a61f,
-0x72239610,	0xf9b6564d,	0xce99179a,	0x61ebb35c,
-0xfb2495bd,	0x36ab39d8,	0x7cca0da4,	0xec4b5d5c,
-0x3210c169,	0xda27c02b,	0xd80c5c8c,	0x38518cea,
-0x5daa2473,	0xf15b6134,	0x733e7412,	0xd6a5ae78,
-0x3b0d4f4d,	0xc6304bb2,	0x7f6df8e6,	0xf6b0e912,
-0x2da01433,	0x2cf7b1ce,	0x32e046e7,	0xcd50021d,
-0xe39d167d,	0xef608f10,	0x5d96e85e,	0x38a113a7,
-0x3ce761fa,	0x26a0250e,	0xa27c2468,	0xfd563262,
-0x9f6f6866,	0xda194d33,	0xa5458a6c,	0x32aa53c8,
-0x2517e3bb,	0xe5070380,	0x72d71801,	0xdee77333,
-0x63f71503,	0xe4cc9d5a,	0x1f684f79,	0xebab1828,
-0xcfdcbec2,	0x1913c83c,	0x72abfe52,	0xfcadec5a,
-0x9a32da3e,	0xf730dc13,	0x529ec685,	0x1d558dfa,
-0x3fb232f2,	0x041148b4,	0xd10bb0b7,	0xeb6821e2,
-0x070d709f,	0xf92b67a4,	0x6d6af041,	0x1724d766,
-0xf21a821d,	0xea6e49d8,	0x9d30cef2,	0xe0c055b1,
-0x67901316,	0xb37f63f9,	0x5984e1b1,	0xf83466f0,
-0x1404ac22,	0x4345d90c,	0xa14ef8b7,	0xa812e742,
-0x62593a25,	0xf08c3643,	0x3b376203,	0x5ddf0e1a,
-0x429c87d0,	0x31c7a9f9,	0x18f25314,	0xf55e9515,
-0xd26dde06,	0xd07605c7,	0x51877d68,	0x31054918,
-0x668e3ae2,	0xe273138d,	0xef9b9beb,	0xcf19359e,
-0x7ccb675b,	0xca018219,	0x1a614824,	0xa1ac60f6,
-0x512484e2,	0x249d2429,	0xa4e02fce,	0x85c52616,
-0xfc3e1b33,	0x11885bef,	0xf1729589,	0x78342f7a,
-0x3a115d84,	0x74698c2a,	0x59b804d6,	0x96598928,
-0xeafb3b9f,	0x788556ba,	0xf956a1c4,	0x5ae7d9b0,
-0xe86bc7d9,	0x7483aa3f,	0xa2126202,	0x5852027c,
-0xbb2db21b,	0xdf7dcaec,	0x3eaa745c,	0x49390086,
-0x60575f57,	0xba173f97,	0x90bd11ab,	0x0db322ea,
-0x2a57df73,	0x89157540,	0x57bdf2fb,	0x32b0919b,
-0x135b0600,	0xaaeb1076,	0x2a7b30ed,	0x73f755fe,
-0x81650eb2,	0x4640b0f0,	0x6f89926c,	0x4bd8b89b,
-0xb8233621,	0x24a33dcf,	0x1a6bbb69,	0xeb01530f,
-0x24467581,	0xc5175ba1,	0xbb207fb0,	0xd83e142b,
-0x2572acac,	0xf7488d93,	0xddfe99cc,	0x342c0d4f,
-0xb209b00f,	0x33ebdadd,	0x35e3fd3b,	0xc26470f4,
-0x643a91c0,	0x2386187a,	0xb7048f3d,	0x4bccd894,
-0xda15e11f,	0x3b8e9fc3,	0x3f1b93fd,	0x70b9260a,
-0x46ef3c91,	0x4d1f9631,	0xe777bd31,	0x8728acdd,
-0xcd8012a2,	0x8da6d62f,	0xcaedab69,	0x52c56c21,
-0x93472485,	0x87f85990,	0x9587f5f0,	0x0b23b2a1,
-0xcd23beab,	0xad81ef05,	0xe7db963d,	0xc6687827,
-0xa7847334,	0x12a35621,	0x57c2f21b,	0xdd2bbaf9,
-0x59650ce7,	0xd7665e53,	0xedc98b5b,	0x094ae33c,
-0x4724f7cc,	0xd8be3c08,	0xd803dbbe,	0x19cbd745,
-0x74adc92a,	0x088c82b2,	0x9a6b9ed5,	0x49da3d33,
-0x0f75b8e6,	0x021dacc8,	0xdd100353,	0xf5a7226b,
-0x6141e3ca,	0x443b676d,	0xb113e9f7,	0x1141f839,
-0xa6e4e487,	0xf7a239c2,	0xad0e3019,	0xa33ef735,
-0xe9c6134d,	0x12cb0f2b,	0xd2266ee2,	0xa5bf6017,

cpu/intel/model_f2x/microcode-m04f2737.h

diff --git a/cpu/intel/model_f2x/microcode-m04f2737.h b/cpu/intel/model_f2x/microcode-m04f2737.h
deleted file mode 100644
index e2b45a3..0000000
--- a/cpu/intel/model_f2x/microcode-m04f2737.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m04f2737.inc  */
-0x00000001,	0x00000037,	0x06042003,	0x00000f27,
-0x972cd5fa,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xffffffe9,	0x0000005e,	0x96f952a6,	0xaa368f02,
-0x53d271e6,	0xf8286513,	0x484b4e9a,	0x9e0c09c2,
-0x03b11314,	0xdfb67c98,	0xa2957d16,	0xf07f25de,
-0xb84a2555,	0x72ec8b35,	0x3445c734,	0x7744f543,
-0xc3da0cc0,	0xeb36172d,	0x8b2cf574,	0x29c867a2,
-0xe79dfaf0,	0x54714bb5,	0x524dfb69,	0x0df65433,
-0x0b95ec14,	0x3dc09ca2,	0x584ba068,	0x2aa558ce,
-0x8cd679c8,	0x3b2609d0,	0xa06306d1,	0x80bfa93a,
-0x482678d8,	0x0cdf1ce6,	0x5ec4e912,	0x8a19f7a6,
-0x76f215be,	0x577d92c2,	0x479cd4ba,	0x63d1f415,
-0x5af98bc5,	0x8889bb4f,	0x8e70943d,	0xb5528299,
-0xfd63e347,	0x836fcfd0,	0x4951a701,	0xf4613cdb,
-0xaa7c2f52,	0xa0e290c7,	0xf646a80b,	0xda5b5a03,
-0x93517b47,	0x553d99d1,	0xafac198e,	0x486b6c6b,
-0x4efa01d8,	0xdc6ce226,	0xdac3a149,	0x9b7cf27f,
-0x6c6246a0,	0xb6055a39,	0xb68cc841,	0x87b6adee,
-0x1c36edb4,	0x3ee76d20,	0xdbffab67,	0xed12fda6,
-0xc1aff2f2,	0xc110932f,	0x0933ccfe,	0x58fa2281,
-0x285d5ec1,	0xd05b216a,	0x76315645,	0x570c5c8f,
-0x6cc52f1c,	0xaa977e52,	0x066f4e03,	0x812bfd2c,
-0xbfbfd7a9,	0x70828199,	0x60182af7,	0x2a04e000,
-0x30f413b7,	0x327cef32,	0xac73aa51,	0x7c418d9f,
-0xf493ce0e,	0x6c14258d,	0xa5e2755e,	0xd39f994a,
-0xee638b08,	0x55d50476,	0x9b7afc5c,	0x5da2ed13,
-0xb75bf9f4,	0x2606c01d,	0x8a1d00eb,	0x0f73428f,
-0xb29c4fb4,	0xac13e554,	0xa7648fe0,	0xbe56837b,
-0xd34fa9ff,	0x59c855a2,	0x7d3cc7d7,	0xb5b0cb50,
-0xe6626c0b,	0xf07010b7,	0xd8054587,	0x01a5327a,
-0x3ceae28b,	0xa3bf737f,	0x3d1a37e7,	0x6ce48d1d,
-0xc9d91222,	0x42f28fae,	0xe8dff3e4,	0xfd6898d0,
-0xe772ab47,	0xbe452c12,	0xf188ee09,	0x08edb79c,
-0xad4d48fb,	0x5cb75d1d,	0x251f4e02,	0x6b7bb6e3,
-0xcada2f09,	0x536d74eb,	0xacfa627a,	0x51e2ffd2,
-0xe4655767,	0x311dbbec,	0x1011b68a,	0x6f6e8deb,
-0x4298665d,	0xc0522b3c,	0x2c3a19dc,	0x2c48f2ae,
-0x49bca621,	0xb6a747fe,	0xa1606c81,	0x9b2a5318,
-0x0ac114c3,	0xb5b35aa0,	0x3f4ee00d,	0x8b427e75,
-0xb539fcd3,	0xa99fba84,	0x821fc647,	0xe0ac6d6e,
-0x912f6f88,	0xf2009cd8,	0xb32330b3,	0xd0b80514,
-0x6f25f157,	0xdba2f463,	0x88ef17d1,	0x147c5f21,
-0x6e29cd75,	0xec14e5d1,	0xdcfffd24,	0xccc2c510,
-0xe5e40798,	0xb24814e1,	0xaf0cdaf2,	0x825cf5e2,
-0x12acac6b,	0x439c5f36,	0x0c533619,	0x8e776e71,
-0x319b44f5,	0x19c0b404,	0x54111b2a,	0x6a767513,
-0xb16944ef,	0x30ef18ce,	0x85df0862,	0x0737ff49,
-0x77fe06f2,	0xb2de0d2f,	0x71625e95,	0xc722c5a2,
-0x03b401a9,	0xe8b030b4,	0x7f9e62ab,	0xbff8c966,
-0x726bfeca,	0x6adf3831,	0xab85067e,	0x5167e87a,
-0xb06ad00c,	0xdd974309,	0x5704880d,	0xb7279a43,
-0x38aeda19,	0x52f5a31f,	0xd66d79e2,	0x83dad3db,
-0xa138d066,	0x0b4674d4,	0x07e7dd7a,	0x7f5c70c7,
-0x4aade5f0,	0x4fcd220f,	0x2ae8ab6f,	0x6fb11f68,
-0xbf134ecc,	0x71d3125c,	0x3cc3f6ba,	0x92809507,
-0xb4a9b236,	0x97a2ef5f,	0xe20e5f23,	0x5610bfa9,
-0xad16eba9,	0x5207dfba,	0x0caa3d20,	0xc57cccba,
-0x7983d15d,	0x09ced949,	0xec698959,	0x53a4b153,
-0x63c74107,	0xacf58270,	0xbc2982cd,	0x42bf9c41,
-0x26aff8b4,	0x9832bd6e,	0x34e98158,	0x434f0f43,
-0xcb80ccda,	0xd81471b6,	0xbd176071,	0xab13735c,
-0x4e80e2c1,	0xcf7815f0,	0xb4e6ae37,	0x1a90c457,
-0x79426d6f,	0xa4ac1e2c,	0xf76de77b,	0x1808cd61,
-0xd72ea071,	0x1f02af0e,	0x9613b531,	0xe83f2e9a,
-0x99a5262a,	0x0e8a756d,	0xbc229ac4,	0x2cb1af6b,
-0x8a8720d6,	0xc84d2c77,	0x8547ad96,	0xeb794e72,
-0xb51119ea,	0x1c0121ea,	0x9f8ae83b,	0x16459999,
-0x5c17deaf,	0x278a3e3b,	0xf2bbb704,	0x54df1a00,
-0x521ef94e,	0xd40de734,	0xca5badee,	0xa2fe3027,
-0x2ffe3ada,	0x1df00fb9,	0x5feb168c,	0x81674308,
-0x99713c0e,	0x56aae017,	0xe62e68f3,	0xaa15163a,
-0x31ac7b10,	0xe6a86d9c,	0xa006782e,	0x9baefc91,
-0x111277d5,	0x80f63a4b,	0x624044d6,	0xd91a5de5,
-0x5d0255d6,	0x92b82310,	0x08faf5e5,	0xe482ff69,
-0x0a1f1757,	0xdc010e34,	0x9cd07e48,	0x677fcfa3,
-0x0384138d,	0xa104220a,	0x5431c7ec,	0x0e8b7efb,
-0xf1ebcd61,	0x97ae7029,	0x191ff006,	0x4308b147,
-0xa11e05f7,	0x2c7cb5a4,	0x1d345971,	0x28d23638,
-0xc5a7a5bb,	0x3307c971,	0x0d3782ae,	0x2b798842,
-0x1fc27334,	0x4ff82ddb,	0x543ba685,	0x47732c7a,
-0xad094a6e,	0xb8ff60e4,	0x43f9ee2f,	0xe9a114e8,
-0xf036be6e,	0x3fb488a0,	0x280b2d46,	0xb1887c58,
-0x54ae583a,	0x454b6ce6,	0xe617a2c1,	0xb9335ac3,
-0x72361e12,	0xc856637a,	0x741b6cbe,	0xcf1f6f25,
-0x9f405fff,	0xd2525b02,	0x22d8b05a,	0x16860f11,
-0xb02983e9,	0x388b9c2c,	0x196cb2f2,	0xfca5f1a2,
-0x9e60965d,	0x5bed99ff,	0x59e361fc,	0x9361bde8,
-0xa1527365,	0x3f300237,	0xb0f5e2b8,	0x8fb00a40,
-0x71cb9744,	0x3327e8d3,	0xe89994d4,	0x3987e389,
-0x28c6d8f7,	0xb2ba9fc4,	0xdf109e0e,	0x622634b2,
-0x4904a82e,	0x576c3c2f,	0xe95eae46,	0xfb773013,
-0xf98b91de,	0x4edc30d5,	0xc6e60080,	0xebefab96,
-0xd7684df2,	0x9cd2c3e1,	0xd433902a,	0x7b9aa9eb,
-0x3c99cbaa,	0x5a0fa53d,	0x77297830,	0x869db621,
-0xaee2d56a,	0x2ce907c1,	0x0aa5097c,	0x662e7862,
-0xa5bfbc61,	0x2610f3bf,	0x3a741865,	0x99a5836d,
-0x2e533e3b,	0x812aa485,	0x0d7eb66d,	0xb325db47,
-0x6ac77937,	0xa1757eb7,	0xb7765633,	0x8845f18f,
-0xde7e37f8,	0x08a17789,	0x8af720ca,	0x1f7a530f,
-0xadcbb072,	0xd02e2dae,	0x16fbe58f,	0x0e4df085,
-0x80663766,	0xdcff020e,	0x4c242d70,	0x3d16d122,
-0x154a029b,	0x40c95a2e,	0x5f98eb6f,	0x637ffc42,
-0xcdf10a5c,	0xf2211055,	0x998ddc8b,	0xcee90fd8,
-0x1ddc7fad,	0x7034d80c,	0xf5bf0592,	0x479205bc,
-0x0900e9c9,	0x7bef8c77,	0xc128cebf,	0x9e7dd814,
-0xedca7a5e,	0xf15af942,	0x40e55228,	0x065ea7ce,
-0x9603da92,	0xa6611211,	0xea9dad76,	0x4fd9d974,
-0xea19cb68,	0xeabf508d,	0xd460f6c0,	0x3951733a,
-0x249a4453,	0x04356966,	0xac6ec71e,	0x5253e669,
-0xfca78245,	0x8ef4d888,	0x6c031fef,	0x8c49e3df,
-0xc426b290,	0xfcfd6f10,	0x3a350c13,	0x79790fb9,
-0xe9df4ade,	0xd06233f0,	0xe05f0f19,	0x5fb73288,
-0x43d01849,	0xd9eb862b,	0xb1510767,	0xcbbe3725,
-0x858ac14f,	0x01a0fd53,	0x16a566c9,	0x7d85d87c,
-0x6a29b505,	0xc6134b4c,	0x5d528018,	0xfd7f8efe,
-0x34268400,	0x98314e02,	0x97b0ed0a,	0xec85ca3f,
-0x4dcf5ffc,	0xfb122fc1,	0x04e5a370,	0x8d3040a4,
-0x5c2bcad4,	0x6feb287b,	0xe30f7860,	0x631d7a5a,
-0x766b9c79,	0x971e2fda,	0x2f7000fd,	0xbd3b9a59,
-0xa56dd367,	0xb3deef76,	0x8c2bbcfe,	0x756ec279,
-0xbfaca177,	0xb86ab4f6,	0xb3f82039,	0x93231bfe,
-0xc8409b8d,	0x16cca28f,	0x367c7562,	0x974a6ace,
-0x0101281c,	0xb61716e2,	0x85ef5a4a,	0x78807b55,
-0x009828be,	0xd92cee5c,	0xe8e675a9,	0x368ec88a,
-0xbdb4d170,	0x9f15e2f6,	0x8b53ad97,	0xeedd0bbd,
-0x38f1c5c3,	0x0bf12b39,	0x1f38b2ee,	0x1b6b39a1,
-0xa5e3b7c5,	0xd30fde23,	0x6aa07a5d,	0x2426b2bd,

cpu/intel/model_f2x/microcode-m04f292e.h

diff --git a/cpu/intel/model_f2x/microcode-m04f292e.h b/cpu/intel/model_f2x/microcode-m04f292e.h
deleted file mode 100644
index c7c4dec..0000000
--- a/cpu/intel/model_f2x/microcode-m04f292e.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m04f292e.inc  */
-0x00000001,	0x0000002e,	0x08112004,	0x00000f29,
-0x7695d4dc,	0x00000001,	0x00000004,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x3329bed4,	0x074ca74b,	0x76a4c9be,	0xb3d0ac3b,
-0x59c1ebd3,	0x9d06facf,	0xa272f2b8,	0x185d2aed,
-0x1dbb2394,	0x86f96351,	0x12652c86,	0x873bf0a8,
-0x4f6956f8,	0xbc5754f1,	0xd43f9485,	0xb0484217,
-0x88993f58,	0x071366b3,	0xbb49ef1d,	0xb8ec50b3,
-0xd6dd7d67,	0xafae9594,	0xafbcf523,	0x04e3cefb,
-0xf6125942,	0x6c58f3aa,	0xa28b05f4,	0xbb31e4f0,
-0xde633bba,	0xc2cc4d76,	0x2fc95cef,	0x465474bc,
-0x6148f606,	0xa8245d1a,	0x167d68d0,	0xc38533b2,
-0xcbfb5881,	0xb912dc66,	0xbb9cc137,	0xbaa2ca73,
-0xa9cee564,	0x3edd2b89,	0x2e3ffeed,	0xa68b49eb,
-0x0b85b10b,	0xb968370f,	0xd5c4deb8,	0x2d2883d4,
-0x288e44af,	0x37b10c8a,	0xa75c2ef5,	0xa5242ad7,
-0xff96f783,	0xab3f2161,	0x3921290b,	0x1094e053,
-0x9eae586d,	0x9878a4f3,	0xa2d41b7f,	0xb29cc218,
-0x93898d3c,	0xdd152eec,	0x638ab207,	0xa7536a0f,
-0x5accf54d,	0x798a56a0,	0x8e925de6,	0xe2fec0a0,
-0x8b6100f7,	0x910d43f8,	0xb3bcb1ab,	0x3f032f10,
-0x667b024d,	0x5303ab2e,	0x50a68459,	0xdbdae9ae,
-0x61cab195,	0x8b080d7b,	0xe1c9c484,	0xc0a9cc33,
-0xf3c786cb,	0xa226e2f7,	0x4509e980,	0x2ff4bb80,
-0x943a2b9b,	0xb0e2d78c,	0xdce9f9df,	0xb9302df9,
-0x2f095be2,	0x46f9e8cf,	0x097129ec,	0x5f7ba01f,
-0x49e26e4c,	0xde9ff6ce,	0x5d194de6,	0x9114a73f,
-0x5114f3e1,	0x9832e8b3,	0xd116f967,	0xfcddf0e7,
-0x3011f78c,	0x5d84b6d5,	0xb465a082,	0x8eb129ad,
-0x5390d983,	0xdfad741a,	0xef927af0,	0xa062e4fd,
-0x94a1b0f5,	0x6c9dcff9,	0x15192e6a,	0x11a1f0b8,
-0xbc5f9758,	0x01c1070c,	0x6f5a81c6,	0x7ee5b238,
-0xdf75b957,	0x8b5cbac1,	0x5f7cd16a,	0xf7faa6dc,
-0x5b74dbb5,	0x0980f147,	0x4aa350ab,	0x7e96c732,
-0xdaeacc94,	0x29fd397d,	0xf62b5325,	0x3c519a56,
-0x5dbc6524,	0x201364ea,	0x05ee717f,	0x39c8c28c,
-0x9ab2580c,	0x95550f9c,	0xfb0eb0ac,	0x242c6155,
-0xdd52b4d4,	0xa04672cf,	0xa81f5b28,	0xac10d5f7,
-0xd6afd049,	0x323e700a,	0xb710054c,	0x88b48cc0,
-0x4c1d370d,	0xb303457b,	0xbc5bf726,	0x2dfc0600,
-0xa86d0d2e,	0x9ec95b49,	0xeec42301,	0xa0ddf041,
-0xd3697b0d,	0x1cf23cd4,	0xe511afa1,	0x99677ab6,
-0xcb82d8fe,	0x03d837ed,	0xcf59b6eb,	0x117c6438,
-0x793db420,	0x01210ef0,	0x2f16aa63,	0x092aa912,
-0x188fcfe1,	0x0cd78643,	0x4725f2b0,	0x141b4064,
-0x060cb591,	0xdb59b5b9,	0x08ca7893,	0x03b02ee2,
-0xefdabca5,	0xedc23083,	0x48d71720,	0xc44417e0,
-0xb0f5f326,	0x04e0ca58,	0x1cbc21e9,	0xc47f8d91,
-0x5465c94d,	0x6f5c300b,	0xce250158,	0x39d3ff3f,
-0xb9ba60a4,	0x7e15fc75,	0x6481b42f,	0x4a822d4c,
-0x6b251985,	0x01c3f0ff,	0xb961c2c0,	0x56233348,
-0x4322f327,	0xfaf3a4b4,	0xa5e2f209,	0x0086e35f,
-0x5665e8c8,	0xd284182d,	0x7c66dc76,	0xdead8651,
-0x3948f967,	0x29e2cdc5,	0xa85bf1c4,	0xfc81e608,
-0x95129e56,	0x39e8ccc0,	0x8a55171d,	0x0ca75f6d,
-0x76b3b76a,	0x07063184,	0x40a355b6,	0x0dc9ae64,
-0x2f0bcdc9,	0x3c98d57e,	0xbd9f6fc9,	0x0b3b70e8,
-0x6598b670,	0x98adb5b0,	0xe38efec2,	0x1b72b2a1,
-0xd7760f5b,	0xa5ff1aa2,	0x21d65a27,	0x85170ab7,
-0x4f19b28e,	0x147ab845,	0xc61a001a,	0xbf15e323,
-0xbea79403,	0x0e9fd315,	0xa5ce5dc1,	0x3dec0102,
-0xe344f20f,	0x26772148,	0xe3c335c8,	0x14698661,
-0x02045f22,	0x1b9fe294,	0x18fd4760,	0x2b0dcc84,
-0x3719068f,	0xe16a4bd5,	0x69b449a0,	0x088176ec,
-0x66231f59,	0xe4c8477f,	0x3ccfd123,	0xd67be9aa,
-0x8df1652c,	0x11f29283,	0xb13a6168,	0xd79e71f5,
-0xdf064c6c,	0x63bbaea0,	0xa32b027f,	0x17fa40de,
-0x62dad42b,	0x4a2ba3d1,	0x97566ec5,	0x7ce0870a,
-0x7c6ac399,	0x075eae21,	0x02811d28,	0x6effb228,
-0xbdffa992,	0xfc9706c7,	0xa2c158ad,	0x3a407afd,
-0x94b88ec5,	0xc9019e3e,	0x10cf018e,	0xf08b1e2d,
-0xaa09594a,	0x0d896d4a,	0xf83a743f,	0xfc82a2c3,
-0xe863355e,	0x619ef2f4,	0x2170df86,	0x34112254,
-0x615d93e1,	0x7c25d947,	0xbda74d18,	0x4188f6d8,
-0x02a61d07,	0x262bad07,	0x3939c06e,	0x76480101,
-0x26697ea6,	0xfce41af7,	0x9bece83f,	0x309c0b9e,
-0xdfc2bc12,	0xedcccfee,	0x4f095c0d,	0xd9b08cce,
-0x45da7530,	0x2f8e37c0,	0x5f273652,	0xc13511e0,
-0xcdb90088,	0x79c7d87a,	0x3df67681,	0x05a0a8d3,
-0xf2d2756a,	0x56041d39,	0x185b97c5,	0x62644b35,
-0xba24ad0c,	0x0d8ba3a3,	0x90e4793a,	0x4a04a884,
-0x05e64fdf,	0xfe710b2b,	0x85703d05,	0x1abc37e1,
-0x8db28c4e,	0xdde1b1d5,	0x03682e82,	0xf4d092fa,
-0x067f6a0d,	0x3c142430,	0xf2d8bc9a,	0xf546da72,
-0x660ec359,	0x4171e4dc,	0xa29d94b2,	0x151add4d,
-0x57f35f12,	0x7258f732,	0x9db66fba,	0x77e39897,
-0x8a8711c7,	0x1f5db10a,	0x58792090,	0x68600a9a,
-0xb2a89ac2,	0xa4a1f018,	0xc27e695f,	0x00aabd02,
-0x3f750dbe,	0x9a2e2bd2,	0x70ac647b,	0x9959d044,
-0x7669de0e,	0x2f98c181,	0x1c25a4fd,	0xbfa6a204,
-0xfb47f2d8,	0x440f46ff,	0x53a2dcfc,	0x1bf83a80,
-0x2d0b22d7,	0x4f518fde,	0xc1d17dbc,	0x7e92459e,
-0x95608150,	0x04486d5e,	0xd30e6f8a,	0x7e5a4a39,
-0xb01dee81,	0x04e7acdf,	0xf7ada4a4,	0x0795880e,
-0x26dc8256,	0x0a5aa3c3,	0x8f029565,	0x2f470e3c,
-0xa373fc51,	0x1c7e7b45,	0x267796b8,	0x1bcb4991,
-0xcec801f8,	0x6c9a6957,	0xc1ce18c5,	0x043c7ab6,
-0x3bd723ed,	0x6093b8ab,	0x2f768aa1,	0x4c6de3ce,
-0x71b2965a,	0x31ed9427,	0xbdab13e4,	0x7e9eba94,
-0x06508808,	0x5867bccf,	0xc0c8c85d,	0x846300c9,
-0x03891b7b,	0xe1150b81,	0x56116659,	0xdff07740,
-0x6eb9e465,	0x3a8a5801,	0xc54290e2,	0xeef47a33,
-0x4c71e22d,	0xd1dcc6be,	0x7075ccca,	0xa14f574c,
-0xfa205fcc,	0x71fd97f4,	0x285b90c3,	0x6f4ec636,
-0xe5fcc6ac,	0xaaa6e7b4,	0xb02d6ce1,	0x8e6fc58c,
-0x0d8c03e5,	0x5f1490ac,	0xa7c85aa5,	0x079a36a1,
-0xcf0a5098,	0x596d1e33,	0x23a0615d,	0x90b97898,
-0x7bc12833,	0x5c6b310c,	0xb72adacf,	0xff8538e0,
-0x750587e9,	0xcda7274f,	0x7e439b7e,	0x57e0932f,
-0x3fc98dff,	0x92a8077e,	0xff3c4325,	0xee308b69,
-0x72caf71c,	0xb2f163f8,	0xc024caa1,	0xa86d0b31,
-0x14b28f1d,	0x2961b1f3,	0x8d2082c1,	0xad0918fb,
-0x8ec25b94,	0x84f5ec2a,	0x7a354fd4,	0x7a49c860,
-0x1402776b,	0x420b3355,	0xdb1de128,	0xe172496b,
-0x85a89831,	0x648abaab,	0xcdc11dd7,	0xfb2f1711,
-0x8c426c31,	0x00bd97e2,	0x9a91f509,	0xab959673,
-0xc0d4e1a3,	0xf4fe6c5f,	0xdf597cb8,	0x59fd4c80,
-0xbf0b9c60,	0x650d7e3c,	0x5cd34a1f,	0xc16ae184,
-0x8b7dbd72,	0x6640b6a1,	0x8a8ee15a,	0xb0c36bac,
-0x6c489ecf,	0x2a15e446,	0xc8546da0,	0xf83856e8,
-0xa825a813,	0xb6d8332d,	0xceec0377,	0xf19cbecf,
-0x069c28e8,	0xd889195f,	0xd2dbf4d4,	0x28934dc5,
-0xcc113de4,	0xdcdd0feb,	0xa04df5f3,	0xc443666f,
-0x4f8c2b41,	0x3384a41a,	0x72890c0b,	0x728e69fe,
-0xc039391c,	0xf63d92a5,	0x91d700bd,	0x9007116a,
-0x5c6eaeb8,	0x4d65fcf1,	0x13551d94,	0x203a4079,
-0x1e65fad6,	0x89538401,	0xcff93078,	0x02bc1716,
-0x096c8d48,	0x0b4ab7d8,	0x236945c8,	0x894ef357,

cpu/intel/model_f2x/microcode-m08f2739.h

diff --git a/cpu/intel/model_f2x/microcode-m08f2739.h b/cpu/intel/model_f2x/microcode-m08f2739.h
deleted file mode 100644
index eb0147e..0000000
--- a/cpu/intel/model_f2x/microcode-m08f2739.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m08f2739.inc  */
-0x00000001,	0x00000039,	0x06042003,	0x00000f27,
-0x823432ca,	0x00000001,	0x00000008,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xffffffe9,	0x0000005e,	0x96f952a6,	0xaa368f02,
-0x53d271e6,	0xf8286513,	0x484b4e9a,	0x9e0c09c2,
-0x03b11314,	0xdfb67c98,	0xa2957d16,	0xf07f25de,
-0xb84a2555,	0x72ec8b35,	0x3445c734,	0x7744f543,
-0xc3da0cc0,	0xeb36172d,	0x8b2cf574,	0x29c867a2,
-0xe79dfaf0,	0x54714bb5,	0x524dfb69,	0x0df65433,
-0x0b95ec14,	0x3dc09ca2,	0x584ba068,	0x2aa558ce,
-0x8cd679c8,	0x3b2609d0,	0xa06306d1,	0x80bfa93a,
-0x482678d8,	0x0cdf1ce6,	0x5ec4e912,	0x8a19f7a6,
-0x76f215be,	0x577d92c2,	0x479cd4ba,	0x63d1f415,
-0x5af98bc5,	0x8889bb4f,	0x8e70943d,	0xb5528299,
-0xfd63e347,	0x836fcfd0,	0x4951a701,	0xf4613cdb,
-0xaa7c2f52,	0xa0e290c7,	0xf646a80b,	0xda5b5a03,
-0x93517b47,	0x553d99d1,	0xafac198e,	0x486b6c6b,
-0x4efa01d8,	0xdc6ce226,	0xdac3a149,	0x9b7cf27f,
-0x6c6246a0,	0xb6055a39,	0xb68cc841,	0x87b6adee,
-0x1c36edb4,	0x3ee76d20,	0xdbffab67,	0xed12fda6,
-0xc1aff2f2,	0xc110932f,	0x0933ccfe,	0x58fa2281,
-0x285d5ec1,	0xd05b216a,	0x76315645,	0x570c5c8f,
-0x6cc52f1c,	0xaa977e52,	0x066f4e03,	0x812bfd2c,
-0xbfbfd7a9,	0x70828199,	0x60182af7,	0x2a04e000,
-0x30f413b7,	0x327cef32,	0xac73aa51,	0x7c418d9f,
-0xf493ce0e,	0x6c14258d,	0xa5e2755e,	0xd39f994a,
-0xee638b08,	0x55d50476,	0x9b7afc5c,	0x5da2ed13,
-0xb75bf9f4,	0x2606c01d,	0x8a1d00eb,	0x0f73428f,
-0xb29c4fb4,	0xac13e554,	0xa7648fe0,	0xbe56837b,
-0xd34fa9ff,	0x59c855a2,	0x7d3cc7d7,	0xb5b0cb50,
-0xe6626c0b,	0xf07010b7,	0xd8054587,	0x01a5327a,
-0x3ceae28b,	0xa3bf737f,	0x3d1a37e7,	0x6ce48d1d,
-0xc9d91222,	0x42f28fae,	0xe8dff3e4,	0xfd6898d0,
-0xe772ab47,	0xbe452c12,	0xf188ee09,	0x08edb79c,
-0xad4d48fb,	0x5cb75d1d,	0x251f4e02,	0x6b7bb6e3,
-0xcada2f09,	0x536d74eb,	0xacfa627a,	0x51e2ffd2,
-0xe4655767,	0x311dbbec,	0x1011b68a,	0x6f6e8deb,
-0x4298665d,	0xc0522b3c,	0x2c3a19dc,	0x2c48f2ae,
-0x49bca621,	0xb6a747fe,	0xa1606c81,	0x9b2a5318,
-0x0ac114c3,	0xb5b35aa0,	0x3f4ee00d,	0x8b427e75,
-0xb539fcd3,	0xa99fba84,	0x821fc647,	0xe0ac6d6e,
-0x912f6f88,	0xf2009cd8,	0xb32330b3,	0xd0b80514,
-0x6f25f157,	0xdba2f463,	0x88ef17d1,	0x147c5f21,
-0x6e29cd75,	0xec14e5d1,	0xdcfffd24,	0xccc2c510,
-0xe5e40798,	0xb24814e1,	0xaf0cdaf2,	0x825cf5e2,
-0x12acac6b,	0x439c5f36,	0x0c533619,	0x8e776e71,
-0x319b44f5,	0x19c0b404,	0x54111b2a,	0x6a767513,
-0xb16944ef,	0x30ef18ce,	0x85df0862,	0x0737ff49,
-0x77fe06f2,	0xb2de0d2f,	0x71625e95,	0xc722c5a2,
-0x03b401a9,	0xe8b030b4,	0x7f9e62ab,	0xbff8c966,
-0x726bfeca,	0x6adf3831,	0xab85067e,	0x5167e87a,
-0xb06ad00c,	0xdd974309,	0x5704880d,	0xb7279a43,
-0x38aeda19,	0x52f5a31f,	0xd66d79e2,	0x83dad3db,
-0xa138d066,	0x0b4674d4,	0x07e7dd7a,	0x7f5c70c7,
-0x4aade5f0,	0x4fcd220f,	0x2ae8ab6f,	0x6fb11f68,
-0xbf134ecc,	0x71d3125c,	0x3cc3f6ba,	0x92809507,
-0xb4a9b236,	0x97a2ef5f,	0xe20e5f23,	0x5610bfa9,
-0xad16eba9,	0x5207dfba,	0x0caa3d20,	0xc57cccba,
-0x7983d15d,	0x09ced949,	0xec698959,	0x53a4b153,
-0x63c74107,	0xacf58270,	0xbc2982cd,	0x42bf9c41,
-0x26aff8b4,	0x9832bd6e,	0x34e98158,	0x434f0f43,
-0xcb80ccda,	0xd81471b6,	0xbd176071,	0xab13735c,
-0x4e80e2c1,	0xcf7815f0,	0xb4e6ae37,	0x1a90c457,
-0x79426d6f,	0xa4ac1e2c,	0xf76de77b,	0x1808cd61,
-0xd72ea071,	0x1f02af0e,	0x9613b531,	0xe83f2e9a,
-0x99a5262a,	0x0e8a756d,	0xbc229ac4,	0x2cb1af6b,
-0x8a8720d6,	0xc84d2c77,	0x8547ad96,	0xeb794e72,
-0xb51119ea,	0x1c0121ea,	0x9f8ae83b,	0x16459999,
-0x5c17deaf,	0x278a3e3b,	0xf2bbb704,	0x54df1a00,
-0x521ef94e,	0xd40de734,	0xca5badee,	0xa2fe3027,
-0x2ffe3ada,	0x1df00fb9,	0x5feb168c,	0x81674308,
-0x99713c0e,	0x56aae017,	0xe62e68f3,	0xaa15163a,
-0x31ac7b10,	0xe6a86d9c,	0xa006782e,	0x9baefc91,
-0x111277d5,	0x80f63a4b,	0x624044d6,	0xd91a5de5,
-0x5d0255d6,	0x92b82310,	0x08faf5e5,	0xe482ff69,
-0x0a1f1757,	0xdc010e34,	0x9cd07e48,	0x677fcfa3,
-0x0384138d,	0xa104220a,	0x5431c7ec,	0x0e8b7efb,
-0xf1ebcd61,	0x97ae7029,	0x191ff006,	0x4308b147,
-0xa11e05f7,	0x2c7cb5a4,	0x1d345971,	0x28d23638,
-0xc5a7a5bb,	0x3307c971,	0x0d3782ae,	0x2b798842,
-0x1fc27334,	0x4ff82ddb,	0x543ba685,	0x47732c7a,
-0xad094a6e,	0xb8ff60e4,	0x43f9ee2f,	0xe9a114e8,
-0xf036be6e,	0x3fb488a0,	0x280b2d46,	0xb1887c58,
-0x54ae583a,	0x454b6ce6,	0xe617a2c1,	0xb9335ac3,
-0x72361e12,	0xc856637a,	0x741b6cbe,	0xcf1f6f25,
-0x9f405fff,	0xd2525b02,	0x22d8b05a,	0x16860f11,
-0xb02983e9,	0x388b9c2c,	0x196cb2f2,	0xfca5f1a2,
-0x9e60965d,	0x5bed99ff,	0x59e361fc,	0x9361bde8,
-0xa1527365,	0x3f300237,	0xb0f5e2b8,	0x8fb00a40,
-0x71cb9744,	0x3327e8d3,	0xe89994d4,	0x3987e389,
-0x28c6d8f7,	0xb2ba9fc4,	0xdf109e0e,	0x622634b2,
-0x4904a82e,	0x576c3c2f,	0xe95eae46,	0xfb773013,
-0xf98b91de,	0x4edc30d5,	0xc6e60080,	0xebefab96,
-0xd7684df2,	0x9cd2c3e1,	0xd433902a,	0x7b9aa9eb,
-0x3c99cbaa,	0x5a0fa53d,	0x77297830,	0x869db621,
-0xaee2d56a,	0x2ce907c1,	0x0aa5097c,	0x662e7862,
-0xa5bfbc61,	0x2610f3bf,	0x3a741865,	0x99a5836d,
-0x2e533e3b,	0x812aa485,	0x0d7eb66d,	0xb325db47,
-0x6ac77937,	0xa1757eb7,	0xb7765633,	0x8845f18f,
-0xde7e37f8,	0x08a17789,	0x8af720ca,	0x1f7a530f,
-0xadcbb072,	0xd02e2dae,	0x16fbe58f,	0x0e4df085,
-0x80663766,	0xdcff020e,	0x4c242d70,	0x3d16d122,
-0x154a029b,	0x40c95a2e,	0x5f98eb6f,	0x637ffc42,
-0xcdf10a5c,	0xf2211055,	0x998ddc8b,	0xcee90fd8,
-0x1ddc7fad,	0x7034d80c,	0xf5bf0592,	0x479205bc,
-0x0900e9c9,	0x7bef8c77,	0xc128cebf,	0x9e7dd814,
-0xedca7a5e,	0xf15af942,	0x40e55228,	0x065ea7ce,
-0x9603da92,	0xa6611211,	0xea9dad76,	0x4fd9d974,
-0xea19cb68,	0xeabf508d,	0xd460f6c0,	0x3951733a,
-0x249a4453,	0x04356966,	0xac6ec71e,	0x5253e669,
-0xfca78245,	0x8ef4d888,	0x6c031fe1,	0x8c49e3df,
-0x181ded1f,	0xba9a2a29,	0x3a350c13,	0x5fdb2e20,
-0x071f7766,	0x831b60a8,	0xaddc46d4,	0x73fc6685,
-0xf814b86a,	0x6b888864,	0xf1253cba,	0x64093883,
-0xd1f90479,	0xd99f2676,	0x143461f8,	0xaeb7d324,
-0x5971a5d8,	0xa97ecb22,	0x5a9f28fc,	0x0e474ba4,
-0x771e7b28,	0x09219fc2,	0xbe3153d9,	0x026236d6,
-0x44a0eba2,	0xd3b94e36,	0x405b5759,	0x209cbbb2,
-0x73194d9c,	0x82af6596,	0x735d2807,	0xfbc89223,
-0x683fbfe5,	0xd7e66cee,	0x3419b4db,	0x089456f2,
-0x756b491a,	0xfc12382b,	0xfce57feb,	0x0cf9d1e7,
-0x7a9bbe55,	0xb775f2f7,	0x7a7a7612,	0x92e21a2e,
-0xf6a87d8e,	0x84356931,	0x21f480c9,	0xef3a9505,
-0xf4b0cf63,	0x5098a176,	0x607856e6,	0x5ad0357a,
-0x18581ae2,	0x7a0d77cd,	0x2840e6ed,	0x5c26e03d,
-0xf05a2704,	0xc3faed2d,	0x8d7d9a09,	0x8a75f27a,
-0x10382097,	0x02f6c32c,	0x52d8b14c,	0x0b38157f,
-0x1f20300a,	0x47bb86f4,	0x298ce7a0,	0x5d2c8478,

cpu/intel/model_f2x/microcode-m08f292f.h

diff --git a/cpu/intel/model_f2x/microcode-m08f292f.h b/cpu/intel/model_f2x/microcode-m08f292f.h
deleted file mode 100644
index 67dded7..0000000
--- a/cpu/intel/model_f2x/microcode-m08f292f.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m08f292f.inc  */
-0x00000001,	0x0000002f,	0x08112004,	0x00000f29,
-0xfdb52a5d,	0x00000001,	0x00000008,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x3329bed4,	0x074ca74b,	0x76a4c9be,	0xb3d0ac3b,
-0x59c1ebd3,	0x9d06facf,	0xa272f2b8,	0x185d2aed,
-0x1dbb2394,	0x86f96351,	0x12652c86,	0x873bf0a8,
-0x4f6956f8,	0xbc5754f1,	0xd43f9485,	0xb0484217,
-0x88993f58,	0x071366b3,	0xbb49ef1d,	0xb8ec50b3,
-0xd6dd7d67,	0xafae9594,	0xafbcf523,	0x04e3cefb,
-0xf6125942,	0x6c58f3aa,	0xa28b05f4,	0xbb31e4f0,
-0xde633bba,	0xc2cc4d76,	0x2fc95cef,	0x465474bc,
-0x6148f606,	0xa8245d1a,	0x167d68d0,	0xc38533b2,
-0xcbfb5881,	0xb912dc66,	0xbb9cc137,	0xbaa2ca73,
-0xa9cee564,	0x3edd2b89,	0x2e3ffeed,	0xa68b49eb,
-0x0b85b10b,	0xb968370f,	0xd5c4deb8,	0x2d2883d4,
-0x288e44af,	0x37b10c8a,	0xa75c2ef5,	0xa5242ad7,
-0xff96f783,	0xab3f2161,	0x3921290b,	0x1094e053,
-0x9eae586d,	0x9878a4f3,	0xa2d41b7f,	0xb29cc218,
-0x93898d3c,	0xdd152eec,	0x638ab207,	0xa7536a0f,
-0x5accf54d,	0x798a56a0,	0x8e925de6,	0xe2fec0a0,
-0x8b6100f7,	0x910d43f8,	0xb3bcb1ab,	0x3f032f10,
-0x667b024d,	0x5303ab2e,	0x50a68459,	0xdbdae9ae,
-0x61cab195,	0x8b080d7b,	0xe1c9c484,	0xc0a9cc33,
-0xf3c786cb,	0xa226e2f7,	0x4509e980,	0x2ff4bb80,
-0x943a2b9b,	0xb0e2d78c,	0xdce9f9df,	0xb9302df9,
-0x2f095be2,	0x46f9e8cf,	0x097129ec,	0x5f7ba01f,
-0x49e26e4c,	0xde9ff6ce,	0x5d194de6,	0x9114a73f,
-0x5114f3e1,	0x9832e8b3,	0xd116f967,	0xfcddf0e7,
-0x3011f78c,	0x5d84b6d5,	0xb465a082,	0x8eb129ad,
-0x5390d983,	0xdfad741a,	0xef927af0,	0xa062e4fd,
-0x94a1b0f5,	0x6c9dcff9,	0x15192e6a,	0x11a1f0b8,
-0xbc5f9758,	0x01c1070c,	0x6f5a81c6,	0x7ee5b238,
-0xdf75b957,	0x8b5cbac1,	0x5f7cd16a,	0xf7faa6dc,
-0x5b74dbb5,	0x0980f147,	0x4aa3b0ab,	0x7e96c732,
-0xc72ad094,	0x29e6397d,	0xf62bb325,	0x3c519a56,
-0x9601dfdd,	0x23f189bc,	0x0109b7a2,	0x13f597b0,
-0xc35ff634,	0xa4f9ef96,	0xc430369d,	0x1ed355b9,
-0x15f9b440,	0x2aad9fb1,	0x6af73cfb,	0xb602ee0a,
-0x06611130,	0x8d08db9e,	0x6351cafb,	0x2be65e02,
-0x1d9ed057,	0x34b31503,	0x74692a5b,	0xb56177c6,
-0x3ebaded8,	0xa7db0ad3,	0x542be7aa,	0x0ba46019,
-0xb820af02,	0x8f55fcfe,	0xcff707bd,	0xa1af5708,
-0x41a1232b,	0xb4c897c0,	0xa1dd591b,	0xaf3db2a6,
-0xe4687b08,	0x015862ef,	0x15a83ad1,	0xaeca0275,
-0x0706cfc4,	0xbe03a5bd,	0x169d5c10,	0x280ab19d,
-0x9b99fc66,	0x00345af8,	0x5de2f1a7,	0xb7fc86df,
-0x8b00e3cd,	0x8d2711e9,	0x12eed4b0,	0x209bce06,
-0x8cf97886,	0x9bf52a0e,	0xed9428f8,	0x9f728b1f,
-0xde5fc471,	0xd1f01cdc,	0x69aa4865,	0x878ab1b9,
-0xdabbcbe5,	0x550e7f55,	0xeffd94c0,	0xf0cdf203,
-0xd7ff2d19,	0x9899bb83,	0x678e80dc,	0x49e5b9c6,
-0xcaef9954,	0x7eb67af5,	0x419eeb94,	0xb1602068,
-0x97e28a55,	0xe069a36d,	0x6dfcc106,	0x47f9d914,
-0x7383e86d,	0xb27b7376,	0x6c2ee630,	0xf85f633b,
-0x7c59d82f,	0xafb33c27,	0xca101b90,	0xb3b3bbf9,
-0xf02389c6,	0x2ae5f253,	0x95676086,	0x88ff4ac5,
-0x2d162899,	0xa222fffc,	0xd159e83b,	0x16b66dd8,
-0xdf00350b,	0x3bdd9067,	0xc70ac2b3,	0xa539a829,
-0x152a5d8b,	0xb481aa0f,	0xddf95ee7,	0x03e704e2,
-0x0aa80b47,	0x8de64970,	0xc24430ce,	0x816af6f5,
-0xea7abfc8,	0xd79e1d14,	0x12ad96a3,	0xaed48013,
-0x882da4aa,	0x7f7725e2,	0x490b7fd8,	0xdb5124ac,
-0x341b99f7,	0xba4d8f7e,	0x3674ad3f,	0x534b0569,
-0x2902e14f,	0x58824d7f,	0x77356546,	0x9c95fca1,
-0x9c0dc894,	0xedaa0d60,	0x81bfe7a0,	0x425cbcb5,
-0xd5e7779b,	0xb9378330,	0x609f2e86,	0xdc7fbbb8,
-0xcb72543a,	0xccb64908,	0xe58b6de3,	0xab1b8aa1,
-0x3f967b56,	0x5efa057a,	0x07205290,	0xf717088f,
-0x150e8090,	0x86edd874,	0x43222360,	0x58b3d233,
-0x44ff6d7e,	0x284b195a,	0x5f601ec6,	0xaa541775,
-0x5e1b16da,	0xaa198043,	0xd0169c6f,	0x28a71e70,
-0xa928321f,	0xa44e4c54,	0xc7be5a61,	0xab93508c,
-0x7ab40436,	0xa02182c3,	0x249b39db,	0xad612d6f,
-0x899e0a48,	0x0f7d11d3,	0x7eb4ca9f,	0x8aadc9f1,
-0xe4e20173,	0xbb07eeb9,	0xe4d773b1,	0x0963bc22,
-0x5efe60b7,	0x6b442c1e,	0x6b127791,	0xb5f46698,
-0x03bf49f4,	0xe4545f96,	0x4044e40c,	0x489f21ef,
-0x1d4eac1c,	0xb0f1a1ca,	0x0345a5fc,	0xc430b5e4,
-0x2168a536,	0x9b9d9aed,	0x5a8a9758,	0xbafd2c68,
-0x4a83fff8,	0x2bf1095f,	0x20c2bffd,	0xbca3a173,
-0x8401dfbc,	0x83105353,	0x972193bc,	0x2993f67a,
-0x8c35d677,	0x0c252c66,	0x5f1e71aa,	0xb98fd757,
-0x3643fcf4,	0xb3765fe2,	0x8600233a,	0x06fc4590,
-0x5ad345ad,	0xb3278dd3,	0xd44b139b,	0xbaf74e42,
-0xe5aa65ee,	0xcd805957,	0x09febfe1,	0x8f10ce02,
-0x81cb3fa6,	0x5626278b,	0x72fa21ea,	0xd8ff7cb0,
-0xa630b63e,	0x9980b352,	0x46ecef9b,	0x6d03626c,
-0x1964ae30,	0x3e6bbe08,	0xe608703d,	0x83f86201,
-0x610fe575,	0xa25d9faf,	0xce02357c,	0x209ef877,
-0x0d04b5cf,	0xa0fd2120,	0x3192020e,	0xa17bd895,
-0x1f10032e,	0xf9a15cfc,	0x0c643c71,	0xbe729757,
-0xb62b24a4,	0x7dd41f4f,	0x88b583a8,	0xf16d921e,
-0x0fe396b9,	0x9d9d9a77,	0x20000241,	0x61c85db4,
-0x638521be,	0x1d951e88,	0xa284b337,	0xaabe5c9e,
-0x97a40559,	0xb2f20d59,	0x885a02d6,	0x165e152e,
-0x2796f0da,	0x9b5b57d4,	0x07b9090c,	0xb9a8bc39,
-0xba844c15,	0xbd9bd74b,	0xff355da8,	0xb385ca2d,
-0xec5f4117,	0x3d4af9b8,	0xdfac828f,	0x92e2080e,
-0x65696e35,	0xb44f5e41,	0xc2734dec,	0x36a677b8,
-0x65982d86,	0x04e84c6d,	0x238aaaaf,	0xfae7e9a8,
-0xa03bb61b,	0xc16e0305,	0x4a0764be,	0x2e56a853,
-0x81216092,	0x63e342f2,	0x4a1cd397,	0x4bc4285f,
-0x4110213e,	0x18b58083,	0xd11d5a5f,	0x82a0e6f5,
-0x10436c53,	0x6564b86b,	0xcae1a418,	0xc2c38a41,
-0x686e097e,	0xc67f4bda,	0x674e6ff8,	0x34e18245,
-0xf5d7e68b,	0xc829c2ab,	0xdc22eacc,	0xf862a244,
-0xb4057d4a,	0x9fb00332,	0xd50b0eaf,	0xa8a0bfbc,
-0xf63d6db2,	0xfa3e4c0b,	0x60b2494b,	0x3c6ebfef,
-0x044ef356,	0x082e54d3,	0x7e57f91e,	0x8d4acaa4,
-0x31684817,	0xb4731f17,	0xacd44c79,	0x23c1e0d5,
-0xe01156d6,	0x539d11b5,	0x7e606458,	0x82a5769f,
-0xc54b7362,	0xf9ebadd6,	0x269bcf3b,	0x4bea7201,
-0xb1de3e7e,	0x8e095996,	0x1ae2e7af,	0x2e49f015,
-0xd8f34325,	0xbbd34107,	0xf42d8640,	0x24765cef,
-0x5cf949de,	0xc314ee1a,	0xef5d3635,	0x14030991,
-0x4ce7f704,	0x08690d06,	0xcd3360b3,	0x305ab52d,
-0x627a7be5,	0xe8556b25,	0x7556d670,	0x7cd14455,
-0x1a41f12a,	0x159465d8,	0x5fb182e6,	0xcd67faff,
-0x3e898764,	0xaede02c6,	0x54a1098e,	0xa46fcfcf,
-0xcf7ce909,	0xe5abe97f,	0x427651a3,	0x9d6cf5d5,
-0x25bb56e8,	0xa2a1f9b0,	0xfed4d48a,	0xb4187602,
-0xcf6fc3b2,	0xac1aadb4,	0xe5c8152c,	0x59440305,
-0x0d83b110,	0x85f16574,	0x97eb47d1,	0xe1b7755e,
-0x3fe387b2,	0x730d856f,	0x1b3bc656,	0x21882a28,
-0x46e1d427,	0xcfec7d37,	0x7bf0682d,	0xff0030bb,
-0xd7777805,	0x2962d76a,	0x8ccef0ae,	0xc80cf897,
-0x2d6b7578,	0xe4d439a1,	0x5294cfbc,	0x4070933b,
-0x006ee9ef,	0xf2a81dc0,	0x94329cc1,	0x18bc1e34,

cpu/intel/model_f2x/microcode-m10f2421.h

diff --git a/cpu/intel/model_f2x/microcode-m10f2421.h b/cpu/intel/model_f2x/microcode-m10f2421.h
deleted file mode 100644
index 9dee433..0000000
--- a/cpu/intel/model_f2x/microcode-m10f2421.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m10f2421.inc  */
-0x00000001,	0x00000021,	0x06102003,	0x00000f24,
-0x83ed02e7,	0x00000001,	0x00000010,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0xffffffe9,	0x5715f121,	0x440ce2fa,	0xd5d090eb,
-0x70b3e977,	0x92320e8c,	0x4f989906,	0x36907442,
-0xcc4b12e2,	0xb456a6ae,	0x0ad5bcf7,	0xe9f0a425,
-0x70b932d2,	0xe66202c9,	0x350fd81b,	0xd560a828,
-0x15332f71,	0x3c1a2e5b,	0xa661b83d,	0x6528dcc7,
-0x76c5c944,	0xa065f688,	0x3cc01463,	0x49f31a7b,
-0x79cac706,	0xc9fae8bc,	0xc4b5fbf8,	0x2451d954,
-0x232d756e,	0xf1b52f47,	0x89368878,	0x8742b987,
-0x8a0108a4,	0x44b8605a,	0xc2dbd287,	0xb44ecbb9,
-0x7396c41e,	0x470b8062,	0xd23b7917,	0x6c20092d,
-0x0bcba2d7,	0x575d2d99,	0x38295434,	0x69be061c,
-0x18942ed5,	0x46e42cba,	0xa2964393,	0x0e74f74b,
-0x3637dc23,	0xd1784fba,	0xfc3dfe26,	0x6aabb127,
-0x59a37a17,	0xaf5326b0,	0x744189b7,	0xe4c3a8fd,
-0x9b9cd170,	0x260d7270,	0xd3da3bf6,	0x94c74a56,
-0x7c598514,	0x27e5c754,	0x19f54591,	0x469329bd,
-0x0a3e0073,	0x4d93b74e,	0xabd1073e,	0x4cc88fb1,
-0x60db113e,	0x710fb8aa,	0x900642dc,	0x79a1de06,
-0xa61ec6f9,	0x85d1f05e,	0x4267267c,	0x04299516,
-0x1a4a7833,	0xb9e90c17,	0x002d82dd,	0xc16d8583,
-0xe32036ca,	0x147f51f1,	0xa5918b9e,	0xaf5c5324,
-0x05e6cd0b,	0x45b4ae8d,	0x730c40f3,	0x216e677c,
-0x3da1b00b,	0x7b7f4318,	0x8bc68c6a,	0x7a8a63a2,
-0x90bb9d83,	0x49adf5fc,	0xf34ae404,	0x1b214f93,
-0xd455db1b,	0xffeec367,	0x6bc1edd6,	0x5c288f68,
-0xe44b9377,	0xd0e314e7,	0x29d04ba6,	0xb5805ceb,
-0xf4c3e44c,	0x085bc99d,	0xf8ffa80a,	0x990defd9,
-0x080028d4,	0x388b7cdd,	0x593984a3,	0x4c0a6b9e,
-0xadd4d26e,	0x712ed499,	0x4020b0ca,	0x4942fdf9,
-0x237c6de5,	0x56be0c27,	0x561043bd,	0x228f73c9,
-0x2e7548fe,	0xec510be0,	0xb7740c07,	0x78851cf8,
-0xae205a08,	0xa66dd681,	0x7330b0f1,	0x9c4037b7,
-0xe3e5acaa,	0x1b2716bf,	0x6c6d1eab,	0xfbe2ed01,
-0x81303e33,	0x33422c0e,	0x6027b0eb,	0x7e4fdcf6,
-0x004e2184,	0x1653f8df,	0x8505f26c,	0x71041c13,
-0xcaf4e533,	0x4d868fa0,	0xec642902,	0x059e5139,
-0xe53bf189,	0xa0cf56a7,	0x2cd6dbf4,	0x41007b03,
-0xa1835c02,	0xac53e4c5,	0x07d9756a,	0x05ddd6df,
-0x8539010d,	0x3b7780b9,	0xff516326,	0x0c60e6c2,
-0x3f3d9e04,	0xd5cac62e,	0xc14da162,	0x06627e4f,
-0x2ff1bca2,	0x8c302c93,	0x2b7f616e,	0xd080c36d,
-0xc5104698,	0x5c45c644,	0xac4c41d1,	0xb0b15b5e,
-0xcc10fb90,	0x19d92084,	0x0ad5bb51,	0x1c678ab5,
-0x5e2afed1,	0x6634a6bf,	0x54b22cb5,	0x48686646,
-0xa57273c2,	0x17cf3f49,	0xe5ce1ebc,	0x19d39091,
-0x8791973b,	0xb5f44407,	0x5a8f5060,	0x3634832a,
-0x0a750b7c,	0x9b2cdbfd,	0xd7c1184a,	0x118731f0,
-0x8190434e,	0x19a1b4ff,	0x047dad90,	0x1bb0d53a,
-0x572f018b,	0xbe68c306,	0x73848798,	0x35c531a1,
-0x7550e5c9,	0x97b8d4d5,	0xaa50f56e,	0xa3cee83b,
-0x1a4023a0,	0x5e0fc940,	0x983194f7,	0xc7604dbe,
-0xf25a04cf,	0x02bbf427,	0xcb0fbffb,	0x558e0ebc,
-0xfa52e8c5,	0x37eaa143,	0xd33c1060,	0x55c4335c,
-0xce995499,	0x1c8b68a9,	0x7c269639,	0x4022b150,
-0x4250c7f4,	0xd5e4d3db,	0x2ff4ed03,	0x36b668e0,
-0xc26704ff,	0xe62cbc14,	0xa0a4ebfc,	0x8b53c451,
-0x8272406f,	0x68ab2da3,	0x9ca241bd,	0x83d9e495,
-0x61954000,	0x843a57e3,	0x10f1897b,	0x7f8867e0,
-0xe504cbe9,	0x8754366d,	0x8ade70bf,	0xac2dd3a9,
-0x41df4d81,	0x5b670297,	0x5c07bdd4,	0xf00e6717,
-0x7360fb7f,	0x3743c5d5,	0xb8adda7d,	0x1bc9de27,
-0x08649bed,	0x5181dd68,	0xcf05ea0c,	0x7a67cd39,
-0xd8110301,	0x65465cbe,	0xd77d1041,	0x64b1771a,
-0x784fd182,	0xca9d00b9,	0x39695291,	0x2b3d4de1,
-0xd9380b3a,	0xfc5666d9,	0x5f820e27,	0xc6be32ce,
-0xf055521f,	0x0354c95d,	0x8fbe1b6e,	0x8bf13c00,
-0xa38bfb82,	0x0655ad0e,	0x41030301,	0x3379ae69,
-0xb3032933,	0x099f9283,	0xb590385f,	0x67cade03,
-0x53a5feba,	0x422e401a,	0x02ff1f2f,	0x03866975,
-0x70f1f572,	0xd4c05101,	0x26b66844,	0x1a93f0f6,
-0x94593d97,	0x887b722d,	0x57ad233b,	0xd3c7977f,
-0xa1b02024,	0x523cf697,	0x2dd20cb5,	0xab49e9f0,
-0x0aa2dfaa,	0x60cc0d0f,	0xb8f83218,	0x6d62392f,
-0xe9826fd2,	0x44048284,	0x639eb528,	0x060c7cff,
-0x7ea2c3dd,	0x3d1c7acf,	0x4137f9fb,	0x0096f96d,
-0xb63634b1,	0xc1483db3,	0x17f501da,	0x02088c3f,
-0xdf5dc11f,	0xb0f0dfc9,	0x44139c6e,	0xd7a15ba8,
-0xf3d5b372,	0x6b5a08b7,	0x7e43b4b2,	0xd38e1449,
-0xfff28de0,	0xe392bcc5,	0x48ae5910,	0x0da38cb0,
-0xfcbf9742,	0xe06a5487,	0x5e61019c,	0x8dafb3b9,
-0x57344d2b,	0x11b79fa5,	0x4c7fb144,	0xe103f809,
-0x0fb905c2,	0x660671a7,	0xd846266d,	0x7b283110,
-0xd3c62086,	0x37bca79f,	0x75656523,	0x0adb0487,
-0x6c3af254,	0x77b82881,	0xcde94898,	0x6a665aff,
-0x5608599f,	0x333d31c6,	0xe65847e0,	0x2288ede2,
-0xda129233,	0x659210bb,	0x377fb789,	0x5201d054,
-0x38b277e6,	0x3acfa257,	0xc058e53f,	0x1da43574,
-0x40e1f496,	0xfb94affd,	0x7d438871,	0x3d6b550c,
-0xcd63e737,	0x8a422ba2,	0x89b1ba80,	0xdc5b1133,
-0x9e79e4a4,	0x4b96300d,	0xc22f9cd6,	0xee4d4bcc,
-0x9fe0fcab,	0x576761d6,	0xb6e873ff,	0x21edd45a,
-0xaae4b067,	0x3ae52f5e,	0x910e2365,	0x7da9d04d,
-0xaf71b07b,	0x45ef40c7,	0xd4ba6224,	0x6bacaa75,
-0xefa4db2e,	0xb4c31b79,	0x54f43ea9,	0x04f8e83f,
-0x53e2c9f7,	0x8db44cd7,	0x0ea25b66,	0xd87f5c2c,
-0xe96c9d87,	0x2ebca750,	0xaea8c953,	0x98c79dd7,
-0xb0403778,	0x1e952d41,	0x85982c1e,	0x1af566a4,
-0x7b6fe713,	0x46b462d4,	0x2cd47bfa,	0x1c6a68aa,
-0x6eaa133f,	0xbfd22f3f,	0x12174dcc,	0x47a2f741,
-0x8bcbbbdb,	0xc9ef98cb,	0xe29ab9c0,	0x47b4987d,
-0x20d1f9fd,	0x373a5205,	0x436e1733,	0xb11f73e2,
-0xae1044db,	0x37c58139,	0x24ab40f8,	0x6d289f8d,
-0x5f62ca41,	0x6a9517fc,	0x7fe844a4,	0x33df706f,
-0x8ee15ee3,	0x2bd979a8,	0xeb214552,	0x302da2ff,
-0x70ab6453,	0x14c9daea,	0x965870c5,	0xd83ed7aa,
-0x2afae19f,	0x9b1e0a42,	0xc782ac32,	0xd58e5e96,
-0xff59dea5,	0x2deefefb,	0x844e3fc4,	0x2b5da19e,
-0x25165c3e,	0xbd0c1726,	0xdcce9175,	0x7bbded39,
-0x0e7f9a66,	0xcc31d985,	0xe41a40b5,	0x536267a2,
-0xc1c50b09,	0x29119ea9,	0x9bc328ab,	0x3246f0ae,
-0xea534459,	0xa24c3cdf,	0x15685876,	0xe0fa8c37,
-0xd769ec85,	0x20c2df4c,	0xdc83b5aa,	0x9585dfa9,
-0x1e01ce77,	0xb79d5f70,	0x3563d017,	0xaa205ca6,
-0x52a0510d,	0xaabaddce,	0xe33bf64b,	0x80e3936e,
-0x16057435,	0x87a4a9d1,	0xb4c006b8,	0x4a54633b,
-0xed7038ad,	0x040dcf11,	0x85cced44,	0xed4251ac,
-0xd7313899,	0x31dbcb9c,	0x4748e453,	0x2cbeb93d,
-0xd658e2b5,	0xfdca6e33,	0x0b6bcaf3,	0x112b5d91,
-0xcba2e2ce,	0x0be84dca,	0xcd890825,	0x8f488963,
-0xbed55a87,	0x723bab52,	0x1863e24f,	0xa2df4790,
-0x59838ef7,	0x93270607,	0xb987d2c0,	0x1ea917ad,
-0x872b1a14,	0xeb026a8b,	0x4d3c60b0,	0x234ceb88,
-0x85054bcb,	0x3999fe14,	0x233c2b38,	0xa46aea96,
-0xd6f654a6,	0x412fe4e3,	0x8d371386,	0xb776a912,
-0xe54f0cf3,	0xf846023d,	0xc1d21956,	0xcad10e9d,

cpu/intel/model_f2x/microcode-m10f252c.h

diff --git a/cpu/intel/model_f2x/microcode-m10f252c.h b/cpu/intel/model_f2x/microcode-m10f252c.h
deleted file mode 100644
index e19a722..0000000
--- a/cpu/intel/model_f2x/microcode-m10f252c.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m10f252c.inc  */
-0x00000001,	0x0000002c,	0x08262004,	0x00000f25,
-0x62d062ab,	0x00000001,	0x00000010,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x017464fa,	0xd2fb3494,	0xaf1850af,	0x5af88989,
-0xd3a0a9dd,	0x8e8bd3ad,	0x8c288786,	0xf15f02b0,
-0x3f3c1471,	0x6c675202,	0x5094fdb0,	0xa618dc47,
-0x7596d14e,	0x6ba07896,	0x2e4a12e7,	0x611c39f1,
-0xf6a43a1c,	0x24fa23e1,	0x01bd8d37,	0x5a21bc1c,
-0x60df739b,	0x40165459,	0x87c581fa,	0x2e850b8a,
-0xcfcb5329,	0xee4152a6,	0x404753ca,	0x64ac8738,
-0x2b8cd6bf,	0xbc5f4abd,	0xa8bb7b21,	0xf08d2f32,
-0x1c8094c5,	0x67ceb543,	0x0cd8f368,	0x8658f400,
-0x9174a58e,	0xccabf1d6,	0x899bf22e,	0x40d6d951,
-0x4838f728,	0xa1ed41e5,	0x3483bccb,	0xc1c0815b,
-0x1785082b,	0x255c0d8e,	0x91d5b4b4,	0xb1f4c7e9,
-0x2bf5ac1c,	0x368af115,	0x66ae0e90,	0x2b95e4fa,
-0xa9bf4b21,	0x9ae73e25,	0x86cecece,	0x534a6d72,
-0x8200bc65,	0x83255506,	0xf4e35c0b,	0x9dc95dd7,
-0x4464f3b9,	0x9112fc9f,	0xd62cfc95,	0xee0caf4a,
-0x7963ed30,	0x90d3ad97,	0xee95be29,	0xbf49ec04,
-0xf3287f06,	0x07d1e162,	0xd3e0755d,	0x929ea9cc,
-0x0094df0b,	0x52064130,	0xce7f504d,	0x35f46c20,
-0xb8fbeb98,	0x6b6362c5,	0xa03f5918,	0x5c427277,
-0x55a52e2a,	0xd43118bb,	0xb5bd2642,	0x3cbdebe2,
-0x2f8bd345,	0x1d7544fc,	0x4e08c4b4,	0x806aaa70,
-0x99128239,	0x9e150e46,	0x8a542475,	0xec5b5756,
-0x585c2a66,	0x73d03366,	0x3aaf1ab3,	0x35ae9846,
-0xd8c688a4,	0xd1a11333,	0x0de4e99b,	0x3b641c51,
-0x6a4e6159,	0xf84cef5a,	0xe56ab89f,	0xcd410bf9,
-0xc90b1c48,	0x0b032ac1,	0x33dec98d,	0xd06c42be,
-0x32028313,	0x5d819bf6,	0x04f60234,	0x21e4c303,
-0x1d2ad9c2,	0x7bff3ccc,	0xd89dba83,	0x5798962e,
-0xe3aba833,	0x333b4f64,	0xa7869e81,	0x68c4b245,
-0x06c21e1a,	0xa1b8bdef,	0x5af37ec7,	0x289bfece,
-0xd6cd123b,	0x9e0bcab3,	0x4c342945,	0xa9d7e1f0,
-0x4a2498b0,	0x3bc93371,	0xda7d7384,	0x91fa2049,
-0x6e1202af,	0x5cf95edc,	0x8efa1130,	0x2e7c51c1,
-0x467e44b9,	0x6259f80e,	0x3ec0ae38,	0x515e28b5,
-0xa5f3fdad,	0x26990f39,	0x132c1b43,	0x72b429ba,
-0x74d71719,	0xaee958b6,	0xd22e6611,	0x2eb5b552,
-0xe6812bb7,	0x99c839a3,	0x20e2b7d2,	0xb19cfdec,
-0x947876b4,	0x2734f7d8,	0xe26b52b6,	0x8eff31db,
-0x90a4081e,	0x76d3cabf,	0x712afede,	0x24fb06a5,
-0xb6e19dac,	0x52d3d9a1,	0x916b0c9b,	0x76584397,
-0x23d1fe57,	0x2e7badc9,	0x793b93af,	0x4bfafe0a,
-0x2693b773,	0xc35d8ced,	0xbea30ce9,	0x22f8d19a,
-0x389dae00,	0xeb826f93,	0x05f18a18,	0xd6fb6d38,
-0x821bd354,	0x268226ce,	0x2191a9e8,	0xff137868,
-0xbbb40031,	0xcac56b21,	0x64cf06f6,	0x30587346,
-0x4b289baf,	0xf699e7bb,	0xc29e78ef,	0xc3b60ce5,
-0xf82e2e0e,	0x34dee08c,	0x3c3a6eb6,	0xf7513f73,
-0xfe4e1a98,	0x07ec1fbe,	0x12b6246d,	0x219c212f,
-0x73ffba20,	0x369b69cb,	0x2671b878,	0x0d7b2c84,
-0x032e56e7,	0x3d937bdd,	0xcc823a33,	0x287122cd,
-0x6c488555,	0xa2e9aa31,	0xfd2dd62c,	0x2c1fe41e,
-0xdced02c9,	0x895f72d8,	0xcc184fc1,	0xba0ffb0f,
-0xee6589e7,	0x380773ef,	0x793bba57,	0x9314f3ad,
-0x4d79bce2,	0x116f016d,	0x7db8b6cb,	0x2ed52750,
-0x485ab29f,	0x23ae6001,	0x32854b85,	0x17ddafa2,
-0x098d4caf,	0x3d404c83,	0xbcb8331e,	0x3bcfa653,
-0x56382235,	0xc0a0c48b,	0x6f9d9f13,	0x300d782a,
-0x7cf71f46,	0xe6e4b87b,	0x0791bb50,	0xdb2c4160,
-0x6be9a315,	0x2165554b,	0xc3260d6a,	0xedfb0449,
-0xbaed3058,	0x0f98dc31,	0x390814ef,	0x23a3e34d,
-0x27d3c3a4,	0x2c19950b,	0x402871f0,	0x184dcea7,
-0xde0edc2e,	0x2f98f6e9,	0xb447540f,	0x3c9a5cb3,
-0x60c8a7cc,	0xe641f9f2,	0x3c56383a,	0x32cd115d,
-0x92777bf0,	0xd89236b6,	0x3d25460a,	0xf893e2ad,
-0xdcd5b651,	0x262c47ec,	0x872573d0,	0xc12dc29c,
-0x409a6a3a,	0x9bf80c1c,	0xa735cc4e,	0x2587cc61,
-0x7d6e93e4,	0xa0ea6f41,	0xd4ad42ae,	0x8daecee5,
-0xc31e66a8,	0x2378d207,	0xabdddd7f,	0xbe11bb1c,
-0xf38edca1,	0x513bf227,	0x5bef4b3e,	0x204feef8,
-0x7bbf43ac,	0x7768b9da,	0x9b0bed2b,	0x56202483,
-0x4695c0e6,	0x23d8d840,	0x82ecd4ce,	0x79748b5e,
-0xcca7c892,	0x8c63470a,	0x2d7518c4,	0x2fac1b7a,
-0x104c938f,	0xbf29d2f3,	0x1dffe8e0,	0x8d7ad738,
-0xc83a0640,	0x2199cec4,	0x7bc07063,	0xa70c2537,
-0x9e861394,	0x075d4c73,	0xa569faf6,	0x396bae73,
-0x334b3c91,	0x20b95fab,	0x769b98f6,	0x0a8f4cda,
-0xff9752b0,	0x309b6f0a,	0xc3071844,	0x3104c8ad,
-0xbaff693c,	0xebf312eb,	0x9e25d11b,	0x25576b18,
-0x4e70d78a,	0xc72dbd56,	0xec181ed8,	0xe9b6167c,
-0xe099c2f2,	0x27d3aa35,	0x6ddd258e,	0xcc131a0c,
-0x065dd636,	0x3cc4ff57,	0x77a63f63,	0x237c4bbf,
-0x3889c6a1,	0x176b30e9,	0xfa111c8d,	0x281d9f44,
-0xbd74ed05,	0x3ed21e58,	0x0490fdad,	0x15c697b4,
-0xa3719ed3,	0xad0bb013,	0x66b68aa8,	0x282fe7ac,
-0xfa118f06,	0x8f2a8338,	0x5c1253cc,	0xb7afeae2,
-0x630a9b9b,	0x3cae83fb,	0x216b5789,	0x9cb4b049,
-0xe9dcccb5,	0x2696572a,	0xe22011a5,	0x23b34429,
-0xf9636a42,	0x1051094a,	0xdf3f18ad,	0x26510efc,
-0xe378d21e,	0x38a6bf26,	0xace969cd,	0x1ca41996,
-0xcb528e18,	0x87c088e2,	0xfd71cd99,	0x39e736e2,
-0x9c64bc32,	0xbd8cecd2,	0x47a0629a,	0x85b3df38,
-0xc9d64ce6,	0x32bebbe9,	0x42cb74dd,	0xab5d1e1c,
-0xe55e7ac2,	0x55f8be13,	0xf430b24e,	0x2f17258b,
-0xda10ca8f,	0x6eac45dc,	0xa07672a7,	0x506f676c,
-0x1e8b526e,	0x33eb74e6,	0x7742492d,	0x61414e22,
-0xc31291a5,	0x5b2b4e8b,	0xa315ffe6,	0x989185aa,
-0x8bdf0a79,	0xc9c06f2c,	0x2f00faf8,	0xde4ef0f5,
-0xa145c5a8,	0x92dd3dee,	0x727c9f7a,	0x250ed270,
-0xcb1c44c2,	0xe1113cb5,	0x5bf4dbbe,	0xf4709150,
-0xc21c5014,	0xf930bb0c,	0xbe4f9bd9,	0xa5862c75,
-0x2230e5c9,	0x74149598,	0xe987643d,	0xa3412042,
-0xbd3eb677,	0x80a41b9a,	0xaa2dc674,	0xd192a178,
-0x8988967c,	0x8962ca42,	0x451c005e,	0xecde7737,
-0x87f85870,	0xe98908b8,	0x265c73c7,	0xec182f7f,
-0x05b3d87c,	0x1afff376,	0xf4c81a3c,	0x80f00263,
-0xee63669e,	0x1d74f997,	0x183e2b6f,	0x0629519f,
-0x6b27783d,	0x9916c2f5,	0xfecbc9d5,	0x7eb50141,
-0xad0037e0,	0xf20f60c4,	0x374a7054,	0xf0848252,
-0x19f82e03,	0x69c1f70c,	0x70961335,	0x9deb2ccf,
-0xc453c78d,	0x0871df23,	0x7f83c98b,	0x407fbe9c,
-0x10121b4f,	0x9044f904,	0x4ed3f7de,	0xb028f42b,
-0x246f17de,	0xb855abb0,	0x071a51d8,	0xd549aad9,
-0x735a39b1,	0xad2f4ab1,	0xdf90c6c4,	0xdd2761c2,
-0x62036cae,	0x3c29d30e,	0x4f7f5f84,	0xab87914f,
-0xc33f0b67,	0xde569d58,	0xb1e60d71,	0x8a817393,
-0x906e903c,	0x4e972481,	0x4fe3e46c,	0xd48eb883,
-0x6570d66c,	0x8e957776,	0x00534cbc,	0xe715ffed,
-0x2678ac5d,	0xcacc7b06,	0xd4fe6915,	0x8d09aa7b,
-0x5cfa9f8e,	0xfe2dced0,	0x7b64fbc0,	0x73940aec,
-0xae88acb2,	0x800c6287,	0x7639d6f3,	0x28ac2dba,
-0x162200b6,	0x7dcea0ee,	0xb63f1118,	0xeeb52b03,
-0xd7996177,	0x32e8dc08,	0x52529d26,	0xd3773575,
-0x0e8ffee2,	0xf7ee274d,	0xb6932b3f,	0x3a9aa201,
-0x68c94a3c,	0xc9efee21,	0x4d432eb7,	0xe3f5a59f,

cpu/intel/model_f2x/microcode.bin

diff --git a/cpu/intel/model_f2x/microcode.bin b/cpu/intel/model_f2x/microcode.bin
new file mode 100644
index 0000000..afdaf9a
--- /dev/null
+++ b/cpu/intel/model_f2x/microcode.bin
Binary files differ

cpu/intel/model_f2x/microcode.h

diff --git a/cpu/intel/model_f2x/microcode.h b/cpu/intel/model_f2x/microcode.h
deleted file mode 100644
index 493072e..0000000
--- a/cpu/intel/model_f2x/microcode.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-#include "microcode-m02f241f.h"
-#include "microcode-m04f241e.h"
-#include "microcode-m10f2421.h"
-#include "microcode-m01f2529.h"
-#include "microcode-m02f252a.h"
-#include "microcode-m04f252b.h"
-#include "microcode-m10f252c.h"
-#include "microcode-m02f2610.h"
-#include "microcode-m02f2738.h"
-#include "microcode-m04f2737.h"
-#include "microcode-m08f2739.h"
-#include "microcode-m02f292d.h"
-#include "microcode-m04f292e.h"
-#include "microcode-m08f292f.h"

cpu/intel/model_f3x/microcode-m0df320a.h

diff --git a/cpu/intel/model_f3x/microcode-m0df320a.h b/cpu/intel/model_f3x/microcode-m0df320a.h
deleted file mode 100644
index 815ee6c..0000000
--- a/cpu/intel/model_f3x/microcode-m0df320a.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m0df320a.inc  */
-0x00000001,	0x0000000a,	0x05112004,	0x00000f32,
-0x2538ef0a,	0x00000001,	0x0000000d,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x74843747,	0x4501ebc2,	0xe5e57c08,	0x461ce659,
-0x40a6701e,	0x5582170b,	0x74b21ac7,	0x20a81192,
-0xae8f27e3,	0x62327b97,	0xc79394a9,	0x59bffa64,
-0x5cd54499,	0x661609a9,	0xf3aeb795,	0x998555be,
-0xafd3506d,	0x3af3bb2b,	0x80a7c09e,	0x88f4a103,
-0xf61cc915,	0xc1d9b375,	0xb9f62306,	0x1f60aa5f,
-0x4159c8bc,	0xedd0db19,	0x36f955b6,	0xa15d4ebd,
-0xea1d8948,	0x58acf084,	0x53fc1a4e,	0xe76de3aa,
-0xb9ce6bd6,	0xd99002d5,	0x797c8dcb,	0x7500ca7a,
-0x5e1e5da5,	0xe2637e41,	0x1f281cc4,	0x1c0a2110,
-0x9db83c8f,	0x7a256180,	0x804644c4,	0x3e1c625a,
-0xb6c356f2,	0x35ccc6ba,	0xa24b20c0,	0x00dbf282,
-0x76ca6755,	0x7831808f,	0x2075ec65,	0xea0b5fbf,
-0x3ee5b1cf,	0x5a7b9a89,	0xf9d75ffc,	0xa2c11d5d,
-0x73daaa86,	0xfa11274a,	0xfdcfb3c1,	0x051cc6c6,
-0x9c6c53de,	0x992527ca,	0xa2dce7db,	0x4f3efdd2,
-0x20d65f2a,	0x6c8eeb78,	0xcdb9e581,	0x345a2ca8,
-0xb45e9a7f,	0x1f79bcb0,	0x0e2061ba,	0x6d7a5d55,
-0x6c1e3cf5,	0x24ade036,	0x3d08860d,	0x8a3ea3a9,
-0xc30f43b9,	0x1de4237c,	0xfb3b8f85,	0xa4e44587,
-0x4ed26579,	0x92c37b5c,	0x04136287,	0x53d1c29f,
-0xca821100,	0xbc8d89f2,	0xa11646b6,	0x501b8bb6,
-0x83ed9eed,	0x1881fd4b,	0xa6014a24,	0x0330abbe,
-0x635845f6,	0x450b0067,	0x4db70e3a,	0x4d7a01eb,
-0xd498799b,	0x23741823,	0x8129458f,	0xae00e50c,
-0x5a1c5acb,	0x27b06938,	0x847ff9d0,	0xb1dc5e10,
-0x344d81f7,	0x835f0ab7,	0x0b186ccf,	0x2e2b0b0c,
-0x91bec1a7,	0xfb5bfefe,	0x0d108725,	0x791fcb89,
-0xa72d7393,	0x2e746000,	0xa9a904b1,	0x2907d414,
-0xd344c14c,	0x1dac323f,	0x3b5944f9,	0x6e384d17,
-0x9049bdb0,	0x63d46346,	0x01841ada,	0x806bd62e,
-0x81b3da6d,	0x5feb969c,	0xbc4881a4,	0xae4568d5,
-0x850bfbaf,	0xc5ec4d7e,	0x3592c8a6,	0x19debd00,
-0x70f730be,	0xe46fc21f,	0x52edbb6c,	0x1f6c59de,
-0x8e861d34,	0x1e056e10,	0x0aa4a2c0,	0x26648b05,
-0x7b1b2cba,	0x15d8530b,	0x15ac9e35,	0x63fc4785,
-0x4ee0e843,	0x749fc4f7,	0x9078d2e6,	0x922d7725,
-0x012d3350,	0x1432be40,	0x1cfb013e,	0xe1c3b425,
-0x0757f6ca,	0x96ac2827,	0xbbb1607e,	0x4d7796f1,
-0x373635d5,	0xb3995af3,	0xd282686d,	0x57846e0c,
-0xc10a1b7b,	0x0531aa26,	0x401a2d3b,	0x6293979a,
-0x3256b584,	0x7037f5bd,	0x1a55346a,	0x4d72f65f,
-0xcb831ed7,	0x78858956,	0x7534b9a9,	0x0300a497,
-0x87786fe1,	0x0038e678,	0x234a22b0,	0x3a254e87,
-0xae8e8c7c,	0x2a38cb9c,	0xf75e4df6,	0x124f6e10,
-0xc313cb74,	0x403b85c2,	0x8b282eed,	0xe4088cb4,
-0x6d3f2750,	0x44772ac5,	0xf261542e,	0xe8cf1b64,
-0x701779aa,	0xeee56421,	0xf12a99ea,	0x20e83201,
-0x5443f258,	0x9413ef4a,	0xc42546bd,	0x71446205,
-0x846f1149,	0x69ad3ce5,	0x1d0c21d7,	0x7e732b32,
-0x607080b6,	0x554fd99e,	0x0e636882,	0x516e3657,
-0x83816c0c,	0x14e8634f,	0xedf4c65b,	0xf8f8eb9b,
-0xdfe9a6cf,	0x68213b6a,	0xc3b08d7f,	0x90e95140,
-0xd534836e,	0x8978e5aa,	0x2fbebe6e,	0x46c24c92,
-0xa77f97c4,	0xfd1fc442,	0xe6e43c67,	0x4d1ba554,
-0xf9468738,	0x6bd2f2cb,	0xec33883f,	0x2bba5bc4,
-0x88e7e1a2,	0x3c4a7640,	0x2d2a4111,	0x237ceaca,
-0xb1648b8d,	0x7b32f695,	0x7d7804d0,	0xb425cfc4,
-0x167c62e1,	0x36289bf5,	0x3cdda149,	0xe499f59e,
-0x74940089,	0xe17cdd2d,	0x58ef7744,	0x4a8df6ff,
-0xf2f6f5ee,	0xf8ce1e0a,	0xa0797758,	0xa73b236c,
-0xe0fce34d,	0x0e5301a8,	0x11afd174,	0xffd409ea,
-0xc515f1ef,	0x90be8027,	0xdf7bd90f,	0x2e128305,
-0x9fe0e89d,	0xc96c4158,	0x56e4f034,	0x144f5874,
-0x34428f4a,	0x56b1b800,	0x42c1fd6b,	0x09e343bd,
-0x0c5f0cfd,	0x6b6b8b00,	0xdab284a3,	0x5a01b6aa,
-0xcdd04c97,	0x1145a1d6,	0x444c41c8,	0xb776a994,
-0x58ef29b9,	0x472c2b2b,	0x60843b9e,	0xd8b82279,
-0x2d4abd14,	0xd060acf7,	0xa0f409a8,	0x4a8e4099,
-0x17ae573d,	0x91a5522d,	0x1c551c52,	0x49848522,
-0x873bc54e,	0x1a2ec2fe,	0x5677af78,	0x1dd5d008,
-0x73c9b7a4,	0xf3457a09,	0x8fef1cc1,	0x7b845cac,
-0xb989248b,	0xf2921ec9,	0x71431fb0,	0x4697b928,
-0x2068f116,	0x4756ae0b,	0x7f2315a6,	0x3075ee51,
-0x93808fe3,	0x0a8bf0a2,	0x41ae68db,	0x7c7aea79,
-0x8a036c77,	0x3bd26e9f,	0x938760ad,	0xc16aa948,
-0x48cee353,	0x110c296a,	0xb0562141,	0xaadefff2,
-0x39107bdb,	0xf2fdcb94,	0xedaa4ef8,	0x39b68d06,
-0x66207561,	0xec544b74,	0xfd5ea699,	0x456c18ce,
-0x226a54d2,	0x07b36341,	0xc771e69c,	0x6610ea78,
-0x84cc8973,	0x0dd3cfff,	0x2deeb148,	0x6b3da83a,
-0x8b3d6854,	0x7423712a,	0x4ebcf2d0,	0xe45b0b68,
-0x20d1141f,	0x4a4ed962,	0x2cc7993e,	0xe249c851,
-0xa60dff79,	0xcd3727ba,	0x5e91d1ab,	0x3b6d4523,
-0xd2d7509e,	0xd5ea5ef6,	0x8fbf4006,	0x3c771673,
-0x6f500446,	0x6ac41dea,	0x1c9846bd,	0x65b13f62,
-0x75da9fd7,	0x6f8a5ec0,	0x19e384c2,	0x7bb6fa3c,
-0x22942d91,	0x7933fcc9,	0x0613dbe8,	0x8d806e31,
-0xd590e7d9,	0x64e55f3b,	0xc33585f8,	0xd7f69cb8,
-0xa74dd834,	0x973ce207,	0x78c53ab6,	0x1262fc4c,
-0xb210abf7,	0xd549d530,	0x9220b3ae,	0x03c5bdcb,
-0x72eeb0e4,	0x50af734b,	0xb0bc88a5,	0x6077acc9,
-0x9d51caf9,	0x63fb8670,	0x059b7f9d,	0x23c62f4a,
-0x3efb3f4d,	0x152a02ba,	0x3c9c683a,	0xed323f23,
-0x514d4bcf,	0x3b4724ea,	0x5adf550b,	0x88ff2a3a,
-0xf513dfc3,	0xbc067894,	0xb8ace8ee,	0x4ea08413,
-0x564a0211,	0xec08d000,	0x88f2d8b9,	0x633c232e,
-0xfc369c98,	0x681f6d49,	0x40478b0c,	0x257f8ccb,
-0x255710b6,	0x2d7f96fd,	0x7a0a05db,	0x3f22b6c3,
-0x747b954c,	0x0223dfd4,	0x92b82a50,	0xb64b14d9,
-0x638c2425,	0x7ecf3aa4,	0x1d6c828e,	0xe599d5ad,
-0x9c5962ef,	0x0c65309c,	0x3fe9197f,	0x6eb20295,
-0xa79c902e,	0xc09b9706,	0x30e0adf4,	0x328663c1,
-0x710582d4,	0x66c659ab,	0x8b5f4623,	0xe61ab1eb,
-0x98261cab,	0x8424f2b4,	0x87bbb44a,	0x5da9bf94,
-0x275e692d,	0x8d45c932,	0x1e385788,	0xf6dd16cb,
-0xf0098202,	0x182fb640,	0x33223503,	0xf0c2ba9a,
-0x6d14a05d,	0x7e779788,	0x3dd2d827,	0x9722eca2,
-0xb1dd3b68,	0xddc4ddab,	0x89372403,	0x0fc61fe5,
-0xe87a3daf,	0x32c80bd9,	0x10c0ee6f,	0xf5a634af,
-0x8f8206b7,	0xfc310d18,	0xc6e2bc5f,	0x55961d3c,
-0x57f95fec,	0x0aca8531,	0x3d0f1e03,	0xcb429bf0,
-0x94e83c04,	0xd22253a5,	0x6dc84e0c,	0xe413bfdf,
-0x60f01c7e,	0xa59bc63a,	0x6e1ca5de,	0x81db7447,
-0x2962a9de,	0x473a78d6,	0xc78f4b60,	0x7223f019,
-0x46a89934,	0x958b2dc0,	0x39d21b92,	0x7c41a788,
-0x1918ddf7,	0x03b03d8e,	0x1c83347d,	0x8a2c1d01,
-0xcf0e2b36,	0xe395b75c,	0x16011525,	0xc01f1c8c,
-0x28492afb,	0xdeda3005,	0x3d01c55d,	0x57c7b0bd,
-0xe7f20980,	0x9af93f48,	0x2d2ef7d8,	0x82588e29,
-0xb0249a6d,	0x21d7bbf4,	0xfc0bdceb,	0x78eda904,
-0x332d405a,	0xc13dbf8a,	0x4b146e31,	0x1f438eea,
-0x31cab96b,	0x0b5e9a77,	0x2814260d,	0x0efcebf0,
-0xa44c1bda,	0xc215fdda,	0xd5b90fa0,	0x7afb0842,
-0x9bab7428,	0x24678dfb,	0xe244616a,	0x71a8177e,

cpu/intel/model_f3x/microcode-m0df330c.h

diff --git a/cpu/intel/model_f3x/microcode-m0df330c.h b/cpu/intel/model_f3x/microcode-m0df330c.h
deleted file mode 100644
index d4a9309..0000000
--- a/cpu/intel/model_f3x/microcode-m0df330c.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m0df330c.inc  */
-0x00000001,	0x0000000c,	0x04212005,	0x00000f33,
-0x58c41efd,	0x00000001,	0x0000000d,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x45fda71c,	0xc5c83cb3,	0x7adca7a3,	0xe906ce8f,
-0xc4c9223c,	0x21cfd56b,	0x12cb5b2c,	0xcc5ea32f,
-0xfa3ebaf7,	0xf33760bc,	0x9ad2f278,	0x388b2cac,
-0x6695b80d,	0xdbba67b7,	0x2f309750,	0x2e02d473,
-0xdb6c4476,	0x3128b0de,	0x21122278,	0x1e096794,
-0x2a1e624f,	0x29a9baab,	0x992e0e3d,	0x2f99bba9,
-0x3cb04252,	0x16c6b72e,	0x53330dc6,	0xc5222b17,
-0x394eaa75,	0x37c4d00a,	0xbd40f740,	0xe51c925d,
-0x725c9151,	0xd3a53ca3,	0xc839312f,	0x2d55e8dc,
-0xc85d99d8,	0xf9928fe6,	0x589b2dfc,	0xd4293d1b,
-0xe14a7bb8,	0x3a0880c0,	0xeb13e903,	0xf23eb00a,
-0xe293b540,	0xc4b12573,	0x85dbd1f8,	0x0d5cfb5e,
-0x3df68fbe,	0xe7f30fe4,	0x469bf086,	0x52a3528d,
-0x1425c7a1,	0x08994fdd,	0x6ac3b0c0,	0x6d19c1a1,
-0x56e653ef,	0x5867036b,	0x69a115f7,	0x30c35b67,
-0x75030427,	0x7c034a2e,	0x0cd2e889,	0xd4bbda8a,
-0x516552fa,	0x2b9463c5,	0x62202b82,	0xe9b0403b,
-0xc8615504,	0xde514686,	0x94fe6f37,	0x26e95233,
-0xd098d60e,	0xfb098be2,	0xcb8ae3d5,	0x6252bc84,
-0x79a468b5,	0x2568dec6,	0x2c60ab5f,	0x50d78f40,
-0x381796e0,	0x751e28ca,	0x6b1003b5,	0x365f1bd2,
-0xadbdc178,	0x54c18945,	0xfd6056ce,	0x8d959eda,
-0xe299e5f8,	0x359f24e8,	0x363e35bb,	0xa3deda38,
-0x61773547,	0x8bcc3b8d,	0xa16b34a4,	0x39cdc595,
-0x7137c122,	0xbe9813c2,	0xac72a9fe,	0x7571c3f4,
-0x001b0510,	0x26400b66,	0xc5c872ff,	0x4cc2caa0,
-0x38ba9384,	0x7cccf10e,	0xb69e8dba,	0x25765305,
-0xd79eee64,	0x40cff2bb,	0x6c25208e,	0xdc1f4211,
-0x948b3990,	0x340a1e25,	0xa61c7ad8,	0xe968250c,
-0xb77e48ff,	0xc214c91d,	0xdfb4e78f,	0x3a710e38,
-0x11d6d920,	0xe2735793,	0x8c7d592f,	0x12b6fff7,
-0xe2662cb1,	0x30e7024e,	0xa2ef683f,	0x382a182c,
-0x6f6b8682,	0x002617e1,	0xa1d8df0b,	0x371b31d2,
-0x4b8b0873,	0x2ad87046,	0xaccce0d5,	0xa64cab61,
-0x2b26eee6,	0x2a432eea,	0xc856bdac,	0x83061d84,
-0x3489d061,	0xa5fa0d92,	0x3b3361fe,	0x204c5f95,
-0x491ee713,	0x8f632e53,	0xe3a93e14,	0x417b7baa,
-0x2dceaf08,	0x2dc9f9fa,	0xa875a995,	0x7cf71bd0,
-0x882a84c1,	0x47d31cbc,	0x3222b96e,	0x39f889ea,
-0x224487e5,	0x77bf22a4,	0x9aae5363,	0xb43b278b,
-0x6dd117a8,	0x2b3cc820,	0xbb6ce2fb,	0x885d19d0,
-0xe056cd29,	0xb544d68a,	0x888c83dd,	0x20345f2b,
-0x24bf175c,	0x9c84eddf,	0x6b092d09,	0x14e60529,
-0xe2100950,	0x368a7f49,	0x21cd820d,	0x2ae4e6cf,
-0xa354d480,	0x0178af0e,	0x0352ef88,	0x31d0776c,
-0x9773994a,	0x31a38a0b,	0xd080e826,	0x800f5ae0,
-0x179f0072,	0x21ef6514,	0x9ffcafa9,	0xabedbb31,
-0x9d231bc7,	0x8cf5d8b0,	0x923427d1,	0x372fa035,
-0xbbd9d44b,	0xb45dbf72,	0x2ed1bde3,	0x1dad7c6a,
-0x80819026,	0x20f63235,	0x2fe73bf1,	0x3029768e,
-0x49dd331a,	0x0ee94c90,	0x03ff1030,	0x321f8793,
-0xae32ae76,	0x30a103d4,	0x70c6f474,	0xc4e3ecc3,
-0x66b6962f,	0x22ad66db,	0x5f4596d6,	0xe21f30d4,
-0x54a7d44f,	0xd1b45997,	0x4c9a601a,	0x34cd9146,
-0xb7c14fa2,	0xfb191a9a,	0x46286984,	0x457130f6,
-0xbb0faf3c,	0x3921327b,	0xc07d62bd,	0x6f7f9b8b,
-0xa335aff0,	0x44e50b59,	0x90d4fde5,	0x23e1eeb9,
-0xfa01f05d,	0x653b053d,	0x82879bb5,	0xa519e9c3,
-0x37bc6704,	0x2f31e7be,	0x9f331be3,	0x806b1685,
-0xd1b9c361,	0xa9d0aa28,	0x55f282d9,	0x2d8766cd,
-0x22c50d1d,	0x89fc9dcc,	0xb68c0a7d,	0x72c3968b,
-0x07dc7a7b,	0x3704b5d7,	0xf83f7fbf,	0x74d4e514,
-0x3c7d2a14,	0x66930982,	0x1e74a2c3,	0x264e70f5,
-0x8eedef74,	0x798245d0,	0x3e7f5cc4,	0xde7bc37f,
-0x66fcb4ff,	0x2863b856,	0xcdfaf436,	0xea705543,
-0xfc5b5d03,	0xd7a9307e,	0x00701136,	0x3f3e3d8f,
-0xca2c8fd7,	0xe07c339c,	0x1463729b,	0x5e649a88,
-0x64df56a2,	0x3a5284de,	0xb9176e26,	0x6b596309,
-0xf9cce67b,	0x5ee20140,	0xab5ffa99,	0x343001ed,
-0xebdb5e56,	0x684a34c3,	0xbbba8603,	0xcb21e7cf,
-0xd558b806,	0x23ceb69a,	0xe9647235,	0xfa21c5e5,
-0x9a3e151f,	0xcaaad78e,	0x5f4e2f62,	0x2794a25f,
-0x22d4e4b9,	0xffd3d734,	0x15e963bb,	0x6498242f,
-0x817b67f1,	0x297f1b8a,	0xdeea3945,	0x4ed1afb0,
-0xa48f6168,	0xf20aba65,	0x202216ba,	0x347858b2,
-0x7b77dae3,	0xdcfed474,	0x2318cd45,	0x2f43d675,
-0x8c97a56b,	0x35622d1e,	0x5c9e8507,	0x05b23bc6,
-0xe0e064fc,	0x3f6b1e29,	0x22d31146,	0x293c5aec,
-0xe4305363,	0x06bd5d59,	0xa26f3833,	0xf2f577d3,
-0x1fc2e51a,	0x229f45f3,	0x04c969dc,	0xc2c138de,
-0x1073ede1,	0xfff23304,	0x76c6cd54,	0x37972029,
-0x6a028240,	0xcb766a6c,	0xe45edcba,	0xe0fc0ab2,
-0x75434354,	0x3f1081a6,	0x73d47441,	0xd1c37cf3,
-0x84b2cd76,	0xe2ff45e1,	0x84a70fdc,	0x2c2e8df1,
-0x897bfd22,	0xcbd9af5b,	0xba0d3a3c,	0x1b09665c,
-0x10f7f7d2,	0x204de839,	0x49430f96,	0x2d2ebead,
-0xa26a5c8f,	0x15f6ecd1,	0xb5ca1ff5,	0x22d965f3,
-0x44751954,	0x266dc552,	0x7d43e5bb,	0xdf4b1f5a,
-0x3c0f2a1a,	0x359c9c3f,	0xf096bf30,	0xe15553aa,
-0x2bda0831,	0xd42d6010,	0x304e53cb,	0x2191dfc9,
-0xbee94875,	0xf7b0ec83,	0x2207174e,	0x4bc7535a,
-0x8555bd49,	0x32052583,	0x6cfd21fa,	0x688fab55,
-0x33aee02a,	0x45e8cbc5,	0x663f8256,	0x27f194d7,
-0x1357258a,	0x65ec6bcb,	0x494ec91b,	0xd9294640,
-0xbe66c1c7,	0x20e330c4,	0xbc881b29,	0xe3598be3,
-0xda3ea3a1,	0xcf9a928a,	0xdc4a80e4,	0x26cdafd3,
-0xbb69f7a0,	0xeb8ea752,	0x7178ba6b,	0x2897330c,
-0xd1b55818,	0x3dcb45fa,	0xd247ae1f,	0x0c321066,
-0x1cb5d0e6,	0x3a26571a,	0xc2f7f883,	0x35078a50,
-0x0e7076ba,	0x0f6f56cd,	0x244427d3,	0xd6f772de,
-0x945a89ea,	0x959fe859,	0x32a12387,	0x0f9e28a6,
-0x5765abe0,	0x705e0055,	0x77479ad1,	0x465a656c,
-0x5ae66df6,	0xc8003c87,	0x8a01f279,	0xee339935,
-0x092f7107,	0xb0343860,	0xd8cbfee7,	0x7e395a60,
-0xfee92cef,	0x86467a1f,	0x919a0cd2,	0xd1839c64,
-0x08f45639,	0xd01ebabc,	0x8423c84f,	0x13a46247,
-0x21919c77,	0x5246336b,	0x419c3250,	0xe7ceaf92,
-0x053c8e88,	0x7f32dfe4,	0x7546be6f,	0x952afc0e,
-0xb3ff1bd4,	0x07209560,	0xbf7e6f17,	0x586ed9c3,
-0xb19c766c,	0x362b7a90,	0xd346922a,	0xae4bb663,
-0x31253c02,	0xd765c9fa,	0x4b3eba52,	0x654f4989,
-0x9bebe752,	0x816c8ed5,	0x61cb366a,	0x9d569d53,
-0x69f80992,	0x83feda54,	0x2f597721,	0xd5dcc0b8,
-0x33d8a392,	0x767f04c0,	0xf951e755,	0xe6fd02e2,
-0x2287d6fd,	0xc1a67938,	0x3bd4bd5b,	0xd1b2275c,
-0x900ac73a,	0x1146ff57,	0x6fbc1e0e,	0x35190704,
-0x0ac32212,	0xd063f20c,	0x32ba4a23,	0x47ee4127,
-0x572104b1,	0x3616b8f8,	0xcc2d0057,	0x0f6874d7,
-0x86cfb62a,	0xb4dd6bdb,	0x55088d4d,	0xfca14905,
-0x653f8e17,	0x1416212a,	0x0f4c4924,	0x3b7e8a5d,
-0xee246bef,	0xf561936f,	0x6a418d5c,	0x82a552e3,
-0x351523e0,	0x2d760fa4,	0x7ca18f4a,	0x6c9d411b,
-0xea4a38bc,	0x6675850f,	0x6d4384ea,	0x9d6bac13,
-0x1d8bc278,	0x790289d8,	0x1c1cbe8f,	0xe89cb07c,
-0xb62823fc,	0x75fedf6a,	0x7d4cbaf5,	0x71d501d5,

cpu/intel/model_f3x/microcode-m1df3417.h

diff --git a/cpu/intel/model_f3x/microcode-m1df3417.h b/cpu/intel/model_f3x/microcode-m1df3417.h
deleted file mode 100644
index bd2aab1..0000000
--- a/cpu/intel/model_f3x/microcode-m1df3417.h
+++ /dev/null
@@ -1,483 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m1df3417.inc  */
-0x00000001,	0x00000017,	0x04212005,	0x00000f34,
-0x2cbd6146,	0x00000001,	0x0000001d,	0x00001bd0,
-0x00001c00,	0x00000000,	0x00000000,	0x00000000,
-0x9fbf327a,	0x2b41b451,	0x9faf9c59,	0x6b62b8e4,
-0x28a4bf1b,	0x68a90200,	0x76d16a17,	0xb90dfc19,
-0x3ca53521,	0xa04666fc,	0x045ad035,	0x26fb2e1b,
-0xa4fb1229,	0x07e4f3e8,	0xc94461ea,	0x7c1a3eab,
-0x7a43994c,	0xc7bb8bc4,	0x7e35699a,	0xf76ff2a0,
-0x3113ad2a,	0xdf89abbb,	0xa846dac9,	0x8878dd67,
-0x4f2fbf68,	0x8a2629f3,	0x19cdde5c,	0x33f5d3ac,
-0x89cc0510,	0x6939b57c,	0x1d0ce21f,	0xcbd8c975,
-0x8399bc7a,	0x3340bc9c,	0x2ae5b33c,	0x483f6d55,
-0xa5c23575,	0x0cd85b6e,	0xc46e5a9c,	0xb31204bc,
-0xcb5a96a5,	0x6a24d1fa,	0xc1b09daf,	0x65976bd8,
-0x627382c5,	0x31d99884,	0xcd760418,	0xab85819f,
-0xcd4e400a,	0xe754b7db,	0xbfdca0b2,	0x6fb4bace,
-0x7cbaafdc,	0xdedbe28c,	0x0ff4856b,	0xd2007e27,
-0x34fdfd0c,	0x7d4b8aed,	0xc725c407,	0x559f7b96,
-0xcd9944ec,	0x04d189a0,	0x05f53e1e,	0x4d17446c,
-0x0086f6ce,	0xa59a413e,	0x0699a7a9,	0xcb8771ea,
-0x8dc80f22,	0x7d755b17,	0x124d5c52,	0xf30007ef,
-0xbdbcf840,	0xc33d1110,	0xa921cc9d,	0x3bc9349a,
-0x482c8e1f,	0x447545a2,	0xa83e956f,	0x7ec240ae,
-0xb0232daf,	0x1eb4493f,	0x74fae03a,	0x2255247a,
-0x14988d81,	0xcf53b699,	0xbcdb4ffc,	0xc96b0d2e,
-0x77ab6ea5,	0xc4248a9c,	0x171b4742,	0x321b4876,
-0x6e075f51,	0xd09770b6,	0x44f74bce,	0x1b3237c0,
-0x81abc949,	0x8e7ba040,	0x3f452974,	0xc7a1e70e,
-0x2c8a7ea3,	0x75de2024,	0x21530e34,	0x95cd09eb,
-0x6e7e331d,	0x8490c8a8,	0x3a3e2583,	0xeae1701f,
-0x3a3ae0c1,	0xb9c43ac9,	0x0847b7b3,	0x2240cbca,
-0x66e7dde3,	0xbd4b056e,	0xe17baf88,	0xc48cb80d,
-0xcaadad18,	0x9f632517,	0xa6851399,	0x482f1e16,
-0xbdb7390e,	0xb866ab63,	0x3a6eeda9,	0x9b39fddd,
-0x9308b31b,	0x6a77de17,	0x1511896e,	0xbb4432ca,
-0x64c81fad,	0x5031f2f6,	0x48e5dc67,	0x925b469d,
-0xf73f3940,	0xa06e860c,	0xd074345b,	0xe45d7a19,
-0xf67b6e78,	0xa169f2e0,	0xb5696203,	0x8e9c54be,
-0xbabad9f8,	0xdfa25abb,	0xe7b16383,	0x1377744e,
-0x0c3ae192,	0xcc7e10d9,	0x4dc5dbba,	0x88660539,
-0x0da822f2,	0x11ae62f4,	0xf19acd3f,	0xab62f4c1,
-0x6ed9a55f,	0xec3e0236,	0x049fd614,	0xbc5c4ee9,
-0x3ef5b063,	0x346ca46f,	0x51785dfc,	0x711692d0,
-0xe5a0878e,	0x48163770,	0x6846a808,	0x6548dc1b,
-0xe176a619,	0x6ab36fde,	0xbc8af42c,	0xc43e6ffe,
-0x5bf49353,	0x1986adbc,	0x3989e6db,	0x6e0f3f71,
-0x63991ff9,	0x421dbc52,	0x0a172c1d,	0xf9201b49,
-0xc864df42,	0xa717211e,	0xbd7b027c,	0xc37b488a,
-0x1b40159f,	0x82b56e29,	0x7045a923,	0xa9635f95,
-0x6e442902,	0xd05d3946,	0x18ef6c8a,	0x53301361,
-0x98093b21,	0x6987e008,	0xbd759198,	0x8335a7a3,
-0xe4a07e31,	0x829b3256,	0x86d14f5d,	0x373236b0,
-0xee1603a2,	0x8cab0af8,	0x5bbc822f,	0xa5f50977,
-0xadf829a4,	0xc6a7a5c8,	0x4f9a770a,	0x68f5f5b9,
-0x1811fc08,	0x49aaa013,	0xc40a9793,	0x45b7e720,
-0x11f95952,	0xa58fc5dd,	0x4bd441a4,	0x31dff79d,
-0x6d4bc050,	0xe50e6b2f,	0xb5986885,	0xe7ba87b7,
-0x003f5f10,	0xb8f38176,	0xfa8298c3,	0xf1438f7b,
-0xabe50c0a,	0xaebcb389,	0xba1cf4cc,	0x5f69924b,
-0xcad57af2,	0x033f0a88,	0x76612fd4,	0x8b6d7e6c,
-0xe505f26c,	0x63b3fcc1,	0x0ac99a9e,	0x032af319,
-0x0b085c33,	0x38d40f09,	0xd79d97c6,	0xc928bfbb,
-0x7a8aa8a4,	0x09a15c0b,	0xfd64b3f9,	0x79a2749b,
-0x94b17267,	0x5a940a3f,	0xa808ec13,	0xd5c2fdc8,
-0xd76c2cca,	0x18bb8f2f,	0xec3cbe35,	0x0149c406,
-0xeec40085,	0xa4174252,	0x24d308e1,	0x7a07c657,
-0x993c6a29,	0xc4877c78,	0x20f7588b,	0x8ab0ce57,
-0x44958e90,	0x0ccfa678,	0x177749a3,	0x9925fca5,
-0x98a51a3e,	0x51f7e7df,	0x2efcb727,	0x34fdc710,
-0x1df07336,	0xa5403783,	0x68a088f8,	0x7ccbde02,
-0x0fad4485,	0xe644d152,	0x81ac8f42,	0x16b72c24,
-0xb02b9675,	0x23a8c950,	0x951e2abe,	0xb1eb3c0e,
-0x0ebdcedd,	0x72cee426,	0xb3697ccb,	0x408e1ca6,
-0x10e66a49,	0x425d427f,	0xae915e79,	0xc36737b2,
-0xe4ca6c88,	0x25513a8f,	0x1e11aabd,	0xcb787d7d,
-0x3fbe9a7e,	0xca7d6195,	0xf10e27a5,	0xd263b030,
-0xdf8e8f6e,	0xa2ed8fa9,	0x2d0586e8,	0xe0e9ebe8,
-0xe4487a72,	0xb541b1ab,	0x9b6f7dbd,	0xe78208b6,
-0xb34470f0,	0x43462a39,	0xa3612161,	0x39b82e49,
-0xbfff3022,	0x05a7b499,	0xb4039476,	0x5ed1c3db,
-0x29bc6edd,	0x07815f50,	0x94debedd,	0x5f4d27a2,
-0x0b192aff,	0x34d6381f,	0xefa1db27,	0x1f5e12f8,
-0x3486ff01,	0xe8855253,	0x928a0aca,	0x672ac1b4,
-0xb89e4a1b,	0x27f4c297,	0x5af71582,	0x5011f9d1,
-0x6272394d,	0xcc0a8a11,	0xc05f332a,	0x78b6c2af,
-0xefb583df,	0x6b682e78,	0x4be2b005,	0x78d67f2c,
-0xf8fa6493,	0x5980ef20,	0x242a33a2,	0xd9670ba1,
-0xc95cc1b6,	0x42a88ba2,	0x2a59f02d,	0x16bef734,
-0x883967d3,	0xa23c3ac3,	0xd24d0aec,	0xc97dc00f,
-0x4a348e69,	0x3727a38d,	0xe6bcc557,	0xc0100195,
-0xab209095,	0x95906360,	0x8ba59b4d,	0x03658604,
-0x761e0b60,	0x40de9b58,	0x75a7ac7e,	0x5d64f18a,
-0x8d15ace2,	0x3451a20e,	0xc84fa43b,	0xd80206db,
-0xd6a9abbe,	0x2f213d06,	0x43b503e4,	0xd43272e8,
-0x2551c40d,	0x5eca9263,	0xb5164cc0,	0x0a8b6849,
-0x2be92588,	0xb324cf51,	0x9ac0bf91,	0xae2d3af1,
-0xdeccb499,	0x867a6379,	0x5a9dd70a,	0x86e2ff85,
-0xa394c8b9,	0xf1733ddc,	0xd627dcd2,	0xcce1c8cc,
-0xe4ed2ac3,	0x0c9e942b,	0xce847fb7,	0x86410f94,
-0xe4dea9ee,	0xbb6c0455,	0x3bf1323e,	0x9ef37011,
-0x66482b56,	0x7e426c99,	0xfa834c08,	0x396d97dc,
-0x39fa76e1,	0xc5dc6086,	0x643eec7c,	0x505d6257,
-0xb88cb057,	0xed8e1582,	0xebc58cc6,	0x12bc0eec,
-0x5d4c6dce,	0xe15e513e,	0x1b615938,	0x03f37a1e,
-0xb2d47c1a,	0xe4898548,	0xd9db0f73,	0x3116ed30,
-0xf37a985c,	0x984f292f,	0xb95c3bb8,	0x5983471b,
-0xd32606a9,	0xd262306c,	0x27022229,	0x835a2cf1,
-0x32412a68,	0xe34f9512,	0x87b3fe20,	0x8921143c,
-0xffc72ac2,	0xe68110a3,	0x8f03c326,	0x94204988,
-0x4dec33c6,	0xdc32ba80,	0x9b6c0fdd,	0x1dd023bc,
-0x41f6a622,	0xe5148ca4,	0xcad8f563,	0xb60a0491,
-0x3bb8ac3a,	0x5319fd1f,	0x150fd957,	0x2b0e5084,
-0x459f73db,	0xb8565124,	0x3c12d214,	0x37163859,
-0xdfa7bf0b,	0x21e500ec,	0x89e7a004,	0x9f97ce69,
-0xe6c3d033,	0xbf7f818d,	0x2285f31c,	0x474d96c6,
-0x2f377d76,	0x73ad1ee6,	0x1f7247ce,	0x95adc53a,
-0x4c62d951,	0xfe732dc0,	0xef0fbbe3,	0x51bf9d4f,
-0x3254179d,	0x394f146c,	0x62cc6315,	0xf00bc3be,
-0xcecad864,	0xbfb9b53e,	0x7a65501e,	0xe427e75b,
-0xeabe0e6a,	0x25d1e01f,	0x1788e58b,	0x39c913bf,
-0xf37b1195,	0x7c4f1ce6,	0x1e5768b0,	0xbb8a8561,
-0x78c498a2,	0xff89a1d2,	0x3afa4408,	0xabfb7f98,
-0xa03a3dc9,	0xabcfaeab,	0x7bbc277c,	0x11cbbd49,
-0x369e55f1,	0x472dac75,	0x3b52f318,	0xef5d8a5b,
-0x5048b3bf,	0xca6f5686,	0xacdbb5f4,	0x27f8d0ef,
-0x0bd0bac1,	0xbdacf44f,	0x692e1c21,	0x003ed188,
-0x906cb52e,	0xbb08bb91,	0xca89a92d,	0x51794247,
-0x68b875d0,	0x064699bc,	0x8fe578fe,	0x9eccb2c1,
-0x94f4c3e9,	0x33cbfe22,	0x56a6b1c2,	0x9edc591a,
-0x1b6adf0d,	0x8ef4e2ab,	0x627ab711,	0x1f85c4e3,
-0x4353abb4,	0xbcf76e01,	0x0a6c7528,	0x9483a0d6,
-0xf3da4fc9,	0x42187754,	0x68de6664,	0xbc0ff8d5,
-0xd026c5dc,	0x6eada9c2,	0xe7e3e431,	0x6e22fc23,
-0x61719184,	0x416554a7,	0x8e918580,	0xa7b1829a,
-0xab055dad,	0x8fd67f87,	0x8551783b,	0xa9e8a4e6,
-0x420e4767,	0x8a282bdb,	0x627c7474,	0x94391f49,
-0x0587364f,	0x0e05dee5,	0x3c200cfa,	0x37ad7941,
-0x9e064ec9,	0xa08a79f1,	0xded3e03d,	0x52ddca95,
-0xe7f248f1,	0xadc21d4e,	0xe8f609bb,	0xa7d00e2f,
-0xcee52be6,	0xce59a13c,	0x77a22385,	0xe907de8f,
-0xdd1becd1,	0x4f62b855,	0xf809431b,	0x9051abe1,
-0x1b97f1c1,	0x3956b8a1,	0x9b67349b,	0xe7172623,
-0x0c587452,	0xce3e5760,	0x02528d3b,	0x4a3e386a,
-0xa23b7545,	0xa5c8d0c1,	0x7dbc3772,	0x865ef72b,
-0xa1636170,	0x59086e5d,	0x5118d371,	0xc5a2e317,
-0x5495a3b7,	0x328ab06f,	0xbd5173bb,	0x49bf468a,
-0xbe3a6251,	0xa1f2400a,	0xf07cddbe,	0x3db625f5,
-0xa506cc25,	0x195dae27,	0x701937de,	0x21844e06,
-0x8d58481c,	0xf73c095a,	0x3b9be321,	0x05e12f42,
-0x55739f6f,	0x21df4a8f,	0x5d5000e6,	0xd8fefc8d,
-0x88ca172b,	0x620a50d8,	0x1e215ff2,	0x0fd1f2a9,
-0x84312202,	0xf721e46f,	0x9e5614ef,	0x4cc9bdd6,
-0x345a9f13,	0xcb1b458f,	0x8ffc6a39,	0x36d7cc81,
-0x821c0b49,	0xdfb4a6d4,	0xcf060d96,	0xe12f48b2,
-0xdda3960f,	0x6923305d,	0xa44e3d32,	0x3b050c55,
-0x53fc8cf7,	0x074c49f1,	0x8fc60933,	0x68a81bea,
-0x938a8e74,	0x1db192f3,	0xb8c90a66,	0x9010ba15,
-0x07b0a534,	0x08f1ac18,	0x2e1ad868,	0xa030c62a,
-0x4a87b72e,	0x2bbb71b1,	0xd9511feb,	0xe69e471e,
-0x643dcc65,	0xaae14581,	0xbb525c1f,	0xfb2c9a36,
-0x6b981977,	0xa90c1274,	0xbad2a083,	0xe0623243,
-0xb64e5036,	0xf02da84c,	0xa6036fa9,	0x4a7937f1,
-0x0628b829,	0x14c65dfe,	0x66f0f18a,	0x3d8450c9,
-0xdc46f5a9,	0x2b760960,	0x9bd27d34,	0xf1a4e1a0,
-0x2fce1f0e,	0xa6ff5ae7,	0x36ca01bf,	0xb2040647,
-0x206ce76a,	0x96e6011b,	0x3c887208,	0x310b07be,
-0xb746778c,	0x4b87cad7,	0x54a237d1,	0x066b00cb,
-0x28538149,	0x3940fdec,	0x2543dd19,	0x0d61da95,
-0x9f0ec2a8,	0x54732ac2,	0x1053c31c,	0x56c337c3,
-0xe6d95ed6,	0x01e73c64,	0xa4d59927,	0x30a2e3f7,
-0xe59ba358,	0xa92ab193,	0x85241ff4,	0x638a128e,
-0xdf4eab89,	0x9e65421e,	0x28084665,	0x5f832ff0,
-0xfe73bbca,	0xeb5751a2,	0x7e3a974a,	0x5a687c0e,
-0x109846bd,	0xbb3b0fc2,	0xdfbb1d09,	0xc4163632,
-0x0ae7d72c,	0xd743ccdd,	0x3d519ca5,	0xfc0fbc3f,
-0x96b03f38,	0x7225eed6,	0x30d46019,	0xae6771be,
-0xf3b67aca,	0xfd44fc17,	0x6692ee88,	0xf6e42543,
-0x98a0c348,	0x0d80c75c,	0x52dffcc2,	0x9fc3e94c,
-0x427e10dc,	0x718ce01c,	0x73c84733,	0x04486fab,
-0x03bab408,	0x5f71e7ee,	0xa07afa0a,	0xb2a69b10,
-0x1bd1cf67,	0xda5db20a,	0xebbd96a2,	0x3cd78b00,
-0x62c8b708,	0xbef8048e,	0xc7ca75ad,	0x8bfeeb77,
-0x331dfad9,	0x2ff4ad59,	0x95b01d87,	0x18409706,
-0xb55e8dba,	0x12132190,	0x8e0700d2,	0xba0565df,
-0xd2dddc9c,	0x2766fdaa,	0xcd18d6fa,	0x0741e268,
-0xd7fb16a1,	0xe33101c5,	0x439a2d80,	0x3b6224bf,
-0xc6a2fc64,	0xbcf4db84,	0x645332b2,	0x79df445e,
-0x989de295,	0xa08eba68,	0x413e59d9,	0x63408606,
-0xa4eeb5c0,	0xb7f4445c,	0x16ca78c5,	0xc60f1ee0,
-0x997bfad1,	0x17837123,	0xb51d95e0,	0x95e64fb5,
-0x8fb882cb,	0x2bbd1f6c,	0x366c6e1a,	0xdc6dbe79,
-0x42f570b7,	0xe676de45,	0xf7e2bb40,	0xba4bbf81,
-0xd3e23715,	0x71bee5c6,	0x5a309f9a,	0x90a51750,
-0x1019b74f,	0xc14c3b92,	0xda315332,	0xe73ba69f,
-0xe22e3c09,	0x6be8c884,	0x5b28f280,	0x617dd51a,
-0x0d5fe9ae,	0x378b4af5,	0x59176371,	0x319e1b1d,
-0x614b5f56,	0xba04e514,	0xf3185a28,	0x7db83997,
-0x788058ff,	0x8ea09117,	0xeb391588,	0x3930cd79,
-0x4079de1d,	0x7335d3e4,	0x40b92e55,	0xd81bfe8c,
-0x8d2dfff8,	0xb20d1b95,	0x54fdd754,	0xccc79905,
-0xb61264f3,	0xd3b56698,	0x292bbff0,	0x73f84171,
-0x8e21d0c0,	0xd17a647f,	0x3ac23c3e,	0x5f087a6d,
-0xe2c7ad20,	0x78da8742,	0x357d9ced,	0xfda05f27,
-0x05790cb5,	0x0c3fa95d,	0x0f4b67ab,	0x939fc831,
-0x555768d7,	0xefa7389d,	0xb2a5c860,	0x06fde838,
-0x6dda0cc5,	0xcf642c58,	0xdac9a0c2,	0x5f78ce35,
-0xd8c90c33,	0xb552d66e,	0x2b6d8254,	0xe5d46f62,
-0xf530a048,	0xa890cd85,	0x0883b0f3,	0xcbbed658,
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-0x25579529,	0x0d785d6f,	0x15564167,	0x9c5e03f4,
-0xdf9fbfe4,	0x1e5487be,	0x688b944f,	0x8ce19bcb,
-0xaf35dc5b,	0x10b64b81,	0x68ab2f39,	0x60dbaec1,
-0xeac41162,	0x1ebaa56f,	0xbb69933d,	0x3326e091,
-0x074746b4,	0x73661a93,	0xf9ec6abe,	0xcc848bef,
-0x9a77158e,	0x9a3bd329,	0xa1a62cdf,	0x475a1801,
-0xb33a91fd,	0x77ed9632,	0xbd39bb9c,	0x2ddfafac,
-0xda5465e8,	0xb59c9d9b,	0xe52e287f,	0x3b6faeaa,
-0x5a527d34,	0x58c776dc,	0xb6d24203,	0x8e917c76,
-0x55dd9ce7,	0xa8d1b4e0,	0x5c86a5ed,	0x01d0905e,
-0xd294b1a7,	0x5f3a2b77,	0x41bd36de,	0x1ed8e337,
-0x318c7641,	0xc70bac54,	0x2069d024,	0xa1d95b6d,
-0x3355c816,	0x31492af8,	0xa431c8a7,	0xdb2e1784,
-0x25439c76,	0x6b35c542,	0x38d7ac8f,	0x34a0077b,
-0xb56518aa,	0xc192f3ce,	0xecd37e8e,	0x235978ac,
-0x060d1426,	0xe0122b3f,	0x0529a1e6,	0xabce9fac,
-0xf9fe9079,	0x50ca70fc,	0x10bd9da2,	0xb11069f0,
-0xa270dc6e,	0x4a855044,	0x282c8e4a,	0xa1cbebfc,
-0x9c366915,	0xe69c5621,	0x4117ad9d,	0x92000f68,
-0x62d06d71,	0xd57e92d6,	0x27658db3,	0xffc1d7f2,
-0x2e758447,	0xcd3ccc8f,	0x351bf00d,	0x9c6946c2,
-0x0a69924c,	0x426cc7b4,	0x0e6a41e3,	0xb10e9ab6,
-0xc81eaee4,	0x822cad1e,	0x9ad6099b,	0x91deef2e,
-0x23e3dccb,	0xadd9191f,	0x0b239f95,	0x59ca7f29,

cpu/intel/model_f3x/microcode.bin

diff --git a/cpu/intel/model_f3x/microcode.bin b/cpu/intel/model_f3x/microcode.bin
new file mode 100644
index 0000000..110215d
--- /dev/null
+++ b/cpu/intel/model_f3x/microcode.bin
Binary files differ

cpu/intel/model_f3x/microcode.h

diff --git a/cpu/intel/model_f3x/microcode.h b/cpu/intel/model_f3x/microcode.h
deleted file mode 100644
index fa5301f..0000000
--- a/cpu/intel/model_f3x/microcode.h
+++ /dev/null
@@ -1,4 +0,0 @@
-
-#include "microcode-m0df320a.h"
-#include "microcode-m0df330c.h"
-#include "microcode-m1df3417.h"

cpu/intel/model_f4x/microcode-m01f480c.h

diff --git a/cpu/intel/model_f4x/microcode-m01f480c.h b/cpu/intel/model_f4x/microcode-m01f480c.h
deleted file mode 100644
index 6265e4a..0000000
--- a/cpu/intel/model_f4x/microcode-m01f480c.h
+++ /dev/null
@@ -1,227 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m01f480c.inc  */
-0x00000001,	0x0000000c,	0x05082006,	0x00000f48,
-0x5b9afec7,	0x00000001,	0x00000001,	0x00000bd0,
-0x00000c00,	0x00000000,	0x00000000,	0x00000000,
-0x26d329c9,	0x2a31e166,	0x66c2f9e9,	0x20f1b672,
-0x8d3c77ed,	0x239833ff,	0x707d6a41,	0x3e4d0c59,
-0x5d47bea3,	0x37368a7c,	0x07ec485c,	0x021431f4,
-0x740853ab,	0x0e1e664e,	0xb37508b0,	0xa10916e3,
-0x061f9f93,	0x1fe2bbdf,	0x7f1d60ab,	0x9a7b706b,
-0x195bde13,	0xac2bcbb5,	0x2612228d,	0x2a9ee1c9,
-0xe468d9f0,	0xbb43af00,	0x8f3f1a7f,	0x712ff1b5,
-0x1212e591,	0x3b849a2d,	0xcf6d6b66,	0x6090be89,
-0xbedd5cf4,	0x741d373d,	0x1b0a5595,	0x14dcc781,
-0x39894c95,	0x64ce0417,	0x0fe0bac6,	0xd86b6406,
-0x569f7a4d,	0x0f2a7353,	0x713d3c12,	0xf5de289d,
-0x4309ec38,	0xd4093f8c,	0x9e920c0b,	0x0c7c318f,
-0xe233bedf,	0xc183eed4,	0x58f9a71b,	0x4a999e3f,
-0x793e1ed7,	0x04570728,	0x6491ebbb,	0x6d4766be,
-0x5c406a38,	0x59f9d68e,	0x2da064be,	0x2fb6525e,
-0xff5f4104,	0x7b627201,	0xc9cc0ca8,	0xbe19b83a,
-0xddcd290c,	0x2bf63b7b,	0x0169516b,	0x9104527d,
-0x18dfd2e8,	0xa1d57e4f,	0x743c1688,	0x33ce65ad,
-0xb934f7b1,	0xa6364928,	0x43e5c1a5,	0x0ebe786f,
-0x02877d68,	0x0be7ed3c,	0x9ee46654,	0x061b14b9,
-0xa9d75799,	0x3461aeb1,	0x13824d89,	0x1ea4144e,
-0x9cc9f188,	0x2e4b9cf1,	0x3dc01855,	0xe6c641a8,
-0xe2bb2feb,	0x3dbf0b40,	0xb9ad30c6,	0xc2dfee01,
-0x7b8a7f33,	0xd543428a,	0x6135b343,	0x048d4466,
-0x9c35512c,	0xfef7544b,	0x6c41c9c8,	0xd0441cdb,
-0xf46d7ab0,	0x0420c0c6,	0x92406962,	0xc827fc36,
-0xa2d92446,	0xe4b07159,	0x379e3932,	0x212d21be,
-0xf3579f1a,	0xf056d68a,	0xa2e901c8,	0x5105a222,
-0xd505865e,	0x1d09a0dc,	0x3a246045,	0x7f8eefba,
-0x707bca5d,	0x5cbe01cb,	0xfd10124a,	0x00f5a0d7,
-0xe3c0171c,	0x524fa175,	0xdb3853d5,	0xfeb3df4c,
-0x11bdefaf,	0x2ab213a9,	0x968d5e50,	0xeb0f1584,
-0x24257428,	0xf6b43949,	0x5b69a8e8,	0x146f3475,
-0x36afc131,	0xdfc35141,	0x992054a6,	0x13cfd4e7,
-0xabfe12ac,	0x0519d8cb,	0x1b40cdb2,	0x306887d1,
-0x1f8b8c5a,	0x09a1c1b6,	0x8d10622a,	0x3437e5cd,
-0x60f65684,	0x3127a82d,	0x1a7b07a8,	0xdcb853e7,
-0xe9ad88f4,	0x3ae8e45b,	0xde20b069,	0xc2dd9993,
-0x9d4d818d,	0xff289e3b,	0xcf3a6f51,	0x3048973c,
-0xd9329452,	0xe2b8f7c4,	0xb9c420ed,	0x2ce4f2e8,
-0x32d24483,	0x0b75bdd5,	0xdae9c61d,	0x192caaf6,
-0x3d70d1ee,	0x0cf75f99,	0x2a3ab102,	0x0d3e68db,
-0x2f1ddeab,	0x2dc88c1b,	0xa8ab7528,	0xe443fd87,
-0x6116afaf,	0x33247d35,	0x4282e07c,	0xcb56f01e,
-0xf474f2ba,	0xc2795388,	0x56708a34,	0x1ebb090e,
-0x1fe0267a,	0xc44dd6bd,	0x5567c1f0,	0x1a1bde80,
-0x815164b4,	0x28a703eb,	0xa7ea0d67,	0x059d987a,
-0xff0bd083,	0x2000f293,	0xf0fc10cd,	0x2297d629,
-0x8f66ca3c,	0x2b5c9fa7,	0x8f548249,	0xd2f1f177,
-0xb01b3a1c,	0x18790f23,	0x948bce5e,	0xe809fe28,
-0x77c1333f,	0xe465a83c,	0x7e833fff,	0x0279feb7,
-0xb0ad01a6,	0xd1b7acf5,	0x8207232f,	0x6abab29c,
-0x65423460,	0x05e6d63a,	0xb6bb2cbe,	0x7a980894,
-0xd105ef23,	0x733aa9a2,	0xe49afa4f,	0x030cf958,
-0xd6923461,	0x6f5189ec,	0x3ab12460,	0xdc667d63,
-0xb15adba4,	0x29c6b05c,	0x75c8a9db,	0xd42d58d3,
-0x660ed0a6,	0xc3b45804,	0x7a62b809,	0x2ddb74b6,
-0xc907dc4a,	0xd221dfb4,	0x8c3b5f72,	0x00d214e0,
-0x8e454034,	0x1fe6b683,	0xfbb425a0,	0x1ff24e08,
-0x31fdc388,	0x090e492b,	0xbe7a1211,	0x1bdcc839,
-0x6f1289b1,	0x37552a7a,	0xe9fe3c7e,	0xc59c4a56,
-0x2e9e8cb2,	0x3dbe475d,	0x38b2009b,	0xf68b548f,
-0x650360b6,	0xe279109f,	0x08f585c0,	0x13137c4f,
-0x9dbb8035,	0xe0559d22,	0x27ba1ef2,	0x7115bcbc,
-0xeab32d06,	0x3ba5a83b,	0xf4b26c6f,	0x4af2299b,
-0x53ff1a47,	0x7bea180f,	0x9a1f17c5,	0x3e73bb67,
-0x1de5a33a,	0x4f8236d4,	0xcc0375a3,	0x9308a031,
-0x729b2a82,	0x3b6e7bc3,	0x29622d7c,	0xa12e5e81,
-0x5ed9b4db,	0xa252bc45,	0x36b4cfc6,	0x0785005a,
-0x153c81ea,	0x97f9ff5e,	0xa1f2ddfe,	0x005a5f2a,
-0x8d7f98d4,	0x008fda90,	0xe98725da,	0x351c9240,
-0xebc7d996,	0x3ab05185,	0x7a1670ea,	0x21f7d7d4,
-0xbd2ff954,	0x21885949,	0x6740e0d1,	0xde024a2e,
-0xf1eaaa3b,	0x016d3215,	0xd03643c5,	0xdc3d4493,
-0xf3aa90cd,	0xf9e0f628,	0xb1a08f8a,	0x10b128d4,
-0xa47437de,	0xfb9d9cdf,	0x03db607d,	0x5c01ee58,
-0x1b653dba,	0x161e084a,	0xb3bc1b7f,	0x5f465cf6,
-0xc7a4de33,	0x4b4a5fe0,	0x993d4a03,	0x1f6f7caa,
-0x7254c72b,	0x4a8273b8,	0x13451fa8,	0xbeb71239,
-0x4aead099,	0x20cca393,	0x9c20f5fc,	0xb0e800e1,
-0x42f6eebf,	0x9dd9f9ad,	0x2fcd338a,	0x1c8f542f,
-0x2a70cec8,	0xa8323157,	0xdd4f014b,	0x4811806a,
-0xe29ee9d1,	0x10fd4851,	0xa1856fe7,	0x74c54af3,
-0x0b1f4fc1,	0x62e0bfbc,	0x2a34ac31,	0x37ceeba7,
-0x0bc88ba4,	0x6a0da39c,	0xb8f20401,	0xda103375,
-0x5ad37148,	0x3d48670f,	0x10dd360a,	0xc430ca3b,
-0xb5d84eb5,	0xdff3efed,	0x0d366e3f,	0x0fcc7479,
-0x144ea51c,	0xd1c15a95,	0xf33083e6,	0x47de9a48,
-0x36b1735d,	0x1fc429af,	0x06063db1,	0x52502b06,
-0x4dce576f,	0x55935a74,	0x05bb9df1,	0x35672ace,
-0x54672062,	0x6fc72283,	0x11bb39b2,	0xba7a8765,
-0x8adcfb49,	0x1e77de0a,	0x23121a6e,	0x9622be4a,
-0x645e970f,	0x8c338693,	0xc7d4d53d,	0x0fbbf9e3,
-0x012c640f,	0x942e04e6,	0x7b954afc,	0x03fe7cc1,
-0x41bf63d5,	0x2cb4e87b,	0x9b22a6c2,	0x268b8300,
-0x4a60d8eb,	0x1d85d604,	0x542a63a3,	0x176dbbc7,
-0xaf4a47ff,	0x3f413e8e,	0x4a6e58fa,	0xfb53830d,
-0x013882df,	0x0cb45d80,	0x7d8251c3,	0xd015f916,
-0x97a2c17e,	0xe72bc8dd,	0x6dd76e80,	0x3d567dc7,
-0xf34ada7c,	0xef2d13a3,	0x7f43c2fb,	0x5ebfa522,
-0xedff273a,	0x0f9661ca,	0x8620d029,	0x7e753aee,
-0xd084fe4d,	0x788bf5f0,	0x486306b5,	0x3f7f7267,
-0xf1379628,	0x7e582e54,	0x7129c293,	0x8a2e2c72,
-0xfccaad76,	0x296e76a4,	0x86c00f66,	0xa07d9b46,
-0x3d86ea2d,	0xa08b7461,	0xad433700,	0x15c5d238,
-0x47589fa7,	0x87cc4eeb,	0x95a5592c,	0x30963e85,
-0x24718ecb,	0x02788155,	0xb0450b0b,	0x1bea2d69,
-0x8bfb61b0,	0x2cbd4982,	0xb4e202e8,	0x0b210f6a,
-0x1f5f8a14,	0x34764f12,	0x867e7ae5,	0xd849c20a,
-0xae17e666,	0x230ffd00,	0x530835f9,	0xcf165d20,
-0x4c8de748,	0xe70efe14,	0x57defefc,	0x0a89c95d,
-0x2d652e79,	0xf6693116,	0x22fbb58f,	0x27f9276c,
-0x420b3b12,	0x0dd2a030,	0xcade871e,	0x2de4379b,
-0x0dd79b21,	0x237405c8,	0xcf569f57,	0x1089c7f7,
-0x0b7a0f86,	0x35a38012,	0x14336c03,	0x9abb16fc,
-0xa2bae61b,	0x011259a5,	0x06255f6e,	0x89146af4,
-0x57177372,	0x99f5bdca,	0x3756e46c,	0x208c3294,
-0xd57654ee,	0x936046e1,	0x703d3f59,	0xbb4d8e7e,
-0x19322623,	0x3e939f15,	0x130c9156,	0xbe3ba4b3,
-0x4fea9380,	0xbf169ed9,	0x977e90e1,	0x0e5a602b,
-0x8854d38d,	0xb809f172,	0x4c0e3de4,	0x4c553817,
-0x85b25de2,	0x0bf1bd3a,	0xb8b1e414,	0x573925d0,
-0x155f0b56,	0x7d3e8581,	0xa3109199,	0x14a3e01d,
-0x326c8cb8,	0x6aca28f5,	0xd242ac23,	0xd776334f,
-0xf1e8093d,	0x3755e677,	0x03b1091c,	0xc8f8294f,
-0x813570ee,	0xdc565678,	0x0e3f1356,	0x2840bbe8,
-0x532d033e,	0xe4a47224,	0x51281b88,	0x57e43e10,
-0xf84157ec,	0x39586b89,	0xbfd62b1c,	0x5dac030b,
-0xd5656981,	0x64fa0e98,	0xbceebbc8,	0x1803f2aa,
-0x5a121ca0,	0x40167138,	0xb90acc0a,	0xc35a9707,
-0xf9d848a3,	0x20ddfd6b,	0x0228d345,	0xdb0fdc3a,
-0xb61a8dc4,	0xc3b9327b,	0x059ab851,	0x0bb9a025,
-0x6d3ef669,	0xf50fbfeb,	0xc1bb3994,	0x8292cf89,
-0x3e3759be,	0x1073081a,	0x4f8921eb,	0xa46ff9b8,
-0x968d5993,	0xae888650,	0xaa61d0ea,	0x337deff7,
-0xe1821ca2,	0x8c80546d,	0x0d1ed478,	0x76b7aed8,
-0xcea89eb0,	0x09d3f378,	0x97c96536,	0x64b48cf4,
-0xc2ec8718,	0x65fa7e73,	0xdc925cf1,	0x01b8467f,
-0xea923bb9,	0x7ce164bc,	0xe1a337df,	0x9f59fd44,
-0x1ab74283,	0x10ad4e3d,	0x05e77e77,	0x961b3cdd,
-0xc980d676,	0x9df98056,	0x72f10fc9,	0x23d418db,
-0x35dc8c9d,	0xa57d8025,	0xfcd53d46,	0x022b7914,
-0x9908dd5a,	0x2b2f00dc,	0x400f20e0,	0x04263507,
-0x8538056b,	0x39498c7e,	0xbf7bd527,	0x18a632a7,
-0x75556a46,	0x1f4f6ff1,	0x7d2b11df,	0xe39303d5,
-0x5dce0fb3,	0x34d1a951,	0xa70757ef,	0xf791d144,
-0x8955e59d,	0xf7cbd790,	0x6e4e638a,	0x24304133,
-0xf691ceb1,	0xd8c6b687,	0x40ebd347,	0x68f3bd1c,
-0x94dd90d0,	0x3d00c8ff,	0x62eee056,	0x5218066f,
-0x15381e95,	0x655c1766,	0x3435acaa,	0x0b600634,
-0xe3596a35,	0x5584d1fe,	0x6807aa2b,	0xd4d9fde7,
-0x719b309c,	0x24c658b4,	0x5af9bc14,	0xc805d68d,
-0x8a80494c,	0xdaf4c624,	0x77abf58f,	0x363931e8,
-0x56cb9c63,	0xc6b111fd,	0x06f44fb4,	0x1d1a309f,
-0x9379fd1a,	0x15c5881f,	0x2c585ee6,	0x143b8e4f,
-0x9a041aed,	0x1e6ea9b2,	0x9db0dedd,	0x094cb86d,
-0x705b5c51,	0x293e4cea,	0xfca2567f,	0xe72104dd,
-0x379974d2,	0x0b966e93,	0x9edfa253,	0xccb8d8d5,
-0x89c4aabd,	0xec3fc740,	0xb558b061,	0x1ef4c43c,
-0xa4c0a068,	0xfa1a4c45,	0x88cc3639,	0xca0dcb62,
-0x1135a02b,	0x12996aa4,	0x4a95ee56,	0xc2124ef6,
-0xec2f887f,	0xec365501,	0x3b13bae7,	0x32fb1069,
-0x23fb5000,	0xdb047f70,	0x1f6b72b7,	0x484c331a,
-0x1b52bba2,	0x3468046b,	0xbdcd005a,	0x5dce1386,
-0x62cba2fd,	0x7d058cd9,	0x6cd00bd0,	0x032a1fcf,
-0xde6d05fd,	0x50729978,	0xbf94d156,	0xde54e24e,
-0xe4f44caa,	0x2fcd84c4,	0x34e2d48b,	0xe89f3a2f,
-0xe1ef6ac2,	0xe2ddb72c,	0xbf0a7360,	0x0ff92181,
-0x1dae30ef,	0xce13c949,	0xa6a47e72,	0xb3c94f45,
-0x3c763829,	0x1abdc257,	0xd17fcdc2,	0xb7424765,
-0xf7a5f541,	0x97061a67,	0x370849e2,	0x019a0284,
-0x30f0d0ca,	0x94ee0ea1,	0xcb25cc50,	0x78d3ede6,
-0x821a9f30,	0x034c5444,	0xe84cb902,	0x1d010bec,
-0x83b3a984,	0xdf19de18,	0x33c92c5d,	0xee64a937,
-0xe4629381,	0x2567d2ac,	0x99b3f403,	0x5ce0f594,
-0x15c70152,	0x9e3aa859,	0xf24186a2,	0xbfbf96cb,
-0xaa23ff50,	0x7e4c6845,	0xa6af9a2b,	0x06987623,
-0xc4242a47,	0x74598d03,	0x5b14ca3d,	0xd37d1846,
-0x28911f3e,	0xd0432281,	0xcf43549c,	0xf2a2479a,
-0x29aa5cff,	0xa32c596e,	0x12c61119,	0x75055eda,
-0x8bfdb594,	0x1b32dde0,	0x041ebdea,	0x0c9f43b5,
-0x692789e1,	0x06b14551,	0xae1bcdc0,	0x01ccd8ed,
-0x2669ee97,	0xa006c95a,	0x343da055,	0x6db53327,
-0x69dd21b1,	0x9a056e86,	0x3bc8035b,	0xdf4890c3,
-0x772b96c5,	0xbe21b193,	0x0bc89355,	0x825ade87,
-0x24b1e95c,	0xf63e33f4,	0x5bc8933f,	0x8346f42f,
-0x2b1aa1b3,	0x9662f4f3,	0x9d61d442,	0x499f314f,
-0x6a801dee,	0x91c70d52,	0xd207bec1,	0xd79961a8,
-0x1a0489dd,	0xb0fae274,	0x4aae84f8,	0xdc465d50,

cpu/intel/model_f4x/microcode-m02f4116.h

diff --git a/cpu/intel/model_f4x/microcode-m02f4116.h b/cpu/intel/model_f4x/microcode-m02f4116.h
deleted file mode 100644
index 1b37963..0000000
--- a/cpu/intel/model_f4x/microcode-m02f4116.h
+++ /dev/null
@@ -1,355 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m02f4116.inc  */
-0x00000001,	0x00000016,	0x04212005,	0x00000f41,
-0x0a12a70a,	0x00000001,	0x00000002,	0x000013d0,
-0x00001400,	0x00000000,	0x00000000,	0x00000000,
-0x23869663,	0x00e8d132,	0xded7a33f,	0x20662973,
-0x949096f1,	0x63bc560b,	0x1649cf52,	0xda1410b5,
-0xe2faf749,	0xb4913859,	0x679bebfd,	0x6ab2a769,
-0x90c4108f,	0x80637ebc,	0xa09c95c7,	0x1244197f,
-0xad414513,	0xb377c694,	0xf6515ef3,	0xd978899c,
-0xec6e2ba7,	0x631b699a,	0xd91aaf84,	0xded4c08f,
-0x99beedb9,	0x73701268,	0x0ddb3eb0,	0xa7f150ca,
-0xcbba1f50,	0xbe41ed77,	0x3f67082c,	0x7444a7f8,
-0x328ccea2,	0x8a4d432e,	0x20141112,	0x6e8ea818,
-0xcc779408,	0xcb05521e,	0xce4cab4b,	0x7fc11e0c,
-0xb8bcf352,	0x2116cfcf,	0x4a5f6828,	0x7bf277e2,
-0xe8f61e84,	0x5494f402,	0x16818fdf,	0xb0f0094c,
-0x5ef5b9ab,	0x44e58a4d,	0xcaeaf06e,	0xffbe13f1,
-0xa272b4db,	0x2f2e1460,	0xf5c2353a,	0xfe3825af,
-0x1db68bcf,	0x0cc12b45,	0x20ab67aa,	0x91ab4e08,
-0xfaa46cbd,	0xcf5e6006,	0x06980e34,	0x18489795,
-0xe4217f69,	0x6f7c566d,	0xf734be2a,	0x0d062834,
-0xc23f2bdd,	0x9de5085d,	0xdfe30cb5,	0x40cab81c,
-0x82cbd09e,	0x28846197,	0xd55b1faa,	0xb6800b2c,
-0xa14b7d45,	0x7fae0619,	0x8f3d9a9f,	0xc023a5ae,
-0x098c3336,	0x5dd86a06,	0x84259cb3,	0x4fd2c3da,
-0x9a786bee,	0x2d883dd2,	0xbc819908,	0x64d9166e,
-0x48ad8649,	0x748b022f,	0x072dbca3,	0xf0f98463,
-0xf3887d52,	0x97f72615,	0x0ba8b369,	0xfa857e01,
-0x06e45380,	0x6bb600b1,	0x3a6714a4,	0xec8cc32a,
-0x7328645b,	0xe2da69fb,	0x9f935d2f,	0x8d5b0b67,
-0xd7f889f3,	0x79d70f33,	0x11e17dd5,	0xffb3f194,
-0x2c8dc263,	0x1d949384,	0x653bca90,	0x22dfc421,
-0xb97d62ba,	0x23601fd7,	0xa411d616,	0xdd485975,
-0x31525379,	0x860c97d2,	0xc8614c54,	0x93f25dfa,
-0x6ca1c728,	0xf4bf089e,	0xa0fe052d,	0x781bfa09,
-0xe8c27184,	0xd28fb8a2,	0x68ef03c5,	0x08f0d934,
-0x71515534,	0xf8931da7,	0x09aec0cd,	0x2ce58a35,
-0xc16fda14,	0x381844a5,	0x432c0e4f,	0x2b05676f,
-0x76e4b1cb,	0xc5eafb96,	0xe57699c0,	0x2a6d6016,
-0xfc536faa,	0xba6cd314,	0x74ef7abb,	0xfe27f9a2,
-0x3efe7a09,	0x4ad2a897,	0x8afe50f6,	0x00dee9bf,
-0x297ef8df,	0xb689118c,	0x48045b27,	0xccd4636b,
-0xec098c3b,	0x3b3c2848,	0xb3ea4215,	0x9fd74b09,
-0x521bcd18,	0xbabaf053,	0xab0e34a7,	0x97396e12,
-0x0f145e91,	0x3b249de3,	0xd66367f3,	0x41f4c1e7,
-0xa2cb58f5,	0x9710bcaf,	0x90a91bf7,	0xb09d0b34,
-0x07fd9ad6,	0x0f3f0911,	0xe461eb38,	0x69031f51,
-0x8188502d,	0x6c601820,	0xdcf5950c,	0x97ea6b0a,
-0x0207b79e,	0xef5a8cf4,	0x6ab62c95,	0x462e7eb9,
-0x75c7b30d,	0xc54d35b2,	0xe1bca821,	0xd242e982,
-0x09f3d0a6,	0xc543ffc6,	0x0e685a9f,	0xa5b1b71b,
-0xe5701af4,	0x2dc040a3,	0x53044929,	0x3e6f6e14,
-0x6fbbf23e,	0xcac3733c,	0x3ba95030,	0x6e81be2e,
-0xbc3834c9,	0xf2c28b28,	0xa9dfad41,	0x2635e8ee,
-0x7078dc99,	0x1f7b87cd,	0x766422b0,	0x68209ce5,
-0x72306bbc,	0x9cc6bf23,	0x26efd23a,	0x6fe8e3d9,
-0x1062cfab,	0xd7e01157,	0xeb31e682,	0xa26d7555,
-0xcc5e3d21,	0xdfa0225d,	0x5f5648ad,	0x2b509558,
-0xcef77076,	0x859b7053,	0x3e98ad41,	0x21284f95,
-0x8643f3ec,	0xf65a5913,	0x6885e3ba,	0x484a7388,
-0xeee4f31e,	0x83b11f7d,	0x605fa7f0,	0xa3f75e1e,
-0x1b543449,	0x65b1dfa0,	0xca68cae4,	0x95c2dcbf,
-0x7040fdd4,	0xe9e1abc9,	0xd8b79e83,	0x80e0fc10,
-0xe0978162,	0x791ae4f2,	0x6bdf0188,	0x889cda75,
-0x6da66a3c,	0x1dfcc559,	0xdd6218e3,	0xe0aaf9d0,
-0xf738daf5,	0x5201b42a,	0x64eb2511,	0x481bf645,
-0x78d6a92b,	0x2773f693,	0x48523ff7,	0x30123068,
-0x80e851ab,	0xdb56ba81,	0xc1f1e6af,	0x0b2d5ec5,
-0x742ac78a,	0x95d62c16,	0x049b1344,	0x99df793f,
-0x3faa4853,	0xc9f7beca,	0x6aafe81a,	0x4a5eba54,
-0x46040095,	0xdc6db22c,	0x89809af6,	0xb7a2b1bc,
-0x7e99aa22,	0x5b04008b,	0x7e301be5,	0xaa1b0d47,
-0x97366416,	0x42dd637e,	0xeca9e894,	0x69d91e91,
-0x5d2c0bce,	0x0c8d1af2,	0x730797d2,	0xf6323369,
-0x8f1fb1a9,	0xbe6777ec,	0x0336f4b2,	0xbe63fa7e,
-0x6a9f7f06,	0x80d12d3e,	0x1a31610d,	0x4da3a7b1,
-0x8851d440,	0xb60d2846,	0x71a4b4b9,	0xcd750cca,
-0x853a741a,	0x9376cac9,	0x85d1d64d,	0x840a6618,
-0xf7a23082,	0x684a5321,	0xee7c1e76,	0x93c98ee7,
-0x049ccc19,	0x0a874574,	0x660d1f0b,	0x6d5ee968,
-0xc3b0a737,	0xe21294d6,	0x1f14b156,	0x60f3b43d,
-0x0339d140,	0xa0d63dbc,	0x6c61e063,	0x38faeba2,
-0x01e5639e,	0x2ceab905,	0xd8b02114,	0xa184b62f,
-0x88e57cff,	0x23bc995b,	0x8ced5758,	0xfbb44f87,
-0xb3bb6632,	0x3c0dee12,	0x334d1a59,	0xc09a90fd,
-0x83f5a440,	0x1fc911bd,	0xf90e5fc6,	0xa7cb56f5,
-0x4bfb8c77,	0xecb3dd24,	0xf5d7ea2f,	0x5640f72b,
-0x8d9d7997,	0xb5157040,	0x49da93cb,	0x2ab58c5f,
-0x2c09e41c,	0xbff9517f,	0x1fc15998,	0xfa2670c8,
-0xfe8ce73e,	0xf1c5369e,	0x42d664fa,	0x4571e8ae,
-0xdc91510a,	0xee671482,	0xf6880beb,	0x78f67258,
-0xe4abd31c,	0x32973206,	0x5550afc7,	0x715de237,
-0xd32593eb,	0x8471e4bf,	0x795a50c7,	0xe341eabd,
-0x426741b5,	0xc6113c61,	0xaaaa8252,	0x9383558e,
-0xe9feaa2e,	0x4212e709,	0x51bacee2,	0x4e592b93,
-0xe93bf72c,	0x21b5e560,	0x7145b02f,	0x269362f4,
-0xbd93b284,	0x2ee8c779,	0x75ae90b1,	0x45465f2f,
-0x82ad3224,	0x9075c0b7,	0x5758c3df,	0x38f58b2e,
-0x95a275dc,	0x19d3b3a1,	0xac225a5f,	0x6685a489,
-0xbdae4b45,	0x4087b284,	0xd46de961,	0xc07859fb,
-0x0d858371,	0xad60ea18,	0x63d5d2d9,	0xf3adb667,
-0x2c0e5cf1,	0x2f41b7d4,	0x71f7be20,	0xf2959b52,
-0x54dc88a6,	0x9b05e98a,	0xd4312afa,	0x8fa7b512,
-0x6f3b2388,	0x56a31c8a,	0xddeb7a74,	0x674370b3,
-0x1131841a,	0xa8cdf336,	0x30e43eb5,	0x1b3278b4,
-0x33370b0f,	0xdbd64214,	0x4063ffe4,	0xa399a981,
-0x3a49c034,	0x196e0ef9,	0x4b88a395,	0xb7c577bd,
-0x0ddb86f5,	0x9a7bf933,	0x8e7c7a10,	0x70dc92f2,
-0xd81f477e,	0x0ea89ab4,	0xf25df4dc,	0x82f3b135,
-0x4fd628aa,	0xcd9a9138,	0x186f5e54,	0x50b713a5,
-0xa43ce3b6,	0x85e91b7d,	0x8cfbf38a,	0x75ce54ab,
-0xeec542c1,	0x6617c07f,	0x00cfbe4a,	0xe69a599f,
-0x600e6b0c,	0x1a75ee91,	0xec0522a7,	0xb077743e,
-0xa0b6a9f9,	0x345cc429,	0xce7f2f32,	0x440b3610,
-0x8a9b0833,	0x00138162,	0xc846fc4b,	0x13e3782b,
-0x5f83cacf,	0x87c13da0,	0xd0683250,	0x83c8b50d,
-0xd68b0e65,	0xbd69f3f4,	0x700194d2,	0x6e508ab7,
-0x3a4ac1b5,	0x387ada08,	0x2ee35fc3,	0x34f57311,
-0x8fbe2ad1,	0x50f90bc9,	0xb809c7df,	0x32472ed3,
-0x93ed3691,	0xfc348312,	0xf236338c,	0xe0be9f84,
-0x52e72d2d,	0x76d771b2,	0x1c29999d,	0x7aef6bd6,
-0x5d080f40,	0x5e1a76d4,	0x0a2ef953,	0xd8e6716a,
-0x64d634d9,	0xd13bb501,	0x284be6e1,	0x214973af,
-0xc21397f1,	0x7ed45554,	0x0cde11a3,	0xff0fbd85,
-0xff0a75a7,	0xcbbdd6a2,	0x68fe6b57,	0x38127f96,
-0xe4cef774,	0x08d367aa,	0x7956829f,	0xd4383253,
-0xd80326be,	0x8df65472,	0x76f1b887,	0x0cb47fb6,
-0xbf41b3b4,	0x682eb861,	0x1dcf062d,	0x47a7f587,
-0x6214381c,	0xfa6d6e91,	0xf115be91,	0x12acb2d5,
-0xac22fd35,	0x4818110e,	0xf5f96874,	0x2f12c993,
-0xfe2b299c,	0x3d417ad4,	0xf5f71299,	0xb9e0a1f6,
-0xd3c15c00,	0xe6fc81e5,	0x41b26e82,	0x14ee1db7,
-0x2eff6b48,	0x4b59c2f3,	0x27650b49,	0xb70eac1f,
-0x3c77f28e,	0x924b1c9c,	0xdb698759,	0x8386ec5f,
-0x11c87ced,	0xec67257c,	0x8d71ca6e,	0xf9e85d88,
-0x929b844f,	0xf4758869,	0x272e9997,	0xd9990b29,
-0x271d98c2,	0xa7c555c2,	0x54883e20,	0x7bbda0b1,
-0x0546ecba,	0x59894e06,	0x0d96ceed,	0xab7a199b,
-0xc3203445,	0x89c2e098,	0xc1c5045b,	0x343a0c93,
-0x629e64e7,	0xa789a25a,	0xa28e41c9,	0x47fe7e25,
-0x90e0b0d1,	0xb7c30217,	0x3cb2d95a,	0xca27bc44,
-0x72f064cc,	0xcdbadcb8,	0xc99b62a5,	0x149bfe49,
-0x5fbf5a8b,	0x31eb5629,	0x6bf3668a,	0x0996e92b,
-0x8c9fb29b,	0x8856800e,	0x40adad9e,	0x9a1834a6,
-0xe7ef61f5,	0xc6d32680,	0xb6033994,	0x3aacc031,
-0x4e84825e,	0xa7447e79,	0xdd79b632,	0xfda899f8,
-0x28b5528b,	0x33de1f7e,	0xab492880,	0x02ebe69e,
-0x8dcbbb58,	0x833e334e,	0x744a2149,	0x85547b7e,
-0x034c1f38,	0x01adf1f3,	0x353beaea,	0x51dc9f09,
-0xc4edc9f8,	0xa0df23b6,	0x1f05af3f,	0x97452b82,
-0x392515bc,	0x2a733c59,	0xa11e6767,	0xdeeac3b1,
-0xcb638c4d,	0xd5d52243,	0x1032c6f3,	0x0ed80e12,
-0x4afcafe4,	0x52c5573e,	0xc5795e1a,	0x4e400d50,
-0xf0133614,	0xc61aa3c3,	0xd1a60000,	0x94e59ade,
-0xc5560cd3,	0x79f4f8e2,	0x0e7781bd,	0x150244da,
-0x428cd2e1,	0x222c39f4,	0x475a02f9,	0xbf9dce73,
-0xff3a14b0,	0x38e29835,	0xb72c499c,	0xcdf499bf,
-0xcf98eb0b,	0x1803509b,	0x4c8ced2c,	0xc923b39c,
-0x0ace36dd,	0xaa37d087,	0x30ad2238,	0x7d051b19,
-0x43e8b4c7,	0xad468a93,	0xe999c950,	0xca9b9e93,
-0x6f04e6b1,	0xea6583ea,	0xee0df515,	0x904405ea,
-0xa45b3af8,	0x279e8ac8,	0x0763c001,	0x66bb3f63,
-0x7fe0f14a,	0x32efe1ef,	0x68bf4ba6,	0x81ba9ab9,
-0x3f5288ed,	0xcffcdc6a,	0x8ff7ca08,	0x701757e6,
-0x16e1ef11,	0x3717fffc,	0xe1b1281a,	0x5946cf76,
-0xdbdb0209,	0xc41f8ae9,	0xcf1c4b73,	0x69e0417b,
-0xe8f17325,	0xeeacb3f4,	0xeb01b99e,	0xf4eba208,
-0x145e1622,	0x2e9fd616,	0xaa5d32dd,	0x7feaee03,
-0x505b67cc,	0xeb94e5e1,	0x177ab300,	0x2ebc3c4c,
-0x05aa6bbf,	0xbf70a611,	0xbbe79e80,	0xe112be99,
-0x54a7379f,	0x18132c4b,	0xf37cc097,	0xb17f1792,
-0x83859454,	0xd49687fa,	0x21372bca,	0xdc6cdec7,
-0x4ef72d47,	0x90539a91,	0x8b5964d9,	0xe9eb0a32,
-0x7985783e,	0x168359d9,	0x66204173,	0x3507843e,
-0xa29d8c80,	0x47a03287,	0x32a18cc0,	0xf455f3c2,
-0xae0c363e,	0xaa1d07a0,	0xa1fde859,	0x0d30d7bf,
-0x2ad9ceca,	0xb553e4cc,	0xc23ab889,	0x2cb4d9de,
-0x5441e14f,	0xe7d4f715,	0xc0a5cc18,	0xca0bd221,
-0x1215d5b6,	0x4b2f3a99,	0x9a660387,	0x9e87f59a,
-0x5758957a,	0xd2dcac46,	0x991ca100,	0xc7b4baa9,
-0xd1f02624,	0x94686298,	0xd33d55ef,	0x7c94ae91,
-0x36df5431,	0x1bc27bf1,	0xd8b56d55,	0x8db4ccce,
-0xa49330eb,	0xf644a0c6,	0xd14fb0c8,	0x69613044,
-0x9bb35ae8,	0x9b645568,	0x21744066,	0xc123cd1d,
-0x0a37ad93,	0x986f9c6c,	0x1eb569b8,	0xe0912ebc,
-0x93862fea,	0xa59cf4a1,	0x83930f0f,	0x82831a00,
-0x368f64ad,	0xb38fe25e,	0xd703a8d9,	0xea4dec67,
-0x3ca5e491,	0x6a1a1ede,	0x71bfd651,	0x585f0430,
-0x8b97c5ed,	0x3f954af6,	0x04ff33d6,	0xef43835b,
-0x45b152b5,	0xa983eb83,	0xe8ca9e17,	0xa9011967,
-0xacd4613a,	0x13329f8c,	0x7155f130,	0xa5fbcaa3,
-0xe12ccc1c,	0x3f20509c,	0x0548cfeb,	0x1b2bb90b,
-0x41991ead,	0xb9566731,	0xf279263b,	0x8da5e1a6,
-0x5e45322d,	0x8f47e377,	0xaedb482a,	0x87e9f8e6,
-0x00947524,	0xa7e0dcc8,	0xabb34885,	0xd1dcd303,
-0x70e251f5,	0x408cb9ec,	0x17d64076,	0x4df80c9d,
-0x2f735ff7,	0x437b2475,	0xbe40e517,	0xcf0826d9,
-0x12adc075,	0x1f90f1c8,	0x9a33610c,	0x3135ac98,
-0xc1f611bf,	0x461e90a1,	0x50d01fb0,	0xe8de5f49,
-0xd70d74f3,	0x66cad8db,	0x461f3063,	0x1ccf8ca8,
-0x5b647b9c,	0x9174cfbb,	0xc54b60ef,	0x641ad89d,
-0x18c40de4,	0x82fd1342,	0xd0e9dd40,	0x97c0a8ae,
-0x8f19cdae,	0x94fbbcb0,	0xf7cc523a,	0xe4056f6d,
-0xd11a9886,	0x4dcd0af0,	0x3eba0d24,	0xbc35f7a6,
-0x5e1e9b55,	0xd9a6a9ad,	0xe826e5ac,	0xcf41712e,
-0xda14027f,	0xed4eb59d,	0xd194e410,	0x596ed5c0,
-0x97fe12e3,	0x7d5c7ea6,	0xf104c5fc,	0x7e3a4fc0,
-0xf50f46f1,	0x5b1a4dc4,	0x678b2de0,	0x4b4728c6,
-0x4941792d,	0xd57a58e2,	0xfa51b95c,	0xd8333311,
-0xf22f80d8,	0x0758ce33,	0xc9e66016,	0x4dd71068,
-0xf3cfdf8d,	0x47aa22ce,	0x06c5bd1b,	0xf42f910a,
-0x5663bc94,	0x02338eab,	0x558e36f3,	0xae1b97d8,
-0x5b4d1db8,	0xf46500d4,	0xf211d2a9,	0x71bd292d,
-0x61bbb9b6,	0xfbd2f77f,	0xd8910476,	0x12fd4201,
-0x047eb58a,	0x9b1b5088,	0x69d12d58,	0x68acd33a,
-0x0e8121a4,	0x05b682d6,	0x7c8c64fd,	0xbe7d5d91,
-0x20d12b3f,	0x0f63c6f7,	0xf3a8b2cf,	0x92719835,
-0x988fef61,	0x1d2e8383,	0xb6b2015e,	0x4b728ef2,
-0x276e0063,	0x0c651aed,	0x5b87ce8d,	0x01b4c408,
-0x2cbec2a6,	0x136cdf72,	0x575d2521,	0x8f188fd8,
-0x172f1f30,	0x80b70377,	0x239b2a97,	0xc75f231a,
-0xcb6ba1fb,	0xb15c58fe,	0x3d182903,	0xdecdec5a,
-0x38a99106,	0xe5dbc841,	0x50d31735,	0xac230e84,
-0x7a3e1dcc,	0xf03824eb,	0xd46166d9,	0x1711fa6c,
-0xb8987575,	0xc0c63018,	0x21e70a2b,	0xd1d9865a,
-0x0351a011,	0xd9ae70b3,	0x9da6dbc9,	0x64002142,
-0x9a143ba2,	0xafec813e,	0xb385eec2,	0xe762b70c,
-0xa3f7cb58,	0x6da88afd,	0xeb86918a,	0xcfa33f23,
-0xeb3445d7,	0x95766c9b,	0x1d172a05,	0xea66e3b6,
-0x089fbf2f,	0xa768c4aa,	0x9a8b5bfa,	0x30c69619,
-0x6641a76d,	0x827b31d4,	0xff2bee87,	0xb1274106,
-0x9a6bad7b,	0xf8093d03,	0xc7e7de22,	0x23e5c273,
-0x11d92327,	0x014e2384,	0xd3f36ef3,	0xa03b2ab6,
-0x469ea5be,	0x1965c8c8,	0xffd41409,	0x22d2edcb,
-0x2cf4de92,	0x68f85640,	0x0d837b76,	0xd10345cc,
-0x27eabb18,	0x4de85487,	0xf951a832,	0xaad7476b,
-0x74f2dd14,	0x30bc2621,	0xbfbc3fef,	0x96c18c9a,
-0xf8e45c8b,	0x2c0ca343,	0x676e3829,	0x933f4b30,
-0x88671fee,	0x1fe89c5a,	0x6b856326,	0x1abe0ca9,
-0xb162a5c9,	0x7983735e,	0x5fa0e048,	0x4a69d1b9,
-0x56011d2b,	0x4f56cff3,	0x62b1b768,	0x4d690e24,
-0xacd72d64,	0xf5578e63,	0xa31958b1,	0x43efff71,
-0x6cb5ce8b,	0xbd5e9b14,	0xa522c571,	0x692412b3,
-0xc1e0c058,	0x786473cc,	0xdfc9e3c9,	0xc5e1501a,
-0xd484d0bb,	0x7d8979e1,	0xd273044e,	0xa73633d0,
-0xfa9f1944,	0x639ad1d4,	0x9877fc4e,	0x7ddba96d,
-0xc4c0616e,	0xde1a6e5e,	0x71cdd617,	0x6b99ee85,
-0x27cc019f,	0x88371a20,	0x1be02a72,	0x80bd7747,
-0x73ae67d3,	0x6c82f4cb,	0x0a10dfb3,	0x1276326e,
-0x3fb8b0ad,	0x9aefa740,	0xbbd55ecd,	0x144146b8,
-0xa113bcb2,	0xab221fbf,	0x546b07e1,	0x04cc6e34,
-0xc5881158,	0x706b98de,	0x15fe7a47,	0xb37fa40c,
-0xae60402d,	0xe883bc80,	0x7d75a155,	0x1c704783,
-0xa2b9b905,	0x788ffafa,	0xe5c6d2e0,	0x6ed326a5,
-0x2e671513,	0x2738d902,	0x48834b77,	0x515ae5d0,
-0xfe196599,	0x8eac0ed8,	0x493de188,	0x4ced0f10,
-0xef495d50,	0x1c8c11c9,	0xd72b7ad0,	0x6538db01,
-0x28ab44b1,	0xf9027d82,	0x1bd0577c,	0x11cb527c,
-0x3b27596a,	0xd661d021,	0x65e68d72,	0xa362b46e,
-0xee0971af,	0x951f95dc,	0x61fa39af,	0xab0cc9b9,
-0x1b3bfaee,	0xd0a60a2f,	0x528e0c41,	0x8ab00ea1,
-0xfd0f286b,	0xc632b071,	0xc30294a7,	0x1e26a083,
-0x5a54078e,	0xe654c188,	0xc8ee1653,	0x3010c906,
-0x39dc7054,	0x4f0c1261,	0x449fe785,	0xecab6a6b,
-0x213bfe2e,	0xe4c6f00c,	0x8eb07821,	0xe8ff2e93,
-0xbe567ba2,	0xf4160cac,	0xc98728a6,	0x045ae96a,
-0x83fbe2f7,	0xecfa20e9,	0x1f6fce35,	0x4bed73ad,
-0xd51a6875,	0x6662b906,	0x5bfaec0c,	0x03db85a6,
-0x56692fda,	0xedc67ad2,	0xd0fe4baa,	0xdaf2507b,
-0xde7c400f,	0xc18897cf,	0x47c04fd9,	0x1ffc9b24,
-0x5a35be70,	0x12f845ad,	0x2ebc0dd2,	0x6fecbbd2,
-0x53fc663e,	0xc957a130,	0x9c194624,	0x9a500a78,
-0x217f895c,	0x99da1f18,	0x804614e6,	0x839274d6,
-0xe70a25b0,	0x3a61b3ae,	0xf4caf190,	0xfdb5166f,
-0xccf9e73f,	0x6a24a966,	0x1a53d75d,	0x19e68fa1,
-0x205c583f,	0xde045830,	0xf01d917e,	0xbffd767e,
-0x2024d57a,	0x47163d6e,	0x86b38732,	0x282c8f9c,
-0x7378559a,	0x45dc6404,	0xa9a5ee57,	0x24919062,
-0x3f8069f0,	0xbbebed07,	0xaea56958,	0x9664d2d3,
-0x9a48aff1,	0x04e9fa40,	0x9ffc45e6,	0x4c14d117,
-0xc3077e50,	0x016f73f3,	0x165a64be,	0x4440bbbe,
-0x7840fcd0,	0xc1f4a2d6,	0x56729873,	0x08ddb438,
-0x6d13b48c,	0x0f40f626,	0x06807ab9,	0x7a575f43,
-0xef5d43a9,	0x620a9fe5,	0x3419dfba,	0x86fafb2f,
-0x999a7b40,	0x2f923040,	0x5b80d46b,	0x3a002116,
-0x49829ffc,	0x2239340c,	0xb9b063cb,	0x46922d44,
-0x86e5d048,	0xae719338,	0xfe7e7936,	0x8c94bf6d,
-0x587f5cc6,	0xbf6ff0a1,	0x14d0f12b,	0xd7bdfcba,
-0xe8908def,	0x32d08043,	0x708194bb,	0x4b9a9dfa,
-0xeff352da,	0xf3088842,	0xbd617295,	0xf90e0a98,
-0xa579a690,	0x939dfc23,	0xd896560f,	0x8e0454ed,
-0x2bf14e16,	0xf86bec1b,	0xca5e6724,	0x27b44d2c,
-0x36efe253,	0x5a40e0d0,	0x891d2354,	0x66794b58,
-0xd19b490e,	0x7adfd7f4,	0x81bd700b,	0x1b7b1c39,
-0xc8c27a49,	0xe55957af,	0xa200f22e,	0x1513e630,
-0x5c22274f,	0xdfcf1977,	0xc25efc43,	0x97d8c849,
-0x085fc28a,	0x8bd99f79,	0xacf9b6d6,	0x2c8e5105,
-0xa853d807,	0xc5cc2ab3,	0x770cad5d,	0x341655e7,
-0x73af0472,	0x47189361,	0x666002e9,	0xad0c8d0d,
-0xca1daff1,	0x466863d1,	0x0e03fcba,	0x0540c799,
-0x32263d84,	0x49207fb8,	0x69fa2acc,	0x6fb943c2,
-0x2f7cec7e,	0xf0eee345,	0x8cd6167c,	0xfedc8ba9,
-0x4c0c81f0,	0xe2465dbf,	0x196fdbc3,	0x4179df4c,
-0xfe3a0bff,	0x105bce11,	0xcecae839,	0xefbf4abd,
-0x7340ac0b,	0xf20928d9,	0x9afd8882,	0x8713b311,
-0x4f6dd3c0,	0xad921e2e,	0x717434f7,	0xb8463091,
-0x0ce295e7,	0xc38c6a55,	0x16e48e28,	0x27444bdc,
-0x47370754,	0x622f18d0,	0xd1210799,	0x67de0531,
-0xa6e5c785,	0x86a801b5,	0x405d33c4,	0x59dfdf7a,
-0x4ec49bd3,	0x18068d3a,	0xcbf720aa,	0xe3b37191,
-0x11b6f7e4,	0x8c015526,	0xf75dce7b,	0xb0fe290b,
-0xe5cae19c,	0xfde92be1,	0x78155b31,	0x9257619f,
-0x0da18a09,	0xea98832f,	0x34eb0ebc,	0x7bbffed4,
-0x8bb52f6a,	0x752e26c7,	0x0c268fe0,	0xd0512fd5,
-0xdaaa16df,	0x8b567986,	0x33f0a7c1,	0x5479080e,
-0x347b8d2e,	0xdb56fd9f,	0x0b0bd7cc,	0x83a0bb77,
-0x9dfd7320,	0x19f9ed59,	0xed13b232,	0x434494c7,
-0x92d6daf1,	0xe03bc1c2,	0xe2099636,	0x7b3d5261,
-0xd11c7151,	0xaa197ffb,	0xd978054b,	0xcf825914,
-0x8e23bfa9,	0x9148a70d,	0xa4d164e5,	0x301f6dcc,
-0x2f715b1c,	0xb300c085,	0xfceb2559,	0x1f084e6b,

cpu/intel/model_f4x/microcode-m02f480e.h

diff --git a/cpu/intel/model_f4x/microcode-m02f480e.h b/cpu/intel/model_f4x/microcode-m02f480e.h
deleted file mode 100644
index fc9e513..0000000
--- a/cpu/intel/model_f4x/microcode-m02f480e.h
+++ /dev/null
@@ -1,227 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m02f480e.inc  */
-0x00000001,	0x0000000e,	0x01152008,	0x00000f48,
-0x0e158e10,	0x00000001,	0x00000002,	0x00000bd0,
-0x00000c00,	0x00000000,	0x00000000,	0x00000000,
-0x26d329c9,	0x2a31e166,	0x64caf9e8,	0x20f1b670,
-0xfdbf281b,	0x2af51e01,	0x72756a40,	0x3e4d0c5b,
-0xcaeee752,	0x238030a7,	0xe2ce4e5a,	0x1fcfa6d3,
-0x212a11eb,	0x27942a56,	0xfc6a38cd,	0xe34d32a3,
-0x0135b4db,	0x1c3ea42e,	0x8c954d65,	0xe6bf8037,
-0x5f2605e0,	0xe501cde9,	0xeab0c8b6,	0x10b3a2ce,
-0xb7eea79e,	0xd44f406f,	0xa5594234,	0x42ab402a,
-0xa1bfb70b,	0x3bb73da9,	0xde650246,	0x57bf4792,
-0xb87196fe,	0x7d1ba897,	0xb9ef2ec5,	0x0947fe70,
-0x26ac2342,	0x6b027d85,	0x49182232,	0xa216850a,
-0xde95e8db,	0x2ba8a7a6,	0xd7766e2f,	0xad019a11,
-0x086098c2,	0xb97ce7f3,	0x15b8e4be,	0x2bd14f31,
-0x8651d72b,	0xa6baf5b0,	0xe91cbdbb,	0x3e4b99dc,
-0x225f51de,	0x192dd4e3,	0xf3bc372d,	0x18fa15aa,
-0xf3e31f51,	0x3b14d857,	0xe7fa8fa3,	0x0da2529e,
-0x8e0ec6c4,	0x2a9f8fe5,	0xd4a45e9e,	0xd3e5ea7f,
-0x579e5fc1,	0x0ee7b49a,	0xc3e1a74c,	0xfb79ea09,
-0x880ba650,	0xe1f6d05e,	0xcfc8c022,	0x37c66627,
-0xd75964b9,	0xf8aa3544,	0x36f59197,	0xfd60ee29,
-0x7333fd01,	0x06e588e0,	0x7070e0f9,	0xd8a52405,
-0x4552f44c,	0xd2b8ff77,	0x04f7ff67,	0x34a28a85,
-0xa90ca13b,	0xda9da5d1,	0x6537651b,	0x6689fe66,
-0x780b74d2,	0x29dcda62,	0xd752595c,	0x58fffec9,
-0x29bc82d2,	0x580c129a,	0xe73ebb85,	0x14d7ca3c,
-0xcd3d8678,	0x7ab2b0f3,	0x156b319d,	0xfbe3d5cf,
-0x2238d540,	0x3a11150f,	0xb3e2a0ed,	0xc8574d79,
-0xfca2b05b,	0xc00997f0,	0xace0c378,	0x1f44d4f4,
-0x0b8b7c33,	0xe13b230a,	0xc2490427,	0x031bee7e,
-0x2d612498,	0x3f0171d4,	0xe8072f7a,	0x397143f2,
-0x84953dd9,	0x0b9dc83f,	0x300595d9,	0x389ceeed,
-0x23d176ad,	0x051fab35,	0xab27ec76,	0xb98e9c4b,
-0xdf2dfda2,	0x198d7e32,	0x1690c93f,	0x939444ca,
-0xd2a58ee9,	0x80d9fca7,	0x972197c3,	0x3cb3902e,
-0xe26ed52b,	0x93a6a765,	0x97f4845c,	0x2b2a56ed,
-0xd47788f9,	0x29723637,	0x34f7675b,	0x19c38cc4,
-0xab093705,	0x2d3e1fdf,	0xcffb6671,	0x3b6c43ed,
-0x168b0f4e,	0x36798907,	0x0750d02a,	0xd47ac88e,
-0x7c417cb4,	0x255aaf00,	0xa457d84b,	0xd6102100,
-0x21b7eecb,	0xe91e4a6d,	0x689db121,	0x2f53b34c,
-0xf49968de,	0xc3129683,	0xc775fb99,	0xc893db52,
-0xfe7ffbc7,	0x300ea6eb,	0xc18686d0,	0xc32fa6c1,
-0xd06c2a32,	0xee5b2e2c,	0xbaf7fe09,	0x007876f8,
-0xfece2039,	0xcd363d13,	0x4c78a4c4,	0x6d35b3de,
-0x6f6e97f6,	0x27cc312c,	0x13aa914f,	0x6b1ebd26,
-0xd1cf582c,	0x70d65a3e,	0x418b9938,	0x3f45056f,
-0x12a4936a,	0x7ff921c9,	0xc14f627d,	0xc95e29f7,
-0x591a88f9,	0x28098309,	0xac37ccba,	0x430201a3,
-0x91d4ccfd,	0xcb3c735a,	0x6245ebbf,	0x88b4fb5f,
-0x18cfedb5,	0x5bab7c90,	0x246ea4fc,	0x4ac1a532,
-0x2601517e,	0xae32740b,	0x56a159ff,	0xf324850a,
-0xedc8802f,	0x5847b188,	0xf8ef6ac1,	0xa00d1e66,
-0x678a4044,	0xda1aecff,	0x44bd1f23,	0xeb235eb2,
-0xe00f1b18,	0xac4c0fca,	0xecaf8fd6,	0x7036dc67,
-0xd5f37dc1,	0xf72976da,	0x4d6456cd,	0xad279354,
-0xc1c5fddd,	0x56f9ce6e,	0x086448da,	0x1133cd3b,
-0xba098b6d,	0x9acb3d7e,	0x253a1c15,	0x801f316d,
-0x82ddd5a5,	0x1dbbe457,	0xc6f6e988,	0x902e4e3d,
-0x9919be4d,	0xb7ed04ed,	0xfc5c9307,	0xf0242aee,
-0x56fc8d05,	0x80cd70f8,	0x3813442a,	0x6c6dbf5e,
-0x3216843c,	0xd4900c7d,	0x6545f49b,	0x928a68a3,
-0x524a4f32,	0x7b3905b9,	0xa66a83ac,	0x2a9df94f,
-0xb21baac5,	0x86a90f8f,	0xd9444a1a,	0x9aa56218,
-0x10a058ef,	0x39bcf149,	0x96bc6beb,	0xb13c2c89,
-0x08524f97,	0xab471f45,	0x3809188a,	0xf48e0587,
-0x2815e009,	0xafd9eddb,	0xddc23417,	0x4afd35a9,
-0xa97117f8,	0xd57a04a5,	0xbd112ff3,	0x869f93ee,
-0xdc41bfaa,	0x53a50f37,	0xc4560207,	0x750c1513,
-0x318ba469,	0x9bc9113d,	0x7566de7e,	0xe9342ec5,
-0xc521eae8,	0x66fc9347,	0x6b9c5469,	0xb097ee33,
-0xfb0ebe09,	0xdb230dfe,	0x7236dcb1,	0xa13bd311,
-0xd090f61e,	0xb30a630a,	0x7e469844,	0x1574c338,
-0x6637aafb,	0xa923111b,	0x8a3b735b,	0xa9ef6b12,
-0xbd54b8f4,	0x31743069,	0xc51e14fe,	0x3cce36cf,
-0xbbfe8925,	0x8348d42f,	0xa3582761,	0xb0d695a1,
-0x041c41ae,	0x0ced43bd,	0x7894160d,	0x88dcae84,
-0x705c8bf0,	0x9df891e5,	0x2e0b5b29,	0xd4d02b62,
-0xef42b7b8,	0xab7fb5e0,	0xdf91d193,	0x44ae8a6e,
-0x7db530e6,	0xd54e99cd,	0x814b796f,	0x80a57ccb,
-0x613de203,	0x53d285ce,	0x2ba54805,	0xced4eaad,
-0xaecdf197,	0xb619023e,	0x2cbb224f,	0x7e3361f0,
-0xbfb38295,	0xfb8dc293,	0x21be50ff,	0x9b796fb4,
-0xca0fab54,	0x649e7d59,	0x3b6119a5,	0x4751bf87,
-0xfad7c36f,	0xb51a9528,	0xfca25ca7,	0xf1730857,
-0x5072c2c8,	0x4236343a,	0x0fb02c81,	0x84ab3bce,
-0x8ca08cbf,	0xd28234c1,	0x1a8a8e91,	0xb8108393,
-0x5052d682,	0xa85bc44b,	0x8d422806,	0x2c9323a9,
-0xdf62b41d,	0x9eb8bdce,	0x816a8338,	0xa7655082,
-0x9d59bac0,	0x1efeb4f6,	0xc02dfa19,	0x7184335b,
-0x769c612b,	0xbba63013,	0xcb8c503b,	0xcd535067,
-0xcd5b29c5,	0x600f9b97,	0xe312a5b3,	0x882260ac,
-0xd16df980,	0xc07031f7,	0x46844f67,	0xb667c308,
-0x38a195da,	0xaf7cc01f,	0xedb0af82,	0x146868de,
-0xef745dfb,	0xa3bb9477,	0x111f96dc,	0xadcf97c9,
-0xa48abf8d,	0x1e6c5e79,	0x981b20d3,	0x607ed92d,
-0x88dce122,	0x81b35fd8,	0x2a5bb215,	0xe4c557bb,
-0x01b9f5ec,	0x6f31c367,	0xebd7a3a5,	0x87bcd4b2,
-0x0e04acdb,	0xefd29047,	0xa19c4bb9,	0xd1de82e3,
-0xe7170238,	0x950c1ea1,	0x6dce3702,	0x5e30c2da,
-0xf786a74b,	0xf6fe2687,	0xbac9b605,	0xa26947a5,
-0x0b395022,	0x604f5ae4,	0x7d2847fd,	0x432eeeb3,
-0x1c09cf16,	0xa60b6e98,	0xee527eeb,	0xcecd3d22,
-0xde22d726,	0x75624129,	0xe6f47f23,	0xa386fb10,
-0xf95e758d,	0xf8a1f18d,	0x38f8ba6d,	0xff037cdc,
-0xccb5ea45,	0x9ddc0def,	0x2c38a7fb,	0x4b1a63f3,
-0xbe91dfa0,	0xf26ee0eb,	0xe525faa6,	0xba5015ed,
-0xe9c34553,	0x4f02da17,	0x6da6c9c0,	0x4ab2989d,
-0xd48c6d4f,	0xa20e07c1,	0x31025c39,	0xc24effd9,
-0xd472d1a6,	0x70015259,	0xc9d61f68,	0x8f6bda07,
-0xbf07f2ed,	0xf94e2538,	0x59cca88e,	0x7d31044f,
-0x72bb31ae,	0xa97a9f31,	0x4684ae46,	0xe6a968c2,
-0xa37ce630,	0x47cb0d2c,	0x57487010,	0xad79a0ad,
-0xbefba442,	0xecd50f6f,	0x09ff40ab,	0xf00c2385,
-0xad02800b,	0xa96538b1,	0x094d47f7,	0x55fca4c2,
-0xdbe82bc8,	0xe05d82c2,	0x3684f7bc,	0xa1576624,
-0xa33c406a,	0x4ddf61d6,	0x83bfb554,	0x463b70f7,
-0xf73bce0d,	0xa9b08421,	0xd620965f,	0xd8c2edbb,
-0xcf5db224,	0x78174e0e,	0x49f680bc,	0xbab62686,
-0x5b6eac65,	0xf3a6efce,	0x35eff0b7,	0xc6b03da9,
-0x77684b20,	0xb48cdb78,	0x4020f7e4,	0x659a3023,
-0xe96aa5d2,	0xec28f986,	0xa92392e1,	0xaf6aedd8,
-0x9261c6f5,	0x51e7ee22,	0x1cbbe21b,	0x12dfbf72,
-0xe87ec370,	0xa53bedbd,	0xd87ba8e8,	0xa5362ee2,
-0x01aebef0,	0x13c6a152,	0xf80c3a0f,	0xb6c35e7c,
-0x8b2a8d15,	0x828d549a,	0xc0e5536e,	0xcd1426a8,
-0xb220bba0,	0xb2bcdd47,	0x3cb67cf1,	0x5984accd,
-0xff3c2260,	0xd69c2315,	0xf34b7ec0,	0xaa2ee403,
-0x633e4f08,	0x4943378f,	0xf60dc7df,	0x6af330f0,
-0x6fa7d05d,	0x99d2865b,	0xe0da1dcb,	0xebe60192,
-0x7576458d,	0x74be16a3,	0xdfddcf36,	0xa949e0a5,
-0x1f72671d,	0xccd794bf,	0x803405d3,	0x8c8c6eb6,
-0xd1900d4c,	0xa2ac908f,	0xb5b7e8f0,	0x06763fcf,
-0xe025fabc,	0xbd099c25,	0xe30e17ea,	0x930efe48,
-0x39fc45a4,	0x2c78dacc,	0x1d41cbb3,	0x7ffcc8ef,
-0x072cfa44,	0xacb0f715,	0x121a513c,	0xe83ff719,
-0xc3565191,	0x7f44232d,	0x941b33f9,	0xa1e5f1fb,
-0xaac18ea4,	0xe83de443,	0x5904f7aa,	0x9b193c83,
-0xafeb41c0,	0xb0d4db80,	0x403544c3,	0x1e208572,
-0x75914e29,	0xbb86975e,	0xe66fa54c,	0xa9165618,
-0x635e2b4d,	0x2dc3456c,	0x64fb7834,	0xbae07479,
-0x283a0bc7,	0xa2211209,	0xcda39444,	0x00502dde,
-0xad8b539b,	0xb8a18c01,	0xd727d11d,	0xab35221f,
-0x09a7dd1c,	0x3904551e,	0x26c7a4d4,	0x11c234a4,
-0xf0560dc5,	0xb2af70b8,	0x4b7f6422,	0xabf74fd1,
-0x2e32ea94,	0x136f4dca,	0x531e2580,	0xac64c2d3,
-0x37f72d03,	0xa27d543a,	0x975dfbc1,	0xe32a2320,
-0xcecad332,	0xb334e990,	0xec6e5e82,	0x7b39ad67,
-0x9132dbed,	0xe74eb37f,	0x63f471c2,	0xad41d537,
-0x6652a551,	0x50a379da,	0x4fd9e74a,	0x66d0fbe6,
-0x784ce5ff,	0xbe5563f9,	0x4b284764,	0xe82b834a,
-0x77cf145c,	0x4ef3a9c0,	0xfc55142c,	0xa6731995,
-0xe486a03e,	0xc5ac0d3b,	0x96bd7e44,	0xfcf5ac60,
-0x32bac91f,	0xa6330551,	0x2c3bce42,	0x6d227527,
-0x4a7f47d2,	0xc9f95de3,	0x2e7f69c3,	0x977a83ef,
-0xe8d20c95,	0x5b37f1dc,	0xd24cd253,	0x5695e75b,
-0xc59d1bbb,	0x9e0c8899,	0xaf99fff8,	0xed06d8a3,
-0x124cda7a,	0x61e14106,	0xb8eeace4,	0xbaaae21d,
-0xa3edeaa3,	0xf025cfe8,	0x4f2d7c14,	0xa53fcbf2,
-0x5cb87002,	0x88d1a87a,	0x9823105c,	0x0b5f2f3f,
-0x3b4b6622,	0x8abe9d68,	0xb7b1a872,	0xb6a23ca5,
-0x2f8af0aa,	0x01544728,	0x718ddea8,	0x852a466c,
-0xcc32c43b,	0xa6ae2bf0,	0x60a276cd,	0x03cf1680,
-0x090c769f,	0x97023bbb,	0x28dbc21b,	0xaee326da,
-0xa17aea81,	0x3be0c263,	0x480c7990,	0x79eba014,
-0x55fe3d34,	0xbdf26e31,	0x3262f1f3,	0xe6b1c5e9,
-0x2e3ecf14,	0x4d358a4b,	0x5c53574e,	0xa5394bc6,
-0x733d8452,	0xc09b4dd2,	0xe91efd31,	0x46ab9076,
-0x0ee5a689,	0x9ce07e53,	0x2778e5c8,	0xeb2eb6db,
-0xf258b653,	0x4ca89510,	0x3d169c4c,	0xa5dcee98,
-0xe4f1cc45,	0xeaa1f475,	0x6aaf5b9c,	0x40e58956,
-0xda8c24e8,	0xc88ad138,	0xd66fc509,	0x03580145,
-0x778d829d,	0x0e2da91f,	0xea3dba0a,	0xacfd2069,
-0x8b2168d7,	0x8d372293,	0xbba81d9d,	0xd810cf7c,
-0x2449fc84,	0xb05c099a,	0xf1ee1a85,	0xe2c79e38,
-0x3eb91494,	0xf54b159e,	0x0fd4eac2,	0x260a4242,
-0x7c57334a,	0x7fd9b0c1,	0x0d687a4f,	0x72bc613d,
-0xfa006dac,	0xb9457cd2,	0xfc4874ad,	0xe5242d02,
-0x38794801,	0xf8e9f59b,	0xcb0a1361,	0xb42ec54f,
-0x9cdd85bc,	0x27eabc2b,	0x84aff296,	0x8d245ebe,
-0x301fe4fe,	0x6f4aa07c,	0x4a9f5c6f,	0xfe264902,
-0x90212b27,	0xe8b57c59,	0x9557ef6d,	0x4c53ecc4,
-0x5d1fe0ea,	0x7b94651a,	0x84d10139,	0xa5ac3520,
-0x1eda05b3,	0xd98f2126,	0x4b82d50f,	0x39e35e82,
-0x2347f4c4,	0x311a3e10,	0x3cb12406,	0x64820669,
-0xc6be20ab,	0x37cf99fd,	0xe97426a0,	0x79ac1365,
-0x522d9d9c,	0x4f3bfd0a,	0xdeb80b27,	0x66e2ebdb,
-0xcae86c80,	0x65986163,	0xc341461b,	0xe7da47eb,
-0x80882978,	0x4cf5eafc,	0x527d1664,	0x7225ff2d,
-0x4872fa8e,	0x099cc50f,	0x21ca02b4,	0x42212ea1,
-0xdacc30f1,	0x6c19271c,	0x7fa45b1e,	0xb9548b7c,

cpu/intel/model_f4x/microcode-m5cf4a04.h

diff --git a/cpu/intel/model_f4x/microcode-m5cf4a04.h b/cpu/intel/model_f4x/microcode-m5cf4a04.h
deleted file mode 100644
index 138175f..0000000
--- a/cpu/intel/model_f4x/microcode-m5cf4a04.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m5cf4a04.inc  */
-0x00000001,	0x00000004,	0x12142005,	0x00000f4a,
-0x5e7996d9,	0x00000001,	0x0000005c,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x1b07bcc7,	0x229cce65,	0xe59c6d88,	0x368a8eac,
-0x265a5ea8,	0x10ccc72c,	0x87320671,	0x94a92d48,
-0xeb5af331,	0x0d008e26,	0x8df305da,	0x9dde4c6a,
-0x8c99c77d,	0xb29cce43,	0xf878b938,	0xbe6f1c58,
-0xa5642b21,	0xa235f7ed,	0x7246e088,	0x01f50007,
-0x2671ee90,	0x80a25b6b,	0x4906a87b,	0x93feb435,
-0x63376263,	0x2f56135e,	0x2fe6b7cb,	0x47b9e023,
-0x89edd593,	0xa50ea0bd,	0x88b4c598,	0xe8049dce,
-0xc3a5caef,	0x66c0c8b3,	0x23fd02d4,	0xae6b76e1,
-0x367b794e,	0xe991df14,	0x99966e37,	0x8c94d969,
-0x03bd493e,	0x9a668e1b,	0x8b03e862,	0x06b3d582,
-0xdbe3e579,	0x8d808793,	0xb8a60a2e,	0xadadc225,
-0x05005e7f,	0x29a8c4b2,	0xf88aa416,	0xa5fe8613,
-0x28399122,	0xa72292cf,	0xd1a3ac3e,	0x0c1ecf12,
-0x243e5147,	0x92d4b766,	0x1ac71ed9,	0x8bc3baca,
-0xe610d668,	0x375b6b2d,	0x2ca4f1d6,	0x399857ca,
-0xae107abb,	0x938d073d,	0x5ad00070,	0x9342bd0d,
-0x536d6790,	0x15d633f0,	0xbb32795e,	0x980ab451,
-0xb664a218,	0xb44415b7,	0xbeb0c093,	0xe5a9f22d,
-0x5879deeb,	0xa416441d,	0x38fe769e,	0x52ea4068,
-0xd5f86736,	0xc9ad814c,	0x1f41d0fe,	0xa8b13c07,
-0x5665f649,	0x50a4a2d0,	0x47e60480,	0x174058f0,
-0x5f9229eb,	0xa9b5c958,	0x8d722a78,	0x82504ca6,
-0xa4f69e86,	0x1165831e,	0x5f3a2776,	0x9da68937,
-0x5587f203,	0xa0dde401,	0xc8b18cd7,	0xd817c5be,
-0x3c64d4c4,	0xb47424b8,	0xf290272d,	0x46f4e8de,
-0xaed74fdb,	0xd6b21df6,	0xa8968c2e,	0xb9224f33,
-0x9043df16,	0x53fe2d31,	0xb51da202,	0x083b1387,
-0xdd470698,	0xb1b66ae2,	0x13cf0cdf,	0xa64ff501,
-0x36baf606,	0x15a8128b,	0x41ee5a81,	0xac05e4ff,
-0x7fd94e1c,	0xa8f227d7,	0x7c81ff00,	0xd8c234c0,
-0xc31aa196,	0x9c9345a5,	0xeff07da3,	0x4c1d9daf,
-0x5f1ce189,	0xefa826ca,	0x5123e316,	0xaad27995,
-0x1e425c1e,	0x45d05042,	0x6b77ccba,	0x66b75e9d,
-0x4b9c3b52,	0x85f95778,	0xb405df56,	0xe537f9df,
-0x404c8e01,	0x6d8dd53c,	0x7f0f05f2,	0xbec561f9,
-0x1a990e16,	0xe8b96bd5,	0x817d06e6,	0xb2001f52,
-0x90c721a9,	0x8e7c8d4e,	0xf4a4cb38,	0x2714865c,
-0x5a851aee,	0x8590dd73,	0x54bbc2c0,	0xaf164bad,
-0xb82559e4,	0x3ec52049,	0x20ab2224,	0x1f2e35a9,
-0xcd5bd10c,	0xa04c7a00,	0x42dadb32,	0x90d47c14,
-0x48e98aa0,	0x0b3faebb,	0xb0d34d9d,	0x90df0308,
-0x052df922,	0x9047a63e,	0x4a7e0ba9,	0x88217146,
-0x0b037fb5,	0x8bcdede1,	0xdb81c283,	0x2bde05fd,
-0xae2c87fb,	0xb4697173,	0x205688d7,	0x810963ae,
-0x2e06be4c,	0x1abf1c0a,	0xbda9cf06,	0x31f1c55c,
-0x52b4759c,	0x89f8da46,	0x41cee81a,	0xa1eeaec2,
-0x4af67f8a,	0x3a20e63a,	0xa2caf5c3,	0x9c3c5779,
-0x2acac8c9,	0x94409ea5,	0xead029b0,	0xb6bcd3c1,
-0x7c41d8f1,	0xbfd61625,	0xe99f0e89,	0x0279bf61,
-0x5d7a4c97,	0xb874dc31,	0x3def7321,	0x9717a1a3,
-0x74dac81c,	0x1fc5bccd,	0x4b121ffd,	0x3c905b5e,
-0x979c8f1b,	0x8db03b46,	0x088163dd,	0xbed0f9ef,
-0x9dd04f9c,	0x05d2be02,	0x464ff266,	0xad2e216a,
-0x6b8568ec,	0x86376635,	0x0e36e6b8,	0xf6cedcfb,
-0xc634e917,	0x996c8a45,	0x2a2a7204,	0x57396ea2,
-0x86e97e5c,	0xd8df2021,	0x27f1544b,	0xbee538d1,
-0x854ac66e,	0x4194e6a1,	0xedca65af,	0x6a96ae01,
-0x4b697f06,	0xa3393627,	0x6aaf7c45,	0xe4ce7b54,
-0xbaf630e7,	0x48c5685a,	0xaf578166,	0x8b4b865f,
-0x9fbe47f5,	0xe6dc5717,	0xe1e6a3f4,	0x88c713dd,
-0x5e095cd9,	0xb8579da1,	0xccb0e009,	0x30893a84,
-0xc9c01f0f,	0xa3afc2d7,	0x568816ef,	0x8e983bd3,
-0x567362ca,	0x103e7a47,	0x504ed286,	0x05e53454,
-0x160d2d34,	0xa78e0961,	0x35de2ff3,	0xb68bb128,
-0x67fe80ec,	0x33f73764,	0x0424a99e,	0xba34b730,
-0x85ba0e83,	0x8a159b32,	0xc3727283,	0x8d012edc,
-0x6ae89a83,	0xb2cc412a,	0x792eb6ca,	0x38337d83,
-0x07c1d766,	0xb5ada859,	0x17e30b6a,	0x9e634e91,
-0x929c0699,	0x026f19f4,	0xa4f8fb5d,	0x9a9d424f,
-0x79c30b93,	0xa3130a5d,	0x68e589c4,	0x027d4ec9,
-0xeef88f03,	0x8afab3b2,	0x4dab76a8,	0x9570708f,
-0xf47bf52a,	0x04d4ef9d,	0x76da08d8,	0x7dc7c531,
-0x4c2d71a9,	0x9952935f,	0x6818527d,	0xdad1c25b,
-0xb8eea89c,	0x7091b5f8,	0x5a333927,	0x865f794c,
-0x36e0a2a6,	0xde431054,	0xe55c0a8a,	0xac41dfd1,
-0x7bb905c7,	0xb19641c9,	0x10fc1be4,	0x038071f4,
-0x3ffe20f4,	0x8af0fb14,	0x87da983f,	0xb6f2dcd0,
-0x1baee9c0,	0x090773cf,	0x85e9fec0,	0x10a1216e,
-0x3ff4c6aa,	0x98916b0e,	0x7fd1d04b,	0x9e8546e2,
-0x7ed1b25b,	0x24c743a1,	0xf52610a3,	0xbe8d47fc,
-0xb40a0dcf,	0xa976fed3,	0x8d6990e7,	0xc6d999bb,
-0xc72b4218,	0xb5667e14,	0x800e6048,	0x559e81ec,
-0x8463a8da,	0xcded36c4,	0xf8214d01,	0x8c9a5bf2,
-0x04b3b511,	0x7f38337a,	0xc1ed0d56,	0x4b4fe2cb,
-0x1ece884f,	0xa9d19d5a,	0x683fee1c,	0xd221e8ad,
-0x328c416a,	0x756b18ee,	0x8481f60b,	0xa9f204cb,
-0x620b2a31,	0xd4266217,	0xf9849baa,	0xd384d524,
-0xa7c8c7a9,	0x9b7e94c3,	0xfb45e191,	0x632547ee,
-0x77feb7fd,	0xd66e5dfc,	0x8d3533fb,	0x97b1f83b,
-0x36c121cf,	0x5fed8787,	0x14bd43ea,	0x24acf846,
-0x279bcc0d,	0x9ffda402,	0xcb0451ba,	0xa671cc89,
-0x0f2ffa41,	0x2479c2f3,	0x8b99c062,	0x839a8212,
-0x814eebd5,	0x8d5ac17d,	0x28ad1e99,	0xb744ee49,
-0x5cc62a5f,	0xa6c2e876,	0xe93c507a,	0x0e838735,
-0x01797001,	0xb6b1e47b,	0x8fcb643d,	0x87274e8b,
-0xcf6ee5d2,	0x1c346645,	0xa241c408,	0x3e434b2a,
-0x5c1e969e,	0xa159f09f,	0x51c24a4e,	0x9ea980d2,
-0xb18a3126,	0x377f54f5,	0x5051635b,	0x88120bf5,
-0x5068c53d,	0x81e91c0b,	0xddbe6afc,	0xace26a65,
-0x89b39b12,	0x9203bac1,	0x30b1e081,	0x0d00f46a,
-0x8dd7bf19,	0x84880bce,	0xfbebc09a,	0xadcd1fe1,
-0xb92bf186,	0x3c0ce7e0,	0x9e1567bd,	0x08e93d8b,
-0x5f3bc65d,	0xbd3213f2,	0x35dff336,	0xb017c028,
-0xa5096cd6,	0x2ec14ded,	0x860021d3,	0x815b7994,
-0x450eec66,	0xbe0468cd,	0xf023c57e,	0xba7f0632,
-0x74ce6861,	0xa3300156,	0x12378195,	0x2902d080,
-0x43670eec,	0xb97e140b,	0x10092553,	0x9621397b,
-0xf9149286,	0x33331ea4,	0x91024d01,	0xce41fa3a,
-0x65596b8e,	0xa146b772,	0x4a65b406,	0x40200f18,
-0xf232bcbc,	0xfd86eb3d,	0xd4b83bfb,	0x8ec7b200,
-0xa9d8490e,	0x42b9b1b0,	0x480bd06a,	0x2dd8f709,
-0x762fedf8,	0xb1083b6f,	0xc7fba09a,	0xbb7a7261,
-0xf624d4eb,	0x118ef882,	0x38230014,	0x8fad6b48,
-0xf500b16a,	0x9116c2a2,	0x0e2a9245,	0x89f6f38d,
-0x9954d6b2,	0xc6db5fcf,	0xe2d103e6,	0x534024b1,
-0xf0bb00df,	0xf15ee38c,	0xa9ea9a03,	0x90597958,
-0x152bdd7b,	0xb5e145da,	0xfd6c72a5,	0x5aa1748f,
-0x86c58ac8,	0x603ad265,	0x5abfe039,	0x25f75b90,
-0x177b6e02,	0xf2dc10fc,	0xf0d32590,	0x9c361b74,
-0x54677a40,	0x5d34ad04,	0xece46599,	0x915f504c,
-0x518acffc,	0x801e0592,	0x491e9bbc,	0x9ea5402f,
-0xe943029b,	0xba9fc7e4,	0x4b6666d7,	0xb5504834,
-0x77cddd8c,	0xbf122e96,	0x665a70e3,	0xc602ba64,
-0xabedcce3,	0x56d38242,	0xeddc0b0a,	0xa8debf0b,

cpu/intel/model_f4x/microcode-m5df4a02.h

diff --git a/cpu/intel/model_f4x/microcode-m5df4a02.h b/cpu/intel/model_f4x/microcode-m5df4a02.h
deleted file mode 100644
index e8427a5..0000000
--- a/cpu/intel/model_f4x/microcode-m5df4a02.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m5df4a02.inc  */
-0x00000001,	0x00000002,	0x06102005,	0x00000f4a,
-0xdfbc9997,	0x00000001,	0x0000005d,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x1b07bcc7,	0x229cce65,	0xe3946d89,	0x368a8eaa,
-0x8b8a4197,	0x2e048664,	0x48078928,	0x0aa749ae,
-0x1cee9215,	0x22910485,	0x3d030824,	0x15cb61f8,
-0x7fff14fa,	0x35c7b714,	0x1d489846,	0x5d8ff7da,
-0xe237595f,	0x35e48e39,	0x4540e8d1,	0x45c15a5c,
-0x3356fc26,	0x5d5386e8,	0x926d41b3,	0x10ca2831,
-0x904bdf7f,	0x463e806b,	0xb22aa067,	0xaff8872c,
-0xb5260171,	0x1b4bdd54,	0x6582202e,	0xaceff700,
-0x56cfda08,	0x8a39f2a7,	0xf1c0e97f,	0x05fe76a0,
-0xca6b4d0e,	0x9f33f9ea,	0x0495ba8a,	0x31380f84,
-0xda4d936b,	0x2597f34c,	0x523aedf7,	0x22df0035,
-0x15acc8e4,	0x23663293,	0xe869afdd,	0x1f23378d,
-0x71a210f8,	0x091c942e,	0x5578f30d,	0xe4be34eb,
-0xfd9927f3,	0x01200031,	0x0d76398e,	0xe46f9840,
-0x8e29a1c5,	0xcfcd5407,	0xc93c0b1d,	0x3675504a,
-0x49fec6a2,	0xf172670c,	0xc264f82e,	0x527393bd,
-0xba750da9,	0x11bb3f31,	0x386d6943,	0x7e02c181,
-0xdf1156af,	0x59bd57ca,	0x9241d631,	0x2bc328f0,
-0xd7bbc782,	0x51d62827,	0x56258a65,	0xe9f0ede9,
-0xa35ed86c,	0x1ffb6be0,	0x0395e246,	0xe7f35b66,
-0x70be025e,	0xff1171d3,	0xae761e69,	0x2af9dce5,
-0xda799a78,	0xe0bded96,	0x4d4688f0,	0xc79b0a5a,
-0xd449c23a,	0x016970ba,	0xf34363b6,	0xe6e1d420,
-0x79320e33,	0xcdd5afa7,	0xfe0fd414,	0x033a16e5,
-0x109c7655,	0xc87a1e62,	0xd78f9c37,	0x682c1113,
-0x2ae57d31,	0x09256fe2,	0x11ffc988,	0x465258dc,
-0xb2dc55ce,	0x5d61a5e4,	0xaab3d80a,	0x19c93aac,
-0x642c1dd3,	0x45999943,	0x46640bc6,	0xd7a6a658,
-0x4a1c0ae3,	0x1ce268e9,	0x83f92440,	0xdbe37cd4,
-0xf589f5a2,	0xcf8915df,	0x593f5d12,	0x3abb579a,
-0xf92f9d43,	0xd32ba114,	0xc158dd67,	0x26e44425,
-0x0c16231b,	0x0846ff42,	0x9a1c72ee,	0x3e7f9e9a,
-0x00d036f6,	0x3a37204f,	0x3ab32667,	0x39c36227,
-0x729b7436,	0x1979daac,	0x14791793,	0xe4b8d8fb,
-0xfd25a4f7,	0x1d1bb5a8,	0x69f8fd39,	0xeb75da5a,
-0x2c090ba5,	0xdcece5af,	0x98101e50,	0x3699a493,
-0x7d8b6c58,	0xc0eac9bb,	0x93b47842,	0xbaf68e38,
-0x81b9c8f5,	0x3263cddc,	0xc123e7a4,	0xaf0c43d7,
-0xe080005f,	0xb7d5b466,	0x943bfb69,	0x35f75e4e,
-0x979853ab,	0xa2602607,	0xdb30f012,	0x866a297e,
-0x76f717d3,	0x162e026b,	0x976d9c8e,	0xbf364947,
-0xc90b79fe,	0xb08b69cd,	0x8f666cd0,	0x00785cd5,
-0xae0dc87a,	0xa73192d2,	0x42290c62,	0x3dc06187,
-0x3a2270f3,	0x2f33ebc4,	0xb2afac90,	0x2550f035,
-0x2a22a7b7,	0x209b09b6,	0x9672bff5,	0x24b1305a,
-0x861a16f0,	0x24d11771,	0x58bfa270,	0xd6692269,
-0x257857a3,	0x032562fc,	0x9cf4edd6,	0xfefe9d20,
-0xf57a5c91,	0xd3d75b0e,	0x01c72ec4,	0x3fa13568,
-0xc454a4d0,	0xc90f813b,	0xd9181420,	0x494627bb,
-0x7c164810,	0x0a00ccdc,	0x3d9ab2a2,	0x4848efd3,
-0x31584e6f,	0x48a0ed58,	0x0db818fb,	0x177138e1,
-0x897d1cbb,	0x7244d929,	0xb3f4a431,	0xb6e60dfc,
-0x8645e9ea,	0x3252a53c,	0x5964ccc9,	0xad76be63,
-0x59027581,	0x83b0fa2e,	0xa5b9346c,	0x2082efd0,
-0xb1bcaf19,	0xb98dfdd9,	0x45e082ca,	0x8c200986,
-0xe193eaad,	0x39bef164,	0x99c468b8,	0x805bdaa7,
-0x22d12bfe,	0xa90be671,	0x6f6d8506,	0x010af4e2,
-0xa8759e49,	0xa3206b70,	0xe9a0be66,	0x139dfd01,
-0x2291dc47,	0x0eec7d63,	0xcbee9187,	0x193b21c2,
-0xffa47a38,	0x2fd0eba8,	0x955f4a43,	0x343b16d1,
-0xa5d61063,	0x33533ce6,	0x4c9e7f08,	0x270ef845,
-0x6252c02c,	0x04e4867c,	0xe26693b6,	0x3620ab00,
-0x04371508,	0x0c2dcd08,	0xb0052ff9,	0x1f24f775,
-0xaadf6a7f,	0x2cd5a94d,	0x2a4df4f0,	0xd98aa865,
-0x754e7b50,	0x13f68eaf,	0x9d7489c8,	0xe7199de3,
-0xda23e0e0,	0xdea52f5a,	0x2abf6046,	0x38ece5a4,
-0x73c54818,	0xd56dea08,	0x859b323e,	0x217c80b9,
-0x626c662b,	0x28cdd1e5,	0x0f0b167c,	0x1cc59430,
-0xb479422f,	0x2dcd0493,	0x332b94da,	0x00c77995,
-0x89c54496,	0x0d850c7b,	0xe053a358,	0x92f97427,
-0xf125c08c,	0x21594f5f,	0x3368cc3b,	0xa2600fbf,
-0xc881574c,	0xa39d7f58,	0x84470209,	0x18f6adb4,
-0xed0fedf8,	0xbeec6bf8,	0x798839df,	0x20581100,
-0x995ad6e6,	0x1eaaefd4,	0x004a1667,	0x2177b9ce,
-0xda36efb8,	0x0ab93b96,	0x5afb7c0a,	0x23479016,
-0xf104b17c,	0x01cfe9f8,	0x56281be4,	0xbaf663ff,
-0xfabb9f77,	0x029a7ab4,	0xef4fa0b3,	0x83621100,
-0xebbe19f9,	0xaff0c53c,	0x6595a5cd,	0x0ef6c50b,
-0xa314b2b4,	0xb18e55c2,	0x4f55d25d,	0x4f6b1c08,
-0x566ae376,	0x3fe466d9,	0x2fc3212c,	0x747b503d,
-0xd827e8e3,	0x44a650e1,	0x84efebb5,	0x0627dd27,
-0xd482b6b6,	0x7c1838e2,	0x57406963,	0x9ba188ec,
-0x6bb9a021,	0x1cac0354,	0xc5204396,	0xa904294b,
-0xd3cf32c7,	0xb9b0ddb8,	0xd95a73df,	0x0076a769,
-0x92fbd38f,	0x88565d4e,	0x7423461b,	0x5880eef2,
-0x143ec991,	0x30bd7869,	0x52b18056,	0x46dfc608,
-0xbff8d798,	0x5ac07642,	0x78638c18,	0x285a786b,
-0xe16c63b2,	0x577a5552,	0xe2964f27,	0xd16173de,
-0xe471135b,	0x16d8cb8a,	0xf2723bf2,	0xc893d60c,
-0x7479a756,	0xe2a5141d,	0xd36cf5fa,	0x3019dc20,
-0x905c02f0,	0xee801166,	0x540c1adf,	0x639cbe17,
-0x92fc96f1,	0x19fc363f,	0x319b5d51,	0x78a939b1,
-0x8f472c1e,	0x7642bddc,	0xfc32257f,	0x07850fb3,
-0xf3df106a,	0x55f29d11,	0x0f920214,	0xe2718970,
-0x72f6ec29,	0x2d54fc8f,	0x2bc67fdb,	0xf3021bcb,
-0x9d068426,	0xfdbf6707,	0xd66932bf,	0x1f66f54e,
-0x256dad97,	0xdad0f681,	0x5ef863a0,	0x06f06efc,
-0xae8c4b97,	0x20d14729,	0xd0b1cd56,	0x13847b3c,
-0xbcc3719a,	0x025dc7bc,	0x90df4cbe,	0x1b1ae1f8,
-0xad2951ed,	0x2b40ff4c,	0x759faaea,	0xef240c6b,
-0x8e876989,	0x3847bb55,	0x00ee9bbf,	0xe2fa917b,
-0x93760e59,	0xc07f19dc,	0x1671842f,	0x2b125b94,
-0x61519c4f,	0xc89f48b8,	0x140e76a7,	0x7d685a3a,
-0xe09c619a,	0x24f25b96,	0xf01b11ec,	0x621dbc3b,
-0x5344e695,	0x55bef93f,	0xe521809b,	0x0283fba4,
-0x18214b19,	0x545ede9f,	0x77c30256,	0xdef3400c,
-0x15358782,	0x135239b4,	0x8c9f4e10,	0xd3785c06,
-0xc8523088,	0xfdc3475a,	0x021c3b30,	0x23c63b6d,
-0xf85e8681,	0xd9e8aeef,	0x30671e47,	0x70d63032,
-0x9b5f73b7,	0x1073c5eb,	0x85a7cf9e,	0x61e6a62b,
-0xad00cc55,	0x4e911223,	0xd564fe80,	0x06a5ae6c,
-0x54021cbc,	0x65e3463d,	0x4d3415c8,	0x868e6ee9,
-0xe5185dda,	0x2bfac1de,	0x5620e9f7,	0xbf461c29,
-0x76cab399,	0xbec619be,	0x6dc45229,	0x1313cd52,
-0x24041989,	0xa3d3876e,	0xb470eca3,	0x3427ab15,
-0x1900f564,	0x02666a5a,	0x857b8bf6,	0x09949203,
-0x20092549,	0x0eb9167f,	0xb6d7111f,	0x2af5715c,
-0x05393ff4,	0x139a0b4a,	0xcc81065b,	0x94c4157d,
-0xca738627,	0x4ab2cda9,	0x9c822455,	0xb1d07b41,
-0x40f6d839,	0x86bcfd3e,	0xde9437b5,	0xfc9cb6c5,
-0x46065444,	0x3cae20fb,	0x6dadbf69,	0x6b53ab8e,
-0x19d8ad42,	0x100ef7f4,	0xb63eff85,	0xf916a193,
-0xd39e525d,	0xaab2c818,	0x43f7fd47,	0x6bd2575a,
-0x2bcd64ac,	0xef7cba74,	0xbbe75ea7,	0x58845dad,
-0xf4556932,	0x513b796f,	0x05aa4a60,	0x51527120,

cpu/intel/model_f4x/microcode-m5ff4807.h

diff --git a/cpu/intel/model_f4x/microcode-m5ff4807.h b/cpu/intel/model_f4x/microcode-m5ff4807.h
deleted file mode 100644
index 165d4fa..0000000
--- a/cpu/intel/model_f4x/microcode-m5ff4807.h
+++ /dev/null
@@ -1,227 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m5ff4807.inc  */
-0x00000001,	0x00000007,	0x06302005,	0x00000f48,
-0xd0938263,	0x00000001,	0x0000005f,	0x00000bd0,
-0x00000c00,	0x00000000,	0x00000000,	0x00000000,
-0x26d329c9,	0x2a31e166,	0x66c2f9e9,	0x20f1b679,
-0x8418e6a9,	0x116f5f00,	0x707d6a41,	0x3e4d0c52,
-0xfbf77861,	0x11d27df0,	0xa8781fda,	0x1607aa8c,
-0x9065f419,	0x16028cad,	0x0a73e487,	0x82e268e8,
-0xb25b4ffd,	0x35e5ce9b,	0xb7076c9e,	0xbc89f562,
-0x82500ee7,	0x84bbac26,	0x56a91ac9,	0x3b779797,
-0xc366ffba,	0x82c1edf0,	0x2efa4b95,	0x638fe157,
-0xf4931de2,	0x1de21ba3,	0x92860c8b,	0x605c4d0b,
-0x49c76b47,	0x698c8b80,	0x6725edb9,	0x1be37787,
-0x0513890b,	0x69e5aa1c,	0x1c109c96,	0x9276986d,
-0x8df3ba1d,	0x091851f2,	0x879b75e2,	0xaaa7fb42,
-0x867616cf,	0xbc6dce65,	0x4a6d1dd3,	0x16bed1b1,
-0x1d889d22,	0x90f4fe8d,	0x7146fe49,	0x6dc47fc0,
-0x2deeea68,	0x106c9c9a,	0x0c3236b6,	0x4ce15a87,
-0xf4e86e50,	0x62ed122b,	0x103315d0,	0x045348ad,
-0xccadafdf,	0x751df108,	0x7cd8a8f8,	0xf6094c95,
-0x6dfa8897,	0x06cb717b,	0x812e7985,	0xe2138280,
-0xfbdbbd90,	0xcd78270c,	0xd1136263,	0x1624eca4,
-0xac36fd00,	0xc6f92d02,	0x7d7cde6c,	0x7d42f8d8,
-0x1debf85c,	0x16f44a7f,	0xb108cefd,	0x6f74f0e7,
-0x2cf15966,	0x43b44ecb,	0x0c7acbb5,	0x3f811a1a,
-0x7362aad9,	0x60a38395,	0x0bea2c1d,	0xce4c32bf,
-0x73ef7173,	0x2c3e8a79,	0x57f45aa4,	0xe936c616,
-0x1e2ac943,	0xf7936b29,	0x2bc26fcd,	0x1415abeb,
-0x6b2a186e,	0xde918cc0,	0x1c260822,	0x27c38d5e,
-0x711e0ba7,	0x3954496b,	0x4a142649,	0x3044ed5c,
-0xf64e33b4,	0x1135ab77,	0xf5eb8a21,	0x1b8812ba,
-0x9ce2a81b,	0x180a3666,	0xf7ad6aa5,	0x0bcd4265,
-0x85412eed,	0x3dd0cd50,	0x47bfa46a,	0x1e1361be,
-0xdf1442e8,	0x37d16ec2,	0x9b001437,	0x1d3f0f83,
-0xd19cdda9,	0x1842234f,	0xa1816f52,	0xae04e7b0,
-0x29785274,	0x33108fa9,	0x0be625c2,	0x99c34506,
-0x5a2a3fb2,	0x899c02aa,	0x201a96bd,	0x30f06406,
-0x119a16de,	0xa9f8cde4,	0xfd3f05a8,	0x1d32e01f,
-0x7d255d7e,	0x1ab06d89,	0x82f8e458,	0x372e977a,
-0xbd4383b3,	0x35b339a8,	0xbed83b22,	0x3ca1a8e1,
-0x9acb1a79,	0x133015f1,	0xab2de80a,	0x1ffa4635,
-0x7b289ca3,	0x27d464a5,	0xbf8513aa,	0x0953f0ef,
-0x8c289cd9,	0x29bfd938,	0xb330e038,	0x2e752cbd,
-0xef07878f,	0x0abdde48,	0x23bdbeae,	0xacb2961f,
-0x256b164e,	0x18cd4b10,	0xb8710450,	0xb3473090,
-0xf93076db,	0xb3af056e,	0xd42d7443,	0x058038f3,
-0x0cb42251,	0xb59f0cac,	0x4aee1890,	0x3a3dac62,
-0x834e2b58,	0x008ce6e8,	0xb54665aa,	0x011af9ea,
-0xef75ff6e,	0x28105b21,	0x99e65e67,	0x26b786f8,
-0xc54fa94e,	0x2ca1ec0c,	0x97f5cdea,	0xc34c6a73,
-0xf84db454,	0x0ca6a53f,	0xd4439423,	0xfce0200b,
-0xfcb91cf2,	0xecd91276,	0x8410b378,	0x36d0417a,
-0xe5aba0cd,	0xf499e947,	0x5db658f2,	0x59c7b74f,
-0xfb5534b5,	0x24962122,	0x6cb4a7cb,	0x751ff89f,
-0xcaaf49ec,	0x687e084f,	0x98fb9aee,	0x194bcdc8,
-0x4a4ebb51,	0x7a7a5ecd,	0x0608ca23,	0x9c452376,
-0x37fe00df,	0x3fbae5e5,	0xa4ac30f4,	0xab34d2f2,
-0xa9809c2f,	0xacda54b5,	0x928ff76c,	0x3acd87c4,
-0x4e993e24,	0xaddd2bc3,	0xf209c792,	0x7e2da52a,
-0xce7b681a,	0x0032afeb,	0x88d3e9e0,	0x498296ba,
-0x2f6aad06,	0x55a24b33,	0x9b025513,	0x0381fe99,
-0xd55c4f51,	0x57f667a6,	0x993673b4,	0x9c9b87ab,
-0xf4f1b67b,	0x31a03ebb,	0x903390b3,	0xaddf67b5,
-0x07cd982f,	0x8140dfd2,	0x8d5d0100,	0x0fd5b620,
-0x2c77b00d,	0x923866f7,	0xe4ff8e7e,	0x1de67a57,
-0xa3bff444,	0x3e73ab15,	0x3815c6dc,	0x347067de,
-0xcfd4a9d0,	0x261517ca,	0xe65c41d4,	0x15dd1d33,
-0xa3c61112,	0x27186852,	0xd75a74a4,	0xa907a37a,
-0x450a1a48,	0x3681379c,	0x14688ef3,	0xb394ca30,
-0x6c6a7180,	0x8d92a1c4,	0x54d485ba,	0x12ce5cd8,
-0x05abf478,	0x8ab2eb67,	0xb35331ea,	0x7b0eb20e,
-0x49875e9b,	0x0f537d80,	0x793d97b5,	0x739c4919,
-0x7457e25c,	0x59bb23b8,	0x92f14d7a,	0x3aee7846,
-0x94f0d443,	0x72c7840b,	0x3c39f33e,	0xd6249267,
-0x04eaecf5,	0x01eff271,	0xff3fc968,	0xd5be480c,
-0xe98acc2d,	0xe66a8c10,	0x853553a7,	0x1814dc35,
-0x3b0b33f7,	0xff955179,	0x79be003e,	0x2e0922ce,
-0x66038e77,	0x35d7d68e,	0xe0472ea0,	0x08adc04f,
-0xc9e431f4,	0x20533f0e,	0xb0c1a69c,	0x1bdb8cde,
-0x79cd5852,	0x12bc5c95,	0xeb92a5ec,	0x87e4dec2,
-0x372a6079,	0x1a0b68b8,	0x0fff60c3,	0x975946d3,
-0x7f81f7b8,	0xbbf6f932,	0x72ae43ec,	0x09e15978,
-0x1f6c46bd,	0x9c4c535c,	0x6940e513,	0x5d67c5b2,
-0xd5d9cf00,	0x06234f8f,	0x49516da5,	0x6dd03aac,
-0xc08dfa52,	0x4f2254c3,	0x59626c09,	0x3f0e1970,
-0x81dc904d,	0x6f69377a,	0x991daff4,	0x57cff106,
-0xf749da77,	0x0c2692ed,	0x3eafef42,	0x6efb757d,
-0x873b1130,	0x418474ad,	0x1c4cf7ef,	0x2311e096,
-0xb67cf807,	0x6dd18fd1,	0xc4c68d72,	0xfaf3bfc9,
-0x89f35dfc,	0x19b07cc5,	0x27209822,	0xe2a9b0dd,
-0x2bbe3848,	0xc657b6bc,	0x3f50b3a4,	0x2a801164,
-0x11e7992b,	0xef41594f,	0x1dc7afd8,	0x4e86fc9d,
-0x3e19d225,	0x04b2fb67,	0x2530bf28,	0x4d5310ed,
-0x5e73962a,	0x582755ea,	0xf8d6afb3,	0x0c11d4fb,
-0xe1824faf,	0x490811c5,	0x3d78a250,	0xa32786d9,
-0xbd626c2a,	0x20c7898c,	0x0a740d2b,	0x95d42069,
-0x3c54f3d2,	0x802294a6,	0x91734eda,	0x360edb8d,
-0x91c193e3,	0x9c102c40,	0x6d0f3116,	0x34de39f4,
-0x98ef4001,	0x1afa00b0,	0xab57cd3e,	0x071de60b,
-0x58b9bc66,	0x12878ac8,	0xf09db7f4,	0x2d24a91f,
-0xa2146992,	0x015ca3b7,	0x851284a7,	0xf222f9c9,
-0xe170191d,	0x3a665e9d,	0x45851684,	0xe397777d,
-0x4747ae71,	0xcc99dd99,	0xc546154b,	0x189d7ca5,
-0x2c7bf0b5,	0xdf8ccd5e,	0x3f203b3e,	0x662b2c60,
-0xe734fb1b,	0x21393f9e,	0xadb29511,	0x67c90049,
-0xd5bb8b21,	0x4e69c8bd,	0x65db40f7,	0x2a69a9bd,
-0xb56edbb4,	0x6fae3038,	0x03219228,	0xdbc4af3d,
-0xa59d7a3a,	0x362d2168,	0x0d9c7c27,	0xe62be3d4,
-0xb63a6b13,	0xef7860d3,	0xa4d117f9,	0x369be422,
-0x8d27cc00,	0xc7a1bb67,	0x7836549c,	0x20ed758a,
-0x90ad7500,	0x38b929a0,	0x3229d9af,	0x154b028f,
-0x97232dda,	0x15cb4f42,	0xa58077ec,	0x276ccbbe,
-0xb0de78fb,	0x3264115f,	0x0f4b174f,	0xbe2a65a6,
-0xda506ff5,	0x0d4d559d,	0x79948872,	0x8a95fd4c,
-0x12d6335c,	0x844f497a,	0x9bb45150,	0x28bd620c,
-0x80b40b4c,	0xb4051d5e,	0x455eae91,	0xd28e3e52,
-0xac4d592d,	0x3ad6a991,	0xf074cb5f,	0xc6973256,
-0xaa71e4c3,	0xd6eb7c57,	0x581a55e7,	0x00e1b63b,
-0x255aeb5c,	0xf027ba58,	0xd9bfa4cd,	0x6d03b145,
-0x663eea00,	0x29233db7,	0x4437557b,	0x5a7c23ee,
-0x365580a1,	0x411f866d,	0x8c9bdcd3,	0x2b4a96a1,
-0xc8bf36ea,	0x51236715,	0x7132a778,	0xc73c07ca,
-0x8d289809,	0x3c974992,	0x5d770492,	0xc2908798,
-0x00a24042,	0xf4bc0a54,	0x40c0ba8d,	0x07b1258e,
-0xbc51f7c4,	0xd9ee4929,	0xbe0bfc9c,	0x334421b2,
-0x889eebe8,	0x3c03fcbc,	0xbf22d714,	0x3587a446,
-0x37ca6e3d,	0x01e338d4,	0x31bf68ff,	0x00fabf85,
-0x57494c1e,	0x17020886,	0xbc0572eb,	0xdc9600ab,
-0xeb710c7b,	0x0eddd9b2,	0x1193ed40,	0xc69f5e7a,
-0x62040a15,	0xd0e3e898,	0x0b18d0af,	0x366af56d,
-0x5b8536d6,	0xe4a65046,	0x965930f4,	0x263cb67e,
-0x09c9d4f9,	0x3bfb7a4d,	0x95bad066,	0x30133fd6,
-0x3e15f9bc,	0x0e194da9,	0xa5b2b20d,	0x2a2936dc,
-0x336f26f0,	0x3f344e86,	0xd9488143,	0x8b64dd28,
-0xbd4b145b,	0x200a19bb,	0xd21537be,	0x908c8c9f,
-0xa8221796,	0xbbb73fff,	0x07e356db,	0x38bec8d1,
-0xfa6ff6c0,	0x86835c79,	0x76428063,	0x5ee63b8c,
-0x05498359,	0x394944ec,	0x2cc16b7a,	0x40e36aec,
-0xdf71f61d,	0x5d2c7324,	0x08efba21,	0x37ac71ea,
-0xa2b2b251,	0x4b986748,	0xc28aaa7f,	0xcf84e31a,
-0xeb2fa943,	0x057e302a,	0xa2530048,	0xefe24dd4,
-0xa8fb035d,	0xfc417d87,	0x4629a3b9,	0x21775352,
-0x1a5a64b8,	0xe59b2055,	0x8e257fcd,	0x24261511,
-0xb2be3f5f,	0x1b4ef82d,	0xe131fe18,	0x337b53c9,
-0x55c11b19,	0x229e3819,	0x11a8923a,	0x0dd5168f,
-0x507dafa6,	0x1dc50a76,	0xb4aa3257,	0x8ddfca38,
-0x1c987a61,	0x20735b89,	0xa73455c1,	0x8f459b40,
-0x05007320,	0xb65bd8d8,	0x938a9956,	0x3913cd4b,
-0x37cac3a3,	0xb14cc5e4,	0x5b0372df,	0x2777e6c1,
-0x6a6259dd,	0x05f27545,	0xba159c25,	0x3adfb42f,
-0x77016837,	0x09fc1014,	0xbfe6dc10,	0x154f77ea,
-0xb6f1ce8e,	0x2aa99bab,	0x230d5ff2,	0xa3bef6f8,
-0x6db613a1,	0x39e0167d,	0x9d057421,	0x9cd0aed8,
-0x4c722d24,	0xaebe325e,	0x259dfcc5,	0x39b4b6e4,
-0xcec2edb0,	0xaeda631f,	0x646977ed,	0x41e40c9c,
-0xff8ecfd8,	0x0892af92,	0xe7d50c3b,	0x6fb106e2,
-0x63206315,	0x78070c93,	0x9d03b462,	0x163a4202,
-0x92ef3da6,	0x5f249006,	0xde090c17,	0xea9f368b,
-0xb67f6e31,	0x22c1870a,	0x23541006,	0xdcf6fab1,
-0x55150fe3,	0xc0dbd69f,	0x3d3f88e7,	0x1da20749,
-0xdb4c7249,	0xfd1e1242,	0xd15db994,	0x71104f58,
-0x078ee22e,	0x2ac24674,	0x28c84427,	0x460e4859,
-0x520980fc,	0x6222abd4,	0x362bb52e,	0x183b64f0,
-0x75d5c416,	0x7ccae489,	0xf7083301,	0x83b210d7,
-0xf391a201,	0x2c0e136d,	0x51b6872b,	0x9db440dd,
-0xa59d7875,	0xa976f5cf,	0xc705bdc2,	0x0b7fa6be,
-0x1f4c0df4,	0xa63395cd,	0x926a78a6,	0x3a3fb625,
-0x276ebcef,	0x0f1595dc,	0x1bcab7f7,	0x065744f9,
-0xb7679ba0,	0x24606525,	0xaaa30b45,	0x341f5ea4,
-0xd155c561,	0x1b4b0a65,	0x63a36a4b,	0x097d9eea,
-0x2a07c905,	0x1e2fc01c,	0x8860a3b0,	0x25eabc20,
-0xa4c20b4a,	0x353eb5d1,	0x31964504,	0x0e224464,
-0xb6cfca44,	0x32bb77ac,	0xf3e37914,	0xed46cd81,
-0xe57acbe7,	0x1d6922ea,	0x7251aac0,	0xdfc9cc46,
-0x6fa6b37d,	0xd3a99cbd,	0xad81ff1f,	0x36b291c0,
-0x91ff7f94,	0xee28fb63,	0xe5a52bb6,	0x5f1037db,
-0x88587ff9,	0x3df7d637,	0xb0b61834,	0x7884cdfa,
-0xb1732935,	0x00d0306b,	0x824c92d2,	0xd09640b8,
-0x35d5aa27,	0x1e6aef33,	0x75e5850d,	0x18ba7cab,
-0x735c8ad5,	0xd79045f3,	0x9b86ccba,	0xd5448883,
-0x68784740,	0x9dede6a6,	0x37540723,	0xdc8dfde7,
-0xbb3fce7d,	0xa8de647c,	0x5d414a14,	0x2dbc3e19,
-0x06fee8a2,	0xf9df2b49,	0xa66607bf,	0xa6793f17,
-0xace3fb23,	0xb30c40ea,	0xff798ce1,	0x8c87c2a9,
-0xcab87256,	0x730ff551,	0x9c8addc0,	0xcb52ac8b,
-0x60b47338,	0x8ff343fa,	0x18a69cac,	0x2866c9db,
-0x6c0665c6,	0xbb9d9b29,	0x3dda21c4,	0x773f8916,
-0x77c4ae2b,	0x6e1b6c6f,	0x85b98de2,	0x9fd1b7be,
-0x33917c11,	0x2be25fb1,	0x1ae146dc,	0xba0d2703,
-0x0c8310d1,	0x801d6100,	0xb7dfde3f,	0xccc72ddc,
-0x7b09d6d5,	0x921e54ae,	0xb72ee68e,	0x11e69284,
-0x0efff061,	0x07983fe0,	0x6cf3bd9a,	0x0eedd36b,
-0x1444744e,	0x37c5b1ee,	0x8f6c17c9,	0x75dbd656,

cpu/intel/model_f4x/microcode-m9df4305.h

diff --git a/cpu/intel/model_f4x/microcode-m9df4305.h b/cpu/intel/model_f4x/microcode-m9df4305.h
deleted file mode 100644
index bb3232e..0000000
--- a/cpu/intel/model_f4x/microcode-m9df4305.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m9df4305.inc  */
-0x00000001,	0x00000005,	0x04212005,	0x00000f43,
-0x77812c17,	0x00000001,	0x0000009d,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x41740bf2,	0x0fb63031,	0x74bc45b3,	0xf307c6fb,
-0xaf228a86,	0x79ea9270,	0xc00409b8,	0x7168b2c9,
-0xc69ce09c,	0x6feac351,	0x43e9da85,	0x3a90aeb0,
-0x585463dc,	0x862a2fdc,	0x940910e5,	0xb505c163,
-0xc30e56e9,	0x4e2a719b,	0x42e8bbda,	0x19147d96,
-0x7ff726d7,	0x1e0edfda,	0x87d8bc2a,	0x60653903,
-0x71774956,	0xa9471d10,	0xf1c88b74,	0xb962703b,
-0xf17437d9,	0xc0adbf90,	0x652ab30e,	0xc67fae0c,
-0x0e841997,	0x99f91985,	0x3e029b48,	0xa72bde1d,
-0x3ea0da5e,	0x96279a8d,	0x1f1ec1cd,	0xa965fa6b,
-0x35c8ccbb,	0x6a72ee72,	0x1fc43e03,	0xec7735f6,
-0x8823ff1a,	0x3e645212,	0x82a09482,	0x311bf7a3,
-0xcadf34af,	0xa6c5cecd,	0x70bf80c8,	0x0845cd4b,
-0xf060f6ab,	0x428653f0,	0x4582d8a8,	0x47e4bacf,
-0x05b49c22,	0x51443b9c,	0xce21cc4e,	0x1468359a,
-0xc3a26269,	0x497f2c70,	0x812df7aa,	0x4d4c04f7,
-0xb9a174a5,	0x0ef520b4,	0xde699847,	0x365da54e,
-0xb1187e8c,	0xca454e8f,	0x9e8f544a,	0x635a9936,
-0x291f0f10,	0xc880aad6,	0x052f194a,	0x8a07d5c9,
-0x49dbf128,	0xdf0d5289,	0xd7963495,	0xabbf6337,
-0x7b8b78d0,	0xbadf035b,	0x5ce0b492,	0x8f3505e5,
-0x4a5993c4,	0x5b5bcf84,	0x27427e04,	0xecb71d2c,
-0x19bf1e03,	0x1c0aa23a,	0x0550181a,	0x873111fb,
-0x420a4832,	0xfe59acd4,	0xa6639d43,	0xe8586050,
-0x7eeaedf9,	0xf262b624,	0xdbaf5bc7,	0xf6a1f48d,
-0xcb134184,	0xebb3b6b3,	0x4286edbe,	0x831035db,
-0xf21d33cf,	0xf0e5a942,	0x713ba616,	0x67050db1,
-0x297d8d43,	0x492ad3e8,	0x7baabecb,	0x182896ce,
-0x2dd7ca4b,	0xd9b35d23,	0x7bb66ec7,	0x61d8a014,
-0x741f2ffc,	0x9900d5bc,	0x6dca1242,	0xe7fc10f4,
-0x189d5169,	0x9dc29201,	0x91dcfc93,	0x3f897e83,
-0x5fb4bc8e,	0x90e9d74e,	0x80a59795,	0x52e200b4,
-0xb848428e,	0xe1c88c23,	0x4bdb6f55,	0xec37329d,
-0xb9319cf5,	0xafc426ad,	0x709291c3,	0xd6337f13,
-0x05787ba5,	0x1fd0c9be,	0x04c10f42,	0x8b905c03,
-0x9c8ab821,	0x39d16a2c,	0xff92a2fd,	0x03a422f6,
-0x399071b6,	0x1a71c1f6,	0x2a06aaa7,	0x5a127792,
-0xe0245f90,	0x7ac7a606,	0xca8b0026,	0xc47103e3,
-0x711ebc3a,	0x63c83ae1,	0xaf6a9a65,	0x744c86a2,
-0xbe10c4ad,	0xc2803284,	0x602b6a17,	0x10d60720,
-0x8308d938,	0x6e92a831,	0x64f30617,	0x50a13d14,
-0xa5aeb526,	0x1ecb499b,	0x5b60c9e4,	0x8dd251ef,
-0x11b16e38,	0xea410ba4,	0x74db14bd,	0x2f4d5e36,
-0xf28ea5e5,	0x231f3e77,	0xf436a5a5,	0x56bbfaf8,
-0x2ccc07eb,	0x0813c683,	0x86822d1d,	0x95b897c5,
-0x3f62fa14,	0x9f3f99f8,	0xd5f7fdbb,	0x0cbe179a,
-0x1f3a5628,	0xeca6f2b4,	0x12f7cada,	0xe37a2fdf,
-0xb675725f,	0x410037c5,	0xb808ca59,	0xa4bd5413,
-0xe32191b9,	0x3235a554,	0x62039695,	0xa0652f4f,
-0xc78028d8,	0x499fe81d,	0x316a700c,	0xb1489055,
-0x7a513a9b,	0x7f03fad5,	0xff234c2e,	0xc4b2455f,
-0xa412eff4,	0xcaa52441,	0x0923a5ae,	0xdcd7187e,
-0x758f5fd5,	0x5b1b9e7d,	0x95c7840f,	0xf965e7e5,
-0x98b65c42,	0xc61289d9,	0x7249b7a0,	0x5102c56e,
-0xfc8aa455,	0xb44da061,	0xb0a37e8b,	0x29d8c01d,
-0xbb5e79df,	0xa795eef2,	0x91d432a8,	0x5e5d736e,
-0x30f4bfc4,	0x2fe5b1ed,	0xf092e0d1,	0xdd507420,
-0x972da66c,	0xd7165069,	0x0a8e6912,	0x30f29776,
-0xbe544016,	0xc9af8108,	0x1cc1e045,	0xbf221ed5,
-0x1e7cb2ff,	0x8e9442e9,	0xaea734d7,	0xcc58775a,
-0x2c115eeb,	0xfb48535e,	0x174d0264,	0xc99a9afe,
-0x252c6e79,	0x09e05ab6,	0x0cb416c2,	0x6f0da541,
-0xa2947cd5,	0xd134edd6,	0xaa8876a4,	0x35025d69,
-0x1d95153d,	0x68392af7,	0xb428842e,	0x72950102,
-0x6718027b,	0x8e564123,	0xada1ebcf,	0xa7ee3852,
-0x86c0b296,	0xd56a51c0,	0x87bc83f9,	0x94c703fe,
-0xd43043ba,	0x7a4f6d96,	0x43cde1ec,	0xb7a7e12a,
-0x1160cd1a,	0xe98c5d2c,	0x226ac59c,	0x3561e049,
-0x92b8d432,	0x269e9e5d,	0x12a0eca9,	0x52124b1a,
-0xdabfc0a9,	0xda11ca8a,	0x59883488,	0x5f0cd8a0,
-0x08c4c231,	0xdbabee6e,	0xac686a3c,	0xd4e2b5e3,
-0x747a399e,	0xc40b5f06,	0xea298387,	0x21d07cf0,
-0x51fce4d8,	0x68044635,	0x10a5ffb3,	0x5298f28c,
-0x906a8d2f,	0xa1c8fda2,	0x543e77c7,	0xf8ece9a9,
-0x63ed3519,	0xb10c7f4d,	0x04c140ca,	0xd91343fe,
-0x9cb4229f,	0x068e8f29,	0x77ec5ea3,	0x0238ac70,
-0xd550fdd4,	0xda35bd00,	0x6ab6daf7,	0x6411bd0b,
-0x657771ef,	0xe41b9cc9,	0xd3fc46ac,	0xe3562add,
-0x6799cce2,	0x25b911e5,	0x50a1d2c8,	0x12ca2a68,
-0x136e4bf0,	0x23c049e1,	0x1910cc00,	0xdeb236de,
-0x0b9c05dd,	0x6a02b30d,	0xc6fe586b,	0x3d3e45a7,
-0x2f22a744,	0x54773926,	0xec0bbc4d,	0x48df3c56,
-0x6e3c5d21,	0xfbd2ff57,	0xea2d9bc4,	0x4f52996c,
-0xfc81629c,	0xfdc01172,	0x1d953584,	0x63dada41,
-0xb6cd3a92,	0x01c070fb,	0x73a6a71e,	0xe5c02fda,
-0xfa188df8,	0x633c1650,	0xc8db25c4,	0xaf1f9350,
-0x0c74858b,	0xd5bebe13,	0xc6c32a82,	0xbe86fba1,
-0x8bf03e83,	0x0f9e7689,	0xab4a988a,	0xd115cc46,
-0x4f0268f9,	0x36af63d7,	0x9016f26d,	0xc5abfa8d,
-0x46718964,	0x8d6f297a,	0xfb7e84de,	0x72f4563f,
-0x93ec2c9d,	0xc1dd760b,	0xd2c167a9,	0x96440c3f,
-0xfc6cb1c3,	0x1d72d321,	0x386e6cb9,	0xb173c629,
-0x1a876416,	0x388f6f6a,	0x9f45966a,	0x1f015d4c,
-0x4c033d79,	0x9fde00f0,	0x44def7c5,	0x7cd0b2a9,
-0x85c4ca89,	0x07db2622,	0x731efeba,	0xa9a66091,
-0xd4ed0fff,	0x7660ab08,	0x983d6077,	0x1a0ea34a,
-0xd4548ba0,	0x66c9b8f2,	0x35173c26,	0xeeaa588d,
-0x5c36c76d,	0xd4c88651,	0xe18303d4,	0x824d8807,
-0x7b4dd2bd,	0x71719dc5,	0x19c23f5c,	0xc06f19b8,
-0xa20fa726,	0xd701ee20,	0x62ca2add,	0x6b8d8f6c,
-0x13204a15,	0x5bc46207,	0x9b13c41b,	0x8cbf9545,
-0x72faa845,	0xa97a0e66,	0x90acd440,	0x638f02ef,
-0xaf944eeb,	0xd11c44c0,	0x7d44f7ae,	0xe2293ba0,
-0x45b04be9,	0xb8d14f4f,	0x269e26a9,	0xba24ec3e,
-0x9e905c28,	0x5705c02b,	0x8e9b485b,	0x159d2572,
-0x2fd0efc9,	0x20d0a053,	0xf9223304,	0xf3791ec6,
-0x7620b3e3,	0x871cb096,	0x03c47ccb,	0x45c1e6e4,
-0xe9459554,	0x93b06148,	0xe632e819,	0xfc0dae00,
-0xa89b13d4,	0x883d2d43,	0x8d67ef3b,	0xc7322610,
-0x622b4285,	0x46bfdaed,	0x66042c6a,	0x657249a6,
-0x7ad10b29,	0x241c4267,	0x80c7860e,	0xeb3d5887,
-0xf939d68c,	0x9ff51d77,	0x84fb0d54,	0x961e1142,
-0x8699a335,	0xafea31ac,	0x9ed69870,	0x0d9cedfd,
-0x176bfba8,	0x66a83c18,	0xf002bf7e,	0x65f89946,
-0x9d25e0f7,	0x84b9c9f2,	0x7537f464,	0xe65c15db,
-0x1c5c4435,	0xfab634da,	0x6fc6b100,	0xa2691637,
-0x104b7f83,	0x4e07905f,	0x8d024265,	0x85a32eb3,
-0xcb57a035,	0x7f4c5350,	0x30602409,	0x0ea22684,
-0x52a31ef4,	0x98b176c5,	0x88cf84eb,	0xe2735407,
-0xdbb18422,	0xbd24b47b,	0x972b7446,	0x0cffacd4,
-0xd8a24e33,	0xc97871ce,	0x2f49bde0,	0x143f6db1,
-0x32a5ccd0,	0x55b4bdeb,	0x6c9031de,	0x358c8f66,
-0x6c7d431f,	0xa6f7dbbd,	0x87b6a229,	0xd4cebd19,
-0x663ebb0c,	0x7a98d7ea,	0xbb5aa19a,	0xafc7a8d6,
-0xe514d8f9,	0x0cc34af0,	0xe86257b2,	0xbcc81965,

cpu/intel/model_f4x/microcode-m9df4406.h

diff --git a/cpu/intel/model_f4x/microcode-m9df4406.h b/cpu/intel/model_f4x/microcode-m9df4406.h
deleted file mode 100644
index 79e9fb7..0000000
--- a/cpu/intel/model_f4x/microcode-m9df4406.h
+++ /dev/null
@@ -1,227 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m9df4406.inc  */
-0x00000001,	0x00000006,	0x04212005,	0x00000f44,
-0x9f60db18,	0x00000001,	0x0000009d,	0x00000bd0,
-0x00000c00,	0x00000000,	0x00000000,	0x00000000,
-0xe563140a,	0x7a20a196,	0xeb1d9a96,	0x5defb059,
-0x551ef057,	0x018ee1e6,	0xdaacf6e3,	0x14105663,
-0xf1e0900a,	0x35e5b615,	0x542b082e,	0x27a12e48,
-0x6e3986f8,	0x73be0124,	0xa2d87e91,	0x3a6f0d62,
-0x749a41f5,	0x722ce5f3,	0xacf63c0c,	0x1dffb5b9,
-0xb1f377a0,	0x258e340d,	0x2826e300,	0x46ff70a4,
-0x000c7a3d,	0x5c7d517c,	0xa4ac08c4,	0xf3251d6a,
-0x97ee3046,	0x74b66de7,	0x70ddb034,	0xf1cc3728,
-0x24646e08,	0x89d1ef84,	0xf2c5d259,	0x5636ef08,
-0xbc4b18ab,	0xb77a3bf4,	0x34ed12b6,	0x3904c93e,
-0x2aabac33,	0x30a9be4b,	0x3cb32cf3,	0x0c8ec4e1,
-0x5dd3de8a,	0x6822723d,	0x1ee4a4a5,	0x76f8dff8,
-0xc114ecd8,	0x24e2b997,	0x895778d4,	0xd96893a3,
-0xc3f8b3b7,	0x0894e3d6,	0xacf5f40d,	0xb6c4805d,
-0x9e702a73,	0xd83e0f61,	0xe57efbec,	0x734287d9,
-0xad22e7ba,	0xd43369ff,	0x5c8f9702,	0x10faeede,
-0x8f7a2b16,	0x27a2f4b4,	0xb9dae4d7,	0x2e060e6c,
-0x0a565ac4,	0x56017827,	0x1d40da17,	0x302f4015,
-0x4df69cd6,	0x557f99fe,	0xe05ae859,	0xa4d26771,
-0x66668ed3,	0x1b02cbe2,	0x6402e2b9,	0xe2d45956,
-0xacdbdf95,	0xcf15e429,	0x1211a69f,	0x6527d512,
-0xd454cf93,	0xc8057a6a,	0x462abebf,	0x50f4a562,
-0xcc021bd4,	0x12e4dcf5,	0x0f643ac4,	0x64b62a5a,
-0xe31293f4,	0x69a4f441,	0xfd7c73a7,	0x3de19d86,
-0xacea1763,	0x5452e277,	0xaf998cfa,	0xd0dbd619,
-0x437a136f,	0x7d84b255,	0x0badc43d,	0xcfdb5155,
-0xe0f18baf,	0xc7e50dec,	0x12f74c21,	0x10839a4b,
-0x384c0010,	0xbb64e51b,	0x6b1f8001,	0x3a42ea68,
-0x52ba8707,	0x4840e661,	0xea8cb909,	0x71bf8fe9,
-0x301e156b,	0x1b28299f,	0xd6f83b79,	0x68b53c17,
-0x8ee827d4,	0x4d264534,	0xd831f750,	0xc0897c28,
-0x9c27edd1,	0x2c54ffcd,	0xbdd61a3c,	0xbb750d1f,
-0x92ba81b5,	0xe8b41b21,	0x92bd9214,	0x2f3bcfe1,
-0xfd7e8ee6,	0xbbf21e5b,	0x2d2f042c,	0x6c2f1c00,
-0xfa5db9eb,	0x64e9da32,	0x27ccb83a,	0x6ee2c527,
-0xe480e71f,	0x74d3726e,	0xef8a1239,	0x795cbd73,
-0xd29bc178,	0x34560391,	0x4bb7009f,	0xc150a672,
-0x68094238,	0x7b23b1b8,	0x4561db18,	0x9e9e2cde,
-0xb4b6defe,	0xe412c6ed,	0x19bdb157,	0x3431b08c,
-0x83cbf398,	0xc02744ae,	0x757b3636,	0x70cc9a6a,
-0x16644d51,	0x66ff4e2e,	0xa8f9e6c1,	0x2d36259b,
-0x54f24515,	0x47f972c0,	0xe5b96f48,	0x2e8f8866,
-0xee84deb6,	0x261022b8,	0x25e08920,	0xab692cf4,
-0x2899a0e2,	0x4fb247d8,	0x84dad90e,	0xade5b71b,
-0xf866993a,	0xdb0e8d9a,	0x855db464,	0x46c73e5b,
-0x6c4dc8ee,	0xff498c8e,	0xf5bcf485,	0x2c222e5a,
-0xea373f27,	0x4c98a5f1,	0x6d389f50,	0x24181e62,
-0x761fd60d,	0x11ff22a2,	0x9be6e06e,	0x5d6349af,
-0x743a43a9,	0x6e183bfa,	0xceb18be7,	0x87693e10,
-0xc7589a26,	0x147efde0,	0x82bb18e7,	0xe0a9b9ca,
-0x81f4f143,	0x814c966f,	0x1ae2043c,	0x2b2f4bc9,
-0x9ad21435,	0xe4ec4152,	0xb6f735d9,	0x29c6cf4a,
-0x5172795f,	0x7de9a8ce,	0xb11ab201,	0x37cc8504,
-0xc4341e1a,	0x32e7b6bd,	0x3ada1f2b,	0x5f8e8670,
-0xffd0e48e,	0x7b204a33,	0xbf8ccf79,	0xfd7a0537,
-0xbea6017c,	0x13ddc317,	0xa2b49bc1,	0x85535884,
-0x2306bc4f,	0xf7fd5f14,	0x2f25e16d,	0x7a05c70e,
-0xa734f67e,	0xed9bcbaa,	0xb4b23ae3,	0x743a2302,
-0xba46fa60,	0x44b8fcab,	0x53d89eb6,	0x75d3f3d3,
-0x3cf9ef83,	0x265b38e9,	0x99f9df3c,	0x2af44ab9,
-0x34802ecf,	0x2341609e,	0x04ad291a,	0xc2110545,
-0xec4a8447,	0x42d6132f,	0x6a729029,	0xf56a07da,
-0x9f51b3e3,	0x81e20e55,	0x48b7f7d1,	0x6ceae8e9,
-0xcf28c1cf,	0xb0459807,	0xed8c8daf,	0x572bcbdf,
-0x77c5640f,	0x4edc4215,	0x3fff4444,	0x4784c4e2,
-0x3ffb9ddf,	0x1af87147,	0x1638fa9d,	0x61771e20,
-0x621459b1,	0x021f0a08,	0x0a8336df,	0xd8c8ccc8,
-0x88b75e47,	0x18ae2461,	0xc06d45c4,	0xf814ae69,
-0x9a368b90,	0xbe063af0,	0xc8e466b1,	0x78993bfc,
-0x8d797b93,	0xcb9eeda9,	0xc2320b6c,	0x0043b902,
-0x2eccbc54,	0x48a4e5a2,	0xc218b3ba,	0x488183e7,
-0x3df27709,	0x45e0daf4,	0x6bfe1329,	0x3c518851,
-0xb53c01cd,	0x5b10b2c2,	0xc88f1150,	0x8133965f,
-0x8b16773a,	0x65de9860,	0x5cb18ae4,	0xe61105a1,
-0x4c3f0d28,	0x9189f726,	0x620106e7,	0x0ae5d1bc,
-0x46bbd58f,	0xd7b7b07c,	0x53d82958,	0x2febb95a,
-0x4ffcdd8e,	0x57a046df,	0x3b63f580,	0x463fe2c1,
-0x209a9440,	0x79882a80,	0x5cdadafe,	0x1c7a31ba,
-0x3bf5ca92,	0x76115d65,	0x731a4e07,	0x8f2198d4,
-0x19921981,	0x664f4e11,	0xe1e6022d,	0xc55ec9a3,
-0x758a56c8,	0xc35d3895,	0x7cd59bab,	0x234a3699,
-0x0b5aeeef,	0xfef8ad6f,	0xbd82b866,	0x471a70c1,
-0x7de86792,	0x12f88a2f,	0x031beb63,	0x3660e731,
-0x919853a7,	0x100a8549,	0x14e6105b,	0x3f332601,
-0xf052c2d3,	0x7d8be989,	0x87f54337,	0xbfa644c9,
-0x24dde887,	0x3d69f2f6,	0x80026b49,	0x90739ca4,
-0x3862381f,	0xbf2d9626,	0xe02bd15e,	0x55a675df,
-0xef1839d7,	0x99469915,	0x91cfaf2d,	0x7f94040e,
-0x35db5f2e,	0x1d38d47f,	0xebc93baa,	0x193f516a,
-0xe0b6a8c3,	0x73c5b0c2,	0xd56da2b9,	0x510d7b46,
-0xdab1fc17,	0x1a1c680b,	0xf73644d0,	0xf43258a3,
-0xfc729ea1,	0x17593652,	0xdc9a37b5,	0xc53b613b,
-0x71a648cb,	0xc28af23f,	0x96cde33f,	0x0acd49b6,
-0x2cc90ae2,	0xf2cbef0c,	0x300dbaf1,	0x5110904c,
-0xe0da462e,	0x541d3d34,	0x527c9afc,	0x2bcd7311,
-0xe0d8dcf3,	0x1974fc1b,	0x552345ab,	0x5ddcc35f,
-0x3699800a,	0x47a5f674,	0x7579adb9,	0x8c9ebdb9,
-0xedeaa964,	0x07bf6a14,	0x56b5fc09,	0xd6ae4f7f,
-0xa4427021,	0xdaeffdb0,	0x928631b6,	0x3d6feb97,
-0x592ab6da,	0x943bed47,	0x4e90670f,	0x6eed39af,
-0x558a3291,	0x69676209,	0xe26b1251,	0x45e748af,
-0xd7db0c17,	0x09d904af,	0x5c23eee4,	0x7dce5a88,
-0xaf448358,	0x6d2cc780,	0x94b4e6fa,	0x869a5a07,
-0x3f75da4a,	0x4981f4f0,	0xad2c1bd2,	0xd415266b,
-0x61d4c2e8,	0x9978181e,	0xa614c894,	0x51bb75b0,
-0x697f25bf,	0xbb387310,	0x901fb6bf,	0x7a5775aa,
-0xf4e54003,	0x2337ba70,	0x76dae5b2,	0x1bfe4416,
-0xbfc66700,	0x635a01e8,	0x230e0a21,	0x0647f1dc,
-0xacb82703,	0x233333f1,	0xd089d131,	0xc827d423,
-0x7ee72b61,	0x741576ed,	0x9c684f01,	0xe19af7d8,
-0x4f58f71c,	0xb717d8d2,	0xc6b831b3,	0x5528044f,
-0x96dd56f9,	0xa2a35007,	0xdd261fc4,	0x33397ed2,
-0x53d58350,	0x3b901c93,	0xd323a1c4,	0x5a2ff964,
-0xf194322e,	0x185b3a7f,	0xe0f25f21,	0x7d4e0d38,
-0x00422302,	0x72066cc5,	0x9391be09,	0xd4162cc7,
-0x8ad4051f,	0x73556df6,	0x1588929f,	0xf56e27ad,
-0x50c0350f,	0xa66ff66a,	0x0a1f67e9,	0x068eafc2,
-0x14f5c391,	0x88baa8a3,	0x13170c2a,	0x229a7ea2,
-0xca01ec98,	0x4818229c,	0x54e076db,	0x7c17e80a,
-0x8580283d,	0x6b59273b,	0x24a34b79,	0x6e25f7ad,
-0xccff2b70,	0x53efab29,	0x5d90e63a,	0x9bcd34ef,
-0x71f0da42,	0x18ed41ed,	0x695cbc37,	0x9c7f679a,
-0xc6088111,	0xd9bc46c2,	0xf5cca3d4,	0x20c04383,
-0x791793fa,	0xb7e9e066,	0xfc95fab6,	0x6dd1d554,
-0xbe778ba7,	0x7dec91e5,	0x94024a42,	0x64a1eb3a,
-0xc81a3114,	0x0babf6d6,	0xaa7d38c4,	0x5115e4a7,
-0x9ac88b93,	0x39ae62c4,	0x2acf36c5,	0xb574de96,
-0xcdbdb1a4,	0x413d5bc1,	0xae04a74f,	0xc9832330,
-0x633c6d74,	0xb1b139e8,	0xac763c36,	0x2360f00b,
-0xf30c9ecc,	0xc7ce662d,	0x4f79c584,	0x39edc122,
-0x24cc4698,	0x24e10e96,	0x1809b9c0,	0x3a3f8ac9,
-0xf2fa2e48,	0x376780b6,	0x8efd4055,	0x324d429b,
-0x3f6df8d8,	0x1a0aab7e,	0x9719292b,	0xa8e80f5d,
-0xdfd687f1,	0x1ca45455,	0x4582e3fa,	0xdc769c17,
-0xe4b4b6a6,	0xb3ef5ffe,	0x77c6080d,	0x2c5e8928,
-0xe49b00c9,	0xdb9af793,	0x83882747,	0x5c0bbb97,
-0x6d798b75,	0x3c487b6c,	0xc18aad39,	0x2b33b4f1,
-0xb77e14c8,	0x7e7f60ec,	0x31a7d15b,	0x54f7a3f5,
-0x409be002,	0x4b7d598f,	0x5a55ef80,	0xb0c26a57,
-0xd2c0054c,	0x68ec0a7f,	0x094ddebd,	0xf2cf11b5,
-0x0cdc898c,	0xae7103b7,	0xf73378e2,	0x1bb441a1,
-0xc1d156b0,	0xc3e353e8,	0x51b2d82f,	0x6b86be5e,
-0x24ddfe39,	0x7b57c5e9,	0xabacf363,	0x119b7e41,
-0xf07018c4,	0x4059c66d,	0xd0a259be,	0x436f1d41,
-0x2ad68f7b,	0x06bb476e,	0x8db8294d,	0xc50f5eb3,
-0xb71d28b5,	0x381a0df8,	0xf690b6f1,	0xcbc08020,
-0xf1e69098,	0xbb424bfa,	0x1b74bfa4,	0x2c51dd1c,
-0xb52b4195,	0xad192d71,	0xec1da669,	0x3c93966f,
-0xabab81df,	0x6f5b968e,	0xf170fdc9,	0x0755af35,
-0xc7bf6bec,	0x760ed225,	0x7b7fdedc,	0x54598081,
-0x3e537194,	0x6ecc4255,	0x773d14ba,	0xd2dfe382,
-0x34e94cff,	0x22074f61,	0x75ee7965,	0xd220de84,
-0x032c6593,	0xe375bccd,	0xdb50c167,	0x31a925cf,
-0x4dca17b8,	0xb5f4acc8,	0xb9382557,	0x74de2b3f,
-0x77ecccc1,	0x42d84094,	0xb042f4ab,	0x0b0d19d5,
-0x1d03283a,	0x1c20b9b6,	0xec2db4db,	0x1e90b7ab,
-0x7e6ef7cf,	0x193cbad0,	0x15507944,	0x96a05ff7,
-0xfc634fa6,	0x086aa071,	0x543d4a48,	0xeb25d690,
-0x1af843d0,	0xc4f62d3e,	0xdb5ae34e,	0x1e98338f,
-0xd87d258a,	0xff12601f,	0x48c19218,	0xe4db722e,
-0x218e9377,	0x258c91ec,	0x9cbd58dd,	0x93332ac2,
-0x8a15361a,	0xae807a30,	0x1875bddc,	0x212f38ad,
-0xf60c6c98,	0xce5bdbae,	0x36709283,	0x0e6f5806,
-0xe09d1733,	0x49fea86c,	0x21a34c9c,	0x2e97b2f3,
-0xfe008eb6,	0x4b18fa60,	0xe9989bfb,	0x400fc607,
-0x054d8a62,	0x348c0dd2,	0x85a16292,	0xeb6b16a7,
-0x41c698cd,	0x5fc86abd,	0x48ccdbcc,	0xa02e52a2,
-0x27e186b2,	0x88404198,	0x10fb0972,	0x1a07931d,
-0x53425b21,	0xd8dc8ccd,	0x08a3e7d5,	0xf26a467b,
-0xe24f3c9a,	0xf6eff6c4,	0xa3d0802e,	0x8617af99,
-0xa68d4981,	0x9005a2ff,	0x0999d184,	0x01369b46,
-0xd799a679,	0x64e1fa7a,	0xf0ec5c83,	0x114fd630,
-0x13a8d73a,	0x4515c0f4,	0x465abcd0,	0xdc024d64,
-0x6cc43301,	0xb497574d,	0xaed546f6,	0xef5ae94b,
-0x2fef7571,	0x70defbe0,	0x67847c5f,	0x3fd7e969,
-0x2d5b08f7,	0x0167291c,	0x3d8fbb68,	0x44d83e5a,
-0xae5ea654,	0x78e36f1c,	0x1056ea08,	0xcc791fdc,
-0x72214384,	0xe2037b43,	0xfe2cb96f,	0xaba26e63,
-0x5d9800ff,	0x397fd531,	0xaeaf8537,	0x21872429,
-0x1fae93bf,	0x3fd7906f,	0x34994338,	0x368726ae,
-0x14612ae0,	0x8562d699,	0x688ed9fd,	0x3e0dd4d0,
-0x7ea37322,	0x4da5cb8d,	0xd3ebd8fa,	0x1fbc490e,
-0xf8474471,	0x92cec355,	0xce5e6265,	0x4f099546,
-0xee269914,	0x20232907,	0x2609b2f8,	0x2ade1ead,
-0x972fe2e0,	0x5c57e86f,	0x8cb7c577,	0xfeeae944,
-0x55ca8166,	0x5980457c,	0xc7da1649,	0x11f671c4,
-0xf6fcad24,	0xbb6bedc2,	0x283b6c74,	0x17ec2f39,
-0x773013d5,	0x928c2fa9,	0xcf7b1f8c,	0x4a5d66b5,
-0x92b7cfa2,	0x90813a5d,	0xc9565359,	0x2c8fbbc7,

cpu/intel/model_f4x/microcode-m9df4703.h

diff --git a/cpu/intel/model_f4x/microcode-m9df4703.h b/cpu/intel/model_f4x/microcode-m9df4703.h
deleted file mode 100644
index 4e183ed..0000000
--- a/cpu/intel/model_f4x/microcode-m9df4703.h
+++ /dev/null
@@ -1,227 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  m9df4703.inc  */
-0x00000001,	0x00000003,	0x04212005,	0x00000f47,
-0xaf2cef0d,	0x00000001,	0x0000009d,	0x00000bd0,
-0x00000c00,	0x00000000,	0x00000000,	0x00000000,
-0xc2f82df4,	0xcc1f8c6e,	0x0e8a805d,	0x8e748392,
-0x61d74f4e,	0x45c7e2e6,	0x2a47a317,	0xcc8680ea,
-0x6afb5d2f,	0xe61b30de,	0xccf8ce6c,	0x063cd5a3,
-0x992e1a8e,	0x917e2495,	0x0ec78d26,	0x3b11a087,
-0x5cfd497e,	0x712e7a69,	0x19023605,	0x7e2d5382,
-0x86f0ea44,	0x34c2dfe0,	0x111466d3,	0x1ca2dea9,
-0x2db035cc,	0x0d756649,	0x5d817ad0,	0x8260bfd2,
-0x8af6da2b,	0x6b6e56ed,	0x416d4cec,	0xd46eed66,
-0x46895ede,	0xec4fa389,	0xfb2e5b37,	0x31191653,
-0x899d2459,	0x969ba9a6,	0x2fdbd429,	0x00f926cf,
-0x1763affd,	0x74ea8cf2,	0x52f9e657,	0x4a7b2371,
-0xf5bca7c1,	0x6bcf1744,	0x5d3cb914,	0x5a2c0b69,
-0xd4d6711b,	0x6379e8b7,	0xf7def9d8,	0x88fbde4f,
-0x25c24564,	0x74fad07d,	0x68b6d12d,	0xd81b2962,
-0x5f8114bd,	0x8b8c7590,	0x123f0889,	0x7c350756,
-0x29440cf1,	0xa88333c8,	0x28c0b737,	0x7ea33d12,
-0x9878f652,	0x4f41e6a9,	0x3e109379,	0x5f6af51b,
-0xa3efee81,	0x18934e5c,	0x3bea09c4,	0x04b1f649,
-0x51e21d0b,	0x2cdc6b67,	0xa93ae5f2,	0xc809a230,
-0x93886909,	0x6bf788b9,	0x537391b5,	0xf0d7ef26,
-0x71032e3d,	0xb1ab4d8a,	0x364c1a73,	0x333faac0,
-0xe9ddc147,	0xec43d38a,	0xd69e9a38,	0x77dd0b85,
-0x63798cd3,	0x6ffd694d,	0xbe947f6d,	0x0bd2df58,
-0x3f4be601,	0x29753e63,	0x3f1db162,	0x1fa0bffd,
-0xbd085ff4,	0x1627b890,	0x1f82c7c5,	0xabe18ae5,
-0x6babcabc,	0x046aa047,	0x860ac96e,	0xd957718a,
-0xf6a01a82,	0x827a81e1,	0xa4ffb338,	0x257e2b69,
-0xa2ceba96,	0x91103b49,	0x87a44f56,	0x1cf230a5,
-0x030467ae,	0x2b9476f0,	0x86a60c79,	0x45dca4ba,
-0x8eb41f62,	0x6d006ab5,	0x79274a6a,	0x6de0d4ab,
-0x3310417f,	0x7b8206fa,	0x35e20f1f,	0x0e41b2db,
-0xb877daa8,	0x36be9c48,	0x70e7a9ca,	0x58911f5a,
-0xabd853cb,	0x631286bd,	0x35714af4,	0x3d7eb1d8,
-0x220dea6e,	0x21ed48f8,	0x917d52ab,	0x9cc0abf3,
-0x4a7efd32,	0x7be24674,	0x9132e702,	0xc2b3e4fc,
-0xae649b47,	0xd2caa94d,	0x2cda267e,	0x6e6b04c5,
-0x9a440677,	0xd891c1b4,	0xecd4c280,	0x38b4e552,
-0xd9b5a94b,	0x2a8cd551,	0xdef56497,	0x2a4be3d4,
-0x9595e71f,	0x568721a8,	0x95d7a9fa,	0x51ae4f9f,
-0xd42cda31,	0x2057ce0a,	0xf12c4ad2,	0xd131172f,
-0x799d557e,	0x1f85fb72,	0x1a30f80b,	0xa81945dc,
-0xdcfd4ea8,	0xe501109a,	0x8164abc7,	0x42bc7828,
-0x0514889a,	0xcc4f3d70,	0x8fef5410,	0x01d78e74,
-0xa5563afe,	0x3add8b75,	0xdfd82e52,	0x2022a5fc,
-0xf56d7378,	0x37731dca,	0x4c60bcb6,	0x29170df7,
-0x56c20033,	0x75b62940,	0x7ad58af9,	0xde25154c,
-0x27dfd9ae,	0x208a894c,	0x51e81496,	0xc69d1dfa,
-0x81d27b5c,	0xca12f782,	0xefd7d0b3,	0x3beab01c,
-0xbc0eef39,	0xa5d7f2cf,	0x7dc4d451,	0x7069fb06,
-0x45cb04f0,	0x1b5fc96c,	0x3cfb526c,	0x22495be6,
-0xb0db5a44,	0x6aa6e09e,	0x63cf88c3,	0x44c49559,
-0x2ea01cc0,	0x158d1203,	0xe0c8163a,	0xa076e84e,
-0x873ea544,	0x51013068,	0x90d921df,	0xafb9ec15,
-0x632a74d8,	0x8e870b20,	0x46a34395,	0x74534f55,
-0x4002ac22,	0xbe7dd5b4,	0x913d7ba7,	0x77a0f6e7,
-0xa3776b10,	0x00d73ac2,	0x72ec8ccb,	0x5c65d930,
-0xceabd7df,	0x4586999d,	0xdf9c7e24,	0x1ffb96ff,
-0xa945e189,	0x6f879555,	0x32aba213,	0x5e5f0ee5,
-0x70e43350,	0x647279b7,	0xd4612221,	0x2c266f6c,
-0x8576cd5b,	0x07047e7e,	0x10c377a0,	0x619d63b5,
-0x21577c07,	0x617f97d7,	0xd95ee11f,	0xaf3eaf45,
-0x2ac47d03,	0x5cf0d549,	0xf88a5dc6,	0xde12658e,
-0x3e0fe2b7,	0xa5c883a0,	0x2c7670f8,	0x1ae5adb7,
-0x0f7088ac,	0xeb5d1237,	0x17a2083a,	0x5de19b6e,
-0xdf26bdab,	0x74176916,	0xe05319f2,	0x3d505666,
-0xf7450820,	0x639bbc84,	0xc578452a,	0x4bac0414,
-0x27e5d857,	0x4a7e7aa5,	0x2ece3ca9,	0xddd01d5c,
-0x72909add,	0x32221600,	0x5bc02aa4,	0xe138a34e,
-0xf375796b,	0xe28b23d2,	0xdb427098,	0x5a1f4e73,
-0x33a5905c,	0xcb2b57bb,	0x4c480095,	0x2cd64244,
-0xe924481b,	0x68fa0d30,	0x0a295560,	0x4cadc133,
-0x02ab2b81,	0x493ff0e8,	0x8a905491,	0x5ffabb8c,
-0x3894736b,	0x35ec4d84,	0x0835a1b1,	0x8b02df2c,
-0xab53d500,	0x7582c169,	0x6ae766e1,	0xd75da68c,
-0x14f541de,	0xf74512d5,	0x6e722764,	0x3e9c3d92,
-0xabde8a97,	0x957ab2d8,	0xc6f26229,	0x75fa317f,
-0xb14c870b,	0x7911fe5e,	0x3025fd3b,	0x65bb7420,
-0xb4e1a2cd,	0x0ddc8170,	0xd68102c5,	0x560c25bf,
-0xe54e94b9,	0x1cb3f345,	0x5e0bf4a2,	0x8774fe3e,
-0x392a77de,	0x1ccc14e5,	0xb53b4fdc,	0x8536f959,
-0x72a7db1d,	0x822b6030,	0x17604ab3,	0x6dd9537d,
-0xafe21a4f,	0x93a65eb9,	0x55173802,	0x559cf7a1,
-0xc13c20c1,	0x2909dfe8,	0xbd67d285,	0x2345c952,
-0x62c9eaed,	0x7ad7d3cf,	0x1203b5c0,	0x706ff9f5,
-0xb2e709f5,	0x0176239d,	0x0d1fdb60,	0x86d85cc0,
-0x2000141a,	0x2ae2cda8,	0x668864df,	0x802503c4,
-0xcda13b39,	0xe2a90e69,	0xf7a857de,	0x70cd90f7,
-0x76dfd0bb,	0xef748228,	0x05a80fb5,	0x6c916906,
-0xa186faf5,	0x09b3f6df,	0x07ac9a86,	0x0bc02765,
-0x6ac940c6,	0x6dbe2bdd,	0xd173be7e,	0x5262b01a,
-0x63394c1c,	0x5e9fa5b8,	0x047d32b3,	0xc145798f,
-0x9baf5b51,	0x0611666d,	0x8ef11917,	0xb080c5b5,
-0xa296c219,	0x9d380d47,	0xc8c15757,	0x5d2854a5,
-0x664bea43,	0x9380ae2b,	0x5dbd12fe,	0x75cb9799,
-0x476b278d,	0x051c6fcf,	0x0069c985,	0x4550dc3f,
-0x05917659,	0x1ca91e59,	0x3f9a7668,	0x5e32f534,
-0xf8189e65,	0x49eac6b6,	0x9f05bd02,	0xb4808883,
-0xba55bc74,	0x6da7ad18,	0x5cb8e1be,	0xbd451bf7,
-0x488cb3a6,	0xbc90c9cd,	0x264679a2,	0x59dd789f,
-0x12811426,	0x81c3cd79,	0xf39e8dca,	0x33b6fc1c,
-0x200eb4e5,	0x1b0dc455,	0xa5cd6307,	0x469cb2b9,
-0x5918074d,	0x53202e4a,	0x271c8b79,	0x5c05a629,
-0x645c0d01,	0x056c2d2f,	0x91850195,	0x9b95d3f2,
-0xfe760e19,	0x131ea846,	0x5f02fda1,	0xbee758d8,
-0xea1b1a1c,	0x9c0847d1,	0xfe534f41,	0x34a6bc3f,
-0x782a53ba,	0xeb118177,	0x0231026f,	0x7c181da4,
-0xba99d566,	0x63b3e9e7,	0x47d37a5d,	0x0a3dffd8,
-0x479e6773,	0x5e6da4f4,	0x1d354ecd,	0x742eb5b2,
-0x33027d7d,	0x078f2b38,	0x56bbae65,	0xcae0a598,
-0x303ffa02,	0x665b0971,	0x6d32d6ff,	0xe5581657,
-0xc003279b,	0xfc4e6ba9,	0xe3567dde,	0x37afd1c9,
-0x8e928c52,	0x8db2e4b7,	0xad0eb068,	0x19258691,
-0xae5c03a2,	0x468a97cf,	0x8cda06d3,	0x2263dcff,
-0xaed65f19,	0x05b00086,	0x5a9e6281,	0x43b65e6c,
-0x7eaa6443,	0x31bab45c,	0x51a9c54c,	0xde8ae47b,
-0xd60a95cc,	0x1ba74a4c,	0x330827b2,	0x9b8df9ef,
-0x0e74dd2f,	0xd6c9e271,	0xd0b77195,	0x10f6ff80,
-0xf5b229c6,	0xc0fbf468,	0xdd616994,	0x35730277,
-0x838da982,	0x28349728,	0x7b3a8b72,	0x2a4e3942,
-0x04e3d703,	0x18684df3,	0x66ada9af,	0x52caad42,
-0x3fab8e47,	0x7bfce626,	0xe231de2b,	0x8d48cca0,
-0xa33962ca,	0x22261b94,	0xc9521872,	0xa7119363,
-0x547d93b0,	0x916d5807,	0x1b28e860,	0x1bedc9d8,
-0x50eb8ae2,	0xa1f78b7d,	0x93ec5d30,	0x99d0907a,
-0x5d4eb7e9,	0x5bff668f,	0xbed1cddd,	0xd6855c2f,
-0x080d4077,	0x9380ed95,	0x44fa1c58,	0x5bc86778,
-0xe4043eb3,	0xdf55407e,	0x1a2ccc36,	0x0c237745,
-0x951f59f9,	0x4c7c0e1d,	0x194bc507,	0x30047f1f,
-0x4be6bdfe,	0x3cb966b2,	0x4c4a97e8,	0x3e2feeab,
-0x5307c0ab,	0x6ce6928b,	0x2ef9433a,	0x889f8123,
-0xd1714dde,	0x0ee72b88,	0xfa057aa1,	0xb464b160,
-0xa01557ea,	0xbad0c31d,	0x86525519,	0x2626f1f7,
-0x4562675a,	0x925acdfe,	0xd4056b9c,	0x7832aab9,
-0xe15d9036,	0x70a863f9,	0xb5c05434,	0x56f0cb29,
-0x97bf53c5,	0x59d22ae8,	0x8ecf3e47,	0x0ea14042,
-0x4e9d7953,	0x6c3ac3af,	0x6b977cd4,	0xb4dc2fed,
-0xe3b10fef,	0x01f5954b,	0x53ca7180,	0xe42e8969,
-0xc150f227,	0xddf3c2f5,	0x5717f20e,	0x4ce5c5bc,
-0xaf864cae,	0xf9707380,	0x91d63485,	0x41bcc1a2,
-0x8abc0fff,	0x47f402e2,	0x3453acaf,	0x1a597f26,
-0xa4f77d5b,	0x48c64ce0,	0xb57fe88b,	0x4a3388b1,
-0x1de5a08d,	0x698f102c,	0x3d623ff7,	0xcfb6d7a6,
-0x36fd6bc1,	0x55aaeef4,	0x7f080d25,	0xfd60d0e3,
-0x460e89e4,	0xe149cd04,	0xd0f2e68e,	0x5b11fd91,
-0xfb4754ee,	0x8251d89a,	0xe653ecb7,	0x1a1169e0,
-0x1f6bc908,	0x17776d46,	0x4d6fa5ff,	0x5185c78a,
-0xbcd18053,	0x79f86716,	0x77147b1d,	0x303ca9be,
-0xd93aaff0,	0x6d9ffa8d,	0x6abeb7e8,	0xa6bce101,
-0x5a80c655,	0x2ad2b1ac,	0x1c082a07,	0xf0e16482,
-0xb4281f26,	0xbb1705e5,	0x0fee4e39,	0x0c17e5d0,
-0x001cb676,	0x8e3a01d9,	0xc4f29c4e,	0x05c73985,
-0x577acdfd,	0x2cb58a4f,	0x05d90b10,	0x0283e303,
-0xc2037211,	0x15d23cb9,	0x7379a799,	0x10475d7d,
-0x3dc893c3,	0x69964151,	0x52640806,	0xcdae2c07,
-0xa6af8fb6,	0x3db5db62,	0xd1a330b8,	0x9be6acf7,
-0x1b5692a9,	0x91effac3,	0x688e31ad,	0x4b9fafd6,
-0x483f04b9,	0xad090032,	0x2756e97d,	0x7e23afd7,
-0x34c133a7,	0x164e116f,	0xcdddeb7b,	0x28d7274d,
-0x1aeb0c24,	0x76de689c,	0x88bc316b,	0x0ee3443f,
-0x893a815b,	0x4e29f2f7,	0x191cb965,	0x7470aec7,
-0x9d224d59,	0x22ebab10,	0xc313cad4,	0x1b82cf6b,
-0xb490c745,	0x1f0a25a8,	0x2f89f1da,	0x1c763d3f,
-0xad474ebb,	0x7e4deb59,	0xbf7b9fd2,	0xd47046c0,
-0x30455625,	0x3a6c1a46,	0xdea1acb8,	0xe6430489,
-0x6646ba4c,	0xb7da15cb,	0x37037c35,	0x7864c5f0,
-0x82728ed2,	0xc9c68066,	0x8fa79986,	0x2ac1c078,
-0xaa1796d9,	0xb2808f42,	0xdcaf399a,	0xf0785363,
-0xa239879a,	0x64a16b18,	0x5729e475,	0x32051219,
-0x7065be03,	0x3a312c5d,	0xf88668bd,	0x9dd1cde3,
-0x92553032,	0x499e54a6,	0x039d24ea,	0xbedcdc89,
-0x655f04e7,	0x3ff657e3,	0x2315ff30,	0xbb4f4ca1,
-0xd8904f24,	0xf2640f41,	0xda3b34a5,	0x0039fca2,
-0xc4a898ff,	0x1ed56af7,	0x3b457066,	0xaaad566b,
-0xc4eb0098,	0x0e9f91a6,	0x4ab60ce9,	0xe0482f06,
-0xee8b5568,	0x33aa937d,	0x379c5095,	0x250e0ec2,
-0xd8123a70,	0x1c3671e7,	0xb2cb87b1,	0x3600b645,
-0xd86442ba,	0x885fae6e,	0x02ab043b,	0xf5e2f4d2,
-0xbd49b714,	0x9124831e,	0x5ff321bc,	0x650b8a2f,
-0x38e50349,	0xd050c275,	0xe41b375c,	0x529db8e8,
-0xdd18dc07,	0xbf9738ab,	0x8a4666d0,	0x649ef5f7,
-0x22ace388,	0x062d548c,	0xcf5e83d1,	0x84384bcf,
-0xfcdb8f55,	0xe2c8ca9c,	0xa31e2bc3,	0x25c542a6,
-0xbd118909,	0xc4d68602,	0x1a34f2fa,	0xde180728,
-0xf068bc08,	0x631e3f3e,	0x4b0cbcab,	0xfdfa5fe5,
-0x0b3b6fe4,	0xe70ba1a3,	0xaeb907c2,	0xeabde1c8,
-0x79d9861f,	0xef5c84e7,	0x9ca6e94a,	0x557f9027,
-0x57766a22,	0x2a9c23fa,	0x92a922de,	0xdda1883b,
-0xba13c759,	0x9a138b55,	0x8f06e35e,	0xc64618ee,
-0xd35f1d08,	0xaa95b6f1,	0x947084cd,	0x4a5ac647,

cpu/intel/model_f4x/microcode-mbdf4117.h

diff --git a/cpu/intel/model_f4x/microcode-mbdf4117.h b/cpu/intel/model_f4x/microcode-mbdf4117.h
deleted file mode 100644
index 449c903..0000000
--- a/cpu/intel/model_f4x/microcode-mbdf4117.h
+++ /dev/null
@@ -1,355 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  mbdf4117.inc  */
-0x00000001,	0x00000017,	0x04222005,	0x00000f41,
-0x326135c1,	0x00000001,	0x000000bd,	0x000013d0,
-0x00001400,	0x00000000,	0x00000000,	0x00000000,
-0x23869663,	0x00e8d132,	0xdfe7a33e,	0x20662972,
-0x6cd78e27,	0xd40cd9d0,	0x1779cf53,	0xda1410b4,
-0x3a7e01d2,	0x2610ad09,	0x466805b1,	0x4f83bde3,
-0x0089c4df,	0x414d55d6,	0xc1a55777,	0x15397290,
-0xbe73c0c1,	0xcd711d83,	0x9582e3fb,	0x4252d42b,
-0x07bc38ee,	0x57e59d01,	0x04340908,	0x0e7ff2de,
-0x73799873,	0xeebd252e,	0x26f35c02,	0x17d52208,
-0x2894111c,	0x02d6a971,	0x0dc494d1,	0xc5d1d4dd,
-0x893e98db,	0x0b2bb463,	0x209dcc8f,	0xe3a0bcb4,
-0x3987884b,	0x4e83a501,	0x10c4fccc,	0x33523a90,
-0x5e38588e,	0x741f7b18,	0x7bef6e37,	0x977ba083,
-0xcc550f6b,	0x3c7b4752,	0x69965735,	0xc2a368ff,
-0xeb8a4b75,	0xc28e6d6a,	0xc08bbd99,	0xb3188777,
-0x24132a22,	0x9a9f1f71,	0xfeab84ae,	0xc1cdb604,
-0x6f92eb4d,	0x3085955a,	0x1a7c51b4,	0x3193aedf,
-0xd0fdb9c9,	0x8f858301,	0x048559dd,	0xffebc1ed,
-0xdb71cba7,	0xa1df624b,	0x3c62de85,	0x7a086a76,
-0xa1472fba,	0xce1e2869,	0x27a2565c,	0x419dc5fc,
-0x501d9451,	0x03246b66,	0x210061b1,	0x0348d26b,
-0x2a3802bb,	0x351f903b,	0x968b209e,	0x12dbeeaa,
-0xdb1205b6,	0x5332993e,	0x280dff0f,	0x9147408e,
-0x807cf7cc,	0xd6ed0e2e,	0x4a073f0f,	0x24432e3c,
-0xf449f9b9,	0xc1ecf004,	0xa231f7fe,	0x15e6d179,
-0x44971caf,	0xdc68da09,	0x0facd5af,	0x80161743,
-0x9f675525,	0x30aa65e9,	0x7de3e032,	0x0018a0fc,
-0x7236ffda,	0x4f6d6cae,	0x5c9af30d,	0x0552799d,
-0xfa729385,	0x71947988,	0xb8aec61f,	0xba7e2e2b,
-0x7e65c8e1,	0x6016f7ee,	0xbbbfa2ea,	0x59898d30,
-0xcd0ac559,	0x8527d33c,	0xaf9a15e7,	0xae9b044b,
-0x4ce02b95,	0xe299e65e,	0xf30b8fb3,	0x4d18b4b7,
-0x6783a7d3,	0xa0c9955b,	0x52ad0b6e,	0xb78b3173,
-0x24b4b551,	0x9a291645,	0x19d57d22,	0xbae5c7ae,
-0xe82e6e2d,	0xe10be39c,	0xc2d26e7b,	0xb26b1e8d,
-0x97471f7d,	0x5f405fa3,	0x658987f9,	0x8a90f2aa,
-0x5dc6c0b5,	0xfd9b5b1a,	0x3d432314,	0x48ce4ea8,
-0x26d0097f,	0xcdcecc97,	0xd0a0eea3,	0x5f0690e5,
-0xf40dd231,	0xa3c71707,	0x00059355,	0xcb0badb2,
-0x23fb63f1,	0xa10bec29,	0x9fdb03ae,	0x1f85dc9f,
-0x3cec03e9,	0x0377e06f,	0xf256e7ad,	0x1a2db020,
-0xae97d2f4,	0xb20c0106,	0xdcb02aa6,	0x486feece,
-0x29487f07,	0x0c934081,	0x820aae29,	0x05405e2f,
-0x34a068da,	0xde1c956d,	0x931b128d,	0xbec61127,
-0xb89b8162,	0xf4adcd12,	0xdb3452e5,	0xfaf11e6e,
-0x4ef489bb,	0xb9048451,	0xa8d986ab,	0x283aa33e,
-0xb8f607d9,	0xcecc2f8f,	0x8b669cd4,	0x5de9d03a,
-0xd809a9de,	0xe6ca7747,	0x0b0c9e20,	0x04199433,
-0x4e2f4502,	0x1c68f178,	0xbbb8bc13,	0x1390c017,
-0x5dd0c688,	0x45211e3b,	0xd20bf653,	0x58e4567d,
-0x330f3b7d,	0xf4f1b03c,	0xfbdb0014,	0x95883876,
-0xf811c78f,	0x30feceba,	0x6a822ece,	0x0c1f28a6,
-0x21e86bf4,	0xa91ca6f1,	0x06a534ef,	0x4fa941d5,
-0xa1e22f33,	0xa4438b88,	0xa0313dbc,	0x38ac3733,
-0x5e772ea0,	0xb319576d,	0xeeac02b5,	0x590c55ce,
-0x963f15e1,	0x77281f33,	0xd59ce20b,	0x5319c529,
-0xa5ac445f,	0x084980f5,	0xa6476003,	0x59d085ca,
-0x08f98cae,	0x7738f971,	0x01fa8642,	0x91576241,
-0xdf826f04,	0x5b0ac434,	0xb05daac7,	0xcc4c8a31,
-0x7dffeb94,	0xcbc8da3f,	0x6b27c0bb,	0x429855d4,
-0x2fc6593e,	0x0b098e3d,	0x4b356bc8,	0x1e7122c2,
-0x0bafd085,	0x9b2e343c,	0x24259ddb,	0x27335804,
-0xa4cc06ea,	0xe7e99bb6,	0x093a860d,	0x3bb00ca0,
-0xdfbb59d3,	0xc7375b12,	0x3e1afd3d,	0x21e34603,
-0x392dabfd,	0x99caf016,	0x9c95d368,	0x117bea69,
-0x900c4a4f,	0x8a1b3c5d,	0x7220d03b,	0x1f721f5f,
-0xa31174b4,	0x32a2133c,	0xfb6e3be7,	0xe835f4a6,
-0x8e09663f,	0x45b64191,	0x852dd810,	0x494e3205,
-0xdf51bc7a,	0x35b9e273,	0xad98417b,	0x09fd7867,
-0xe2c9824a,	0xe3b21ebf,	0xc99982ac,	0xcbe639d7,
-0x7811c1ff,	0xe1db9878,	0x0fe74cfc,	0x94576c2e,
-0xb719ca45,	0xe0960f65,	0x4e421a9d,	0x9c6b061c,
-0xabde24d7,	0x0fef5a7e,	0x11544d8d,	0xed6f9b35,
-0x8a612f0f,	0x3f5bd220,	0xf8bcfcd9,	0xa8b85029,
-0x8ce1adc1,	0x8f4f2a35,	0xa4bc2c91,	0x29effaa4,
-0xe7ca6c38,	0x89687497,	0xd76c755e,	0x6abacc63,
-0x18f95328,	0x084d2732,	0x2b99c8b5,	0xa5cc679c,
-0x7b39f528,	0xf6d22d1a,	0xe282cff1,	0x4f84e4a4,
-0x44adb6e4,	0xde9b104c,	0x79df1974,	0x9c08a94b,
-0x29b676df,	0x42a9c9eb,	0x93d86764,	0xf4db50c6,
-0x3b22b62f,	0xabe76510,	0x92fc7279,	0x0e65b57e,
-0x53c0ad78,	0x77181939,	0x059de191,	0x0fe04ba5,
-0x83407676,	0x2ec98625,	0x7b16e66a,	0xe760fe12,
-0x4a5ad3dd,	0x5fe3dfe1,	0x9799dfd6,	0x2453a5d6,
-0x2b3c15e0,	0xa00b7248,	0x4caf83aa,	0xd56333f4,
-0x3b28e188,	0x5fec6905,	0x5602272c,	0x11a880a3,
-0xd863707d,	0xe13d30b9,	0x3fac9971,	0x03974a6d,
-0x16a977a8,	0xa29ab4ff,	0xbcbca489,	0xcb80d6e8,
-0xaac55951,	0x04df40a2,	0x778f6d2a,	0xfb71f60f,
-0x97cf473c,	0x6f11ce3e,	0x81657389,	0xe8393417,
-0xe9a71afc,	0x7191f0da,	0x956af1dd,	0x5f354bdf,
-0x37e3ad81,	0x633eca08,	0x612c1de6,	0x6e5f888a,
-0x42f19871,	0x4d4804d5,	0x4c3c7e51,	0x66f1c539,
-0x85917f9f,	0x6f602a12,	0xb762f892,	0xb58fde66,
-0x95698716,	0x7bd33b3a,	0x71a0136b,	0x828d78eb,
-0x1b364f9d,	0xae6ae3e9,	0xa689ef5d,	0x814c6105,
-0xd5bc7ba6,	0x57188df0,	0xe7ee2de3,	0x1070ad06,
-0xf19f135c,	0x7a1cf2f7,	0x095d27c8,	0x13adaf91,
-0x7310274a,	0x61729379,	0x40c1410e,	0x7a04fc6c,
-0x2dc6062d,	0x24454bb5,	0xd70f2135,	0xb132a185,
-0xeff2dbe2,	0x343ca212,	0x20089805,	0xbd50064d,
-0x9475a4ea,	0xb501a35a,	0x9ed4e634,	0x54e7868b,
-0x1452657b,	0xa1d55fe2,	0x5d45664c,	0x1f92f7dd,
-0xcd2ee2b2,	0x72810ade,	0xacd6981c,	0x74d97c68,
-0xc6197d01,	0xc1d7d1b5,	0x1b889832,	0x00377dc1,
-0x35dcb606,	0xbc3a6152,	0x5556fd42,	0x3b396140,
-0x069370e1,	0xf97b8f48,	0xd8561936,	0xee9aef0e,
-0xec80b07d,	0xc280b8c2,	0xc42f9d65,	0x40c3cd24,
-0x7accc51d,	0xf5e22954,	0x5bf9b798,	0x8f5b4d13,
-0x74c3977c,	0xa243da07,	0x244dcc57,	0x977fec01,
-0x12bf785c,	0x04b643f3,	0xbb211a93,	0xa0764ff7,
-0x14101e55,	0x7f3da5e2,	0xb0b46e28,	0xdb616566,
-0x70c0e0ed,	0x4565f1e2,	0x1767f652,	0x213f966f,
-0x754d4868,	0xea9172e8,	0x8ad24070,	0x9b7737f9,
-0xa57de77d,	0x6de0b195,	0x7ffa9709,	0x56255daf,
-0x85a3d4c4,	0xdc1ab1d9,	0xfbc7e65c,	0x69ea2ea0,
-0xef496f2b,	0xc8f74d6a,	0x0649b66c,	0x28d5eb58,
-0xb44d4758,	0x0e6aae11,	0xd400b41f,	0xc7273115,
-0x7e0d9a8d,	0xebfb62e1,	0x70ba546f,	0xef81f10e,
-0x807f730d,	0x9c73c748,	0x37a1c985,	0xa2b4aa04,
-0x2e932351,	0x5cd11c91,	0xc2b6535a,	0x622288f0,
-0xd6b63e54,	0x9f6d5906,	0xa4c82f56,	0x8ce3e118,
-0x26b47bbf,	0xf936e888,	0x3c4474fa,	0xb4211d0d,
-0x5c2ec780,	0x0557c1a0,	0xfb935e8d,	0x08d27a00,
-0x962e7dd0,	0x0867960e,	0xdd1e3553,	0x3b9b9682,
-0x441a234d,	0xdf94804c,	0xe97e180e,	0xad7ae7b0,
-0x4afc08e6,	0x589c6b7b,	0x82ed0c1a,	0xffa3707d,
-0xfc2b487f,	0x7a73bfcc,	0xba9f22b6,	0xae7fa5d6,
-0x1eb7c8bc,	0x10642385,	0xe8f51462,	0x09b7d40c,
-0x40d7818c,	0xe740cf46,	0x55b0c2f3,	0x5b82bfd6,
-0x8449a7d9,	0x5a1848db,	0x77c228ec,	0x7d78b419,
-0x460e05b6,	0x45077372,	0x1e134121,	0xc37451fc,
-0xcd734d9c,	0x2596fced,	0xd00922e1,	0xabaca36d,
-0x76ae1209,	0x2be64d6c,	0x2ba81270,	0xd0845d0b,
-0xa9297e7d,	0x8842f686,	0x428eb289,	0x56472cdd,
-0xe61e1789,	0x26980ff2,	0xf44f3dd6,	0x7efa0c9a,
-0x669de28c,	0xef70aa5a,	0xf841c6ec,	0x46c4bc78,
-0xf813386c,	0x75043cc9,	0xd1817d6a,	0x4788bcf6,
-0x97aee340,	0xc1ffa0ba,	0x4fbda2cd,	0xa937850a,
-0x08a6d5b6,	0xa65b0ac8,	0x85647fd1,	0x947e8577,
-0x4d348f3e,	0xfedf809f,	0xf997c620,	0xfb02f089,
-0xac7f842c,	0x7b149778,	0x119dcb7e,	0xa5906986,
-0xc87563c7,	0xa83e6971,	0x02de6124,	0xe070678f,
-0x80662c65,	0xb004287f,	0xdb531a75,	0x4b2c5dc1,
-0x5b3648e1,	0xfe64276f,	0x909e6930,	0xb3fa82ab,
-0xfc336690,	0xac665252,	0x37728038,	0xd96c32ba,
-0xa9ac3198,	0xaefbed90,	0x44742af3,	0x32a4b131,
-0x357b46bc,	0x2262bdfd,	0x4a9068c6,	0x8aa11f53,
-0xa4a86547,	0xb484cc27,	0x34779665,	0xe3655ad9,
-0xd0255644,	0xf14cb46a,	0x090b0aa4,	0xd84210ca,
-0xe59b6bf7,	0x8a80142c,	0x4df8652f,	0x1ab22298,
-0x993cdbc5,	0xd3a43828,	0x980636e6,	0x132d53cf,
-0x84477fc4,	0x95e84ad4,	0xa04cb613,	0x5bfd0eb6,
-0xd53f46b9,	0xe7b3e64a,	0xeab5fce8,	0xcf4106de,
-0x2f0464fe,	0x941887f2,	0xd7ab411d,	0xbcd268b1,
-0x6494d150,	0x54eca2b6,	0xdef87a80,	0x7bc5ad6e,
-0xde75507e,	0x10f4ee75,	0x295d3e70,	0xb021f568,
-0x5b3b7a6a,	0xa18e69c5,	0x8014d58e,	0xa1d847ba,
-0x7ea65405,	0x472469c2,	0x1d438800,	0x6a58e959,
-0x4a4343d3,	0x9bcfc24a,	0xdb4515d0,	0xc9803b9b,
-0xa0c781ba,	0x97425f38,	0x0e9fed84,	0xbddbb90c,
-0xf4242ae4,	0x039500ee,	0x99976b17,	0x714d0fb9,
-0x85181429,	0x4e22a22f,	0x4165f667,	0xb45a6de5,
-0x34967e7a,	0x9bbf9e9e,	0x28b027fd,	0x2780aeff,
-0x6ec6c288,	0xcd1d011d,	0x0c88c54f,	0xbd0bfb5c,
-0xd40b63f4,	0xb5c783da,	0xa4b39929,	0x6cbb4a21,
-0xa2c2c897,	0x86703c38,	0x15408e1c,	0x133ad235,
-0xf51d1371,	0x848bcdde,	0x9b7eecb5,	0xba2ca677,
-0x39871164,	0x7065d811,	0x5dd770e7,	0x5a732dbe,
-0x58e6461b,	0x2a2c51b9,	0x703062a9,	0x545ae881,
-0x0860f6f3,	0xc7e29228,	0x9fc59c61,	0x881ebef3,
-0xab2a061f,	0x82b3a4d5,	0xe799e152,	0xd618faba,
-0x6c2e4d18,	0xe4611bce,	0x5587717e,	0xfcc0cb92,
-0xa6207512,	0xf2ff1ffa,	0xba269d1f,	0xc1879edf,
-0x38359369,	0xcb684db0,	0xa773b9e0,	0xb57257ed,
-0x587b4b47,	0x6e151398,	0x2667424a,	0x261a6a40,
-0xffe3291c,	0xea0b7369,	0x70ac567e,	0xb39b49b1,
-0x725a77ca,	0x2507206c,	0xc8ea7a60,	0x5dd5ec2d,
-0xfb5ce938,	0x987b290e,	0xce6147b6,	0xf34a8acd,
-0x125328ac,	0x94866e32,	0x4ad59e55,	0x8a0b7aad,
-0x45658446,	0xb4f695f0,	0x189a0160,	0x38b762ce,
-0xf643a8a6,	0x657d6d88,	0x2441f0a7,	0x88653b45,
-0xa28826fb,	0x975c1e93,	0xb5aabf28,	0x53f9c1ce,
-0x36ece683,	0x0f67fbbe,	0xb4ea726c,	0x86e0f6bb,
-0xd8f360f1,	0xdb0e2f10,	0x14e46bd8,	0xd0883022,
-0x6ab0f8ca,	0xa99711d7,	0x4a9451c9,	0xef26029d,
-0x7cd5ecea,	0x593f2587,	0xa39b410f,	0xcc3632f2,
-0xd03d3ef3,	0x237eb7c5,	0x3a657ab4,	0xfc573ed6,
-0x9dfb6f5f,	0x5b710f01,	0x551566bc,	0x1eccdcfb,
-0x3d07c680,	0x438b4075,	0x4bb302d2,	0xa90659bd,
-0xe642c00f,	0xdc7e938a,	0xcc399534,	0x52f2e704,
-0x4420520c,	0x19f02d49,	0x9e2d5d8a,	0xb4c3fbaf,
-0x29ae6509,	0xae021764,	0x832077fa,	0x71d419bb,
-0xa746b3b2,	0x76362de8,	0x41bd6436,	0x08056245,
-0xc0d11c06,	0x644228e2,	0x205f55f6,	0xc40d4159,
-0xb8b2df85,	0x2d734c2c,	0x0ec55443,	0x02d288c1,
-0x927d91a0,	0x1e627cd2,	0xca3a1913,	0x8f42cfc1,
-0xedf0d71d,	0xea9fc128,	0x0db7f256,	0xf03eba20,
-0x176357e1,	0x98163efd,	0xd6031ee2,	0x4b41108e,
-0xf99f6036,	0x9ea730af,	0x82a1dd96,	0x1991bd12,
-0x1aceee34,	0x63668a06,	0x4c0ad9b4,	0x31386049,
-0x931f18d1,	0x0fe7c51e,	0xa4865238,	0xed7c8953,
-0xb5718a5c,	0x5092df33,	0x006c9d17,	0x405bf78b,
-0x522c1765,	0xd849eb2b,	0x4d50ddfb,	0x90e2514a,
-0xd7a1e43f,	0xda6ea0d4,	0xf22b2b11,	0x63b6df32,
-0x85e1f6c7,	0xd1365d03,	0x6ac62a81,	0x92693068,
-0x56ef2428,	0x49016a53,	0xf752d088,	0x128bc866,
-0xf823c05b,	0x6d8ad85a,	0x47f92649,	0x765b66db,
-0x7b14fe51,	0x01edf60a,	0x54410699,	0xc9cc530d,
-0x275fc862,	0x278f39e1,	0x3fc980a2,	0x475f079e,
-0xa53c5026,	0x3fe3b777,	0xc8f92b5c,	0xddfe54d6,
-0xdb13146f,	0xde1a74f7,	0x7e2e8043,	0x5fb7ff54,
-0xe2cbe801,	0x4c50f3af,	0x0ffaeed1,	0x025b1fce,
-0x2273faf1,	0xc8955ff7,	0xe5068c37,	0x42f6c6cc,
-0xefed1e37,	0xc4e66e60,	0xc4a6eb63,	0x59078dc6,
-0x9529dfe9,	0x81abad48,	0xa2eeee30,	0x718d1194,
-0x9023695e,	0xbfcee06c,	0xeccca3f7,	0xa051fdd5,
-0xe91f7002,	0xba818c9d,	0x7bda4201,	0x73e5a202,
-0xa9042251,	0xe4106c9c,	0x1ff5133e,	0x36d74e84,
-0x38063048,	0xa2804700,	0x27c20e05,	0x5e20cd58,
-0x1539dfa1,	0xfa08d141,	0xc2215a49,	0x74f30566,
-0xb4ff34e5,	0x99873de9,	0x7599b6a8,	0xbbd40d02,
-0xd9ab39dc,	0xa7551850,	0x37436dab,	0xed55d20c,
-0x3f4f0041,	0xf0ff7466,	0xf7e67c8d,	0xb1406f22,
-0x4e43c13d,	0xb52500e5,	0x985ad53f,	0xa4b3825c,
-0xde2b9106,	0x365dcbc1,	0x77014217,	0x169c12d3,
-0xc7bc869d,	0x922a8043,	0xa6111e23,	0xe74b2290,
-0xa3e2410c,	0x33422d46,	0xe1dacff9,	0x3c979ea7,
-0x3697c0cf,	0x96c88610,	0x1832e947,	0x7f4d65ce,
-0x2cd5ed28,	0x0c1cc240,	0xf61265fd,	0xa64afca8,
-0xe4860c99,	0xa43857cc,	0x616e9a5c,	0x9365866a,
-0xa5549228,	0x20aa24ab,	0xd7bb6e6f,	0x9dbb3e25,
-0xf01b507f,	0xe9b649de,	0xd84e3324,	0x6424df6e,
-0x77bbcd8d,	0x45d9deca,	0x281c8229,	0xe603463f,
-0xd585f541,	0xbf51f6dd,	0x3e3aa065,	0x12635f25,
-0xfe224cfe,	0x0385cf5d,	0x4efe873a,	0x18da5b1d,
-0x0bcdeb2b,	0x8a59c122,	0xf2593715,	0xdc22685c,
-0x2c38f3ca,	0xc0b46ae2,	0xf5f103ac,	0xd17462a6,
-0xb9d9ee2a,	0xb40e6d75,	0x9d355887,	0x0099c8ff,
-0x06b6f634,	0xe4dc43d0,	0x2623a7dd,	0x34b9ad51,
-0x718107ce,	0x8ad0b008,	0xe69e21da,	0xc1d47860,
-0xb444246e,	0x2abb0323,	0x43ea237b,	0x170bf5dd,
-0xeba9eead,	0x28d02fd5,	0x7b4f22d0,	0x51d4728a,
-0xa9954103,	0x04b9cd77,	0xa72da2bb,	0x74330b0f,
-0x56c741c4,	0x039c62f4,	0x3c665ea3,	0x047b5cc8,
-0x64a59471,	0xe9281c9d,	0x894b630a,	0x793e34eb,
-0x68d7df44,	0xc94404ca,	0x1856ad8b,	0x18f3f6de,
-0xdc902798,	0xc3814844,	0xa9e068f3,	0x6769998d,
-0xf12a4119,	0x909a97ff,	0x842432ec,	0x08aa7af1,
-0x8858e492,	0x4ada49fc,	0x178f173a,	0x5991554a,
-0x9c907487,	0x55b1c638,	0x72a1a06a,	0x19980cbc,
-0x65ddcaa9,	0x260703b5,	0x8c60404e,	0xdc4402c8,
-0x83977bda,	0x1031a065,	0x5d3a24a8,	0x8861eba0,
-0xc09e3951,	0xbd631bdc,	0xd7282286,	0xe32380c8,
-0x50b2f198,	0x4def47b8,	0xf94a521a,	0x8f9a8a29,
-0x1a7e6413,	0xa2302de3,	0x7348be92,	0x3857be1c,
-0xf54dd509,	0x61411ab0,	0x35b34232,	0xdac05cb4,
-0x5d9b0a8e,	0xde69a9bf,	0xbeea5edf,	0x34040ad9,
-0xa115587c,	0xbb18d1c7,	0xd07a996d,	0x80289a3b,
-0x0fd58e87,	0x4e6aff16,	0x47ae69c0,	0x87e6328a,
-0x87adc8ab,	0xaffde7c4,	0xada1fe8d,	0xf7a299d6,
-0xe69bb375,	0x36f49809,	0x66c2f884,	0x4a8aedd4,
-0xc7fd1fb9,	0x01c499c7,	0x2faa2ff4,	0xe821423c,
-0xcb6bb413,	0x90fde54d,	0xf09ee30c,	0xa72913bd,
-0x16b07378,	0xccf225f1,	0xebb20fde,	0xb0524d99,
-0x1b9faf3b,	0x10122a9c,	0x2ecdff53,	0x993fd223,
-0xe6fbdf1f,	0xaaa23e5b,	0x5629d1c7,	0x134f537a,
-0x51323cd1,	0x67f4e421,	0x8d1dd2b8,	0x6be7a601,
-0xa658f134,	0x00cb82da,	0xfbb719d2,	0xa9d91f11,
-0x3fe4a8e7,	0x71887197,	0xd77f5c3d,	0x53c80ad9,
-0x0b6045f4,	0x1d4cac3a,	0xa3c6608d,	0x47be3319,
-0x5f3aae36,	0x378b6c69,	0x89d8d004,	0xdbf1a13e,
-0xdb25ebe5,	0xa386553a,	0xe5ebc1e7,	0xd8151054,
-0xbb0b9127,	0x63685e1b,	0x9356bef2,	0x6c945f61,
-0x6cf55ba4,	0x00db0365,	0x15a63c01,	0x787dcafe,
-0x43d75560,	0xd86eed95,	0x448bc692,	0xb1d487c1,
-0x320edd3b,	0xa3510418,	0x1adee6c4,	0x6ea34c19,
-0x0bdfa30f,	0x30c0f341,	0x01ff2f2f,	0xc356cdfb,
-0x0e6ff905,	0x9b4d411f,	0xa15429f7,	0xeee0f2cd,
-0xfb6b526e,	0xdb6d9e90,	0x10226e12,	0xc5238a39,
-0xb40f0884,	0x11a91802,	0x7f1636a0,	0xba658b3a,
-0x68a9c80b,	0x3f2316c8,	0xfb8fb0a6,	0xe7c33636,
-0xcbc8d632,	0xf058c218,	0x6c2b7525,	0x3ca42916,
-0x39099c3a,	0x1321f3e5,	0x9e0e6344,	0xaa75d386,
-0xe28b580d,	0x0bdb47fd,	0xd8e31aa9,	0xd8b4b204,
-0x388f1bff,	0xb92772a8,	0x2350fe36,	0xd105108e,
-0x2d322d69,	0x9661e811,	0x46a855fe,	0xe2507c81,
-0x168b0831,	0x6bbe4600,	0xe5ab19c9,	0x6e8cb822,
-0xe6ce419a,	0x7b055119,	0xf1c9b63b,	0xca49b674,
-0x95932012,	0x3e533453,	0xb0c6cb70,	0x94d7fd13,
-0x23635019,	0xdd58d8ac,	0xaa9cf0c3,	0x455bef11,
-0xc1ef00cd,	0x7c92a95b,	0x8252da9f,	0xe63bac5c,
-0x6761159c,	0xaa67963b,	0x7c25cfd1,	0xebd59104,
-0x71967969,	0x32a90da2,	0x37d83045,	0x77041b1a,
-0x0e9e3947,	0xab904b5e,	0x6580a40e,	0xe199dd34,
-0x7f9bb7fa,	0x39aab849,	0x036ad852,	0xb7d2af89,
-0xc5ab8c67,	0xe52885df,	0x9c816e4d,	0xb4a6bb8f,
-0x2e4b0685,	0x09eeedca,	0x3d89a745,	0xc49c8e42,
-0x470628f0,	0x3845dc7f,	0x0ebbe8b4,	0xb2ca084e,
-0xafc2b33b,	0x2b29a5ac,	0x33c2057a,	0xb0aaa36e,
-0xdbaaed25,	0xb3f80759,	0x66dd388a,	0x1c05fc93,
-0x0707a813,	0xd6d8ae75,	0x86fbdceb,	0x088f91db,
-0xb802193c,	0xf983a7d9,	0x9b3b33ed,	0x2d8672e0,
-0x3b13e330,	0xe88b879a,	0xb1fcfdc6,	0xa006850e,
-0x7a2f3943,	0xff94d1bd,	0x2e41b7b4,	0x5858ff11,
-0x62910311,	0xc03124a1,	0x4c9ab497,	0x8b6cf246,
-0xc9ac4856,	0x058b1cf0,	0x094146a4,	0x21b34465,
-0x3bcb5453,	0x90d6022a,	0x28190001,	0xf18f2280,
-0x8fad8551,	0x65113513,	0xe192bd6c,	0xa2cfc9ef,
-0x21c4f033,	0xab4f34fb,	0x224eab9e,	0x899edf52,
-0xd494af2d,	0x1ce1600f,	0x7bc0e2cb,	0x4f49e6f0,
-0xb8fbe79f,	0xc9c91b53,	0x025585c9,	0xd1d81072,
-0xcbcde043,	0xc94d077b,	0xb164efee,	0x7156806b,
-0x86699184,	0x75f514cf,	0x95bee913,	0x96fbbf85,
-0xb37760b1,	0x9665d6fa,	0xb27ec974,	0xffa844d9,
-0xc2cd368f,	0xd608dd3c,	0x0144c468,	0xff855bda,
-0x38b722ab,	0xe0d03d11,	0x481f7936,	0xe333cebc,
-0xab099835,	0x4916bd84,	0x94976044,	0x7d444113,
-0xfd7138f3,	0x3aab1781,	0x353ee8c2,	0x3f3b258c,

cpu/intel/model_f4x/microcode-mbdf4903.h

diff --git a/cpu/intel/model_f4x/microcode-mbdf4903.h b/cpu/intel/model_f4x/microcode-mbdf4903.h
deleted file mode 100644
index 4ee3449..0000000
--- a/cpu/intel/model_f4x/microcode-mbdf4903.h
+++ /dev/null
@@ -1,163 +0,0 @@
-//+++
-//	Copyright (c) <1995-2015>, Intel Corporation.
-//	All rights reserved.
-//
-//	Redistribution. Redistribution and use in binary form, without modification, are
-//	permitted provided that the following conditions are met:
-//		.Redistributions must reproduce the above copyright notice and the following
-//	disclaimer in the documentation and/or other materials provided with the
-//	distribution.
-//		.Neither the name of Intel Corporation nor the names of its suppliers may be used
-//	to endorse or promote products derived from this software without specific prior
-//	written permission.
-//		.No reverse engineering, decompilation, or disassembly of this software is
-//	permitted.
-//		."Binary form" includes any format commonly used for electronic conveyance
-//	which is a reversible, bit-exact translation of binary representation to ASCII or
-//	ISO text, for example, "uuencode."
-//
-//	DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-//	HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-//	WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-//	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-//	PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
-//	OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-//	NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-//	LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-//	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-//	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-//	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-//	ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//---
-/*  Wed Jan 21 08:08:20 CST 2015  */
-/*  mbdf4903.inc  */
-0x00000001,	0x00000003,	0x04212005,	0x00000f49,
-0xf85d53b8,	0x00000001,	0x000000bd,	0x00000000,
-0x00000000,	0x00000000,	0x00000000,	0x00000000,
-0x1d97a5ab,	0xd8d45b45,	0x89deeee4,	0xdbc956d7,
-0xfb0cd01b,	0x3bca266b,	0xd5501500,	0xdc8984df,
-0x40b6ac51,	0xf7df8e82,	0x8ec688d7,	0x1ef9fbbd,
-0xc78d51ef,	0xae0847c6,	0xdca2d2ca,	0x37e70a9b,
-0xe3787616,	0x345fcd33,	0x3cd82279,	0x1def6266,
-0x5293bcd1,	0x6fcf26e7,	0xc058fbdf,	0x4047885c,
-0xb576571c,	0x4b5cd986,	0x132708b1,	0x80f1c25a,
-0x751ba4c7,	0x48c5d0b9,	0x02af5f0a,	0x9ffc999f,
-0x30b3c7af,	0x8f53188c,	0x8ab966f6,	0x46afec6f,
-0xb781e8e1,	0x93a70da2,	0x221001a6,	0x1d8ac72e,
-0x7de05c53,	0x37c414dc,	0x2237c122,	0x2e9f4c87,
-0x6d5e59e5,	0x0fe3fc94,	0x37b5ca40,	0x148b94ba,
-0x1739ccd1,	0x6c3bc387,	0x43161ebd,	0xa6887dc4,
-0xb1578c58,	0x0e1258f2,	0x45135243,	0xcdae3ef5,
-0x65ff1746,	0xacf8ebdf,	0xa72112ca,	0x02b84a79,
-0x9a216bc4,	0xc292e932,	0x7979f591,	0x69b77fff,
-0xef165702,	0x350ea5ad,	0x22257e3b,	0x550ca838,
-0x1a1fecbb,	0x18e22ded,	0xa507dde3,	0x468d7844,
-0x42f62879,	0x2101eea3,	0xecf6295a,	0xf3ed3037,
-0x44a57038,	0x5bb44832,	0xfb0e26ec,	0xbc5fe107,
-0xb9452eee,	0xaf33a355,	0x7756a4cc,	0x77fbe8a4,
-0x033777eb,	0x9ea1a874,	0x525f582b,	0x7d239934,
-0x6793a677,	0x6e19db4b,	0xd1df2782,	0x54411a11,
-0xf78d17d0,	0x77c196bb,	0xada667da,	0x70dd255d,
-0x4f026ec3,	0x65079cc1,	0xa7c9ea02,	0xce125e00,
-0x0c7705b4,	0x1b5f5c57,	0x0bfa7df4,	0x9dec2c5e,
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-0x5386383e,	0x2326168a,	0x6519809f,	0x410e4030,
-0x71535fe9,	0x41b859f9,	0x699b2c62,	0x6dd05418,
-0xb5b4621f,	0x36182db3,	0x7ade6401,	0xde4a5be0,
-0x5c41bbc0,	0x572a6343,	0x47176e3f,	0xdeef3492,
-0x02c4c789,	0xe0742989,	0x80e5e625,	0x2bb8154c,
-0x197b8266,	0x95fbc970,	0x47db060c,	0xe6eaf074,
-0xa971f29f,	0x2e44a86d,	0xa1537c89,	0xceb9497f,
-0x7588bed6,	0xe1de63fd,	0xcc878c9e,	0x3c9f54df,
-0xd96f165d,	0x87c39260,	0xa2505ebe,	0x35315b03,
-0x69b55f3e,	0x4d061ea1,	0x0a0609e5,	0x1a0e9df5,
-0x46f331aa,	0x2f78d5af,	0x15c9b735,	0x2824ec99,
-0x8a7bd6c4,	0x315d2911,	0xaaa2a4bd,	0x9bda9226,
-0xd37724a8,	0x41bdfaba,	0x4d5422ce,	0xb10d6477,
-0x2b761a1e,	0xd8fba6a5,	0xa7845dd4,	0x26f97e4c,
-0xb0943661,	0xc0ee2b73,	0x06fdb37f,	0x260d7bec,
-0x94a14ef7,	0x7531936d,	0x9ae91b65,	0x2b6b470a,
-0x68ee2bae,	0x0c08b024,	0x00ea436f,	0x0accf143,
-0x2e5adb51,	0x7a155213,	0xb088dce4,	0x1b81a181,
-0x52296f85,	0x4d29e16b,	0x9939f952,	0x1fdcd4ff,
-0xa3d75dbb,	0x2b833084,	0x2fa52024,	0x37bdb875,
-0x3f694edc,	0x65b0b599,	0xdc72cf85,	0x291ae2ba,
-0x35e24c8f,	0x7741c8a9,	0xb01ca44d,	0x6199935d,
-0xc0c89383,	0x5f05f874,	0x9292c348,	0x3586bfd8,
-0x6345458d,	0x49263bdb,	0x647c36ae,	0xf84b11a1,
-0x94827fb8,	0x5798744b,	0x858c7d49,	0xe2cba691,
-0x6ccb4f80,	0x8b20c80e,	0xb63311fe,	0x4b22af2b,
-0x2f267f69,	0x8f9a34d2,	0xd8969b2d,	0x3abf5472,
-0xb27f4eb0,	0x0e9b5f89,	0x2c4c4d99,	0x5c1e1262,
-0xdced13a1,	0x530e6b92,	0xafbee3d6,	0x65fe567e,
-0xcf9c9149,	0x42e08da6,	0xe92e2843,	0x9b3f275a,
-0x914a2744,	0x7ab4c765,	0x6965f671,	0x811f127c,
-0x23f7ce13,	0xd4f1ac3f,	0xc2d4ee69,	0x00280023,
-0x40785dda,	0xca35a92d,	0x2963b64a,	0xe5b0e712,
-0xa9b2d095,	0x4832e02e,	0xed9cea18,	0xa94761fd,
-0x57a40f75,	0xb8cd5b69,	0xd506155e,	0x551ab1ce,
-0x59c5aad2,	0x97890115,	0x2a5a9df5,	0x29d9ba4b,
-0xbdd29034,	0x5bd4952c,	0x1191c80c,	0x1997917b,
-0x55eb2b4a,	0x0e72b3e8,	0x367ece32,	0x34b76a3c,
-0xe64ad532,	0x3b59055a,	0x0f712d21,	0xf67a9ba3,
-0xaf311de6,	0x7cc35910,	0x834453b4,	0xe26aa25f,
-0xb22bb98e,	0xe57b180f,	0x8934fbea,	0x4166ccec,
-0x4da4712c,	0xc19c8f60,	0xacbfcc98,	0x30dda7a6,
-0x1dc3fbd8,	0x7d77916e,	0x180e8ba7,	0x0f992e7d,
-0xc5c22947,	0x22aeeffe,	0x0f371fa3,	0x7f7bf57c,
-0x78410151,	0x161ee85d,	0x21902fe6,	0xaefebe53,
-0xbc6b6150,	0x13d1afc3,	0x9f6ab323,	0xdfde1341,
-0xccaab924,	0xb772a93a,	0xfe3b68cd,	0x79383bba,
-0x7006023b,	0xf1f2a411,	0x392af6f0,	0x4d3f478a,
-0xe8c05af3,	0x00e25e71,	0xa091145c,	0x3aedec59,
-0xc03760a8,	0x55e3c016,	0x8da162d3,	0x7390887d,
-0x76d23ba6,	0x68e31654,	0x16b5d97f,	0xe3395e91,
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-0xb1fd5839,	0xe345a9fe,	0x515246ab,	0x6180fbd4,
-0xb5cff818,	0x986113c8,	0x417d707c,	0x47d843e2,
-0x200ac421,	0x1ca10192,	0x88cd37df,	0x2609dca5,
-0x8dc2af5f,	0x211c3d1b,	0x2c2b857e,	0x3557f767,
-0x9158b820,	0x10c983a9,	0x04cf4090,	0x821ea21c,
-0x3e387c5a,	0x00e590da,	0x7813e54b,	0xc17b54ff,
-0x307fa6e0,	0x8b76d147,	0xc131a653,	0x146d70de,
-0x8323ac2b,	0xf6f5a535,	0xfe86dd65,	0xb96ee8f0,
-0xcf485ed1,	0x04f132c5,	0xfcfc6409,	0xd3c2fb83,
-0xd3a2f9c0,	0xf96e77c2,	0x56767a87,	0x80fcfb64,
-0x7a71268f,	0xa8c76ceb,	0x24229c56,	0x87c44f41,
-0x57a44c7a,	0xfbb5cc5b,	0x4cc2eb71,	0x67b29a4b,
-0x3c12f5fa,	0x9d652a79,	0x784c4f80,	0x8f71277c,
-0xef82dcbe,	0x7568289d,	0xdf2c8be9,	0x17f27058,
-0xc1a68e70,	0xa16e8e80,	0x4658d2ea,	0xd9184214,
-0x6eb531e0,	0x1bc29124,	0x9c7f17f0,	0xe46d2d7f,
-0x12503c08,	0xad1954c5,	0xac3c0dc6,	0xf5daf588,
-0x432ca22b,	0xf0b1feee,	0x49a87d08,	0x46cba3b3,
-0xd4b21507,	0xe38c4e61,	0x723431ab,	0xb6a77ed9,
-0x301c1efa,	0x74ec696b,	0x68a3451e,	0x7f47d0bb,
-0x3ae520b5,	0xd12982ce,	0xb6b1a6c5,	0x6a7530ef,
-0x4aef2c63,	0x15c35a89,	0x5f4cf69b,	0x7adf5962,
-0xf447643d,	0xee650c10,	0xb129db55,	0x4fe6c24e,
-0x90d3cdb6,	0xb541e1c3,	0xb2b6ea11,	0x9a4cabc7,
-0x43e9b01c,	0xa569ec97,	0x86d846e1,	0x6ac04c33,
-0x53149baa,	0x009ce63b,	0x25a3f701,	0x1c3e0b06,
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-0x8e2cdee0,	0x35403b6a,	0x4643688b,	0xd204f471,
-0x7d1a21d4,	0x8c031665,	0x282384a9,	0x617c527c,
-0x73022432,	0x09698b90,	0x780842d8,	0xe9f441cb,
-0xbe83ebe2,	0x1349c504,	0x6ed09b31,	0x65d66a39,
-0x7d31d11c,	0xb321873d,	0x6c3f6320,	0xd15ca4dd,
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-0x18a1dc33,	0xe5d11954,	0x47897c6e,	0xd5c21c81,
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-0xa7450298,	0xeda0181f,	0xe1884691,	0x804b1f72,
-0x918aab83,	0x417c0d4a,	0x0c4fd8df,	0x7a200bac,
-0xf5a6deea,	0x5cd32457,	0xc8a677fb,	0xae8fa1c0,
-0x20b7d314,	0x7b39a1b5,	0x22f6357e,	0x1da85b16,
-0xbf0f044b,	0xe0c8869f,	0xe0d7593f,	0xd981b3b9,
-0x2deff02a,	0x73edd221,	0xdbf4b6a2,	0x49a66ed8,
-0x8ec84132,	0xc93b6577,	0x585c488e,	0x6fdb9a7e,
-0xef868706,	0xec5cb3b7,	0x3dd3f005,	0xfff75a03,

cpu/intel/model_f4x/microcode.bin

diff --git a/cpu/intel/model_f4x/microcode.bin b/cpu/intel/model_f4x/microcode.bin
new file mode 100644
index 0000000..5b83efd
--- /dev/null
+++ b/cpu/intel/model_f4x/microcode.bin
Binary files differ

cpu/intel/model_f4x/microcode.h

diff --git a/cpu/intel/model_f4x/microcode.h b/cpu/intel/model_f4x/microcode.h
deleted file mode 100644
index 09826f1..0000000
--- a/cpu/intel/model_f4x/microcode.h
+++ /dev/null
@@ -1,12 +0,0 @@
-
-#include "microcode-m02f4116.h"
-#include "microcode-mbdf4117.h"
-#include "microcode-m9df4305.h"
-#include "microcode-m9df4406.h"
-#include "microcode-m9df4703.h"
-#include "microcode-m01f480c.h"
-#include "microcode-m02f480e.h"
-#include "microcode-m5ff4807.h"
-#include "microcode-mbdf4903.h"
-#include "microcode-m5cf4a04.h"
-#include "microcode-m5df4a02.h"

cpu/via/nano/microcode.bin

diff --git a/cpu/via/nano/microcode.bin b/cpu/via/nano/microcode.bin
new file mode 100755
index 0000000..0ff2eb7
--- /dev/null
+++ b/cpu/via/nano/microcode.bin
Binary files differ

documentation/binary_policy.md

diff --git a/documentation/binary_policy.md b/documentation/binary_policy.md
new file mode 100644
index 0000000..9bf0414
--- /dev/null
+++ b/documentation/binary_policy.md
@@ -0,0 +1,60 @@
+**coreboot binary policy v1.0**
+
+
+While coreboot attempts to be binary free, some coreboot mainboards require
+vendor binaries to support silicon and features. It is an unfortunate fact,
+as silicon has become more complicated, vendors are using more binaries to
+support their silicon. The coreboot community can not control the vendors,
+nor completely eliminate binaries, but it can set standards and expectations
+for vendor participation. coreboot needs policies and guidelines to meet GPL
+licence requirements and to organize and maintain standards within coreboot.
+
+
+To accept binaries in coreboot 3rdparty/blobs repository, **the binary
+must meet the following**:
+
+
+1. A publicly available (published) ABI
+   a. In case of non-ISA binary, documented usage conventions are required
+   b. examples:
+      * The Intel® Firmware Support Package: External Architecture
+      Specification v.1.0
+      * The PCI firmware specification is the ABI for a standard PCI video BIOS.
+      * Vendor microcode loading and placement instructions
+
+
+2. Appropriate license (redistributable)
+   a. The binary must be accompanied by a distribution license. The license
+   must allow unlimited redistribution to allow coreboot contributors to
+   create coreboot images for third parties which contain this and other blobs.
+
+
+3. Source code linked into coreboot may not be committed to the binary
+repository. Source code and header files must be committed to the coreboot
+repository.
+
+
+4. Binary version
+   a. The binary must contain the version and how to extract the version
+   must be published in the ABI
+
+
+5. Release notes - updated with each version
+   a. Each binary release must be accompanied by a release note that contains
+   all of the following (if a field is unknown or unavailable, mark it as
+   unknown or N/A):
+      * version
+      * release date
+      * supported silicon
+      * instructions, requirements, and dependencies
+      * changes since the last version
+      * errata, known issues
+      * toolchain version(s), if applicable
+      * ABI version and link to the published ABI (in the binary repository)
+
+
+6. Good commit message
+   a.  The commit message should summarize the release note and contain
+   any additional information that might be specific to coreboot. It is
+   helpful to indicate how the binary was tested within coreboot and list
+   any known exceptions or errata.

northbridge/amd/00660F01/VBIOS.bin

diff --git a/northbridge/amd/00660F01/VBIOS.bin b/northbridge/amd/00660F01/VBIOS.bin
index dd2f6b3..112f392 100644
--- a/northbridge/amd/00660F01/VBIOS.bin
+++ b/northbridge/amd/00660F01/VBIOS.bin
Binary files differ

pi/amd/00630F01/AGESA.h

diff --git a/pi/amd/00630F01/AGESA.h b/pi/amd/00630F01/AGESA.h
deleted file mode 100644
index 1ef9e97..0000000
--- a/pi/amd/00630F01/AGESA.h
+++ /dev/null
@@ -1,3641 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Agesa structures and definitions
- *
- * Contains AMD AGESA core interface
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Include
- * @e \$Revision: 296129 $   @e \$Date: 2014-06-23 09:45:14 -0500 (Mon, 23 Jun 2014) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-
-#ifndef _AGESA_H_
-#define _AGESA_H_
-
-#include  "Porting.h"
-#include  "AMD.h"
-
-//
-//
-// AGESA Types and Definitions
-//
-//
-
-// AGESA BASIC CALLOUTS
-#define AGESA_MEM_RELEASE              0x00028000ul
-
-// AGESA ADVANCED CALLOUTS, Processor
-#define AGESA_CHECK_UMA                0x00028100ul
-#define AGESA_DO_RESET                 0x00028101ul
-#define AGESA_ALLOCATE_BUFFER          0x00028102ul
-#define AGESA_DEALLOCATE_BUFFER        0x00028103ul
-#define AGESA_LOCATE_BUFFER            0x00028104ul
-#define AGESA_RUNFUNC_ONAP             0x00028105ul
-
-// AGESA ADVANCED CALLOUTS, Memory
-#define AGESA_READ_SPD                 0x00028140ul
-#define AGESA_HOOKBEFORE_DRAM_INIT     0x00028141ul
-#define AGESA_HOOKBEFORE_DQS_TRAINING  0x00028142ul
-#define AGESA_READ_SPD_RECOVERY        0x00028143ul
-#define AGESA_HOOKBEFORE_EXIT_SELF_REF 0x00028144ul
-#define AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY     0x00028145ul
-#define AGESA_EXTERNAL_2D_TRAIN_VREF_CHANGE     0x00028146ul
-#define AGESA_EXTERNAL_VOLTAGE_ADJUST  0x00028147ul
-
-// AGESA IDS CALLOUTS
-#define AGESA_GET_IDS_INIT_DATA       0x00028200ul
-
-// AGESA GNB CALLOUTS
-#define AGESA_GNB_PCIE_SLOT_RESET      0x00028301ul
-#define AGESA_GNB_GFX_GET_VBIOS_IMAGE  0x00028302ul
-#define AGESA_GNB_PCIE_CLK_REQ         0x00028303ul
-
-// AGESA FCH CALLOUTS
-#define AGESA_FCH_OEM_CALLOUT          0x00028401ul
-
-//-----------------------------------------------------------------------------
-//                     FCH DEFINITIONS AND MACROS
-//
-//-----------------------------------------------------------------------------
-
-/// Configuration values for SdConfig
-typedef enum {
-  SdDisable = 0,                      ///< Disabled
-  SdAmda,                             ///< AMDA,  set 24,18,16,  default
-  SdDma,                              ///< DMA clear 24, 16, set 18
-  SdPio,                              ///< PIO clear 24,18,16
-  SdDump                              ///< SD DUMP, don't touch SD
-} SD_MODE;
-
-/// Configuration values for SdClockControl
-typedef enum {
-  Sd50MhzTraceCableLengthWithinSixInches = 4,           ///< 50Mhz, default
-  Sd40MhzTraceCableLengthSix2ElevenInches = 6,          ///< 40Mhz
-  Sd25MhzTraceCableLengthEleven2TwentyfourInches = 7,   ///< 25Mhz
-} SD_CLOCK_CONTROL;
-
-/// Configuration values for AzaliaController
-typedef enum {
-  AzAuto = 0,                         ///< Auto - Detect Azalia controller automatically
-  AzDisable,                          ///< Diable - Disable Azalia controller
-  AzEnable                            ///< Enable - Enable Azalia controller
-} HDA_CONFIG;
-
-/// Configuration values for IrConfig
-typedef enum {
-  IrDisable  = 0,                     ///< Disable
-  IrRxTx0    = 1,                     ///< Rx and Tx0
-  IrRxTx1    = 2,                     ///< Rx and Tx1
-  IrRxTx0Tx1 = 3                      ///< Rx and both Tx0,Tx1
-} IR_CONFIG;
-
-/// Configuration values for SataClass
-typedef enum {
-  SataNativeIde = 0,                  ///< Native IDE mode
-  SataRaid,                           ///< RAID mode
-  SataAhci,                           ///< AHCI mode
-  SataLegacyIde,                      ///< Legacy IDE mode
-  SataIde2Ahci,                       ///< IDE->AHCI mode
-  SataAhci7804,                       ///< AHCI mode as 7804 ID (AMD driver)
-  SataIde2Ahci7804                    ///< IDE->AHCI mode as 7804 ID (AMD driver)
-} SATA_CLASS;
-
-/// Configuration values for BLDCFG_FCH_GPP_LINK_CONFIG
-typedef enum {
-  PortA4       = 0,                   ///< 4:0:0:0
-  PortA2B2     = 2,                   ///< 2:2:0:0
-  PortA2B1C1   = 3,                   ///< 2:1:1:0
-  PortA1B1C1D1 = 4                    ///< 1:1:1:1
-} GPP_LINKMODE;
-
-/// Configuration values for FchPowerFail
-typedef enum {
-  AlwaysOff   = 0,                    ///< Always power off after power resumes
-  AlwaysOn    = 1,                    ///< Always power on after power resumes
-  UsePrevious = 3,                    ///< Resume to same setting when power fails
-} POWER_FAIL;
-
-
-/// Configuration values for SATA Link Speed
-typedef enum {
-  Gen1   = 1,                         ///< SATA port GEN1 speed
-  Gen2   = 2,                         ///< SATA port GEN2 speed
-  Gen3   = 3,                         ///< SATA port GEN3 speed
-} SATA_SPEED;
-
-
-/// Configuration values for GPIO function
-typedef enum {
-  Function0   = 0,                    ///< GPIO Function 1
-  Function1   = 1,                    ///< GPIO Function 1
-  Function2   = 2,                    ///< GPIO Function 2
-  Function3   = 3,                    ///< GPIO Function 3
-} GPIO_FUN;
-
-/// Configuration values for memory phy voltage (VDDR)
-typedef enum {
-  VOLT0_95,                           ///< VDDR 0.95V
-  VOLT1_05,                           ///< VDDR 1.05V
-  MAX_VDDR                            ///< Maxmum value for this enum definition
-} MEMORY_PHY_VOLTAGE;
-
-/// Configuration values for GPIO_CFG
-typedef enum {
-  OwnedByEc   = 1 << 0,               ///< This bit can only be written by EC
-  OwnedByHost = 1 << 1,               ///< This bit can only be written by host (BIOS)
-  Sticky      = 1 << 2,               ///< If set, [6:3] are sticky
-  PullUpB     = 1 << 3,               ///< 0: Pullup enable; 1: Pullup disabled
-  PullDown    = 1 << 4,               ///< 0: Pulldown disabled; 1: Pulldown enable
-  GpioOutEnB  = 1 << 5,               ///< 0: Output enable; 1: Output disable
-  GpioOut     = 1 << 6,               ///< Output state when GpioOutEnB is 0
-  GpioIn      = 1 << 7,               ///< This bit is read only - current pin state
-} CFG_BYTE;
-
-/// FCH GPIO CONTROL
-typedef struct {
-  IN         UINT8        GpioPin;               ///< Gpio Pin, valid range: 0-67, 128-150, 160-228
-  IN         GPIO_FUN     PinFunction;           ///< Multi-function selection
-  IN         CFG_BYTE     CfgByte;               ///< GPIO Register value
-} GPIO_CONTROL;
-
-///
-/// FCH SCI MAP CONTROL
-///
-typedef struct {
-  IN         UINT8        InputPin;              ///< Input Pin, valid range 0-63
-  IN         UINT8        GpeMap;                ///< Gpe Map, valid range 0-31
-} SCI_MAP_CONTROL;
-
-///
-/// FCH SATA PHY CONTROL
-///
-typedef struct {
-  IN         BOOLEAN      CommonPhy;             ///< Common PHY or not
-                                      ///<   @li <b>FALSE</b> - Only applied to specified port
-                                      ///<   @li <b>TRUE</b>  - Apply to all SATA ports
-  IN         SATA_SPEED   Gen;                   ///< SATA speed
-  IN         UINT8        Port;                  ///< Port number, valid range: 0-7
-  IN         UINT32       PhyData;               ///< SATA PHY data, valid range: 0-0xFFFFFFFF
-} SATA_PHY_CONTROL;
-
-///
-/// FCH Component Data Structure in InitReset stage
-///
-typedef struct {
-  IN       BOOLEAN      UmiGen2;             ///< Enable Gen2 data rate of UMI
-                                             ///<   @li <b>FALSE</b> - Disable Gen2
-                                             ///<   @li <b>TRUE</b>  - Enable Gen2
-
-  IN       BOOLEAN      SataEnable;          ///< SATA controller function
-                                             ///<   @li <b>FALSE</b> - SATA controller is disabled
-                                             ///<   @li <b>TRUE</b> - SATA controller is enabled
-
-  IN       BOOLEAN      IdeEnable;           ///< SATA IDE controller mode enabled/disabled
-                                             ///<   @li <b>FALSE</b> - IDE controller is disabled
-                                             ///<   @li <b>TRUE</b> - IDE controller is enabled
-
-  IN       BOOLEAN      GppEnable;           ///< Master switch of GPP function
-                                             ///<   @li <b>FALSE</b> - GPP disabled
-                                             ///<   @li <b>TRUE</b> - GPP enabled
-
-  IN       BOOLEAN      Xhci0Enable;         ///< XHCI0 controller function
-                                             ///<   @li <b>FALSE</b> - XHCI0 controller disabled
-                                             ///<   @li <b>TRUE</b> - XHCI0 controller enabled
-
-  IN       BOOLEAN      Xhci1Enable;         ///< XHCI1 controller function
-                                             ///<   @li <b>FALSE</b> - XHCI1 controller disabled
-                                             ///<   @li <b>TRUE</b> - XHCI1 controller enabled
-} FCH_RESET_INTERFACE;
-
-
-///
-/// FCH Component Data Structure from InitEnv stage
-///
-typedef struct {
-  IN       SD_MODE      SdConfig;            ///< Secure Digital (SD) controller mode
-  IN       HDA_CONFIG   AzaliaController;    ///< Azalia HD Audio Controller
-
-  IN       IR_CONFIG    IrConfig;            ///< Infrared (IR) Configuration
-  IN       BOOLEAN      UmiGen2;             ///< Enable Gen2 data rate of UMI
-                                             ///<   @li <b>FALSE</b> - Disable Gen2
-                                             ///<   @li <b>TRUE</b>  - Enable Gen2
-
-  IN       SATA_CLASS   SataClass;           ///< SATA controller mode
-  IN       BOOLEAN      SataEnable;          ///< SATA controller function
-                                             ///<   @li <b>FALSE</b> - SATA controller is disabled
-                                             ///<   @li <b>TRUE</b> - SATA controller is enabled
-
-  IN       BOOLEAN      IdeEnable;           ///< SATA IDE controller mode enabled/disabled
-                                             ///<   @li <b>FALSE</b> - IDE controller is disabled
-                                             ///<   @li <b>TRUE</b> - IDE controller is enabled
-
-  IN       BOOLEAN      SataIdeMode;         ///< Native mode of SATA IDE controller
-                                             ///<   @li <b>FALSE</b> - Legacy IDE mode
-                                             ///<   @li <b>TRUE</b> - Native IDE mode
-
-  IN       BOOLEAN      Ohci1Enable;         ///< OHCI controller #1 Function
-                                             ///<   @li <b>FALSE</b> - OHCI1 is disabled
-                                             ///<   @li <b>TRUE</b> - OHCI1 is enabled
-
-  IN       BOOLEAN      Ohci2Enable;         ///< OHCI controller #2 Function
-                                             ///<   @li <b>FALSE</b> - OHCI2 is disabled
-                                             ///<   @li <b>TRUE</b> - OHCI2 is enabled
-
-  IN       BOOLEAN      Ohci3Enable;         ///< OHCI controller #3 Function
-                                             ///<   @li <b>FALSE</b> - OHCI3 is disabled
-                                             ///<   @li <b>TRUE</b> - OHCI3 is enabled
-
-  IN       BOOLEAN      Ohci4Enable;         ///< OHCI controller #4 Function
-                                             ///<   @li <b>FALSE</b> - OHCI4 is disabled
-                                             ///<   @li <b>TRUE</b> - OHCI4 is enabled
-
-  IN       BOOLEAN      GppEnable;           ///< Master switch of GPP function
-                                             ///<   @li <b>FALSE</b> - GPP disabled
-                                             ///<   @li <b>TRUE</b> - GPP enabled
-
-  IN       POWER_FAIL   FchPowerFail;        ///< FCH power failure option
-} FCH_INTERFACE;
-
-
-/*----------------------------------------------------------------------------
- *   CPU Feature related info
- *----------------------------------------------------------------------------
- */
-/// Build Configuration values for BLDCFG_PLATFORM_CONNECTED_STANDBY_MODE
-typedef enum {
-  ConnectedStandbyAuto     = 0,     ///< Auto
-  ConnectedStandbyDisabled = 1,     ///< Disabled
-  MaxConnectedStandbyMode  = 2      ///< Not a valid value, used for verifying input
-} PLATFORM_CONNECTED_STANDBY_MODES;
-
-/// Build Configuration values for BLDCFG_PLATFORM_CSTATE_MODE
-typedef enum {
-  CStateModeDisabled = 0,           ///< Disabled
-  CStateModeC6       = 1,           ///< C6 State
-  MaxCStateMode      = 2            ///< Not a valid value, used for verifying input
-} PLATFORM_CSTATE_MODES;
-
-/// Build Configuration values for BLDCFG_PLATFORM_CPB_MODE
-typedef enum {
-  CpbModeAuto     = 0,           ///< Auto
-  CpbModeDisabled = 1,           ///< Disabled
-  MaxCpbMode      = 2            ///< Not a valid value, used for verifying input
-} PLATFORM_CPB_MODES;
-
-/// Build Configuration values for BLDCFG_LOW_POWER_PSTATE_FOR_PROCHOT_MODE
-typedef enum {
-  LOW_POWER_PSTATE_FOR_PROCHOT_AUTO      = 0,           ///< Auto
-  LOW_POWER_PSTATE_FOR_PROCHOT_DISABLE   = 1,           ///< Disabled
-  MAX_LOW_POWER_PSTATE_FOR_PROCHOT_MODE  = 2            ///< Not a valid value, used for verifying input
-} PLATFORM_LOW_POWER_PSTATE_MODES;
-
-/// Build Configuration values for BLDCFG_ACPI_PSTATES_PSD_POLICY
-#define PsdPolicyProcessorDefault  0       ///< PSD is dependent or independent per processor default
-#define PsdPolicyDependent         1       ///< PSD is forced dependent
-#define PsdPolicyIndependent       2       ///< PSD is forced independent
-#define PsdPolicyMax               3       ///< Not a valid value, used for verifying input
-
-/*----------------------------------------------------------------------------
- *   GNB PCIe configuration info
- *----------------------------------------------------------------------------
- */
-
-// Event definitions
-
-#define GNB_EVENT_INVALID_CONFIGURATION               0x20010000ul   // User configuration invalid
-#define GNB_EVENT_INVALID_PCIE_TOPOLOGY_CONFIGURATION 0x20010001ul   // Requested lane allocation for PCIe port can not be supported
-#define GNB_EVENT_INVALID_PCIE_PORT_CONFIGURATION     0x20010002ul   // Requested incorrect PCIe port device address
-#define GNB_EVENT_INVALID_DDI_LINK_CONFIGURATION      0x20010003ul   // Incorrect parameter in DDI link configuration
-#define GNB_EVENT_INVALID_LINK_WIDTH_CONFIGURATION    0x20010004ul   // Invalid with for PCIe port or DDI link
-#define GNB_EVENT_INVALID_LANES_CONFIGURATION         0x20010005ul   // Lane double subscribe lanes
-#define GNB_EVENT_INVALID_DDI_TOPOLOGY_CONFIGURATION  0x20010006ul   // Requested lane allocation for DDI link(s) can not be supported
-#define GNB_EVENT_LINK_TRAINING_FAIL                  0x20020000ul   // PCIe Link training fail
-#define GNB_EVENT_BROKEN_LANE_RECOVERY                0x20030000ul   // Broken lane workaround applied to recover link training
-#define GNB_EVENT_GEN2_SUPPORT_RECOVERY               0x20040000ul   // Scale back to GEN1 to recover link training
-
-
-#define DESCRIPTOR_TERMINATE_LIST           0x80000000ull
-#define DESCRIPTOR_IGNORE                   0x40000000ull
-
-/// PCIe link initialization
-typedef enum {
-  EndpointDetect = 0,                                     ///< Detect endpoint presence
-  EndpointNotPresent                                      ///< Endpoint not present (or connected). Used in case there is alternative way to determine
-                                                          ///< if device present on board or in slot. For example GPIO can be used to determine device presence.
-} PCIE_ENDPOINT_STATUS;
-
-
-/// PCIe port misc extended controls
-typedef struct  {
-  IN      UINT8                     LinkComplianceMode :1;  ///< Force port into compliance mode (device will not be trained, port output compliance pattern)
-  IN      UINT8                     LinkSafeMode       :2;  /**< Safe mode PCIe capability. (Parameter may limit PCIe speed requested through PCIe_PORT_DATA::LinkSpeedCapability)
-                                                             *  @li @b 0 - port can advertize muximum supported capability
-                                                             *  @li @b 1 - port limit advertized capability and speed to PCIe Gen1
-                                                             */
-  IN      UINT8                     SbLink             :1;  /**< PCIe link type
-                                                             *  @li @b 0 - General purpose port
-                                                             *  @li @b 1 - Port connected to SB
-                                                             */
-  IN      UINT8                     ClkPmSupport       :1;  /**< Clock Power Management Support
-                                                             *  @li @b 0 - Clock Power Management not configured
-                                                             *  @li @b 1 - Clock Power Management configured according to PCIe device capability
-                                                             */
-} PCIe_PORT_MISC_CONTROL;
-
-/// The IO APIC Interrupt Mapping Info
-typedef struct {
-  IN      UINT8                     GroupMap;               /**< Group mapping for slot or endpoint device (connected to PCIE port) interrupts .
-                                                             *  @li <b>0</b> - IGNORE THIS STRUCTURE AND USE RECOMMENDED SETTINGS
-                                                             *  @li <b>1</b> - mapped to Grp 0 (Interrupts 0..3   of IO APIC redirection table)
-                                                             *  @li <b>2</b> - mapped to Grp 1 (Interrupts 4..7   of IO APIC redirection table)
-                                                             *  @li ...
-                                                             *  @li <b>8</b> - mapped to Grp 7 (Interrupts 28..31 of IO APIC redirection table)
-                                                             */
-  IN      UINT8                     Swizzle;                /**< Swizzle interrupt in the Group.
-                                                             *  @li <b>0</b> - ABCD
-                                                             *  @li <b>1</b> - BCDA
-                                                             *  @li <b>2</b> - CDAB
-                                                             *  @li <b>3</b> - DABC
-                                                             */
-  IN      UINT8                     BridgeInt;              /**< IOAPIC redirection table entry for PCIE bridge interrupt
-                                                             *  @li <b>0</b>  - Entry 0  of IO APIC redirection table
-                                                             *  @li <b>1</b>  - Entry 1  of IO APIC redirection table
-                                                             *  @li ...
-                                                             *  @li <b>31</b> - Entry 31 of IO APIC redirection table
-                                                             */
-} APIC_DEVICE_INFO;
-
-/// Initial Offset Calibration Control
-typedef enum {
-  ADAPT_IOC_DISABLED = 0,                                     ///< Initial Offset Calibration Disabled
-  ADAPT_IOC_ENABLED                                           ///< Initial Offset Calibration Enabled
-} ADAPT_IOC_CONTROL;
-
-/// DFE Control values
-typedef enum {
-  ADAPT_DFE_CONTROL_DISABLED = 0,                             ///< DFE Disabled
-  ADAPD_DFE_CONTROL_1TAP_DFE = 4,                             ///< 1-tap DFE
-  ADAPD_DFE_CONTROL_1TAP_DFE_FBF,                             ///< 1-tap DFE with Future Bit Filtering
-  ADAPD_DFE_CONTROL_2TAP_DFE,                                ///< 2-tap DFE
-  ADAPD_DFE_CONTROL_2TAP_DFE_FBF                              ///< 2-tap DFE with Future Bit Filtering
-} ADAPT_DFE_CONTROL;
-
-/// LEQ Control values
-typedef enum {
-  ADAPT_LEQ_CONTROL_DISABLED = 0,                              ///< LEQ Disabled
-  ADAPT_LEQ_CONTROL_DC_GAIN  = 2,                              ///< DC Gain Adaptation
-  ADAPT_LEQ_CONTROL_DC_GAIN_POLE                               ///< DC Gain and Pole Adaptation
-} ADAPT_LEQ_CONTROL;
-
-/// Dynamic Offset Calibration Control
-typedef enum {
-  ADAPT_DOC_DISABLED = 0,                                      ///< Dynamic Offset Calibration Disabled
-  ADAPT_DOC_ENABLED                                            ///< Dynamic Offset Calibration Enabled
-} ADAPT_DOC_CONTROL;
-
-/// FOM Calculation Control
-typedef enum {
-  ADAPT_FOMC_DISABLED = 0,                                    ///< FOM Calculation Disabled
-  ADAPT_FOMC_ENABLED                                          ///< FOM Calculation Enabled
-} ADAPT_FOMC_CONTROL;
-
-/// PI Offset Calibration Control
-typedef enum {
-  ADAPT_PIOC_DISABLED = 0,                                    ///< PI Offset Calibration Disabled
-  ADAPT_PIOC_ENABLED                                          ///< PI Offset Calibration Enabled
-} ADAPT_PIOC_CONTROL;
-
-/// GEN3 RxAdaptMode Configuration Structure
-typedef struct {
-  IN      BOOLEAN                InitOffsetCancellation;     ///< Initial Offset Cancellation Enable
-  IN      UINT8                  DFEControl;                 ///< DFE Control
-  IN      UINT8                  LEQControl;                 ///< LEQ Control
-  IN      BOOLEAN                DynamicOffsetCalibration;   ///< Dynamic Offset Calibration Enable
-  IN      BOOLEAN                FOMCalculation;             ///< FOM Calculation Enable
-  IN      BOOLEAN                PIOffsetCalibration;        ///< PI Offset Calibratino Enable
-} RX_ADAPT_MODE;
-
-/// PCIe port configuration data
-typedef struct  {
-  IN       UINT8                   PortPresent;              ///< Enable PCIe port for initialization.
-  IN       UINT8                   ChannelType;              /**< Channel type.
-                                                               *  @li @b 0 - "lowLoss",
-                                                               *  @li @b 1 - "highLoss",
-                                                               *  @li @b 2 - "mob0db",
-                                                               *  @li @b 3 - "mob3db",
-                                                               *  @li @b 4 - "extnd6db"
-                                                               *  @li @b 5 - "extnd8db"
-                                                               */
-  IN       UINT8                   DeviceNumber;             /**< PCI Device number for port.
-                                                               *   @li @b 0 - Native port device number
-                                                               *   @li @b N - Port device number (See available configurations in BKDG
-                                                               */
-  IN       UINT8                   FunctionNumber;           ///< Reserved for future use
-  IN       UINT8                   LinkSpeedCapability;      /**< PCIe link speed/
-                                                               *  @li @b 0 - Maximum supported by silicon
-                                                               *  @li @b 1 - Gen1
-                                                               *  @li @b 2 - Gen2
-                                                               *  @li @b 3 - Gen3
-                                                               */
-  IN       UINT8                   LinkAspm;                 /**< ASPM control. (see AgesaPcieLinkAspm for additional option to control ASPM)
-                                                               *  @li @b 0 - Disabled
-                                                               *  @li @b 1 - L0s only
-                                                               *  @li @b 2 - L1 only
-                                                               *  @li @b 3 - L0s and L1
-                                                               */
-  IN       UINT8                   LinkHotplug;              /**< Hotplug control.
-                                                               *  @li @b 0 - Disabled
-                                                               *  @li @b 1 - Basic
-                                                               *  @li @b 2 - Server
-                                                               *  @li @b 3 - Enhanced
-                                                               */
-  IN       UINT8                   ResetId;                  /**< Arbitrary number greater than 0 assigned by platform firmware for GPIO
-                                                               *   identification which control reset for given port.
-                                                               *   Each port with unique GPIO should have unique ResetId assigned.
-                                                               *   All ports use same GPIO to control reset should have same ResetId assigned.
-                                                               *   see AgesaPcieSlotResetContol.
-                                                               */
-  IN       PCIe_PORT_MISC_CONTROL  MiscControls;             ///< Misc extended controls
-  IN       APIC_DEVICE_INFO        ApicDeviceInfo;           ///< IOAPIC device programming info
-  IN       PCIE_ENDPOINT_STATUS    EndpointStatus;           ///< PCIe endpoint (device connected to PCIe port) status
-  IN       RX_ADAPT_MODE           RxAdaptMode;              ///< Gen3 RxAdaptMode configuration
-} PCIe_PORT_DATA;
-
-/// DDI channel lane mapping
-typedef struct {                                          ///< Structure that discribe lane mapping
-  IN      UINT8              Lane0   :2;                  /**< Lane 0 mapping
-                                                           *  @li @b 0 - Map to lane 0
-                                                           *  @li @b 1 - Map to lane 1
-                                                           *  @li @b 2 - Map to lane 2
-                                                           *  @li @b 3 - Map to lane 3
-                                                           */
-  IN      UINT8              Lane1   :2;                  ///< Lane 1 mapping (see "Lane 0 mapping")
-  IN      UINT8              Lane2   :2;                  ///< Lane 2 mapping (see "Lane 0 mapping")
-  IN      UINT8              Lane3   :2;                  ///< Lane 3 mapping (see "Lane 0 mapping")
-} CHANNEL_MAPPING;                                        ///< Lane mapping
-
-/// Common Channel Mapping
-typedef union {
-  IN      UINT8                ChannelMappingValue;       ///< Raw lane mapping
-  IN      CHANNEL_MAPPING      ChannelMapping;            ///< Channel mapping
-} CONN_CHANNEL_MAPPING;
-
-/// DDI Configuration data
-typedef struct  {
-  IN       UINT8                ConnectorType;            /**< Display Connector Type
-                                                            *  @li @b 0 - DP
-                                                            *  @li @b 1 - eDP
-                                                            *  @li @b 2 - Single Link DVI-D
-                                                            *  @li @b 3 - Dual  Link DVI-D (see @ref DualLinkDviDescription "Example Dual Link DVI connector description")
-                                                            *  @li @b 4 - HDMI
-                                                            *  @li @b 5 - DP-to-VGA
-                                                            *  @li @b 6 - DP-to-LVDS
-                                                            *  @li @b 7 - Hudson-2 NutMeg DP-to-VGA
-                                                            *  @li @b 8 - Single Link DVI-I
-                                                            *  @li @b 9 - Native CRT (Family 0x14)
-                                                            *  @li @b 10 - Native LVDS (Family 0x14)
-                                                            *  @li @b 11 - Auto detect LCD panel connector type. VBIOS is able to auto detect the LVDS connector type: native LVDS, eDP or DP-to-LVDS
-                                                            *              The auto detection method only support panel with EDID.
-                                                            */
-  IN       UINT8                AuxIndex;                 /**< Indicates which AUX or DDC Line is used
-                                                            *  @li @b 0 - AUX1
-                                                            *  @li @b 1 - AUX2
-                                                            *  @li @b 2 - AUX3
-                                                            *  @li @b 3 - AUX4
-                                                            *  @li @b 4 - AUX5
-                                                            *  @li @b 5 - AUX6
-                                                            */
-  IN       UINT8                HdpIndex;                 /**< Indicates which HDP pin is used
-                                                            *  @li @b 0 - HDP1
-                                                            *  @li @b 1 - HDP2
-                                                            *  @li @b 2 - HDP3
-                                                            *  @li @b 3 - HDP4
-                                                            *  @li @b 4 - HDP5
-                                                            *  @li @b 5 - HDP6
-                                                            */
-  IN       CONN_CHANNEL_MAPPING Mapping[2];               /**< Set specific mapping of lanes to connector pins
-                                                            *  @li Mapping[0] define mapping for group of 4 lanes starting at PCIe_ENGINE_DATA.StartLane
-                                                            *  @li Mapping[1] define mapping for group of 4 lanes ending at PCIe_ENGINE_DATA.EndLane (only applicable for Dual DDI link)
-                                                            *  if Mapping[x] set to 0 than default mapping assumed
-                                                            */
-  IN       UINT8                LanePnInversionMask;      /**< Specifies whether to invert the state of P and N for each lane. Each bit represents a PCIe lane on the DDI port.
-                                                            *  @li 0 - Do not invert (default)
-                                                            *  @li 1 - Invert P and N on this lane
-                                                            */
-  IN       UINT8                Flags;                    /**< Capabilities flags
-                                                            *  @li Flags bit[0] DDI_DATA_FLAGS_DP1_1_ONLY Selects downgrade PHY link to DP1.1
-                                                            *  @li Flags bit[7:1] Reserved
-                                                            */
-} PCIe_DDI_DATA;
-
-/// Engine Configuration
-typedef struct {
-  IN       UINT8                EngineType;               /**< Engine type
-                                                           *  @li @b 0 -  Ignore engine configuration
-                                                           *  @li @b 1 -  PCIe port
-                                                           *  @li @b 2 -  DDI
-                                                           */
-  IN       UINT16               StartLane;                /**< Start Lane ID (in reversed configuration StartLane > EndLane)
-                                                           * Refer to lane descriptions and supported configurations in BKDG
-                                                           */
-  IN       UINT16               EndLane;                  /**< End lane ID (in reversed configuration StartLane > EndLane)
-                                                           * Refer to lane descriptions and supported configurations in BKDG
-                                                           */
-
-} PCIe_ENGINE_DATA;
-
-/// PCIe port descriptor
-typedef struct {
-  IN       UINT32               Flags;                    /**< Descriptor flags
-                                                           * @li @b Bit31 - last descriptor in complex
-                                                           */
-  IN       PCIe_ENGINE_DATA     EngineData;               ///< Engine data
-  IN       PCIe_PORT_DATA       Port;                     ///< PCIe port specific configuration info
-} PCIe_PORT_DESCRIPTOR;
-
-/// DDI descriptor
-typedef struct {
-  IN       UINT32               Flags;                    /**< Descriptor flags
-                                                           * @li @b Bit31 - last descriptor in complex
-                                                           */
-  IN       PCIe_ENGINE_DATA     EngineData;               ///< Engine data
-  IN       PCIe_DDI_DATA        Ddi;                      ///< DDI port specific configuration info
-} PCIe_DDI_DESCRIPTOR;
-
-/// PCIe Complex descriptor
-typedef struct {
-  IN       UINT32               Flags;                    /**< Descriptor flags
-                                                           * @li @b Bit31 - last descriptor in topology
-                                                           */
-  IN       UINT32               SocketId;                 ///< Socket Id
-  IN       CONST PCIe_PORT_DESCRIPTOR *PciePortList;      ///< Pointer to array of PCIe port descriptors or NULL (Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST).
-  IN       CONST PCIe_DDI_DESCRIPTOR  *DdiLinkList;       ///< Pointer to array DDI link descriptors (Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST).
-  IN       VOID                 *Reserved;                ///< Reserved for future use
-} PCIe_COMPLEX_DESCRIPTOR;
-
-/// Action to control PCIe slot reset
-typedef enum {
-  AssertSlotReset,                                        ///< Assert slot reset
-  DeassertSlotReset                                       ///< Deassert slot reset
-} PCIE_RESET_CONTROL;
-
-///Slot Reset Info
-typedef struct {
-  IN      AMD_CONFIG_PARAMS     StdHeader;                ///< Standard configuration header
-  IN      UINT8                 ResetId;                  ///< Slot reset ID as specified in PCIe_PORT_DESCRIPTOR
-  IN      UINT8                 ResetControl;             ///< Reset control as in PCIE_RESET_CONTROL
-} PCIe_SLOT_RESET_INFO;
-
-#define GFX_VBIOS_IMAGE_FLAG_SPECIAL_POST  0x1
-
-///VBIOS image info
-typedef struct {
-  IN      AMD_CONFIG_PARAMS     StdHeader;                ///< Standard configuration header
-  OUT     VOID                  *ImagePtr;                ///< Pointer to VBIOS image
-  IN      PCI_ADDR              GfxPciAddress;            ///< PCI address of integrated graphics controller
-  IN      UINT32                Flags;                    ///< BIT[0] - special repost requred
-} GFX_VBIOS_IMAGE_INFO;
-
-/// Engine descriptor type
-typedef enum {
-  PcieUnusedEngine = 0,                                   ///< Unused descriptor
-  PciePortEngine = 1,                                     ///< PCIe port
-  PcieDdiEngine = 2,                                      ///< DDI
-  MaxPcieEngine                                           ///< Max engine type for boundary check.
-} PCIE_ENGINE_TYPE;
-
-/// PCIe link capability/speed
-typedef enum  {
-  PcieGenMaxSupported,                                    ///< Maximum supported
-  PcieGen1 = 1,                                           ///< Gen1
-  PcieGen2,                                               ///< Gen2
-  PcieGen3,                                               ///< Gen3
-  MaxPcieGen                                              ///< Max Gen for boundary check
-} PCIE_LINK_SPEED_CAP;
-
-/// PCIe PSPP Power policy
-typedef enum  {
-  PsppDisabled,                                           ///< PSPP disabled
-  PsppPerformance = 1,                                    ///< Performance
-  PsppBalanceHigh,                                        ///< Balance-High
-  PsppBalanceLow,                                         ///< Balance-Low
-  PsppPowerSaving,                                        ///< Power Saving
-  MaxPspp                                                 ///< Max Pspp for boundary check
-} PCIE_PSPP_POLICY;
-
-/// DDI display connector type
-typedef enum {
-  ConnectorTypeDP,                                        ///< DP
-  ConnectorTypeEDP,                                       ///< eDP
-  ConnectorTypeSingleLinkDVI,                             ///< Single Link DVI-D
-  ConnectorTypeDualLinkDVI,                               ///< Dual  Link DVI-D
-  ConnectorTypeHDMI,                                      ///< HDMI
-  ConnectorTypeDpToVga,                                   ///< DP-to-VGA
-  ConnectorTypeDpToLvds,                                  ///< DP-to-LVDS
-  ConnectorTypeNutmegDpToVga,                             ///< Hudson-2 NutMeg DP-to-VGA
-  ConnectorTypeSingleLinkDviI,                            ///< Single Link DVI-I
-  ConnectorTypeCrt,                                       ///< CRT (VGA)
-  ConnectorTypeLvds,                                      ///< LVDS
-  ConnectorTypeEDPToLvds,                                 ///< 3rd party common eDP-to-LVDS translator chip without AMD SW init
-  ConnectorTypeEDPToLvdsSwInit,                           ///< 3rd party eDP-to-LVDS translator which requires AMD SW init
-  ConnectorTypeAutoDetect,                                ///< VBIOS auto detect connector type (native LVDS, eDP or DP-to-LVDS)
-  MaxConnectorType                                        ///< Not valid value, used to verify input
-} PCIE_CONNECTOR_TYPE;
-
-/// PCIe link channel type
-typedef enum {
-  ChannelTypeLowLoss,                                     ///< Low Loss
-  ChannelTypeHighLoss,                                    ///< High Loss
-  ChannelTypeMob0db,                                      ///< Mobile 0dB
-  ChannelTypeMob3db,                                      ///< Mobile 3dB
-  ChannelTypeExt6db,                                      ///< Extended 6dB
-  ChannelTypeExt8db,                                      ///< Extended 8dB
-  MaxChannelType                                          ///< Not valid value, used to verify input
-} PCIE_CHANNEL_TYPE;
-
-/// PCIe link ASPM
-typedef enum {
-  AspmDisabled,                                           ///< Disabled
-  AspmL0s,                                                ///< PCIe L0s link state
-  AspmL1,                                                 ///< PCIe L1 link state
-  AspmL0sL1,                                              ///< PCIe L0s & L1 link state
-  MaxAspm                                                 ///< Not valid value, used to verify input
-} PCIE_ASPM_TYPE;
-
-/// PCIe link hotplug support
-typedef enum {
-  HotplugDisabled,                                        ///< Hotplug disable
-  HotplugBasic,                                           ///< Basic Hotplug
-  HotplugServer,                                          ///< Server Hotplug
-  HotplugEnhanced,                                        ///< Enhanced
-  HotplugInboard,                                         ///< Inboard
-  MaxHotplug                                              ///< Not valid value, used to verify input
-} PCIE_HOTPLUG_TYPE;
-
-/// PCIe link initialization
-typedef enum {
-  PortDisabled,                                           ///< Disable
-  PortEnabled                                             ///< Enable
-} PCIE_PORT_ENABLE;
-
-/// PCIe ACS capability - Access Control Services
-typedef enum  {
-  PcieAcsDisabled,                                        ///< Disabled
-  PcieAcsEnabled,                                         ///< Enabled
-} PCIE_ACS_CAP;
-
-/// PCIe ClkPmSupport initialization
-typedef enum {
-  ClkPmSupportDisabled,                                   ///< Disable
-  ClkPmSupportEnabled                                     ///< Enable
-} CLKPM_SUPPORT_ENABLE;
-
-/// DDI Aux channel
-typedef enum {
-  Aux1,                                                   ///< Aux1
-  Aux2,                                                   ///< Aux2
-  Aux3,                                                   ///< Aux3
-  Aux4,                                                   ///< Aux4
-  Aux5,                                                   ///< Aux5
-  Aux6,                                                   ///< Aux6
-  MaxAux                                                  ///< Not valid value, used to verify input
-} PCIE_AUX_TYPE;
-
-/// DDI Hdp Index
-typedef enum {
-  Hdp1,                                                   ///< Hdp1
-  Hdp2,                                                   ///< Hdp2
-  Hdp3,                                                   ///< Hdp3
-  Hdp4,                                                   ///< Hdp4
-  Hdp5,                                                   ///< Hdp5
-  Hdp6,                                                   ///< Hdp6
-  MaxHdp                                                  ///< Not valid value, used to verify input
-} PCIE_HDP_TYPE;
-
-/// PCIe_DDI_DATA.Flags definitions
-#define DDI_DATA_FLAGS_DP1_1_ONLY   0x01                  ///< BIT[0] Selects downgrade PHY link to DP1.1
-#define EXT_DISPLAY_PATH_CAPS_DP_FIXED_VS_EN 0x02         ///< BIT[1] VBIOS will always output fixed voltage swing during DP link training
-/// DP receiver definitions with fixed voltage swing
-typedef enum {
-  DP_VS_0_4V_0DB,                                         ///< 0x00
-  DP_VS_0_6V_0DB,                                         ///< 0x01
-  DP_VS_0_8V_0DB,                                         ///< 0x02
-  DP_VS_1_2V_0DB,                                         ///< 0x03
-  DP_VS_0_4V_3_5DB = 0x8,                                 ///< 0x08
-  DP_VS_0_6V_3_5DB,                                       ///< 0x09
-  DP_VS_0_8V_3_5DB,                                       ///< 0x0a
-  DP_VS_0_4V_6DB = 0x10,                                  ///< 0x10
-  DP_VS_0_6V_6DB,                                         ///< 0x11
-  DP_VS_0_4V_9_5DB = 0x18                                 ///< 0x18
-} DP_FIXED_VOLT_SWING_TYPE;
-
-// Macro for statically initializing various structures
-#define  PCIE_ENGINE_DATA_INITIALIZER(mType, mStartLane, mEndLane) {mType, mStartLane, mEndLane}
-#define  PCIE_PORT_DATA_INITIALIZER(mPortPresent, mChannelType, mDevAddress, mHotplug, mMaxLinkSpeed, mMaxLinkCap, mAspm, mResetId) \
-{mPortPresent, mChannelType, mDevAddress, 0, mMaxLinkSpeed, mAspm, mHotplug, mResetId, {0, mMaxLinkCap, 0, 0}, {0, 0, 0}, EndpointDetect, \
-{ADAPT_IOC_ENABLED, ADAPT_DFE_CONTROL_DISABLED, ADAPT_LEQ_CONTROL_DC_GAIN_POLE, ADAPT_DOC_DISABLED, ADAPT_FOMC_ENABLED, ADAPT_PIOC_DISABLED}}
-#define  PCIE_PORT_DATA_INITIALIZER_V2(mPortPresent, mChannelType, mDevAddress, mDevFunction, mHotplug, mMaxLinkSpeed, mMaxLinkCap, mAspm, mResetId, mClkPmSupport) \
-{mPortPresent, mChannelType, mDevAddress, mDevFunction, mMaxLinkSpeed, mAspm, mHotplug, mResetId, {0, mMaxLinkCap, 0, mClkPmSupport}, {0, 0, 0}, EndpointDetect, \
-{ADAPT_IOC_ENABLED, ADAPT_DFE_CONTROL_DISABLED, ADAPT_LEQ_CONTROL_DC_GAIN_POLE, ADAPT_DOC_DISABLED, ADAPT_FOMC_ENABLED, ADAPT_PIOC_DISABLED}}
-#define  PCIE_PORT_DATA_INITIALIZER_GEN3(mPortPresent, mChannelType, mDevAddress, mDevFunction, mHotplug, mMaxLinkSpeed, mMaxLinkCap, mAspm, mResetId, mClkPmSupport, \
-mInitOffsetCancellation, mDFEControl, mLEQControl, mDynamicOffsetCalibration, mFOMCalculation, mPIOffsetCalibration) \
-{mPortPresent, mChannelType, mDevAddress, mDevFunction, mMaxLinkSpeed, mAspm, mHotplug, mResetId, {0, mMaxLinkCap, 0, mClkPmSupport}, {0, 0, 0}, EndpointDetect, \
-{mInitOffsetCancellation, mDFEControl, mLEQControl, mDynamicOffsetCalibration, mFOMCalculation, mPIOffsetCalibration}}
-#define  PCIE_DDI_DATA_INITIALIZER(mConnectorType, mAuxIndex, mHpdIndex ) \
-{mConnectorType, mAuxIndex, mHpdIndex, {{0},{0}}, 0, 0}
-#define  PCIE_DDI_DATA_INITIALIZER_V1(mConnectorType, mAuxIndex, mHpdIndex, mMapping0, mMapping1, mPNInversion) \
-{mConnectorType, mAuxIndex, mHpdIndex, {mMapping0, mMapping1}, mPNInversion, 0}
-#define  PCIE_DDI_DATA_INITIALIZER_V2(mConnectorType, mAuxIndex, mHpdIndex, mMapping0, mMapping1, mPNInversion, mFlags) \
-{mConnectorType, mAuxIndex, mHpdIndex, {mMapping0, mMapping1}, mPNInversion, mFlags}
-
-///IOMMU requestor ID
-typedef struct {
-  IN       UINT16     Bus       :8;                                ///< Bus
-  IN       UINT16     Device    :5;                                ///< Device
-  IN       UINT16     Function  :3;                                ///< Function
-} IOMMU_REQUESTOR_ID;
-
-/// IVMD exclusion range descriptor
-typedef struct {
-  IN       UINT32               Flags;                    /**< Descriptor flags
-                                                           * @li @b Flags[31] - Terminate descriptor array.
-                                                           * @li @b Flags[30] - Ignore descriptor.
-                                                           */
-  IN       IOMMU_REQUESTOR_ID   RequestorIdStart;         ///< Requestor ID start
-  IN       IOMMU_REQUESTOR_ID   RequestorIdEnd;           ///< Requestor ID end (use same as start for single ID)
-  IN       UINT64               RangeBaseAddress;         ///< Phisical base address of exclusion range
-  IN       UINT64               RangeLength;              ///< Length of exclusion range in bytes
-} IOMMU_EXCLUSION_RANGE_DESCRIPTOR;
-
-/*----------------------------------------------------------------------------
- *   GNB configuration info
- *----------------------------------------------------------------------------
- */
-
-/// LVDS Misc Control Field
-typedef struct {
-  IN  UINT8     FpdiMode:1;          ///< This item configures LVDS 888bit panel mode
-                                     ///< @li FALSE = LVDS 888 panel in LDI mode
-                                     ///< @li TRUE =  LVDS 888 panel in FPDI mode
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_888_FPDI_MODE}
-  IN  UINT8     DlChSwap:1;          ///< This item configures LVDS panel lower and upper link mapping
-                                     ///< @li FALSE = Lower link and upper link not swap
-                                     ///< @li TRUE = Lower link and upper link are swapped
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_DL_CH_SWAP}
-  IN  UINT8     VsyncActiveLow:1;    ///< This item configures polarity of frame pulse encoded in lvds data stream
-                                     ///< @li FALSE = Active high Frame Pulse/Vsync
-                                     ///< @li TRUE = Active low Frame Pulse/Vsync
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_VSYNC_ACTIVE_LOW}
-  IN  UINT8     HsyncActiveLow:1;    ///< This item configures polarity of line pulse encoded in lvds data
-                                     ///< @li FALSE = Active high Line Pulse
-                                     ///< @li TRUE = Active low Line Pulse / Hsync
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_HSYNC_ACTIVE_LOW}
-  IN  UINT8     BLONActiveLow:1;     ///< This item configures polarity of signal sent to digital BLON output pin
-                                     ///< @li FALSE = Not inverted(active high)
-                                     ///< @li TRUE = Inverted (active low)
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_BLON_ACTIVE_LOW}
-  IN  UINT8     LvdsVoltOverwriteEn:1;  ///< This item configures polarity of DP-to-LVDS output voltage overwrite
-                                        ///< @li FALSE = DP-to-LVDS output voltage overwrite disable, use VBIOS default setting.
-                                        ///< @li TRUE = Use ucLVDSVolAdjust value to program register LVDS_CTRL_4
-                                        ///< @BldCfgItem{BLDCFG_LVDS_MISC_VOLT_OVERWRITE_ENABLE}
-  IN  UINT8     Reserved:2;          ///< Reserved
-} LVDS_MISC_CONTROL_FIELD;
-
-/// LVDS Misc Control
-typedef union _LVDS_MISC_CONTROL {
-  IN LVDS_MISC_CONTROL_FIELD Field;  ///< LVDS_MISC_CONTROL_FIELD
-  IN UINT8   Value;                  ///< LVDS Misc Control Value
-} LVDS_MISC_CONTROL;
-
-/// Display Misc Control Field
-typedef struct {
-  IN  UINT8     Reserved1:3;                  ///< Reserved
-  IN  UINT8     VbiosFastBootEn:1;            ///< This item configures VBIOS skip display device detection in every set mode if LCD panel is connect and LID is open.
-                                              ///< @li FALSE = VBIOS fast boot is disable.
-                                              ///< @li TRUE = VBIOS fast boot is enable.
-                                              ///< @BldCfgItem{BLDCFG_DISPLAY_MISC_VBIOS_FAST_BOOT_ENABLE}
-  IN  UINT8     Reserved2:4;                  ///< Reserved
-} DISPLAY_MISC_CONTROL_FIELD;
-
-/// LVDS Misc Control
-typedef union _DISPLAY_MISC_CONTROL {
-  IN DISPLAY_MISC_CONTROL_FIELD Field;  ///< DISPLAY_MISC_CONTROL_FIELD
-  IN UINT8   Value;                     ///< Display Misc Control Value
-} DISPLAY_MISC_CONTROL;
-
-/// POST Configuration settings for GNB.
-typedef struct {
-  IN UINT8       IgpuEnableDisablePolicy;   ///< This item defines the iGPU Enable/Disable policy
-                                            ///< @li 0 = Auto - use existing default -
-                                            ///< @li 1 = Disable iGPU if any PCIe/PCI graphics card present
-                                            ///< @BldCfgItem{BLDCFG_IGPU_ENABLE_DISABLE_POLICY}
-} GNB_POST_CONFIGURATION;
-
-/// iGPU Enable/Disable Policy values
-#define IGPU_DISABLE_AUTO        0        ///< Auto setting - disable iGPU if ANY PCI graphics or non-AMD PCIe graphics
-#define IGPU_DISABLE_ANY_PCIE    1        ///< Disable iGPU if any PCI or PCIE graphics card is present
-
-/// ENV Configuration settings for GNB.
-typedef struct {
-  IN  UINT8     Gnb3dStereoPinIndex;      ///< 3D Stereo Pin ID.
-                                          ///< @li 0 = Stereo 3D is disabled (default).
-                                          ///< @li 1 = Use processor pin HPD1.
-                                          ///< @li 2 = Use processor pin HPD2
-                                          ///< @li 3 = Use processor pin HPD3
-                                          ///< @li 4 = Use processor pin HPD4
-                                          ///< @li 5 = Use processor pin HPD5
-                                          ///< @li 6 = Use processor pin HPD6
-                                          ///< @BldCfgItem{BLDCFG_STEREO_3D_PINOUT}
-  IN  BOOLEAN    IommuSupport;            ///< IOMMU support.
-                                          ///< @li FALSE = Disabled. Disable and hide IOMMU device.
-                                          ///< @li TRUE  = Initialize IOMMU subsystem. Generate ACPI IVRS table.
-                                          ///< BldCfgItem{BLDCFG_IOMMU_SUPPORT}
-  IN  UINT16     LvdsSpreadSpectrum;      ///< Spread spectrum value in 0.01 %
-                                          ///< BldCfgItem{BLDCFG_GFX_LVDS_SPREAD_SPECTRUM}
-  IN  UINT16     LvdsSpreadSpectrumRate;  ///< Spread spectrum frequency used by SS hardware logic in unit of 10Hz, 0 - default frequency 40kHz
-                                          ///< BldCfgItem{BLDCFG_GFX_LVDS_SPREAD_SPECTRUM_RATE}
-  IN  UINT8      LvdsPowerOnSeqDigonToDe;    ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_DIGON_TO_DE}
-  IN  UINT8      LvdsPowerOnSeqDeToVaryBl;   ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_DE_TO_VARY_BL}
-  IN  UINT8      LvdsPowerOnSeqDeToDigon;    ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_DE_TO_DIGON}
-  IN  UINT8      LvdsPowerOnSeqVaryBlToDe;   ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWERS_ON_SEQ_VARY_BL_TO_DE}
-  IN  UINT8      LvdsPowerOnSeqOnToOffDelay; ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_ON_TO_OFF_DELAY}
-  IN  UINT8      LvdsPowerOnSeqVaryBlToBlon; ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_VARY_BL_TO_BLON}
-  IN  UINT8      LvdsPowerOnSeqBlonToVaryBl; ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_BLON_TO_VARY_BL}
-  IN  UINT16     LvdsMaxPixelClockFreq;      ///< This item configures the maximum pixel clock frequency supported.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_MAX_PIXEL_CLOCK_FREQ}
-  IN  UINT32     LcdBitDepthControlValue;    ///< This item configures the LCD bit depth control settings.
-                                             ///< @BldCfgItem{BLDCFG_LCD_BIT_DEPTH_CONTROL_VALUE}
-  IN  UINT8      Lvds24bbpPanelMode;         ///< This item configures the LVDS 24 BBP mode.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_24BBP_PANEL_MODE}
-  IN  LVDS_MISC_CONTROL      LvdsMiscControl;///< This item configures LVDS swap/Hsync/Vsync/BLON
-  IN  UINT16     PcieRefClkSpreadSpectrum;   ///< Spread spectrum value in 0.01 %
-                                             ///< @BldCfgItem{BLDCFG_PCIE_REFCLK_SPREAD_SPECTRUM}
-  IN  BOOLEAN    GnbRemoteDisplaySupport;    ///< This item enables Wireless Display Support
-                                             ///< @li TRUE  = Enable Wireless Display Support
-                                             ///< @li FALSE = Disable Wireless Display Support
-                                             ///< @BldCfgItem{BLDCFG_REMOTE_DISPLAY_SUPPORT}
-  IN UINT8       LvdsMiscVoltAdjustment;     ///< Register LVDS_CTRL_4 to adjust LVDS output voltage
-                                             ///< @BldCfgItem{BLDCFG_LVDS_MISC_VOL_ADJUSTMENT}
-  IN DISPLAY_MISC_CONTROL DisplayMiscControl;///< This item configures display misc control
-  IN DP_FIXED_VOLT_SWING_TYPE DpFixedVoltSwingType;///< To indicate fixed voltage swing value
-                                                   ///< @BldCfgItem{BLDCFG_DP_FIXED_VOLT_SWING}
-  IN  UINT32    GpuFrequencyLimit;           ///< GNB GPU Max Frequency(NULL if platform configured)
-                                             ///< @BldCfgItem{BLDCFG_GPU_FREQUENCY_LIMIT}
-} GNB_ENV_CONFIGURATION;
-
-/// Configuration settings for GNB.
-typedef struct {
-  IN  UINT8     iGpuVgaMode;                 ///< VGA resources decoding configuration for iGPU
-                                             ///< @li 0 = iGPU decode all VGA resources (must be primary VGA adapter)
-                                             ///< @li 1 = iGPU will not decode any VGA resources (must be secondary graphics adapter)
-  IN  UINT8     PcieAcsCapability;           ///< Pcie ACS Capability support
-                                             ///< @li 0 = Disabled
-                                             ///< @li 1 = Enabled
-  IN  UINT64    GnbIoapicAddress;            ///< GNB IOAPIC Base Address(NULL if platform configured)
-                                             ///< @BldCfgItem{BLDCFG_GNB_IOAPIC_ADDRESS}
-} GNB_MID_CONFIGURATION;
-
-/// GNB configuration info
-typedef struct {
-  IN       const PCIe_COMPLEX_DESCRIPTOR  *PcieComplexList;  /**< Pointer to array of structures describe PCIe topology on each processor package or NULL.
-                                                        * Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST
-                                                        * Example of topology definition for single socket system:
-                                                        * @code
-                                                        *  PCIe_PORT_DESCRIPTOR PortList [] = {
-                                                        *    // Initialize Port descriptor (PCIe port, Lanes 8:15, PCI Device Number 2, ...)
-                                                        *    {
-                                                        *      0,   //Descriptor flags
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 8, 15),
-                                                        *      PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 2, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
-                                                        *    },
-                                                        *    // Initialize Port descriptor (PCIe port, Lanes 16:19, PCI Device Number 3, ...)
-                                                        *    {
-                                                        *      0,   //Descriptor flags
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 16, 19),
-                                                        *      PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 3, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
-                                                        *    },
-                                                        *    // Initialize Port descriptor (PCIe port, Lanes 4, PCI Device Number 4, ...)
-                                                        *    {
-                                                        *      DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate last element of array
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 4, 4),
-                                                        *      PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 4, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
-                                                        *    }
-                                                        *  };
-                                                        *  PCIe_PORT_DESCRIPTOR DdiList [] = {
-                                                        *    // Initialize Ddi descriptor (DDI interface Lanes 24:27, Display Port Connector, ...)
-                                                        *    {
-                                                        *      0,   //Descriptor flags
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1, 0)
-                                                        *    },
-                                                        *    // Initialize Ddi descriptor (DDI interface Lanes 28:31, HDMI, ...)
-                                                        *    {
-                                                        *      DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate last element of array
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 28, 31),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2, 0)
-                                                        *    }
-                                                        *  };
-                                                        * PCIe_COMPLEX_DESCRIPTOR PlatformTopology = {
-                                                        *   DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate complexes list
-                                                        *   0,  //Socket ID
-                                                        *   &PortList[0],
-                                                        *   &DdiList[0],
-                                                        * }
-                                                        * @endcode
-                                                        */
-  IN       UINT8                    PsppPolicy;         /**< PSPP (PCIe Speed Power Policy)
-                                                         *  @li @b 0 - Disabled
-                                                         *  @li @b 1 - Performance
-                                                         *  @li @b 2 - Balance-High
-                                                         *  @li @b 3 - Balance-Low
-                                                         *  @li @b 4 - Power Saving
-                                                         */
-
-} GNB_CONFIGURATION;
-
-/// Late Configuration settings for GNB.
-typedef struct {
-  IN        BOOLEAN                 DockedTdpHeadroom;  ///< Docked TDP headroom
-                                                        ///< @li TRUE  = Enable docked TDP headroom
-                                                        ///< @li FALSE = Disable docked TDP headroom
-                                                        ///< @BldCfgItem{BLDCFG_DOCKED_TDP_HEADROOM}
-  IN        UINT8                   GnbIoapicId;        ///< GNB IOAPIC ID, platform BIOS needs to pass correct id number, default is 0xFF.
-                                                        ///< If BLDCFG_GNB_IOAPIC_ADDRESS == NULL or BLDCFG_IOMMU_SUPPORT == NULL or GnbIoapicId == default(0xFF), AGESA will skip it anyway.
-                                                        ///< @li 0~n = IOAPIC ID number for IVRS which should be matched with MADT
-  IN        UINT8                   FchIoapicId;        ///< Fch IOAPIC ID, platform BIOS needs to pass correct id number, default is 0xFF.
-                                                        ///< If BLDCFG_IOMMU_SUPPORT == NULL or or FchIoapicId == default(0xFF), AGESA will skip it anyway.
-                                                        ///< @li 0~n = IOAPIC ID number for IVRS which should be matched with MADT
-
-} GNB_LATE_CONFIGURATION;
-
-//
-//  MEMORY-SPECIFIC DATA STRUCTURES
-//
-//
-//
-//
-// AGESA MAXIMIUM VALUES
-//
-//   These Max values are used to define array sizes and associated loop
-//   counts in the code.  They reflect the maximum values that AGESA
-//   currently supports and does not necessarily reflect the hardware
-//   capabilities of configuration.
-//
-
-#define MAX_SOCKETS_SUPPORTED   1   ///< Max number of sockets in system
-#define MAX_CHANNELS_PER_SOCKET 4   ///< Max Channels per sockets
-#define MAX_DIMMS_PER_CHANNEL   4   ///< Max DIMMs on a memory channel (independent of platform)
-#define NUMBER_OF_DELAY_TABLES  9   ///< Number of tables defined in CH_DEF_STRUCT.
-                                    ///< Eg: UINT16  *RcvEnDlys;
-                                    ///<     UINT8   *WrDqsDlys;
-                                    ///<     UINT8   *RdDqsDlys;
-                                    ///<     UINT8   *WrDatDlys;
-                                    ///<     UINT8   *RdDqsMinDlys;
-                                    ///<     UINT8   *RdDqsMaxDlys;
-                                    ///<     UINT8   *WrDatMinDlys;
-                                    ///<     UINT8   *WrDatMaxDlys;
-#define NUMBER_OF_FAILURE_MASK_TABLES 1 ///< Number of failure mask tables
-
-#define MAX_PLATFORM_TYPES     16   ///< Platform types per system
-
-#define MCT_TRNG_KEEPOUT_START  0x00004000ul    ///< base [39:8]
-#define MCT_TRNG_KEEPOUT_END    0x00007FFFul    ///< base [39:8]
-#define DATAEYE_VREF_RANGE     31   ///< Number of VREF steps in Data Eye Bitmap
-
-#define UMA_ATTRIBUTE_INTERLEAVE 0x80000000ul   ///< Uma Region is interleaved
-#define UMA_ATTRIBUTE_ON_DCT0    0x40000000ul   ///< UMA resides on memory that belongs to DCT0
-#define UMA_ATTRIBUTE_ON_DCT1    0x20000000ul   ///< UMA resides on memory that belongs to DCT1
-#define UMA_ATTRIBUTE_ON_DCT2    0x10000000ul   ///< UMA resides on memory that belongs to DCT2
-#define UMA_ATTRIBUTE_ON_DCT3    0x08000000ul   ///< UMA resides on memory that belongs to DCT3
-
-typedef UINT8 PSO_TABLE;            ///< Platform Configuration Table
-
-//        AGESA DEFINITIONS
-//
-//        Many of these are derived from the platform and hardware specific definitions
-
-/// EccSymbolSize override value
-#define ECCSYMBOLSIZE_USE_BKDG      0   ///< Use BKDG Recommended Value
-#define ECCSYMBOLSIZE_FORCE_X4      4   ///< Force to x4
-#define ECCSYMBOLSIZE_FORCE_X8      8   ///< Force to x8
-/// CPU Package Type
-#define PT_L1       0                 ///< L1 Package type
-#define PT_M2       1                 ///< AM Package type
-#define PT_S1       2                 ///< S1 Package type
-
-/// Build Configuration values for BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT & BLDCFG_MEMORY_CLOCK_SELECT
-#define DDR400_FREQUENCY  200     ///< DDR 400
-#define DDR533_FREQUENCY  266     ///< DDR 533
-#define DDR667_FREQUENCY  333     ///< DDR 667
-#define DDR800_FREQUENCY  400     ///< DDR 800
-#define DDR1066_FREQUENCY 533     ///< DDR 1066
-#define DDR1333_FREQUENCY 667     ///< DDR 1333
-#define DDR1600_FREQUENCY 800     ///< DDR 1600
-#define DDR1866_FREQUENCY 933     ///< DDR 1866
-#define DDR2100_FREQUENCY 1050    ///< DDR 2100
-#define DDR2133_FREQUENCY 1066    ///< DDR 2133
-#define DDR2400_FREQUENCY 1200    ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
-
-/// Build Configuration values for BLDCFG_TIMING_MODE_SELECT
-#define TIMING_MODE_AUTO     0  ///< Use best rate possible
-#define TIMING_MODE_LIMITED  1  ///< Set user top limit
-#define TIMING_MODE_SPECIFIC 2  ///< Set user specified speed
-
-/// Build Configuration values for BLDCFG_MEMORY_QUADRANK_TYPE
-#define QUADRANK_REGISTERED  0  ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED  1  ///< Quadrank unbuffered DIMM
-
-/// Build Configuration values for BLDCFG_POWER_DOWN_MODE
-#define POWER_DOWN_BY_CHANNEL      0  ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT  1  ///< Chip select power down mode
-#define POWER_DOWN_MODE_AUTO       2  ///< AGESA to select power down mode
-
-/// Build Configuration limit for BLDCFG_GNB_GPU_MAX_FREQUENCY
-#define UNSUPPORTED_GPU_FREQUENCY 901 ///< Highest limit of GPU frequency
-
-/// Structures use to pass system Logical CPU-ID
-typedef struct {
-  IN OUT   UINT64 Family;             ///< Indicates logical ID Family
-  IN OUT   UINT64 Revision;           ///< Indicates logical ID Family
-} CPU_LOGICAL_ID;
-
-/// Structures use to report AMP status
-typedef struct {
-  OUT   BOOLEAN AmpVoltageValid;                 ///< Indicates if Amp voltage is valid
-  OUT   BOOLEAN AmpSupportDetectedButNotEnabled; ///< Indicates if Amp support is detected but not enabled
-  OUT   BOOLEAN AmpSelectedButNotEnabled;        ///< Indicates if Amp is selected but not enabled
-} AMP_STATUS;
-
-/// Normalized Critical Composite Data Eye
-///  Bit 15 represents trained eye Center
-///  Bit 0  represents eye center -15 delay steps
-///  Bit 31 represents eye center +16 delay steps
-///  Offset 0  represents +15 Vref Steps
-///  Offset 31  represents -15 Vref Steps
-typedef UINT32 COMPOSITE_DATAEYE[DATAEYE_VREF_RANGE];
-
-/// Build Configuration values for BLDCFG_AMD_PLATFORM_TYPE
-typedef enum {
-  AMD_PLATFORM_SERVER = 0x8000,     ///< Server
-  AMD_PLATFORM_DESKTOP = 0x10000,   ///< Desktop
-  AMD_PLATFORM_MOBILE = 0x20000,    ///< Mobile
-} AMD_PLATFORM_TYPE;
-
-/// Dram technology type
-typedef enum {
-  DDR2_TECHNOLOGY,        ///< DDR2 technology
-  DDR3_TECHNOLOGY,        ///< DDR3 technology
-  GDDR5_TECHNOLOGY,       ///< GDDR5 technology
-  UNSUPPORTED_TECHNOLOGY, ///< Unsupported technology
-} TECHNOLOGY_TYPE;
-
-/// Low voltage support
-typedef enum {
-  VOLT_INITIAL,              ///< Initial value for VDDIO
-  VOLT1_5,                   ///< 1.5 Volt
-  VOLT1_35,                  ///< 1.35 Volt
-  VOLT1_25,                  ///< 1.25 Volt
-  VOLT_UNSUPPORTED = 0xFF    ///< No common voltage found
-} DIMM_VOLTAGE;
-
-/// AMP voltage support
-typedef enum {
-  AMP_VOLT_RSVD,             ///< Reserved
-  AMP_VOLT1_5,               ///< 1.5 Volt
-  AMP_VOLT1_55,              ///< 1.55 Volt
-  AMP_VOLT1_6,               ///< 1.6 Volt
-  AMP_VOLT1_65,              ///< 1.65 Volt
-  AMP_VOLT1_7,               ///< 1.7 Volt
-  AMP_VOLT1_75,              ///< 1.75 Volt
-  AMP_VOLT1_8,               ///< 1.8 Volt
-  AMP_VOLT1_85,              ///< 1.85 Volt
-  AMP_VOLT1_9,               ///< 1.9 Volt
-  AMP_VOLT1_45 = 0x10,       ///< 1.45 Volt
-  AMP_VOLT1_4  = 0x20,       ///< 1.4 Volt
-  AMP_VOLT1_35 = 0x30,       ///< 1.35 Volt
-  AMP_VOLT1_3  = 0x40,       ///< 1.3 Volt
-  AMP_VOLT1_25 = 0x50,       ///< 1.25 Volt
-  AMP_VOLT1_2  = 0x60        ///< 1.2 Volt
-} AMP_DIMM_VOLTAGE;
-
-/// Build Configuration values for BLDCFG_ACP_SIZE
-typedef enum {
-  NO_ACP_SIZE = 0x00,        ///< NO ACP
-  ACP_SIZE_2MB = 0x20,       ///< UMA 4MB aligned
-  ACP_SIZE_4MB = 0x40,       ///< UMA 128MB aligned
-} ACP_SIZE;
-
-/// UMA Mode
-typedef enum {
-  UMA_NONE = 0,              ///< UMA None
-  UMA_SPECIFIED = 1,         ///< UMA Specified
-  UMA_AUTO = 2               ///< UMA Auto
-} UMA_MODE;
-
-/// Force Training Mode
-typedef enum {
-  FORCE_TRAIN_1D = 0,              ///< 1D Training only
-  FORCE_TRAIN_2D = 1,              ///< 2D Training only
-  FORCE_TRAIN_AUTO = 2             ///< Auto - 1D or 2D depending on configuration
-} FORCE_TRAIN_MODE;
-
-/// PMU Training Mode
-typedef enum {
-  PMU_TRAIN_1D = 0,                ///< PMU 1D Training only
-  PMU_TRAIN_1D_2D_READ = 1,        ///< PMU 1D and 2D Training read only
-  PMU_TRAIN_1D_2D = 2,             ///< PMU 1D and 2D Training
-  PMU_TRAIN_AUTO = 3               ///< Auto - PMU Training depend on configuration
-} PMU_TRAIN_MODE;
-
-///  The possible DRAM prefetch mode settings.
-typedef enum  {
-  DRAM_PREFETCHER_AUTO,                         ///< Use the recommended setting for the processor. In most cases, the recommended setting is enabled.
-  DISABLE_DRAM_PREFETCH_FOR_IO,                 ///< Disable DRAM prefetching for I/O requests only.
-  DISABLE_DRAM_PREFETCH_FOR_CPU,                ///< Disable DRAM prefetching for requests from processor cores only.
-  DISABLE_DRAM_PREFETCHER,                      ///< Disable DRAM prefetching.
-  MAX_DRAM_FREFETCH_MODE                        ///< Not a DRAM prefetch mode, use for limit checking.
-} DRAM_PREFETCH_MODE;
-
-/// Build Configuration values for BLDCFG_UMA_ALIGNMENT
-typedef enum {
-  NO_UMA_ALIGNED = 0x00FFFFFF,           ///< NO UMA aligned
-  UMA_4MB_ALIGNED = 0x00FFFFC0,          ///< UMA 4MB aligned
-  UMA_128MB_ALIGNED = 0x00FFF800,        ///< UMA 128MB aligned
-  UMA_256MB_ALIGNED = 0x00FFF000,        ///< UMA 256MB aligned
-  UMA_512MB_ALIGNED = 0x00FFE000,        ///< UMA 512MB aligned
-} UMA_ALIGNMENT;
-
-///
-///   Global MCT Configuration Status Word (GStatus)
-///
-typedef enum {
-  GsbMTRRshort,              ///< Ran out of MTRRs while mapping memory
-  GsbAllECCDimms,            ///< All banks of all Nodes are ECC capable
-  GsbDramECCDis,             ///< Dram ECC requested but not enabled.
-  GsbSoftHole,               ///< A Node Base gap was created
-  GsbHWHole,                 ///< A HW dram remap was created
-  GsbNodeIntlv,              ///< Node Memory interleaving was enabled
-  GsbSpIntRemapHole,         ///< Special condition for Node Interleave and HW remapping
-  GsbEnDIMMSpareNW,          ///< Indicates that DIMM Spare can be used without a warm reset
-
-  GsbEOL                     ///< End of list
-} GLOBAL_STATUS_FIELD;
-
-///
-///   Local Error Status (DIE_STRUCT.ErrStatus[31:0])
-///
-typedef enum {
-  EsbNoDimms,                  ///< No DIMMs
-  EsbSpdChkSum,                ///< SPD Checksum fail
-  EsbDimmMismatchM,            ///< dimm module type(buffer) mismatch
-  EsbDimmMismatchT,            ///< dimm CL/T mismatch
-  EsbDimmMismatchO,            ///< dimm organization mismatch (128-bit)
-  EsbNoTrcTrfc,                ///< SPD missing Trc or Trfc info
-  EsbNoCycTime,                ///< SPD missing byte 23 or 25
-  EsbBkIntDis,                 ///< Bank interleave requested but not enabled
-  EsbDramECCDis,               ///< Dram ECC requested but not enabled
-  EsbSpareDis,                 ///< Online spare requested but not enabled
-  EsbMinimumMode,              ///< Running in Minimum Mode
-  EsbNoRcvrEn,                 ///< No DQS Receiver Enable pass window found
-  EsbSmallRcvr,                ///< DQS Rcvr En pass window too small (far right of dynamic range)
-  EsbNoDqsPos,                 ///< No DQS-DQ passing positions
-  EsbSmallDqs,                 ///< DQS-DQ passing window too small
-  EsbDCBKScrubDis,             ///< DCache scrub requested but not enabled
-
-  EsbEMPNotSupported,          ///< Processor is not capable for EMP.
-  EsbEMPConflict,               ///< EMP requested but cannot be enabled since
-                               ///< channel interleaving, bank interleaving, or bank swizzle is enabled.
-  EsbEMPDis,                   ///< EMP requested but cannot be enabled since
-                               ///< memory size of each DCT is not a power of two.
-
-  EsbEOL                       ///< End of list
-} ERROR_STATUS_FIELD;
-
-///
-///  Local Configuration Status (DIE_STRUCT.Status[31:0])
-///
-typedef enum {
-  SbRegistered,                ///< All DIMMs are Registered
-  SbEccDimms,                  ///< All banks ECC capable
-  SbParDimms,                  ///< All banks Addr/CMD Parity capable
-  SbDiagClks,                  ///< Jedec ALL slots clock enable diag mode
-  Sb128bitmode,                ///< DCT in 128-bit mode operation
-  Sb64MuxedMode,               ///< DCT in 64-bit mux'ed mode.
-  Sb2TMode,                    ///< 2T CMD timing mode is enabled.
-  SbSWNodeHole,                ///< Remapping of Node Base on this Node to create a gap.
-  SbHWHole,                    ///< Memory Hole created on this Node using HW remapping.
-  SbOver400Mhz,                ///< DCT freq greater than or equal to 400MHz flag
-  SbDQSPosPass2,               ///< Used for TrainDQSPos DIMM0/1, when freq greater than or equal to 400MHz
-  SbDQSRcvLimit,               ///< Used for DQSRcvEnTrain to know we have reached the upper bound.
-  SbExtConfig,                 ///< Indicate the default setting for extended PCI configuration support
-  SbLrdimms,                   ///< All DIMMs are LRDIMMs
-
-  SbEOL                        ///< End of list
-} LOCAL_STATUS_FIELD;
-
-
-///< CPU MSR Register definitions ------------------------------------------
-#define SYS_CFG     0xC0010010ul
-#define TOP_MEM     0xC001001Aul
-#define TOP_MEM2    0xC001001Dul
-#define HWCR        0xC0010015ul
-#define NB_CFG      0xC001001Ful
-
-#define FS_BASE     0xC0000100ul
-#define IORR0_BASE  0xC0010016ul
-#define IORR0_MASK  0xC0010017ul
-#define BU_CFG      0xC0011023ul
-#define BU_CFG2     0xC001102Aul
-#define COFVID_STAT 0xC0010071ul
-#define TSC         0x10
-
-//-----------------------------------------------------------------------------
-///
-/// SPD Data for each DIMM.
-///
-typedef struct _SPD_DEF_STRUCT {
-  IN BOOLEAN DimmPresent;  ///< Indicates that the DIMM is present and Data is valid
-  IN UINT8 Data[256];      ///< Buffer for 256 Bytes of SPD data from DIMM
-} SPD_DEF_STRUCT;
-
-
-//-----------------------------------------------------------------------------
-///
-/// VDDP_VDDR Voltage Info for Low Power DIMM
-///
-typedef struct _VDDP_VDDR_VOLTAGE {
-  IN BOOLEAN IsValid;               ///< Indicates if daata is valid
-  IN MEMORY_PHY_VOLTAGE Voltage;    ///< VDDP VDDR Voltage Value
-} VDDP_VDDR_VOLTAGE;
-
-///
-/// Channel Definition Structure.
-/// This data structure defines entries that are specific to the channel initialization
-///
-typedef struct _CH_DEF_STRUCT {
-  OUT UINT8   ChannelID;         ///< Physical channel ID of a socket(0 = CH A, 1 = CH B, 2 = CH C, 3 = CH D)
-  OUT TECHNOLOGY_TYPE TechType;  ///< Technology type of this channel
-  OUT UINT8   ChDimmPresent;     ///< For each bit n 0..7, 1 = DIMM n is present.
-                                 ///<  DIMM#  Select Signal
-                                 ///<  0      MA0_CS_L[0, 1]
-                                 ///<  1      MB0_CS_L[0, 1]
-                                 ///<  2      MA1_CS_L[0, 1]
-                                 ///<  3      MB1_CS_L[0, 1]
-                                 ///<  4      MA2_CS_L[0, 1]
-                                 ///<  5      MB2_CS_L[0, 1]
-                                 ///<  6      MA3_CS_L[0, 1]
-                                 ///<  7      MB3_CS_L[0, 1]
-
-  OUT struct _DCT_STRUCT *DCTPtr; ///< Pointer to the DCT data of this channel.
-  OUT struct _DIE_STRUCT *MCTPtr; ///< Pointer to the node data of this channel.
-  OUT SPD_DEF_STRUCT *SpdPtr;    ///< Pointer to the SPD data for this channel. (Setup by NB Constructor)
-  OUT SPD_DEF_STRUCT *DimmSpdPtr[MAX_DIMMS_PER_CHANNEL]; ///< Array of pointers to
-                                 ///<   SPD Data for each Dimm. (Setup by Tech Block Constructor)
-  OUT UINT8   ChDimmValid;       ///< For each bit n 0..3, 1 = DIMM n is valid and is/will be configured where 4..7 are reserved.
-                                 ///<
-  OUT UINT8   RegDimmPresent;   ///< For each bit n 0..3, 1 = DIMM n is a registered DIMM where 4..7 are reserved.
-  OUT UINT8   LrDimmPresent;     ///< For each bit n 0..3, 1 = DIMM n is Load Reduced DIMM where 4..7 are reserved.
-  OUT UINT8   SODimmPresent;     ///< For each bit n 0..3, 1 = DIMM n is a SO-DIMM, where 4..7 are reserved.
-  OUT UINT8   Loads;             ///< Number of devices loading bus
-  OUT UINT8   Dimms;             ///< Number of DIMMs loading Channel
-  OUT UINT8   Ranks;             ///< Number of ranks loading Channel DATA
-  OUT BOOLEAN SlowMode;          ///< 1T or 2T CMD mode (slow access mode)
-  OUT BOOLEAN SlowModePs1;       ///< 1T or 2T CMD mode (slow access mode) for Mem Pstate 1
-                                 ///< FALSE = 1T
-                                 ///< TRUE = 2T
-  ///< The following pointers will be pointed to dynamically allocated buffers.
-  ///< Each buffer is two dimensional (RowCount x ColumnCount) and is lay-outed as in below.
-  ///< Example: If DIMM and Byte based training, then
-  ///< XX is a value in Hex
-  ///<                        BYTE 0, BYTE 1, BYTE 2, BYTE 3, BYTE 4, BYTE 5, BYTE 6, BYTE 7, ECC BYTE
-  ///<  Row1 -  Logical DIMM0    XX      XX      XX      XX      XX      XX      XX      XX      XX
-  ///<  Row2 -  Logical DIMM1    XX      XX      XX      XX      XX      XX      XX      XX      XX
-  OUT UINT16  *RcvEnDlys;       ///< DQS Receiver Enable Delays
-  OUT UINT8   *WrDqsDlys;       ///< Write DQS delays (only valid for DDR3)
-  OUT UINT8   *RdDqsDlys;       ///< Read Dqs delays
-  OUT UINT8   *WrDatDlys;       ///< Write Data delays
-  OUT UINT8   *RdDqs2dDlys;     ///< 2d Read DQS data
-  OUT UINT8   *RdDqsMinDlys;    ///< Minimum Window for Read DQS
-  OUT UINT8   *RdDqsMaxDlys;    ///< Maximum Window for Read DQS
-  OUT UINT8   *WrDatMinDlys;    ///< Minimum Window for Write data
-  OUT UINT8   *WrDatMaxDlys;    ///< Maximum Window for Write data
-  OUT UINT16  *RcvEnDlysMemPs1;       ///< DQS Receiver Enable Delays for Mem Pstate 1
-  OUT UINT8   *WrDqsDlysMemPs1;       ///< Write DQS delays (only valid for DDR3) for Mem Pstate 1
-  OUT UINT8   *RdDqsDlysMemPs1;       ///< Read Dqs delays for Memory Pstate 1
-  OUT UINT8   *WrDatDlysMemPs1;       ///< Write Data delays for Memory Pstate 1
-  OUT UINT8   *RdDqs2dDlysMemPs1;     ///< 2d Read DQS data for Memory Pstate 1
-  OUT UINT8   *RdDqsMinDlysMemPs1;    ///< Minimum Window for Read DQS for Memory Pstate 1
-  OUT UINT8   *RdDqsMaxDlysMemPs1;    ///< Maximum Window for Read DQS for Memory Pstate 1
-  OUT UINT8   *WrDatMinDlysMemPs1;    ///< Minimum Window for Write data for Memory Pstate 1
-  OUT UINT8   *WrDatMaxDlysMemPs1;    ///< Maximum Window for Write data for Memory Pstate 1
-  OUT UINT8   RowCount;         ///< Number of rows of the allocated buffer.
-  OUT UINT8   ColumnCount;      ///< Number of columns of the allocated buffer.
-  OUT UINT8   *FailingBitMask;    ///< Table of masks to Track Failing bits
-  OUT UINT8   *FailingBitMaskMemPs1;    ///< Table of masks to Track Failing bits for Memory Pstate 1
-  OUT VOID    *RdDataEyes;        ///< Pointer to Read Data Eye Bitmaps
-  OUT VOID    *WrDataEyes;        ///< Pointer to Write Data Eye Bitmaps
-  OUT UINT32  DctOdcCtl;          ///< Output Driver Strength (see BKDG FN2:Offset 9Ch, index 00h)
-  OUT UINT32  DctAddrTmg;         ///< Address Bus Timing (see BKDG FN2:Offset 9Ch, index 04h)
-  OUT UINT32  DctAddrTmgPs1;      ///< Address Bus Timing (see BKDG FN2:Offset 9Ch, index 04h) for Mem Pstate 1
-  OUT UINT32  PhyRODTCSLow;       ///< Phy Read ODT Pattern Chip Select low (see BKDG FN2:Offset 9Ch, index 180h)
-  OUT UINT32  PhyRODTCSHigh;      ///< Phy Read ODT Pattern Chip Select high (see BKDG FN2:Offset 9Ch, index 181h)
-  OUT UINT32  PhyWODTCSLow;       ///< Phy Write ODT Pattern Chip Select low (see BKDG FN2:Offset 9Ch, index 182h)
-  OUT UINT32  PhyWODTCSHigh;      ///< Phy Write ODT Pattern Chip Select high (see BKDG FN2:Offset 9Ch, index 183)
-  OUT UINT8   PhyWLODT[4];        ///< Write Levelization ODT Pattern for Dimm 0-3 or CS 0-7(see BKDG FN2:Offset 9Ch, index 0x8[11:8])
-  OUT UINT16  DctEccDqsLike;      ///< DCT DQS ECC UINT8 like...
-  OUT UINT8   DctEccDqsScale;     ///< DCT DQS ECC UINT8 scale
-  OUT UINT16  PtrPatternBufA;     ///< Ptr on stack to aligned DQS testing pattern
-  OUT UINT16  PtrPatternBufB;     ///< Ptr on stack to aligned DQS testing pattern
-  OUT UINT8   ByteLane;           ///< Current UINT8 Lane (0..7)
-  OUT UINT8   Direction;          ///< Current DQS-DQ training write direction (0=read, 1=write)
-  OUT UINT8   Pattern;            ///< Current pattern
-  OUT UINT8   DqsDelay;           ///< Current DQS delay value
-  OUT UINT16  HostBiosSrvc1;      ///< UINT16 sized general purpose field for use by host BIOS.  Scratch space.
-  OUT UINT32  HostBiosSrvc2;      ///< UINT32 sized general purpose field for use by host BIOS.  Scratch space.
-  OUT UINT16  DctMaxRdLat[4];     ///< Max Read Latency (ns) for the DCT
-                                  ///< DctMaxRdLat [i] is for NBPstate i
-  OUT UINT8   DIMMValidCh;        ///< DIMM# in CH
-  OUT UINT8   MaxCh;              ///< Max number of CH in system
-  OUT UINT8   Dct;                ///< Dct pointer
-  OUT UINT8   WrDatGrossH;        ///< Write Data Gross delay high value
-  OUT UINT8   DqsRcvEnGrossL;     ///< DQS Receive Enable Gross Delay low
-
-  OUT UINT8   TrwtWB;             ///<  Non-SPD timing value for TrwtWB
-  OUT UINT8   CurrRcvrDctADelay;  ///< for keep current RcvrEnDly
-  OUT UINT16  T1000;              ///< get the T1000 figure (cycle time (ns) * 1K)
-  OUT UINT8   DqsRcvEnPass;       ///< for TrainRcvrEn UINT8 lane pass flag
-  OUT UINT8   DqsRcvEnSaved;      ///< for TrainRcvrEn UINT8 lane saved flag
-  OUT UINT8   SeedPass1Remainder; ///< for Phy assisted DQS receiver enable training
-
-  OUT UINT8   ClToNbFlag;         ///< is used to restore ClLinesToNbDis bit after memory
-  OUT UINT32  NodeSysBase;        ///< for channel interleave usage
-  OUT UINT8   RefRawCard[MAX_DIMMS_PER_CHANNEL];   ///< Array of rawcards detected
-  OUT UINT8   CtrlWrd02[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 2 values per DIMM
-  OUT UINT8   CtrlWrd03[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 3 values per DIMM
-  OUT UINT8   CtrlWrd04[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 4 values per DIMM
-  OUT UINT8   CtrlWrd05[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 5 values per DIMM
-  OUT UINT8   CtrlWrd08[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 8 values per DIMM
-
-  OUT UINT16  CsPresentDCT;       ///< For each bit n 0..7, 1 = Chip-select n is present
-  OUT UINT8   DimmMirrorPresent;  ///< For each bit n 0..3, 1 = DIMM n is OnDimmMirror capable where 4..7 are reserved.
-  OUT UINT8   DimmSpdCse;         ///< For each bit n 0..3, 1 = DIMM n SPD checksum error where 4..7 are reserved.
-  OUT UINT8   DimmExclude;        ///< For each bit n 0..3, 1 = DIMM n gets excluded where 4..7 are reserved.
-  OUT UINT8   DimmYr06;           ///< Bitmap indicating which Dimms have a manufacturer's year code <= 2006
-  OUT UINT8   DimmWk2406;         ///< Bitmap indicating which Dimms have a manufacturer's week code <= 24 of 2006 (June)
-  OUT UINT8   DimmPlPresent;      ///< Bitmap indicating that Planar (1) or Stacked (0) Dimms are present.
-  OUT UINT8   DimmQrPresent;      ///< QuadRank DIMM present?
-  OUT UINT8   DimmDrPresent;      ///< Bitmap indicating that Dual Rank Dimms are present
-  OUT UINT8   DimmSRPresent;      ///< Bitmap indicating that Single Rank Dimms are present
-  OUT UINT8   Dimmx4Present;      ///< For each bit n 0..3, 1 = DIMM n contains x4 data devices. where 4..7 are reserved.
-  OUT UINT8   Dimmx8Present;      ///< For each bit n 0..3, 1 = DIMM n contains x8 data devices. where 4..7 are reserved.
-  OUT UINT8   Dimmx16Present;     ///< For each bit n 0..3, 1 = DIMM n contains x16 data devices. where 4..7 are reserved.
-  OUT UINT8   LrdimmPhysicalRanks[MAX_DIMMS_PER_CHANNEL];///< Number of Physical Ranks for LRDIMMs
-  OUT UINT8   LrDimmLogicalRanks[MAX_DIMMS_PER_CHANNEL];///< Number of LRDIMM Logical ranks in this configuration
-  OUT UINT8   LrDimmRankMult[MAX_DIMMS_PER_CHANNEL];///< Rank Multipication factor per dimm.
-  OUT UINT8   DimmNibbleAccess;   ///< For each bit n 0..3, 1 = DIMM n will use nibble signaling. Where 4..7 are reserved.
-  OUT UINT8   *MemClkDisMap;      ///<  This pointer will be set to point to an array that describes
-                                  ///<  the routing of M[B,A]_CLK pins to the DIMMs' ranks. AGESA will
-                                  ///<  base on this array to disable unused MemClk to save power.
-                                  ///<
-                                  ///<  The array must have 8 entries. Each entry, which associates with
-                                  ///<  one MemClkDis bit, is a bitmap of 8 CS that that MemClk is routed to.
-                                  ///<    Example:
-                                  ///<    BKDG definition of Fn2x88[MemClkDis] bitmap for AM3 package
-                                  ///<    is like below:
-                                  ///<         Bit AM3/S1g3 pin name
-                                  ///<         0   M[B,A]_CLK_H/L[0]
-                                  ///<         1   M[B,A]_CLK_H/L[1]
-                                  ///<         2   M[B,A]_CLK_H/L[2]
-                                  ///<         3   M[B,A]_CLK_H/L[3]
-                                  ///<         4   M[B,A]_CLK_H/L[4]
-                                  ///<         5   M[B,A]_CLK_H/L[5]
-                                  ///<         6   M[B,A]_CLK_H/L[6]
-                                  ///<         7   M[B,A]_CLK_H/L[7]
-                                  ///<    And platform has the following routing:
-                                  ///<         CS0   M[B,A]_CLK_H/L[4]
-                                  ///<         CS1   M[B,A]_CLK_H/L[2]
-                                  ///<         CS2   M[B,A]_CLK_H/L[3]
-                                  ///<         CS3   M[B,A]_CLK_H/L[5]
-                                  ///<    Then MemClkDisMap should be pointed to the following array:
-                                  ///<               CLK_2 CLK_3 CLK_4 CLK_5
-                                  ///<    0x00, 0x00, 0x02, 0x04, 0x01, 0x08, 0x00, 0x00
-                                  ///<  Each entry of the array is the bitmask of 8 chip selects.
-
-  OUT UINT8   *CKETriMap;         ///<  This pointer will be set to point to an array that describes
-                                  ///<  the routing of CKE pins to the DIMMs' ranks.
-                                  ///<  The array must have 2 entries. Each entry, which associates with
-                                  ///<  one CKE pin, is a bitmap of 8 CS that that CKE is routed to.
-                                  ///<  AGESA will base on this array to disable unused CKE pins to save power.
-
-  OUT UINT8   *ODTTriMap;         ///<  This pointer will be set to point to an array that describes
-                                  ///<  the routing of ODT pins to the DIMMs' ranks.
-                                  ///<  The array must have 4 entries. Each entry, which associates with
-                                  ///<  one ODT pin, is a bitmap of 8 CS that that ODT is routed to.
-                                  ///<  AGESA will base on this array to disable unused ODT pins to save power.
-
-  OUT UINT8   *ChipSelTriMap;     ///<  This pointer will be set to point to an array that describes
-                                  ///<  the routing of chip select pins to the DIMMs' ranks.
-                                  ///<  The array must have 8 entries. Each entry is a bitmap of 8 CS.
-                                  ///<  AGESA will base on this array to disable unused Chip select pins to save power.
-
-  OUT BOOLEAN   ExtendTmp;        ///<  If extended temperature is supported on all dimms on a channel.
-
-  OUT UINT8   MaxVref;            ///<  Maximum Vref Value for channel
-
-  OUT UINT8   Reserved[100];      ///< Reserved
-} CH_DEF_STRUCT;
-
-///
-/// DCT Channel Timing Parameters.
-/// This data structure sets timings that are specific to the channel.
-///
-typedef struct _CH_TIMING_STRUCT {
-  OUT UINT16  DctDimmValid;       ///< For each bit n 0..3, 1=DIMM n is valid and is/will be configured where 4..7 are reserved.
-  OUT UINT16  DimmMirrorPresent;  ///< For each bit n 0..3, 1=DIMM n is OnDimmMirror capable where 4..7 are reserved.
-  OUT UINT16  DimmSpdCse;         ///< For each bit n 0..3, 1=DIMM n SPD checksum error where 4..7 are reserved.
-  OUT UINT16  DimmExclude;        ///< For each bit n 0..3, 1 = DIMM n gets excluded where 4..7 are reserved.
-  OUT UINT16  CsPresent;          ///< For each bit n 0..7, 1=Chip-select n is present
-  OUT UINT16  CsEnabled;          ///< For each bit n 0..7, 1=Chip-select n is enabled
-  OUT UINT16  CsTestFail;         ///< For each bit n 0..7, 1=Chip-select n is present but disabled
-  OUT UINT16  CsTrainFail;        ///< Bitmap showing which chipselects failed training
-  OUT UINT16  DIMM1KPage;         ///< For each bit n 0..3, 1=DIMM n contains 1K page devices. where 4..7 are reserved
-  OUT UINT16  DimmQrPresent;      ///< QuadRank DIMM present?
-  OUT UINT16  DimmDrPresent;      ///< Bitmap indicating that Dual Rank Dimms are present , where 4..7 are reserved
-  OUT UINT8   DimmSRPresent;      ///< Bitmap indicating that Single Rank Dimms are present, where 4..7 are reserved
-  OUT UINT16  Dimmx4Present;      ///< For each bit n 0..3, 1=DIMM n contains x4 data devices. where 4..7 are reserved
-  OUT UINT16  Dimmx8Present;      ///< For each bit n 0..3, 1=DIMM n contains x8 data devices. where 4..7 are reserved
-  OUT UINT16  Dimmx16Present;     ///< For each bit n 0..3, 1=DIMM n contains x16 data devices. where 4..7 are reserved
-
-  OUT UINT16  DIMMTrcd;           ///< Minimax Trcd*40 (ns) of DIMMs
-  OUT UINT16  DIMMTrp;            ///< Minimax Trp*40 (ns) of DIMMs
-  OUT UINT16  DIMMTrtp;           ///< Minimax Trtp*40 (ns) of DIMMs
-  OUT UINT16  DIMMTras;           ///< Minimax Tras*40 (ns) of DIMMs
-  OUT UINT16  DIMMTrc;            ///< Minimax Trc*40 (ns) of DIMMs
-  OUT UINT16  DIMMTwr;            ///< Minimax Twr*40 (ns) of DIMMs
-  OUT UINT16  DIMMTrrd;           ///< Minimax Trrd*40 (ns) of DIMMs
-  OUT UINT16  DIMMTwtr;           ///< Minimax Twtr*40 (ns) of DIMMs
-  OUT UINT16  DIMMTfaw;           ///< Minimax Tfaw*40 (ns) of DIMMs
-  OUT UINT16  TargetSpeed;        ///< Target DRAM bus speed in MHz
-  OUT UINT16  Speed;              ///< DRAM bus speed in MHz
-                                  ///<  400 (MHz)
-                                  ///<  533 (MHz)
-                                  ///<  667 (MHz)
-                                  ///<  800 (MHz)
-                                  ///<  and so on...
-  OUT UINT8   CasL;               ///< CAS latency DCT setting (busclocks)
-  OUT UINT8   Trcd;               ///< DCT Trcd (busclocks)
-  OUT UINT8   Trp;                ///< DCT Trp (busclocks)
-  OUT UINT8   Trtp;               ///< DCT Trtp (busclocks)
-  OUT UINT8   Tras;               ///< DCT Tras (busclocks)
-  OUT UINT8   Trc;                ///< DCT Trc (busclocks)
-  OUT UINT8   Twr;                ///< DCT Twr (busclocks)
-  OUT UINT8   Trrd;               ///< DCT Trrd (busclocks)
-  OUT UINT8   Twtr;               ///< DCT Twtr (busclocks)
-  OUT UINT8   Tfaw;               ///< DCT Tfaw (busclocks)
-  OUT UINT8   Trfc0;              ///< DCT Logical DIMM0 Trfc
-                                  ///<  0 = 75ns (for 256Mb devs)
-                                  ///<  1 = 105ns (for 512Mb devs)
-                                  ///<  2 = 127.5ns (for 1Gb devs)
-                                  ///<  3 = 195ns (for 2Gb devs)
-                                  ///<  4 = 327.5ns (for 4Gb devs)
-  OUT UINT8   Trfc1;              ///< DCT Logical DIMM1 Trfc (see Trfc0 for format)
-  OUT UINT8   Trfc2;              ///< DCT Logical DIMM2 Trfc (see Trfc0 for format)
-  OUT UINT8   Trfc3;              ///< DCT Logical DIMM3 Trfc (see Trfc0 for format)
-  OUT UINT32  DctMemSize;         ///< Base[47:16], total DRAM size controlled by this DCT.
-                                  ///<
-  OUT BOOLEAN SlowMode;           ///< 1T or 2T CMD mode (slow access mode)
-                                  ///< FALSE = 1T
-                                  ///< TRUE = 2T
-  OUT UINT8   TrwtTO;             ///< DCT TrwtTO (busclocks)
-  OUT UINT8   Twrrd;              ///< DCT Twrrd (busclocks)
-  OUT UINT8   Twrwr;              ///< DCT Twrwr (busclocks)
-  OUT UINT8   Trdrd;              ///< DCT Trdrd (busclocks)
-  OUT UINT8   TrwtWB;             ///< DCT TrwtWB (busclocks)
-  OUT UINT8   TrdrdSD;            ///< DCT TrdrdSD (busclocks)
-  OUT UINT8   TwrwrSD;            ///< DCT TwrwrSD (busclocks)
-  OUT UINT8   TwrrdSD;            ///< DCT TwrrdSD (busclocks)
-  OUT UINT16  MaxRdLat;           ///< Max Read Latency
-  OUT UINT8   WrDatGrossH;        ///< Temporary variables must be removed
-  OUT UINT8   DqsRcvEnGrossL;     ///< Temporary variables must be removed
-} CH_TIMING_STRUCT;
-
-///
-/// Data for each DCT.
-/// This data structure defines data used to configure each DRAM controller.
-///
-typedef struct _DCT_STRUCT {
-  OUT UINT8   Dct;                ///< Current Dct
-  OUT CH_TIMING_STRUCT Timings;   ///< Channel Timing structure
-  OUT CH_TIMING_STRUCT *TimingsMemPs1;   ///< Pointed to channel timing structure for memory Pstate 1
-  OUT CH_DEF_STRUCT    *ChData;   ///< Pointed to a dynamically allocated array of Channel structures
-  OUT UINT8   ChannelCount;       ///< Number of channel per this DCT
-  OUT BOOLEAN BkIntDis;           ///< Bank interleave requested but not enabled on current DCT
-  OUT UINT8 BankAddrMap;          ///< Bank Address Mapping
-  OUT UINT8 EnabledChipSels;      ///< Number of enabled chip selects on current DCT
-} DCT_STRUCT;
-
-
-///
-/// Data Structure defining each Die.
-/// This data structure contains information that is used to configure each Die.
-///
-typedef struct _DIE_STRUCT {
-
-  /// Advanced:
-
-  OUT UINT8   NodeId;              ///< Node ID of current controller
-  OUT UINT8   SocketId;            ///< Socket ID of this Die
-  OUT UINT8   DieId;               ///< ID of this die relative to the socket
-  OUT PCI_ADDR      PciAddr;       ///< Pci bus and device number of this controller.
-  OUT AGESA_STATUS  ErrCode;       ///< Current error condition of Node
-                                   ///<  0x0 = AGESA_SUCCESS
-                                   ///<  0x1 = AGESA_UNSUPPORTED
-                                   ///<  0x2 = AGESA_BOUNDS_CHK
-                                   ///<  0x3 = AGESA_ALERT
-                                   ///<  0x4 = AGESA_WARNING
-                                   ///<  0x5 = AGESA_ERROR
-                                   ///<  0x6 = AGESA_CRITICAL
-                                   ///<  0x7 = AGESA_FATAL
-                                   ///<
-  OUT BOOLEAN ErrStatus[EsbEOL];   ///< Error Status bit Field
-                                   ///<
-  OUT BOOLEAN Status[SbEOL];       ///< Status bit Field
-                                   ///<
-  OUT UINT32  NodeMemSize;         ///< Base[47:16], total DRAM size controlled by both DCT0 and DCT1 of this Node.
-                                   ///<
-  OUT UINT32  NodeSysBase;         ///< Base[47:16] (system address) DRAM base address of this Node.
-                                   ///<
-  OUT UINT32  NodeHoleBase;        ///< If not zero, Base[47:16] (system address) of dram hole for HW remapping.  Dram hole exists on this Node
-                                   ///<
-  OUT UINT32  NodeSysLimit;        ///< Base[47:16] (system address) DRAM limit address of this Node.
-                                   ///<
-  OUT UINT32  DimmPresent;         ///< For each bit n 0..7, 1 = DIMM n is present.
-                                   ///<   DIMM#  Select Signal
-                                   ///<   0      MA0_CS_L[0, 1]
-                                   ///<   1      MB0_CS_L[0, 1]
-                                   ///<   2      MA1_CS_L[0, 1]
-                                   ///<   3      MB1_CS_L[0, 1]
-                                   ///<   4      MA2_CS_L[0, 1]
-                                   ///<   5      MB2_CS_L[0, 1]
-                                   ///<   6      MA3_CS_L[0, 1]
-                                   ///<   7      MB3_CS_L[0, 1]
-                                   ///<
-  OUT UINT32  DimmValid;           ///< For each bit n 0..7, 1 = DIMM n is valid and is / will be configured
-  OUT UINT32  RegDimmPresent;      ///< For each bit n 0..7, 1 = DIMM n is registered DIMM
-  OUT UINT32  LrDimmPresent;       ///< For each bit n 0..7, 1 = DIMM n is Load Reduced DIMM
-  OUT UINT32  DimmEccPresent;      ///< For each bit n 0..7, 1 = DIMM n is ECC capable.
-  OUT UINT32  DimmParPresent;      ///< For each bit n 0..7, 1 = DIMM n is ADR/CMD Parity capable.
-                                   ///<
-  OUT UINT16  DimmTrainFail;       ///< Bitmap showing which dimms failed training
-  OUT UINT16  ChannelTrainFail;    ///< Bitmap showing the channel information about failed Chip Selects
-                                   ///<  0 in any bit field indicates Channel 0
-                                   ///<  1 in any bit field indicates Channel 1
-  OUT UINT8   Dct;                 ///<  Need to be removed
-                                   ///<  DCT pointer
-  OUT BOOLEAN GangedMode;          ///< Ganged mode
-                                   ///<  0 = disabled
-                                   ///<  1 = enabled
-  OUT CPU_LOGICAL_ID LogicalCpuid; ///< The logical CPUID of the node
-                                   ///<
-  OUT UINT16  HostBiosSrvc1;       ///< UINT16 sized general purpose field for use by host BIOS.  Scratch space.
-                                   ///<
-  OUT UINT32  HostBiosSrvc2;       ///< UINT32 sized general purpose field for use by host BIOS.  Scratch space.
-                                   ///<
-  OUT UINT8   MLoad;               ///< Need to be removed
-                                   ///< Number of devices loading MAA bus
-                                   ///<
-  OUT UINT8   MaxAsyncLat;         ///< Legacy wrapper
-                                   ///<
-  OUT UINT8   ChbD3Rcvrdly;        ///< Legacy wrapper
-                                   ///<
-  OUT UINT16  ChaMaxRdLat;         ///< Max Read Latency (ns) for DCT 0
-                                   ///<
-  OUT UINT8   ChbD3BcRcvrdly;      ///< CHB DIMM 3 Check UINT8 Receiver Enable Delay
-
-  OUT DCT_STRUCT *DctData;         ///< Pointed to a dynamically allocated array of DCT_STRUCTs
-  OUT UINT8   DctCount;            ///< Number of DCTs per this Die
-  OUT UINT8   Reserved[16];        ///< Reserved
-} DIE_STRUCT;
-
-/**********************************************************************
- * S3 Support structure
- **********************************************************************/
-/// AmdInitResume, AmdS3LateRestore, and AmdS3Save param structure
-typedef struct {
-     OUT   UINT32 Signature;           ///< "ASTR" for AMD Suspend-To-RAM
-     OUT   UINT16 Version;             ///< S3 Params version number
-  IN OUT   UINT32 Flags;               ///< Indicates operation
-  IN OUT   VOID   *NvStorage;          ///< Pointer to memory critical save state data
-  IN OUT   UINT32 NvStorageSize;       ///< Size in bytes of the NvStorage region
-  IN OUT   VOID   *VolatileStorage;    ///< Pointer to remaining AMD save state data
-  IN OUT   UINT32 VolatileStorageSize; ///< Size in bytes of the VolatileStorage region
-} AMD_S3_PARAMS;
-
-///===============================================================================
-/// MEM_PARAMETER_STRUCT
-/// This data structure is used to pass wrapper parameters to the memory configuration code
-///
-typedef struct _MEM_PARAMETER_STRUCT {
-
-  // Basic (Return parameters)
-  // (This section contains the outbound parameters from the memory init code)
-
-  OUT BOOLEAN GStatus[GsbEOL];    ///< Global Status bitfield.
-                                  ///<
-  OUT UINT32 HoleBase;            ///< If not zero Base[47:16] (system address) of sub 4GB dram hole for HW remapping.
-                                  ///<
-  OUT UINT32 Sub4GCacheTop;       ///< If not zero, the 32-bit top of cacheable memory.
-                                  ///<
-  OUT UINT32 Sub1THoleBase;       ///< If not zero Base[47:16] (system address) of sub 1TB dram hole.
-                                  ///<
-  OUT UINT32 SysLimit;            ///< Limit[47:16] (system address).
-                                  ///<
-  OUT DIMM_VOLTAGE DDR3Voltage;   ///< Find support voltage and send back to platform BIOS.
-                                  ///<
-  OUT VDDP_VDDR_VOLTAGE VddpVddrVoltage;    ///< For a given configuration, request is made to change the VDDP/VDDR
-                                            ///< voltage in platform BIOS via AgesaHookBeforeDramInit callout and
-                                            ///< MEM_PARAMETER_STRUCT.VddpVddrVoltage.Voltage parameter if
-                                            ///< MEM_PARAMETER_STRUCT.VddpVddrVoltage.IsValid is TRUE. The
-                                            ///< MEM_PARAMETER_STRUCT.VddpVddrVoltage.Voltage is defined in
-                                            ///< MEMORY_PHY_VOLTAGE
-  OUT UINT8 ExternalVrefValue;    ///< Target reference voltage for external Vref for 2D training
-                                  ///<
-  OUT struct _MEM_DATA_STRUCT *MemData;   ///< Access to global memory init data.
-
-  //  Advanced (Optional parameters)
-  //  Optional (all defaults values will be initialized by the
-  //  'AmdMemInitDataStructDef' based on AMD defaults. It is up
-  //  to the IBV/OEM to change the defaults after initialization
-  //  but prior to the main entry to the memory code):
-
-  // Memory Map/Mgt.
-
-  IN UINT16  BottomIo;             ///< Bottom of 32-bit IO space (8-bits).
-                                   ///<   NV_BOTTOM_IO[7:0]=Addr[31:24]
-                                   ///<
-  IN BOOLEAN MemHoleRemapping;     ///< Memory Hole Remapping (1-bit).
-                                   ///<  FALSE = disable
-                                   ///<  TRUE  = enable
-                                   ///<
-  IN BOOLEAN LimitMemoryToBelow1Tb;///< Limit memory address space to below 1 TB
-                                   ///<  FALSE = disable
-                                   ///<  TRUE  = enable
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_LIMIT_MEMORY_TO_BELOW_1TB}
-
-
-  // Dram Timing
-
-  IN UINT32  UserTimingMode;       ///< User Memclock Mode.
-                                                ///< @BldCfgItem{BLDCFG_TIMING_MODE_SELECT}
-
-  IN UINT32  MemClockValue;        ///< Memory Clock Value.
-                                                ///< @BldCfgItem{BLDCFG_MEMORY_CLOCK_SELECT}
-
-
-  // Dram Configuration
-
-  IN BOOLEAN EnableBankIntlv;      ///< Dram Bank (chip-select) Interleaving (1-bit).
-                                   ///<  - FALSE =disable (default)
-                                   ///<  - TRUE = enable
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_MEMORY_ENABLE_BANK_INTERLEAVING}
-
-  IN BOOLEAN EnableNodeIntlv;      ///< Node Memory Interleaving (1-bit).
-                                   ///<   - FALSE = disable (default)
-                                   ///<   - TRUE = enable
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_MEMORY_ENABLE_NODE_INTERLEAVING}
-
-  IN BOOLEAN EnableChannelIntlv;   ///< Channel Interleaving (1-bit).
-                                   ///<   - FALSE = disable (default)
-                                   ///<   - TRUE = enable
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_MEMORY_CHANNEL_INTERLEAVING}
-  // DllPDBypassMode
-
-  IN BOOLEAN EnableDllPDBypassMode;///< Enable low-power DDR phy operation. This feature is used for low-power
-                                   ///< solder-down DRAM motherboard designs with route matched CK/DQS/DQ signals.
-                                   ///< It limits maximim achieveable DDR rates on the platform and should not be
-                                   ///< enabled for systems requiring high DDR rate operation and/or DIMM-based systems.
-                                   ///<   - FALSE = disable
-                                   ///<   - TRUE = enable (default)
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_DDR_PHY_DLL_BYPASS_MODE}
-  // ECC
-
-  IN BOOLEAN EnableEccFeature;     ///< enable ECC error to go into MCE.
-                                   ///<   - FALSE = disable (default)
-                                   ///<   - TRUE = enable
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_ENABLE_ECC_FEATURE}
-  // Dram Power
-
-  IN BOOLEAN EnablePowerDown;      ///< CKE based power down mode (1-bit).
-                                   ///<   - FALSE =disable (default)
-                                   ///<   - TRUE =enable
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_MEMORY_POWER_DOWN}
-
-  // Online Spare
-
-  IN BOOLEAN EnableOnLineSpareCtl; ///< Chip Select Spare Control bit 0.
-                                   ///<  - FALSE = disable Spare (default)
-                                   ///<  - TRUE = enable Spare
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_ONLINE_SPARE}
-
-  IN UINT8 *TableBasedAlterations; ///< Desired modifications to register settings.
-
-  IN PSO_TABLE *PlatformMemoryConfiguration;
-                                   ///< A table that contains platform specific settings.
-                                   ///< For example, MemClk routing, the number of DIMM slots per channel, ....
-                                   ///< AGESA initializes this pointer with DefaultPlatformMemoryConfiguration that
-                                   ///< contains default conservative settings. Platform BIOS can either tweak
-                                   ///< DefaultPlatformMemoryConfiguration or reassign this pointer to its own table.
-                                   ///<
-  IN BOOLEAN EnableParity;         ///< Parity control.
-                                   ///<  - TRUE = enable
-                                   ///<  - FALSE = disable (default)
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_MEMORY_PARITY_ENABLE}
-
-  IN BOOLEAN EnableBankSwizzle;    ///< BankSwizzle control.
-                                   ///<  - FALSE = disable
-                                   ///<  - TRUE = enable  (default)
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_BANK_SWIZZLE}
-
-                                   ///<
-
-  IN BOOLEAN EnableMemClr;         ///< Memory Clear functionality control.
-                                   ///<  - FALSE = disable
-                                   ///<  - TRUE = enable  (default)
-                                   ///<
-
-  // Uma Configuration
-
-  IN UMA_MODE UmaMode;             ///<  Uma Mode
-                                   ///<  0 = None
-                                   ///<  1 = Specified
-                                   ///<  2 = Auto
-  IN OUT UINT32 UmaSize;           ///<  The size of shared graphics dram (16-bits)
-                                   ///<  NV_UMA_Size[31:0]=Addr[47:16]
-                                   ///<
-  OUT UINT32 UmaBase;              ///<  The allocated Uma base address (32-bits)
-                                   ///<  NV_UMA_Base[31:0]=Addr[47:16]
-                                   ///<
-
-  /// Memory Restore Feature
-
-  IN BOOLEAN MemRestoreCtl;        ///< Memory context restore control
-                                   ///<   FALSE = perform memory init as normal (AMD default)
-                                   ///<   TRUE = restore memory context and skip training. This requires
-                                   ///<          MemContext is valid before AmdInitPost
-                                   ///<
-  IN BOOLEAN SaveMemContextCtl;    ///< Control switch to save memory context at the end of MemAuto
-                                   ///<   TRUE = AGESA will setup MemContext block before exit AmdInitPost
-                                   ///<   FALSE = AGESA will not setup MemContext block. Platform is
-                                   ///<           expected to call S3Save later in POST if it wants to
-                                   ///<           use memory context restore feature.
-                                   ///<
-  IN OUT AMD_S3_PARAMS MemContext; ///< Memory context block describes the data that platform needs to
-                                   ///< save and restore for memory context restore feature to work.
-                                   ///< It uses the subset of S3Save block to save/restore. Hence platform
-                                   ///< may save only S3 block and uses it for both S3 resume and
-                                   ///< memory context restore.
-                                   ///<  - If MemRestoreCtl is TRUE, platform needs to pass in MemContext
-                                   ///<    before AmdInitPost.
-                                   ///<  - If SaveMemContextCtl is TRUE, platform needs to save MemContext
-                                   ///<    right after AmdInitPost.
-                                   ///<
-  IN BOOLEAN IsCapsuleMode;        ///< Capsule reboot control
-                                   ///<   FALSE = This is not a capsule reboot.
-                                   ///<   TRUE = This is a capsule reboot.
-                                   ///<
-  IN BOOLEAN ExternalVrefCtl;      ///< Control the use of external Vref
-                                   ///<   TRUE = AGESA will use the function defined in "AGESA_EXTERNAL_VREF_CHANGE" in function list
-                                   ///<          to change the vref
-                                   ///<   FALSE = AGESA will will use the internal vref control.
-                                   ///< @BldCfgItem{BLDCFG_ENABLE_EXTERNAL_VREF_FEATURE}
-                                   ///<
-  IN FORCE_TRAIN_MODE ForceTrainMode;   ///<  Training Mode
-                                   ///<  0 = Force 1D Training for all configurations
-                                   ///<  1 = Force 2D Training for all configurations
-                                   ///<  2 = Auto - AGESA will control 1D or 2D
-  IN TECHNOLOGY_TYPE DimmTypeUsedInMixedConfig;   ///< Select the preferred technology type that AGESA will enable
-                                                  ///< when it is mixed with other technology types.
-                                                  ///<   DDR3_TECHNOLOGY = Use DDR3 DIMMs
-                                                  ///<   GDDR5_TECHNOLOGY = Use GDDR5 DIMMs
-                                                  ///<   UNSUPPORTED_TECHNOLOGY = Exit with fatal error when DDR3 and GDDR5 DIMMs
-                                                  ///<                            are installed on the same system
-                                                  ///< @BldCfgItem{BLDCFG_DIMM_TYPE_USED_IN_MIXED_CONFIG}
-  IN BOOLEAN AmpEnable;            ///< AMP functionality control
-                                   ///<   TRUE = Enable, platform BIOS requests to enable memory overclocking function, and AGESA
-                                   ///<          detects if memory is capable of it
-                                   ///<   FALSE = Disable, there is no request to enable memory overclocking function
-                                   ///<
-  IN BOOLEAN AmpWarningMsgEnable;  ///< AMP warning messages control
-                                   ///<   TRUE = Enable to log the warning messages of AMP
-                                   ///<   FALSE = Disable
-                                   ///<
-  OUT AMP_STATUS AmpStatus;        ///< AMP status allows platform BIOS to check which voltage or warning message it should
-                                   ///< use/apply.
-                                   ///<
-                                   ///<   AmpVoltageValid :
-                                   ///<       TRUE - AGESA does enable AMP function, so use AmpVoltage for voltage adjustment
-                                   ///<       FALSE - AGESA does not enable AMP function, so use DDR3Voltage for voltage adjustment
-                                   ///<
-                                   ///<   AmpSupportDetectedButNotEnabled :
-                                   ///<       TRUE - Display warning message of "AMP support detected but not enabled"
-                                   ///<       FALSE - No corresponding message should be displayed
-                                   ///<
-                                   ///<   AmpSelectedButNotEnabled :
-                                   ///<       TRUE - Display warning message of "AMP selected but not enabled"
-                                   ///<       FALSE - No corresponding message should be displayed
-                                   ///<
-                                   ///<   Note that both of warning message status reports are controlled by AmpWarningMsgEnable
-                                   ///<
-  OUT AMP_DIMM_VOLTAGE AmpVoltage; ///< AMP voltage which will be sent back to platform BIOS, and
-                                   ///< the value in AmpVoltage is valid only if AmpStatus is TRUE returned
-  IN BOOLEAN DataEyeEn;            ///< Get 2D training data eye
-                                   ///<   TRUE  = Enable to get the 2D data eye
-                                   ///<   FALSE = The 2D data eye is not enabled
-                                   ///< @BldCfgItem{BLDCFG_ENABLE_DATA_EYE}
-  IN BOOLEAN DramDoubleRefreshRate;///< Specify the average time between refresh requests to all DRAM devices.
-                                   ///<   TRUE  = 2x refresh rate.
-                                   ///<   FALSE = 1x refresh rate.
-                                   ///< @BldCfgItem{BLDCFG_DRAM_DOUBLE_REFRESH_RATE}
-  IN PMU_TRAIN_MODE PmuTrainMode;  ///<  PMU Training Mode
-                                   ///< @BldCfgItem{BLDCFG_PMU_TRAINING_MODE}
-                                   ///<  0 = PMU 1D Training only for all configurations
-                                   ///<  1 = PMU 1D and 2D Training read only for all configurations
-                                   ///<  2 = PMU 1D and 2D Training for all configurations
-                                   ///<  3 = AGESA control type of training depend on configurations
-} MEM_PARAMETER_STRUCT;
-
-
-///
-/// Function definition.
-/// This data structure passes function pointers to the memory configuration code.
-/// The wrapper can use this structure with customized versions.
-///
-typedef struct _MEM_FUNCTION_STRUCT {
-
-  // PUBLIC required Internal functions
-
-  IN OUT BOOLEAN (*amdMemGetPsCfgU) ( VOID *pMemData);  ///< Proc for Unbuffered DIMMs, platform specific
-  IN OUT BOOLEAN (*amdMemGetPsCfgR) (VOID *pMemData);   ///< Proc for Registered DIMMs, platform specific
-
-  // PUBLIC optional functions
-
-  IN OUT VOID (*amdMemEccInit) (VOID *pMemData);                  ///< NB proc for ECC feature
-  IN OUT VOID (*amdMemChipSelectInterleaveInit) (VOID *pMemData); ///< NB proc for CS interleave feature
-  IN OUT VOID (*amdMemDctInterleavingInit) (VOID *pMemData);      ///< NB proc for Channel interleave feature
-  IN OUT VOID (*amdMemMctInterleavingInit) (VOID *pMemData);      ///< NB proc for Node interleave feature
-  IN OUT VOID (*amdMemParallelTraining) (VOID *pMemData);         ///< NB proc for parallel training feature
-  IN OUT VOID (*amdMemEarlySampleSupport) (VOID *pMemData);       ///< NB code for early sample support feature
-  IN OUT VOID (*amdMemMultiPartInitSupport) (VOID *pMemData);     ///< NB code for 'multi-part'
-  IN OUT VOID (*amdMemOnlineSpareSupport) (VOID *pMemData);       ///< NB code for On-Line Spare feature
-  IN OUT VOID (*amdMemUDimmInit) (VOID *pMemData);                ///< NB code for UDIMMs
-  IN OUT VOID (*amdMemRDimmInit) (VOID *pMemData);                ///< NB code for RDIMMs
-  IN OUT VOID (*amdMemLrDimmInit) (VOID *pMemData);               ///< NB code for LRDIMMs
-  IN OUT UINT32   Reserved[100]; ///< Reserved for later function definition
-} MEM_FUNCTION_STRUCT;
-
-///
-/// Socket Structure
-///
-///
-typedef struct _MEM_SOCKET_STRUCT {
-  OUT VOID *ChannelPtr[MAX_CHANNELS_PER_SOCKET];  ///< Pointers to each channels training data
-
-  OUT VOID *TimingsPtr[MAX_CHANNELS_PER_SOCKET];  ///< Pointers to each channels timing data
-} MEM_SOCKET_STRUCT;
-
-///
-/// Contains all data relevant to Memory Initialization.
-///
-typedef struct _MEM_DATA_STRUCT {
-  IN AMD_CONFIG_PARAMS StdHeader;             ///< Standard configuration header
-
-  IN MEM_PARAMETER_STRUCT *ParameterListPtr;  ///< List of input Parameters
-
-  OUT MEM_FUNCTION_STRUCT FunctionList;       ///< List of function Pointers
-
-  IN OUT AGESA_STATUS (*GetPlatformCfg[MAX_PLATFORM_TYPES]) (struct _MEM_DATA_STRUCT *MemData, UINT8 SocketID, CH_DEF_STRUCT *CurrentChannel); ///< look-up platform info
-
-  IN OUT BOOLEAN (*ErrorHandling)(struct _DIE_STRUCT *MCTPtr, UINT8 DCT, UINT16 ChipSelMask, AMD_CONFIG_PARAMS *StdHeader); ///< Error Handling
-
-
-  OUT MEM_SOCKET_STRUCT SocketList[MAX_SOCKETS_SUPPORTED];  ///< Socket list for memory code.
-                                   ///< SocketList is a shortcut for IBVs to retrieve training
-                                   ///< and timing data for each channel indexed by socket/channel,
-                                   ///< eliminating their need to parse die/dct/channel etc.
-                                   ///< It contains pointers to the populated data structures for
-                                   ///< each channel and skips the channel structures that are
-                                   ///< unpopulated. In the case of channels sharing the same DCT,
-                                   ///< the pTimings pointers will point to the same DCT Timing data.
-
-  OUT DIE_STRUCT *DiesPerSystem;  ///< Pointed to an array of DIE_STRUCTs
-  OUT UINT8      DieCount;        ///< Number of MCTs in the system.
-
-  IN SPD_DEF_STRUCT *SpdDataStructure;              ///< Pointer to SPD Data structure
-
-  IN OUT  struct _PLATFORM_CONFIGURATION   *PlatFormConfig;    ///< Platform profile/build option config structure
-
-  IN OUT BOOLEAN IsFlowControlSupported;    ///< Indicates if flow control is supported
-
-  OUT UINT32 TscRate;             ///< The rate at which the TSC increments in megahertz.
-  IN BOOLEAN PhyReceiverLowPower;  ///< Force PHY receiver in low power.
-                                   ///<   TRUE  = PHY receiver low power
-                                   ///<   FALSE = PHY receiver high power
-} MEM_DATA_STRUCT;
-
-///
-/// Uma Structure
-///
-///
-typedef struct _UMA_INFO {
-  OUT UINT64 UmaBase;          ///< UmaBase[63:0] = Addr[63:0]
-  OUT UINT32 UmaSize;          ///< UmaSize[31:0] = Addr[31:0]
-  OUT UINT32 UmaAttributes;    ///< Indicate the attribute of Uma
-  OUT UINT8  UmaMode;          ///< Indicate the mode of Uma
-  OUT UINT16 MemClock;         ///< Indicate memory running speed in MHz
-  OUT UINT8  MemType;          ///< Indicate the DRAM technology type that is being used
-  OUT UINT8  Reserved[2];      ///< Reserved for future usage
-} UMA_INFO;
-
-
-/// Bitfield for ID
-typedef struct {
-  OUT UINT16 SocketId:8;       ///< Socket ID
-  OUT UINT16 ModuleId:8;       ///< Module ID
-} ID_FIELD;
-///
-/// Union for ID of socket and module that will be passed out in call out
-///
-typedef union {
-  OUT ID_FIELD IdField;         ///< Bitfield for ID
-  OUT UINT16 IdInformation;     ///< ID information for call out
-} ID_INFO;
-
-//  AGESA MEMORY ERRORS
-
-// AGESA_SUCCESS memory events
-#define MEM_EVENT_CAPSULE_IN_EFFECT      0x04013600ul          ///< Capsule is in effect
-#define MEM_EVENT_CONTEXT_RESTORE_IN_EFFECT     0x04023600ul   ///< Context restore is in effect
-
-// AGESA_ALERT Memory Errors
-#define MEM_ALERT_USER_TMG_MODE_OVERRULED   0x04010000ul       ///< TIMING_MODE_SPECIFIC is requested but
-                                                               ///< cannot be applied to current configurations.
-#define MEM_ALERT_ORG_MISMATCH_DIMM 0x04010100ul               ///< DIMM organization miss-match
-#define MEM_ALERT_BK_INT_DIS 0x04010200ul                      ///< Bank interleaving disable for internal issue
-
-// AGESA_ERROR Memory Errors
-#define MEM_ERROR_NO_DQS_POS_RD_WINDOW 0x04010300ul            ///< No DQS Position window for RD DQS
-#define MEM_ERROR_SMALL_DQS_POS_RD_WINDOW 0x04020300ul         ///< Small DQS Position window for RD DQS
-#define MEM_ERROR_NO_DQS_POS_WR_WINDOW 0x04030300ul            ///< No DQS Position window for WR DQS
-#define MEM_ERROR_SMALL_DQS_POS_WR_WINDOW 0x04040300ul         ///< Small DQS Position window for WR DQS
-#define MEM_ERROR_DIMM_SPARING_NOT_ENABLED 0x04010500ul        ///< DIMM sparing has not been enabled for an internal issues
-#define MEM_ERROR_RCVR_EN_VALUE_TOO_LARGE 0x04050300ul         ///< Receive Enable value is too large
-#define MEM_ERROR_RCVR_EN_NO_PASSING_WINDOW 0x04060300ul       ///< There is no DQS receiver enable window
-#define MEM_ERROR_DRAM_ENABLED_TIME_OUT 0x04010600ul           ///< Time out when polling DramEnabled bit
-#define MEM_ERROR_DCT_ACCESS_DONE_TIME_OUT 0x04010700ul        ///< Time out when polling DctAccessDone bit
-#define MEM_ERROR_SEND_CTRL_WORD_TIME_OUT 0x04010800ul         ///< Time out when polling SendCtrlWord bit
-#define MEM_ERROR_PREF_DRAM_TRAIN_MODE_TIME_OUT 0x04010900ul   ///< Time out when polling PrefDramTrainMode bit
-#define MEM_ERROR_ENTER_SELF_REF_TIME_OUT 0x04010A00ul         ///< Time out when polling EnterSelfRef bit
-#define MEM_ERROR_FREQ_CHG_IN_PROG_TIME_OUT 0x04010B00ul       ///< Time out when polling FreqChgInProg bit
-#define MEM_ERROR_EXIT_SELF_REF_TIME_OUT 0x04020A00ul          ///< Time out when polling ExitSelfRef bit
-#define MEM_ERROR_SEND_MRS_CMD_TIME_OUT 0x04010C00ul           ///< Time out when polling SendMrsCmd bit
-#define MEM_ERROR_SEND_ZQ_CMD_TIME_OUT 0x04010D00ul            ///< Time out when polling SendZQCmd bit
-#define MEM_ERROR_DCT_EXTRA_ACCESS_DONE_TIME_OUT 0x04010E00ul  ///< Time out when polling DctExtraAccessDone bit
-#define MEM_ERROR_MEM_CLR_BUSY_TIME_OUT 0x04010F00ul           ///< Time out when polling MemClrBusy bit
-#define MEM_ERROR_MEM_CLEARED_TIME_OUT 0x04020F00ul            ///< Time out when polling MemCleared bit
-#define MEM_ERROR_FLUSH_WR_TIME_OUT 0x04011000ul               ///< Time out when polling FlushWr bit
-#define MEM_ERROR_NBPSTATE_TRANSITION_TIME_OUT 0x04012600ul    ///< Time out when polling CurNBPstate bit
-#define MEM_ERROR_MAX_LAT_NO_WINDOW 0x04070300ul               ///< Fail to find pass during Max Rd Latency training
-#define MEM_ERROR_PARALLEL_TRAINING_LAUNCH_FAIL 0x04080300ul   ///< Fail to launch training code on an AP
-#define MEM_ERROR_PARALLEL_TRAINING_TIME_OUT 0x04090300ul      ///< Fail to finish parallel training
-#define MEM_ERROR_NO_ADDRESS_MAPPING 0x04011100ul              ///< No address mapping found for a dimm
-#define MEM_ERROR_RCVR_EN_NO_PASSING_WINDOW_EQUAL_LIMIT  0x040A0300ul ///< There is no DQS receiver enable window and the value is equal to the largest value
-#define MEM_ERROR_RCVR_EN_VALUE_TOO_LARGE_LIMIT_LESS_ONE 0x040B0300ul ///< Receive Enable value is too large and is 1 less than limit
-#define MEM_ERROR_CHECKSUM_NV_SPDCHK_RESTRT_ERROR  0x04011200ul       ///< SPD Checksum error for NV_SPDCHK_RESTRT
-#define MEM_ERROR_NO_CHIPSELECT 0x04011300ul                   ///< No chipselects found
-#define MEM_ERROR_UNSUPPORTED_333MHZ_UDIMM 0x04011500ul        ///< Unbuffered dimm is not supported at 333MHz
-#define MEM_ERROR_WL_PRE_OUT_OF_RANGE 0x040C0300ul             ///< Returned PRE value during write levelizzation was out of range
-#define MEM_ERROR_NO_2D_RDDQS_WINDOW 0x040D0300ul              ///< No 2D RdDqs Window
-#define MEM_ERROR_NO_2D_RDDQS_HEIGHT 0x040E0300ul              ///< No 2D RdDqs Height
-#define MEM_ERROR_2D_DQS_ERROR  0x040F0300ul                   ///< 2d RdDqs Error
-#define MEM_ERROR_INVALID_2D_RDDQS_VALUE  0x04022400ul         ///< 2d RdDqs invalid value found
-#define MEM_ERROR_2D_DQS_VREF_MARGIN_ERROR  0x04023400ul       ///< 2d RdDqs Vef Margin error found
-#define MEM_ERROR_LR_IBT_NOT_FOUND  0x04013500ul               ///< No LR dimm IBT value is found
-#define MEM_ERROR_MR0_NOT_FOUND  0x04023500ul                  ///< No MR0 value is found
-#define MEM_ERROR_ODT_PATTERN_NOT_FOUND  0x04033500ul          ///< No odt pattern value is found
-#define MEM_ERROR_RC2_IBT_NOT_FOUND  0x04043500ul              ///< No RC2 IBT value is found
-#define MEM_ERROR_RC10_OP_SPEED_NOT_FOUND  0x04053500ul        ///< No RC10 op speed is found
-#define MEM_ERROR_RTT_NOT_FOUND  0x04063500ul                  ///< No RTT value is found
-#define MEM_ERROR_P2D_NOT_FOUND  0x04073500ul                  ///< No 2D training config value is found
-#define MEM_ERROR_SAO_NOT_FOUND  0x04083500ul                  ///< No slow access mode, Address timing and Output driver compensation value is found
-#define MEM_ERROR_CLK_DIS_MAP_NOT_FOUND  0x04093500ul          ///< No CLK disable map is found
-#define MEM_ERROR_CKE_TRI_MAP_NOT_FOUND  0x040A3500ul          ///< No CKE tristate map is found
-#define MEM_ERROR_ODT_TRI_MAP_NOT_FOUND  0x040B3500ul          ///< No ODT tristate map is found
-#define MEM_ERROR_CS_TRI_MAP_NOT_FOUND  0x040C3500ul           ///< No CS tristate map is found
-#define MEM_ERROR_TRAINING_SEED_NOT_FOUND  0x040D3500ul        ///< No training seed is found
-#define MEM_ERROR_NO_2D_WRDAT_WINDOW 0x040D0400ul              ///< No 2D WrDat Window
-#define MEM_ERROR_NO_2D_WRDAT_HEIGHT 0x040E0400ul              ///< No 2D WrDat Height
-#define MEM_ERROR_2D_WRDAT_ERROR  0x040F0400ul                 ///< 2d WrDat Error
-#define MEM_ERROR_INVALID_2D_WRDAT_VALUE  0x04100400ul         ///< 2d WrDat invalid value found
-#define MEM_ERROR_2D_WRDAT_VREF_MARGIN_ERROR  0x04110400ul     ///< 2d WrDat Vef Margin error found
-#define MEM_ERROR_PMU_TRAINING 0x04120400ul                    ///< Fail PMU training.
-
-// AGESA_WARNING Memory Errors
-#define MEM_WARNING_UNSUPPORTED_QRDIMM      0x04011600ul       ///< QR DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_UDIMM       0x04021600ul       ///< U DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_SODIMM      0x04031600ul       ///< SO-DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_X4DIMM      0x04041600ul       ///< x4 DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_RDIMM       0x04051600ul       ///< R DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_LRDIMM      0x04061600ul       ///< LR DIMMs detected but not supported
-#define MEM_WARNING_EMP_NOT_SUPPORTED       0x04011700ul       ///< Processor is not capable for EMP
-#define MEM_WARNING_EMP_CONFLICT            0x04021700ul       ///< EMP cannot be enabled if channel interleaving,
-#define MEM_WARNING_EMP_NOT_ENABLED         0x04031700ul       ///< Memory size is not power of two.
-#define MEM_WARNING_ECC_DIS                 0x04041700ul       ///< ECC has been disabled as a result of an internal issue
-#define MEM_WARNING_PERFORMANCE_ENABLED_BATTERY_LIFE_PREFERRED 0x04011800ul  ///< Performance has been enabled, but battery life is preferred.
-                                                                             ///< bank interleaving, or bank swizzle is enabled.
-#define MEM_WARNING_NO_SPDTRC_FOUND               0x04011900ul ///< No Trc timing value found in SPD of a dimm.
-#define MEM_WARNING_NODE_INTERLEAVING_NOT_ENABLED 0x04012000ul ///< Node Interleaveing Requested, but could not be enabled
-#define MEM_WARNING_CHANNEL_INTERLEAVING_NOT_ENABLED 0x04012100ul ///< Channel Interleaveing Requested, but could not be enabled
-#define MEM_WARNING_BANK_INTERLEAVING_NOT_ENABLED 0x04012200ul ///< Bank Interleaveing Requested, but could not be enabled
-#define MEM_WARNING_VOLTAGE_1_35_NOT_SUPPORTED    0x04012300ul ///< Voltage 1.35 determined, but could not be supported
-#define MEM_WARNING_INITIAL_DDR3VOLT_NONZERO      0x04012400ul ///< DDR3 voltage initial value is not 0
-#define MEM_WARNING_NO_COMMONLY_SUPPORTED_VDDIO   0x04012500ul ///< Cannot find a commonly supported VDDIO
-#define MEM_WARNING_AMP_SUPPORT_DETECTED_BUT_NOT_ENABLED 0x04012900ul ///< AMP support detected but not enabled
-#define MEM_WARNING_AMP_SELECTED_BUT_NOT_ENABLED  0x04022900ul ///< AMP selected but not enabled
-
-// AGESA_FATAL Memory Errors
-#define MEM_ERROR_MINIMUM_MODE              0x04011A00ul       ///< Running in minimum mode
-#define MEM_ERROR_MODULE_TYPE_MISMATCH_DIMM 0x04011B00ul       ///< DIMM modules are miss-matched
-#define MEM_ERROR_NO_DIMM_FOUND_ON_SYSTEM   0x04011C00ul       ///< No DIMMs have been found
-#define MEM_ERROR_MISMATCH_DIMM_CLOCKS      0x04011D00ul       ///< DIMM clocks miss-matched
-#define MEM_ERROR_NO_CYC_TIME               0x04011E00ul       ///< No cycle time found
-#define MEM_ERROR_HEAP_ALLOCATE_DYN_STORING_OF_TRAINED_TIMINGS     0x04011F00ul  ///< Heap allocation error with dynamic storing of trained timings
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_DCT_STRUCT_AND_CH_DEF_STRUCTs  0x04021F00ul  ///< Heap allocation error for DCT_STRUCT and CH_DEF_STRUCT
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_REMOTE_TRAINING_ENV   0x04031F00ul           ///< Heap allocation error with REMOTE_TRAINING_ENV
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_SPD               0x04041F00ul    ///< Heap allocation error for SPD data
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_RECEIVED_DATA     0x04051F00ul    ///< Heap allocation error for RECEIVED_DATA during parallel training
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_S3_SPECIAL_CASE_REGISTERS     0x04061F00ul   ///< Heap allocation error for S3 "SPECIAL_CASE_REGISTER"
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_TRAINING_DATA     0x04071F00ul    ///< Heap allocation error for Training Data
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_IDENTIFY_DIMM_MEM_NB_BLOCK    0x04081F00ul   ///< Heap allocation error for  DIMM Identify "MEM_NB_BLOCK
-#define MEM_ERROR_NO_CONSTRUCTOR_FOR_IDENTIFY_DIMM    0x04022300ul    ///< No Constructor for DIMM Identify
-#define MEM_ERROR_VDDIO_UNSUPPORTED                   0x04022500ul    ///< VDDIO of the dimms on the board is not supported
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_2D                0x040B1F00ul    ///< Heap allocation error for 2D training data
-#define MEM_ERROR_HEAP_DEALLOCATE_FOR_2D              0x040C1F00ul    ///< Heap de-allocation error for 2D training data
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_DATAEYE           0x040F1F00ul    ///< Heap allocation error for DATAEYE Storage
-#define MEM_ERROR_HEAP_DEALLOCATE_FOR_DATAEYE         0x040E1F00ul    ///< Heap de-allocation error for DATAEYE Storage
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_PMU_SRAM_MSG_BLOCK            0x04101F00ul    ///< Heap allocation error for PMU SRAM Message Block Storage
-#define MEM_ERROR_HEAP_DEALLOCATE_FOR_PMU_SRAM_MSG_BLOCK          0x04111F00ul    ///< Heap de-allocation error for PMU SRAM Message Block Storage
-#define MEM_ERROR_HEAP_LOCATE_FOR_PMU_SRAM_MSG_BLOCK              0x04121F00ul    ///< Heap location error for PMU SRAM Message Block Storage
-
-// AGESA_CRITICAL Memory Errors
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR3    0x04091F00ul    ///< Heap allocation error for DMI table for DDR3
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR2    0x040A1F00ul    ///< Heap allocation error for DMI table for DDR2
-#define MEM_ERROR_UNSUPPORTED_DIMM_CONFIG             0x04011400ul    ///< Dimm population is not supported
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_CRAT_MEM_AFFINITY 0x040D1F00ul    ///< Heap allocation error for CRAT memory affinity info
-
-
-
-/*----------------------------------------------------------------------------
- *
- *                END OF MEMORY-SPECIFIC DATA STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-
-/*----------------------------------------------------------------------------
- *
- *                    CPU RELATED DEFINITIONS
- *
- *----------------------------------------------------------------------------
- */
-
-// CPU Event definitions.
-
-// Defines used to filter CPU events based on functional blocks
-#define CPU_EVENT_PM_EVENT_MASK                         0xFF00FF00ul
-#define CPU_EVENT_PM_EVENT_CLASS                        0x08000400ul
-
-//================================================================
-// CPU General events
-//    Heap allocation                     (AppFunction =      01h)
-#define CPU_ERROR_HEAP_BUFFER_IS_NOT_PRESENT            0x08000100ul
-#define CPU_ERROR_HEAP_IS_ALREADY_INITIALIZED           0x08010100ul
-#define CPU_ERROR_HEAP_IS_FULL                          0x08020100ul
-#define CPU_ERROR_HEAP_BUFFER_HANDLE_IS_ALREADY_USED    0x08030100ul
-#define CPU_ERROR_HEAP_BUFFER_HANDLE_IS_NOT_PRESENT     0x08040100ul
-//    BrandId                             (AppFunction =      02h)
-#define CPU_ERROR_BRANDID_HEAP_NOT_AVAILABLE            0x08000200ul
-//    Micro code patch                    (AppFunction =      03h)
-#define CPU_ERROR_MICRO_CODE_PATCH_IS_NOT_LOADED        0x08000300ul
-//    Power management                    (AppFunction =      04h)
-#define CPU_EVENT_PM_PSTATE_OVERCURRENT                 0x08000400ul
-#define CPU_EVENT_PM_ALL_PSTATE_OVERCURRENT             0x08010400ul
-#define CPU_ERROR_PSTATE_HEAP_NOT_AVAILABLE             0x08020400ul
-#define CPU_ERROR_PM_NB_PSTATE_MISMATCH                 0x08030400ul
-#define CPU_ERROR_PM_ALL_PSTATE_OVER_FREQUENCY_LIMIT    0x08040400ul
-#define CPU_EVENT_PM_PSTATE_FREQUENCY_LIMIT             0x08050400ul
-//    Other CPU events                    (AppFunction =      05h)
-#define CPU_EVENT_BIST_ERROR                            0x08000500ul
-#define CPU_EVENT_UNKNOWN_PROCESSOR_FAMILY              0x08010500ul
-#define CPU_EVENT_STACK_REENTRY                         0x08020500ul
-#define CPU_EVENT_CORE_NOT_IDENTIFIED                   0x08030500ul
-
-//=================================================================
-// CPU Feature events
-//    Execution cache                     (AppFunction =      21h)
-//        AGESA_CACHE_SIZE_REDUCED                            2101
-//        AGESA_CACHE_REGIONS_ACROSS_1MB                      2102
-//        AGESA_CACHE_REGIONS_ACROSS_4GB                      2103
-//        AGESA_REGION_NOT_ALIGNED_ON_BOUNDARY                2104
-//        AGESA_CACHE_START_ADDRESS_LESS_D0000                2105
-//        AGESA_THREE_CACHE_REGIONS_ABOVE_1MB                 2106
-//        AGESA_DEALLOCATE_CACHE_REGIONS                      2107
-#define CPU_EVENT_EXECUTION_CACHE_ALLOCATION_ERROR      0x08002100ul
-//    Core Leveling                       (AppFunction =      22h)
-#define CPU_WARNING_ADJUSTED_LEVELING_MODE              0x08002200ul
-//    SCS initialization                  (AppFunction =      24h)
-//        AGESA_SCS_HEAP_ENTRY_MISSING                        2401
-//        AGESA_SCS_BUFFER_EMPTY                              2402
-//        AGESA_SCS_WEIGHTS_MISMATCH                          2403
-#define CPU_EVENT_SCS_INITIALIZATION_ERROR              0x08002400ul
-
-// CPU Build Configuration structures and definitions
-
-/// Build Configuration structure for BLDCFG_AP_MTRR_SETTINGS
-typedef struct {
-  IN  UINT32 MsrAddr;     ///< Fixed-Sized MTRR address
-  IN  UINT64 MsrData;     ///< MTRR Settings
-} AP_MTRR_SETTINGS;
-
-#define AMD_AP_MTRR_FIX64k_00000    0x00000250ul
-#define AMD_AP_MTRR_FIX16k_80000    0x00000258ul
-#define AMD_AP_MTRR_FIX16k_A0000    0x00000259ul
-#define AMD_AP_MTRR_FIX4k_C0000     0x00000268ul
-#define AMD_AP_MTRR_FIX4k_C8000     0x00000269ul
-#define AMD_AP_MTRR_FIX4k_D0000     0x0000026Aul
-#define AMD_AP_MTRR_FIX4k_D8000     0x0000026Bul
-#define AMD_AP_MTRR_FIX4k_E0000     0x0000026Cul
-#define AMD_AP_MTRR_FIX4k_E8000     0x0000026Dul
-#define AMD_AP_MTRR_FIX4k_F0000     0x0000026Eul
-#define AMD_AP_MTRR_FIX4k_F8000     0x0000026Ful
-#define CPU_LIST_TERMINAL           0xFFFFFFFFul
-
-/// Data structure for the Mapping Item between Unified ID for IDS Setup Option
-/// and the option value.
-///
-typedef struct {
-  IN    UINT16 IdsNvId;           ///< Unified ID for IDS Setup Option.
-  OUT UINT16 IdsNvValue;        ///< The value of IDS Setup Option.
-} IDS_NV_ITEM;
-
-/// Data Structure for IDS CallOut Function
-typedef struct {
-  IN    AMD_CONFIG_PARAMS StdHeader;        ///< Standard configuration header
-  IN    IDS_NV_ITEM *IdsNvPtr;              ///< Memory Pointer of IDS NV Table
-  IN OUT UINTN Reserved;              ///< reserved
-} IDS_CALLOUT_STRUCT;
-
-/************************************************************************
- *
- *  AGESA interface Call-Out function parameter structures
- *
- ***********************************************************************/
-
-/// Parameters structure for interface call-out AgesaAllocateBuffer
-typedef struct {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;      ///< Standard configuration header
-  IN OUT    UINT32              BufferLength;   ///< Size of buffer to allocate
-  IN        UINT32              BufferHandle;   ///< Identifier or name for the buffer
-  OUT       VOID                *BufferPointer; ///< location of the created buffer
-} AGESA_BUFFER_PARAMS;
-
-/// Parameters structure for interface call-out AgesaHeapRebase
-typedef struct {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;      ///< Standard configuration header
-     OUT    UINTN               HeapAddress;    ///< The address which heap content will be temporarily stored in
-} AGESA_REBASE_PARAMS;
-
-/// Parameters structure for interface call-out AgesaRunCodeOnAp
-typedef struct {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;            ///< Standard configuration header
-  IN        UINT32              FunctionNumber;       ///< Index of the procedure to execute
-  IN        VOID                *RelatedDataBlock;    ///< Location of data structure the procedure will use
-  IN        UINT32              RelatedBlockLength;   ///< Size of the related data block
-} AP_EXE_PARAMS;
-
-/// Parameters structure for the interface call-out AgesaReadSpd & AgesaReadSpdRecovery
-typedef struct {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;      ///< Standard configuration header
-  IN        UINT8               SocketId;       ///< Address of SPD - socket ID
-  IN        UINT8               MemChannelId;   ///< Address of SPD - memory channel ID
-  IN        UINT8               DimmId;         ///< Address of SPD - DIMM ID
-  IN OUT    UINT8               *Buffer;        ///< Location where to place the SPD content
-  IN OUT    MEM_DATA_STRUCT     *MemData;       ///< Location of the MemData structure, for reference
-} AGESA_READ_SPD_PARAMS;
-
-/// VoltageType values
-typedef enum {
-  VTYPE_CPU_VREF,                                    ///< Cpu side Vref
-  VTYPE_DIMM_VREF,                                   ///< Dimm Side Vref
-  VTYPE_VDDIO                                        ///< Vddio
-} VTYPE;
-
-/// Parameters structure for the interface call-out AgesaExternalVoltageAdjust
-typedef struct _VOLTAGE_ADJUST {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;     ///< Standard configuration header
-  IN OUT    MEM_DATA_STRUCT     *MemData;      ///< Location of the MemData structure, for reference
-  IN        VTYPE               VoltageType;   ///< Which Voltage Type to adjust
-  IN        INT8                AdjustValue;   ///< Positive/Negative Adjust Value
-} VOLTAGE_ADJUST;
-
-/// Buffer Handles
-typedef enum {
-  AMD_DMI_INFO_BUFFER_HANDLE = 0x000D000,       ///< Assign 0x000D000 buffer handle to DMI function
-  AMD_PSTATE_DATA_BUFFER_HANDLE,                ///< Assign 0x000D001 buffer handle to Pstate data
-  AMD_PSTATE_ACPI_BUFFER_HANDLE,                ///< Assign 0x000D002 buffer handle to Pstate table
-  AMD_BRAND_ID_BUFFER_HANDLE,                   ///< Assign 0x000D003 buffer handle to Brand ID
-  AMD_ACPI_SLIT_BUFFER_HANDLE,                  ///< Assign 0x000D004 buffer handle to SLIT function
-  AMD_SRAT_INFO_BUFFER_HANDLE,                  ///< Assign 0x000D005 buffer handle to SRAT function
-  AMD_WHEA_BUFFER_HANDLE,                       ///< Assign 0x000D006 buffer handle to WHEA function
-  AMD_S3_INFO_BUFFER_HANDLE,                    ///< Assign 0x000D007 buffer handle to S3 function
-  AMD_S3_NB_INFO_BUFFER_HANDLE,                 ///< Assign 0x000D008 buffer handle to S3 NB device info
-  AMD_ACPI_ALIB_BUFFER_HANDLE,                  ///< Assign 0x000D009 buffer handle to ALIB SSDT table
-  AMD_ACPI_IVRS_BUFFER_HANDLE,                  ///< Assign 0x000D00A buffer handle to IOMMU IVRS table
-  AMD_CRAT_INFO_BUFFER_HANDLE,                  ///< Assign 0x000D00B buffer handle to CRAT function
-  AMD_ACPI_CDIT_BUFFER_HANDLE                   ///< Assign 0x000D00C buffer handle to CDIT function
-} AMD_BUFFER_HANDLE;
-
-
-/************************************************************************
- *
- *  AGESA interface Call-Out function prototypes
- *
- ***********************************************************************/
-
-VOID
-AgesaDoReset (
-  IN        UINTN               ResetType,
-  IN OUT    AMD_CONFIG_PARAMS   *StdHeader
-  );
-
-AGESA_STATUS
-AgesaAllocateBuffer (
-  IN      UINTN                 FcnData,
-  IN OUT  AGESA_BUFFER_PARAMS   *AllocParams
-  );
-
-AGESA_STATUS
-AgesaDeallocateBuffer (
-  IN      UINTN                 FcnData,
-  IN OUT  AGESA_BUFFER_PARAMS   *DeallocParams
-  );
-
-AGESA_STATUS
-AgesaLocateBuffer (
-  IN      UINTN                 FcnData,
-  IN OUT  AGESA_BUFFER_PARAMS   *LocateParams
-  );
-
-AGESA_STATUS
-AgesaHeapRebase (
-  IN      UINTN                 FcnData,
-  IN OUT  AGESA_REBASE_PARAMS   *RebaseParams
-  );
-
-AGESA_STATUS
-AgesaReadSpd (
-  IN        UINTN                 FcnData,
-  IN OUT    AGESA_READ_SPD_PARAMS *ReadSpd
-  );
-
-AGESA_STATUS
-AgesaReadSpdRecovery (
-  IN        UINTN                 FcnData,
-  IN OUT    AGESA_READ_SPD_PARAMS *ReadSpd
-  );
-
-AGESA_STATUS
-AgesaHookBeforeDramInitRecovery (
-  IN       UINTN           FcnData,
-  IN OUT   MEM_DATA_STRUCT *MemData
-  );
-
-AGESA_STATUS
-AgesaRunFcnOnAp (
-  IN        UINTN               ApicIdOfCore,
-  IN        AP_EXE_PARAMS       *LaunchApParams
-  );
-
-AGESA_STATUS
-AgesaHookBeforeDramInit (
-  IN        UINTN               SocketIdModuleId,
-  IN OUT    MEM_DATA_STRUCT     *MemData
-  );
-
-AGESA_STATUS
-AgesaHookBeforeDQSTraining (
-  IN        UINTN               SocketIdModuleId,
-  IN OUT    MEM_DATA_STRUCT     *MemData
-  );
-
-AGESA_STATUS
-AgesaHookBeforeExitSelfRefresh (
-  IN        UINTN               FcnData,
-  IN OUT    MEM_DATA_STRUCT     *MemData
-  );
-
-AGESA_STATUS
-AgesaPcieSlotResetControl (
-  IN      UINTN                 FcnData,
-  IN      PCIe_SLOT_RESET_INFO  *ResetInfo
- );
-
-AGESA_STATUS
-AgesaGetVbiosImage (
-  IN       UINTN                 FcnData,
-  IN OUT   GFX_VBIOS_IMAGE_INFO *VbiosImageInfo
-  );
-
-AGESA_STATUS
-AgesaFchOemCallout (
-  IN      VOID                  *FchData
- );
-
-AGESA_STATUS
-AgesaExternal2dTrainVrefChange (
-  IN        UINTN               SocketIdModuleId,
-  IN OUT    MEM_DATA_STRUCT     *MemData
-  );
-
-AGESA_STATUS
-AgesaGetIdsData  (
-  IN       UINTN              Data,
-  IN OUT   IDS_CALLOUT_STRUCT *IdsCalloutData
-  );
-
-AGESA_STATUS
-AgesaExternalVoltageAdjust (
-  IN       UINTN           SocketIdModuleId,
-  IN OUT   VOLTAGE_ADJUST *AdjustValue
-  );
-
-AGESA_STATUS
-AgesaGnbOemCallout (
-  IN        AMD_CONFIG_PARAMS   *StdHeader,
-  IN        UINTN               FcnData,
-  IN OUT    VOID                *GnbCalloutData
- );
-
-/************************************************************************
- *
- *  AGESA interface structure definition and function prototypes
- *
- ***********************************************************************/
-
-/**********************************************************************
- * Platform Configuration:  The parameters in boot branch function
- **********************************************************************/
-
-///  The possible platform control flow settings.
-typedef enum  {
-  Nfcm,                                          ///< Normal Flow Control Mode.
-  UmaDr,                                         ///< UMA using Display Refresh flow control.
-  UmaIfcm,                                       ///< UMA using Isochronous Flow Control.
-  Ifcm,                                          ///< Isochronous Flow Control Mode (other than for UMA).
-  Iommu,                                         ///< An IOMMU is in use in the system.
-  MaxControlFlow                                 ///< Not a control flow mode, use for limit checking.
-} PLATFORM_CONTROL_FLOW;
-
-///  The possible hardware prefetch mode settings.
-typedef enum  {
-  HARDWARE_PREFETCHER_AUTO,                     ///< Use the recommended setting for the processor. In most cases, the recommended setting is enabled.
-  DISABLE_HW_PREFETCHER_TRAINING_ON_SOFTWARE_PREFETCHES,  ///< Use the recommended setting for the hardware prefetcher, but disable training on software prefetches.
-  DISABLE_L1_PREFETCHER,                        ///< Use the recommended settings for the hardware prefetcher, but disable L1 prefetching and above.
-  DISABLE_L1_PREFETCHER_AND_HW_PREFETCHER_TRAINING_ON_SOFTWARE_PREFETCHES,  ///< (deprecated) - This setting is deprecated; it has the same effect as DISABLE_L1_PREFETCHER
-  DISABLE_L2_STRIDE_PREFETCHER,                 ///< Use the recommended settings for the hardware prefetcher, but disable the L2 stride prefetcher and above
-  DISABLE_HARDWARE_PREFETCH,                    ///< Disable hardware prefetching.
-  MAX_HARDWARE_PREFETCH_MODE                    ///< Not a hardware prefetch mode, use for limit checking.
-} HARDWARE_PREFETCH_MODE;
-
-///  The possible software prefetch mode settings.
-typedef enum  {
-  SOFTWARE_PREFETCHES_AUTO,                     ///< Use the recommended setting for the processor. In most cases, the recommended setting is enabled.
-  DISABLE_SOFTWARE_PREFETCHES,                  ///< Disable software prefetches (convert software prefetch instructions to NOP).
-  MAX_SOFTWARE_PREFETCH_MODE                    ///< Not a software prefetch mode, use for limit checking.
-} SOFTWARE_PREFETCH_MODE;
-
-/// Advanced performance tunings, prefetchers.
-/// These settings provide for performance tuning to optimize for specific workloads.
-typedef struct {
-  IN HARDWARE_PREFETCH_MODE  HardwarePrefetchMode; ///< This value provides for advanced performance tuning by controlling the hardware prefetcher setting.
-  IN SOFTWARE_PREFETCH_MODE  SoftwarePrefetchMode; ///< This value provides for advanced performance tuning by controlling the software prefetch instructions.
-  IN DRAM_PREFETCH_MODE      DramPrefetchMode;     ///< This value provides for advanced performance tuning by controlling the DRAM prefetcher setting.
-} ADVANCED_PERFORMANCE_PROFILE;
-
-///  The possible platform power policy settings.
-typedef enum  {
-  Performance,                                   ///< Optimize for performance.
-  BatteryLife,                                   ///< Optimize for battery life.
-  Auto,                                          ///< Auto
-  MaxPowerPolicy                                 ///< Not a power policy mode, use for limit checking.
-} PLATFORM_POWER_POLICY;
-
-///  Platform performance settings for optimized settings.
-///  Several configuration settings for the processor depend upon other parts and
-///  general designer choices for the system. The determination of these data points
-///  is not standard for all platforms, so the host environment needs to provide these
-///  to specify how the system is to be configured.
-typedef struct {
-  IN PLATFORM_CONTROL_FLOW PlatformControlFlowMode;    ///< The platform's control flow mode for optimum platform performance.
-                                                       ///< @BldCfgItem{BLDCFG_PLATFORM_CONTROL_FLOW_MODE}
-  IN BOOLEAN               Use32ByteRefresh;           ///< Display Refresh traffic generates 32 byte requests.
-                                                       ///< @BldCfgItem{BLDCFG_USE_32_BYTE_REFRESH}
-  IN BOOLEAN               UseVariableMctIsocPriority; ///< The Memory controller will be set to Variable Isoc Priority.
-                                                       ///< @BldCfgItem{BLDCFG_USE_VARIABLE_MCT_ISOC_PRIORITY}
-  IN ADVANCED_PERFORMANCE_PROFILE AdvancedPerformanceProfile;   ///< The advanced platform performance settings.
-  IN PLATFORM_POWER_POLICY PlatformPowerPolicy;        ///< The platform's desired power policy
-                                                       ///< @BldCfgItem{BLDCFG_PLATFORM_POWER_POLICY_MODE}
-  IN BOOLEAN               NbPstatesSupported;         ///< The Nb-Pstates is supported or not
-                                                       ///< @BldCfgItem{BLDCFG_NB_PSTATES_SUPPORTED}
-} PERFORMANCE_PROFILE;
-
-///  Platform settings that describe the voltage regulator modules of the system.
-///  Many power management settings are dependent upon the characteristics of the
-///  on-board voltage regulator module (VRM).  The host environment needs to provide
-///  these to specify how the system is to be configured.
-typedef struct {
-  IN UINT32  CurrentLimit;                         ///< Vrm Current Limit.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_CURRENT_LIMIT}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_CURRENT_LIMIT}
-  IN UINT32  LowPowerThreshold;                    ///< Vrm Low Power Threshold.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_LOW_POWER_THRESHOLD}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_LOW_POWER_THRESHOLD}
-  IN UINT32  SlewRate;                             ///< Vrm Slew Rate.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_SLEW_RATE}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_SLEW_RATE}
-  IN BOOLEAN HiSpeedEnable;                        ///< Select high speed VRM.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_HIGH_SPEED_ENABLE}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_HIGH_SPEED_ENABLE}
-  IN UINT32  MaximumCurrentLimit;                  ///< Vrm Maximum Current Limit.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_MAXIMUM_CURRENT_LIMIT}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_MAXIMUM_CURRENT_LIMIT}
-  IN UINT32  SviOcpLevel;                          ///< SVI OCP Level.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_SVI_OCP_LEVEL}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_SVI_OCP_LEVEL}
-} PLATFORM_VRM_CONFIGURATION;
-
-///  The VRM types to characterize.
-typedef enum  {
-  CoreVrm,                                       ///< VDD plane.
-  NbVrm,                                         ///< VDDNB plane.
-  MaxVrmType                                     ///< Not a valid VRM type, use for limit checking.
-} PLATFORM_VRM_TYPE;
-
-
-/// FCH Platform Configuration Policy
-typedef struct {
-  IN UINT16     CfgSmbus0BaseAddress;             ///< SMBUS0 Controller Base Address
-  IN UINT16     CfgSmbus1BaseAddress;             ///< SMBUS1 Controller Base Address
-  IN UINT16     CfgSioPmeBaseAddress;             ///< I/O base address for LPC I/O target range
-  IN UINT16     CfgAcpiPm1EvtBlkAddr;             ///< I/O base address of ACPI power management Event Block
-  IN UINT16     CfgAcpiPm1CntBlkAddr;             ///< I/O base address of ACPI power management Control Block
-  IN UINT16     CfgAcpiPmTmrBlkAddr;              ///< I/O base address of ACPI power management Timer Block
-  IN UINT16     CfgCpuControlBlkAddr;             ///< I/O base address of ACPI power management CPU Control Block
-  IN UINT16     CfgAcpiGpe0BlkAddr;               ///< I/O base address of ACPI power management General Purpose Event Block
-  IN UINT16     CfgSmiCmdPortAddr;                ///< I/O base address of ACPI SMI Command Block
-  IN UINT16     CfgAcpiPmaCntBlkAddr;             ///< I/O base address of ACPI power management additional control block
-  IN UINT32     CfgGecShadowRomBase;              ///< 32-bit base address to the GEC shadow ROM
-  IN UINT32     CfgWatchDogTimerBase;             ///< Watchdog Timer base address
-  IN UINT32     CfgSpiRomBaseAddress;             ///< Base address for the SPI ROM controller
-  IN UINT32     CfgHpetBaseAddress;               ///< HPET MMIO base address
-  IN UINT32     CfgAzaliaSsid;                    ///< Subsystem ID of HD Audio controller
-  IN UINT32     CfgSmbusSsid;                     ///< Subsystem ID of SMBUS controller
-  IN UINT32     CfgIdeSsid;                       ///< Subsystem ID of IDE controller
-  IN UINT32     CfgSataAhciSsid;                  ///< Subsystem ID of SATA controller in AHCI mode
-  IN UINT32     CfgSataIdeSsid;                   ///< Subsystem ID of SATA controller in IDE mode
-  IN UINT32     CfgSataRaid5Ssid;                 ///< Subsystem ID of SATA controller in RAID5 mode
-  IN UINT32     CfgSataRaidSsid;                  ///< Subsystem ID of SATA controller in RAID mode
-  IN UINT32     CfgEhciSsid;                      ///< Subsystem ID of EHCI
-  IN UINT32     CfgOhciSsid;                      ///< Subsystem ID of OHCI
-  IN UINT32     CfgLpcSsid;                       ///< Subsystem ID of LPC ISA Bridge
-  IN UINT32     CfgSdSsid;                        ///< Subsystem ID of SecureDigital controller
-  IN UINT32     CfgXhciSsid;                      ///< Subsystem ID of XHCI
-  IN BOOLEAN    CfgFchPort80BehindPcib;           ///< Is port80 cycle going to the PCI bridge
-  IN BOOLEAN    CfgFchEnableAcpiSleepTrap;        ///< ACPI sleep SMI enable/disable
-  IN GPP_LINKMODE CfgFchGppLinkConfig;            ///< GPP link configuration
-  IN BOOLEAN    CfgFchGppPort0Present;            ///< Is FCH GPP port 0 present
-  IN BOOLEAN    CfgFchGppPort1Present;            ///< Is FCH GPP port 1 present
-  IN BOOLEAN    CfgFchGppPort2Present;            ///< Is FCH GPP port 2 present
-  IN BOOLEAN    CfgFchGppPort3Present;            ///< Is FCH GPP port 3 present
-  IN BOOLEAN    CfgFchGppPort0HotPlug;            ///< Is FCH GPP port 0 hotplug capable
-  IN BOOLEAN    CfgFchGppPort1HotPlug;            ///< Is FCH GPP port 1 hotplug capable
-  IN BOOLEAN    CfgFchGppPort2HotPlug;            ///< Is FCH GPP port 2 hotplug capable
-  IN BOOLEAN    CfgFchGppPort3HotPlug;            ///< Is FCH GPP port 3 hotplug capable
-
-  IN UINT8   CfgFchEsataPortBitMap;               ///< ESATA Port definition, eg: [0]=1, means port 0 is ESATA capable
-  IN UINT8   CfgFchIrPinControl;                  ///< Register bitfield describing Infrared Pin Control:
-                                                  ///<   [0] - IR Enable 0
-                                                  ///<   [1] - IR Enable 1
-                                                  ///<   [2] - IR Tx0
-                                                  ///<   [3] - IR Tx1
-                                                  ///<   [4] - IR Open Drain
-                                                  ///<   [5] - IR Enable LED
-  IN SD_CLOCK_CONTROL CfgFchSdClockControl;       ///< FCH SD Clock Control
-  IN SCI_MAP_CONTROL  *CfgFchSciMapControl;       ///< FCH SCI Mapping Control
-  IN SATA_PHY_CONTROL *CfgFchSataPhyControl;      ///< FCH SATA PHY Control
-  IN GPIO_CONTROL     *CfgFchGpioControl;         ///< FCH GPIO Control
-  IN BOOLEAN          CfgFchRtcWorkAround;        ///< FCH RTC Workaround
-  IN BOOLEAN          CfgFchUsbPortDisWorkAround; ///< FCH USB Workaround
-} FCH_PLATFORM_POLICY;
-
-
-/// Build Option/Configuration Boolean Structure.
-typedef struct {
-  IN  AMD_CODE_HEADER VersionString;              ///< AMD embedded code version string
-
-  //Build Option Area
-  IN BOOLEAN OptionUDimms;                        ///< @ref BLDOPT_REMOVE_UDIMMS_SUPPORT "BLDOPT_REMOVE_UDIMMS_SUPPORT"
-  IN BOOLEAN OptionRDimms;                        ///< @ref BLDOPT_REMOVE_RDIMMS_SUPPORT "BLDOPT_REMOVE_RDIMMS_SUPPORT"
-  IN BOOLEAN OptionLrDimms;                       ///< @ref BLDOPT_REMOVE_LRDIMMS_SUPPORT "BLDOPT_REMOVE_LRDIMMS_SUPPORT"
-  IN BOOLEAN OptionEcc;                           ///< @ref BLDOPT_REMOVE_ECC_SUPPORT "BLDOPT_REMOVE_ECC_SUPPORT"
-  IN BOOLEAN OptionBankInterleave;                ///< @ref BLDOPT_REMOVE_BANK_INTERLEAVE "BLDOPT_REMOVE_BANK_INTERLEAVE"
-  IN BOOLEAN OptionDctInterleave;                 ///< @ref BLDOPT_REMOVE_DCT_INTERLEAVE "BLDOPT_REMOVE_DCT_INTERLEAVE"
-  IN BOOLEAN OptionNodeInterleave;                ///< @ref BLDOPT_REMOVE_NODE_INTERLEAVE "BLDOPT_REMOVE_NODE_INTERLEAVE"
-  IN BOOLEAN OptionParallelTraining;              ///< @ref BLDOPT_REMOVE_PARALLEL_TRAINING "BLDOPT_REMOVE_PARALLEL_TRAINING"
-  IN BOOLEAN OptionOnlineSpare;                   ///< @ref BLDOPT_REMOVE_ONLINE_SPARE_SUPPORT "BLDOPT_REMOVE_ONLINE_SPARE_SUPPORT"
-  IN BOOLEAN OptionMemRestore;                    ///< @ref BLDOPT_REMOVE_MEM_RESTORE_SUPPORT "BLDOPT_REMOVE_MEM_RESTORE_SUPPORT"
-  IN BOOLEAN OptionMultisocket;                   ///< @ref BLDOPT_REMOVE_MULTISOCKET_SUPPORT "BLDOPT_REMOVE_MULTISOCKET_SUPPORT"
-  IN BOOLEAN OptionAcpiPstates;                   ///< @ref BLDOPT_REMOVE_ACPI_PSTATES "BLDOPT_REMOVE_ACPI_PSTATES"
-  IN BOOLEAN OptionCrat;                          ///< @ref BLDOPT_REMOVE_CRAT "BLDOPT_REMOVE_CRAT"
-  IN BOOLEAN OptionCdit;                          ///< @ref BLDOPT_REMOVE_CDIT "BLDOPT_REMOVE_CDIT"
-  IN BOOLEAN OptionSrat;                          ///< @ref BLDOPT_REMOVE_SRAT "BLDOPT_REMOVE_SRAT"
-  IN BOOLEAN OptionSlit;                          ///< @ref BLDOPT_REMOVE_SLIT "BLDOPT_REMOVE_SLIT"
-  IN BOOLEAN OptionWhea;                          ///< @ref BLDOPT_REMOVE_WHEA "BLDOPT_REMOVE_WHEA"
-  IN BOOLEAN OptionDmi;                           ///< @ref BLDOPT_REMOVE_DMI "BLDOPT_REMOVE_DMI"
-  IN BOOLEAN OptionEarlySamples;                  ///< @ref BLDOPT_REMOVE_EARLY_SAMPLES "BLDOPT_REMOVE_EARLY_SAMPLES"
-  IN BOOLEAN OptionAddrToCsTranslator;            ///< ADDR_TO_CS_TRANSLATOR
-
-  //Build Configuration Area
-  IN UINT64 CfgPciMmioAddress;                    ///< Pci Mmio Base Address to use for PCI Config accesses.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_PCI_MMIO_BASE}
-  IN UINT32 CfgPciMmioSize;                       ///< Pci Mmio region Size.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_PCI_MMIO_SIZE}
-  IN PLATFORM_VRM_CONFIGURATION CfgPlatVrmCfg[MaxVrmType]; ///< Several configuration settings for the voltage regulator modules.
-  IN UINT32 CfgCpuFrequencyLimit;                 ///< CPU frequency limit
-  IN PLATFORM_CONNECTED_STANDBY_MODES CfgPlatformConnectedStandbyMode; ///< Enable or disable connected standby
-  IN UINT32 CfgPlatNumIoApics;                    ///< The number of IO APICS for the platform.
-  IN UINT32 CfgMemInitPstate;                     ///< Memory Init Pstate.
-  IN PLATFORM_CSTATE_MODES CfgPlatformCStateMode; ///< Select the C-State Mode that will used.
-  IN UINT32 CfgPlatformCStateOpData;              ///< An IO port or additional C-State setup data, depends on C-State mode.
-  IN UINT16 CfgPlatformCStateIoBaseAddress;       ///< Specifies I/O ports that can be used to allow CPU to enter CStates
-  IN PLATFORM_CPB_MODES CfgPlatformCpbMode;       ///< Enable or disable core performance boost
-  IN PLATFORM_LOW_POWER_PSTATE_MODES CfgLowPowerPstateForProcHot; ///< Low power Pstate for PROCHOT mode
-  IN UINT32 CfgCoreLevelingMode;                  ///< Apply any downcoring or core count leveling as specified.
-  IN PERFORMANCE_PROFILE CfgPerformanceProfile;   ///< The platform's control flow mode and platform performance settings.
-
-  IN UINT32 CfgAmdPlatformType;                   ///< Designate the platform as a Server, Desktop, or Mobile.
-  IN UINT32 CfgAmdPowerCeiling;                   ///< PowerCeiling, specifies a maximum power usage limit for the platform
-  IN UINT16 CfgHtcTemperatureLimit;               ///< Hardware Thermal Control temperature limit in tenths of degrees Celsius.
-  IN UINT16 CfgLhtcTemperatureLimit;              ///< Local Hardware Thermal Control temperature limit in tenths of degrees Celsius.
-
-  IN UINT32 CfgMemoryBusFrequencyLimit;           ///< Memory Bus Frequency Limit.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT}
-  IN BOOLEAN CfgMemoryModeUnganged;               ///< Memory Mode Unganged.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_MODE_UNGANGED}
-  IN BOOLEAN CfgMemoryQuadRankCapable;            ///< Memory Quad Rank Capable.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_QUAD_RANK_CAPABLE}
-  IN UINT32 CfgMemoryQuadrankType;        ///< Memory Quadrank Type.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_QUADRANK_TYPE}
-  IN BOOLEAN CfgMemoryRDimmCapable;               ///< Memory RDIMM Capable.
-  IN BOOLEAN CfgMemoryLRDimmCapable;              ///< Memory LRDIMM Capable.
-  IN BOOLEAN CfgMemoryUDimmCapable;               ///< Memory UDIMM Capable.
-  IN BOOLEAN CfgMemorySODimmCapable;              ///< Memory SODimm Capable.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_SODIMM_CAPABLE}
-  IN BOOLEAN CfgLimitMemoryToBelow1Tb;            ///< Limit memory address space to below 1TB
-  IN BOOLEAN CfgMemoryEnableBankInterleaving;     ///< Memory Enable Bank Interleaving.
-  IN BOOLEAN CfgMemoryEnableNodeInterleaving;     ///< Memory Enable Node Interleaving.
-  IN BOOLEAN CfgMemoryChannelInterleaving;        ///< Memory Channel Interleaving.
-  IN BOOLEAN CfgMemoryPowerDown;                  ///< Memory Power Down.
-  IN UINT32  CfgPowerDownMode;                    ///< Power Down Mode.
-  IN BOOLEAN CfgOnlineSpare;                      ///< Online Spare.
-  IN BOOLEAN CfgMemoryParityEnable;               ///< Memory Parity Enable.
-  IN BOOLEAN CfgBankSwizzle;                      ///< Bank Swizzle.
-  IN UINT32  CfgTimingModeSelect;                 ///< Timing Mode Select.
-  IN UINT32  CfgMemoryClockSelect;                ///< Memory Clock Select.
-  IN BOOLEAN CfgDqsTrainingControl;               ///< Dqs Training Control.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_DQS_TRAINING_CONTROL}
-  IN BOOLEAN CfgIgnoreSpdChecksum;                ///< Ignore Spd Checksum.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_IGNORE_SPD_CHECKSUM}
-  IN BOOLEAN CfgUseBurstMode;                     ///< Use Burst Mode.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_USE_BURST_MODE}
-  IN BOOLEAN CfgMemoryAllClocksOn;                ///< Memory All Clocks On.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_ALL_CLOCKS_ON}
-  IN BOOLEAN CfgDdrPhyDllBypassMode;              ///< Enable DllPDBypassMode
-  IN BOOLEAN CfgEnableEccFeature;                 ///< Enable ECC Feature.
-  IN BOOLEAN CfgEccRedirection;                   ///< ECC Redirection.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_ECC_REDIRECTION}
-  IN UINT16  CfgScrubDramRate;                    ///< Scrub Dram Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_DRAM_RATE}
-  IN UINT16  CfgScrubL2Rate;                      ///< Scrub L2Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_L2_RATE}
-  IN UINT16  CfgScrubL3Rate;                      ///< Scrub L3Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_L3_RATE}
-  IN UINT16  CfgScrubIcRate;                      ///< Scrub Ic Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_IC_RATE}
-  IN UINT16  CfgScrubDcRate;                      ///< Scrub Dc Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_DC_RATE}
-  IN BOOLEAN CfgEccSyncFlood;                     ///< ECC Sync Flood.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_ECC_SYNC_FLOOD}
-  IN UINT16  CfgEccSymbolSize;                    ///< ECC Symbol Size.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_ECC_SYMBOL_SIZE}
-  IN UINT64  CfgHeapDramAddress;                  ///< Heap contents will be temporarily stored in this address during the transition.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_HEAP_DRAM_ADDRESS}
-  IN BOOLEAN CfgNodeMem1GBAlign;                  ///< Node Mem 1GB boundary Alignment
-  IN BOOLEAN CfgS3LateRestore;                    ///< S3 Late Restore
-  IN BOOLEAN CfgAcpiPstateIndependent;            ///< PSD method dependent/Independent
-  IN UINT32  CfgAcpiPstatesPsdPolicy;             ///< PSD policy
-  IN AP_MTRR_SETTINGS *CfgApMtrrSettingsList;     ///< The AP's MTRR settings before final halt
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_AP_MTRR_SETTINGS_LIST}
-  IN UMA_MODE CfgUmaMode;                         ///< Uma Mode
-  IN UINT32 CfgUmaSize;                           ///< Uma Size [31:0]=Addr[47:16]
-  IN BOOLEAN CfgUmaAbove4G;                       ///< Uma Above 4G Support
-  IN UMA_ALIGNMENT CfgUmaAlignment;               ///< Uma alignment
-  IN BOOLEAN CfgProcessorScopeInSb;               ///< ACPI Processor Object in \\_SB scope
-  IN CHAR8   CfgProcessorScopeName0;              ///< OEM specific 1st character of processor scope name.
-  IN CHAR8   CfgProcessorScopeName1;              ///< OEM specific 2nd character of processor scope name.
-  IN UINT8   CfgGnbHdAudio;                       ///< GNB HD Audio
-  IN UINT8   CfgAbmSupport;                       ///< Abm Support
-  IN UINT8   CfgDynamicRefreshRate;               ///< DRR Dynamic Refresh Rate
-  IN UINT16  CfgLcdBackLightControl;              ///< LCD Backlight Control
-  IN UINT8   CfgGnb3dStereoPinIndex;                ///< 3D Stereo Pin ID.
-  IN UINT32  CfgTempPcieMmioBaseAddress;          ///< Temp pcie MMIO base Address
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_TEMP_PCIE_MMIO_BASE_ADDRESS}
-  IN UINT32  CfgGnbIGPUSSID;                      ///< Gnb internal GPU SSID
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_IGPU_SUBSYSTEM_ID}
-  IN UINT32  CfgGnbHDAudioSSID;                   ///< Gnb HD Audio SSID
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID}
-  IN UINT32  CfgGnbPcieSSID;                      ///< Gnb PCIe SSID
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_APU_PCIE_PORTS_SUBSYSTEM_ID}
-  IN UINT16  CfgLvdsSpreadSpectrum;               ///< Lvds Spread Spectrum
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_GFX_LVDS_SPREAD_SPECTRUM}
-  IN UINT16  CfgLvdsSpreadSpectrumRate;           ///< Lvds Spread Spectrum Rate
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_GFX_LVDS_SPREAD_SPECTRUM_RATE}
-  IN FCH_PLATFORM_POLICY  *FchBldCfg;             ///< FCH platform build configuration policy
-
-  IN BOOLEAN    CfgIommuSupport;                  ///< IOMMU support
-  IN UINT8      CfgLvdsPowerOnSeqDigonToDe;       ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqDeToVaryBl;      ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqDeToDigon;       ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqVaryBlToDe;      ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqOnToOffDelay;    ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqVaryBlToBlon;    ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqBlonToVaryBl;    ///< Panel initialization timing
-  IN UINT16     CfgLvdsMaxPixelClockFreq;         ///< The maximum pixel clock frequency supported
-  IN UINT32     CfgLcdBitDepthControlValue;       ///< The LCD bit depth control settings
-  IN UINT8      CfgLvds24bbpPanelMode;            ///< The LVDS 24 BBP mode
-  IN LVDS_MISC_CONTROL CfgLvdsMiscControl;        ///< THe LVDS Misc control
-  IN UINT16     CfgPcieRefClkSpreadSpectrum;      ///< PCIe Reference Clock Spread Spectrum
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_PCIE_REFCLK_SPREAD_SPECTRUM}
-  IN BOOLEAN    CfgExternalVrefCtlFeature;        ///< External Vref control
-  IN FORCE_TRAIN_MODE   CfgForceTrainMode;        ///< Force Train Mode
-  IN BOOLEAN    CfgGnbRemoteDisplaySupport;       ///< Wireless Display Support
-  IN IOMMU_EXCLUSION_RANGE_DESCRIPTOR *CfgIvrsExclusionRangeList;
-  IN BOOLEAN    CfgGnbSyncFloodPinAsNmi;          ///< @ref BLDCFG_USE_SYNCFLOOD_AS_NMI "BLDCFG_USE_SYNCFLOOD_AS_NMI"
-  IN UINT8      CfgIgpuEnableDisablePolicy;       ///< This item defines the iGPU Enable/Disable policy
-                                                  ///< @li 0 = Auto - use current default
-                                                  ///< @li 2 = Disable iGPU if ANY PCI or PCIe Graphics card is present
-                                                  ///< @BldCfgItem{BLDCFG_IGPU_ENABLE_DISABLE_POLICY}
-  IN UINT8      CfgGnbSwTjOffset;                 ///< Software-writeable TjOffset to account for changes in junction temperature
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_GNB_THERMAL_SENSOR_CORRECTION}
-  IN UINT8      CfgLvdsMiscVoltAdjustment;        ///< Register LVDS_CTRL_4 to adjust LVDS output voltage
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_LVDS_MISC_VOL_ADJUSTMENT}
-  IN DISPLAY_MISC_CONTROL CfgDisplayMiscControl;  ///< The Display Misc control
-  IN DP_FIXED_VOLT_SWING_TYPE CfgDpFixedVoltSwingType;///< To indicate fixed voltage swing value
-                                                      ///< @BldCfgItem{BLDCFG_DP_FIXED_VOLT_SWING}
-  IN TECHNOLOGY_TYPE CfgDimmTypeUsedInMixedConfig; ///< Select the preferred technology type that AGESA will enable
-                                                   ///< when it is mixed with other technology types.
-  IN BOOLEAN CfgHybridBoostEnable;                ///< HyBrid Boost support
-                                                  ///< @BldCfgItem{BLDCFG_HYBRID_BOOST_ENABLE}
-  IN UINT64  CfgGnbIoapicAddress;                 ///< GNB IOAPIC Base Address(NULL if platform configured)
-                                                  ///< @BldCfgItem{BLDCFG_GNB_IOAPIC_ADDRESS}
-  IN BOOLEAN CfgDataEyeEn;                        ///< Enable get 2D Data Eye
-  IN BOOLEAN CfgDockedTdpHeadroom;                ///< @BldCfgItem{BLDCFG_DOCKED_TDP_HEADROOM}
-  IN BOOLEAN CfgBatteryBoostEn;                   ///< @BldCfgItem{BLDCFG_BATTERY_BOOST_EN}
-  IN UINT32 CfgTdpAcDocked;                       ///< @BldCfgItem{BLDCFG_TDP_AC_DOCKED}
-  IN UINT32 CfgTdpDcDocked;                       ///< @BldCfgItem{BLDCFG_TDP_DC_DOCKED}
-  IN UINT32 CfgTdpAcUnDocked;                     ///< @BldCfgItem{BLDCFG_TDP_AC_UNDOCKED}
-  IN UINT32 CfgTdpDcUnDocked;                     ///< @BldCfgItem{BLDCFG_TDP_DC_UNDOCKED}
-  IN BOOLEAN CfgStapmEnAcDocked;                  ///< @BldCfgItem{BLDCFG_STAPM_EN_AC_DOCKED}
-  IN BOOLEAN CfgStapmEnDcDocked;                  ///< @BldCfgItem{BLDCFG_STAPM_EN_DC_DOCKED}
-  IN BOOLEAN CfgStapmEnAcUnDocked;                ///< @BldCfgItem{BLDCFG_STAPM_EN_AC_UNDOCKED}
-  IN BOOLEAN CfgStapmEnDcUnDocked;                ///< @BldCfgItem{BLDCFG_STAPM_EN_DC_UNDOCKED}
-  IN UINT32 CfgStapmPowerAcDocked;                ///< @BldCfgItem{BLDCFG_STAPM_POWER_AC_DOCKED}
-  IN UINT32 CfgStapmPowerDcDocked;                ///< @BldCfgItem{BLDCFG_STAPM_POWER_DC_DOCKED}
-  IN UINT32 CfgStapmPowerAcUnDocked;              ///< @BldCfgItem{BLDCFG_STAPM_POWER_AC_UNDOCKED}
-  IN UINT32 CfgStapmPowerDcUnDocked;              ///< @BldCfgItem{BLDCFG_STAPM_POWER_DC_UNDOCKED}
-  IN BOOLEAN CfgDramDoubleRefreshRateEn;          ///< Double DRAM refresh rate
-  IN ACP_SIZE  CfgGnbAcpSize;                     ///< ACP size [31:0]=Addr[47:16]
-                                                  ///< @BldCfgItem{BLDCFG_ACP_SIZE}
-  IN PMU_TRAIN_MODE   CfgPmuTrainMode;            ///< Force Train Mode
-                                                  ///< @BldCfgItem{BLDCFG_PMU_TRAINING_MODE}
-  IN MEMORY_PHY_VOLTAGE CfgMemoryPhyVoltage;      ///< Memory Phy voltage (VDDR)
-                                                  ///< @BldCfgItem{BLDCFG_MEMORY_PHY_VOLTAGE}
-  IN UINT32 CfgGpuFrequencyLimit;                 ///< @BldCfgItem{BLDCFG_GPU_FREQUENCY_LIMIT}
-  IN BOOLEAN CfgBapmEnable;                       ///< @BldCfgItem{BLDCFG_BAPM_ENABLE}
-  IN BOOLEAN Reserved;                            ///< reserved...
-} BUILD_OPT_CFG;
-
-///  A structure containing platform specific operational characteristics. This
-///  structure is initially populated by the initializer with a copy of the same
-///  structure that was created at build time using the build configuration controls.
-typedef struct _PLATFORM_CONFIGURATION {
-  IN PERFORMANCE_PROFILE PlatformProfile;             ///< Several configuration settings for the processor.
-  IN UINT8               CoreLevelingMode;            ///< Indicates how to balance the number of cores per processor.
-                                                      ///< @BldCfgItem{BLDCFG_CORE_LEVELING_MODE}
-  IN PLATFORM_CSTATE_MODES  CStateMode;               ///< Specifies the method of C-State enablement - Disabled, or C6.
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_CSTATE_MODE}
-  IN UINT32              CStatePlatformData;          ///< This element specifies some pertinent data needed for the operation of the Cstate feature
-                                                      ///< If CStateMode is CStateModeC6, this item is reserved
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_CSTATE_OPDATA}
-  IN UINT16              CStateIoBaseAddress;         ///< This item specifies a free block of 8 consecutive bytes of I/O ports that
-                                                      ///< can be used to allow the CPU to enter Cstates.
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_CSTATE_IO_BASE_ADDRESS}
-  IN PLATFORM_CPB_MODES  CpbMode;                     ///< Specifies the method of core performance boost enablement - Disabled, or Auto.
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_CPB_MODE}
-  IN BOOLEAN             UserOptionDmi;               ///< When set to TRUE, the DMI data table is generated.
-  IN BOOLEAN             UserOptionPState;            ///< When set to TRUE, the PState data tables are generated.
-  IN BOOLEAN             UserOptionCrat;              ///< When set to TRUE, the CRAT data table is generated.
-  IN BOOLEAN             UserOptionCdit;              ///< When set to TRUE, the CDIT data table is generated.
-  IN BOOLEAN             UserOptionSrat;              ///< When set to TRUE, the SRAT data table is generated.
-  IN BOOLEAN             UserOptionSlit;              ///< When set to TRUE, the SLIT data table is generated.
-  IN BOOLEAN             UserOptionWhea;              ///< When set to TRUE, the WHEA data table is generated.
-  IN PLATFORM_LOW_POWER_PSTATE_MODES  LowPowerPstateForProcHot; ///< Specifies the method of low power Pstate for PROCHOT enablement - Disabled, or Auto.
-  IN UINT32              PowerCeiling;                ///< P-State Ceiling Enabling Deck - Max power milli-watts.
-  IN BOOLEAN             ForcePstateIndependent;      ///< Deprecated in favor of PstatesPsdPolicy.
-                                                      ///< P-State _PSD is forced independent.
-                                                      ///< @BldCfgItem{BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT}
-  IN UINT32              PstatesPsdPolicy;            ///< PSD policy
-                                                      ///< @BldCfgItem{BLDCFG_ACPI_PSTATES_PSD_POLICY}
-  IN UINT32              CpuFrequencyLimit;           ///< @BldCfgItem{BLDCFG_CPU_FREQUENCY_LIMIT}
-  IN PLATFORM_CONNECTED_STANDBY_MODES CfgPlatformConnectedStandbyMode; ///< @BldCfgItem{BLDCFG_CPU_CONNECTED_STANDBY_MODE}
-  IN UINT32              NumberOfIoApics;             ///< Number of I/O APICs in the system
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_NUM_IO_APICS}
-  IN PLATFORM_VRM_CONFIGURATION VrmProperties[MaxVrmType]; ///< Several configuration settings for the voltage regulator modules.
-  IN BOOLEAN             ProcessorScopeInSb;          ///< ACPI Processor Object in \\_SB scope
-                                                      ///< @BldCfgItem{BLDCFG_PROCESSOR_SCOPE_IN_SB}
-  IN CHAR8               ProcessorScopeName0;         ///< OEM specific 1st character of processor scope name.
-                                                      ///< @BldCfgItem{BLDCFG_PROCESSOR_SCOPE_NAME0}
-  IN CHAR8               ProcessorScopeName1;         ///< OEM specific 2nd character of processor scope name.
-                                                      ///< @BldCfgItem{BLDCFG_PROCESSOR_SCOPE_NAME1}
-  IN UINT8               GnbHdAudio;                  ///< Control GFX HD Audio controller(Used for HDMI and DP display output),
-                                                      ///< essentially it enables function 1 of graphics device.
-                                                      ///< @li 0 = HD Audio disable
-                                                      ///< @li 1 = HD Audio enable
-                                                      ///< @BldCfgItem{BLDCFG_CFG_GNB_HD_AUDIO}
-  IN UINT8               AbmSupport;                  ///< Automatic adjust LVDS/eDP Back light level support.It is
-                                                      ///< characteristic specific to display panel which used by platform design.
-                                                      ///< @li 0 = ABM support disabled
-                                                      ///< @li 1 = ABM support enabled
-                                                      ///< @BldCfgItem{BLDCFG_CFG_ABM_SUPPORT}
-  IN UINT8               DynamicRefreshRate;          ///< Adjust refresh rate on LVDS/eDP.
-                                                      ///< @BldCfgItem{BLDCFG_CFG_DYNAMIC_REFRESH_RATE}
-  IN UINT16              LcdBackLightControl;         ///< The PWM frequency to LCD backlight control.
-                                                      ///< If equal to 0 backlight not controlled by iGPU
-                                                      ///< @BldCfgItem{BLDCFG_CFG_LCD_BACK_LIGHT_CONTROL}
-  IN UINT16              HtcTemperatureLimit;         ///< The Hardware Thermal Control temperature limit in tenths of degrees Celsius.
-                                                      ///< If equal to 0, use hardware defaults.
-                                                      ///< @BldCfgItem{BLDCFG_HTC_TEMPERATURE_LIMIT}
-  IN UINT16              LhtcTemperatureLimit;        ///< The Local Hardware Thermal Control temperature limit in tenths of degrees Celsius.
-                                                      ///< If equal to 0, use hardware defaults.
-                                                      ///< @BldCfgItem{BLDCFG_LHTC_TEMPERATURE_LIMIT}
-  IN ACP_SIZE              AcpSize;                     ///< The size of ACP dram
-                                                      ///< ACP_Size[31:0]=Addr[47:16]
-                                                      ///< @BldCfgItem{BLDCFG_ACP_SIZE}
-} PLATFORM_CONFIGURATION;
-
-
-/**********************************************************************
- * Structures for: AmdInitLate
- **********************************************************************/
-#define PROC_VERSION_LENGTH  48
-#define MAX_DIMMS_PER_SOCKET 16
-#define PROC_MANU_LENGTH     29
-
-/*  Interface Parameter Structures  */
-/// DMI Type4 - Processor ID
-typedef struct {
-  OUT UINT32                    ProcIdLsd;              ///< Lower half of 64b ID
-  OUT UINT32                    ProcIdMsd;              ///< Upper half of 64b ID
-} TYPE4_PROC_ID;
-
-/// DMI Type 4 - Processor information
-typedef struct {
-  OUT UINT8                     T4ProcType;             ///< CPU Type
-  OUT UINT8                     T4ProcFamily;           ///< Family 1
-  OUT TYPE4_PROC_ID             T4ProcId;               ///< Id
-  OUT UINT8                     T4Voltage;              ///< Voltage
-  OUT UINT16                    T4ExternalClock;        ///< External clock
-  OUT UINT16                    T4MaxSpeed;             ///< Max speed
-  OUT UINT16                    T4CurrentSpeed;         ///< Current speed
-  OUT UINT8                     T4Status;               ///< Status
-  OUT UINT8                     T4ProcUpgrade;          ///< Up grade
-  OUT UINT8                     T4CoreCount;            ///< Core count
-  OUT UINT8                     T4CoreEnabled;          ///< Core Enable
-  OUT UINT8                     T4ThreadCount;          ///< Thread count
-  OUT UINT16                    T4ProcCharacteristics;  ///< Characteristics
-  OUT UINT16                    T4ProcFamily2;          ///< Family 2
-  OUT CHAR8                     T4ProcVersion[PROC_VERSION_LENGTH]; ///< Cpu version
-  OUT CHAR8                     T4ProcManufacturer[PROC_MANU_LENGTH]; ///< Manufacturer
-} TYPE4_DMI_INFO;
-
-/// DMI Type 7 - Cache information
-typedef struct _TYPE7_DMI_INFO {
-  OUT UINT16                    T7CacheCfg;             ///< Cache cfg
-  OUT UINT16                    T7MaxCacheSize;         ///< Max size
-  OUT UINT16                    T7InstallSize;          ///< Install size
-  OUT UINT16                    T7SupportedSramType;    ///< Supported Sram Type
-  OUT UINT16                    T7CurrentSramType;      ///< Current type
-  OUT UINT8                     T7CacheSpeed;           ///< Speed
-  OUT UINT8                     T7ErrorCorrectionType;  ///< ECC type
-  OUT UINT8                     T7SystemCacheType;      ///< Cache type
-  OUT UINT8                     T7Associativity;        ///< Associativity
-} TYPE7_DMI_INFO;
-
-/// DMI Type 16 offset 04h - Location
-typedef enum {
-  OtherLocation = 0x01,                                 ///< Assign 01 to Other
-  UnknownLocation,                                      ///< Assign 02 to Unknown
-  SystemboardOrMotherboard,                             ///< Assign 03 to systemboard or motherboard
-  IsaAddonCard,                                         ///< Assign 04 to ISA add-on card
-  EisaAddonCard,                                        ///< Assign 05 to EISA add-on card
-  PciAddonCard,                                         ///< Assign 06 to PCI add-on card
-  McaAddonCard,                                         ///< Assign 07 to MCA add-on card
-  PcmciaAddonCard,                                      ///< Assign 08 to PCMCIA add-on card
-  ProprietaryAddonCard,                                 ///< Assign 09 to proprietary add-on card
-  NuBus,                                                ///< Assign 0A to NuBus
-  Pc98C20AddonCard,                                     ///< Assign 0A0 to PC-98/C20 add-on card
-  Pc98C24AddonCard,                                     ///< Assign 0A1 to PC-98/C24 add-on card
-  Pc98EAddoncard,                                       ///< Assign 0A2 to PC-98/E add-on card
-  Pc98LocalBusAddonCard                                 ///< Assign 0A3 to PC-98/Local bus add-on card
-} DMI_T16_LOCATION;
-
-/// DMI Type 16 offset 05h - Memory Error Correction
-typedef enum {
-  OtherUse = 0x01,                                      ///< Assign 01 to Other
-  UnknownUse,                                           ///< Assign 02 to Unknown
-  SystemMemory,                                         ///< Assign 03 to system memory
-  VideoMemory,                                          ///< Assign 04 to video memory
-  FlashMemory,                                          ///< Assign 05 to flash memory
-  NonvolatileRam,                                       ///< Assign 06 to non-volatile RAM
-  CacheMemory                                           ///< Assign 07 to cache memory
-} DMI_T16_USE;
-
-/// DMI Type 16 offset 07h - Maximum Capacity
-typedef enum {
-  Dmi16OtherErrCorrection = 0x01,                       ///< Assign 01 to Other
-  Dmi16UnknownErrCorrection,                            ///< Assign 02 to Unknown
-  Dmi16NoneErrCorrection,                               ///< Assign 03 to None
-  Dmi16Parity,                                          ///< Assign 04 to parity
-  Dmi16SingleBitEcc,                                    ///< Assign 05 to Single-bit ECC
-  Dmi16MultiBitEcc,                                     ///< Assign 06 to Multi-bit ECC
-  Dmi16Crc                                              ///< Assign 07 to CRC
-} DMI_T16_ERROR_CORRECTION;
-
-/// DMI Type 16 - Physical Memory Array
-typedef struct {
-  OUT DMI_T16_LOCATION          Location;               ///< The physical location of the Memory Array,
-                                                        ///< whether on the system board or an add-in board.
-  OUT DMI_T16_USE               Use;                    ///< Identifies the function for which the array
-                                                        ///< is used.
-  OUT DMI_T16_ERROR_CORRECTION  MemoryErrorCorrection;  ///< The primary hardware error correction or
-                                                        ///< detection method supported by this memory array.
-  OUT UINT16                    NumberOfMemoryDevices;  ///< The number of slots or sockets available
-                                                        ///< for memory devices in this array.
-} TYPE16_DMI_INFO;
-
-/// DMI Type 17 offset 0Eh - Form Factor
-typedef enum {
-  OtherFormFactor = 0x01,                               ///< Assign 01 to Other
-  UnknowFormFactor,                                     ///< Assign 02 to Unknown
-  SimmFormFactor,                                       ///< Assign 03 to SIMM
-  SipFormFactor,                                        ///< Assign 04 to SIP
-  ChipFormFactor,                                       ///< Assign 05 to Chip
-  DipFormFactor,                                        ///< Assign 06 to DIP
-  ZipFormFactor,                                        ///< Assign 07 to ZIP
-  ProprietaryCardFormFactor,                            ///< Assign 08 to Proprietary Card
-  DimmFormFactorFormFactor,                             ///< Assign 09 to DIMM
-  TsopFormFactor,                                       ///< Assign 10 to TSOP
-  RowOfChipsFormFactor,                                 ///< Assign 11 to Row of chips
-  RimmFormFactor,                                       ///< Assign 12 to RIMM
-  SodimmFormFactor,                                     ///< Assign 13 to SODIMM
-  SrimmFormFactor,                                      ///< Assign 14 to SRIMM
-  FbDimmFormFactor                                      ///< Assign 15 to FB-DIMM
-} DMI_T17_FORM_FACTOR;
-
-/// DMI Type 17 offset 12h - Memory Type
-typedef enum {
-  OtherMemType = 0x01,                                  ///< Assign 01 to Other
-  UnknownMemType,                                       ///< Assign 02 to Unknown
-  DramMemType,                                          ///< Assign 03 to DRAM
-  EdramMemType,                                         ///< Assign 04 to EDRAM
-  VramMemType,                                          ///< Assign 05 to VRAM
-  SramMemType,                                          ///< Assign 06 to SRAM
-  RamMemType,                                           ///< Assign 07 to RAM
-  RomMemType,                                           ///< Assign 08 to ROM
-  FlashMemType,                                         ///< Assign 09 to Flash
-  EepromMemType,                                        ///< Assign 10 to EEPROM
-  FepromMemType,                                        ///< Assign 11 to FEPROM
-  EpromMemType,                                         ///< Assign 12 to EPROM
-  CdramMemType,                                         ///< Assign 13 to CDRAM
-  ThreeDramMemType,                                     ///< Assign 14 to 3DRAM
-  SdramMemType,                                         ///< Assign 15 to SDRAM
-  SgramMemType,                                         ///< Assign 16 to SGRAM
-  RdramMemType,                                         ///< Assign 17 to RDRAM
-  DdrMemType,                                           ///< Assign 18 to DDR
-  Ddr2MemType,                                          ///< Assign 19 to DDR2
-  Ddr2FbdimmMemType,                                    ///< Assign 20 to DDR2 FB-DIMM
-  Ddr3MemType = 0x18,                                   ///< Assign 24 to DDR3
-  Fbd2MemType                                           ///< Assign 25 to FBD2
-} DMI_T17_MEMORY_TYPE;
-
-/// DMI Type 17 offset 13h - Type Detail
-typedef struct {
-  OUT UINT16                    Reserved1:1;            ///< Reserved
-  OUT UINT16                    Other:1;                ///< Other
-  OUT UINT16                    Unknown:1;              ///< Unknown
-  OUT UINT16                    FastPaged:1;            ///< Fast-Paged
-  OUT UINT16                    StaticColumn:1;         ///< Static column
-  OUT UINT16                    PseudoStatic:1;         ///< Pseudo-static
-  OUT UINT16                    Rambus:1;               ///< RAMBUS
-  OUT UINT16                    Synchronous:1;          ///< Synchronous
-  OUT UINT16                    Cmos:1;                 ///< CMOS
-  OUT UINT16                    Edo:1;                  ///< EDO
-  OUT UINT16                    WindowDram:1;           ///< Window DRAM
-  OUT UINT16                    CacheDram:1;            ///< Cache Dram
-  OUT UINT16                    NonVolatile:1;          ///< Non-volatile
-  OUT UINT16                    Registered:1;           ///< Registered (Buffered)
-  OUT UINT16                    Unbuffered:1;           ///< Unbuffered (Unregistered)
-  OUT UINT16                    Reserved2:1;            ///< Reserved
-} DMI_T17_TYPE_DETAIL;
-
-/// DMI Type 17 - Memory Device
-typedef struct {
-  OUT UINT16                    Handle;                 ///< The temporary handle, or instance number, associated with the structure
-  OUT UINT16                    TotalWidth;             ///< Total Width, in bits, of this memory device, including any check or error-correction bits.
-  OUT UINT16                    DataWidth;              ///< Data Width, in bits, of this memory device.
-  OUT UINT16                    MemorySize;             ///< The size of the memory device.
-  OUT DMI_T17_FORM_FACTOR       FormFactor;             ///< The implementation form factor for this memory device.
-  OUT UINT8                     DeviceSet;              ///< Identifies when the Memory Device is one of a set of
-                                                        ///< Memory Devices that must be populated with all devices of
-                                                        ///< the same type and size, and the set to which this device belongs.
-  OUT CHAR8                     DeviceLocator[8];       ///< The string number of the string that identifies the physically labeled socket or board position where the memory device is located.
-  OUT CHAR8                     BankLocator[10];        ///< The string number of the string that identifies the physically labeled bank where the memory device is located.
-  OUT DMI_T17_MEMORY_TYPE       MemoryType;             ///< The type of memory used in this device.
-  OUT DMI_T17_TYPE_DETAIL       TypeDetail;             ///< Additional detail on the memory device type
-  OUT UINT16                    Speed;                  ///< Identifies the speed of the device, in megahertz (MHz).
-  OUT UINT64                    ManufacturerIdCode;     ///< Manufacturer ID code.
-  OUT CHAR8                     SerialNumber[9];        ///< Serial Number.
-  OUT CHAR8                     PartNumber[19];         ///< Part Number.
-  OUT UINT8                     Attributes;             ///< Bits 7-4: Reserved, Bits 3-0: rank.
-  OUT UINT32                    ExtSize;                ///< Extended Size.
-  OUT UINT16                    ConfigSpeed;            ///< Configured memory clock speed
-} TYPE17_DMI_INFO;
-
-/// Memory DMI Type 17 - for memory use
-typedef struct {
-  OUT UINT8                     Socket:3;               ///< Socket ID
-  OUT UINT8                     Channel:2;              ///< Channel ID
-  OUT UINT8                     Dimm:2;                 ///< DIMM ID
-  OUT UINT8                     DimmPresent:1;          ///< Dimm Present
-  OUT UINT16                    Handle;                 ///< The temporary handle, or instance number, associated with the structure
-  OUT UINT16                    TotalWidth;             ///< Total Width, in bits, of this memory device, including any check or error-correction bits.
-  OUT UINT16                    DataWidth;              ///< Data Width, in bits, of this memory device.
-  OUT UINT16                    MemorySize;             ///< The size of the memory device.
-  OUT DMI_T17_FORM_FACTOR       FormFactor;             ///< The implementation form factor for this memory device.
-  OUT UINT8                     DeviceLocator;          ///< The string number of the string that identifies the physically labeled socket or board position where the memory device is located.
-  OUT UINT8                     BankLocator;            ///< The string number of the string that identifies the physically labeled bank where the memory device is located.
-  OUT UINT16                    Speed;                  ///< Identifies the speed of the device, in megahertz (MHz).
-  OUT UINT64                    ManufacturerIdCode;     ///< Manufacturer ID code.
-  OUT UINT8                     SerialNumber[4];        ///< Serial Number.
-  OUT UINT8                     PartNumber[18];         ///< Part Number.
-  OUT UINT8                     Attributes;             ///< Bits 7-4: Reserved, Bits 3-0: rank.
-  OUT UINT32                    ExtSize;                ///< Extended Size.
-  OUT UINT16                    ConfigSpeed;            ///< Configured memory clock speed
-} MEM_DMI_PHYSICAL_DIMM_INFO;
-
-/// Memory DMI Type 20 - for memory use
-typedef struct {
-  OUT UINT8                     Socket:3;               ///< Socket ID
-  OUT UINT8                     Channel:2;              ///< Channel ID
-  OUT UINT8                     Dimm:2;                 ///< DIMM ID
-  OUT UINT8                     DimmPresent:1;          ///< Dimm Present
-  OUT UINT32                    StartingAddr;           ///< The physical address, in kilobytes, of a range
-                                                        ///< of memory mapped to the referenced Memory Device.
-  OUT UINT32                    EndingAddr;             ///< The handle, or instance number, associated with
-                                                        ///< the Memory Device structure to which this address
-                                                        ///< range is mapped.
-  OUT UINT16                    MemoryDeviceHandle;     ///< The handle, or instance number, associated with
-                                                        ///< the Memory Device structure to which this address
-                                                        ///< range is mapped.
-  OUT UINT64                    ExtStartingAddr;        ///< The physical address, in bytes, of a range of
-                                                        ///< memory mapped to the referenced Memory Device.
-  OUT UINT64                    ExtEndingAddr;          ///< The physical ending address, in bytes, of the last of
-                                                        ///< a range of addresses mapped to the referenced Memory Device.
-} MEM_DMI_LOGICAL_DIMM_INFO;
-
-/// DMI Type 19 - Memory Array Mapped Address
-typedef struct {
-  OUT UINT32                    StartingAddr;           ///< The physical address, in kilobytes,
-                                                        ///< of a range of memory mapped to the
-                                                        ///< specified physical memory array.
-  OUT UINT32                    EndingAddr;             ///< The physical ending address of the
-                                                        ///< last kilobyte of a range of addresses
-                                                        ///< mapped to the specified physical memory array.
-  OUT UINT16                    MemoryArrayHandle;      ///< The handle, or instance number, associated
-                                                        ///< with the physical memory array to which this
-                                                        ///< address range is mapped.
-  OUT UINT8                     PartitionWidth;         ///< Identifies the number of memory devices that
-                                                        ///< form a single row of memory for the address
-                                                        ///< partition defined by this structure.
-  OUT UINT64                    ExtStartingAddr;        ///< The physical address, in bytes, of a range of
-                                                        ///< memory mapped to the specified Physical Memory Array.
-  OUT UINT64                    ExtEndingAddr;          ///< The physical address, in bytes, of a range of
-                                                        ///< memory mapped to the specified Physical Memory Array.
-} TYPE19_DMI_INFO;
-
-///DMI Type 20 - Memory Device Mapped Address
-typedef struct {
-  OUT UINT32                    StartingAddr;           ///< The physical address, in kilobytes, of a range
-                                                        ///< of memory mapped to the referenced Memory Device.
-  OUT UINT32                    EndingAddr;             ///< The handle, or instance number, associated with
-                                                        ///< the Memory Device structure to which this address
-                                                        ///< range is mapped.
-  OUT UINT16                    MemoryDeviceHandle;     ///< The handle, or instance number, associated with
-                                                        ///< the Memory Device structure to which this address
-                                                        ///< range is mapped.
-  OUT UINT16                    MemoryArrayMappedAddressHandle; ///< The handle, or instance number, associated
-                                                        ///< with the Memory Array Mapped Address structure to
-                                                        ///< which this device address range is mapped.
-  OUT UINT8                     PartitionRowPosition;   ///< Identifies the position of the referenced Memory
-                                                        ///< Device in a row of the address partition.
-  OUT UINT8                     InterleavePosition;     ///< The position of the referenced Memory Device in
-                                                        ///< an interleave.
-  OUT UINT8                     InterleavedDataDepth;   ///< The maximum number of consecutive rows from the
-                                                        ///< referenced Memory Device that are accessed in a
-                                                        ///< single interleaved transfer.
-  OUT UINT64                    ExtStartingAddr;        ///< The physical address, in bytes, of a range of
-                                                        ///< memory mapped to the referenced Memory Device.
-  OUT UINT64                    ExtEndingAddr;          ///< The physical ending address, in bytes, of the last of
-                                                        ///< a range of addresses mapped to the referenced Memory Device.
-} TYPE20_DMI_INFO;
-
-/// Collection of pointers to the DMI records
-typedef struct {
-  OUT TYPE4_DMI_INFO            T4[MAX_SOCKETS_SUPPORTED];    ///< Type 4 struc
-  OUT TYPE7_DMI_INFO            T7L1[MAX_SOCKETS_SUPPORTED];  ///< Type 7 struc 1
-  OUT TYPE7_DMI_INFO            T7L2[MAX_SOCKETS_SUPPORTED];  ///< Type 7 struc 2
-  OUT TYPE7_DMI_INFO            T7L3[MAX_SOCKETS_SUPPORTED];  ///< Type 7 struc 3
-  OUT TYPE16_DMI_INFO           T16;                          ///< Type 16 struc
-  OUT TYPE17_DMI_INFO           T17[MAX_SOCKETS_SUPPORTED][MAX_CHANNELS_PER_SOCKET][MAX_DIMMS_PER_CHANNEL]; ///< Type 17 struc
-  OUT TYPE19_DMI_INFO           T19;                          ///< Type 19 struc
-  OUT TYPE20_DMI_INFO           T20[MAX_SOCKETS_SUPPORTED][MAX_CHANNELS_PER_SOCKET][MAX_DIMMS_PER_CHANNEL]; ///< Type 20 struc
-} DMI_INFO;
-
-/**********************************************************************
- * Interface call:  AllocateExecutionCache
- **********************************************************************/
-#define MAX_CACHE_REGIONS    3
-
-/// AllocateExecutionCache sub param structure for cached memory region
-typedef struct {
-  IN OUT   UINT32               ExeCacheStartAddr;      ///< Start address
-  IN OUT   UINT32               ExeCacheSize;           ///< Size
-} EXECUTION_CACHE_REGION;
-
-/**********************************************************************
- * Interface call:  AmdGetAvailableExeCacheSize
- **********************************************************************/
-/// Get available Cache remain
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS    StdHeader;              ///< Standard configuration header
-     OUT   UINT32               AvailableExeCacheSize;  ///< Remain size
-} AMD_GET_EXE_SIZE_PARAMS;
-
-AGESA_STATUS
-AmdGetAvailableExeCacheSize (
-  IN OUT   AMD_GET_EXE_SIZE_PARAMS *AmdGetExeSizeParams
-  );
-
-/// Selection type for core leveling
-typedef enum {
-  CORE_LEVEL_LOWEST,            ///< Level to lowest common denominator
-  CORE_LEVEL_TWO,               ///< Level to 2 cores
-  CORE_LEVEL_POWER_OF_TWO,      ///< Level to 1,2,4 or 8
-  CORE_LEVEL_NONE,              ///< Do no leveling
-  CORE_LEVEL_COMPUTE_UNIT,      ///< Level cores to one core per compute unit
-  CORE_LEVEL_COMPUTE_UNIT_TWO,  ///< Level cores to two cores per compute unit
-  CORE_LEVEL_COMPUTE_UNIT_THREE,  ///< Level cores to three cores per compute unit
-  CORE_LEVEL_ONE,               ///< Level to 1 core
-  CORE_LEVEL_THREE,             ///< Level to 3 cores
-  CORE_LEVEL_FOUR,              ///< Level to 4 cores
-  CORE_LEVEL_FIVE,              ///< Level to 5 cores
-  CORE_LEVEL_SIX,               ///< Level to 6 cores
-  CORE_LEVEL_SEVEN,             ///< Level to 7 cores
-  CORE_LEVEL_EIGHT,             ///< Level to 8 cores
-  CORE_LEVEL_NINE,              ///< Level to 9 cores
-  CORE_LEVEL_TEN,               ///< Level to 10 cores
-  CORE_LEVEL_ELEVEN,            ///< Level to 11 cores
-  CORE_LEVEL_TWELVE,            ///< Level to 12 cores
-  CORE_LEVEL_THIRTEEN,          ///< Level to 13 cores
-  CORE_LEVEL_FOURTEEN,          ///< Level to 14 cores
-  CORE_LEVEL_FIFTEEN,           ///< Level to 15 cores
-  CoreLevelModeMax              ///< Used for bounds checking
-} CORE_LEVELING_TYPE;
-
-
-
-
-
-/************************************************************************
- *
- *  AGESA Basic Level interface structure definition and function prototypes
- *
- ***********************************************************************/
-
-/**********************************************************************
- * Interface call:  AmdCreateStruct
- **********************************************************************/
-AGESA_STATUS
-AmdCreateStruct (
-  IN OUT   AMD_INTERFACE_PARAMS *InterfaceParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdReleaseStruct
- **********************************************************************/
-AGESA_STATUS
-AmdReleaseStruct (
-  IN OUT   AMD_INTERFACE_PARAMS *InterfaceParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdInitReset
- **********************************************************************/
-/// AmdInitReset param structure
-typedef struct {
-  IN       AMD_CONFIG_PARAMS         StdHeader;        ///< Standard configuration header
-  IN       EXECUTION_CACHE_REGION    CacheRegion[3];   ///< The cached memory region
-  IN       FCH_RESET_INTERFACE       FchInterface;     ///< Interface for FCH configuration
-} AMD_RESET_PARAMS;
-
-AGESA_STATUS
-AmdInitReset (
-  IN OUT   AMD_RESET_PARAMS     *ResetParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitEarly
- **********************************************************************/
-/// InitEarly param structure
-///
-/// Provide defaults or customizations to each service performed in AmdInitEarly.
-///
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;        ///< Standard configuration header
-  IN       EXECUTION_CACHE_REGION CacheRegion[3];   ///< Execution Map Interface
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-  IN       GNB_CONFIGURATION      GnbConfig;        ///< GNB configuration
-} AMD_EARLY_PARAMS;
-
-AGESA_STATUS
-AmdInitEarly (
-  IN OUT   AMD_EARLY_PARAMS     *EarlyParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitPost
- **********************************************************************/
-/// AmdInitPost param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;        ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-  IN       MEM_PARAMETER_STRUCT   MemConfig;        ///< Memory post param
-  IN       GNB_POST_CONFIGURATION GnbPostConfig;    ///< GNB post param
-} AMD_POST_PARAMS;
-
-AGESA_STATUS
-AmdInitPost (
-  IN OUT   AMD_POST_PARAMS      *PostParams         ///< Amd Cpu init param
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitEnv
- **********************************************************************/
-/// AmdInitEnv param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;            ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;       ///< platform operational characteristics.
-  IN       GNB_ENV_CONFIGURATION  GnbEnvConfiguration;  ///< GNB configuration
-  IN       FCH_INTERFACE          FchInterface;         ///< FCH configuration
-} AMD_ENV_PARAMS;
-
-AGESA_STATUS
-AmdInitEnv (
-  IN OUT   AMD_ENV_PARAMS       *EnvParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitMid
- **********************************************************************/
-/// AmdInitMid param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;        ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-  IN       GNB_MID_CONFIGURATION  GnbMidConfiguration;  ///< GNB configuration
-  IN       FCH_INTERFACE          FchInterface;     ///< FCH configuration
-} AMD_MID_PARAMS;
-
-AGESA_STATUS
-AmdInitMid (
-  IN OUT   AMD_MID_PARAMS       *MidParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitLate
- **********************************************************************/
-/// AmdInitLate param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;              ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;         ///< platform operational characteristics.
-  IN       IOMMU_EXCLUSION_RANGE_DESCRIPTOR  *IvrsExclusionRangeList;   ///< Pointer to array of exclusion ranges
-     OUT   DMI_INFO               *DmiTable;              ///< DMI Interface
-     OUT   VOID                   *AcpiPState;            ///< Acpi Pstate SSDT Table
-     OUT   VOID                   *AcpiSrat;              ///< SRAT Table
-     OUT   VOID                   *AcpiSlit;              ///< SLIT Table
-     OUT   VOID                   *AcpiWheaMce;           ///< WHEA MCE Table
-     OUT   VOID                   *AcpiWheaCmc;           ///< WHEA CMC Table
-     OUT   VOID                   *AcpiAlib;              ///< ACPI SSDT table with ALIB implementation
-     OUT   VOID                   *AcpiIvrs;              ///< IOMMU ACPI IVRS(I/O Virtualization Reporting Structure) table
-     OUT   VOID                   *AcpiCrat;              ///< Component Resource Affinity Table table
-     OUT   VOID                   *AcpiCdit;              ///< Component Locality Distance Information table
-  IN       GNB_LATE_CONFIGURATION GnbLateConfiguration;   ///< GNB configuration
-} AMD_LATE_PARAMS;
-
-AGESA_STATUS
-AmdInitLate (
-  IN OUT   AMD_LATE_PARAMS      *LateParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdInitRecovery
- **********************************************************************/
-/// CPU Recovery Parameters
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS StdHeader;             ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-} AMD_CPU_RECOVERY_PARAMS;
-
-/// AmdInitRecovery param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS        StdHeader;            ///< Standard configuration header
-  IN       MEM_PARAMETER_STRUCT     MemConfig;            ///< Memory post param
-  IN       EXECUTION_CACHE_REGION   CacheRegion[3];       ///< The cached memory region. And the max cache region is 3
-  IN       AMD_CPU_RECOVERY_PARAMS  CpuRecoveryParams;    ///< Params for CPU related recovery init.
-} AMD_RECOVERY_PARAMS;
-
-AGESA_STATUS
-AmdInitRecovery (
-  IN OUT   AMD_RECOVERY_PARAMS    *RecoveryParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdInitResume
- **********************************************************************/
-/// AmdInitResume param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;      ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig; ///< Platform operational characteristics
-  IN       AMD_S3_PARAMS          S3DataBlock;    ///< Save state data
-} AMD_RESUME_PARAMS;
-
-AGESA_STATUS
-AmdInitResume (
-  IN       AMD_RESUME_PARAMS    *ResumeParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdS3LateRestore
- **********************************************************************/
-/// AmdS3LateRestore param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS    StdHeader;          ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-  IN       AMD_S3_PARAMS          S3DataBlock;      ///< Save state data
-} AMD_S3LATE_PARAMS;
-
-AGESA_STATUS
-AmdS3LateRestore (
-  IN OUT   AMD_S3LATE_PARAMS    *S3LateParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdS3FinalRestore
- **********************************************************************/
-/// AmdS3FinalRestore param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS    StdHeader;          ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-  IN       AMD_S3_PARAMS          S3DataBlock;      ///< Save state data
-} AMD_S3FINAL_PARAMS;
-
-AGESA_STATUS
-AmdS3FinalRestore (
-  IN OUT   AMD_S3FINAL_PARAMS    *S3FinalParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdS3Save
- **********************************************************************/
-/// AmdS3Save param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS    StdHeader;          ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-     OUT   AMD_S3_PARAMS          S3DataBlock;      ///< Standard header
-  IN       FCH_INTERFACE          FchInterface;     ///< FCH configuration
-} AMD_S3SAVE_PARAMS;
-
-AGESA_STATUS
-AmdS3Save (
-  IN OUT   AMD_S3SAVE_PARAMS    *AmdS3SaveParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdLateRunApTask
- **********************************************************************/
-/**
- * Entry point for AP tasking.
- */
-AGESA_STATUS
-AmdLateRunApTask (
-  IN       AP_EXE_PARAMS  *AmdApExeParams
-);
-
-//
-// General Services API
-//
-
-/**********************************************************************
- * Interface service call:  AmdGetApicId
- **********************************************************************/
-/// Request the APIC ID of a particular core.
-
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;        ///< Standard configuration header
-  IN       UINT8             Socket;           ///< The Core's Socket.
-  IN       UINT8             Core;             ///< The Core id.
-     OUT   BOOLEAN           IsPresent;        ///< The Core is present, and  ApicAddress is valid.
-     OUT   UINT8             ApicAddress;      ///< The Core's APIC ID.
-} AMD_APIC_PARAMS;
-
-/**
- * Get a specified Core's APIC ID.
- */
-AGESA_STATUS
-AmdGetApicId (
-  IN OUT AMD_APIC_PARAMS *AmdParamApic
-);
-
-/**********************************************************************
- * Interface service call:  AmdGetPciAddress
- **********************************************************************/
-/// Request the PCI Address of a Processor Module (that is, its Northbridge)
-
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;        ///< Standard configuration header
-  IN       UINT8             Socket;           ///< The Processor's socket
-  IN       UINT8             Module;           ///< The Module in that Processor
-     OUT   BOOLEAN           IsPresent;        ///< The Core is present, and  PciAddress is valid.
-     OUT   PCI_ADDR          PciAddress;       ///< The Processor's PCI Config Space address (Function 0, Register 0)
-} AMD_GET_PCI_PARAMS;
-
-/**
- * Get Processor Module's PCI Config Space address.
- */
-AGESA_STATUS
-AmdGetPciAddress (
-  IN OUT   AMD_GET_PCI_PARAMS *AmdParamGetPci
-);
-
-/**********************************************************************
- * Interface service call:  AmdIdentifyCore
- **********************************************************************/
-/// Request the identity (Socket, Module, Core) of the current Processor Core
-
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;         ///< Standard configuration header
-     OUT   UINT8             Socket;            ///< The current Core's Socket
-     OUT   UINT8             Module;            ///< The current Core's Processor Module
-     OUT   UINT8             Core;              ///< The current Core's core id.
-} AMD_IDENTIFY_PARAMS;
-
-/**
- * "Who am I" for the current running core.
- */
-AGESA_STATUS
-AmdIdentifyCore (
-  IN OUT  AMD_IDENTIFY_PARAMS *AmdParamIdentify
-);
-
-/**********************************************************************
- * Interface service call:  AmdReadEventLog
- **********************************************************************/
-/// An Event Log Entry.
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;         ///< Standard configuration header
-     OUT   UINT32            EventClass;        ///< The severity of this event, matches AGESA_STATUS.
-     OUT   UINT32            EventInfo;         ///< The unique event identifier, zero means "no event".
-     OUT   UINT32            DataParam1;        ///< Data specific to the Event.
-     OUT   UINT32            DataParam2;        ///< Data specific to the Event.
-     OUT   UINT32            DataParam3;        ///< Data specific to the Event.
-     OUT   UINT32            DataParam4;        ///< Data specific to the Event.
-} EVENT_PARAMS;
-
-/**
- * Read an Event from the Event Log.
- */
-AGESA_STATUS
-AmdReadEventLog (
-  IN       EVENT_PARAMS *Event
-);
-
-/**********************************************************************
- * Interface service call:  AmdIdentifyDimm
- **********************************************************************/
-/// Request the identity of dimm from system address
-
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS StdHeader;            ///< Standard configuration header
-  IN       UINT64            MemoryAddress;        ///< System Address that needs to be translated to dimm identification.
-  OUT      UINT8             SocketId;             ///< The socket on which the targeted address locates.
-  OUT      UINT8             MemChannelId;         ///< The channel on which the targeted address locates.
-  OUT      UINT8             DimmId;               ///< The dimm on which the targeted address locates.
-  OUT      UINT8             ChipSelect;           ///< The chip select on which the targeted address locates.
-  OUT      UINT8             Bank;                 ///< The Bank for which the error address resides
-  OUT      UINT32            Row;                  ///< The Row for which the error address resides
-  OUT      UINT16            Column;               ///< The Column for which the error address resides
-} AMD_IDENTIFY_DIMM;
-
-/**
- * Get the dimm identification for the address.
- */
-AGESA_STATUS
-AmdIdentifyDimm (
-  IN OUT   AMD_IDENTIFY_DIMM *AmdDimmIdentify
-);
-
-AGESA_STATUS
-AmdIdsRunApTaskLate (
-  IN       AP_EXE_PARAMS  *AmdApExeParams
-  );
-
-/// Request the 2D Data Eye Training Data
-#define RD_DATAEYE  0
-#define WR_DATAEYE  1
-
-/**********************************************************************
- * Interface service call:  AmdGet2DDataEye
- **********************************************************************/
-/// Request the training data eye on Socket, Channel, Dimm.
-
-typedef struct _AMD_GET_DATAEYE {
-  IN OUT AMD_CONFIG_PARAMS StdHeader;            ///< Standard configuration header
-  IN OUT AMD_POST_PARAMS *PostParamsPtr;         ///< Pointer to AMD_POST_PARAMS
-  IN  UINT8 SocketId;                            ///< The socket number to get the 2D data eye
-  IN  UINT8 MemChannelId;                        ///< The channel number to get the 2D data eye
-  IN  UINT8 DimmId;                              ///< The dimm number to get the 2D data eye
-  IN  UINT8 DataEyeType;                         ///< Get the 2D data eye on read or write training
-  OUT UINT8* DataEyeBuffer;                      ///< The buffer to stores the 2D data eye
-} AMD_GET_DATAEYE;
-
-AGESA_STATUS
-AmdGet2DDataEye (
-  IN OUT   AMD_GET_DATAEYE *AmdGetDataEye
-  );
-
-#define AGESA_IDS_DFT_VAL   0xFFFF                  ///<  Default value of every uninitlized NV item, the action for it will be ignored
-#define AGESA_IDS_NV_END    0xFFFF                  ///< Flag specify end of option structure
-/// WARNING: Don't change the comment below, it used as signature for script
-/// AGESA IDS NV ID Definitions
-typedef enum {
-  AGESA_IDS_EXT_ID_START                   = 0x0000,///< 0x0000                                                             specify the start of external NV id
-
-  AGESA_IDS_NV_UCODE,                               ///< 0x0001                                                            Enable or disable microcode patching
-
-  AGESA_IDS_NV_TARGET_PSTATE,                       ///< 0x0002                                                        Set the P-state required to be activated
-  AGESA_IDS_NV_POSTPSTATE,                          ///< 0x0003                                           Set the P-state required to be activated through POST
-
-  AGESA_IDS_NV_BANK_INTERLEAVE,                     ///< 0x0004                                                               Enable or disable Bank Interleave
-  AGESA_IDS_NV_CHANNEL_INTERLEAVE,                  ///< 0x0005                                                            Enable or disable Channel Interleave
-  AGESA_IDS_NV_NODE_INTERLEAVE,                     ///< 0x0006                                                               Enable or disable Node Interleave
-  AGESA_IDS_NV_MEMHOLE,                             ///< 0x0007                                                                  Enables or disable memory hole
-
-  AGESA_IDS_NV_SCRUB_REDIRECTION,                   ///< 0x0008                                           Enable or disable a write to dram with corrected data
-  AGESA_IDS_NV_DRAM_SCRUB,                          ///< 0x0009                                                   Set the rate of background scrubbing for DRAM
-  AGESA_IDS_NV_DCACHE_SCRUB,                        ///< 0x000A                                            Set the rate of background scrubbing for the DCache.
-  AGESA_IDS_NV_L2_SCRUB,                            ///< 0x000B                                           Set the rate of background scrubbing for the L2 cache
-  AGESA_IDS_NV_L3_SCRUB,                            ///< 0x000C                                           Set the rate of background scrubbing for the L3 cache
-  AGESA_IDS_NV_ICACHE_SCRUB,                        ///< 0x000D                                             Set the rate of background scrubbing for the Icache
-  AGESA_IDS_NV_SYNC_ON_ECC_ERROR,                   ///< 0x000E                                    Enable or disable the sync flood on un-correctable ECC error
-  AGESA_IDS_NV_ECC_SYMBOL_SIZE,                     ///< 0x000F                                                                             Set ECC symbol size
-
-  AGESA_IDS_NV_ALL_MEMCLKS,                         ///< 0x0010                                                      Enable or disable all memory clocks enable
-  AGESA_IDS_NV_DCT_GANGING_MODE,                    ///< 0x0011                                                                             Set the Ganged mode
-  AGESA_IDS_NV_DRAM_BURST_LENGTH32,                 ///< 0x0012                                                                    Set the DRAM Burst Length 32
-  AGESA_IDS_NV_MEMORY_POWER_DOWN,                   ///< 0x0013                                                        Enable or disable Memory power down mode
-  AGESA_IDS_NV_MEMORY_POWER_DOWN_MODE,              ///< 0x0014                                                                  Set the Memory power down mode
-  AGESA_IDS_NV_DLL_SHUT_DOWN,                       ///< 0x0015                                                                   Enable or disable DLLShutdown
-  AGESA_IDS_NV_ONLINE_SPARE,                        ///< 0x0016      Enable or disable the Dram controller to designate a DIMM bank as a spare for logical swap
-
-  AGESA_IDS_NV_HDTOUT,                              ///< 0x0017                                                                Enable or disable HDTOUT feature
-
-  AGESA_IDS_NV_GNBHDAUDIOEN,                        ///< 0x0018                                                                  Enable or disable GNB HD Audio
-
-  AGESA_IDS_NV_CPB_EN,                              ///< 0x0019                                                                          Core Performance Boost
-
-  AGESA_IDS_NV_HTC_EN,                              ///< 0x001A                                                                                      HTC Enable
-  AGESA_IDS_NV_HTC_OVERRIDE,                        ///< 0x001B                                                                                    HTC Override
-  AGESA_IDS_NV_HTC_PSTATE_LIMIT,                    ///< 0x001C                                                                        HTC P-state limit select
-  AGESA_IDS_NV_HTC_TEMP_HYS,                        ///< 0x001D                                                                      HTC Temperature Hysteresis
-  AGESA_IDS_NV_HTC_ACT_TEMP,                        ///< 0x001E                                                                             HTC Activation Temp
-
-  AGESA_IDS_NV_POWER_POLICY,                        ///< 0x001F                                                                    Select Platform Power Policy
-  AGESA_IDS_NV_DRAMCON,                             ///< 0x0020                                                  Specify the mode for controller initialization
-  AGESA_IDS_EXT_ID_END,                             ///< 0x0021                                                               specify the end of external NV ID
-} IDS_EX_NV_ID;
-
-
-#define IDS_NUM_EXT_NV_ITEM (AGESA_IDS_EXT_ID_END - AGESA_IDS_EXT_ID_START + 1)
-
-
-#endif // _AGESA_H_

pi/amd/00630F01/AMD.h

diff --git a/pi/amd/00630F01/AMD.h b/pi/amd/00630F01/AMD.h
deleted file mode 100644
index 68f7c32..0000000
--- a/pi/amd/00630F01/AMD.h
+++ /dev/null
@@ -1,475 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Agesa structures and definitions
- *
- * Contains AMD AGESA core interface
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Include
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-
-#ifndef _AMD_H_
-#define _AMD_H_
-
-#define Int16FromChar(a,b) (UINT16)((a) << 0 | (b) << 8)
-#define Int32FromChar(a,b,c,d) (UINT32)((a) << 0 | (b) << 8 | (c) << 16 | (d) << 24)
-#define Int64FromChar(a,b,c,d,e,f,g,h) ((UINT64)(Int32FromChar(a,b,c,d)<<32) | (UINT64)Int32FromChar(e,f,g,h))
-
-#define AGESA_REVISION  "Arch2008"
-#define AGESA_ID        {'A', 'G', 'E', 'S', 'A', 0x00, 0x00, 0x00}
-
-//
-//
-// AGESA Types and Definitions
-//
-//
-#define LAST_ENTRY          0xFFFFFFFFul
-#define IMAGE_SIGNATURE     Int32FromChar ('$', 'A', 'M', 'D')
-#define MODULE_SIGNATURE    Int32FromChar ('$', 'M', 'O', 'D')
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-/// The return status for all AGESA public services.
-///
-/// Services return the most severe status of any logged event.  Status other than SUCCESS, UNSUPPORTED, and BOUNDS_CHK
-/// will have log entries with more detail.
-///
-typedef enum {
-  AGESA_SUCCESS = 0,             ///< The service completed normally. Info may be logged.
-  AGESA_UNSUPPORTED,             ///< The dispatcher or create struct had an unimplemented function requested.
-                                 ///<  Not logged.
-  AGESA_BOUNDS_CHK,              ///< A dynamic parameter was out of range and the service was not provided.
-                                 ///< Example, memory address not installed, heap buffer handle not found.
-                                 ///< Not Logged.
-  // AGESA_STATUS of greater severity (the ones below this line), always have a log entry available.
-  AGESA_ALERT,                   ///< An observed condition, but no loss of function.  See Log.
-  AGESA_WARNING,                 ///< Possible or minor loss of function.  See Log.
-  AGESA_ERROR,                   ///< Significant loss of function, boot may be possible.  See Log.
-  AGESA_CRITICAL,                ///< Continue boot only to notify user.  See Log.
-  AGESA_FATAL,                   ///< Halt booting.  See Log, however Fatal errors pertaining to heap problems
-                                 ///< may not be able to reliably produce log events.
-  AgesaStatusMax                 ///< Not a status, for limit checking.
-} AGESA_STATUS;
-
-/// For checking whether a status is at or above the mandatory log level.
-#define AGESA_STATUS_LOG_LEVEL AGESA_ALERT
-
-/**
- * Callout method to the host environment.
- *
- * Callout using a dispatch with appropriate thunk layer, which is determined by the host environment.
- *
- * @param[in]        Function      The specific callout function being invoked.
- * @param[in]        FcnData       Function specific data item.
- * @param[in,out]    ConfigPtr     Reference to Callout params.
- */
-typedef AGESA_STATUS (*CALLOUT_ENTRY) (
-  IN       UINT32  Function,
-  IN       UINTN   FcnData,
-  IN OUT   VOID    *ConfigPtr
-  );
-
-typedef AGESA_STATUS (*IMAGE_ENTRY) (VOID *ConfigPtr);
-typedef AGESA_STATUS (*MODULE_ENTRY) (VOID *ConfigPtr);
-
-///This allocation type is used by the AmdCreateStruct entry point
-typedef enum {
-  PreMemHeap = 0,                                           ///< Create heap in cache.
-  PostMemDram,                                              ///< Create heap in memory.
-  ByHost                                                    ///< Create heap by Host.
-} ALLOCATION_METHOD;
-
-/// These width descriptors are used by the library function, and others, to specify the data size
-typedef enum ACCESS_WIDTH {
-  AccessWidth8 = 1,                                         ///< Access width is 8 bits.
-  AccessWidth16,                                            ///< Access width is 16 bits.
-  AccessWidth32,                                            ///< Access width is 32 bits.
-  AccessWidth64,                                            ///< Access width is 64 bits.
-
-  AccessS3SaveWidth8 = 0x81,                                ///< Save 8 bits data.
-  AccessS3SaveWidth16,                                      ///< Save 16 bits data.
-  AccessS3SaveWidth32,                                      ///< Save 32 bits data.
-  AccessS3SaveWidth64,                                      ///< Save 64 bits data.
-} ACCESS_WIDTH;
-
-/// AGESA struct name
-typedef enum {
-  // AGESA BASIC FUNCTIONS
-  AMD_INIT_RECOVERY          = 0x00021000,                  ///< AmdInitRecovery entry point handle
-  AMD_CREATE_STRUCT          = 0x00022000,                  ///< AmdCreateStruct handle
-  AMD_INIT_EARLY             = 0x00023000,                  ///< AmdInitEarly entry point handle
-  AMD_INIT_ENV               = 0x00024000,                  ///< AmdInitEnv entry point handle
-  AMD_INIT_LATE              = 0x00025000,                  ///< AmdInitLate entry point handle
-  AMD_INIT_MID               = 0x00026000,                  ///< AmdInitMid entry point handle
-  AMD_INIT_POST              = 0x00027000,                  ///< AmdInitPost entry point handle
-  AMD_INIT_RESET             = 0x00028000,                  ///< AmdInitReset entry point handle
-  AMD_INIT_RESUME            = 0x00029000,                  ///< AmdInitResume entry point handle
-  AMD_RELEASE_STRUCT         = 0x0002A000,                  ///< AmdReleaseStruct handle
-  AMD_S3LATE_RESTORE         = 0x0002B000,                  ///< AmdS3LateRestore entry point handle
-  AMD_S3_SAVE                = 0x0002C000,                  ///< AmdS3Save entry point handle
-  AMD_GET_APIC_ID            = 0x0002D000,                  ///< AmdGetApicId entry point handle
-  AMD_GET_PCI_ADDRESS        = 0x0002E000,                  ///< AmdGetPciAddress entry point handle
-  AMD_IDENTIFY_CORE          = 0x0002F000,                  ///< AmdIdentifyCore general service handle
-  AMD_READ_EVENT_LOG         = 0x00030000,                  ///< AmdReadEventLog general service handle
-  AMD_GET_EXECACHE_SIZE      = 0x00031000,                  ///< AmdGetAvailableExeCacheSize general service handle
-  AMD_LATE_RUN_AP_TASK       = 0x00032000,                  ///< AmdLateRunApTask entry point handle
-  AMD_IDENTIFY_DIMMS         = 0x00033000,                  ///< AmdIdentifyDimm general service handle
-  AMD_GET_2D_DATA_EYE        = 0x00034000,                  ///< AmdGet2DDataEye general service handle
-  AMD_S3FINAL_RESTORE        = 0x00035000,                  ///< AmdS3FinalRestore entry point handle
-  AMD_HEAP_ALLOCATE_BUFFER   = 0x00038000,
-  AMD_HEAP_DEALLOCATE_BUFFER = 0x00039000,
-  FCH_INIT_RESET             = 0x00040000,
-  FCH_INIT_ENV               = 0x00041000,
-  FCH_INIT_MID               = 0x00042000,
-  FCH_INIT_LATE              = 0x00043000,
-  FCH_INIT_S3_EARLY_RESTORE  = 0x00044000,
-  FCH_INIT_S3_LATE_RESTORE   = 0x00045000,
-  AMD_SET_VALUE              = 0x00081000,
-  AMD_GET_VALUE              = 0x00082000,
-} AGESA_STRUCT_NAME;
-
-  /*  ResetType constant values */
-#define WARM_RESET_WHENEVER 1
-#define COLD_RESET_WHENEVER 2
-#define WARM_RESET_IMMEDIATELY 3
-#define COLD_RESET_IMMEDIATELY 4
-
-
-// AGESA Structures
-
-/// The standard header for all AGESA services.
-/// For internal AGESA naming conventions, see @ref amdconfigparamname .
-typedef struct {
-  IN       VOID *          ImageBasePtr;     ///< The AGESA Image base address.
-  IN       UINT32          Func;             ///< The service desired
-  IN       VOID *          AltImageBasePtr;  ///< Alternate Image location
-  IN       CALLOUT_ENTRY   CalloutPtr;       ///< For Callout from AGESA
-  IN       UINT8           HeapStatus;       ///< For heap status from boot time slide.
-  IN       UINT64          HeapBasePtr;      ///< Location of the heap
-  IN OUT   UINT8           Reserved[7];      ///< This space is reserved for future use.
-} AMD_CONFIG_PARAMS;
-
-
-/// Create Struct Interface.
-typedef struct {
-  IN       AMD_CONFIG_PARAMS   StdHeader;          ///< Standard configuration header
-  IN       AGESA_STRUCT_NAME   AgesaFunctionName;  ///< The service to init
-  IN       ALLOCATION_METHOD   AllocationMethod;   ///< How to handle buffer allocation
-  IN OUT   UINT32              NewStructSize;      ///< The size of the allocated data, in for ByHost, else out only.
-  IN OUT   VOID                *NewStructPtr;      ///< The struct for the service.
-                                                   ///< The struct to init for ByHost allocation,
-                                                   ///< the initialized struct on return.
-} AMD_INTERFACE_PARAMS;
-
-#define FUNC_0    0   // bit-placed for PCI address creation
-#define FUNC_1    1
-#define FUNC_2    2
-#define FUNC_3    3
-#define FUNC_4    4
-#define FUNC_5    5
-#define FUNC_6    6
-#define FUNC_7    7
-
-/// AGESA Binary module header structure
-typedef struct {
-  IN  UINT32  Signature;                          ///< Binary Signature
-  IN  CHAR8   CreatorID[8];                       ///< 8 characters ID
-  IN  CHAR8   Version[12];                        ///< 12 characters version
-  IN  UINT32  ModuleInfoOffset;                   ///< Offset of module
-  IN  UINT32  EntryPointAddress;                  ///< Entry address
-  IN  UINT32  ImageBase;                          ///< Image base
-  IN  UINT32  RelocTableOffset;                   ///< Relocate Table offset
-  IN  UINT32  ImageSize;                          ///< Size
-  IN  UINT16  Checksum;                           ///< Checksum
-  IN  UINT8   ImageType;                          ///< Type
-  IN  UINT8   V_Reserved;                         ///< Reserved
-} AMD_IMAGE_HEADER;
-
-/// AGESA Binary module header structure
-typedef struct _AMD_MODULE_HEADER {
-  IN  UINT32          ModuleHeaderSignature;      ///< Module signature
-  IN  CHAR8           ModuleIdentifier[8];        ///< 8 characters ID
-  IN  CHAR8           ModuleVersion[12];          ///< 12 characters version
-  IN  VOID            *ModuleDispatcher;          ///< A pointer point to dispatcher
-  IN  struct _AMD_MODULE_HEADER  *NextBlock;      ///< Next module header link
-} AMD_MODULE_HEADER;
-
-// AMD_CODE_HEADER Signatures.
-#define AGESA_CODE_SIGNATURE  {'!', '!', '!', 'A', 'G', 'E', 'S', 'A'}
-#define CIMXNB_CODE_SIGNATURE {'!', '!', 'C', 'I', 'M', 'X', 'N', 'B'}
-#define CIMXSB_CODE_SIGNATURE {'!', '!', 'C', 'I', 'M', 'X', 'S', 'B'}
-
-/// AGESA_CODE_SIGNATURE
-typedef struct {
-  IN  CHAR8   Signature[8];                       ///< code header Signature
-  IN  CHAR8   ComponentName[16];                  ///< 16 character name of the code module
-  IN  CHAR8   Version[12];                        ///< 12 character version string
-  IN  CHAR8   TerminatorNull;                     ///< null terminated string
-  IN  CHAR8   VerReserved[7];                     ///< reserved space
-} AMD_CODE_HEADER;
-
-/// Extended PCI address format
-typedef struct {
-  IN OUT  UINT32      Register:12;                ///< Register offset
-  IN OUT  UINT32      Function:3;                 ///< Function number
-  IN OUT  UINT32      Device:5;                   ///< Device number
-  IN OUT  UINT32      Bus:8;                      ///< Bus number
-  IN OUT  UINT32      Segment:4;                  ///< Segment
-} EXT_PCI_ADDR;
-
-/// Union type for PCI address
-typedef union _PCI_ADDR {
-  IN  UINT32          AddressValue;               ///< Formal address
-  IN  EXT_PCI_ADDR    Address;                    ///< Extended address
-} PCI_ADDR;
-
-//   SBDFO - Segment Bus Device Function Offset
-//   31:28   Segment (4-bits)
-//   27:20   Bus     (8-bits)
-//   19:15   Device  (5-bits)
-//   14:12   Function(3-bits)
-//   11:00   Offset  (12-bits)
-
-#define MAKE_SBDFO(Seg, Bus, Dev, Fun, Off) ((((UINT32) (Seg)) << 28) | (((UINT32) (Bus)) << 20) | \
-                   (((UINT32)(Dev)) << 15) | (((UINT32)(Fun)) << 12) | ((UINT32)(Off)))
-#define ILLEGAL_SBDFO 0xFFFFFFFFul
-
-/// CPUID data received registers format
-typedef struct {
-  OUT UINT32          EAX_Reg;                    ///< CPUID instruction result in EAX
-  OUT UINT32          EBX_Reg;                    ///< CPUID instruction result in EBX
-  OUT UINT32          ECX_Reg;                    ///< CPUID instruction result in ECX
-  OUT UINT32          EDX_Reg;                    ///< CPUID instruction result in EDX
-} CPUID_DATA;
-
-// Topology Services definitions and macros
-#define TOPOLOGY_LIST_TERMINAL             0xFF             ///< End of list.
-
-
-#ifndef BIT0
-  #define BIT0        0x0000000000000001ull
-#endif
-#ifndef BIT1
-  #define BIT1        0x0000000000000002ull
-#endif
-#ifndef BIT2
-  #define BIT2        0x0000000000000004ull
-#endif
-#ifndef BIT3
-  #define BIT3        0x0000000000000008ull
-#endif
-#ifndef BIT4
-  #define BIT4        0x0000000000000010ull
-#endif
-#ifndef BIT5
-  #define BIT5        0x0000000000000020ull
-#endif
-#ifndef BIT6
-  #define BIT6        0x0000000000000040ull
-#endif
-#ifndef BIT7
-  #define BIT7        0x0000000000000080ull
-#endif
-#ifndef BIT8
-  #define BIT8        0x0000000000000100ull
-#endif
-#ifndef BIT9
-  #define BIT9        0x0000000000000200ull
-#endif
-#ifndef BIT10
-  #define BIT10       0x0000000000000400ull
-#endif
-#ifndef BIT11
-  #define BIT11       0x0000000000000800ull
-#endif
-#ifndef BIT12
-  #define BIT12       0x0000000000001000ull
-#endif
-#ifndef BIT13
-  #define BIT13       0x0000000000002000ull
-#endif
-#ifndef BIT14
-  #define BIT14       0x0000000000004000ull
-#endif
-#ifndef BIT15
-  #define BIT15       0x0000000000008000ull
-#endif
-#ifndef BIT16
-  #define BIT16       0x0000000000010000ull
-#endif
-#ifndef BIT17
-  #define BIT17       0x0000000000020000ull
-#endif
-#ifndef BIT18
-  #define BIT18       0x0000000000040000ull
-#endif
-#ifndef BIT19
-  #define BIT19       0x0000000000080000ull
-#endif
-#ifndef BIT20
-  #define BIT20       0x0000000000100000ull
-#endif
-#ifndef BIT21
-  #define BIT21       0x0000000000200000ull
-#endif
-#ifndef BIT22
-  #define BIT22       0x0000000000400000ull
-#endif
-#ifndef BIT23
-  #define BIT23       0x0000000000800000ull
-#endif
-#ifndef BIT24
-  #define BIT24       0x0000000001000000ull
-#endif
-#ifndef BIT25
-  #define BIT25       0x0000000002000000ull
-#endif
-#ifndef BIT26
-  #define BIT26       0x0000000004000000ull
-#endif
-#ifndef BIT27
-  #define BIT27       0x0000000008000000ull
-#endif
-#ifndef BIT28
-  #define BIT28       0x0000000010000000ull
-#endif
-#ifndef BIT29
-  #define BIT29       0x0000000020000000ull
-#endif
-#ifndef BIT30
-  #define BIT30       0x0000000040000000ull
-#endif
-#ifndef BIT31
-  #define BIT31       0x0000000080000000ull
-#endif
-#ifndef BIT32
-  #define BIT32       0x0000000100000000ull
-#endif
-#ifndef BIT33
-  #define BIT33       0x0000000200000000ull
-#endif
-#ifndef BIT34
-  #define BIT34       0x0000000400000000ull
-#endif
-#ifndef BIT35
-  #define BIT35       0x0000000800000000ull
-#endif
-#ifndef BIT36
-  #define BIT36       0x0000001000000000ull
-#endif
-#ifndef BIT37
-  #define BIT37       0x0000002000000000ull
-#endif
-#ifndef BIT38
-  #define BIT38       0x0000004000000000ull
-#endif
-#ifndef BIT39
-  #define BIT39       0x0000008000000000ull
-#endif
-#ifndef BIT40
-  #define BIT40       0x0000010000000000ull
-#endif
-#ifndef BIT41
-  #define BIT41       0x0000020000000000ull
-#endif
-#ifndef BIT42
-  #define BIT42       0x0000040000000000ull
-#endif
-#ifndef BIT43
-  #define BIT43       0x0000080000000000ull
-#endif
-#ifndef BIT44
-  #define BIT44       0x0000100000000000ull
-#endif
-#ifndef BIT45
-  #define BIT45       0x0000200000000000ull
-#endif
-#ifndef BIT46
-  #define BIT46       0x0000400000000000ull
-#endif
-#ifndef BIT47
-  #define BIT47       0x0000800000000000ull
-#endif
-#ifndef BIT48
-  #define BIT48       0x0001000000000000ull
-#endif
-#ifndef BIT49
-  #define BIT49       0x0002000000000000ull
-#endif
-#ifndef BIT50
-  #define BIT50       0x0004000000000000ull
-#endif
-#ifndef BIT51
-  #define BIT51       0x0008000000000000ull
-#endif
-#ifndef BIT52
-  #define BIT52       0x0010000000000000ull
-#endif
-#ifndef BIT53
-  #define BIT53       0x0020000000000000ull
-#endif
-#ifndef BIT54
-  #define BIT54       0x0040000000000000ull
-#endif
-#ifndef BIT55
-  #define BIT55       0x0080000000000000ull
-#endif
-#ifndef BIT56
-  #define BIT56       0x0100000000000000ull
-#endif
-#ifndef BIT57
-  #define BIT57       0x0200000000000000ull
-#endif
-#ifndef BIT58
-  #define BIT58       0x0400000000000000ull
-#endif
-#ifndef BIT59
-  #define BIT59       0x0800000000000000ull
-#endif
-#ifndef BIT60
-  #define BIT60       0x1000000000000000ull
-#endif
-#ifndef BIT61
-  #define BIT61       0x2000000000000000ull
-#endif
-#ifndef BIT62
-  #define BIT62       0x4000000000000000ull
-#endif
-#ifndef BIT63
-  #define BIT63       0x8000000000000000ull
-#endif
-
-#endif // _AMD_H_

pi/amd/00630F01/Dispatcher.h

diff --git a/pi/amd/00630F01/Dispatcher.h b/pi/amd/00630F01/Dispatcher.h
deleted file mode 100644
index d14b419..0000000
--- a/pi/amd/00630F01/Dispatcher.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Pushhigh Interface
- *
- * Contains interface to Pushhigh entry
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Legacy
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * ***************************************************************************
- */
-
-#ifndef _DISPATCHER_H_
-#define _DISPATCHER_H_
-
-// AGESA function prototypes
-AGESA_STATUS CALLCONV AmdAgesaDispatcher ( IN OUT VOID *ConfigPtr );
-AGESA_STATUS CALLCONV AmdAgesaCallout ( IN UINT32 Func, IN UINT32 Data, IN OUT VOID *ConfigPtr );
-
-#endif // _DISPATCHER_H_

pi/amd/00630F01/Include/Filecode.h

diff --git a/pi/amd/00630F01/Include/Filecode.h b/pi/amd/00630F01/Include/Filecode.h
deleted file mode 100644
index af31c46..0000000
--- a/pi/amd/00630F01/Include/Filecode.h
+++ /dev/null
@@ -1,781 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Collectively assign unique filecodes for assert and debug to each source file.
- *
- * Publish values for decorated filenames, which can be used for
- * ASSERT and debug support using a preprocessor define like:
- * @n <tt> \#define FILECODE MY_C_FILENAME_FILECODE </tt> @n
- * This file serves as a reference for debugging to associate the code and filename.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Include
- * @e \$Revision: 284995 $   @e \$Date: 2014-02-17 11:17:41 -0600 (Mon, 17 Feb 2014) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _FILECODE_H_
-#define _FILECODE_H_
-
-#define UNASSIGNED_FILE_FILECODE                                         (0xFFFF)
-
-/// For debug use in any Platform's options C file.
-/// Can be reused for platforms and image builds, since only one options file can be built.
-#define PLATFORM_SPECIFIC_OPTIONS_FILECODE                               (0xBBBB)
-
-
-#define PROC_GNB_COMMON_GNBLIBFEATURES_FILECODE                          (0xA001)
-#define PROC_GNB_GNBINITATEARLY_FILECODE                                 (0xA017)
-#define PROC_GNB_GNBINITATENV_FILECODE                                   (0xA020)
-#define PROC_GNB_GNBINITATLATE_FILECODE                                  (0xA021)
-#define PROC_GNB_GNBINITATMID_FILECODE                                   (0xA022)
-#define PROC_GNB_GNBINITATPOST_FILECODE                                  (0xA023)
-#define PROC_GNB_GNBINITATRESET_FILECODE                                 (0xA024)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIB_FILECODE                    (0xA025)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBCPUACC_FILECODE              (0xA026)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBHEAP_FILECODE                (0xA027)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBIOACC_FILECODE               (0xA028)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBMEMACC_FILECODE              (0xA029)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBPCI_FILECODE                 (0xA02A)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBPCIACC_FILECODE              (0xA030)
-#define PROC_GNB_MODULES_GNBGFXINITLIBV1_GFXCARDINFO_FILECODE            (0xA031)
-#define PROC_GNB_MODULES_GNBGFXINITLIBV1_GFXENUMCONNECTORS_FILECODE      (0xA032)
-#define PROC_GNB_MODULES_GNBGFXINITLIBV1_GFXPOWERPLAYTABLE_FILECODE      (0xA033)
-#define PROC_GNB_MODULES_GNBNBINITLIBV1_GNBNBINITLIBV1_FILECODE          (0xA034)
-#define PROC_GNB_MODULES_GNBPCIEALIBV1_PCIEALIB_FILECODE                 (0xA035)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_PCIECONFIGDATA_FILECODE           (0xA036)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_PCIECONFIGLIB_FILECODE            (0xA037)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_PCIEINPUTPARSER_FILECODE          (0xA038)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_PCIEMAPTOPOLOGY_FILECODE          (0xA039)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEASPMBLACKLIST_FILECODE     (0xA03B)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEASPMEXITLATENCY_FILECODE   (0xA03C)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPHYSERVICES_FILECODE       (0xA03D)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPIFSERVICES_FILECODE       (0xA03E)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPORTREGACC_FILECODE        (0xA03F)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPORTSERVICES_FILECODE      (0xA041)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPOWERMGMT_FILECODE         (0xA043)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIESILICONSERVICES_FILECODE   (0xA045)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIETIMER_FILECODE             (0xA046)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIETOPOLOGYSERVICES_FILECODE  (0xA047)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEUTILITYLIB_FILECODE        (0xA048)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEWRAPPERREGACC_FILECODE     (0xA049)
-#define PROC_GNB_MODULES_GNBPCIETRAININGV1_PCIETRAINING_FILECODE         (0xA04A)
-#define PROC_GNB_MODULES_GNBPCIETRAININGV1_PCIEWORKAROUNDS_FILECODE      (0xA04B)
-#define PROC_GNB_MODULES_GNBPCIECOMMCLKCFG_PCIECOMMCLKCFG_FILECODE       (0xA04C)
-
-#define PROC_GNB_MODULES_GNBGFXCONFIG_GFXCONFIGENV_FILECODE              (0xA08E)
-#define PROC_GNB_MODULES_GNBGFXCONFIG_GFXCONFIGPOST_FILECODE             (0xA08F)
-#define PROC_GNB_MODULES_GNBTABLE_GNBTABLE_FILECODE                      (0xA090)
-#define PROC_GNB_MODULES_GNBGFXINITLIBV1_GNBGFXINITLIBV1_FILECODE        (0xA091)
-#define PROC_GNB_MODULES_GNBINITTN_GFXENVINITTN_FILECODE                 (0xA092)
-#define PROC_GNB_MODULES_GNBGFXCONFIG_GFXCONFIGLIB_FILECODE              (0xA093)
-#define PROC_GNB_MODULES_GNBINITTN_GFXGMCINITTN_FILECODE                 (0xA094)
-#define PROC_GNB_MODULES_GNBINITTN_GFXINTEGRATEDINFOTABLETN_FILECODE     (0xA095)
-#define PROC_GNB_MODULES_GNBINITTN_GFXLIBTN_FILECODE                     (0xA096)
-#define PROC_GNB_MODULES_GNBINITTN_GFXMIDINITTN_FILECODE                 (0xA097)
-#define PROC_GNB_MODULES_GNBINITTN_GNBPOSTINITTN_FILECODE                (0xA098)
-#define PROC_GNB_MODULES_GNBINITTN_GNBEARLYINITTN_FILECODE               (0xA09A)
-#define PROC_GNB_MODULES_GNBINITTN_GNBENVINITTN_FILECODE                 (0xA09B)
-#define PROC_GNB_MODULES_GNBINITTN_GNBFUSETABLETN_FILECODE               (0xA09C)
-#define PROC_GNB_MODULES_GNBINITTN_GNBMIDINITTN_FILECODE                 (0xA09D)
-#define PROC_GNB_MODULES_GNBINITTN_GFXPOSTINITTN_FILECODE                (0xA09E)
-#define PROC_GNB_MODULES_GNBINITTN_GNBREGISTERACCTN_FILECODE             (0xA09F)
-#define PROC_GNB_MODULES_GNBINITTN_PCIECONFIGTN_FILECODE                 (0xA0A0)
-#define PROC_GNB_MODULES_GNBINITTN_PCIEEARLYINITTN_FILECODE              (0xA0A1)
-#define PROC_GNB_MODULES_GNBINITTN_PCIEENVINITTN_FILECODE                (0xA0A2)
-#define PROC_GNB_MODULES_GNBINITTN_PCIELIBTN_FILECODE                    (0xA0A3)
-#define PROC_GNB_MODULES_GNBINITTN_PCIEMIDINITTN_FILECODE                (0xA0A4)
-#define PROC_GNB_MODULES_GNBINITTN_PCIEPOSTINITTN_FILECODE               (0xA0A5)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV4_PCIEWRAPPERSERVICESV4_FILECODE (0xA0A6)
-#define PROC_GNB_MODULES_GNBIOMMUIVRS_GNBIOMMUIVRS_FILECODE              (0xA0A7)
-#define PROC_GNB_MODULES_GNBIVRSLIB_GNBIVRSLIB_FILECODE                  (0xA0A8)
-#define PROC_GNB_MODULES_GNBNBINITLIBV4_GNBNBINITLIBV4_FILECODE          (0xA0A9)
-#define PROC_GNB_MODULES_GNBFAMTRANSLATION_GNBPCIETRANSLATION_FILECODE   (0xA0AA)
-#define PROC_GNB_MODULES_GNBINITTN_GNBIOMMUIVRSTN_FILECODE               (0xA0AB)
-
-#define PROC_GNB_MODULES_GNBINITTN_PCIEPOWERGATETN_FILECODE              (0xA0B8)
-#define PROC_GNB_MODULES_GNBINITTN_PCIEALIBTNFS1_FILECODE                (0xA0B9)
-#define PROC_GNB_MODULES_GNBSBLIB_GNBSBPCIE_FILECODE                     (0xA0BA)
-#define PROC_GNB_MODULES_GNBSBLIB_GNBSBLIB_FILECODE                      (0xA0BB)
-#define PROC_GNB_MODULES_GNBSBIOMMULIB_GNBSBIOMMULIB_FILECODE            (0xA0BC)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBTIMERLIB_FILECODE               (0xA0BD)
-#define PROC_GNB_MODULES_GNBSSOCKETLIB_GNBSSOCKETLIB_FILECODE            (0xA0BF)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_GNBHANDLELIB_FILECODE             (0xA0C0)
-#define PROC_GNB_MODULES_GNBINITTN_GNBBAPMCOEFFCALCTN_FILECODE           (0xA0C1)
-#define PROC_GNB_MODULES_GNBPCIEASPM_PCIEASPM_FILECODE                   (0xA0C2)
-
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEASPMEXITLATENCYV5_FILECODE (0xA0C5)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEPIFSERVICESV5_FILECODE     (0xA0C6)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEPORTSERVICESV5_FILECODE    (0xA0C7)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEPOWERMGMTV5_FILECODE       (0xA0C8)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIESILICONSERVICESV5_FILECODE (0xA0C9)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEWRAPPERSERVICESV5_FILECODE (0xA0CA)
-#define PROC_GNB_MODULES_GNBNBINITLIBV5_GNBNBINITLIBV5_FILECODE          (0xA0CB)
-
-#define PROC_GNB_MODULES_GNBFAMTRANSLATION_GNBTRANSLATION_FILECODE       (0xA0DB)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV4_PCIEPOWERMGMTV4_FILECODE       (0xA0DC)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV4_PCIEPORTSERVICESV4_FILECODE    (0xA0DD)
-
-#define PROC_GNB_MODULES_GNBINITTN_PCIEALIBTNFM2_FILECODE                (0xA0DF)
-#define PROC_GNB_MODULES_GNBGFXCONFIG_GFXCONFIGMID_FILECODE              (0xA0E0)
-
-#define PROC_GNB_MODULES_GNBIOAPIC_GNBIOAPIC_FILECODE                    (0xA0EE)
-
-#define PROC_GNB_MODULES_GNBPCIEMAXPAYLOAD_PCIEMAXPAYLOAD_FILECODE       (0xA0F4)
-#define PROC_GNB_MODULES_GNBPCIECLKPM_PCIECLKPM_FILECODE                 (0xA0F5)
-
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIETOPOLOGYSERVICESV5_FILECODE (0xA100)
-#define PROC_GNB_MODULES_GNBPCIETRAININGV2_PCIETRAININGV2_FILECODE        (0xA101)
-#define PROC_GNB_MODULES_GNBPCIETRAININGV2_PCIEWORKAROUNDSV2_FILECODE     (0xA102)
-
-#define PROC_RECOVERY_GNB_GNBRECOVERY_FILECODE                           (0xAE01)
-#define PROC_RECOVERY_GNB_NBINITRECOVERY_FILECODE                        (0xAE02)
-#define PROC_GNB_GNBINITATS3SAVE_FILECODE                                (0xAE03)
-#define PROC_GNB_MODULES_GNBSVIEW_GNBSVIEW_FILECODE                      (0xAE04)
-
-#define PROC_GNB_MODULES_GNBINITKV_GFXENVINITKV_FILECODE                 (0xAE05)
-#define PROC_GNB_MODULES_GNBINITKV_GFXINTEGRATEDINFOTABLEKV_FILECODE     (0xAE06)
-#define PROC_GNB_MODULES_GNBINITKV_GFXMIDINITKV_FILECODE                 (0xAE07)
-#define PROC_GNB_MODULES_GNBINITKV_GFXPOSTINITKV_FILECODE                (0xAE08)
-#define PROC_GNB_MODULES_GNBINITKV_GNBEARLYINITKV_FILECODE               (0xAE09)
-#define PROC_GNB_MODULES_GNBINITKV_GNBENVINITKV_FILECODE                 (0xAE0A)
-#define PROC_GNB_MODULES_GNBINITKV_GNBIOMMUIVRSKV_FILECODE               (0xAE0B)
-#define PROC_GNB_MODULES_GNBINITKV_GNBMIDINITKV_FILECODE                 (0xAE0C)
-#define PROC_GNB_MODULES_GNBINITKV_GNBPOSTINITKV_FILECODE                (0xAE0D)
-#define PROC_GNB_MODULES_GNBINITKV_GNBREGISTERACCKV_FILECODE             (0xAE0E)
-#define PROC_GNB_MODULES_GNBINITKV_PCIECOMPLEXDATAKV_FILECODE            (0xAE0F)
-#define PROC_GNB_MODULES_GNBINITKV_PCIECONFIGKV_FILECODE                 (0xAE10)
-#define PROC_GNB_MODULES_GNBINITKV_PCIEEARLYINITKV_FILECODE              (0xAE11)
-#define PROC_GNB_MODULES_GNBINITKV_PCIEENVINITKV_FILECODE                (0xAE12)
-#define PROC_GNB_MODULES_GNBINITKV_PCIELIBKV_FILECODE                    (0xAE13)
-#define PROC_GNB_MODULES_GNBINITKV_PCIEMIDINITKV_FILECODE                (0xAE14)
-#define PROC_GNB_MODULES_GNBINITKV_PCIEPOSTINITKV_FILECODE               (0xAE15)
-#define PROC_GNB_MODULES_GNBINITKV_GFXLIBKV_FILECODE                     (0xAE16)
-#define PROC_GNB_MODULES_GNBIOMMUSCRATCH_GNBIOMMUSCRATCH_FILECODE        (0xAE18)
-#define PROC_GNB_MODULES_GNBINITKV_GFXGMCINITKV_FILECODE                 (0xAE19)
-#define PROC_GNB_MODULES_GNBSMULIBV7_GNBSMUINITLIBV7_FILECODE            (0xAE1A)
-#define PROC_GNB_MODULES_GNBINITKV_GNBSMUBIOSTABLEKV_FILECODE            (0xAE1B)
-#define PROC_GNB_MODULES_GNBINITKV_PCIEPOWERGATEKV_FILECODE              (0xAE1C)
-
-#define PROC_GNB_MODULES_GNBPCIEALIBV2_PCIEALIBV2_FILECODE               (0xAE33)
-#define PROC_GNB_MODULES_GNBINITKV_ALIBKVD_FILECODE                      (0xAE34)
-#define PROC_GNB_MODULES_GNBINITKV_ALIBKVM_FILECODE                      (0xAE35)
-#define PROC_GNB_MODULES_GNBINITKV_GNBFUSETABLEKV_FILECODE               (0xAE39)
-#define PROC_GNB_MODULES_GNBURALIBV1_GNBURALIBV1_FILECODE                (0xAE3A)
-#define PROC_GNB_MODULES_GNBINITKV_GNBURAKV_FILECODE                     (0xAE3B)
-#define PROC_GNB_MODULES_GNBINITKV_GNBURATOKENMAPKV_FILECODE             (0xAE3C)
-#define PROC_GNB_MODULES_GNBGFXINTTABLEV3_GFXLIBV3_FILECODE              (0xAE41)
-#define PROC_GNB_MODULES_GNBGFXINTTABLEV3_GFXINTEGRATEDINFOTABLE_FILECODE (0xAE42)
-#define PROC_GNB_MODULES_GNBGFXINTTABLEV3_GFXPWRPLAYTABLE_FILECODE       (0xAE43)
-#define PROC_GNB_MODULES_GNBSCSLIBV1_GNBSCSLIBV1_FILECODE                (0xAE44)
-
-// FCH
-#define PROC_FCH_AZALIA_AZALIARESET_FILECODE                             (0xB001)
-#define PROC_FCH_AZALIA_AZALIAENV_FILECODE                               (0xB002)
-#define PROC_FCH_AZALIA_AZALIAMID_FILECODE                               (0xB003)
-#define PROC_FCH_AZALIA_AZALIALATE_FILECODE                              (0xB004)
-#define PROC_FCH_COMMON_ACPILIB_FILECODE                                 (0xB010)
-#define PROC_FCH_COMMON_FCHLIB_FILECODE                                  (0xB011)
-#define PROC_FCH_COMMON_FCHCOMMON_FILECODE                               (0xB012)
-#define PROC_FCH_COMMON_FCHCOMMONSMM_FILECODE                            (0xB013)
-#define PROC_FCH_COMMON_MEMLIB_FILECODE                                  (0xB014)
-#define PROC_FCH_COMMON_PCILIB_FILECODE                                  (0xB015)
-#define PROC_FCH_COMMON_FCHPELIB_FILECODE                                (0xB016)
-#define PROC_FCH_GEC_GECRESET_FILECODE                                   (0xB020)
-#define PROC_FCH_GEC_GECENV_FILECODE                                     (0xB021)
-#define PROC_FCH_GEC_GECMID_FILECODE                                     (0xB022)
-#define PROC_FCH_GEC_GECLATE_FILECODE                                    (0xB023)
-#define PROC_FCH_GEC_FAMILY_HUDSON2_HUDSON2GECSERVICE_FILECODE           (0xB024)
-#define PROC_FCH_GEC_FAMILY_HUDSON2_HUDSON2GECENVSERVICE_FILECODE        (0xB025)
-#define PROC_FCH_HWACPI_HWACPIRESET_FILECODE                             (0xB030)
-#define PROC_FCH_HWACPI_HWACPIENV_FILECODE                               (0xB031)
-#define PROC_FCH_HWACPI_HWACPIMID_FILECODE                               (0xB032)
-#define PROC_FCH_HWACPI_HWACPILATE_FILECODE                              (0xB033)
-#define PROC_FCH_HWACPI_FAMILY_HUDSON2_HUDSON2HWACPIENVSERVICE_FILECODE  (0xB034)
-#define PROC_FCH_HWACPI_FAMILY_HUDSON2_HUDSON2HWACPIMIDSERVICE_FILECODE  (0xB035)
-#define PROC_FCH_HWACPI_FAMILY_HUDSON2_HUDSON2HWACPILATESERVICE_FILECODE (0xB036)
-#define PROC_FCH_HWACPI_FAMILY_HUDSON2_HUDSON2SSSERVICE_FILECODE         (0xB037)
-#define PROC_FCH_HWM_HWMRESET_FILECODE                                   (0xB050)
-#define PROC_FCH_HWM_HWMENV_FILECODE                                     (0xB051)
-#define PROC_FCH_HWM_HWMMID_FILECODE                                     (0xB052)
-#define PROC_FCH_HWM_HWMLATE_FILECODE                                    (0xB053)
-#define PROC_FCH_HWM_FAMILY_HUDSON2_HUDSON2HWMENVSERVICE_FILECODE        (0xB054)
-#define PROC_FCH_HWM_FAMILY_HUDSON2_HUDSON2HWMMIDSERVICE_FILECODE        (0xB055)
-#define PROC_FCH_HWM_FAMILY_HUDSON2_HUDSON2HWMLATESERVICE_FILECODE       (0xB056)
-#define PROC_FCH_IMC_IMCENV_FILECODE                                     (0xB060)
-#define PROC_FCH_IMC_IMCMID_FILECODE                                     (0xB061)
-#define PROC_FCH_IMC_IMCLATE_FILECODE                                    (0xB062)
-#define PROC_FCH_IMC_IMCLIB_FILECODE                                     (0xB063)
-#define PROC_FCH_IMC_IMCRESET_FILECODE                                   (0xB064)
-#define PROC_FCH_IMC_FCHECENV_FILECODE                                   (0xB065)
-#define PROC_FCH_IMC_FCHECMID_FILECODE                                   (0xB066)
-#define PROC_FCH_IMC_FCHECLATE_FILECODE                                  (0xB067)
-#define PROC_FCH_IMC_FCHECRESET_FILECODE                                 (0xB068)
-#define PROC_FCH_IMC_FAMILY_HUDSON2_HUDSON2IMCSERVICE_FILECODE           (0xB069)
-#define PROC_FCH_IDE_IDEENV_FILECODE                                     (0xB06D)
-#define PROC_FCH_IDE_IDEMID_FILECODE                                     (0xB06E)
-#define PROC_FCH_IDE_IDELATE_FILECODE                                    (0xB06F)
-#define PROC_FCH_INTERFACE_INITRESETDEF_FILECODE                         (0xB070)
-#define PROC_FCH_INTERFACE_INITENVDEF_FILECODE                           (0xB071)
-#define PROC_FCH_INTERFACE_FCHINITRESET_FILECODE                         (0xB072)
-#define PROC_FCH_INTERFACE_FCHINITENV_FILECODE                           (0xB073)
-#define PROC_FCH_INTERFACE_FCHINITLATE_FILECODE                          (0xB074)
-#define PROC_FCH_INTERFACE_FCHINITMID_FILECODE                           (0xB075)
-#define PROC_FCH_INTERFACE_FCHINITS3_FILECODE                            (0xB076)
-#define PROC_FCH_INTERFACE_FCHTASKLAUNCHER_FILECODE                      (0xB077)
-#define PROC_FCH_IR_IRENV_FILECODE                                       (0xB080)
-#define PROC_FCH_IR_IRMID_FILECODE                                       (0xB081)
-#define PROC_FCH_IR_IRLATE_FILECODE                                      (0xB082)
-#define PROC_FCH_PCIB_PCIBRESET_FILECODE                                 (0xB090)
-#define PROC_FCH_PCIB_PCIBENV_FILECODE                                   (0xB091)
-#define PROC_FCH_PCIB_PCIBMID_FILECODE                                   (0xB092)
-#define PROC_FCH_PCIB_PCIBLATE_FILECODE                                  (0xB093)
-#define PROC_FCH_PCIE_ABRESET_FILECODE                                   (0xB0A0)
-#define PROC_FCH_PCIE_ABENV_FILECODE                                     (0xB0A1)
-#define PROC_FCH_PCIE_ABMID_FILECODE                                     (0xB0A2)
-#define PROC_FCH_PCIE_ABLATE_FILECODE                                    (0xB0A3)
-#define PROC_FCH_PCIE_GPPHP_FILECODE                                     (0xB0A4)
-#define PROC_FCH_PCIE_GPPLIB_FILECODE                                    (0xB0A5)
-#define PROC_FCH_PCIE_GPPRESET_FILECODE                                  (0xB0A6)
-#define PROC_FCH_PCIE_GPPENV_FILECODE                                    (0xB0A7)
-#define PROC_FCH_PCIE_GPPMID_FILECODE                                    (0xB0A8)
-#define PROC_FCH_PCIE_GPPLATE_FILECODE                                   (0xB0A9)
-#define PROC_FCH_PCIE_PCIERESET_FILECODE                                 (0xB0AA)
-#define PROC_FCH_PCIE_PCIEENV_FILECODE                                   (0xB0AB)
-#define PROC_FCH_PCIE_PCIEMID_FILECODE                                   (0xB0AC)
-#define PROC_FCH_PCIE_PCIELATE_FILECODE                                  (0xB0AD)
-#define PROC_FCH_PCIE_FAMILY_HUDSON2_HUDSON2ABRESETSERVICE_FILECODE      (0xB0AE)
-#define PROC_FCH_PCIE_FAMILY_HUDSON2_HUDSON2ABENVSERVICE_FILECODE        (0xB0AF)
-#define PROC_FCH_PCIE_FAMILY_HUDSON2_HUDSON2ABSERVICE_FILECODE           (0xB0B0)
-#define PROC_FCH_PCIE_FAMILY_HUDSON2_HUDSON2GPPRESETSERVICE_FILECODE     (0xB0B1)
-#define PROC_FCH_PCIE_FAMILY_HUDSON2_HUDSON2GPPSERVICE_FILECODE          (0xB0B2)
-#define PROC_FCH_PCIE_FAMILY_HUDSON2_HUDSON2PCIEENVSERVICE_FILECODE      (0xB0B3)
-#define PROC_FCH_PCIE_FAMILY_HUDSON2_HUDSON2PCIESERVICE_FILECODE         (0xB0B4)
-#define PROC_FCH_SATA_AHCIENV_FILECODE                                   (0xB0C0)
-#define PROC_FCH_SATA_AHCIMID_FILECODE                                   (0xB0C1)
-#define PROC_FCH_SATA_AHCILATE_FILECODE                                  (0xB0C2)
-#define PROC_FCH_SATA_AHCILIB_FILECODE                                   (0xB0C3)
-#define PROC_FCH_SATA_IDE2AHCIENV_FILECODE                               (0xB0C4)
-#define PROC_FCH_SATA_IDE2AHCIMID_FILECODE                               (0xB0C5)
-#define PROC_FCH_SATA_IDE2AHCILATE_FILECODE                              (0xB0C6)
-#define PROC_FCH_SATA_IDE2AHCILIB_FILECODE                               (0xB0C7)
-#define PROC_FCH_SATA_RAIDENV_FILECODE                                   (0xB0C8)
-#define PROC_FCH_SATA_RAIDMID_FILECODE                                   (0xB0C9)
-#define PROC_FCH_SATA_RAIDLATE_FILECODE                                  (0xB0CA)
-#define PROC_FCH_SATA_RAIDLIB_FILECODE                                   (0xB0CB)
-#define PROC_FCH_SATA_SATAENV_FILECODE                                   (0xB0CC)
-#define PROC_FCH_SATA_SATAENVLIB_FILECODE                                (0xB0CD)
-#define PROC_FCH_SATA_SATAIDEENV_FILECODE                                (0xB0CE)
-#define PROC_FCH_SATA_SATAIDEMID_FILECODE                                (0xB0CF)
-#define PROC_FCH_SATA_SATAIDELATE_FILECODE                               (0xB0D0)
-#define PROC_FCH_SATA_SATAIDELIB_FILECODE                                (0xB0D1)
-#define PROC_FCH_SATA_SATAMID_FILECODE                                   (0xB0D2)
-#define PROC_FCH_SATA_SATALATE_FILECODE                                  (0xB0D3)
-#define PROC_FCH_SATA_SATALIB_FILECODE                                   (0xB0D4)
-#define PROC_FCH_SATA_SATARESET_FILECODE                                 (0xB0D5)
-#define PROC_FCH_SATA_FAMILY_HUDSON2_HUDSON2SATARESETSERVICE_FILECODE    (0xB0D6)
-#define PROC_FCH_SATA_FAMILY_HUDSON2_HUDSON2SATAENVSERVICE_FILECODE      (0xB0D7)
-#define PROC_FCH_SATA_FAMILY_HUDSON2_HUDSON2SATASERVICE_FILECODE         (0xB0D8)
-#define PROC_FCH_SD_SDENV_FILECODE                                       (0xB0E0)
-#define PROC_FCH_SD_SDMID_FILECODE                                       (0xB0E1)
-#define PROC_FCH_SD_SDLATE_FILECODE                                      (0xB0E2)
-#define PROC_FCH_SD_FAMILY_HUDSON2_HUDSON2SDSERVICE_FILECODE             (0xB0E3)
-#define PROC_FCH_SD_FAMILY_HUDSON2_HUDSON2SDRESETSERVICE_FILECODE        (0xB0E4)
-#define PROC_FCH_SD_FAMILY_HUDSON2_HUDSON2SDENVSERVICE_FILECODE          (0xB0E5)
-#define PROC_FCH_SPI_LPCRESET_FILECODE                                   (0xB0F0)
-#define PROC_FCH_SPI_LPCENV_FILECODE                                     (0xB0F1)
-#define PROC_FCH_SPI_LPCMID_FILECODE                                     (0xB0F2)
-#define PROC_FCH_SPI_LPCLATE_FILECODE                                    (0xB0F3)
-#define PROC_FCH_SPI_SPIRESET_FILECODE                                   (0xB0F4)
-#define PROC_FCH_SPI_SPIENV_FILECODE                                     (0xB0F5)
-#define PROC_FCH_SPI_SPIMID_FILECODE                                     (0xB0F6)
-#define PROC_FCH_SPI_SPILATE_FILECODE                                    (0xB0F7)
-#define PROC_FCH_SPI_FAMILY_HUDSON2_HUDSON2LPCENVSERVICE_FILECODE        (0xB0F8)
-#define PROC_FCH_SPI_FAMILY_HUDSON2_HUDSON2LPCRESETSERVICE_FILECODE      (0xB0F9)
-#define PROC_FCH_USB_EHCIRESET_FILECODE                                  (0xB100)
-#define PROC_FCH_USB_EHCIENV_FILECODE                                    (0xB101)
-#define PROC_FCH_USB_EHCIMID_FILECODE                                    (0xB102)
-#define PROC_FCH_USB_EHCILATE_FILECODE                                   (0xB103)
-#define PROC_FCH_USB_OHCIRESET_FILECODE                                  (0xB104)
-#define PROC_FCH_USB_OHCIENV_FILECODE                                    (0xB105)
-#define PROC_FCH_USB_OHCIMID_FILECODE                                    (0xB106)
-#define PROC_FCH_USB_OHCILATE_FILECODE                                   (0xB107)
-#define PROC_FCH_USB_USBRESET_FILECODE                                   (0xB108)
-#define PROC_FCH_USB_USBENV_FILECODE                                     (0xB109)
-#define PROC_FCH_USB_USBMID_FILECODE                                     (0xB10A)
-#define PROC_FCH_USB_USBLATE_FILECODE                                    (0xB10B)
-#define PROC_FCH_USB_XHCIRESET_FILECODE                                  (0xB10C)
-#define PROC_FCH_USB_XHCIENV_FILECODE                                    (0xB10D)
-#define PROC_FCH_USB_XHCIMID_FILECODE                                    (0xB10E)
-#define PROC_FCH_USB_XHCILATE_FILECODE                                   (0xB10F)
-#define PROC_FCH_USB_FAMILY_HUDSON2_HUDSON2EHCIENVSERVICE_FILECODE       (0xB110)
-#define PROC_FCH_USB_FAMILY_HUDSON2_HUDSON2EHCIMIDSERVICE_FILECODE       (0xB111)
-#define PROC_FCH_USB_FAMILY_HUDSON2_HUDSON2EHCILATESERVICE_FILECODE      (0xB112)
-#define PROC_FCH_USB_FAMILY_HUDSON2_HUDSON2OHCIENVSERVICE_FILECODE       (0xB113)
-#define PROC_FCH_USB_FAMILY_HUDSON2_HUDSON2OHCIMIDSERVICE_FILECODE       (0xB114)
-#define PROC_FCH_USB_FAMILY_HUDSON2_HUDSON2OHCILATESERVICE_FILECODE      (0xB115)
-#define PROC_FCH_USB_FAMILY_HUDSON2_HUDSON2XHCIRESETSERVICE_FILECODE     (0xB116)
-#define PROC_FCH_USB_FAMILY_HUDSON2_HUDSON2XHCIENVSERVICE_FILECODE       (0xB117)
-#define PROC_FCH_USB_FAMILY_HUDSON2_HUDSON2XHCIMIDSERVICE_FILECODE       (0xB118)
-#define PROC_FCH_USB_FAMILY_HUDSON2_HUDSON2XHCILATESERVICE_FILECODE      (0xB119)
-#define PROC_FCH_USB_XHCIRECOVERY_FILECODE                               (0xB12E)
-#define PROC_FCH_PCIE_GPPPORTINIT_FILECODE                               (0xB12F)
-#define PROC_FCH_SPI_FAMILY_YUBA_YUBALPCRESETSERVICE_FILECODE            (0xB160)
-#define UEFI_DXE_FCHDXE_FCHDXE_FILECODE                                  (0xB200)
-#define UEFI_DXE_FCHDXE_USBOC_FILECODE                                   (0xB201)
-#define UEFI_DXE_FCHDXEAUX_DXEGPIO_FILECODE                              (0xB202)
-#define UEFI_DXE_FCHDXEAUX_DXEGPIOREAD_FILECODE                          (0xB203)
-#define UEFI_DXE_FCHDXELPCCLKRUN_FCHDXELPCCLKRUN_FILECODE                (0xB204)
-#define UEFI_DXE_AMDFCHWHEA_AMDFCHWHEA_FILECODE                          (0xB210)
-#define UEFI_DXE_AMDFCHWHEA_AMDFCHWHEAEINJ_FILECODE                      (0xB211)
-#define UEFI_DXE_AMDFCHWHEA_AMDFCHWHEAHEST_FILECODE                      (0xB212)
-#define UEFI_DXE_FCHDXEAUX_DXEDISUSBPORT_FILECODE                        (0xB213)
-#define UEFI_DXE_FCHDXEAUX_DXEBOOTTIMER_FILECODE                         (0xB214)
-#define UEFI_DXE_FCHDXEAUX_DXEESATAPORT_FILECODE                         (0xB215)
-#define UEFI_DXE_AMDFCHHWM_AMDFCHHWM_FILECODE                            (0xB216)
-#define UEFI_DXE_AMDIGPUVGACONTROLDXE_AMDIGPUVGACONTROLDXE_FILECODE      (0xB218)
-#define UEFI_DXE_CF9RESET_CF9RESET_FILECODE                              (0xB220)
-#define UEFI_DXE_CF9RESET_IA32_IA32CF9RESET_FILECODE                     (0xB221)
-#define UEFI_DXE_CF9RESET_X64_X64CF9RESET_FILECODE                       (0xB222)
-#define UEFI_DXE_FCHDXEMMIO_FCHDXEMMIO_FILECODE                          (0xB223)
-#define UEFI_DXE_LEGACYINTERRUPT_LEGACYINTERRUPT_FILECODE                (0xB230)
-#define UEFI_DXE_FCHACPICS_FCHACPICS_FILECODE                            (0xB231)
-#define UEFI_DXE_FCHACPICS_FCHACPICSAML_FILECODE                         (0xB232)
-#define UEFI_DXE_FCHACPICS_FCHACPICSCONTROL_FILECODE                     (0xB233)
-#define UEFI_DXE_FCHACPICS_FUNCTIONS_POWERBUTTON_POWERBUTTON_FILECODE    (0xB234)
-#define UEFI_DXE_FCHACPICS_FUNCTIONS_SMBUSNFC_SMBUSNFC_FILECODE          (0xB235)
-#define UEFI_DXE_SMMCONTROL_SMMCONTROL_FILECODE                          (0xB240)
-#define UEFI_SMM_FCHSMMLIB_FCHDXECOMMON_FILECODE                         (0xB250)
-#define UEFI_SMM_FCHSMMLIB_FCHSMMLIB_FILECODE                            (0xB251)
-#define UEFI_DXE_FCHDXELIB_FCHDXELIB_FILECODE                            (0xB252)
-#define UEFI_PEI_FCHPEI_FCHPEI_FILECODE                                  (0xB260)
-#define UEFI_PEI_FCHPEI_FCHRESET_FILECODE                                (0xB261)
-#define UEFI_PEI_FCHPEI_FCHSTALL_FILECODE                                (0xB262)
-#define UEFI_DXE_FCHDXEAUX_FCHDXEAUX_FILECODE                            (0xB263)
-#define UEFI_PEI_FCHPEIAUX_FCHPEIAUX_FILECODE                            (0xB264)
-#define UEFI_PEI_FCHPEILIB_FCHPEILIB_FILECODE                            (0xB265)
-#define UEFI_PEI_FCHPEILIB_LIBAMDPEI_FILECODE                            (0xB266)
-#define UEFI_PEI_FCHPEIAUX_PEIGPIO_FILECODE                              (0xB267)
-#define UEFI_PEI_FCHPEIAUX_PEIGPIOREAD_FILECODE                          (0xB268)
-#define UEFI_PEI_FCHPEIAUX_PEIDISUSBPORT_FILECODE                        (0xB269)
-#define UEFI_PEI_FCHPEIAUX_PEIBOOTTIMER_FILECODE                         (0xB26A)
-#define UEFI_PEI_FCHPEIAUX_PEIOSCOUTCLOCK_FILECODE                       (0xB26B)
-#define UEFI_PEI_FCHPEI_FCHEHCIRECOVERY_FILECODE                         (0xB280)
-#define UEFI_PEI_FCHPEI_FCHSATARECOVERY_FILECODE                         (0xB281)
-#define UEFI_PEI_FCHPEI_FCHXHCIRECOVERY_FILECODE                         (0xB282)
-#define UEFI_PEI_FCHPEI_FCHGPPRECOVERY_FILECODE                          (0xB283)
-#define UEFI_PEI_SMBUS_SMBUS_FILECODE                                    (0xB28A)
-#define UEFI_SMM_FCHSMM_FCHSMM_FILECODE                                  (0xB290)
-#define UEFI_SMM_FCHSMMCOMPLEMENT_SDIOPOWER_SDIOPOWER_FILECODE                   (0xB291)
-#define UEFI_SMM_FCHSMMCOMPLEMENT_USB3PORTPROTECTWA_USB3PORTPROTECTWA_FILECODE   (0xB292)
-#define UEFI_SMM_FCHSMM_GPESMI_FILECODE                                  (0xB293)
-#define UEFI_SMM_FCHSMM_IOTRAPSMI_FILECODE                               (0xB294)
-#define UEFI_SMM_FCHSMM_MISCSMI_FILECODE                                 (0xB295)
-#define UEFI_SMM_FCHSMM_PERIODICTIMERSMI_FILECODE                        (0xB296)
-#define UEFI_SMM_FCHSMM_POWERBUTTONSMI_FILECODE                          (0xB297)
-#define UEFI_SMM_FCHSMM_SWSMI_FILECODE                                   (0xB298)
-#define UEFI_SMM_FCHSMM_SXSMI_FILECODE                                   (0xB299)
-#define UEFI_SMM_FCHSMMCOMPLEMENT_IMCCONTROL_IMCCONTROL_FILECODE         (0xB29A)
-#define UEFI_SMM_FCHSMMCOMPLEMENT_IMCCONTROL_IMCCONTROLLIB_FILECODE      (0xB29B)
-#define UEFI_SMM_FCHSMMCOMPLEMENT_USB3PORTPROTECTWA_LIBAMDSMMLIB_FILECODE        (0xB29C)
-#define UEFI_SMM_FCHSMMCOMPLEMENT_FCHPCIEWAKEWA_FCHPCIEWAKEWA_FILECODE        (0xB29D)
-#define UEFI_SMM_FCHSMMCOMPLEMENT_SDCLKDRIVINGLOWWA_SDCLKDRIVINGLOWWA_FILECODE   (0xB29E)
-#define UEFI_SMM_FCHSMMCOMPLEMENT_FCHSDVOLTAGESWITCH_FCHSDVOLTAGESWITCH_FILECODE (0xB29F)
-#define UEFI_DXE_SMBUS_SMBUSLIGHT_FILECODE                               (0xB2A0)
-#define UEFI_SMM_FCHSMMCOMPLEMENT_FCHIMCSPIWA_FCHIMCSPIWA_FILECODE       (0xB2A1)
-#define UEFI_SMM_FCHSMMCOMPLEMENT_FCHXHCD3WA_FCHXHCD3WA_FILECODE         (0xB2A2)
-#define UEFI_SMM_FCHSMMDISPATCHER_FCHSMMDISPATCHER_FILECODE              (0xB2B0)
-#define UEFI_SMM_FCHSMMDISPATCHER_FCHSMMGPEDISPATCHER_FCHSMMGPEDISPATCHER_FILECODE        (0xB2B1)
-#define UEFI_SMM_FCHSMMDISPATCHER_FCHSMMIOTRAPDISPATCHER_FCHSMMIOTRAPDISPATCHER_FILECODE  (0xB2B2)
-#define UEFI_SMM_FCHSMMDISPATCHER_FCHSMMMISCDISPATCHER_FCHSMMMISCDISPATCHER_FILECODE      (0xB2B3)
-#define UEFI_SMM_FCHSMMDISPATCHER_FCHSMMPERIODICALDISPATCHER_FCHSMMPERIODICALDISPATCHER_FILECODE (0xB2B4)
-#define UEFI_SMM_FCHSMMDISPATCHER_FCHSMMPWRBTNDISPATCHER_FCHSMMPWRBTNDISPATCHER_FILECODE  (0xB2B5)
-#define UEFI_SMM_FCHSMMDISPATCHER_FCHSMMSWDISPATCHER_FCHSMMSWDISPATCHER_FILECODE          (0xB2B6)
-#define UEFI_SMM_FCHSMMDISPATCHER_FCHSMMSXDISPATCHER_FCHSMMSXDISPATCHER_FILECODE          (0xB2B7)
-#define UEFI_SMM_FCHSMMDISPATCHER_FCHSMMUSBDISPATCHER_FCHSMMUSBDISPATCHER_FILECODE        (0xB2B8)
-#define PROC_FCH_PCIE_GPPALLINONE_FILECODE                               (0xB2C0)
-#define UEFI_SMM_MEMSMMLIB_MEMSMMLIB_FILECODE                             (0xB2C1)
-#define UEFI_SMM_MEMSMMLIB_KV_DRAMMAPKV_FILECODE                          (0xB2C3)
-
-#define LIB_AMDLIB_FILECODE                                              (0xC001)
-
-#define LEGACY_PROC_AGESACALLOUTS_FILECODE                               (0xC010)
-#define LEGACY_PROC_HOBTRANSFER_FILECODE                                 (0xC011)
-#define LEGACY_PROC_DISPATCHER_FILECODE                                  (0xC012)
-
-#define UEFI_DXE_AMDAGESADXEDRIVER_AMDAGESADXEDRIVER_FILECODE            (0xC120)
-
-#define UEFI_PEI_AMDINITPOSTPEIM_AMDINITPOSTPEIM_FILECODE                (0xC140)
-#define UEFI_PEI_AMDPROCESSORINITPEIM_AMDPROCESSORINITPEIM_FILECODE      (0xC141)
-#define UEFI_PEI_AMDRESETMANAGER_AMDRESETMANAGER_FILECODE                (0xC142)
-#define UEFI_PROC_COMMON_HOBTRANSFERUEFI_FILECODE                        (0xC160)
-#define UEFI_PROC_DXE_HOBTRANSFERUEFIDXE_FILECODE                        (0xC161)
-#define UEFI_PROC_PEI_HOBTRANSFERUEFIPEI_FILECODE                        (0xC162)
-
-#define PROC_COMMON_AMDINITEARLY_FILECODE                                (0xC020)
-#define PROC_COMMON_AMDINITENV_FILECODE                                  (0xC021)
-#define PROC_COMMON_AMDINITLATE_FILECODE                                 (0xC022)
-#define PROC_COMMON_AMDINITMID_FILECODE                                  (0xC023)
-#define PROC_COMMON_AMDINITPOST_FILECODE                                 (0xC024)
-#define PROC_COMMON_AMDINITRECOVERY_FILECODE                             (0xC025)
-#define PROC_COMMON_AMDINITRESET_FILECODE                                (0xC026)
-#define PROC_COMMON_AMDINITRESUME_FILECODE                               (0xC027)
-#define PROC_COMMON_AMDS3LATERESTORE_FILECODE                            (0xC028)
-#define PROC_COMMON_AMDS3SAVE_FILECODE                                   (0xC029)
-#define PROC_COMMON_AMDLATERUNAPTASK_FILECODE                            (0xC02A)
-#define PROC_COMMON_AMDS3FINALRESTORE_FILECODE                           (0xC02B)
-
-#define PROC_COMMON_COMMONRETURNS_FILECODE                               (0xC0C0)
-#define PROC_COMMON_CREATESTRUCT_FILECODE                                (0xC0D0)
-#define PROC_COMMON_COMMONINITS_FILECODE                                 (0xC0F0)
-#define PROC_COMMON_S3RESTORESTATE_FILECODE                              (0xC0F8)
-#define PROC_COMMON_S3SAVESTATE_FILECODE                                 (0xC0F9)
-
-#define PROC_CPU_CPUAPICUTILITIES_FILECODE                               (0xC401)
-#define PROC_CPU_TABLE_FILECODE                                          (0xC403)
-#define PROC_CPU_CPUEARLYINIT_FILECODE                                   (0xC405)
-#define PROC_CPU_CPUEVENTLOG_FILECODE                                    (0xC406)
-#define PROC_CPU_CPUFAMILYTRANSLATION_FILECODE                           (0xC407)
-#define PROC_CPU_CPUGENERALSERVICES_FILECODE                             (0xC408)
-#define PROC_CPU_CPULATEINIT_FILECODE                                    (0xC40A)
-#define PROC_CPU_CPUMICROCODEPATCH_FILECODE                              (0xC40B)
-#define PROC_CPU_CPUWARMRESET_FILECODE                                   (0xC40C)
-#define PROC_CPU_HEAPMANAGER_FILECODE                                    (0xC40D)
-#define PROC_CPU_CPUBIST_FILECODE                                        (0xC40E)
-#define PROC_CPU_MMIOMAPMANAGER_FILECODE                                 (0xC40F)
-
-#define PROC_CPU_CPUPOSTINIT_FILECODE                                    (0xC420)
-#define PROC_CPU_CPUPOWERMGMT_FILECODE                                   (0xC430)
-#define PROC_CPU_CPUPOWERMGMTMULTISOCKET_FILECODE                        (0xC431)
-#define PROC_CPU_CPUPOWERMGMTSINGLESOCKET_FILECODE                       (0xC432)
-#define PROC_CPU_S3_FILECODE                                             (0xC460)
-
-// Family 15h
-#define PROC_CPU_FAMILY_0X15_CPUCOMMONF15UTILITIES_FILECODE              (0xCB01)
-#define PROC_CPU_FAMILY_0X15_CPUF15BRANDID_FILECODE                      (0xCB02)
-#define PROC_CPU_FAMILY_0X15_CPUF15CACHEDEFAULTS_FILECODE                (0xCB03)
-#define PROC_CPU_FAMILY_0X15_CPUF15DMI_FILECODE                          (0xCB04)
-#define PROC_CPU_FAMILY_0X15_CPUF15MSRTABLES_FILECODE                    (0xCB05)
-#define PROC_CPU_FAMILY_0X15_CPUF15PCITABLES_FILECODE                    (0xCB06)
-#define PROC_CPU_FAMILY_0X15_CPUF15POWERCHECK_FILECODE                   (0xCB07)
-#define PROC_CPU_FAMILY_0X15_CPUF15UTILITIES_FILECODE                    (0xCB08)
-#define PROC_CPU_FAMILY_0X15_CPUF15WHEAINITDATATABLES_FILECODE           (0xCB09)
-#define PROC_CPU_FAMILY_0X15_CPUF15APM_FILECODE                          (0xCB0A)
-#define PROC_CPU_FAMILY_0X15_CPUF15CRAT_FILECODE                         (0xCB0B)
-#define PROC_CPU_FAMILY_0X15_CPUF15MMIOMAP_FILECODE                      (0xCB0C)
-#define PROC_CPU_FAMILY_0X15_CPUF15PREFETCHMODE_FILECODE                 (0xCB0D)
-
-#define PROC_CPU_FAMILY_0X15_TN_CPUF15TNCOREAFTERRESET_FILECODE          (0xCB50)
-#define PROC_CPU_FAMILY_0X15_TN_CPUF15TNDMI_FILECODE                     (0xCB51)
-#define PROC_CPU_FAMILY_0X15_TN_CPUF15TNNBAFTERRESET_FILECODE            (0xCB52)
-#define PROC_CPU_FAMILY_0X15_TN_CPUF15TNPSTATE_FILECODE                  (0xCB53)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNLOGICALIDTABLES_FILECODE            (0xCB54)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNMICROCODEPATCHTABLES_FILECODE       (0xCB55)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNMSRTABLES_FILECODE                  (0xCB56)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNSHAREDMSRTABLE_FILECODE             (0xCB57)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNEQUIVALENCETABLE_FILECODE           (0xCB58)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNPCITABLES_FILECODE                  (0xCB59)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNPOWERMGMTSYSTEMTABLES_FILECODE      (0xCB5A)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNPOWERPLANE_FILECODE                 (0xCB5B)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNUTILITIES_FILECODE                  (0xCB5C)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNC6STATE_FILECODE                    (0xCB5D)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNCPB_FILECODE                        (0xCB5E)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNIOCSTATE_FILECODE                   (0xCB5F)
-#define PROC_CPU_FAMILY_0X15_TN_CPUF15TNCACHEFLUSHONHALT_FILECODE        (0xCB60)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNINITEARLYTABLE_FILECODE             (0xCB62)
-#define PROC_CPU_FAMILY_0X15_TN_F15TNEARLYSAMPLES_FILECODE               (0xCB63)
-#define PROC_CPU_FAMILY_0X15_TN_CPUF15TNPOWERCHECK_FILECODE              (0xCB64)
-#define PROC_CPU_FAMILY_0X15_TN_CPUF15TNPSI_FILECODE                     (0xCB65)
-#define PROC_CPU_FAMILY_0X15_TN_CPUF15TNHTC_FILECODE                     (0xCB66)
-
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVCOREAFTERRESET_FILECODE          (0xCBE0)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVDMI_FILECODE                     (0xCBE1)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVNBAFTERRESET_FILECODE            (0xCBE2)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVPSTATE_FILECODE                  (0xCBE3)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVLOGICALIDTABLES_FILECODE         (0xCBE4)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVMICROCODEPATCHTABLES_FILECODE    (0xCBE5)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVMSRTABLES_FILECODE               (0xCBE6)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVSHAREDMSRTABLE_FILECODE          (0xCBE7)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVEQUIVALENCETABLE_FILECODE        (0xCBE8)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVPCITABLES_FILECODE               (0xCBE9)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVPOWERMGMTSYSTEMTABLES_FILECODE   (0xCBEA)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVBRANDID_FILECODE                 (0xCBEB)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVUTILITIES_FILECODE               (0xCBEC)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVC6STATE_FILECODE                 (0xCBED)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVCPB_FILECODE                     (0xCBEE)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVIOCSTATE_FILECODE                (0xCBEF)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVCACHEFLUSHONHALT_FILECODE        (0xCBF0)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVHTC_FILECODE                     (0xCBF1)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVINITEARLYTABLE_FILECODE          (0xCBF2)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVEARLYSAMPLES_FILECODE            (0xCBF3)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVPOWERCHECK_FILECODE              (0xCBF4)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVPSI_FILECODE                     (0xCBF5)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVSCS_FILECODE                     (0xCBF6)
-#define PROC_CPU_FAMILY_0X15_KV_CPUF15KVCC6EXITCONTROL_FILECODE          (0xCBF7)
-
-#define PROC_CPU_FEATURE_CPUCACHEFLUSHONHALT_FILECODE                    (0xDC01)
-#define PROC_CPU_FEATURE_CPUCACHEINIT_FILECODE                           (0xDC02)
-#define PROC_CPU_FEATURE_CPUDMI_FILECODE                                 (0xDC10)
-#define PROC_CPU_FEATURE_CPUPSTATEGATHER_FILECODE                        (0xDC41)
-#define PROC_CPU_FEATURE_CPUPSTATELEVELING_FILECODE                      (0xDC42)
-#define PROC_CPU_FEATURE_CPUPSTATETABLES_FILECODE                        (0xDC43)
-#define PROC_CPU_FEATURE_CPUSLIT_FILECODE                                (0xDC50)
-#define PROC_CPU_FEATURE_CPUSRAT_FILECODE                                (0xDC60)
-#define PROC_CPU_FEATURE_CPUWHEA_FILECODE                                (0xDC70)
-#define PROC_CPU_FEATURE_CPUC6STATE_FILECODE                             (0xDC82)
-#define PROC_CPU_FEATURE_CPUCPB_FILECODE                                 (0xDC83)
-#define PROC_CPU_FEATURE_CPULOWPWRPSTATE_FILECODE                        (0xDC84)
-#define PROC_CPU_FEATURE_CPUIOCSTATE_FILECODE                            (0xDC85)
-#define PROC_CPU_FEATURE_CPUAPM_FILECODE                                 (0xDC86)
-#define PROC_CPU_FEATURE_CPUFEATURES_FILECODE                            (0xDC90)
-#define PROC_CPU_FEATURE_CPUCORELEVELING_FILECODE                        (0xDCB0)
-#define PROC_CPU_FEATURE_CPUPSI_FILECODE                                 (0xDCC0)
-#define PROC_CPU_FEATURE_CPUHTC_FILECODE                                 (0xDCC1)
-#define PROC_CPU_FEATURE_CPUCRAT_FILECODE                                (0xDCD0)
-#define PROC_CPU_FEATURE_CPUCDIT_FILECODE                                (0xDCD1)
-#define PROC_CPU_FEATURE_CPUPREFETCHMODE_FILECODE                        (0xDCD3)
-#define PROC_CPU_FEATURE_CPUSCS_FILECODE                                 (0xDCD4)
-#define PROC_CPU_FEATURE_CPUCC6EXITCONTROL_FILECODE                      (0xDCD5)
-
-#define PROC_RECOVERY_CPU_CPURECOVERY_FILECODE                           (0xDE01)
-
-#define PROC_TOPOLOGY_TOPOMAIN_FILECODE                                  (0xE001)
-#define PROC_TOPOLOGY_TOPONB_FILECODE                                    (0xE002)
-#define PROC_TOPOLOGY_FAM15_TOPONBFAM15_FILECODE                         (0xE087)
-#define PROC_TOPOLOGY_FAM15_TOPONBUTILITIESFAM15_FILECODE                (0xE088)
-#define PROC_TOPOLOGY_FAM16_TOPONBFAM16_FILECODE                         (0xE097)
-#define PROC_TOPOLOGY_FAM16_TOPONBUTILITIESFAM16_FILECODE                (0xE098)
-
-#define PROC_RECOVERY_TOPOLOGY_TOPOINITRECOVERY_FILECODE                 (0xE0FF)
-
-#define PROC_IDS_CONTROL_IDSCTRL_FILECODE                                (0xE801)
-#define PROC_IDS_LIBRARY_IDSLIB_FILECODE                                 (0xE802)
-#define PROC_IDS_DEBUG_IDSDEBUG_FILECODE                                 (0xE803)
-#define PROC_IDS_PERF_IDSPERF_FILECODE                                   (0xE804)
-#define PROC_IDS_FAMILY_0X15_IDSF15ALLSERVICE_FILECODE                   (0xE80C)
-#define PROC_IDS_FAMILY_0X15_TN_IDSF15TNALLSERVICE_FILECODE              (0xE80F)
-#define PROC_IDS_LIBRARY_IDSREGACC_FILECODE                              (0xE810)
-#define PROC_IDS_DEBUG_IDSDPHDTOUT_FILECODE                              (0xE811)
-#define PROC_IDS_DEBUG_IDSDEBUGPRINT_FILECODE                            (0xE812)
-#define PROC_IDS_DEBUG_IDSDPSERIAL_FILECODE                              (0xE813)
-#define PROC_IDS_DEBUG_IDSDPREDIRECTIO_FILECODE                          (0xE814)
-#define PROC_IDS_DEBUG_IDSDPRAM_FILECODE                                 (0xE815)
-
-#define PROC_IDS_DEBUG_IDSIDTTABLE_FILECODE                              (0xE81E)
-#define PROC_IDS_CONTROL_IDSNVTOCMOS_FILECODE                            (0xE81F)
-#define PROC_IDS_FAMILY_0X15_KV_IDSF15KVALLSERVICE_FILECODE              (0xE820)
-
-///0xE820 ~ 0xE840 is reserved for ids extend module
-
-#define PROC_MEM_ARDK_MA_FILECODE                                    (0xF001)
-
-#define PROC_MEM_FEAT_CHINTLV_MFCHI_FILECODE                         (0xF081)
-#define PROC_MEM_FEAT_CSINTLV_MFCSI_FILECODE                         (0xF082)
-#define PROC_MEM_FEAT_ECC_MFECC_FILECODE                             (0xF083)
-#define PROC_MEM_FEAT_ECC_MFEMP_FILECODE                             (0xF085)
-#define PROC_MEM_FEAT_EXCLUDIMM_MFDIMMEXCLUD_FILECODE                (0xF086)
-#define PROC_MEM_FEAT_IDENDIMM_MFIDENDIMM_FILECODE                   (0xF088)
-#define PROC_MEM_FEAT_INTLVRN_MFINTLVRN_FILECODE                     (0xF089)
-#define PROC_MEM_FEAT_LVDDR3_MFLVDDR3_FILECODE                       (0xF08A)
-#define PROC_MEM_FEAT_MEMCLR_MFMEMCLR_FILECODE                       (0xF08B)
-#define PROC_MEM_FEAT_NDINTLV_MFNDI_FILECODE                         (0xF08C)
-#define PROC_MEM_FEAT_ODTHERMAL_MFODTHERMAL_FILECODE                 (0xF08D)
-#define PROC_MEM_FEAT_OLSPARE_MFSPR_FILECODE                         (0xF08E)
-#define PROC_MEM_FEAT_PARTRN_MFPARALLELTRAINING_FILECODE             (0xF08F)
-#define PROC_MEM_FEAT_PARTRN_MFSTANDARDTRAINING_FILECODE             (0xF091)
-#define PROC_MEM_FEAT_S3_MFS3_FILECODE                               (0xF092)
-#define PROC_MEM_FEAT_TABLE_MFTDS_FILECODE                           (0xF093)
-#define PROC_MEM_FEAT_CHINTLV_MFMCHI_FILECODE                        (0xF094)
-#define PROC_MEM_FEAT_CRAT_MFCRAT_FILECODE                           (0xF095)
-#define PROC_MEM_FEAT_AMP_MFAMP_FILECODE                             (0xF096)
-#define PROC_MEM_FEAT_DATAEYE_MF2DDATAEYE_FILECODE                   (0xF097)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFWRDAT2DTRAINING_FILECODE         (0xF098)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFRDWR2DEYERIMSEARCH_FILECODE      (0xF099)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFRDDQS2DTRAINING_FILECODE         (0xF09A)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFRDWR2DTRAINING_FILECODE          (0xF09B)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFRDWR2DPATTERNGENERATION_FILECODE (0xF09C)
-#define PROC_MEM_FEAT_AGGRESSOR_MFAGGRESSOR_FILECODE                    (0xF09F)
-#define PROC_MEM_FEAT_DLLPDBYPASS_MFDLLPDBYPASS_FILECODE                (0xF0A0)
-
-#define PROC_MEM_MAIN_MDEF_FILECODE                                  (0xF101)
-#define PROC_MEM_MAIN_MINIT_FILECODE                                 (0xF102)
-#define PROC_MEM_MAIN_MM_FILECODE                                    (0xF103)
-#define PROC_MEM_FEAT_DMI_MFDMI_FILECODE                             (0xF104)
-#define PROC_MEM_MAIN_MMECC_FILECODE                                 (0xF105)
-#define PROC_MEM_MAIN_MMEXCLUDEDIMM_FILECODE                         (0xF106)
-#define PROC_MEM_MAIN_MMNODEINTERLEAVE_FILECODE                      (0xF10B)
-#define PROC_MEM_MAIN_MMONLINESPARE_FILECODE                         (0xF10C)
-#define PROC_MEM_MAIN_MMPARALLELTRAINING_FILECODE                    (0xF10D)
-#define PROC_MEM_MAIN_MMSTANDARDTRAINING_FILECODE                    (0xF10E)
-#define PROC_MEM_MAIN_MUC_FILECODE                                   (0xF10F)
-#define PROC_MEM_MAIN_MMMEMCLR_FILECODE                              (0xF110)
-#define PROC_MEM_MAIN_MMFLOW_FILECODE                                (0xF112)
-#define PROC_MEM_MAIN_MERRHDL_FILECODE                               (0xF113)
-#define PROC_MEM_MAIN_MMLVDDR3_FILECODE                              (0xF115)
-#define PROC_MEM_MAIN_MMUMAALLOC_FILECODE                            (0xF116)
-#define PROC_MEM_MAIN_MMMEMRESTORE_FILECODE                          (0xF117)
-#define PROC_MEM_MAIN_MMCONDITIONALPSO_FILECODE                      (0xF118)
-#define PROC_MEM_MAIN_MMAGGRESSOR_FILECODE                           (0xF119)
-#define PROC_MEM_MAIN_TN_MMFLOWTN_FILECODE                           (0xF11C)
-#define PROC_MEM_MAIN_KV_MMFLOWD3KV_FILECODE                         (0xF122)
-
-#define PROC_MEM_NB_MN_FILECODE                                      (0XF27C)
-#define PROC_MEM_NB_MNDCT_FILECODE                                   (0XF27D)
-#define PROC_MEM_NB_MNPHY_FILECODE                                   (0XF27E)
-#define PROC_MEM_NB_MNMCT_FILECODE                                   (0XF27F)
-#define PROC_MEM_NB_MNS3_FILECODE                                    (0XF280)
-#define PROC_MEM_NB_MNFLOW_FILECODE                                  (0XF281)
-#define PROC_MEM_NB_MNFEAT_FILECODE                                  (0XF282)
-#define PROC_MEM_NB_MNTRAIN3_FILECODE                                (0XF284)
-#define PROC_MEM_NB_MNREG_FILECODE                                   (0XF285)
-#define PROC_MEM_NB_TN_MNREGTN_FILECODE                              (0XF29B)
-#define PROC_MEM_NB_TN_MNTN_FILECODE                                 (0XF29C)
-#define PROC_MEM_NB_TN_MNMCTTN_FILECODE                              (0XF29D)
-#define PROC_MEM_NB_TN_MNOTTN_FILECODE                               (0XF29E)
-#define PROC_MEM_NB_TN_MNDCTTN_FILECODE                              (0XF29F)
-#define PROC_MEM_NB_TN_MNPHYTN_FILECODE                              (0XF2A0)
-#define PROC_MEM_NB_TN_MNS3TN_FILECODE                               (0XF2A1)
-#define PROC_MEM_NB_TN_MNIDENDIMMTN_FILECODE                         (0XF2A2)
-#define PROC_MEM_NB_TN_MNFLOWTN_FILECODE                             (0XF2A3)
-#define PROC_MEM_NB_TN_MNPROTOTN_FILECODE                            (0XF2A4)
-#define PROC_MEM_NB_KV_MNKV_FILECODE                                 (0xF2AF)
-#define PROC_MEM_NB_KV_MNMCTKV_FILECODE                              (0xF2B0)
-#define PROC_MEM_NB_KV_MNDCTKV_FILECODE                              (0xF2B1)
-#define PROC_MEM_NB_KV_MNPHYKV_FILECODE                              (0xF2B2)
-#define PROC_MEM_NB_KV_MNS3KV_FILECODE                               (0xF2B3)
-#define PROC_MEM_NB_KV_MNIDENDIMMKV_FILECODE                         (0xF2B4)
-#define PROC_MEM_NB_KV_MNPROTOKV_FILECODE                            (0xF2B5)
-#define PROC_MEM_NB_KV_MNREGKV_FILECODE                              (0xF2B6)
-#define PROC_MEM_NB_MNPMU_FILECODE                                   (0xF2B7)
-#define PROC_MEM_NB_KV_MNPMUKV_FILECODE                              (0XF2C2)
-#define PROC_MEM_NB_KV_MNPMUSRAMMSGBLOCKKV_FILECODE                  (0XF2D7)
-
-#define PROC_MEM_PS_MP_FILECODE                                      (0XF401)
-#define PROC_MEM_PS_MPRTT_FILECODE                                   (0XF422)
-#define PROC_MEM_PS_MPMAXFREQ_FILECODE                               (0XF423)
-#define PROC_MEM_PS_MPODTPAT_FILECODE                                (0XF424)
-#define PROC_MEM_PS_MPSAO_FILECODE                                   (0XF425)
-#define PROC_MEM_PS_MPMR0_FILECODE                                   (0XF426)
-#define PROC_MEM_PS_MPRC2IBT_FILECODE                                (0XF427)
-#define PROC_MEM_PS_MPRC10OPSPD_FILECODE                             (0XF428)
-#define PROC_MEM_PS_MPLRIBT_FILECODE                                 (0XF429)
-#define PROC_MEM_PS_MPLRNPR_FILECODE                                 (0XF42A)
-#define PROC_MEM_PS_MPLRNLR_FILECODE                                 (0XF42B)
-#define PROC_MEM_PS_TN_MPSTN3_FILECODE                               (0XF42D)
-#define PROC_MEM_PS_TN_MPTN3_FILECODE                                (0XF42E)
-#define PROC_MEM_PS_TN_MPUTN3_FILECODE                               (0XF42F)
-#define PROC_MEM_PS_TN_FM2_MPUTNFM2_FILECODE                         (0XF430)
-#define PROC_MEM_PS_TN_FP2_MPSTNFP2_FILECODE                         (0XF431)
-#define PROC_MEM_PS_TN_FS1_MPSTNFS1_FILECODE                         (0XF432)
-#define PROC_MEM_PS_MPS2D_FILECODE                                   (0XF436)
-#define PROC_MEM_PS_MPSEEDS_FILECODE                                 (0XF437)
-#define PROC_MEM_PS_MPCADCFG_FILECODE                                (0XF43C)
-#define PROC_MEM_PS_MPDATACFG_FILECODE                               (0XF43D)
-#define PROC_MEM_PS_KV_MPKV3_FILECODE                                (0XF43E)
-#define PROC_MEM_PS_KV_MPSKV3_FILECODE                               (0XF43F)
-#define PROC_MEM_PS_KV_MPUKV3_FILECODE                               (0XF440)
-
-#define PROC_MEM_TECH_MT_FILECODE                                    (0XF501)
-#define PROC_MEM_TECH_MTHDI_FILECODE                                 (0XF502)
-#define PROC_MEM_TECH_MTTDIMBT_FILECODE                              (0XF504)
-#define PROC_MEM_TECH_MTTECC_FILECODE                                (0XF505)
-#define PROC_MEM_TECH_MTTHRC_FILECODE                                (0XF506)
-#define PROC_MEM_TECH_MTTML_FILECODE                                 (0XF507)
-#define PROC_MEM_TECH_MTTOPTSRC_FILECODE                             (0XF509)
-#define PROC_MEM_TECH_MTTSRC_FILECODE                                (0XF50B)
-#define PROC_MEM_TECH_MTTEDGEDETECT_FILECODE                         (0XF50C)
-#define PROC_MEM_TECH_DDR3_MT3_FILECODE                              (0XF581)
-#define PROC_MEM_TECH_DDR3_MTOT3_FILECODE                            (0XF583)
-#define PROC_MEM_TECH_DDR3_MTRCI3_FILECODE                           (0XF584)
-#define PROC_MEM_TECH_DDR3_MTSDI3_FILECODE                           (0XF585)
-#define PROC_MEM_TECH_DDR3_MTSPD3_FILECODE                           (0XF586)
-#define PROC_MEM_TECH_DDR3_MTTWL3_FILECODE                           (0XF587)
-#define PROC_MEM_TECH_DDR3_MTTECC3_FILECODE                          (0XF588)
-#define PROC_MEM_TECH_DDR3_MTLRDIMM3_FILECODE                        (0XF589)
-#define PROC_MEM_TECH_MTTHRCSEEDTRAIN_FILECODE                       (0XF58A)
-#define PROC_MEM_TECH_MTTRDDQS2DTRAINING_FILECODE                    (0XF58B)
-#define PROC_MEM_TECH_MTTRDDQS2DEYERIMSEARCH_FILECODE                (0XF58C)
-#define PROC_MEM_TECH_GDDR5_MNSPDG5_FILECODE                         (0XF58E)
-#define PROC_MEM_TECH_GDDR5_MNDCTG5_FILECODE                         (0xF58F)
-
-#define PROC_RECOVERY_MEM_MRDEF_FILECODE                             (0XF801)
-#define PROC_RECOVERY_MEM_MRINIT_FILECODE                            (0XF802)
-#define PROC_RECOVERY_MEM_MRM_FILECODE                               (0XF803)
-#define PROC_RECOVERY_MEM_MRUC_FILECODE                              (0XF804)
-#define PROC_RECOVERY_MEM_TECH_MRTTPOS_FILECODE                      (0XF8C1)
-#define PROC_RECOVERY_MEM_TECH_MRTTSRC_FILECODE                      (0XF8C2)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRT3_FILECODE                    (0XF8C3)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRTRCI3_FILECODE                 (0XF8C4)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRTSDI3_FILECODE                 (0XF8C5)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRTSPD3_FILECODE                 (0XF8C6)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRTTWL3_FILECODE                 (0XF8C7)
-#define PROC_RECOVERY_MEM_NB_MRN_FILECODE                            (0XF8C8)
-#define PROC_RECOVERY_MEM_NB_MRNDCT_FILECODE                         (0XF8C9)
-#define PROC_RECOVERY_MEM_NB_MRNMCT_FILECODE                         (0XF8CA)
-#define PROC_RECOVERY_MEM_NB_MRNTRAIN3_FILECODE                      (0XF8CB)
-#define PROC_RECOVERY_MEM_TECH_MRTTHRC_FILECODE                      (0XF8CC)
-#define PROC_RECOVERY_MEM_PS_MRP_FILECODE                            (0XF8E0)
-#define PROC_RECOVERY_MEM_PS_MRPRTT_FILECODE                         (0XF8E1)
-#define PROC_RECOVERY_MEM_PS_MRPODTPAT_FILECODE                      (0XF8E2)
-#define PROC_RECOVERY_MEM_PS_MRPSAO_FILECODE                         (0XF8E3)
-#define PROC_RECOVERY_MEM_PS_MRPMR0_FILECODE                         (0XF8E4)
-#define PROC_RECOVERY_MEM_PS_MRPRC2IBT_FILECODE                      (0XF8E5)
-#define PROC_RECOVERY_MEM_PS_MRPRC10OPSPD_FILECODE                   (0XF8E6)
-#define PROC_RECOVERY_MEM_PS_MRPLRIBT_FILECODE                       (0XF8E7)
-#define PROC_RECOVERY_MEM_PS_MRPLRNPR_FILECODE                       (0XF8E8)
-#define PROC_RECOVERY_MEM_PS_MRPLRNLR_FILECODE                       (0XF8E9)
-#define PROC_RECOVERY_MEM_NB_TN_MRNDCTTN_FILECODE                    (0XF8F3)
-#define PROC_RECOVERY_MEM_NB_TN_MRNTN_FILECODE                       (0XF8F4)
-#define PROC_RECOVERY_MEM_NB_TN_MRNMCTTN_FILECODE                    (0XF8F5)
-#define PROC_RECOVERY_MEM_NB_TN_MRNPROTOTN_FILECODE                  (0XF8F6)
-#define PROC_RECOVERY_MEM_PS_TN_MRPSTN3_FILECODE                     (0XF8F7)
-#define PROC_RECOVERY_MEM_PS_TN_MRPTN3_FILECODE                      (0XF8F8)
-#define PROC_RECOVERY_MEM_PS_TN_MRPUTN3_FILECODE                     (0XF8F9)
-#define PROC_RECOVERY_MEM_TECH_MRTTHRCSEEDTRAIN_FILECODE             (0XF8FA)
-
-//Psp
-#define UEFI_PSP_DRIVERS_ITPMDXE_ITPMDXE_FILECODE                    (0xFA00)
-#define UEFI_PSP_DRIVERS_ITPMPEI_ITPMPEI_FILECODE                    (0xFA01)
-#define UEFI_PSP_DRIVERS_ITPMSMM_ITPMPSPCOMMAND_FILECODE             (0xFA02)
-#define UEFI_PSP_DRIVERS_ITPMSMM_ITPMSMM_FILECODE                    (0xFA03)
-#define UEFI_PSP_DRIVERS_PSPPEI_PSPPEI_FILECODE                      (0xFA04)
-#define UEFI_PSP_DRIVERS_PSPSMM_PSPRESUMEHANDLING_FILECODE           (0xFA05)
-#define UEFI_PSP_DRIVERS_PSPSMM_PSPRESUMESERVICES_FILECODE           (0xFA06)
-#define UEFI_PSP_DRIVERS_PSPSMM_PSPSMM_FILECODE                      (0xFA07)
-#define UEFI_PSP_LIBRARY_PSPBASELIB_PSPBASELIB_FILECODE              (0xFA08)
-#define UEFI_PSP_LIBRARY_PSPMBOX_PSPMBOX_FILECODE                    (0xFA09)
-#define UEFI_PSP_LIBRARY_SMMLOAD_SMMLOAD_FILECODE                    (0xFA0A)
-#define UEFI_PSP_DRIVERS_PSPDXE_PSPDXE_FILECODE                      (0xFA0B)
-#define UEFI_PSP_LIBRARY_PSPFTPMLIB_PSPFTPMLIB_FILECODE              (0xFA0C)
-#define UEFI_PSP_LIBRARY_CCPSHALIB_CCPSHALIB_FILECODE                (0xFA0D)
-
-#endif // _FILECODE_H_

pi/amd/00630F01/Include/Ids.h

diff --git a/pi/amd/00630F01/Include/Ids.h b/pi/amd/00630F01/Include/Ids.h
deleted file mode 100644
index a0bc8ed..0000000
--- a/pi/amd/00630F01/Include/Ids.h
+++ /dev/null
@@ -1,1428 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD IDS Routines
- *
- * Contains AMD AGESA Integrated Debug Macros
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright 2008 - 2014 ADVANCED MICRO DEVICES, INC.  All Rights Reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-  /* Macros to aid debugging */
-  /* These definitions expand to zero (0) bytes of code when disabled */
-
-#ifndef _IDS_H_
-#define _IDS_H_
-
-#undef FALSE
-#undef TRUE
-#define FALSE 0
-#define TRUE  1
-// Proto type for optionsids.h
-typedef UINT32 IDS_STATUS;  ///< Status of IDS function.
-#define IDS_SUCCESS         ((IDS_STATUS) 0x00000000ul) ///< IDS Function is Successful.
-#define IDS_UNSUPPORTED     ((IDS_STATUS) 0xFFFFFFFFul) ///< IDS Function is not existed.
-
-#define IDS_STRINGIZE(a) #a ///< for define stringize macro
-#ifndef IDS_DEADLOOP
-  #define IDS_DEADLOOP()    { volatile UINTN __i; __i = 1; while (__i); }
-#endif
-/**
- *  IDS Option Hook Points
- *
- *  These are the values to indicate hook point in AGESA for IDS Options.
- *
- */
-typedef enum {                        //vv- for debug reference only
-  IDS_INIT_EARLY_BEFORE,              ///< 00 Option Hook Point before AGESA function AMD_INIT_EARLY.
-                                          ///<   IDS Object is initialized.
-                                          ///<   Override CPU Core Leveling Mode.
-                                          ///<   Set P-State in Post
-  IDS_INIT_EARLY_AFTER,               ///< 01 Option Hook Point after AGESA function AMD_INIT_EARLY.
-  IDS_INIT_LATE_BEFORE,               ///< 02 Option Hook Point before AGESA function AMD_INIT_LATE.
-                                          ///< It will be used to control the following tables.
-                                          ///<   ACPI P-State Table (_PSS, XPSS, _PCT, _PSD, _PPC)
-                                          ///<   ACPI SRAT Table
-                                          ///<   ACPI SLIT Table
-                                          ///<   ACPI WHEA Table
-                                          ///<   DMI Table
-  IDS_INIT_LATE_AFTER,                ///< 03 Option Hook Point after AGESA function AMD_INIT_LATE.
-  IDS_INIT_MID_BEFORE,                ///< 04 Option Hook Point before AGESA function AMD_INIT_MID.
-  IDS_INIT_MID_AFTER,                 ///< 05 Option Hook Point after AGESA function AMD_INIT_MID.
-  IDS_INIT_POST_BEFORE,               ///< 06 Option Hook Point before AGESA function AMD_INIT_POST.
-                                          ///<   Control Interleaving and DRAM memory hole
-                                          ///<   Override the setting of ECC Control
-                                          ///<   Override the setting of Online Spare Rank
-  IDS_INIT_POST_AFTER,                ///< 07 Option Hook Point after AGESA function AMD_INIT_POST.
-  IDS_INIT_RESET_BEFORE,              ///< 08 Option Hook Point before AGESA function AMD_INIT_RESET.
-  IDS_INIT_RESET_AFTER,               ///< 09 Option Hook Point after AGESA function AMD_INIT_RESET.
-  IDS_INIT_POST_MID,                  ///< 0a Option Hook Point after AGESA function AMD_INIT_POST.
-  IDS_BEFORE_S3_SAVE,                 ///< 0b override any settings before S3 save.
-  IDS_BEFORE_S3_RESTORE,              ///< 0c  override any settings before S3 restore
-  IDS_AFTER_S3_SAVE,                  ///< 0d Override any settings after S3 save
-  IDS_AFTER_S3_RESTORE,               ///< 0e Override any settings after S3 restore
-  IDS_BEFORE_DQS_TRAINING,            ///< 0f override any settings before DQS training
-  IDS_BEFORE_DRAM_INIT,               ///< 10 override any settings before Dram initialization
-  IDS_BEFORE_MEM_FREQ_CHG,            ///< 11 override settings before MemClk frequency change
-  IDS_BEFORE_WARM_RESET ,             ///< 12 Override PCI or MSR Registers Before Warm Reset
-  IDS_BEFORE_PCI_INIT,                ///< 13 Override PCI or MSR Registers Before PCI Init
-  IDS_BEFORE_AP_EARLY_HALT,           ///< 14 Option Hook Point before AP early halt
-  IDS_BEFORE_S3_RESUME,               ///< 15 Option Hook Point before s3 resume
-  IDS_AFTER_S3_RESUME,                ///< 16 Option Hook Point after s3 resume
-  IDS_BEFORE_PM_INIT,                 ///< 17 Option Hook Point Before Pm Init
-
-  IDS_MT_BASE = 0x20,                 ///< 0x20 ~ 0x38 24 time points reserved for MTTime
-
-  IDS_PLATFORM_RSVD1 = 0x38,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD2 = 0x39,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD3 = 0x3a,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD4 = 0x3b,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD5 = 0x3c,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD6 = 0x3d,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD7 = 0x3e,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD8 = 0x3f,          ///< from 0x38 to 0x3f will reserved for platform used
-
-  // All the above timing point is used by BVM, their value should never be changed
-  IDS_INIT_DRAM_TABLE,                ///< 40 Generate override table for Dram Timing
-                                          ///< Dram Controller, Drive Strength and DQS Timing
-  IDS_GET_DRAM_TABLE,                 ///< 41 Generate override table for Dram Timing
-  IDS_GANGING_MODE,                   ///< 42 override Memory Mode Unganged
-  IDS_POWERDOWN_MODE,                 ///< 43 override Power Down Mode
-  IDS_BURST_LENGTH32,                 ///< 44 override Burst Length32
-  IDS_ALL_MEMORY_CLOCK,               ///< 45 override All Memory Clks Enable
-  IDS_ECC,                            ///< 46 override ECC parameter
-  IDS_ECCSYMBOLSIZE,                  ///< 47 override ECC symbol size
-  IDS_CPU_Early_Override,             ///< 48 override CPU early parameter
-  IDS_CACHE_FLUSH_HLT,                ///< 49 override Cache Flush Hlt
-  IDS_CHANNEL_INTERLEAVE,             ///< 4a override Channel Interleave
-  IDS_MEM_ERROR_RECOVERY,             ///< 4b override memory error recovery
-  IDS_MEM_RETRAIN_TIMES,              ///< 4c override memory retrain times
-  IDS_MEM_SIZE_OVERLAY,               ///< 4d Override the syslimit
-  IDS_CHECK_NEGATIVE_WL,              ///< 4e Check for negative write leveling result
-  IDS_DLL_SHUT_DOWN,                  ///< 4f Check for Dll Shut Down
-  IDS_POR_MEM_FREQ,                   ///< 50 Entry to enable/disable MemClk frequency enforcement
-  IDS_PHY_DLL_STANDBY_CTRL,           ///< 51 Enable/Disable Phy DLL standby feature
-  IDS_PLATFORMCFG_OVERRIDE,           ///< 52 Hook for Override PlatformConfig structure
-  IDS_LOADCARD_ERROR_RECOVERY,        ///< 53 Special error handling for load card support
-  IDS_MEM_IGNORE_ERROR,               ///< 54 Ignore error and do not do fatal exit in memory
-  IDS_GNB_SMU_SERVICE_CONFIG,         ///< 55 Config GNB SMU service
-  IDS_GNB_ORBDYNAMIC_WAKE,            ///< 56 config GNB dynamic wake
-  IDS_GNB_PLATFORMCFG_OVERRIDE,       ///< 57 override ids gnb platform config
-  IDS_GNB_LCLK_DPM_EN,                ///< 58 override GNB LCLK DPM configuration
-  IDS_GNB_LCLK_DEEP_SLEEP,            ///< 59 override GNB LCLK DPM deep sleep
-  IDS_GNB_CLOCK_GATING,               ///< 5a Override GNB Clock gating config
-  IDS_NB_PSTATE_DIDVID,               ///< 5b Override NB P-state settings
-  IDS_CPB_CTRL,                       ///< 5c Config the Core peformance boost feature
-  IDS_HTC_CTRL,                       ///< 5d Hook for Hardware Thermal Control
-  IDS_CC6_WORKAROUND,                 ///< 5e Hook for skip CC6 work around
-  IDS_MEM_MR0,                        ///< 5f Hook for override Memory Mr0 register
-  IDS_TRAP_TABLE,                     ///< 60 Hook for add IDS register table to the loop
-  IDS_NBBUFFERALLOCATIONATEARLY,      ///< 61 Hook for override North bridge bufer allocation
-  IDS_BEFORE_S3_SPECIAL,              ///< 62 Hook to bypass S3 special functions
-  IDS_SET_PCI_REGISTER_ENTRY,         ///< 63 Hook to SetRegisterForPciEntry
-  IDS_ERRATUM463_WORKAROUND,          ///< 64 Hook to Erratum 463 workaround
-  IDS_BEFORE_MEMCLR,                  ///< 65 Hook before set Memclr bit
-  IDS_OVERRIDE_IO_CSTATE,             ///< 66 Hook for override io C-state setting
-  IDS_NBPSDIS_OVERRIDE,               ///< 67 Hook for override NB pstate disable setting
-  IDS_NBPS_REG_OVERRIDE,              ///< 68 Hook for override Memory NBps reg
-  IDS_LOW_POWER_PSTATE,               ///< 69 Hook for disable Low power_Pstates feature
-  IDS_CST_CREATE,                     ///< 6a Hook for create _CST
-  IDS_CST_SIZE,                       ///< 6b Hook for get _CST size
-  IDS_ENFORCE_VDDIO,                  ///< 6c Hook to override VDDIO
-  IDS_STRETCH_FREQUENCY_LIMIT,        ///< 6d Hook for enforcing memory stretch frequency limit
-  IDS_INIT_MEM_REG_TABLE,             ///< 6e Hook for init memory register table
-  IDS_SKIP_FUSED_MAX_RATE,            ///< 6f Hook to skip fused max rate cap
-  IDS_FCH_INIT_AT_RESET,              ///< 70 Hook for FCH reset parameter
-  IDS_FCH_INIT_AT_ENV,                ///< 71 Hook for FCH ENV parameter
-  IDS_ENFORCE_PLAT_TABLES,            ///< 72 Hook to enforce platform specific tables
-  IDS_NBPS_MIN_FREQ,                  ///< 73 Hook for override MIN nb ps freq
-  IDS_GNB_FORCE_CABLESAFE,            ///< 74 Hook for override Force Cable Safe
-  IDS_SKIP_PM_TRANSITION_STEP,        ///< 75 Hook for provide IDS ability to skip this PM step
-  IDS_GNB_PROPERTY,                   ///< 76 Hook for GNB Property
-  IDS_GNB_PCIE_POWER_GATING,          ///< 77 Hook for GNB PCIe Power Gating
-  IDS_MEM_DYN_DRAM_TERM,              ///< 78 Hook for Override Dynamic Dram Term
-  IDS_MEM_DRAM_TERM,                  ///< 79 Hook for Override Dram Term
-  IDS_GNB_ALTVDDNB,                   ///< 7a Hook for Override AltVddNB
-  IDS_UCODE,                          ///< 7b Enable or Disable microcode patching
-  IDS_FAM_REG_GMMX,                   ///< 7c GMMX register access
-  IDS_MEMORY_POWER_POLICY,            ///< 7d Memory power policy
-  IDS_GET_STRETCH_FREQUENCY_LIMIT,    ///< 7e Hook for enforcing memory stretch frequency limit
-  IDS_CPU_FEAT,                       ///< 7f Hook for runtime force cpu feature disable
-  IDS_AFTER_DCT_PHY_ACCESS,           ///< 80 Hook for DctAccessDone check
-  IDS_FORCE_PHY_TO_M0,                ///< 81 Hook to bypass M0 enforcement
-  IDS_GNB_PMM_SWTJOFFSET,             ///< 82 Hook to GNBSWTJOFFSET
-  IDS_LOCK_DRAM_CFG,                  ///< 83 Hook to BFLockDramCfg
-  IDS_BEFORE_GEN2_INIT,               ///< 84 Hook to Before Gen2 Init
-  IDS_BEFORE_GPP_TRAINING,            ///< 85 Hook to Before Gpp training
-  IDS_BEFORE_RECONFIGURATION,         ///< 86 Hook to Before Reconfiguration
-  IDS_BEFORE_GEN3_INIT,               ///< 87 Hook to Before Gen3 Init
-  IDS_BEFORE_POWER_GATING,            ///< 88 Hook to Before Power Gating
-  IDS_AFTER_EARLY_INIT_ONCORE,        ///< 89 Hook to after EarlyInit On Core
-  IDS_GNB_PCIE_PORT_REMAP,            ///< 8a Hook to change mapping of PCIe devices
-  IDS_ECC_CONTROL,                    ///< 8b Enable/Disable ECC feature
-  IDS_GNB_PCIE_PHY_ISOLATION,         ///< 8c Enable/Disable PCIE PHY ISOLATION
-  IDS_AFTER_RESTORING_PCI_REG,        ///< 8d Hook after restoring PCI register during S3 resume
-  IDS_MSR_ACCESS_OVERRIDE,            ///< 8e Hook to disable MSR access
-  IDS_REPORT_SMU_FW_VERSION,          ///< 8f Hook to report SMU firmware version
-  IDS_GNB_LOAD_SAMU_PATCH,            ///< 90 Hook to Load SAMU patch
-  IDS_DLLSTAGGERDLY_OVERRIDE,         ///< 91 Hook to skip Dll Stagger Delay
-  IDS_CSAMPLE_TIMER,                  ///< 92 Hook to override CSampleTimer
-  IDS_PIPE_THROTTLE,                  ///< 93 Hook to override PipeThrottle
-  IDS_GNB_PMM_NATIVEGEN1PLL,          ///< 94 Enable/Disable Native Gen1 PLL
-  IDS_BEFORE_PLAT_TABLES,             ///< 95 Hook before processing platform specific tables
-  IDS_GNB_PCIE_MASTERPLL_SELECTION,   ///< 96 Hook to override PCIe Master PLL selection
-  IDS_GNB_PCIE_PHYLANE_CONFIG,        ///< 97 Hook to override PCIe PhyLane configuration
-  IDS_DSM_LP_SELECTION,               ///< 98 Set Dsm low power mode
-  IDS_GNB_EQUAL_PRESET,               ///< 99 Set equalization preset
-  IDS_GNB_GEN1_LOOPBACK,              ///< 9a Override Gen 1 loopback mode
-  IDS_GNB_SMU_SERVICE_MASK,           ///< 9b Override SMU service enablement mask
-  IDS_BEFORE_HT_MEM_MAP,              ///< 9c Hook before mapping memory address space among DCTs
-  IDS_GNB_GEN3_SETTINGS_OVERRIDE,     ///< 9d Hook to override Gen3 Adapt PI Offset Bypass Enable
-  IDS_GNB_TARGET_TDP,                 ///< 9e Hook to override Target TDP
-  IDS_GNB_LOAD_BUILD_OPTIONS,         ///< 9f Hook to override gnb build options
-  IDS_GNB_SMU_BIOS_TABLE,             ///< A0 Hook to override gnb smu bios table
-  IDS_OPTION_END                      ///< A1 End of IDS option
-} AGESA_IDS_OPTION;
-
-#include "OptionsIds.h"
-#include "Filecode.h"
-#include "IdsPerf.h"
-
-/* Initialize IDS controls */
-#ifndef IDSOPT_IDS_ENABLED
-  #define IDSOPT_IDS_ENABLED        FALSE
-#endif
-
-#ifndef IDSOPT_CONTROL_ENABLED
-  #define IDSOPT_CONTROL_ENABLED    FALSE
-#endif
-
-#ifndef IDSOPT_CONTROL_NV_TO_CMOS
-  #define IDSOPT_CONTROL_NV_TO_CMOS FALSE
-#endif
-
-#ifndef IDSOPT_TRACING_ENABLED
-  #define IDSOPT_TRACING_ENABLED    FALSE
-#endif
-
-#ifndef IDSOPT_TRACE_USER_OPTIONS
-  #define IDSOPT_TRACE_USER_OPTIONS TRUE
-#endif
-
-#ifndef IDSOPT_PERF_ANALYSIS
-  #define IDSOPT_PERF_ANALYSIS      FALSE
-#endif
-
-#ifndef IDSOPT_HEAP_CHECKING
-  #define IDSOPT_HEAP_CHECKING           FALSE
-#endif
-
-#ifndef IDSOPT_ASSERT_ENABLED
-  #define IDSOPT_ASSERT_ENABLED         FALSE
-#endif
-
-#ifndef IDSOPT_ERROR_TRAP_ENABLED
-  #define IDSOPT_ERROR_TRAP_ENABLED   FALSE
-#endif
-
-#ifndef IDSOPT_CAR_CORRUPTION_CHECK_ENABLED
-  #define IDSOPT_CAR_CORRUPTION_CHECK_ENABLED   FALSE
-#endif
-
-#ifndef IDSOPT_DEBUG_CODE_ENABLED
-  #define IDSOPT_DEBUG_CODE_ENABLED   FALSE
-#endif
-
-#ifndef IDSOPT_IDT_EXCEPTION_TRAP
-  #define IDSOPT_IDT_EXCEPTION_TRAP FALSE
-#endif
-
-#ifndef IDSOPT_C_OPTIMIZATION_DISABLED
-  #define IDSOPT_C_OPTIMIZATION_DISABLED   FALSE
-#endif
-
-#ifndef IDSOPT_TRACING_CONSOLE_HDTOUT
-  #define IDSOPT_TRACING_CONSOLE_HDTOUT   TRUE
-#endif
-
-#ifndef IDSOPT_TRACING_CONSOLE_SERIALPORT
-  #define IDSOPT_TRACING_CONSOLE_SERIALPORT   FALSE
-#endif
-
-#ifndef IDSOPT_TRACING_CONSOLE_REDIRECT_IO
-  #define IDSOPT_TRACING_CONSOLE_REDIRECT_IO  FALSE
-#endif
-
-#ifndef IDSOPT_TRACING_CONSOLE_RAM
-  #define IDSOPT_TRACING_CONSOLE_RAM  FALSE
-#endif
-
-#if IDSOPT_IDS_ENABLED == FALSE
-  #undef  IDSOPT_CONTROL_ENABLED
-  #undef  IDSOPT_TRACING_ENABLED
-  #undef  IDSOPT_PERF_ANALYSIS
-  #undef  IDSOPT_HEAP_CHECKING
-  #undef  IDSOPT_ASSERT_ENABLED
-  #undef  IDSOPT_ERROR_TRAP_ENABLED
-  #undef  IDSOPT_CAR_CORRUPTION_CHECK_ENABLED
-  #undef  IDSOPT_DEBUG_CODE_ENABLED
-  #undef  IDSOPT_TRACE_USER_OPTIONS
-  #undef  IDSOPT_TRACING_CONSOLE_HDTOUT
-  #undef  IDSOPT_TRACING_CONSOLE_SERIALPORT
-  #undef  IDSOPT_TRACING_CONSOLE_REDIRECT_IO
-  #undef  IDSOPT_TRACING_CONSOLE_RAM
-
-  #define IDSOPT_CONTROL_ENABLED    FALSE
-  #define IDSOPT_TRACING_ENABLED    FALSE
-  #define IDSOPT_PERF_ANALYSIS      FALSE
-  #define IDSOPT_HEAP_CHECKING      FALSE
-  #define IDSOPT_ASSERT_ENABLED     FALSE
-  #define IDSOPT_ERROR_TRAP_ENABLED FALSE
-  #define IDSOPT_CAR_CORRUPTION_CHECK_ENABLED FALSE
-  #define IDSOPT_DEBUG_CODE_ENABLED FALSE
-  #define IDSOPT_TRACE_USER_OPTIONS FALSE
-  #define IDSOPT_TRACING_CONSOLE_HDTOUT FALSE
-  #define IDSOPT_TRACING_CONSOLE_SERIALPORT FALSE
-  #define IDSOPT_TRACING_CONSOLE_REDIRECT_IO FALSE
-  #define IDSOPT_TRACING_CONSOLE_RAM FALSE
-#endif
-
-//Disable when master token Tracing is set to FALSE
-#if (IDSOPT_TRACING_ENABLED == FALSE) || (defined (IDSOPT_CUSTOMIZE_TRACING_SERVICE))
-  #undef  IDSOPT_TRACING_CONSOLE_HDTOUT
-  #define IDSOPT_TRACING_CONSOLE_HDTOUT FALSE
-
-  #undef  IDSOPT_TRACING_CONSOLE_SERIALPORT
-  #define IDSOPT_TRACING_CONSOLE_SERIALPORT FALSE
-
-  #undef IDSOPT_TRACING_CONSOLE_REDIRECT_IO
-  #define IDSOPT_TRACING_CONSOLE_REDIRECT_IO FALSE
-
-  #undef IDSOPT_TRACING_CONSOLE_RAM
-  #define IDSOPT_TRACING_CONSOLE_RAM FALSE
-#endif
-
-//Disable Tracing if all support HW layer set to FALSE
-#if ((IDSOPT_TRACING_CONSOLE_HDTOUT == FALSE) && (IDSOPT_TRACING_CONSOLE_SERIALPORT == FALSE) && (IDSOPT_TRACING_CONSOLE_REDIRECT_IO == FALSE) && (IDSOPT_TRACING_CONSOLE_RAM == FALSE))
-  #ifndef IDSOPT_CUSTOMIZE_TRACING_SERVICE
-    #undef  IDSOPT_TRACING_ENABLED
-    #define IDSOPT_TRACING_ENABLED FALSE
-  #endif
-#endif
-/**
- *  Make a Progress Report to the User.
- *
- *  This Macro is always enabled. The default action is to write the TestPoint value
- *  to an I/O port. The I/O port is 8 bits in size and the default address is 0x80.
- *  IBVs can change AGESA's default port by defining IDS_DEBUG_PORT to desired port
- *  in OptionsIds.h in their build tip.
- *
- *  @param[in]      TestPoint       The value for display indicating progress
- *  @param[in,out]  StdHeader       Pointer of AMD_CONFIG_PARAMS
- *
- **/
-
-#define AGESA_TESTPOINT(TestPoint, StdHeader) IdsAgesaTestPoint ((TestPoint), (StdHeader))
-
-#ifndef IDS_DEBUG_PORT
-  #define IDS_DEBUG_PORT  0x80
-#endif
-
-/**
- * @def STOP_HERE
- *  (macro) - Causes program to halt. This is @b only for use during active debugging .
- *
- *  Causes the program to halt and display the file number of the source of the
- *  halt (displayed in decimal).
- *
- **/
-#if IDSOPT_IDS_ENABLED == TRUE
-  #ifdef STOP_CODE
-    #undef STOP_CODE
-  #endif
-  #define STOP_CODE (((UINT32)FILECODE)*0x10000ul + \
-                      ((__LINE__) % 10) + (((__LINE__ / 10) % 10)*0x10) + \
-                      (((__LINE__ / 100) % 10)*0x100) + (((__LINE__ / 1000) % 10)*0x1000))
-  #define STOP_HERE IdsErrorStop (STOP_CODE);
-#else
-  #define STOP_HERE  STOP_HERE_Needs_To_Be_Removed //"WARNING: Debug code needs to be removed for production builds."
-#endif
-
-/**
- * @def ASSERT
- *  Test an assertion that the given statement is True.
- *
- *  The statement is evaluated to a boolean value. If the statement is True,
- *  then no action is taken (no error). If the statement is False, a error stop
- *  is generated to halt the program. Used for testing for fatal errors that
- *  must be resolved before production. This is used to do parameter checks,
- *  bounds checking, range checks and 'sanity' checks.
- *
- * @param[in]   conditional    Assert that evaluating this conditional results in TRUE.
- *
- **/
-#ifndef ASSERT
-  #if IDSOPT_ASSERT_ENABLED == TRUE
-    #ifdef STOP_CODE
-      #undef STOP_CODE
-    #endif
-    #define STOP_CODE (((UINT32)FILECODE)*0x10000ul + \
-                        ((__LINE__) % 10) + (((__LINE__ / 10) % 10)*0x10) + \
-                        (((__LINE__ / 100) % 10)*0x100) + (((__LINE__ / 1000) % 10)*0x1000))
-
-    #define ASSERT(conditional) ((conditional) ? 0 : IdsAssert (STOP_CODE));
-  #else
-    #define ASSERT(conditional)
-  #endif
-#endif
-
-#if IDSOPT_CAR_CORRUPTION_CHECK_ENABLED == TRUE
-  #undef  IDSOPT_ERROR_TRAP_ENABLED
-  #define IDSOPT_ERROR_TRAP_ENABLED TRUE
-  #define IDS_CAR_CORRUPTION_CHECK(StdHeader)  IdsCarCorruptionCheck(StdHeader)
-#else
-  #define IDS_CAR_CORRUPTION_CHECK(StdHeader)
-#endif
-/**
- * @def DEBUG_CODE
- * Make the code active when IDSOPT_DEBUG_CODE_ENABLED enable
- *
- */
-#ifndef DEBUG_CODE
-  #if IDSOPT_DEBUG_CODE_ENABLED == TRUE
-    #define  DEBUG_CODE(Code) Code
-  #else
-    #define  DEBUG_CODE(Code)
-  #endif
-#endif
-
-/**
- * @def IDS_ERROR_TRAP
- * Trap AGESA Error events with stop code display.
- *
- * Works similarly to use of "ASSERT (FALSE);"
- *
- */
-#if IDSOPT_ERROR_TRAP_ENABLED == TRUE
-  #ifdef STOP_CODE
-    #undef STOP_CODE
-  #endif
-  #define STOP_CODE (((UINT32)FILECODE)*0x10000ul + \
-                      ((__LINE__) % 10) + (((__LINE__ / 10) % 10)*0x10) + \
-                      (((__LINE__ / 100) % 10)*0x100) + (((__LINE__ / 1000) % 10)*0x1000))
-
-  #define IDS_ERROR_TRAP  IdsErrorStop (STOP_CODE)
-#else
-  #define IDS_ERROR_TRAP
-#endif
-
-///give the extended Macro default value
-#ifndef __IDS_EXTENDED__
-  #define IDS_EXTENDED_HOOK(idsoption, dataptr, idsnvptr, stdheader) IDS_SUCCESS
-  #define IDS_TRACE_DEFAULT (0)
-  #define IDS_INITIAL_F15_TN_PM_STEP
-  #define IDS_INITIAL_F15_KV_PM_STEP
-  #define IDS_F15_TN_PM_CUSTOM_STEP
-  #define IDS_F15_KV_PM_CUSTOM_STEP
-  #define IDS_EXTENDED_GET_DATA_EARLY(data, StdHeader)
-  #define IDS_EXTENDED_GET_DATA_LATE(data, StdHeader)
-  #define IDS_EXTENDED_HEAP_SIZE 0
-  #define IDS_EXT_INCLUDE_F15(file)
-  #define IDS_EXT_INCLUDE(file)
-  #define IDS_PAD_4K
-  #define IDS_EXTENDED_CODE(code)
-  #define SMU_FIRMWARE_PADS_1K
-#endif
-
-#ifndef IDS_NUM_NV_ITEM
-  #define IDS_NUM_NV_ITEM (IDS_NUM_EXT_NV_ITEM)
-#endif
-
-#define IDS_CMOS_INDEX_PORT 0x70
-#define IDS_CMOS_DATA_PORT 0x71
-#define IDS_CMOS_REGION_START 0x20
-#define IDS_CMOS_REGION_END 0x7F
-#define IDS_AP_GET_NV_FROM_CMOS(x) FALSE
-
-#if IDSOPT_CONTROL_ENABLED == TRUE
-  #define IDS_OPTION_HOOK(IdsOption, DataPtr, StdHeader) \
-          AmdIdsCtrlDispatcher ((IdsOption), (DataPtr), (StdHeader))
-
-  #define IDS_OPTION_CALLOUT(CallOutId, DataPtr, StdHeader) \
-          IdsOptionCallout ((CallOutId), (DataPtr), (StdHeader))
-  #if IDSOPT_CONTROL_NV_TO_CMOS == TRUE
-    #undef IDS_AP_GET_NV_FROM_CMOS
-    #define IDS_AP_GET_NV_FROM_CMOS(x) AmdIdsApGetNvFromCmos(x)
-    #ifdef IDS_OPT_CMOS_INDEX_PORT
-      #undef IDS_CMOS_INDEX_PORT
-      #define IDS_CMOS_INDEX_PORT IDS_OPT_CMOS_INDEX_PORT
-    #endif
-
-    #ifdef IDS_OPT_CMOS_DATA_PORT
-      #undef IDS_CMOS_DATA_PORT
-      #define IDS_CMOS_DATA_PORT IDS_OPT_CMOS_DATA_PORT
-    #endif
-
-    #ifdef IDS_OPT_CMOS_REGION_START
-      #undef IDS_CMOS_REGION_START
-      #define IDS_CMOS_REGION_START IDS_OPT_CMOS_REGION_START
-    #endif
-
-    #ifdef IDS_OPT_CMOS_REGION_END
-      #undef IDS_CMOS_REGION_END
-      #define IDS_CMOS_REGION_END IDS_OPT_CMOS_REGION_END
-    #endif
-  #endif
-#else
-  #define IDS_OPTION_HOOK(IdsOption, DataPtr, StdHeader)
-
-  #define IDS_OPTION_CALLOUT(CallOutId, DataPtr, StdHeader) AGESA_SUCCESS
-#endif
-
-/**
- *  Macro to add a *skip* hook for IDS options
- *
- *  The default minimal action is to do nothing and there is no any code to increase.
- *  For debug environments, IDS dispatcher function will be called to perform
- *  the detailed action and to skip AGESA code if necessary.
- *
- * @param[in]       IdsOption       IDS Option ID for this hook point
- * @param[in, out]  DataPtr         Data Pointer to override
- * @param[in, out]  StdHeader       Pointer of AMD_CONFIG_PARAMS
- *
- *
- **/
-
-#if IDSOPT_CONTROL_ENABLED == TRUE
-  #define IDS_SKIP_HOOK(IdsOption, DataPtr, StdHeader) \
-          if (AmdIdsCtrlDispatcher (IdsOption, DataPtr, StdHeader) == IDS_SUCCESS)
-#else
-  #define IDS_SKIP_HOOK(IdsOption, DataPtr, StdHeader)
-#endif
-
-/**
- *  Macro to add a heap manager routine
- *
- *  when memory is allocated the heap manager actually allocates two extra dwords of data,
- *  one dword buffer before the actual memory, and one dword afterwards.
- *  a complete heap walk and check to be performed at any time.
- *  it would ASSERT if the heap is corrupt
- *
- * @param[in]  StdHeader       Pointer of AMD_CONFIG_PARAMS
- *
- *
- **/
-
-// Heap debug feature
-#define SENTINEL_BEFORE_VALUE 0x64616548ul    // "Head"
-#define SENTINEL_AFTER_VALUE  0x6C696154ul    // "Tail"
-#if IDSOPT_IDS_ENABLED == TRUE
-  #if IDSOPT_HEAP_CHECKING == TRUE
-    #define SIZE_OF_SENTINEL  4
-    #define NUM_OF_SENTINEL   2             // Before ("Head") and After ("Tail")
-    #define SET_SENTINEL_BEFORE(NodePtr, AlignTo16Byte) (*(UINT32 *) ((UINT8 *) NodePtr + sizeof (BUFFER_NODE) + AlignTo16Byte) = SENTINEL_BEFORE_VALUE);
-    #define SET_SENTINEL_AFTER(NodePtr) (*(UINT32 *) ((UINT8 *) NodePtr + sizeof (BUFFER_NODE) + NodePtr->BufferSize - SIZE_OF_SENTINEL) = SENTINEL_AFTER_VALUE);
-    #define Heap_Check(stdheader) AmdHeapIntactCheck(stdheader)
-  #else
-    #define SIZE_OF_SENTINEL  0
-    #define NUM_OF_SENTINEL   0
-    #define SET_SENTINEL_BEFORE(NodePtr, AlignTo16Byte)
-    #define SET_SENTINEL_AFTER(NodePtr)
-    #define Heap_Check(stdheader)
-  #endif
-#else
-  #define SIZE_OF_SENTINEL    0
-  #define NUM_OF_SENTINEL     0
-  #define SET_SENTINEL_BEFORE(NodePtr, AlignTo16Byte)
-  #define SET_SENTINEL_AFTER(NodePtr)
-  #define Heap_Check(stdheader)
-#endif
-
-/**
- *  Macro to add IDT for debugging exception.
- *
- *  A debug feature. Adding a 'jmp $' into every exception handler.
- *  So debugger could use HDT to skip 'jmp $' and execute the iret,
- *  then they could find which instruction cause the exception.
- *
- * @param[in]       FunctionId      IDS Function ID for this hook point
- * @param[in, out]  DataPtr         Data Pointer to override
- * @param[in, out]  StdHeader       Pointer of AMD_CONFIG_PARAMS
- *
- *
- **/
-#if IDSOPT_IDS_ENABLED == TRUE
-  #if IDSOPT_IDT_EXCEPTION_TRAP == TRUE
-    #define IDS_EXCEPTION_TRAP(FunctionId, DataPtr, StdHeader) IdsExceptionTrap (FunctionId, DataPtr, StdHeader)
-  #else
-    #define IDS_EXCEPTION_TRAP(FunctionId, DataPtr, StdHeader)
-  #endif
-#else
-  #define IDS_EXCEPTION_TRAP(FunctionId, DataPtr, StdHeader)
-#endif
-
-
- //Note a is from 0 to 63
-#define DEBUG_PRINT_SHIFT(a)   ((UINT64)1 << a)
-//If you change the Bitmap definition below, please change the Hash in ParseFilter of hdtout2008.pl accordingly
-//Memory Masks
-#define MEM_SETREG                                  DEBUG_PRINT_SHIFT (0)
-#define MEM_GETREG                                  DEBUG_PRINT_SHIFT (1)
-#define MEM_FLOW                                    DEBUG_PRINT_SHIFT (2)
-#define MEM_STATUS                                  DEBUG_PRINT_SHIFT (3)
-#define MEM_UNDEF_BF                                DEBUG_PRINT_SHIFT (4)
-#define MEMORY_TRACE_RSV2                           DEBUG_PRINT_SHIFT (5)
-#define MEMORY_TRACE_RSV3                           DEBUG_PRINT_SHIFT (6)
-#define MEMORY_TRACE_RSV4                           DEBUG_PRINT_SHIFT (7)
-#define MEMORY_TRACE_RSV5                           DEBUG_PRINT_SHIFT (8)
-#define MEMORY_TRACE_RSV6                           DEBUG_PRINT_SHIFT (9)
-
-//CPU Masks
-#define CPU_TRACE                                   DEBUG_PRINT_SHIFT (10)
-#define CPU_TRACE_RSV1                              DEBUG_PRINT_SHIFT (11)
-#define CPU_TRACE_RSV2                              DEBUG_PRINT_SHIFT (12)
-#define CPU_TRACE_RSV3                              DEBUG_PRINT_SHIFT (13)
-#define CPU_TRACE_RSV4                              DEBUG_PRINT_SHIFT (14)
-#define CPU_TRACE_RSV5                              DEBUG_PRINT_SHIFT (15)
-#define CPU_TRACE_RSV6                              DEBUG_PRINT_SHIFT (16)
-#define CPU_TRACE_RSV7                              DEBUG_PRINT_SHIFT (17)
-#define CPU_TRACE_RSV8                              DEBUG_PRINT_SHIFT (18)
-#define CPU_TRACE_RSV9                              DEBUG_PRINT_SHIFT (19)
-
-//GNB Masks
-#define GNB_TRACE                                   DEBUG_PRINT_SHIFT (20)
-#define PCIE_MISC                                   DEBUG_PRINT_SHIFT (21)
-#define PCIE_PORTREG_TRACE                          DEBUG_PRINT_SHIFT (22)
-#define PCIE_HOSTREG_TRACE                          DEBUG_PRINT_SHIFT (23)
-#define GNB_TRACE_RSV2                              DEBUG_PRINT_SHIFT (24)
-#define NB_MISC                                     DEBUG_PRINT_SHIFT (25)
-#define GNB_TRACE_RSV3                              DEBUG_PRINT_SHIFT (26)
-#define GFX_MISC                                    DEBUG_PRINT_SHIFT (27)
-#define NB_SMUREG_TRACE                             DEBUG_PRINT_SHIFT (28)
-#define GNB_TRACE_RSV1                              DEBUG_PRINT_SHIFT (29)
-
-//Topology Masks
-#define TOPO_TRACE                                  DEBUG_PRINT_SHIFT (30)
-#define TOPO_TRACE_RSV1                             DEBUG_PRINT_SHIFT (31)
-#define TOPO_TRACE_RSV2                             DEBUG_PRINT_SHIFT (32)
-#define TOPO_TRACE_RSV3                             DEBUG_PRINT_SHIFT (33)
-#define TOPO_TRACE_RSV4                             DEBUG_PRINT_SHIFT (34)
-#define TOPO_TRACE_RSV5                             DEBUG_PRINT_SHIFT (35)
-#define TOPO_TRACE_RSV6                             DEBUG_PRINT_SHIFT (36)
-#define TOPO_TRACE_RSV7                             DEBUG_PRINT_SHIFT (37)
-#define TOPO_TRACE_RSV8                             DEBUG_PRINT_SHIFT (38)
-#define TOPO_TRACE_RSV9                             DEBUG_PRINT_SHIFT (39)
-
-//FCH Masks
-#define FCH_TRACE                                    DEBUG_PRINT_SHIFT (40)
-#define FCH_TRACE_RSV1                               DEBUG_PRINT_SHIFT (41)
-#define FCH_TRACE_RSV2                               DEBUG_PRINT_SHIFT (42)
-#define FCH_TRACE_RSV3                               DEBUG_PRINT_SHIFT (43)
-#define FCH_TRACE_RSV4                               DEBUG_PRINT_SHIFT (44)
-#define FCH_TRACE_RSV5                               DEBUG_PRINT_SHIFT (45)
-#define FCH_TRACE_RSV6                               DEBUG_PRINT_SHIFT (46)
-#define FCH_TRACE_RSV7                               DEBUG_PRINT_SHIFT (47)
-#define FCH_TRACE_RSV8                               DEBUG_PRINT_SHIFT (48)
-#define FCH_TRACE_RSV9                               DEBUG_PRINT_SHIFT (49)
-
-//Other Masks
-#define MAIN_FLOW                                    DEBUG_PRINT_SHIFT (50)
-#define EVENT_LOG                                    DEBUG_PRINT_SHIFT (51)
-#define PERFORMANCE_ANALYSE                          DEBUG_PRINT_SHIFT (52)
-
-//Ids Masks
-#define IDS_TRACE                                    DEBUG_PRINT_SHIFT (53)
-#define BVM_TRACE                                    DEBUG_PRINT_SHIFT (54)
-#define IDS_TRACE_RSV2                               DEBUG_PRINT_SHIFT (55)
-#define IDS_TRACE_RSV3                               DEBUG_PRINT_SHIFT (56)
-
-//S3
-#define S3_TRACE                                     DEBUG_PRINT_SHIFT (57)
-
-//Library function to read/write PCI/MSR registers
-#define LIB_PCI_RD                                   DEBUG_PRINT_SHIFT (58)
-#define LIB_PCI_WR                                   DEBUG_PRINT_SHIFT (59)
-
-//AGESA test points
-#define TEST_POINT                                   DEBUG_PRINT_SHIFT (60)
-
-//Reserved for platform log
-#define PLAT_RSV1                                    DEBUG_PRINT_SHIFT (61)
-#define PLAT_RSV2                                    DEBUG_PRINT_SHIFT (62)
-#define PLAT_RSV3                                    DEBUG_PRINT_SHIFT (63)
-
-#define GNB_TRACE_DEFAULT\
-      (\
-      GNB_TRACE | PCIE_MISC | NB_MISC | GFX_MISC \
-      )
-
-#define GNB_TRACE_REG\
-      (\
-      PCIE_PORTREG_TRACE | PCIE_HOSTREG_TRACE | \
-      NB_SMUREG_TRACE | GNB_TRACE_RSV1 \
-      )
-
-#define GNB_TRACE_ALL\
-      (\
-      GNB_TRACE_DEFAULT | GNB_TRACE_REG \
-      )
-
-#define CPU_TRACE_ALL\
-      (\
-      CPU_TRACE | CPU_TRACE_RSV1 | CPU_TRACE_RSV2 | CPU_TRACE_RSV3 | \
-      CPU_TRACE_RSV4 | CPU_TRACE_RSV5 | CPU_TRACE_RSV6 | CPU_TRACE_RSV7 | \
-      CPU_TRACE_RSV8 | CPU_TRACE_RSV9\
-      )
-
-#define MEMORY_TRACE_ALL\
-      (\
-      MEM_FLOW | MEM_GETREG | MEM_SETREG | MEM_STATUS | \
-      MEMORY_TRACE_RSV1 | MEMORY_TRACE_RSV2 | MEMORY_TRACE_RSV3 | MEMORY_TRACE_RSV4 | \
-      MEMORY_TRACE_RSV5 | MEMORY_TRACE_RSV6\
-      )
-
-#define TOPO_TRACE_ALL\
-      (\
-      TOPO_TRACE | TOPO_TRACE_RSV1 | TOPO_TRACE_RSV2 | TOPO_TRACE_RSV3 | \
-      TOPO_TRACE_RSV4 | TOPO_TRACE_RSV5 | TOPO_TRACE_RSV6 | TOPO_TRACE_RSV7 | \
-      TOPO_TRACE_RSV8 | TOPO_TRACE_RSV9\
-      )
-
-#define FCH_TRACE_ALL\
-      (\
-      FCH_TRACE | FCH_TRACE_RSV1 | FCH_TRACE_RSV2 | FCH_TRACE_RSV3 | \
-      FCH_TRACE_RSV4 | FCH_TRACE_RSV5 | FCH_TRACE_RSV6 | FCH_TRACE_RSV7 | \
-      FCH_TRACE_RSV8 | FCH_TRACE_RSV9\
-      )
-
-#define IDS_TRACE_ALL\
-      (\
-      IDS_TRACE | BVM_TRACE | IDS_TRACE_RSV2 | IDS_TRACE_RSV3\
-      )
-
-#define OTHER_TRACE_ALL\
-      (\
-      MAIN_FLOW | EVENT_LOG | PERFORMANCE_ANALYSE\
-      )
-
-
-#define TRACE_MASK_ALL (0xFFFFFFFFFFFFFFFFull)
-#ifndef IDS_DEBUG_PRINT_MASK
-  #define IDS_DEBUG_PRINT_MASK (GNB_TRACE_DEFAULT  | CPU_TRACE_ALL | MEM_FLOW | MEM_STATUS | TOPO_TRACE_ALL | FCH_TRACE_ALL | MAIN_FLOW | IDS_TRACE_DEFAULT | TEST_POINT)
-#endif
-
-/// if no specific define INIT & EXIT will be NULL
-#define IDS_HDT_CONSOLE_INIT(x)
-#define IDS_HDT_CONSOLE_EXIT(x)
-
-/// AGESA tracing service
-#if IDSOPT_TRACING_ENABLED == TRUE
-  #ifdef VA_ARGS_SUPPORTED
-    #if IDSOPT_C_OPTIMIZATION_DISABLED == TRUE
-      #define IDS_HDT_CONSOLE(f, s, ...)        AmdIdsDebugPrint (f, s, __VA_ARGS__)
-    #else
-      #pragma warning(disable: 4127)
-      #define IDS_HDT_CONSOLE(f, s, ...)        if      (f == MEM_FLOW) AmdIdsDebugPrintMem (s, __VA_ARGS__); \
-                                                 else if (f == CPU_TRACE) AmdIdsDebugPrintCpu (s, __VA_ARGS__); \
-                                                  else if (f == TOPO_TRACE) AmdIdsDebugPrintTopology (s, __VA_ARGS__); \
-                                                  else if (f == GNB_TRACE) AmdIdsDebugPrintGnb (s, __VA_ARGS__); \
-                                                 else AmdIdsDebugPrint (f, s, __VA_ARGS__)
-    #endif
-  #else
-    #define IDS_HDT_CONSOLE    AmdIdsDebugPrint
-  #endif
-  #define CONSOLE            AmdIdsDebugPrintAll
-  #define IDS_HDT_CONSOLE_DEBUG_CODE(Code)  Code
-  #define IDS_TIMEOUT_CTL(t)                IdsMemTimeOut (t)
-#else
-  #define IDS_HDT_CONSOLE           1 ? (VOID) 0 : AmdIdsDebugPrint
-  #define IDS_HDT_CONSOLE_DEBUG_CODE(Code)
-  #define CONSOLE   CONSOLE_Needs_To_Be_Removed_For_Production_Build //"WARNING: CONSOLE needs to be removed for production builds."
-  #define IDS_TIMEOUT_CTL(t)
-#endif
-
-/// Macros for serial port tracing
-#ifdef IDSOPT_SERIAL_PORT
-  #define IDS_SERIAL_PORT IDSOPT_SERIAL_PORT
-#endif
-
-#ifndef IDS_SERIAL_PORT
-  #define IDS_SERIAL_PORT 0x3F8
-#endif
-
-// Macros for redirect IO tracing
-#ifdef IDSOPT_DEBUG_PRINT_IO_PORT
-  #define IDS_DEBUG_PRINT_IO_PORT IDSOPT_DEBUG_PRINT_IO_PORT
-#endif
-
-#ifndef IDS_DEBUG_PRINT_IO_PORT
-  #define IDS_DEBUG_PRINT_IO_PORT 0x80
-#endif
-
-#define IDS_DPRAM_BASE 0
-#define IDS_DPRAM_SIZE 0
-///Default policy, shift the old data when buffer full
-#define IDS_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL FALSE
-#if IDSOPT_TRACING_CONSOLE_RAM  == TRUE
-  #ifdef IDSOPT_DPRAM_BASE
-    #undef IDS_DPRAM_BASE
-    #define IDS_DPRAM_BASE  IDSOPT_DPRAM_BASE
-  #else
-    #error "Debug Print Ram Base not specified, please define IDSOPT_DPRAM_BASE in optionsids.h"
-  #endif
-
-  #ifdef IDSOPT_DPRAM_SIZE
-    #undef IDS_DPRAM_SIZE
-    #define IDS_DPRAM_SIZE  IDSOPT_DPRAM_SIZE
-  #else
-    #error "Debug Print Ram size not specified, please define IDSOPT_DPRAM_SIZE in optionsids.h"
-  #endif
-
-  #ifdef IDSOPT_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL
-    #define IDS_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL IDSOPT_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL
-  #endif
-#endif
-/**
- *  Macros to add HDT OUT
- *
- *  The default minimal action is to do nothing and there is no any code to increase.
- *  For debug environments, the debug information can be displayed in HDT or other
- *  devices.
- *
- **/
-#if IDSOPT_TRACING_CONSOLE_HDTOUT == TRUE
-  #undef IDS_HDT_CONSOLE_INIT
-  #undef IDS_HDT_CONSOLE_EXIT
-  #define IDS_HDT_CONSOLE_INIT(x)           AmdIdsHdtOutInit (x)
-  #define IDS_HDT_CONSOLE_EXIT(x)           AmdIdsHdtOutExit (x)
-  #define IDS_HDT_CONSOLE_S3_EXIT(x)        AmdIdsHdtOutS3Exit (x)
-  #define IDS_HDT_CONSOLE_S3_AP_EXIT(x)     AmdIdsHdtOutS3ApExit (x)
-
-  #define IDS_HDT_CONSOLE_FLUSH_BUFFER(x)   AmdIdsHdtOutBufferFlush (x)
-  #define IDS_HDT_CONSOLE_ASSERT(x)   AmdIdsDebugPrintAssert (x)
-  #define IDS_FUNCLIST_ADDR                 ScriptFuncList
-  #define IDS_FUNCLIST_EXTERN()             extern SCRIPT_FUNCTION ScriptFuncList[]
-#else
-  #define IDS_HDT_CONSOLE_S3_EXIT(x)
-  #define IDS_HDT_CONSOLE_S3_AP_EXIT(x)
-  #define IDS_HDT_CONSOLE_FLUSH_BUFFER(x)
-  #define IDS_HDT_CONSOLE_ASSERT(x)
-  #define IDS_FUNCLIST_ADDR                 NULL
-  #define IDS_FUNCLIST_EXTERN()
-#endif
-
-#if IDSOPT_TRACING_ENABLED == TRUE
-  #ifdef IDSOPT_CUSTOMIZE_TRACING_SERVICE
-    #undef  IDS_HDT_CONSOLE
-    #define IDS_HDT_CONSOLE        IDSOPT_CUSTOMIZE_TRACING_SERVICE
-  #endif
-  #ifdef IDSOPT_CUSTOMIZE_TRACING_SERVICE_INIT
-    #undef IDS_HDT_CONSOLE_INIT
-    #define IDS_HDT_CONSOLE_INIT(x)           IDSOPT_CUSTOMIZE_TRACING_SERVICE_INIT (x)
-  #endif
-  #ifdef IDSOPT_CUSTOMIZE_TRACING_SERVICE_EXIT
-    #undef IDS_HDT_CONSOLE_EXIT
-    #define IDS_HDT_CONSOLE_EXIT(x)           IDSOPT_CUSTOMIZE_TRACING_SERVICE_EXIT (x)
-  #endif
-#endif
-
-#define IDS_TRACE_SHOW_BLD_OPT_CFG  IDSOPT_TRACE_USER_OPTIONS
-
-#if IDSOPT_PERF_ANALYSIS == TRUE
-  #include "IdsPerf.h"
-  #ifdef STOP_CODE
-    #undef STOP_CODE
-  #endif
-  #define STOP_CODE (((UINT32)FILECODE)*0x10000ul + \
-                        ((__LINE__) % 10) + (((__LINE__ / 10) % 10)*0x10) + \
-                        (((__LINE__ / 100) % 10)*0x100) + (((__LINE__ / 1000) % 10)*0x1000))
-
-  #define IDS_PERF_TIMESTAMP(ID, StdHeader)  IdsPerfTimestamp (STOP_CODE, ID, (StdHeader))
-  #define IDS_PERF_ANALYSE(StdHeader)   IdsPerfAnalyseTimestamp (StdHeader)
-#else
-  #define IDS_PERF_TIMESTAMP(ID, StdHeader)
-  #define IDS_PERF_ANALYSE(StdHeader)
-#endif
-
-///For IDS feat use
-#define IDS_FAMILY_ALL  0xFFFFFFFFFFFFFFFFull
-#define IDS_BSP_ONLY    TRUE
-#define IDS_ALL_CORES   FALSE
-
-#define IDS_LATE_RUN_AP_TASK_ID     PROC_IDS_LIBRARY_IDSLIB_FILECODE
-
-#define IDS_CALLOUT_INIT      0x01                             ///< The function data of IDS callout function of initialization.
-
-#define IDS_CALLOUT_GNB_PPFUSE_OVERRIDE           0x83        ///< The function data of IDS callout function of GNB pp fuse table.
-#define IDS_CALLOUT_GNB_INTEGRATED_TABLE_CONFIG   0x84        ///< The function data of IDS callout function of GNB integrated table.
-#define IDS_CALLOUT_GNB_NB_POWERGATE_CONFIG       0x85        ///< The function data of IDS callout function of GNB NB power gate config.
-#define IDS_CALLOUT_GNB_PCIE_POWERGATE_CONFIG     0x86        ///< The function data of IDS callout function of GNB PCIE power gateconfig.
-#define IDS_CALLOUT_GNB_PCIE_PLATFORM_CONFIG      0x87        ///< The function data of IDS callout function of GNB pcie platform config.
-#define IDS_CALLOUT_GNB_PCIE_PHY_CONFIG           0x88        ///< The function data of IDS callout function of GNB pcie PHY config.
-#define IDS_CALLOUT_GNB_GMM_REGISTER_OVERRIDE     0x89        ///< The function data of IDS callout function of GNB GMM register override
-#define IDS_CALLOUT_FCH_INIT_RESET                0x8A        ///< The function data of IDS callout function of FchInitReset
-#define IDS_CALLOUT_FCH_INIT_ENV                  0x8B        ///< The function data of IDS callout function of FchInitEnv.
-#define IDS_CALLOUT_POWER_PLAN_INIT               0x8C        ///< The function data of IDS callout function of Override Power Plan Init
-#define IDS_CALLOUT_GET_PERF_BUFFER               0x8D        ///< The function data of IDS callout function of get platform performance buffer.
-#define IDS_CALLOUT_GNB_PACKAGE_POWER_CONFIG      0x8E        ///< The function data of IDS callout function of Bapm Package Power.
-#define IDS_CALLOUT_SMU_PORT80_LOGGING_BUFFER     0x8F        ///< The function data of IDS callout function of SMU port80 logging buffer.
-#define IDS_CALLOUT_GNB_BEFORE_EARLY_INIT         0x90        ///< The function data of IDS callout function of GNB before early init.
-#define IDS_CALLOUT_GNB_SMUBIOSTABLE_OVERRIDE     0x91        ///< The function data of IDS callout function of GNB smu bios table.
-#define IDS_CALLOUT_GNB_PCIE_EARLY_PORT_CONFIG    0x92        ///< The function data of IDS callout function of GNB pcie early port config.
-
-/// Function entry for HDT script to call
-typedef struct _SCRIPT_FUNCTION {
-  UINT32  FuncAddr;       ///< Function address in ROM
-  CHAR8   FuncName[40];   ///< Function name
-} SCRIPT_FUNCTION;
-
-/// Data Structure for Mem ECC parameter override
-typedef struct {
-  IN BOOLEAN CfgEccRedirection;                   ///< ECC Redirection
-  IN UINT16  CfgScrubDramRate;                    ///< Scrub Dram Rate
-  IN UINT16  CfgScrubL2Rate;                      ///< Scrub L2Rate
-  IN UINT16  CfgScrubL3Rate;                      ///< Scrub L3Rate
-  IN UINT16  CfgScrubIcRate;                      ///< Scrub Ic Rate
-  IN UINT16  CfgScrubDcRate;                      ///< Scrub Dc Rate
-  IN BOOLEAN CfgEccSyncFlood;                     ///< ECC Sync Flood
-} ECC_OVERRIDE_STRUCT;
-
-
-
-
-/**
- *  AGESA Test Points
- *
- *  These are the values displayed to the user to indicate progress through boot.
- *  These can be used in a debug environment to stop the debugger at a specific
- *  test point:
- *  For SimNow!, this command
- *      bi 81 w vb 49
- *  will stop the debugger on one of the TracePoints (49 is the TP value in this example).
- *
- */
-typedef enum {
-  StartProcessorTestPoints,           ///< 00 Entry used for range testing for @b Processor related TPs
-
-  // Memory test points
-  TpProcMemBeforeMemDataInit,         ///< 01 .. Memory structure initialization (Public interface)
-  TpProcMemBeforeSpdProcessing,       ///< 02 .. SPD Data processing  (Public interface)
-  TpProcMemAmdMemAuto,                ///< 03 .. Memory configuration  (Public interface)
-  TpProcMemDramInit,                  ///< 04 .. DRAM initialization
-  TpProcMemSPDChecking,               ///< 05 ..
-  TpProcMemModeChecking,              ///< 06 ..
-  TpProcMemSpeedTclConfig,            ///< 07 .. Speed and TCL configuration
-  TpProcMemSpdTiming,                 ///< 08 ..
-  TpProcMemDramMapping,               ///< 09 ..
-  TpProcMemPlatformSpecificConfig,    ///< 0A ..
-  TPProcMemPhyCompensation,           ///< 0B ..
-  TpProcMemStartDcts,                 ///< 0C ..
-  TpProcMemBeforeDramInit,            ///< 0D .. (Public interface)
-  TpProcMemPhyFenceTraining,          ///< 0E ..
-  TpProcMemSynchronizeDcts,           ///< 0F ..
-  TpProcMemSystemMemoryMapping,       ///< 10 ..
-  TpProcMemMtrrConfiguration,         ///< 11 ..
-  TpProcMemDramTraining,              ///< 12 ..
-  TpProcMemBeforeAnyTraining,         ///< 13 .. (Public interface)
-  TpProcMemWriteLevelizationTraining, ///< 14 ..
-  TpProcMemWlFirstPass,               ///< 15 .. Below 800Mhz first pass start
-  TpProcMemWlSecondPass,              ///< 16 .. Above 800Mhz second pass start
-  TpProcMemWlTrainTargetDimm,         ///< 17 .. Target DIMM configured
-  TpProcMemWlPrepDimms,               ///< 18 ..  Prepare DIMMS for WL
-  TpProcMemWlConfigDimms,             ///< 19 ..  Configure DIMMS for WL
-  TpProcMemReceiverEnableTraining,    ///< 1A ..
-  TpProcMemRcvrStartSweep,            ///< 1B .. Start sweep loop
-  TpProcMemRcvrSetDelay,              ///< 1C .. Set receiver Delay
-  TpProcMemRcvrWritePattern,          ///< 1D .. Write test pattern
-  TpProcMemRcvrReadPattern,           ///< 1E .. Read test pattern
-  TpProcMemRcvrTestPattern,           ///< 1F .. Compare test pattern
-  TpProcMemRcvrCalcLatency,           ///< 20 .. Calculate MaxRdLatency per channel
-  TpProcMemReceiveDqsTraining,        ///< 21 ..
-  TpProcMemRcvDqsSetDelay,            ///< 22 .. Set Write Data delay
-  TpProcMemRcvDqsWritePattern,        ///< 23 .. Write test pattern
-  TpProcMemRcvDqsStartSweep,          ///< 24 .. Start read sweep
-  TpProcMemRcvDqsSetRcvDelay,         ///< 25 .. Set Receive DQS delay
-  TpProcMemRcvDqsReadPattern,         ///< 26 .. Read Test pattern
-  TpProcMemRcvDqsTstPattern,          ///< 27 .. Compare Test pattern
-  TpProcMemRcvDqsResults,             ///< 28 .. Update results
-  TpProcMemRcvDqsFindWindow,          ///< 29 .. Start Find passing window
-  TpProcMemTransmitDqsTraining,       ///< 2A ..
-  TpProcMemTxDqStartSweep,            ///< 2B .. Start write sweep
-  TpProcMemTxDqSetDelay,              ///< 2C .. Set Transmit DQ delay
-  TpProcMemTxDqWritePattern,          ///< 2D .. Write test pattern
-  TpProcMemTxDqReadPattern,           ///< 2E .. Read Test pattern
-  TpProcMemTxDqTestPattern,           ///< 2F .. Compare Test pattern
-  TpProcMemTxDqResults,               ///< 30 .. Update results
-  TpProcMemTxDqFindWindow,            ///< 31 .. Start Find passing window
-  TpProcMemMaxRdLatencyTraining,      ///< 32 ..
-  TpProcMemMaxRdLatStartSweep,        ///< 33 .. Start sweep
-  TpProcMemMaxRdLatSetDelay,          ///< 34 .. Set delay
-  TpProcMemMaxRdLatWritePattern,      ///< 35 .. Write test pattern
-  TpProcMemMaxRdLatReadPattern,       ///< 36 .. Read Test pattern
-  TpProcMemMaxRdLatTestPattern,       ///< 37 .. Compare Test pattern
-  TpProcMemOnlineSpareInit,           ///< 38 .. Online Spare init
-  TpProcMemBankInterleaveInit,        ///< 39 .. Bank Interleave Init
-  TpProcMemNodeInterleaveInit,        ///< 3A .. Node Interleave Init
-  TpProcMemChannelInterleaveInit,     ///< 3B .. Channel Interleave Init
-  TpProcMemEccInitialization,         ///< 3C .. ECC initialization
-  TpProcMemPlatformSpecificInit,      ///< 3D .. Platform Specific Init
-  TpProcMemBeforeAgesaReadSpd,        ///< 3E .. Before callout for "AgesaReadSpd"
-  TpProcMemAfterAgesaReadSpd,         ///< 3F .. After callout for "AgesaReadSpd"
-  TpProcMemBeforeAgesaHookBeforeDramInit,    ///< 40 .. Before optional callout "AgesaHookBeforeDramInit"
-  TpProcMemAfterAgesaHookBeforeDramInit,     ///< 41 .. After optional callout "AgesaHookBeforeDramInit"
-  TpProcMemBeforeAgesaHookBeforeDQSTraining, ///< 42 .. Before optional callout "AgesaHookBeforeDQSTraining"
-  TpProcMemAfterAgesaHookBeforeDQSTraining,  ///< 43 .. After optional callout "AgesaHookBeforeDQSTraining"
-  TpProcMemBeforeAgesaHookBeforeExitSelfRef, ///< 44 .. Before optional callout "AgesaHookBeforeDramInit"
-  TpProcMemAfterAgesaHookBeforeExitSelfRef,  ///< 45 .. After optional callout "AgesaHookBeforeDramInit"
-  TpProcMemAfterMemDataInit,          ///< 46 .. After MemDataInit
-  TpProcMemInitializeMCT,             ///< 47 .. Before InitializeMCT
-  TpProcMemLvDdr3,                    ///< 48 .. Before LV DDR3
-  TpProcMemInitMCT,                   ///< 49 .. Before InitMCT
-  TpProcMemOtherTiming,               ///< 4A.. Before OtherTiming
-  TpProcMemUMAMemTyping,              ///< 4B .. Before UMAMemTyping
-  TpProcMemSetDqsEccTmgs,             ///< 4C .. Before SetDqsEccTmgs
-  TpProcMemMemClr,                    ///< 4D .. Before MemClr
-  TpProcMemOnDimmThermal,             ///< 4E .. Before On DIMM Thermal
-  TpProcMemDmi,                       ///< 4F .. Before DMI
-  TpProcMemEnd,                       ///< 50 .. End of memory code
-
-  // CPU test points
-  TpProcCpuEntryDmi,                  ///< 51 .. Entry point CreateDmiRecords
-  TpProcCpuEntryPstate,               ///< 52 .. Entry point GenerateSsdt
-  TpProcCpuEntryPstateLeveling,       ///< 53 .. Entry point PStateLeveling
-  TpProcCpuEntryPstateGather,         ///< 54 .. Entry point PStateGatherData
-  TpProcCpuEntryWhea,                 ///< 55 .. Entry point CreateAcpiWhea
-  TpProcCpuEntrySrat,                 ///< 56 .. Entry point CreateAcpiSrat
-  TpProcCpuEntrySlit,                 ///< 57 .. Entry point CreateAcpiSlit
-  TpProcCpuProcessRegisterTables,     ///< 58 .. Register table processing
-  TpProcCpuSetBrandID,                ///< 59 .. Set brand ID
-  TpProcCpuLocalApicInit,             ///< 5A .. Initialize local APIC
-  TpProcCpuLoadUcode,                 ///< 5B .. Load microcode patch
-  TpProcCpuBeforePMFeatureInit,       ///< 5C .. BeforePM feature dispatch point
-  TpProcCpuPowerMgmtInit,             ///< 5D .. Power Management table processing
-  TpProcCpuEarlyFeatureInit,          ///< 5E .. Early feature dispatch point
-  TpProcCpuCoreLeveling,              ///< 5F .. Core Leveling
-  TpProcCpuApMtrrSync,                ///< 60 .. AP MTRR sync up
-  TpProcCpuPostFeatureInit,           ///< 61 .. POST feature dispatch point
-  TpProcCpuBeforeRelinquishAPsFeatureInit = 0x63, ///< 63 .. Before Relinquishing control of APs feature dispatch point
-  TpProcCpuBeforeAllocateWheaBuffer,  ///< 64 .. Before the WHEA init code calls out to allocate a buffer
-  TpProcCpuAfterAllocateWheaBuffer,   ///< 65 .. After the WHEA init code calls out to allocate a buffer
-  TpProcCpuBeforeAllocateSratBuffer,  ///< 66 .. Before the SRAT init code calls out to allocate a buffer
-  TpProcCpuAfterAllocateSratBuffer,   ///< 67 .. After the SRAT init code calls out to allocate a buffer
-  TpProcCpuBeforeLocateSsdtBuffer,    ///< 68 .. Before the P-state init code calls out to locate a buffer
-  TpProcCpuAfterLocateSsdtBuffer,     ///< 69 .. After the P-state init code calls out to locate a buffer
-  TpProcCpuBeforeAllocateSsdtBuffer,  ///< 6A .. Before the P-state init code calls out to allocate a buffer
-  TpProcCpuAfterAllocateSsdtBuffer,   ///< 6B .. After the P-state init code calls out to allocate a buffer
-  TpProcCpuEntryCrat,                 ///< 6C .. Entry point CreateAcpiCrat
-  TpProcCpuEntryCdit,                 ///< 6D .. Entry point CreateAcpiCdit
-  TpProcCpuEntryScs,                  ///< 6E .. Entry point InitializeScsFeature
-
-  // Topology test points
-  TpProcTopologyEntry = 0x71,         ///< 71 .. Topology Init begin
-  TpProcTopologyDone = 0x7C,          ///< 7C .. Topology Init complete
-
-  // Extended memory test point
-  TpProcMemSendMRS2 = 0x80,           ///< 80 .. Sending MRS2
-  TpProcMemSendMRS3,                  ///< 81 .. Sedding MRS3
-  TpProcMemSendMRS1,                  ///< 82 .. Sending MRS1
-  TpProcMemSendMRS0,                  ///< 83 .. Sending MRS0
-  TpProcMemContinPatternGenRead,      ///< 84 .. Continuous Pattern Read
-  TpProcMemContinPatternGenWrite,     ///< 85 .. Continuous Pattern Write
-  TpProcMem2dRdDqsTraining,           ///< 86 .. Mem: 2d RdDqs Training begin
-  TpProcMemBefore2dTrainExtVrefChange,///< 87 .. Mem: Before optional callout to platform BIOS to change External Vref during 2d Training
-  TpProcMemAfter2dTrainExtVrefChange, ///< 88 .. Mem: After optional callout to platform BIOS to change External Vref during 2d Training
-  TpProcMemConfigureDCTForGeneral,    ///< 89 .. Configure DCT For General use begin
-  TpProcMemProcConfigureDCTForTraining,    ///< 8A .. Configure DCT For training begin
-  TpProcMemConfigureDCTNonExplicitSeq,///< 8B .. Configure DCT For Non-Explicit
-  TpProcMemSynchronizeChannels,       ///< 8C .. Configure to Sync channels
-  TpProcMemC6StorageAllocation,       ///< 8D .. Allocate C6 Storage
-
-  // Gnb Earlier init
-  TpGnbEarlierPcieConfigurationInit = 0x90,           ///< 90 .. GNB earlier PCIE configuration init
-  TpGnbEarlierInterface = 0x91,                       ///< 91 .. GNB earlier interface
-  // Gnb Early init
-  TpGnbEarlyInterface = 0x92,                         ///< 92 .. GNB early interface
-  TpGnbPcieConfigurationMap,                          ///< 93 .. GNB early PCIE configuration map
-  TpGnbPcieEarlyInterface,                            ///< 94 .. GNB early PCIE interface
-  //Gnb post init
-  TpGnbPciePostEarlyInterface = 0x95,                 ///< 95 .. GNB post early interface
-  TpGnbGfxConfigPostInterface,                        ///< 96 .. GNB post GFX config interface
-  TpGnbGfxPostInterface,                              ///< 97 .. GNB post GFX interface
-  // Gnb post after DRAM init
-  TpGnbPostInterface = 0x98,                          ///< 98 .. GNB post after DRAM interface
-  TpGnbPciePostInterface,                             ///< 99 .. GNB post after DRAM PCIE interface
-  // Gnb Env init
-  TpGnbEnvInterface,                                  ///< 9A .. GNB Env Nb interface
-  TpGnbPcieEnvInterface,                              ///< 9B .. GNB Env PCIE interface
-  TpGnbGfxConfigEnvInterface,                         ///< 9C .. GNB Env GFX Config interface
-  TpGnbGfxEnvInterface,                               ///< 9D .. GNB Env GFX interface
-  // Gnb Mid init
-  TpGnbGfxConfigMidInterface = 0xA1,                  ///< A1 .. GNB Mid GFX config interface
-  TpGnbGfxMidInterface,                               ///< A2 .. GNB Mid GFX interface
-  TpPcieMidInterface,                                 ///< A3 .. GNB Mid PCIE interface
-  TpGnbMidInterface,                                  ///< A4 .. GNB Mid interface
-  TpNbLclkFeature,                                    ///< A5 .. GNB Mid Nclk feature
-  TpPciePowerGateFeature,                             ///< A6 .. GNB Mid pcie power gate feature
-  TpGnbPcieMaxPayloadInterface,                       ///< A7 .. GNB Mid pcie max payload interface
-  TpGnbPcieClkPmInterface,                            ///< A8 .. GNB Mid pcie clk pm port interface
-  TpGnbPcieAspmInterface,                             ///< A9 .. GNB Mid pcie ASPM interface
-  TpGnbNbIoapicInterface,                             ///< AA .. GNB Mid IOAPIC interface
-  // Gnb Late init
-  TpGnbPcieAlibFeature = 0xAB,                        ///< AB .. GNB Late pcie ALIB feature
-  TpGnbIommuIvrsTable,                                ///< AC .. GNB Late pcie IOMMU
-  // Gnb S3 Save
-  TpGnbGfxInitSview = 0xAD,                           ///< AD .. GNB S3SAVE GFX sview init
-  TpGnbAlibDispatchFeature = 0xAE,                    ///< AE .. GNB ALIB dispatch feature
-  EndGnbTestPoints = 0xAF,                            ///< AF End of TP range for GNB
-
-  StartFchTestPoints = 0xB0,          ///< B0 Entry used for range testing for @b FCH related TPs
-  TpFchInitResetDispatching,          ///< B1 .. FCH InitReset dispatch point
-  TpFchGppBeforePortTraining,         ///< B2 .. Before FCH GPP port training
-  TpFchGppGen1PortPolling,            ///< B3 .. FCH GPP port polling with GEN1 speed
-  TpFchGppGen2PortPolling,            ///< B4 .. FCH GPP port polling with GEN2 speed
-  TpFchGppAfterPortTraining,          ///< B5 .. After FCH GPP port training
-  TpFchInitEnvDispatching,            ///< B6 .. FCH InitEnv dispatch point
-  TpFchInitMidDispatching,            ///< B7 .. FCH InitMid dispatch point
-  TpFchInitLateDispatching,           ///< B8 .. FCH InitLate dispatch point
-  TpFchGppHotPlugging,                ///< B9 .. FCH GPP hot plug event
-  TpFchGppHotUnplugging,              ///< BA .. AFCH GPP hot unplug event
-  TpFchInitS3EarlyDispatching,        ///< BB .. FCH InitS3Early dispatch point
-  TpFchInitS3LateDispatching,         ///< BC .. FCH InitS3Late dispatch point
-  EndFchTestPoints,                   ///< BF End of TP range for FCH
-
-  // Interface test points
-  TpIfAmdInitResetEntry = 0xC0,       ///< C0 .. Entry to AmdInitReset
-  TpIfAmdInitResetExit,               ///< C1 .. Exiting from AmdInitReset
-  TpIfAmdInitRecoveryEntry,           ///< C2 .. Entry to AmdInitRecovery
-  TpIfAmdInitRecoveryExit,            ///< C3 .. Exiting from AmdInitRecovery
-  TpIfAmdInitEarlyEntry,              ///< C4 .. Entry to AmdInitEarly
-  TpIfAmdInitEarlyExit,               ///< C5 .. Exiting from AmdInitEarly
-  TpIfAmdInitPostEntry,               ///< C6 .. Entry to AmdInitPost
-  TpIfAmdInitPostExit,                ///< C7 .. Exiting from AmdInitPost
-  TpIfAmdInitEnvEntry,                ///< C8 .. Entry to AmdInitEnv
-  TpIfAmdInitEnvExit,                 ///< C9 .. Exiting from AmdInitEnv
-  TpIfAmdInitMidEntry,                ///< CA .. Entry to AmdInitMid
-  TpIfAmdInitMidExit,                 ///< CB .. Exiting from AmdInitMid
-  TpIfAmdInitLateEntry,               ///< CC .. Entry to AmdInitLate
-  TpIfAmdInitLateExit,                ///< CD .. Exiting from AmdInitLate
-  TpIfAmdS3SaveEntry,                 ///< CE .. Entry to AmdS3Save
-  TpIfAmdS3SaveExit,                  ///< CF .. Exiting from AmdS3Save
-  TpIfAmdInitResumeEntry,             ///< D0 .. Entry to AmdInitResume
-  TpIfAmdInitResumeExit,              ///< D1 .. Exiting from AmdInitResume
-  TpIfAmdS3LateRestoreEntry,          ///< D2 .. Entry to AmdS3LateRestore
-  TpIfAmdS3LateRestoreExit,           ///< D3 .. Exiting from AmdS3LateRestore
-  TpIfAmdLateRunApTaskEntry,          ///< D4 .. Entry to AmdS3LateRestore
-  TpIfAmdLateRunApTaskExit,           ///< D5 .. Exiting from AmdS3LateRestore
-  TpIfAmdReadEventLogEntry,           ///< D6 .. Entry to AmdReadEventLog
-  TpIfAmdReadEventLogExit,            ///< D7 .. Exiting from AmdReadEventLog
-  TpIfAmdGetApicIdEntry,              ///< D8 .. Entry to AmdGetApicId
-  TpIfAmdGetApicIdExit,               ///< D9 .. Exiting from AmdGetApicId
-  TpIfAmdGetPciAddressEntry,          ///< DA .. Entry to AmdGetPciAddress
-  TpIfAmdGetPciAddressExit,           ///< DB .. Exiting from AmdGetPciAddress
-  TpIfAmdIdentifyCoreEntry,           ///< DC .. Entry to AmdIdentifyCore
-  TpIfAmdIdentifyCoreExit,            ///< DD .. Exiting from AmdIdentifyCore
-  TpIfBeforeRunApFromIds,             ///< DE .. After IDS calls out to run code on an AP
-  TpIfAfterRunApFromIds,              ///< DF .. After IDS calls out to run code on an AP
-  TpIfBeforeGetIdsData,               ///< E0 .. Before IDS calls out to get IDS data
-  TpIfAfterGetIdsData,                ///< E1 .. After IDS calls out to get IDS data
-  TpIfBeforeAllocateHeapBuffer,       ///< E2 .. Before the heap manager calls out to allocate a buffer
-  TpIfAfterAllocateHeapBuffer,        ///< E3 .. After the heap manager calls out to allocate a buffer
-  TpIfBeforeDeallocateHeapBuffer,     ///< E4 .. Before the heap manager calls out to deallocate a buffer
-  TpIfAfterDeallocateHeapBuffer,      ///< E5 .. After the heap manager calls out to deallocate a buffer
-  TpIfBeforeLocateHeapBuffer,         ///< E6 .. Before the heap manager calls out to locate a buffer
-  TpIfAfterLocateHeapBuffer,          ///< E7 .. After the heap manager calls out to locate a buffer
-  TpIfBeforeRunApFromAllAps,          ///< E8 .. Before the BSP calls out to run code on an AP
-  TpIfAfterRunApFromAllAps,           ///< E9 .. After the BSP calls out to run code on an AP
-  TpIfBeforeRunApFromAllCore0s,       ///< EA .. Before the BSP calls out to run code on an AP
-  TpIfAfterRunApFromAllCore0s,        ///< EB .. After the BSP calls out to run code on an AP
-  TpIfBeforeAllocateS3SaveBuffer,     ///< EC .. Before the S3 save code calls out to allocate a buffer
-  TpIfAfterAllocateS3SaveBuffer,      ///< ED .. After the S3 save code calls out to allocate a buffer
-  TpIfBeforeAllocateMemoryS3SaveBuffer,  ///< EE .. Before the memory S3 save code calls out to allocate a buffer
-  TpIfAfterAllocateMemoryS3SaveBuffer,   ///< EF .. After the memory S3 save code calls out to allocate a buffer
-  TpIfBeforeLocateS3PciBuffer,        ///< F0 .. Before the memory code calls out to locate a buffer
-  TpIfAfterLocateS3PciBuffer,         ///< F1 .. After the memory code calls out to locate a buffer
-  TpIfBeforeLocateS3CPciBuffer,       ///< F2 .. Before the memory code calls out to locate a buffer
-  TpIfAfterLocateS3CPciBuffer,        ///< F3 .. After the memory code calls out to locate a buffer
-  TpIfBeforeLocateS3MsrBuffer,        ///< F4 .. Before the memory code calls out to locate a buffer
-  TpIfAfterLocateS3MsrBuffer,         ///< F5 .. After the memory code calls out to locate a buffer
-  TpIfBeforeLocateS3CMsrBuffer,       ///< F6 .. Before the memory code calls out to locate a buffer
-  TpIfAfterLocateS3CMsrBuffer,        ///< F7 .. After the memory code calls out to locate a buffer
-  TpReadyToBoot,                      ///< F8 .. Ready to boot event
-  // PMU test points
-  TpProcMemPmuFailed,                 ///< F9 .. Failed PMU training.
-  TpIfAmdS3FinalRestoreEntry,         ///< FA .. Entry to AmdS3FinalRestore
-  TpIfAmdS3FinalRestoreExit,          ///< FB .. Exiting from AmdS3FinalRestore
-
-  EndAgesaTps = 0xFF,                 ///< Last defined AGESA TP
-} AGESA_TP;
-
-///Ids Feat description
-typedef enum {
-  IDS_FEAT_UCODE_UPDATE = 0x0000,   ///< Feat for Ucode Update
-  IDS_FEAT_TARGET_PSTATE,           ///< Feat for Target Pstate
-  IDS_FEAT_POSTPSTATE,              ///< Feat for Post Pstate
-  IDS_FEAT_ECC_CTRL,                ///< Feat for Ecc Control
-  IDS_FEAT_ECC_SYMBOL_SIZE,         ///< Feat for Ecc symbol size
-  IDS_FEAT_DCT_ALLMEMCLK,           ///< Feat for all memory clock
-  IDS_FEAT_DCT_GANGMODE,            ///< Feat for Dct gang mode
-  IDS_FEAT_DCT_BURSTLENGTH,         ///< Feat for dct burst length
-  IDS_FEAT_DCT_POWERDOWN,           ///< Feat for dct power down
-  IDS_FEAT_DCT_DLLSHUTDOWN,         ///< Feat for dct dll shut down
-  IDS_FEAT_HDTOUT,                  ///< Feat for hdt out
-  IDS_FEAT_GNB_PLATFORMCFG,         ///< Feat for override GNB platform config
-  IDS_FEAT_CPB_CTRL,                ///< Feat for Config the Core peformance boost feature
-  IDS_FEAT_HTC_CTRL,                ///< Feat for Hardware Thermal Control
-  IDS_FEAT_MEMORY_MAPPING,          ///< Feat for Memory Mapping
-  IDS_FEAT_POWER_POLICY,            ///< Feat for Power Policy
-  IDS_FEAT_NV_TO_CMOS,              ///< Feat for Save BSP Nv to CMOS
-  IDS_FEAT_COMMON,                  ///< Common Feat
-  IDS_FEAT_END = 0xFF               ///< End of Common feat
-} IDS_FEAT;
-
-///Ids IDT table function ID
-typedef enum {
-  IDS_IDT_REPLACE_IDTR_FOR_BSC = 0x0000,   ///< Function ID for saving IDTR for BSC
-  IDS_IDT_RESTORE_IDTR_FOR_BSC,            ///< Function ID for restoring IDTR for BSC
-  IDS_IDT_UPDATE_EXCEPTION_VECTOR_FOR_AP,  ///< Function ID for updating exception vector
-} IDS_IDT_FUNC_ID;
-
-typedef IDS_STATUS IDS_COMMON_FUNC (
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader,
-  IN       IDS_NV_ITEM *IdsNvPtr
-  );
-
-typedef IDS_COMMON_FUNC *PIDS_COMMON_FUNC;
-
-/// Data Structure of IDS Feature block
-typedef  struct _IDS_FAMILY_FEAT_STRUCT {
-  IDS_FEAT  IdsFeat;      ///< Ids Feat ID
-  BOOLEAN IsBsp;          ///< swith for Bsp check
-  AGESA_IDS_OPTION IdsOption;   ///< IDS option
-  UINT64 CpuFamily;       ///<
-  PIDS_COMMON_FUNC  pf_idsoption;   ///<pointer to function
-} IDS_FAMILY_FEAT_STRUCT;
-
-
-/// Data Structure of IDS option
-typedef  struct _IDS_OPTION_STRUCT {
-  AGESA_IDS_OPTION idsoption;       ///< IDS option
-  PIDS_COMMON_FUNC  pf_idsoption;   ///<pointer to function
-} IDS_OPTION_STRUCT;
-
-/// Data Structure of IDS option table
-typedef struct _IDS_OPTION_STRUCT_TBL {
-  UINT8 version;      ///<Version of IDS option table
-  UINT16 size;        ///<Size of IDS option table
-  CONST IDS_OPTION_STRUCT  *pIdsOptionStruct; ///<pointer to array of  structure
-} IDS_OPTION_STRUCT_TBL;
-
-#define IDS_NV_TO_CMOS_LEN_BYTE   1
-#define IDS_NV_TO_CMOS_LEN_WORD   2
-#define IDS_NV_TO_CMOS_LEN_END   0xFF
-#define IDS_NV_TO_CMOS_ID_END   0xFFFF
-
-/// Data struct of set/get NV to/from CMOS
-typedef struct _IDS_NV_TO_CMOS {
-  UINT8 Length;       ///< Length of NV
-  UINT16 IDS_NV_ID; ///< IDS id
-} IDS_NV_TO_CMOS;
-
-IDS_STATUS
-AmdIdsCtrlDispatcher (
-  IN       AGESA_IDS_OPTION IdsOption,
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-IdsOptionCallout (
-  IN       UINTN                CallOutId,
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsHdtOutInit (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsHdtOutExit (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsHdtOutS3Exit (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsHdtOutS3ApExit (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsDebugPrint (
-  IN       UINT64 Flag,
-  IN       CHAR8 *Format,
-  IN       ...
-  );
-
-VOID
-AmdIdsDebugPrintTopology (
-  IN      CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsDebugPrintCpu (
-  IN      CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsDebugPrintMem (
-  IN      CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsDebugPrintGnb (
-  IN      CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsDebugPrintAll (
-  IN      CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsHdtOutBufferFlush (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-IdsMemTimeOut (
-  IN OUT   VOID *DataPtr
-  );
-
-VOID
-IdsAgesaTestPoint (
-  IN      AGESA_TP TestPoint,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-/**
- *  IDS Backend Function for ASSERT
- *
- * Halt execution with stop code display.  Stop Code is displayed on port 80, with rotation so that
- * it is visible on 8, 16, or 32 bit display.  The stop code is alternated with 0xDEAD on the display,
- * to help distinguish the stop code from a post code loop.
- * Additional features may be available if using simulation.
- *
- * @param[in]     FileCode    File code(define in FILECODE.h) mix with assert Line num.
- *
- * @retval         TRUE     No error
-**/
-BOOLEAN
-IdsAssert (
-  IN      UINT32 FileCode
-  );
-
-/**
- * The engine code for ASSERT MACRO
- *
- * Halt execution with stop code display.  Stop Code is displayed on port 80, with rotation so that
- * it is visible on 8, 16, or 32 bit display.  The stop code is alternated with 0xDEAD on the display,
- * to help distinguish the stop code from a post code loop.
- * Additional features may be available if using simulation.
- *
- * @param[in]     FileCode    File code(define in FILECODE.h) mix with assert Line num.
- *
- */
-BOOLEAN
-IdsErrorStop (
-  IN      UINT32 FileCode
-  );
-
-VOID
-IdsDelay (
-  IN      VOID
-  );
-
-BOOLEAN
-AmdHeapIntactCheck (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-IdsCarCorruptionCheck (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-IDS_STATUS
-IdsExceptionTrap (
-  IN       IDS_IDT_FUNC_ID IdsIdtFuncId,
-  IN       VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-IdsPerfTimestamp (
-  IN       UINT32 LineInFile,
-  IN       UINT32 Description,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-IdsPerfAnalyseTimestamp (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-
-#if IDSOPT_IDS_ENABLED == FALSE
-  #undef IEM_SKIP_CODE
-  #undef IEM_INSERT_CODE
-#endif
-#ifndef IEM_SKIP_CODE
-  #define IEM_SKIP_CODE(L)
-#endif
-#ifndef IEM_INSERT_CODE
-  #define IEM_INSERT_CODE(L, Fn, Parm)
-#endif
-
-#endif // _IDS_H_

pi/amd/00630F01/Include/IdsPerf.h

diff --git a/pi/amd/00630F01/Include/IdsPerf.h b/pi/amd/00630F01/Include/IdsPerf.h
deleted file mode 100644
index c11db8b..0000000
--- a/pi/amd/00630F01/Include/IdsPerf.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Integrated Debug Routines for performance analysis
- *
- * Contains AMD AGESA debug macros and functions for performance analysis
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _IDS_PERFORMANCE_DATA_POINT
-
-  #define _IDS_PERFORMANCE_DATA_POINT
-  #define IDS_PERF_VERSION 0x00010000ul  //version number 0.1.0.0
-/// Time points performance function used
-  typedef enum {
-    TP_BEGINPROCAMDINITEARLY             = 0x100,  ///< BeginProcAmdInitEarly
-    TP_ENDPROCAMDINITEARLY               = 0x101,  ///< EndProcAmdInitEarly
-    TP_BEGINAMDTOPOINITIALIZE            = 0x102,  ///< BeginAmdTopoInitialize
-    TP_ENDAMDTOPOINITIALIZE              = 0x103,  ///< EndAmdTopoInitialize
-    TP_BEGINGNBINITATEARLIER             = 0x104,  ///< BeginGnbInitAtEarlier
-    TP_ENDGNBINITATEARLIER               = 0x105,  ///< EndGnbInitAtEarlier
-    TP_BEGINAMDCPUEARLY                  = 0x106,  ///< BeginAmdCpuEarly
-    TP_ENDAMDCPUEARLY                    = 0x107,  ///< EndAmdCpuEarly
-    TP_BEGINGNBINITATEARLY               = 0x108,  ///< BeginGnbInitAtEarly
-    TP_ENDGNBINITATEARLY                 = 0x109,  ///< EndGnbInitAtEarly
-    TP_BEGINPROCAMDINITENV               = 0x10A,  ///< BeginProcAmdInitEnv
-    TP_ENDPROCAMDINITENV                 = 0x10B,  ///< EndProcAmdInitEnv
-    TP_BEGININITENV                      = 0x10C,  ///< BeginInitEnv
-    TP_ENDINITENV                        = 0x10D,  ///< EndInitEnv
-    TP_BEGINGNBINITATENV                 = 0x10E,  ///< BeginGnbInitAtEnv
-    TP_ENDGNBINITATENV                   = 0x10F,  ///< EndGnbInitAtEnv
-    TP_BEGINPROCAMDINITLATE              = 0x110,  ///< BeginProcAmdInitLate
-    TP_ENDPROCAMDINITLATE                = 0x111,  ///< EndProcAmdInitLate
-    TP_BEGINCREATSYSTEMTABLE             = 0x112,  ///< BeginCreatSystemTable
-    TP_ENDCREATSYSTEMTABLE               = 0x113,  ///< EndCreatSystemTable
-    TP_BEGINDISPATCHCPUFEATURESLATE      = 0x114,  ///< BeginDispatchCpuFeaturesLate
-    TP_ENDDISPATCHCPUFEATURESLATE        = 0x115,  ///< EndDispatchCpuFeaturesLate
-    TP_BEGINAMDCPULATE                   = 0x116,  ///< BeginAmdCpuLate
-    TP_ENDAMDCPULATE                     = 0x117,  ///< EndAmdCpuLate
-    TP_BEGINGNBINITATLATE                = 0x118,  ///< BeginGnbInitAtLate
-    TP_ENDGNBINITATLATE                  = 0x119,  ///< EndGnbInitAtLate
-    TP_BEGINPROCAMDINITMID               = 0x11A,  ///< BeginProcAmdInitMid
-    TP_ENDPROCAMDINITMID                 = 0x11B,  ///< EndProcAmdInitMid
-    TP_BEGININITMID                      = 0x11E,  ///< BeginInitMid
-    TP_ENDINITMID                        = 0x11F,  ///< EndInitMid
-    TP_BEGINGNBINITATMID                 = 0x120,  ///< BeginGnbInitAtMid
-    TP_ENDGNBINITATMID                   = 0x121,  ///< EndGnbInitAtMid
-    TP_BEGINPROCAMDINITPOST              = 0x122,  ///< BeginProcAmdInitPost
-    TP_ENDPROCAMDINITPOST                = 0x123,  ///< EndProcAmdInitPost
-    TP_BEGINGNBINITATPOST                = 0x124,  ///< BeginGnbInitAtPost
-    TP_ENDGNBINITATPOST                  = 0x125,  ///< EndGnbInitAtPost
-    TP_BEGINAMDMEMAUTO                   = 0x126,  ///< BeginAmdMemAuto
-    TP_ENDAMDMEMAUTO                     = 0x127,  ///< EndAmdMemAuto
-    TP_BEGINAMDCPUPOST                   = 0x128,  ///< BeginAmdCpuPost
-    TP_ENDAMDCPUPOST                     = 0x129,  ///< EndAmdCpuPost
-    TP_BEGINGNBINITATPOSTAFTERDRAM       = 0x12A,  ///< BeginGnbInitAtPostAfterDram
-    TP_ENDGNBINITATPOSTAFTERDRAM         = 0x12B,  ///< EndGnbInitAtPostAfterDram
-    TP_BEGINPROCAMDINITRESET             = 0x12C,  ///< BeginProcAmdInitReset
-    TP_ENDPROCAMDINITRESET               = 0x12D,  ///< EndProcAmdInitReset
-    TP_BEGININITRESET                    = 0x12E,  ///< BeginInitReset
-    TP_ENDINITRESET                      = 0x12F,  ///< EndInitReset
-    TP_BEGINHTINITRESET                  = 0x130,  ///< BeginHtInitReset
-    TP_ENDHTINITRESET                    = 0x131,  ///< EndHtInitReset
-    TP_BEGINPROCAMDINITRESUME            = 0x132,  ///< BeginProcAmdInitResume
-    TP_ENDPROCAMDINITRESUME              = 0x133,  ///< EndProcAmdInitResume
-    TP_BEGINAMDMEMS3RESUME               = 0x134,  ///< BeginAmdMemS3Resume
-    TP_ENDAMDMEMS3RESUME                 = 0x135,  ///< EndAmdMemS3Resume
-    TP_BEGINDISPATCHCPUFEATURESS3RESUME  = 0x136,  ///< BeginDispatchCpuFeaturesS3Resume
-    TP_ENDDISPATCHCPUFEATURESS3RESUME    = 0x137,  ///< EndDispatchCpuFeaturesS3Resume
-    TP_BEGINSETCORESTSCFREQSEL           = 0x138,  ///< BeginSetCoresTscFreqSel
-    TP_ENDSETCORESTSCFREQSEL             = 0x139,  ///< EndSetCoresTscFreqSel
-    TP_BEGINMEMFMCTMEMCLR_INIT           = 0x13A,  ///< BeginMemFMctMemClr_Init
-    TP_ENDNMEMFMCTMEMCLR_INIT            = 0x13B,  ///< EndnMemFMctMemClr_Init
-    TP_BEGINMEMBEFOREMEMDATAINIT         = 0x13C,  ///< BeginMemBeforeMemDataInit
-    TP_ENDMEMBEFOREMEMDATAINIT           = 0x13D,  ///< EndMemBeforeMemDataInit
-    TP_BEGINPROCAMDMEMAUTO               = 0x13E,  ///< BeginProcAmdMemAuto
-    TP_ENDPROCAMDMEMAUTO                 = 0x13F,  ///< EndProcAmdMemAuto
-    TP_BEGINMEMMFLOWC32                  = 0x140,  ///< BeginMemMFlowC32
-    TP_ENDMEMMFLOWC32                    = 0x141,  ///< EndMemMFlowC32
-    TP_BEGINMEMINITIALIZEMCT             = 0x142,  ///< BeginMemInitializeMCT
-    TP_ENDMEMINITIALIZEMCT               = 0x143,  ///< EndMemInitializeMCT
-    TP_BEGINMEMSYSTEMMEMORYMAPPING       = 0x144,  ///< BeginMemSystemMemoryMapping
-    TP_ENDMEMSYSTEMMEMORYMAPPING         = 0x145,  ///< EndMemSystemMemoryMapping
-    TP_BEGINMEMDRAMTRAINING              = 0x146,  ///< BeginMemDramTraining
-    TP_ENDMEMDRAMTRAINING                = 0x147,  ///< EndMemDramTraining
-    TP_BEGINMEMOTHERTIMING               = 0x148,  ///< BeginMemOtherTiming
-    TP_ENDMEMOTHERTIMING                 = 0x149,  ///< EndMemOtherTiming
-    TP_BEGINMEMUMAMEMTYPING              = 0x14A,  ///< BeginMemUMAMemTyping
-    TP_ENDMEMUMAMEMTYPING                = 0x14B,  ///< EndMemUMAMemTyping
-    TP_BEGINMEMMEMCLR                    = 0x14C,  ///< BeginMemMemClr
-    TP_ENDMEMMEMCLR                      = 0x14D,  ///< EndMemMemClr
-    TP_BEGINMEMMFLOWTN                   = 0x14E,  ///< BeginMemMFlowTN
-    TP_ENDMEMMFLOWTN                     = 0x14F,  ///< EndMemMFlowTN
-    TP_BEGINAGESAHOOKBEFOREDRAMINIT      = 0x150,  ///< BeginAgesaHookBeforeDramInit
-    TP_ENDAGESAHOOKBEFOREDRAMINIT        = 0x151,  ///< EndAgesaHookBeforeDramInit
-    TP_BEGINPROCMEMDRAMTRAINING          = 0x152,  ///< BeginProcMemDramTraining
-    TP_ENDPROCMEMDRAMTRAINING            = 0x153,  ///< EndProcMemDramTraining
-    TP_BEGINGNBINITATS3SAVE              = 0x154,  ///< BeginGnbInitAtS3Save
-    TP_ENDGNBINITATS3SAVE                = 0x155,  ///< EndGnbInitAtS3Save
-    TP_BEGINGNBLOADSCSDATA               = 0x156,  ///< BeginGnbLoadScsData
-    TP_ENDGNBLOADSCSDATA                 = 0x157,  ///< EndGnbLoadScsData
-    TP_BEGINGNBPCIETRAINING              = 0x158,  ///< BeginGnbPcieTraining
-    TP_ENDGNBPCIETRAINING                = 0x159,  ///< EndGnbPcieTraining
-    IDS_TP_END                                     ///< End of IDS TP list
-  } IDS_PERF_DATA;
-#endif

pi/amd/00630F01/Include/Options.h

diff --git a/pi/amd/00630F01/Include/Options.h b/pi/amd/00630F01/Include/Options.h
deleted file mode 100644
index 737dfb7..0000000
--- a/pi/amd/00630F01/Include/Options.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AGESA options structures
- *
- * Contains options control structures for the AGESA build options
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Core
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-
-#ifndef _OPTIONS_H_
-#define _OPTIONS_H_
-
-/**
- * Provide topology limits for loops and runtime, based on supported families.
- */
-typedef struct {
-  UINT32              PlatformNumberOfSockets;                  ///< The limit to the number of processors based on
-                                                                ///< supported families and other build options.
-  UINT32              PlatformNumberOfModules;                  ///< The limit to the number of modules in a processor, based
-                                                                ///< on supported families.
-} OPTIONS_CONFIG_TOPOLOGY;
-
-/**
- * Dispatch Table.
- *
- * The push high dispatcher uses this table to find what entries are currently in the build image.
- */
-typedef struct {
-  UINT32              FunctionId;                   ///< The function id specified.
-  IMAGE_ENTRY         EntryPoint;                   ///< The corresponding entry point to call.
-} DISPATCH_TABLE;
-
-
-#endif // _OPTIONS_H_

pi/amd/00630F01/Include/Topology.h

diff --git a/pi/amd/00630F01/Include/Topology.h b/pi/amd/00630F01/Include/Topology.h
deleted file mode 100644
index 489248b..0000000
--- a/pi/amd/00630F01/Include/Topology.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Topology interface definitions.
- *
- * Contains AMD AGESA internal interface for topology related data which
- * is consumed by code other than Topology Services init.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Core
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _TOPOLOGY_H_
-#define _TOPOLOGY_H_
-
-// Defines for limiting data structure maximum allocation and limit checking.
-#define MAX_NODES 1
-#define MAX_SOCKETS MAX_NODES
-#define MAX_DIES 1
-
-/**
- * Socket and Module to Node Map Item.
- * Provide the Node Id and core id range for each module in each processor.
- */
-typedef struct {
-  UINT8 Node;                 ///< The module's Node id.
-  UINT8 LowCore;              ///< The lowest processor core id for this module.
-  UINT8 HighCore;             ///< The highest processor core id for this module.
-  UINT8 EnabledComputeUnits;  ///< The value of Enabled for this processor module.
-  UINT8 DualCoreComputeUnits; ///< The value of DualCore for this processor module.
-  UINT8 TripleCoreComputeUnits;///< The value of TripleCore for this processor module.
-  UINT8 QuadCoreComputeUnits; ///< The value of QuadCore for this processor module.
-} SOCKET_DIE_TO_NODE_ITEM;
-
-/**
- * Socket and Module to Node Map.
- * This type is a pointer to the actual map, it can be used for a struct item or
- * for typecasting a heap buffer pointer.
- */
-typedef SOCKET_DIE_TO_NODE_ITEM (*SOCKET_DIE_TO_NODE_MAP)[MAX_SOCKETS][MAX_DIES];
-
-/**
- * Node id to Socket Die Map Item.
- */
-typedef struct {
-  UINT8 Socket;             ///< socket of the processor containing the Node.
-  UINT8 Die;                ///< the module in the processor which is Node.
-} NODE_TO_SOCKET_DIE_ITEM;
-
-/**
- * Node id to Socket Die Map.
- */
-typedef NODE_TO_SOCKET_DIE_ITEM (*NODE_TO_SOCKET_DIE_MAP)[MAX_NODES];
-
-#endif  // _TOPOLOGY_H_

pi/amd/00630F01/Porting.h

diff --git a/pi/amd/00630F01/Porting.h b/pi/amd/00630F01/Porting.h
deleted file mode 100644
index 9bafee1..0000000
--- a/pi/amd/00630F01/Porting.h
+++ /dev/null
@@ -1,299 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Describes compiler dependencies - to support several compile time environments
- *
- * Contains compiler environment porting descriptions
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Includes
- * @e \$Revision: 44324 $   @e \$Date: 2010-12-22 03:16:51 -0600 (Wed, 22 Dec 2010) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- *               2013 - 2014, Sage Electronic Engineering, LLC
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _PORTING_H_
-#define _PORTING_H_
-
-#if defined (_MSC_VER)
-  #pragma warning(push)
-  #pragma warning(disable: 4103 4001 4733)
-  // -----------------------------------------------------------------------
-  //   Define a code_seg MACRO
-  //
-  #define MAKE_AS_A_STRING(arg) #arg
-
-  #define CODE_GROUP(arg) __pragma (code_seg (MAKE_AS_A_STRING (.t##arg)))
-
-  #define RDATA_GROUP(arg) __pragma (const_seg (MAKE_AS_A_STRING (.d##arg)))
-  #define FUNC_ATTRIBUTE(arg) __declspec(arg)
-  //#include <intrin.h>  // MS has built-in functions
-
-  #if _MSC_VER < 900
-    // -----------------------------------------------------------------------
-    //    Assume MSVC 1.52C (16-bit)
-    //
-    //    NOTE: When using MSVC 1.52C use the following command line:
-    //
-    //       CL.EXE /G3 /AL /O1i /Fa <FILENAME.C>
-    //
-    //    This will produce 32-bit code in USE16 segment that is optimized for code
-    //    size.
-    typedef void          VOID;
-
-    // Create the universal 32, 16, and 8-bit data types
-    typedef unsigned long   UINTN;
-    typedef          long   INT32;
-    typedef unsigned long   UINT32;
-    typedef          int    INT16;
-    typedef unsigned int    UINT16;
-    typedef          char   INT8;
-    typedef unsigned char   UINT8;
-    typedef          char   CHAR8;
-    typedef unsigned short  CHAR16;
-
-    /// struct for 16-bit environment handling of 64-bit value
-    typedef struct _UINT64 {
-      IN OUT  UINT32 lo;      ///< lower 32-bits of 64-bit value
-      IN OUT  UINT32 hi;      ///< highest 32-bits of 64-bit value
-    } UINT64;
-
-    // Create the Boolean type
-    #define TRUE  1
-    #define FALSE 0
-    typedef unsigned char BOOLEAN;
-
-    #define CONST const
-    #define STATIC static
-    #define VOLATILE volatile
-    #define CALLCONV __pascal
-    #define ROMDATA __based( __segname( "_CODE" ) )
-    #define _16BYTE_ALIGN   __declspec(align(16))
-    #define _8BYTE_ALIGN
-    #define _4BYTE_ALIGN
-    #define _2BYTE_ALIGN
-    #define _1BYTE_ALIGN
-
-    // Force tight packing of structures
-    // Note: Entire AGESA (Project / Solution) will be using pragma pack 1
-    #pragma warning( disable : 4103 ) // Disable '#pragma pack' in .h warning
-    #pragma pack(1)
-
-    //   Disable WORD->BYTE automatic conversion warnings.  Example:
-    //   BYTE LocalByte;
-    //   void MyFunc(BYTE val);
-    //
-    //   MyFunc(LocalByte*2+1); // Warning, automatic conversion
-    //
-    //   The problem is any time math is performed on a BYTE, it is converted to a
-    //   WORD by MSVC 1.52c, and then when it is converted back to a BYTE, a warning
-    //   is generated.  Disable warning C4761
-    #pragma warning( disable : 4761 )
-
-  #else
-    // -----------------------------------------------------------------------
-    //   Assume a 32-bit MSVC++
-    //
-    // Disable the following warnings:
-    // 4100 - 'identifier' : unreferenced formal parameter
-    // 4276 - 'function' : no prototype provided; assumed no parameters
-    // 4214 - non standard extension used : bit field types other than int
-    // 4001 - nonstandard extension 'single line comment' was used
-    // 4142 - benign redefinition of type for following declaration
-    //      - typedef char    INT8
-    #if defined (_M_IX86)
-      #pragma warning (disable: 4100 4276 4214 4001 4142 4305 4306)
-
-      #ifndef VOID
-        typedef void VOID;
-      #endif
-    // Create the universal 32, 16, and 8-bit data types
-      #ifndef UINTN
-        typedef unsigned __w64 UINTN;
-      #endif
-      typedef          __int64 INT64;
-      typedef unsigned __int64 UINT64;
-      typedef          int   INT32;
-      typedef unsigned int   UINT32;
-      typedef          short INT16;
-      typedef unsigned short UINT16;
-      typedef          char  INT8;
-      typedef unsigned char  UINT8;
-      typedef          char  CHAR8;
-      typedef unsigned short CHAR16;
-
-    // Create the Boolean type
-      #ifndef TRUE
-        #define TRUE  1
-      #endif
-      #ifndef FALSE
-        #define FALSE 0
-      #endif
-      typedef unsigned char BOOLEAN;
-
-      // Force tight packing of structures
-      // Note: Entire AGESA (Project / Solution) will be using pragma pack 1
-      #pragma pack(1)
-
-      #define CONST const
-      #define STATIC static
-      #define VOLATILE volatile
-      #define CALLCONV
-      #define ROMDATA
-      #define _16BYTE_ALIGN __declspec(align(64))
-      #define _8BYTE_ALIGN
-      #define _4BYTE_ALIGN
-      #define _2BYTE_ALIGN
-      #define _1BYTE_ALIGN
-      #if _MSC_VER >= 1400
-        #define VA_ARGS_SUPPORTED
-      #endif
-      // 64 bit of compiler
-    #else
-      #pragma warning (disable: 4100 4276 4214 4001 4142 4305 4306 4366)
-
-      #ifndef VOID
-        typedef void VOID;
-      #endif
-      // Create the universal 32, 16, and 8-bit data types
-      #ifndef UINTN
-        typedef unsigned __int64 UINTN;
-      #endif
-      typedef          __int64 INT64;
-      typedef unsigned __int64 UINT64;
-      typedef          int   INT32;
-      typedef unsigned int   UINT32;
-      typedef          short INT16;
-      typedef unsigned short UINT16;
-      typedef          char  INT8;
-      typedef unsigned char  UINT8;
-      typedef          char  CHAR8;
-      typedef unsigned short CHAR16;
-
-      // Create the Boolean type
-      #ifndef TRUE
-        #define TRUE  1
-      #endif
-      #ifndef FALSE
-        #define FALSE 0
-      #endif
-      typedef unsigned char BOOLEAN;
-      #define _8BYTE_ALIGN
-      #define _4BYTE_ALIGN
-      #define _2BYTE_ALIGN
-      #define _1BYTE_ALIGN
-      // Force tight packing of structures
-      // Note: Entire AGESA (Project / Solution) will be using pragma pack 1
-      #pragma pack(1)
-
-      #define CONST const
-      #define STATIC static
-      #define VOLATILE volatile
-      #define CALLCONV
-      #define ROMDATA
-    #endif
-  #endif
-  // -----------------------------------------------------------------------
-  // End of MS compiler versions
-
-#elif defined __GNUC__
-
-  #define IN
-  #define OUT
-  #define STATIC static
-  #define VOLATILE volatile
-  #define TRUE 1
-  #define FALSE 0
-//  #undef CONST
-  #define CONST const
-  #define ROMDATA
-  #define CALLCONV
-  #define _16BYTE_ALIGN __attribute__ ((aligned (16)))
-  #define _8BYTE_ALIGN __attribute__ ((aligned (8)))
-  #define _4BYTE_ALIGN __attribute__ ((aligned (4)))
-  #define _2BYTE_ALIGN __attribute__ ((aligned (2)))
-  #define _1BYTE_ALIGN __attribute__ ((aligned (1)))
-
-  typedef unsigned char  BOOLEAN;
-  typedef   signed char  INT8;
-  typedef   signed short INT16;
-  typedef   signed long  INT32;
-  typedef   signed long  long INT64;
-  typedef          char  CHAR8;
-  typedef unsigned char  UINT8;
-  typedef unsigned short UINT16;
-  typedef unsigned long  UINT32;
-  typedef unsigned long  UINTN;
-  typedef unsigned long  long UINT64;
-  typedef void VOID;
-  //typedef unsigned long  size_t;
-  //typedef unsigned int   uintptr_t;
-  #define CODE_GROUP(arg)
-  #define RDATA_GROUP(arg)
-
-  //#include <intrin.h>                   // MingW-w64 library header
-  //#include <MyIntrinsics.h>               // AGESA temp file for GCC until support is added to MinGW
-
-#pragma pack(1)
-
-#define FUNC_ATTRIBUTE(arg) __attribute__((arg))
-#define MAKE_AS_A_STRING(arg) #arg
-#include <stddef.h>
-#include <gcc-intrin.h>
-
-#include <assert.h>
-#include <console/console.h>
-#include <console/loglevel.h>
-
-#ifndef NULL
-  #define NULL              ((void *)0)
-#endif
-
-#else
-  // -----------------------------------------------------------------------
-  // Unknown or unsupported compiler
-  //
-  #error "Unknown compiler in use"
-#endif
-
-// -----------------------------------------------------------------------
-// Common definitions for all compilers
-//
-
-//Support forward reference construct
-#define AGESA_FORWARD_DECLARATION(x) typedef struct _##x x
-
-// The following are use in conformance to the UEFI style guide
-#define IN
-#define OUT
-
-#endif // _PORTING_H_

pi/amd/00630F01/Proc/CPU/Family/cpuFamRegisters.h

diff --git a/pi/amd/00630F01/Proc/CPU/Family/cpuFamRegisters.h b/pi/amd/00630F01/Proc/CPU/Family/cpuFamRegisters.h
deleted file mode 100644
index b93d396..0000000
--- a/pi/amd/00630F01/Proc/CPU/Family/cpuFamRegisters.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Register Table Related Functions
- *
- * Contains the definition of the CPU CPUID MSRs and PCI registers with BKDG recommended values
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-#ifndef _CPU_FAM_REGISTERS_H_
-#define _CPU_FAM_REGISTERS_H_
-
-/*
- *--------------------------------------------------------------
- *
- *                      M O D U L E S    U S E D
- *
- *---------------------------------------------------------------
- */
-
-/*
- *--------------------------------------------------------------
- *
- *                      D E F I N I T I O N S  /  M A C R O S
- *
- *---------------------------------------------------------------
- */
-
-// This define should be equal to the total number of families
-// in the cpuFamily enum.
-#define MAX_CPU_FAMILIES    64
-#define MAX_CPU_REVISIONS   63    // Max Cpu Revisions Per Family
-
-// CPU_LOGICAL_ID.Family equates
-// Family 15h equates
-#define AMD_FAMILY_15_TN  0x0000000000000200ull
-#define AMD_FAMILY_TN     (AMD_FAMILY_15_TN)
-#define AMD_FAMILY_15_RL  (AMD_FAMILY_15_TN)
-#define AMD_FAMILY_RL     (AMD_FAMILY_15_TN)
-#define AMD_FAMILY_15_KV  0x0000000000000400ull
-#define AMD_FAMILY_KV     (AMD_FAMILY_15_KV)
-#define AMD_FAMILY_15     (AMD_FAMILY_15_TN | AMD_FAMILY_15_KV)
-
-// Family Unknown
-#define AMD_FAMILY_UNKNOWN 0x8000000000000000ull
-
-
-// Family 15h CPU_LOGICAL_ID.Revision equates
-// -------------------------------------
-
-  // Family 15h TN steppings
-#define AMD_F15_TN_A0    0x0000000000000100ull
-#define AMD_F15_TN_A1    0x0000000000000200ull
-#define AMD_F15_RL_A1    0x0000000000000400ull
-  // Family 15h KV steppings
-#define AMD_F15_KV_A0    0x0000000000100000ull
-#define AMD_F15_KV_A1    0x0000000000200000ull
-  // Family 15h Unknown stepping
-#define AMD_F15_UNKNOWN  0x8000000000000000ull
-
-#define AMD_F15_RL_Ax    (AMD_F15_RL_A1)
-#define AMD_F15_RL_ALL   (AMD_F15_RL_Ax)
-
-#define AMD_F15_TN_Ax    (AMD_F15_TN_A0 | AMD_F15_TN_A1)
-#define AMD_F15_TN_GT_A0 (AMD_F15_TN_ALL & ~AMD_F15_TN_A0)
-#define AMD_F15_TN_ONLY  (AMD_F15_TN_Ax)
-#define AMD_F15_TN_ALL   (AMD_F15_TN_Ax | AMD_F15_RL_ALL)
-
-#define AMD_F15_KV_Ax    (AMD_F15_KV_A0 | AMD_F15_KV_A1)
-#define AMD_F15_KV_ALL   (AMD_F15_KV_Ax)
-
-#define AMD_F15_ALL      (AMD_F15_TN_ALL | AMD_F15_KV_ALL)
-
-#endif      // _CPU_FAM_REGISTERS_H_
-

pi/amd/00630F01/Proc/CPU/Feature/cpuCacheInit.h

diff --git a/pi/amd/00630F01/Proc/CPU/Feature/cpuCacheInit.h b/pi/amd/00630F01/Proc/CPU/Feature/cpuCacheInit.h
deleted file mode 100644
index f353157..0000000
--- a/pi/amd/00630F01/Proc/CPU/Feature/cpuCacheInit.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Execution Cache Allocation functions.
- *
- * Contains code for doing Execution Cache Allocation for ROM space
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 192403 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-#ifndef _CPU_CACHE_INIT_H_
-#define _CPU_CACHE_INIT_H_
-
-/*----------------------------------------------------------------------------
- *   Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
- *
- *----------------------------------------------------------------------------
- */
-
-/*-----------------------------------------------------------------------------
- *                         DEFINITIONS AND MACROS
- *
- *-----------------------------------------------------------------------------
- */
-#define BSP_STACK_SIZE_64K        65536
-#define BSP_STACK_SIZE_32K        32768
-
-#define CORE0_STACK_SIZE          16384
-#define CORE1_STACK_SIZE          4096
-
-#define AMD_MTRR_FIX4K_BASE     0x268
-#define AMD_MTRR_VARIABLE_BASE6 0x20C
-#define AMD_MTRR_VARIABLE_BASE7 0x20E
-
-#define WP_IO 0x0505050505050505ull
-
-#define AGESA_CACHE_SIZE_REDUCED              1
-#define AGESA_CACHE_REGIONS_ACROSS_1MB        2
-#define AGESA_CACHE_REGIONS_ACROSS_4GB        3
-#define AGESA_REGION_NOT_ALIGNED_ON_BOUNDARY  4
-#define AGESA_CACHE_START_ADDRESS_LESS_D0000  5
-#define AGESA_THREE_CACHE_REGIONS_ABOVE_1MB   6
-#define AGESA_DEALLOCATE_CACHE_REGIONS        7
-
-/*----------------------------------------------------------------------------
- *                         TYPEDEFS, STRUCTURES, ENUMS
- *
- *----------------------------------------------------------------------------
- */
-/// Cache-As-Ram Executable region allocation modes
-typedef enum {
-  LimitedByL2Size,                            ///< Execution space must be allocated from L2
-  InfiniteExe,                                ///< Family can support unlimited Execution space
-  MaxCarExeMode                               ///< Used as limit or bounds check
-} CAR_EXE_MODE;
-
-/// Cache Information
-typedef struct {
-  IN       UINT32  BspStackSize;              ///< Stack size of BSP
-  IN       UINT32  Core0StackSize;            ///< Stack size of primary cores
-  IN       UINT32  Core1StackSize;            ///< Stack size of all non primary cores
-  IN       UINT32  MemTrainingBufferSize;     ///< Memory training buffer size
-  IN       UINT32  SharedMemSize;             ///< Shared memory size
-  IN       UINT64  VariableMtrrMask;          ///< Mask to apply before variable MTRR writes
-  IN       UINT64  VariableMtrrHeapMask;      ///< Mask to apply before variable MTRR writes for use in heap init.
-  IN       UINT64  HeapBaseMask;              ///< Mask used for the heap MTRR settings
-  IN CAR_EXE_MODE  CarExeType;                ///< Indicates which algorithm to use when allocating EXE space
-} CACHE_INFO;
-
-/// Merged memory region overlap type
-typedef enum {
-  EmptySet,                                   ///< One of the regions is zero length
-  Disjoint,                                   ///< The two regions do not touch
-  Adjacent,                                   ///< one region is next to the other, no gap
-  CommonEnd,                                  ///< regions overlap with a common end point
-  Extending,                                  ///< the 2nd region is extending the size of the 1st
-  Contained,                                  ///< the 2nd region is wholely contained inside the 1st
-  CommonStartContained,                       ///< the 2nd region is contained in the 1st with a common start
-  Identity,                                   ///< the two regions are the same
-  CommonStartExtending,                       ///< the 2nd region has same start as 1st, but is larger size
-  NotCombinable                               ///< the combined regions do not follow the cache block rules
-} OVERLAP_TYPE;
-
-/// Result of merging two memory regions for cache coverage
-typedef struct {
-  IN OUT  UINT32        MergedStartAddr;      ///< Start address of the merged regions
-  IN OUT  UINT32        MergedSize;           ///< Size of the merged regions
-     OUT  UINT32        OverlapAmount;        ///< the size of the overlapping section
-     OUT  OVERLAP_TYPE  OverlapType;          ///< indicates how the two regions overlap
-} MERGED_CACHE_REGION;
-
-/*----------------------------------------------------------------------------
- *                           FUNCTIONS PROTOTYPE
- *
- *----------------------------------------------------------------------------
- */
-AGESA_STATUS
-AllocateExecutionCache (
-  IN AMD_CONFIG_PARAMS *StdHeader,
-  IN EXECUTION_CACHE_REGION *AmdExeAddrMapPtr
-  );
-
-#endif  // _CPU_CACHE_INIT_H_
-

pi/amd/00630F01/Proc/CPU/cpuApicUtilities.h

diff --git a/pi/amd/00630F01/Proc/CPU/cpuApicUtilities.h b/pi/amd/00630F01/Proc/CPU/cpuApicUtilities.h
deleted file mode 100644
index ec4ad28..0000000
--- a/pi/amd/00630F01/Proc/CPU/cpuApicUtilities.h
+++ /dev/null
@@ -1,303 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU APIC related utility functions and structures
- *
- * Contains code that provides mechanism to invoke and control APIC communication.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-#ifndef _CPU_APIC_UTILITIES_H_
-#define _CPU_APIC_UTILITIES_H_
-
-
-/*---------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *---------------------------------------------------------------------------------------
- */
-
-
-/*---------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *---------------------------------------------------------------------------------------
- */
-#define APIC_CTRL_DWORD 0xF
-#define APIC_CTRL_REG (APIC_CTRL_DWORD << 4)
-#define APIC_CTRL_MASK 0xFF
-#define APIC_CTRL_SHIFT 0
-
-#define APIC_DATA_DWORD 0x38
-#define APIC_DATA_REG (APIC_DATA_DWORD << 4)
-
-#define APIC_REMOTE_READ_REG 0xC0
-#define APIC_CMD_LO_REG 0x300
-#define APIC_CMD_HI_REG 0x310
-
-// APIC_CMD_LO_REG bits
-#define CMD_REG_DELIVERY_STATUS 0x1000
-#define CMD_REG_TO_READ 0x300
-#define CMD_REG_REMOTE_RD_STS_MSK 0x30000ul
-#define CMD_REG_REMOTE_DELIVERY_PENDING 0x10000ul
-#define CMD_REG_REMOTE_DELIVERY_DONE 0x20000ul
-#define CMD_REG_TO_NMI 0x400
-
-// ExeFlags bits
-#define WAIT_FOR_CORE     0x00000001ul
-#define TASK_HAS_OUTPUT   0x00000002ul
-#define RETURN_PARAMS     0x00000004ul
-#define END_AT_HLT        0x00000008ul
-#define PASS_EARLY_PARAMS 0x00000010ul
-
-// Control Byte Values
-// bit 7 indicates the type of message
-// 1 - control message
-// 0 - launch + APIC ID = message to go
-//
-#define CORE_UNAVAILABLE            0xFF
-#define CORE_IDLE                   0xFE
-#define CORE_IDLE_HLT               0xFD
-#define CORE_ACTIVE                 0xFC
-#define CORE_NEEDS_PTR              0xFB
-#define CORE_NEEDS_DATA_SIZE        0xFA
-#define CORE_STS_DATA_READY_1       0xF9
-#define CORE_STS_DATA_READY_0       0xF8
-#define CORE_DATA_FLAGS_READY       0xF7
-#define CORE_DATA_FLAGS_ACKNOWLEDGE 0xF6
-#define CORE_DATA_PTR_READY         0xF5
-
-// Macro used to determine the number of dwords to transmit to the AP as input
-#define SIZE_IN_DWORDS(sInput) ((UINT32) (((sizeof (sInput)) + 3) >> 2))
-
-// IDT table
-#define IDT_DESC_PRESENT     0x80
-
-#define IDT_DESC_TYPE_LDT    0x02
-#define IDT_DESC_TYPE_CALL16 0x04
-#define IDT_DESC_TYPE_TASK   0x05
-#define IDT_DESC_TYPE_INT16  0x06
-#define IDT_DESC_TYPE_TRAP16 0x07
-#define IDT_DESC_TYPE_CALL32 0x0C
-#define IDT_DESC_TYPE_INT32  0x0E
-#define IDT_DESC_TYPE_TRAP32 0x0F
-/*---------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *---------------------------------------------------------------------------------------
- */
-typedef VOID (*PF_AP_TASK) (AMD_CONFIG_PARAMS *StdHeader);
-typedef VOID (*PF_AP_TASK_I) (VOID *, AMD_CONFIG_PARAMS *StdHeader);
-typedef VOID (*PF_AP_TASK_C) (AMD_CONFIG_PARAMS *StdHeader, AMD_CPU_EARLY_PARAMS *);
-typedef VOID (*PF_AP_TASK_IC) (VOID *, AMD_CONFIG_PARAMS *StdHeader, AMD_CPU_EARLY_PARAMS *);
-typedef UINT32 (*PF_AP_TASK_O) (AMD_CONFIG_PARAMS *StdHeader);
-typedef UINT32 (*PF_AP_TASK_IO) (VOID *, AMD_CONFIG_PARAMS *StdHeader);
-typedef UINT32 (*PF_AP_TASK_OC) (AMD_CONFIG_PARAMS *StdHeader, AMD_CPU_EARLY_PARAMS *);
-typedef UINT32 (*PF_AP_TASK_IOC) (VOID *, AMD_CONFIG_PARAMS *StdHeader, AMD_CPU_EARLY_PARAMS *);
-
-/// Function pointer union representing the eight different
-/// types of functions that an AP can be asked to perform.
-typedef union {
-  PF_AP_TASK     PfApTask;      ///< AMD_CONFIG_PARAMS *  input with no output
-  PF_AP_TASK_I   PfApTaskI;     ///< VOID * + AMD_CONFIG_PARAMS *  input with no output
-  PF_AP_TASK_C   PfApTaskC;     ///< AMD_CONFIG_PARAMS * + AMD_CPU_EARLY_PARAMS *  input with no output
-  PF_AP_TASK_IC  PfApTaskIC;    ///< VOID * + AMD_CONFIG_PARAMS * + AMD_CPU_EARLY_PARAMS *  input with no output
-  PF_AP_TASK_O   PfApTaskO;     ///< AMD_CONFIG_PARAMS * input with UINT32 output
-  PF_AP_TASK_IO  PfApTaskIO;    ///< VOID * + AMD_CONFIG_PARAMS * input with UINT32 output
-  PF_AP_TASK_OC  PfApTaskOC;    ///< AMD_CONFIG_PARAMS * + AMD_CPU_EARLY_PARAMS * input with UINT32 output
-  PF_AP_TASK_IOC PfApTaskIOC;   ///< VOID * + AMD_CONFIG_PARAMS * + AMD_CPU_EARLY_PARAMS *  input with UINT32 output
-} AP_FUNCTION_PTR;
-
-/// Input structure for ApUtilTransmitBuffer and ApUtilReceiveBuffer
-/// containing information about the data transfer from one core
-/// to another.
-typedef struct {
-  IN OUT   UINT16 DataSizeInDwords;   ///< Size of the data to be transferred rounded up to the nearest dword
-  IN OUT   VOID   *DataPtr;           ///< Pointer to the data
-  IN       UINT32 DataTransferFlags;  ///< Flags dictating certain aspects of the data transfer
-} AP_DATA_TRANSFER;
-
-/// Input structure for ApUtilRunCodeOnSocketCore.
-typedef struct _AP_TASK {
-  AP_FUNCTION_PTR  FuncAddress;   ///< Pointer to the function that the AP will run
-  AP_DATA_TRANSFER DataTransfer;  ///< Data transfer struct for optionally passing data that the AP should use as input to the function
-  UINT32           ExeFlags;      ///< Flags dictating certain aspects of the AP tasking sequence
-} AP_TASK;
-
-/// Input structure for ApUtilWaitForCoreStatus.
-typedef struct {
-  IN       UINT8  *Status;            ///< Pointer to the 1st element of an array of values to wait for
-  IN       UINT8  NumberOfElements;   ///< Number of elements in the array
-  IN       UINT32 RetryCount;         ///< Number of remote read cycles to complete before quitting
-  IN       UINT32 WaitForStatusFlags; ///< Flags dictating certain aspects of ApUtilWaitForCoreStatus
-} AP_WAIT_FOR_STATUS;
-
-/// Interrupt Descriptor Table entry
-typedef struct {
-  UINT16 OffsetLo;     ///< Lower 16 bits of the interrupt handler routine's offset
-  UINT16 Selector;     ///< Interrupt handler routine's selector
-  UINT8  Rsvd;         ///< Reserved
-  UINT8  Flags;        ///< Interrupt flags
-  UINT16 OffsetHi;     ///< Upper 16 bits of the interrupt handler routine's offset
-  UINT32 Offset64;     ///< High order 32 bits of the handler's offset needed when in 64 bit mode
-  UINT32 Rsvd64;       ///< Reserved
-} IDT_DESCRIPTOR;
-
-/// Structure needed to load the IDTR using the lidt instruction
-typedef struct {
-  UINT16 Limit;        ///< Interrupt Descriptor Table size
-  UINT64 Base;         ///< Interrupt Descriptor Table base address
-} IDT_BASE_LIMIT;
-
-#define WAIT_STATUS_EQUALITY 0x00000001ul
-#define WAIT_INFINITELY 0
-
-// Data Transfer Flags
-#define DATA_IN_MEMORY 0x00000001ul
-
-
-/*---------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *---------------------------------------------------------------------------------------
- */
-//                   These are   P U B L I C   functions, used by AGESA
-UINT8
-ApUtilReadRemoteControlByte (
-  IN       UINT32 TargetApicId,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-ApUtilWriteControlByte (
-  IN       UINT8 Value,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-UINT32
-ApUtilReadRemoteDataDword (
-  IN       UINT32 TargetApicId,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-ApUtilWriteDataDword (
-  IN       UINT32 Value,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-UINT32
-ApUtilRunCodeOnSocketCore (
-  IN       UINT8 Socket,
-  IN       UINT8 Core,
-  IN       AP_TASK *TaskPtr,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-UINT8
-ApUtilWaitForCoreStatus (
-  IN       UINT32 TargetApicId,
-  IN       AP_WAIT_FOR_STATUS *WaitParamsPtr,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-ApEntry (
-  IN       AMD_CONFIG_PARAMS *StdHeader,
-  IN       AMD_CPU_EARLY_PARAMS *CpuEarlyParams
-  );
-
-UINT32
-ApUtilTaskOnExecutingCore (
-  IN       AP_TASK *TaskPtr,
-  IN       AMD_CONFIG_PARAMS *StdHeader,
-  IN       VOID    *ConfigParams
-  );
-
-VOID
-ApUtilTransmitBuffer (
-  IN     UINT8   Socket,
-  IN     UINT8   Core,
-  IN     AP_DATA_TRANSFER *BufferInfo,
-  IN     AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-ApUtilReceiveBuffer (
-  IN       UINT8   Socket,
-  IN       UINT8   Core,
-  IN OUT   AP_DATA_TRANSFER  *BufferInfo,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-GetLocalApicIdForCore (
-  IN       UINT32 TargetSocket,
-  IN       UINT32 TargetCore,
-     OUT   UINT32 *LocalApicId,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-ApUtilRunCodeOnAllLocalCoresAtEarly (
-  IN       AP_TASK *TaskPtr,
-  IN       AMD_CONFIG_PARAMS *StdHeader,
-  IN       AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
-  );
-
-VOID
-RelinquishControlOfAllAPs (
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  );
-
-VOID
-GetCsSelector (
-  IN       UINT16 *Selector,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-SetIdtr (
-  IN       IDT_BASE_LIMIT *IdtInfo,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-GetIdtr (
-  IN       IDT_BASE_LIMIT *IdtInfo,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-#endif  /* _CPU_APIC_UTILITIES_H_ */
-

pi/amd/00630F01/Proc/CPU/cpuEarlyInit.h

diff --git a/pi/amd/00630F01/Proc/CPU/cpuEarlyInit.h b/pi/amd/00630F01/Proc/CPU/cpuEarlyInit.h
deleted file mode 100644
index 6512a21..0000000
--- a/pi/amd/00630F01/Proc/CPU/cpuEarlyInit.h
+++ /dev/null
@@ -1,290 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Reset API, and related functions and structures.
- *
- * Contains code that initialized the CPU after early reset.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-#ifndef _CPU_EARLY_INIT_H_
-#define _CPU_EARLY_INIT_H_
-
-
-/*---------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *---------------------------------------------------------------------------------------
- */
-AGESA_FORWARD_DECLARATION (CPU_CORE_LEVELING_FAMILY_SERVICES);
-
-/*---------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *---------------------------------------------------------------------------------------
- */
-//----------------------------------------------------------------------------
-//                         CPU BRAND ID TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-#define CPU_BRAND_ID_LENGTH     48            // Total number of characters supported
-#define LOW_NODE_DEVICEID       24
-#define NB_CAPABILITIES         0xE8          //Function 3 Registers
-//----------------------------------------------------------------------------
-//                         CPU MICROCODE PATCH TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/* All lengths are in bytes */
-#define MICROCODE_TRIADE_SIZE           28
-#define MICROCODE_HEADER_LENGTH         64
-
-/**
- * @page ucodeflag Microcode Patches Signature Guide
- *
- * We mark patches in the ROM with a signature so that they can be easily found
- *
- *   @anchor Microcode Patch Signature
- *   @li @e  Microcode Patch Signature @n
- *         Microcode patches are marked by adding a signature before patches in the ROM image to
- *         help identify where they are located.
- *         There're two kind of signatures. One is '$UCODE2K', it indicates there's a following patch with 2K size.
- *         The other is '$UCODE4K', it indicates there's a following patch with 4K size.
- *         If you want to know the patch level / equivalent ID, please consult the BKDG for patch header format.
- *
- *
- */
-/// Microcode patch flag for replacement
-typedef struct {
-  IN       UINT8   MicrocodePatchesFlag[8];  ///< a flag followed by microcode
-} MICROCODE_PATCHES_FLAG;
-
-#define UCODE_2K_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', '2', 'K'}};
-#define UCODE_4K_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', '4', 'K'}};
-#define UCODE_VS_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', 'V', 'S'}};
-
-/* Offsets in UCODE PATCH Header */
-/* Note: Header is 64 bytes      */
-#define DATE_CODE_OFFSET                0   // 4 bytes
-#define PATCH_ID                        4   // 4 bytes
-#define MICROCODE_PATH_DATA_ID          8   // 2 bytes
-#define MICROCODE_PATCH_DATA_LENGTH     10  // 1 byte
-#define MICROCODE_PATCH_DATA_CHECKSUM   12  // 4 bytes
-#define CHIPSET_1_DEVICE_ID             16  // 4 bytes
-#define CHIPSET_2_DEVICE_ID             20  // 4 bytes
-#define PROCESSOR_REV_ID                24  // 2 bytes
-#define CHIPSET_1_REV_ID                26  // 1 byte
-#define CHIPSET_2_REV_ID                27  // 1 byte
-
-#define MICROCODE_PATCH_2K_SIZE    2048
-#define MICROCODE_PATCH_4K_SIZE    4096
-/*---------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *---------------------------------------------------------------------------------------
- */
-//----------------------------------------------------------------------------
-//                         CPU BRAND ID TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// A structure representing BrandId[15:0] from
-/// CPUID Fn8000_0001_EBX
-typedef struct {
-  UINT8           String1:4;   ///< An index to a string value used to create the name string
-  UINT8           String2:4;   ///< An index to a string value used to create the name string
-  UINT8           Page:1;      ///< An index to the appropriate page for the String1, String2, and Model values
-  UINT8           Model:7;     ///< A field used to create the model number in the name string
-  UINT8           Socket:4;    ///< Specifies the package type
-  UINT8           Cores:4;     ///< Identifies how many physical cores are present
-} AMD_CPU_BRAND_DATA;
-
-/// A structure containing string1 and string2 values
-/// as well as information pertaining to their usage
-typedef struct {
-  IN       UINT8  Cores;              ///< Appropriate number of physical cores
-  IN       UINT8  Page;               ///< This string's page number
-  IN       UINT8  Index;              ///< String index
-  IN       UINT8  Socket;             ///< Package type information
-  IN       CONST CHAR8 *Stringstart;  ///< The literal string
-  IN       UINT8  Stringlength;       ///< Number of characters in the string
-} AMD_CPU_BRAND;
-
-/// An entire CPU brand table.
-typedef struct {
-  UINT8 NumberOfEntries;        ///< The number of entries in the table.
-  CONST AMD_CPU_BRAND  *Table;  ///< The table entries.
-} CPU_BRAND_TABLE;
-
-//----------------------------------------------------------------------------
-//                         CPU MICROCODE PATCH TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// Microcode patch field definitions
-typedef struct {
-  UINT32   DateCode;                   ///< Date of patch creation
-  UINT32   PatchID;                    ///< Patch level
-  UINT16   MicrocodePatchDataID;       ///< Internal use only
-  UINT8    MicrocodePatchDataLength;   ///< Internal use only
-  UINT8    InitializationFlag;         ///< Internal use only
-  UINT32   MicrocodePatchDataChecksum; ///< Doubleword sum of data block
-  UINT32   Chipset1DeviceID;           ///< Device ID of 1st Chipset device to match
-  UINT32   Chipset2DeviceID;           ///< Device ID of 2nd Chipset device to match
-  UINT16   ProcessorRevisionID;        ///< Equivalent ID
-  UINT8    Chipset1RevisionID;         ///< Revision level of 1st Chipset device to match
-  UINT8    Chipset2RevisionID;         ///< Revision level of 2nd Chipset device to match
-  UINT8    BiosApiRevision;            ///< BIOS INT 15 API revision required
-  UINT8    Reserved1[3];               ///< Reserved
-  UINT32   MatchRegister0;             ///< Internal use only
-  UINT32   MatchRegister1;             ///< Internal use only
-  UINT32   MatchRegister2;             ///< Internal use only
-  UINT32   MatchRegister3;             ///< Internal use only
-  UINT32   MatchRegister4;             ///< Internal use only
-  UINT32   MatchRegister5;             ///< Internal use only
-  UINT32   MatchRegister6;             ///< Internal use only
-  UINT32   MatchRegister7;             ///< Internal use only
-  UINT8    PatchDataBlock[896];        ///< Raw patch data
-  UINT8    Reserved2[896];             ///< Reserved
-  UINT8    X86CodePresent;             ///< Boolean to determine if executable code exists
-  UINT8    X86CodeEntry[191];          ///< Code to execute if X86CodePresent != 0
-} MICROCODE_PATCH;
-
-/// Two kilobyte array containing the raw
-/// microcode patch binary data
-typedef struct {
-  IN       UINT8   MicrocodePatches[MICROCODE_PATCH_2K_SIZE];  ///< 2k UINT8 elements
-} MICROCODE_PATCHES;
-
-/// Four kilobyte array containing the raw
-/// microcode patch binary data
-typedef struct {
-  IN       UINT8   MicrocodePatches[MICROCODE_PATCH_4K_SIZE];  ///< 4k UINT8 elements
-} MICROCODE_PATCHES_4K;
-
-/**
- *  Set down core register
- *
- *  @CpuServiceInstances
- *
- * @param[in]      FamilySpecificServices  The current Family Specific Services.
- * @param[in]      Socket        Socket ID.
- * @param[in]      Module        Module ID in socket.
- * @param[in]      LeveledCores  Number of core.
- * @param[in]      CoreLevelMode Core level mode.
- * @param[in]      StdHeader     Header for library and services.
- *
- * @retval         TRUE          Down Core register is updated.
- * @retval         FALSE         Down Core register is not updated.
- */
-typedef BOOLEAN (F_CPU_SET_DOWN_CORE_REGISTER) (
-  IN       CPU_CORE_LEVELING_FAMILY_SERVICES  *FamilySpecificServices,
-  IN       UINT32 *Socket,
-  IN       UINT32 *Module,
-  IN       UINT32 *LeveledCores,
-  IN       CORE_LEVELING_TYPE CoreLevelMode,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-/// Reference to a method
-typedef F_CPU_SET_DOWN_CORE_REGISTER *PF_CPU_SET_DOWN_CORE_REGISTER;
-
-/**
- * Provide the interface to the Core Leveling Family Specific Services.
- *
- * Use the methods or data in this struct to adapt the feature code to a specific cpu family or model (or stepping!).
- * Each supported Family must provide an implementation for all methods in this interface, even if the
- * implementation is a CommonReturn().
- */
-struct _CPU_CORE_LEVELING_FAMILY_SERVICES {             // See Forward Declaration above
-  UINT16          Revision;                             ///< Interface version
-  // Public Methods.
-  PF_CPU_SET_DOWN_CORE_REGISTER SetDownCoreRegister;    ///< Method: Set down core register.
-};
-
-/*---------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *---------------------------------------------------------------------------------------
- */
-
-//                   These are   P U B L I C   functions, used by IBVs
-AGESA_STATUS
-AmdCpuEarly (
-  IN       AMD_CONFIG_PARAMS      *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig
-  );
-
-//                   These are   P U B L I C   functions, used by AGESA
-AGESA_STATUS
-PmInitializationAtEarly (
-  IN       AMD_CPU_EARLY_PARAMS *CpuEarlyParams,
-  IN       AMD_CONFIG_PARAMS    *StdHeader
-  );
-
-BOOLEAN
-LoadMicrocodePatch (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-BOOLEAN
-GetPatchEquivalentId (
-  IN OUT   UINT16             *ProcessorEquivalentId,
-  IN OUT   AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-BOOLEAN
-ValidateMicrocode (
-  IN       MICROCODE_PATCH    *MicrocodePatchPtr,
-  IN       UINT16             ProcessorEquivalentId,
-  IN OUT   AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-VOID
-GetMicrocodeVersion (
-     OUT   UINT32             *pMicrocodeVersion,
-  IN OUT   AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-VOID
-AmdCpuEarlyInitializer (
-  IN       AMD_CONFIG_PARAMS      *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig,
-  IN OUT   AMD_CPU_EARLY_PARAMS   *CpuEarlyParamsPtr
-  );
-
-VOID
-McaInitialization (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-#endif  // _CPU_EARLY_INIT_H_
-

pi/amd/00630F01/Proc/CPU/cpuLateInit.h

diff --git a/pi/amd/00630F01/Proc/CPU/cpuLateInit.h b/pi/amd/00630F01/Proc/CPU/cpuLateInit.h
deleted file mode 100644
index 844b343..0000000
--- a/pi/amd/00630F01/Proc/CPU/cpuLateInit.h
+++ /dev/null
@@ -1,1141 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Late Init API functions Prototypes.
- *
- * Contains code for doing any late CPU initialization
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-#ifndef _CPU_LATE_INIT_H_
-#define _CPU_LATE_INIT_H_
-
-#include "Filecode.h"
-
-//  Forward declaration needed for multi-structure mutual references.
-AGESA_FORWARD_DECLARATION (PROC_FAMILY_TABLE);
-/*----------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-//----------------------------------------------------------------------------
-//                         DMI DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-#define AP_LATE_TASK_GET_TYPE4_TYPE7 (PROC_CPU_FEATURE_CPUDMI_FILECODE)
-// SMBIOS constant definition
-#define CENTRAL_PROCESSOR       0x03
-#define EXTERNAL_CLOCK_DFLT     200
-#define EXTERNAL_CLOCK_100MHZ   100
-#define P_FAMILY_UNKNOWN        0x02
-#define P_ENGINEERING_SAMPLE    0x00
-#define P_CHARACTERISTICS       0x4
-#define CACHE_CFG_L1            0x180
-#define CACHE_CFG_L2            0x181
-#define CACHE_CFG_L3            0x182
-#define SRAM_TYPE               0x10
-#define ERR_CORRECT_TYPE        0x06
-#define CACHE_TYPE              0x05
-#define DMI_ASSOCIATIVE_OTHER   0x01
-#define DMI_ASSOCIATIVE_UNKNOWN 0x02
-#define DMI_ASSOCIATIVE_DIRECT_MAPPED   0x03
-#define DMI_ASSOCIATIVE_2_WAY   0x04
-#define DMI_ASSOCIATIVE_4_WAY   0x05
-#define DMI_ASSOCIATIVE_FULLY   0x06
-#define DMI_ASSOCIATIVE_8_WAY   0x07
-#define DMI_ASSOCIATIVE_16_WAY  0x08
-#define DMI_ASSOCIATIVE_12_WAY  0x09
-#define DMI_ASSOCIATIVE_24_WAY  0x0A
-#define DMI_ASSOCIATIVE_32_WAY  0x0B
-#define DMI_ASSOCIATIVE_48_WAY  0x0C
-#define DMI_ASSOCIATIVE_64_WAY  0x0D
-#define DMI_ASSOCIATIVE_20_WAY  0x0E
-#define SOCKET_POPULATED        0x40
-#define CPU_STATUS_UNKNOWN      0x00
-#define CPU_STATUS_ENABLED      0x01
-
-// Processor Upgrade Definition
-#define P_UPGRADE_UNKNOWN       0x02
-#define P_UPGRADE_NONE          0x06
-#define P_UPGRADE_S1GX          0x16
-#define P_UPGRADE_AM2           0x17
-#define P_UPGRADE_F1207         0x18
-#define P_UPGRADE_G34           0x1A
-#define P_UPGRADE_AM3           0x1B
-#define P_UPGRADE_C32           0x1C
-#define P_UPGRADE_FS1           0x27
-#define P_UPGRADE_FM1           0x29
-#define P_UPGRADE_FM2           0x2A
-
-//----------------------------------------------------------------------------
-//                         SRAT DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-#define NorthbridgeCapabilities 0xE8
-#define DRAMBase0 0x40
-#define MMIOBase0 0x80
-#define TOP_MEM 0xC001001Aul
-#define LOW_NODE_DEVICEID 24
-#define LOW_APICID 0
-
-
-// Miscellaneous AMD related values
-#define MAX_NUMBER_NODES  8
-
-// Flags
-#define ENABLED         1   // Bit 0
-#define DISABLED        0   // Bit 0
-#define HOTPLUGGABLE    2   // Bit 1
-
-// Affinity Entry Structures
-#define AE_APIC     0
-#define AE_MEMORY   1
-
-
-// Memory Types
-#define TYPE_MEMORY   1
-#define TYPE_RESERVED 2
-#define TYPE_ACPI     3
-#define TYPE_NVS      4
-
-//----------------------------------------------------------------------------
-//                         SLIT DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-#define AMD_ACPI_SLIT_SOCKET_NUM_LENGTH   8
-
-//----------------------------------------------------------------------------
-//                         CDIT DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-#define AMD_ACPI_CDIT_NUM_DOMAINS_LENGTH   4 // Num domains is a 4-bytes unsigned integer
-
-
-//----------------------------------------------------------------------------
-//                         P-STATE DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-//-------------------------------------
-//          ERROR Codes
-//-------------------------------------
-#define     NO_ERROR                    0x0
-#define     USER_DISABLE_ERROR          0x01            // User disabled SSDT generation
-#define     CORES_MISSMATCH_PSS_ERROR   0x02            // No PSS match
-#define     PNOW_SUPPORT_ERROR          0x04            // One of the Cores do not support PNOW!
-#define     PWR_FREQ_MATCH_ERROR        0x08            // FREQ and PWR mismatch
-#define     NO_PSS_SIZE_ERROR           0x10            // Error in PSS Size
-#define     INVALID_PSTATE_ERROR        0x20            // Invalid Max or only 1 P-State available
-#define     NO_PSS_ENTRY                0x0FFFFul
-#define     INVALID_FREQ                0x0FFFFFFFFul
-
-//-------------------------
-// Default definitions
-// AMD BKDG default values
-//-------------------------
-#define DEFAULT_ISOCH_RELIEF_TIME       IRT_80uS
-#define DEFAULT_RAMP_VOLTAGE_OFFSET     RVO_50mV
-#define DEFAULT_MAX_VOLTAGE_STEP        MVS_25mV
-#define DEFAULT_PERF_PRESENT_CAP        0           // default for Desktop
-#define DEFAULT_VOLTAGE_STABLE_TIME     (100 / 20)  // 100uS
-#define DEFAULT_PLL_LOCK_TIME           2           // 2uS
-#define DEFAULT_TRANSITION_LATENCY      100         // 100uS
-#define DEFAULT_BUS_MASTER_LATENCY      9           // 9uS
-#define DEFAULT_CPU_SCOPE_NUMBER        "0UPC"
-
-// Defines for Common ACPI
-// -----------------------------
-#define     SCOPE_OPCODE            0x10
-#define     NAME_OPCODE             0x08
-#define     METHOD_OPCODE           0x14
-#define     PACKAGE_OPCODE          0x12
-#define     BUFFER_OPCODE           0x11
-#define     BYTE_PREFIX_OPCODE      0x0A
-#define     WORD_PREFIX_OPCODE      0x0B
-#define     DWORD_PREFIX_OPCODE     0x0C
-#define     RETURN_OPCODE           0xA4
-#define     ACPI_BUFFER             0x080A0B11ul
-
-// Generic Register Descriptor (GDR) Fields
-#define     GDR_ASI_SYSTEM_IO       0x01    // Address Space ID
-#define     GDR_ASZ_BYTE_ACCESS     0x01    // Address Size
-
-// Defines for ACPI Scope Table
-// ----------------------------
-#define     SCOPE_LENGTH    (SCOPE_STRUCT_SIZE + \
-                            PCT_STRUCT_SIZE + \
-                            PSS_HEADER_STRUCT_SIZE + \
-                            PSS_BODY_STRUCT_SIZE + \
-                            PPC_HEADER_BODY_STRUCT_SIZE)
-#define     SCOPE_VALUE1    0x5C
-#define     SCOPE_VALUE2    0x2E
-#define     SCOPE_NAME__    '_'
-#define     SCOPE_NAME_P    'P'
-#define     SCOPE_NAME_R    'R'
-#define     SCOPE_NAME_S    'S'
-#define     SCOPE_NAME_B    'B'
-#define     SCOPE_NAME_C    'C'
-#define     SCOPE_NAME_U    'U'
-#define     SCOPE_NAME_0    '0'
-#define     SCOPE_NAME_1    '1'
-#define     SCOPE_NAME_2    '2'
-#define     SCOPE_NAME_3    '3'
-#define     SCOPE_NAME_A    'A'
-
-#ifdef OEM_SCOPE_NAME
-  #if (OEM_SCOPE_NAME > 'Z') || (OEM_SCOPE_NAME < 'A')
-    #error "OEM_SCOPE_NAME: it should be only one char long AND a valid letter (A~Z)"
-  #endif
-  #define     SCOPE_NAME_VALUE    OEM_SCOPE_NAME
-#else
-  #define     SCOPE_NAME_VALUE    SCOPE_NAME_C
-#endif  // OEM_SCOPE_NAME
-
-#ifdef OEM_SCOPE_NAME1
-  #if (!(((OEM_SCOPE_NAME1 >= 'A') && (OEM_SCOPE_NAME1 <= 'Z')) || \
-         ((OEM_SCOPE_NAME1 >= '0') && (OEM_SCOPE_NAME1 <= '9')) || \
-         (OEM_SCOPE_NAME1 == '_')))
-    #error "OEM_SCOPE_NAME1: it should be only one char long AND a valid letter (0~9, A~F)"
-  #endif
-  #define     SCOPE_NAME_VALUE1   OEM_SCOPE_NAME1
-#else
-  #define     SCOPE_NAME_VALUE1   SCOPE_NAME_0
-#endif  // OEM_SCOPE_NAME
-
-// Defines for PCT Control and Status Table
-// ----------------------------------------
-#define     PCT_NAME__                  '_'
-#define     PCT_NAME_P                  'P'
-#define     PCT_NAME_C                  'C'
-#define     PCT_NAME_T                  'T'
-#define     PCT_VALUE1                  0x11022C12ul
-#define     PCT_VALUE2                  0x0A14
-#define     PCT_VALUE3                  0x11
-#define     GENERIC_REG_DESCRIPTION     0x82
-#define     PCT_LENGTH                  0x0C
-#define     PCT_ADDRESS_SPACE_ID        0x7F
-#define     PCT_REGISTER_BIT_WIDTH      0x40
-#define     PCT_REGISTER_BIT_OFFSET     0x00
-#define     PCT_RESERVED                0x00
-#define     PCT_CONTROL_REG_LO          0xC0010062ul
-#define     PCT_CONTROL_REG_HI          0x00
-#define     PCT_VALUE4                  0x14110079ul
-#define     PCT_VALUE5                  0x110A
-#define     PCT_STATUS_REG_LO           0x00
-#define     PCT_STATUS_REG_HI           0x00
-#define     PCT_VALUE6                  0x0079
-
-
-// Defines for PSS Header Table
-// ----------------------------
-#define     PSS_NAME__          '_'
-#define     PSS_NAME_X          'X'
-#define     PSS_NAME_P          'P'
-#define     PSS_NAME_S          'S'
-#define     PSS_LENGTH          (sizeof pssBodyStruct + 3)
-#define     NUM_OF_ITEMS_IN_PSS 0x00
-
-
-// Defines for PSS Header Table
-// ----------------------------
-#define     PSS_PKG_LENGTH              0x20  // PSS_BODY_STRUCT_SIZE - 1
-#define     PSS_NUM_OF_ELEMENTS         0x06
-#define     PSS_FREQUENCY               0x00
-#define     PSS_POWER                   0x00
-#define     PSS_TRANSITION_LATENCY      DEFAULT_TRANSITION_LATENCY
-#define     PSS_BUS_MASTER_LATENCY      DEFAULT_BUS_MASTER_LATENCY
-#define     PSS_CONTROL                 ((DEFAULT_ISOCH_RELIEF_TIME << 30) + \
-                                         (DEFAULT_RAMP_VOLTAGE_OFFSET << 28) + \
-                                         (DEFAULT_EXT_TYPE << 27) + \
-                                         (DEFAULT_PLL_LOCK_TIME << 20) + \
-                                         (DEFAULT_MAX_VOLTAGE_STEP << 18) + \
-                                         (DEFAULT_VOLTAGE_STABLE_TIME << 11) + \
-                                         (PSS_VID << 6) + PSS_FID)
-#define     PSS_STATUS                  (DEFAULT_EXTENDED_TYPE << 11) + (PSS_VID << 6) + (PSS_FID)
-
-// Defines for XPSS Header Table
-// ----------------------------
-#define     XPSS_PKG_LENGTH             0x47  // XPSS_BODY_STRUCT_SIZE - 1
-#define     XPSS_NUM_OF_ELEMENTS        0x08
-#define     XPSS_ACPI_BUFFER            0x080A0B11ul
-
-
-// Defines for PPC Header Table
-// ----------------------------
-#define     PPC_NAME__  '_'
-#define     PPC_NAME_P  'P'
-#define     PPC_NAME_C  'C'
-#define     PPC_NAME_V  'V'
-#define     PPC_METHOD_FLAGS  0x00;
-#define     PPC_VALUE1  0x0A;
-
-// Defines for PSD Header Table
-// ----------------------------
-#define     PSD_NAME__          '_'
-#define     PSD_NAME_P          'P'
-#define     PSD_NAME_S          'S'
-#define     PSD_NAME_D          'D'
-#define     PSD_HEADER_LENGTH   (PSD_BODY_STRUCT_SIZE + 2)
-#define     PSD_VALUE1          0x01
-
-
-// Defines for PSD Header Table
-// ----------------------------
-#define     PSD_PKG_LENGTH                   (PSD_BODY_STRUCT_SIZE - 1)
-#define     NUM_OF_ENTRIES                   0x05
-#define     PSD_NUM_OF_ENTRIES               0x05
-#define     PSD_REVISION                     0x00
-#define     PSD_DEPENDENCY_DOMAIN            0x00
-#define     PSD_COORDINATION_TYPE_HW_ALL     0xFE
-#define     PSD_COORDINATION_TYPE_SW_ANY     0xFD
-#define     PSD_COORDINATION_TYPE_SW_ALL     0xFC
-#define     PSD_NUM_OF_PROCESSORS            0x01
-#define     PSD_TWO_CORES_PER_COMPUTE_UNIT   0x02
-#define     PSD_THREE_CORES_PER_COMPUTE_UNIT 0x03
-#define     PSD_FOUR_CORES_PER_COMPUTE_UNIT  0x04
-
-
-#define     CUSTOM_PSTATE_FLAG      0x55
-#define     PSTATE_FLAG_1           0x55
-#define     TARGET_PSTATE_FLAG      0xAA
-#define     PSTATE_FLAG_2           0xAA
-
-/*----------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *----------------------------------------------------------------------------------------
- */
-//----------------------------------------------------------------------------
-//                         ACPI P-States AML TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-
-//--------------------------------------------
-//              AML code definition
-//                   (Scope)
-//---------------------------------------------
-/// SCOPE
-typedef struct _SCOPE {
-  UINT8   ScopeOpcode;                  ///< Opcode
-  UINT16  ScopeLength;                  ///< Scope Length
-  UINT8   ScopeValue1;                  ///< Value1
-  UINT8   ScopeValue2;                  ///< Value2
-  UINT8   ScopeNamePt1a__;              ///< Name Pointer
-  UINT8   ScopeNamePt1a_P;              ///< Name Pointer
-  UINT8   ScopeNamePt1a_R;              ///< Name Pointer
-  UINT8   ScopeNamePt1b__;              ///< Name Pointer
-  UINT8   ScopeNamePt2a_C;              ///< Name Pointer
-  UINT8   ScopeNamePt2a_P;              ///< Name Pointer
-  UINT8   ScopeNamePt2a_U;              ///< Name Pointer
-  UINT8   ScopeNamePt2a_0;              ///< Name Pointer
-} SCOPE;
-#define     SCOPE_STRUCT_SIZE   13      // 13 Bytes
-
-//--------------------------------------------
-//              AML code definition
-//             (PCT Header and Body)
-//---------------------------------------------
-
-///Performance Control Header
-typedef struct _PCT_HEADER_BODY {
-  UINT8   NameOpcode;                   ///< Opcode
-  UINT8   PctName_a__;                  ///< String "_"
-  UINT8   PctName_a_P;                  ///< String "P"
-  UINT8   PctName_a_C;                  ///< String "C"
-  UINT8   PctName_a_T;                  ///< String "T"
-  UINT32  Value1;                       ///< Value1
-  UINT16  Value2;                       ///< Value2
-  UINT8   Value3;                       ///< Value3
-  UINT8   GenericRegDescription1;       ///< Generic Reg Description
-  UINT16  Length1;                      ///< Length1
-  UINT8   AddressSpaceId1;              ///< PCT Address Space ID
-  UINT8   RegisterBitWidth1;            ///< PCT Register Bit Width
-  UINT8   RegisterBitOffset1;           ///< PCT Register Bit Offset
-  UINT8   Reserved1;                    ///< Reserved
-  UINT32  ControlRegAddressLo;          ///< Control Register Address Low
-  UINT32  ControlRegAddressHi;          ///< Control Register Address High
-  UINT32  Value4;                       ///< Value4
-  UINT16  Value5;                       ///< Value 5
-  UINT8   GenericRegDescription2;       ///< Generic Reg Description
-  UINT16  Length2;                      ///< Length2
-  UINT8   AddressSpaceId2;              ///< PCT Address Space ID
-  UINT8   RegisterBitWidth2;            ///< PCT Register Bit Width
-  UINT8   RegisterBitOffset2;           ///< PCT Register Bit Offset
-  UINT8   Reserved2;                    ///< Reserved
-  UINT32  StatusRegAddressLo;           ///< Control Register Address Low
-  UINT32  StatusRegAddressHi;           ///< Control Register Address High
-  UINT16  Value6;                       ///< Values
-} PCT_HEADER_BODY;
-#define     PCT_STRUCT_SIZE     50      // 50 Bytes
-
-
-//--------------------------------------------
-//              AML code definition
-//                 (PSS Header)
-//--------------------------------------------
-///Performance Supported States Header
-typedef struct  _PSS_HEADER {
-  UINT8   NameOpcode;                   ///< Opcode
-  UINT8   PssName_a__;                  ///< String "_"
-  UINT8   PssName_a_P;                  ///< String "P"
-  UINT8   PssName_a_S;                  ///< String "S"
-  UINT8   PssName_b_S;                  ///< String "S"
-  UINT8   PkgOpcode;                    ///< Package Opcode
-  UINT16  PssLength;                    ///< PSS Length
-  UINT8   NumOfItemsInPss;              ///< Number of Items in PSS
-} PSS_HEADER;
-#define     PSS_HEADER_STRUCT_SIZE  9   // 9 Bytes
-
-
-//--------------------------------------------
-//              AML code definition
-//                 (PSS Body)
-//--------------------------------------------
-///Performance Supported States Body
-typedef struct _PSS_BODY {
-  UINT8   PkgOpcode;                    ///< Package Opcode
-  UINT8   PkgLength;                    ///< Package Length
-  UINT8   NumOfElements;                ///< Number of Elements
-  UINT8   DwordPrefixOpcode1;           ///< Prefix Opcode1
-  UINT32  Frequency;                    ///< Frequency
-  UINT8   DwordPrefixOpcode2;           ///< Prefix Opcode2
-  UINT32  Power;                        ///< Power
-  UINT8   DwordPrefixOpcode3;           ///< Prefix Opcode3
-  UINT32  TransitionLatency;            ///< Transition Latency
-  UINT8   DwordPrefixOpcode4;           ///< Prefix Opcode4
-  UINT32  BusMasterLatency;             ///< Bus Master Latency
-  UINT8   DwordPrefixOpcode5;           ///< Prefix Opcode5
-  UINT32  Control;                      ///< Control
-  UINT8   DwordPrefixOpcode6;           ///< Prefix Opcode6
-  UINT32  Status;                       ///< Status
-} PSS_BODY;
-#define     PSS_BODY_STRUCT_SIZE    33  // 33 Bytes
-
-
-/*--------------------------------------------
- *              AML code definition
- *                 (XPSS Header)
- *--------------------------------------------
- */
-/// Extended PSS Header
-typedef struct  _XPSS_HEADER {
-  UINT8   NameOpcode;                   ///< 08h
-  UINT8   XpssName_a_X;                 ///< String "X"
-  UINT8   XpssName_a_P;                 ///< String "P"
-  UINT8   XpssName_a_S;                 ///< String "S"
-  UINT8   XpssName_b_S;                 ///< String "S"
-  UINT8   PkgOpcode;                    ///< 12h
-  UINT16  XpssLength;                   ///< XPSS Length
-  UINT8   NumOfItemsInXpss;             ///< Number of Items in XPSS
-} XPSS_HEADER;
-#define     XPSS_HEADER_STRUCT_SIZE  9  // 9 Bytes
-
-/*--------------------------------------------
- *              AML code definition
- *                 (XPSS Body)
- *--------------------------------------------
- */
-/// Extended PSS Body
-typedef struct  _XPSS_BODY {
-  UINT8   PkgOpcode;                    ///< 12h
-  UINT8   PkgLength;                    ///< Package Length
-  UINT8   XpssValueTbd;                 ///< XPSS Value
-  UINT8   NumOfElements;                ///< Number of Elements
-  UINT8   DwordPrefixOpcode1;           ///< Prefix Opcode1
-  UINT32  Frequency;                    ///< Frequency
-  UINT8   DwordPrefixOpcode2;           ///< Prefix Opcode2
-  UINT32  Power;                        ///< Power
-  UINT8   DwordPrefixOpcode3;           ///< Prefix Opcode3
-  UINT32  TransitionLatency;            ///< Transition Latency
-  UINT8   DwordPrefixOpcode4;           ///< Prefix Opcode4
-  UINT32  BusMasterLatency;             ///< Bus Master Latency
-  UINT32  ControlBuffer;                ///< Control Buffer
-  UINT32  ControlLo;                    ///< Control Low
-  UINT32  ControlHi;                    ///< Control High
-  UINT32  StatusBuffer;                 ///< Status Buffer
-  UINT32  StatusLo;                     ///< Status Low
-  UINT32  StatusHi;                     ///< Status High
-  UINT32  ControlMaskBuffer;            ///< Control Mask Buffer
-  UINT32  ControlMaskLo;                ///< Control Mask Low
-  UINT32  ControlMaskHi;                ///< Control Mask High
-  UINT32  StatusMaskBuffer;             ///< Status Mask Buffer
-  UINT32  StatusMaskLo;                 ///< Status Mask Low
-  UINT32  StatusMaskHi;                 ///< Status Mask High
-} XPSS_BODY;
-#define     XPSS_BODY_STRUCT_SIZE    72 // 72 Bytes
-
-/*--------------------------------------------
- *              AML code definition
- *             (PPC Header and Body)
- *--------------------------------------------
- */
-/// Performance Present Capabilities Header
-typedef struct _PPC_HEADER_BODY {
-  UINT8   NameOpcode;                   ///< Name Opcode
-  UINT8   PpcName_a_P;                  ///< String "P"
-  UINT8   PpcName_b_P;                  ///< String "P"
-  UINT8   PpcName_a_C;                  ///< String "C"
-  UINT8   PpcName_a_V;                  ///< String "V"
-  UINT8   Value1;                       ///< Value
-  UINT8   DefaultPerfPresentCap;        ///< Default Perf Present Cap
-  UINT8   MethodOpcode;                 ///< Method Opcode
-  UINT8   PpcLength;                    ///< Method Length
-  UINT8   PpcName_a__;                  ///< String "_"
-  UINT8   PpcName_c_P;                  ///< String "P"
-  UINT8   PpcName_d_P;                  ///< String "P"
-  UINT8   PpcName_b_C;                  ///< String "C"
-  UINT8   MethodFlags;                  ///< Method Flags
-  UINT8   ReturnOpcode;                 ///< Return Opcoce
-  UINT8   PpcName_e_P;                  ///< String "P"
-  UINT8   PpcName_f_P;                  ///< String "P"
-  UINT8   PpcName_c_C;                  ///< String "C"
-  UINT8   PpcName_b_V;                  ///< String "V"
-
-} PPC_HEADER_BODY;
-#define     PPC_HEADER_BODY_STRUCT_SIZE     19 // 19 Bytes
-#define     PPC_METHOD_LENGTH               11 // 11 Bytes
-
-
-/*--------------------------------------------
- *              AML code definition
- *                (PSD Header)
- *--------------------------------------------
- */
-/// P-State Dependency Header
-typedef struct  _PSD_HEADER {
-  UINT8   NameOpcode;                   ///< Name Opcode
-  UINT8   PsdName_a__;                  ///< String "_"
-  UINT8   PsdName_a_P;                  ///< String "P"
-  UINT8   PsdName_a_S;                  ///< String "S"
-  UINT8   PsdName_a_D;                  ///< String "D"
-  UINT8   PkgOpcode;                    ///< Package Opcode
-  UINT8   PsdLength;                    ///< PSD Length
-  UINT8   Value1;                       ///< Value
-} PSD_HEADER;
-#define     PSD_HEADER_STRUCT_SIZE  8   // 8 Bytes
-
-/*--------------------------------------------
- *              AML code definition
- *                 (PSD Body)
- *--------------------------------------------
- */
-/// P-State Dependency Body
-typedef struct _PSD_BODY {
-  UINT8   PkgOpcode;                    ///< Package Opcode
-  UINT8   PkgLength;                    ///< Package Length
-  UINT8   NumOfEntries;                 ///< Number of Entries
-  UINT8   BytePrefixOpcode1;            ///< Prefix Opcode1 in Byte
-  UINT8   PsdNumOfEntries;              ///< PSD Number of Entries
-  UINT8   BytePrefixOpcode2;            ///< Prefix Opcode2 in Byte
-  UINT8   PsdRevision;                  ///< PSD Revision
-  UINT8   DwordPrefixOpcode1;           ///< Prefix Opcode1 in DWord
-  UINT32  DependencyDomain;             ///< Dependency Domain
-  UINT8   DwordPrefixOpcode2;           ///< Prefix Opcode2 in DWord
-  UINT32  CoordinationType;             ///< (0xFC = SW_ALL, 0xFD = SW_ANY, 0xFE = HW_ALL)
-  UINT8   DwordPrefixOpcode3;           ///< Prefix Opcode3 in DWord
-  UINT32  NumOfProcessors;              ///< Number of Processors
-} PSD_BODY;
-#define     PSD_BODY_STRUCT_SIZE    22  // 22 Bytes
-
-//----------------------------------------------------------------------------
-//                         WHEA TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-
-/// HEST MCE TABLE
-typedef struct _AMD_HEST_MCE_TABLE {
-  UINT16 TblLength;               ///< Length, in bytes, of entire AMD_HEST_MCE structure.
-  UINT32 GlobCapInitDataLSD;      ///< Holds the value that the OS will program into
-  UINT32 GlobCapInitDataMSD;      ///< the machine check global capability register(MCG_CAP).
-  UINT32 GlobCtrlInitDataLSD;     ///< Holds the value that the OS will program into
-  UINT32 GlobCtrlInitDataMSD;     ///< the machine check global control register(MCG_CTL).
-  UINT8 NumHWBanks;               ///< The number of hardware error reporting banks.
-  UINT8 Rsvd[7];                  ///< reserve 7 bytes as spec's required
-} AMD_HEST_MCE_TABLE;
-
-/// HEST CMC TABLE
-typedef struct _AMD_HEST_CMC_TABLE {
-  UINT16 TblLength;               ///< Length, in bytes, of entire AMD_HEST_CMC structure.
-  UINT8 NumHWBanks;               ///< The number of hardware error reporting banks.
-  UINT8 Rsvd[3];                  ///< reserve 3 bytes as spec's required
-} AMD_HEST_CMC_TABLE;
-
-/// HEST BANK
-typedef struct _AMD_HEST_BANK {
-  UINT8 BankNum;                  ///< Zero-based index identifies the machine check error bank.
-  UINT8 ClrStatusOnInit;          ///< Indicates if the status information in this machine check bank
-                                  ///< is to be cleared during system initialization.
-  UINT8 StatusDataFormat;         ///< Indicates the format of the data in the status register
-  UINT8 ConfWriteEn;              ///< This field indicates whether configuration parameters may be
-                                  ///< modified by the OS. If the bit for the associated parameter is
-                                  ///< set, the parameter is writable by the OS.
-  UINT32 CtrlRegMSRAddr;          ///< Address of the hardware bank's control MSR. Ignored if zero.
-
-  UINT32 CtrlInitDataLSD;         ///< This is the value the OS will program into the machine check
-  UINT32 CtrlInitDataMSD;         ///< bank's control register
-  UINT32 StatRegMSRAddr;          ///< Address of the hardware bank's MCi_STAT MSR. Ignored if zero.
-  UINT32 AddrRegMSRAddr;          ///< Address of the hardware bank's MCi_ADDR MSR. Ignored if zero.
-  UINT32 MiscRegMSRAddr;          ///< Address of the hardware bank's MCi_MISC MSR. Ignored if zero.
-} AMD_HEST_BANK;
-
-/// Initial data of AMD_HEST_BANK
-typedef struct _AMD_HEST_BANK_INIT_DATA {
-  UINT32 CtrlInitDataLSD;         ///< Initial data of CtrlInitDataLSD
-  UINT32 CtrlInitDataMSD;         ///< Initial data of CtrlInitDataMSD
-  UINT32 CtrlRegMSRAddr;          ///< Initial data of CtrlRegMSRAddr
-  UINT32 StatRegMSRAddr;          ///< Initial data of StatRegMSRAddr
-  UINT32 AddrRegMSRAddr;          ///< Initial data of AddrRegMSRAddr
-  UINT32 MiscRegMSRAddr;          ///< Initial data of MiscRegMSRAddr
-} AMD_HEST_BANK_INIT_DATA;
-
-/// MSR179 Global Machine Check Capabilities data struct
-typedef struct _MSR_MCG_CAP_STRUCT {
-  UINT64 Count:8;                 ///< Indicates the number of
-                                  ///< error-reporting banks visible to each core
-  UINT64 McgCtlP:1;               ///< 1=The machine check control registers
-  UINT64 Rsvd:55;                 ///< reserved
-} MSR_MCG_CAP_STRUCT;
-
-/// Initial data of WHEA
-typedef struct _AMD_WHEA_INIT_DATA {
-  UINT32 GlobCapInitDataLSD;      ///< Holds the value that the OS will program into the machine
-  UINT32 GlobCapInitDataMSD;      ///< Check global capability register
-  UINT32 GlobCtrlInitDataLSD;     ///< Holds the value that the OS will grogram into the machine
-  UINT32 GlobCtrlInitDataMSD;     ///< Check global control register
-  UINT8  ClrStatusOnInit;         ///< Indicates if the status information in this machine check
-                                  ///< bank is to be cleared during system initialization
-  UINT8  StatusDataFormat;        ///< Indicates the format of the data in the status register
-  UINT8  ConfWriteEn;             ///< This field indicates whether configuration parameters may be
-                                  ///< modified by the OS. If the bit for the associated parameter is
-                                  ///< set, the parameter is writable by the OS.
-  UINT8  HestBankNum;             ///< Number of HEST Bank
-  AMD_HEST_BANK_INIT_DATA *HestBankInitData;  ///< Pointer to Initial data of HEST Bank
-} AMD_WHEA_INIT_DATA;
-
-//----------------------------------------------------------------------------
-//                         DMI TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// DMI brand information
-typedef struct {
-  UINT16 String1:4;                 ///< String1
-  UINT16 String2:4;                 ///< String2
-  UINT16 Model:7;                   ///< Model
-  UINT16 Pg:1;                      ///< Page
-} BRAND_ID;
-
-/// DMI cache information
-typedef struct {
-  UINT32 L1CacheSize;               ///< L1 cache size
-  UINT8  L1CacheAssoc;              ///< L1 cache associativity
-  UINT32 L2CacheSize;               ///< L2 cache size
-  UINT8  L2CacheAssoc;              ///< L2 cache associativity
-  UINT32 L3CacheSize;               ///< L3 cache size
-  UINT8  L3CacheAssoc;              ///< L3 cache associativity
-} CPU_CACHE_INFO;
-
-/// DMI processor information
-typedef struct {
-  UINT8  ExtendedFamily;            ///< Extended Family
-  UINT8  ExtendedModel;             ///< Extended Model
-  UINT8  BaseFamily;                ///< Base Family
-  UINT8  BaseModel;                 ///< Base Model
-  UINT8  Stepping;                  ///< Stepping
-  UINT8  PackageType;               ///< PackageType
-  BRAND_ID BrandId;                 ///< BrandId which contains information about String1, String2, Model and Page
-  UINT8  TotalCoreNumber;           ///< Number of total cores
-  UINT8  EnabledCoreNumber;         ///< Number of enabled cores
-  UINT8  ProcUpgrade;               ///< ProcUpdrade
-  CPU_CACHE_INFO CacheInfo;         ///< CPU cache info
-} CPU_TYPE_INFO;
-
-/// A structure containing processor name string and
-/// the value that should be provide to DMI type 4 processor family
-typedef struct {
-  IN       CONST CHAR8 *Stringstart;  ///< The literal string
-  IN       UINT8  T4ProcFamilySetting; ///< The value set to DMI type 4 processor family
-} CPU_T4_PROC_FAMILY;
-
-/// DMI ECC information
-typedef struct {
-  BOOLEAN EccCapable;               ///< ECC Capable
-} CPU_GET_MEM_INFO;
-
-/*  Transfer vectors for DMI family specific routines   */
-typedef VOID  OPTION_DMI_GET_CPU_INFO (
-  IN OUT   CPU_TYPE_INFO *CpuInfoPtr,
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef VOID  OPTION_DMI_GET_PROC_FAMILY (
-  IN OUT   UINT8 *T4ProcFamily,
-  IN       PROC_FAMILY_TABLE *CpuDmiProcFamilyTable,
-  IN       CPU_TYPE_INFO *CpuInfo,
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef UINT8 OPTION_DMI_GET_VOLTAGE (
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef UINT16  OPTION_DMI_GET_MAX_SPEED (
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef UINT16  OPTION_DMI_GET_EXT_CLOCK (
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef VOID  OPTION_DMI_GET_MEM_INFO (
-  IN OUT   CPU_GET_MEM_INFO  *CpuGetMemInfoPtr,
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-/// Brand table entry format
-typedef struct {
-  UINT8 PackageType;                ///< Package type
-  UINT8 PgOfBrandId;                ///< Page
-  UINT8 NumberOfCores;              ///< Number of cores
-  UINT8 String1ofBrandId;           ///< String1
-  UINT8 ValueSetToDmiTable;         ///< The value which will should be set to DMI table
-} DMI_BRAND_ENTRY;
-
-/// Family specific data table structure
-struct _PROC_FAMILY_TABLE {
-  UINT64                    ProcessorFamily;  ///< processor
-  OPTION_DMI_GET_CPU_INFO   *DmiGetCpuInfo;   ///< transfer vectors
-  OPTION_DMI_GET_PROC_FAMILY  *DmiGetT4ProcFamily;  ///< Get DMI type 4 processor family information
-  OPTION_DMI_GET_VOLTAGE    *DmiGetVoltage;   ///< vector for reading voltage
-  OPTION_DMI_GET_MAX_SPEED  *DmiGetMaxSpeed;  ///< vector for reading speed
-  OPTION_DMI_GET_EXT_CLOCK  *DmiGetExtClock;  ///< vector for reading external clock speed
-  OPTION_DMI_GET_MEM_INFO   *DmiGetMemInfo;   ///< Get memory information
-  UINT8                     LenBrandList;     ///< size of brand table
-  CONST DMI_BRAND_ENTRY     *DmiBrandList;    ///< translate brand info to DMI identifier
-};
-
-//----------------------------------------------------------------------------
-//                         SLIT TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// Format for SRAT Header
-typedef struct {
-  UINT8   Sign[4];                      ///< Signature
-  UINT32  TableLength;                  ///< Table Length
-  UINT8   Revision;                     ///< Revision
-  UINT8   Checksum;                     ///< Checksum
-  UINT8   OemId[6];                     ///< OEM ID
-  UINT8   OemTableId[8];                ///< OEM Tabled ID
-  UINT32  OemRev;                       ///< OEM Revision
-  UINT8   CreatorId[4];                 ///< Creator ID
-  UINT32  CreatorRev;                   ///< Creator Revision
-} ACPI_TABLE_HEADER;
-
-//----------------------------------------------------------------------------
-//                         SRAT TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// Format for SRAT Header
-typedef struct _CPU_SRAT_HEADER {
-  UINT8   Sign[4];                      ///< Signature
-  UINT32  TableLength;                  ///< Table Length
-  UINT8   Revision;                     ///< Revision
-  UINT8   Checksum;                     ///< Checksum
-  UINT8   OemId[6];                     ///< OEM ID
-  UINT8   OemTableId[8];                ///< OEM Tabled ID
-  UINT32  OemRev;                       ///< OEM Revision
-  UINT8   CreatorId[4];                 ///< Creator ID
-  UINT32  CreatorRev;                   ///< Creator Revision
-  UINT32  TableRev;                     ///< Table Revision
-  UINT8   Reserved[8];                  ///< Reserved
-} CPU_SRAT_HEADER;
-
-
-/// Format for SRAT APIC Affinity Entry
-typedef struct _CPU_SRAT_APIC_ENTRY {
-  UINT8   Type;                         ///< Type
-  UINT8   Length;                       ///< Length
-  UINT8   Domain;                       ///< Domain
-  UINT8   ApicId;                       ///< Apic ID
-  UINT32  Flags;                        ///< Flags
-  UINT8   LSApicEid;                    ///< Local SAPIC EID
-  UINT8   Reserved[7];                  ///< Reserved
-} CPU_SRAT_APIC_ENTRY;
-
-
-/// Format for SRAT Memory Affinity Entry
-typedef struct _CPU_SRAT_MEMORY_ENTRY {
-  UINT8   Type;                         ///< 0: Memory affinity = 1
-  UINT8   Length;                       ///< 1: Length = 40 bytes
-  UINT32  Domain;                       ///< 2: Proximity domain
-  UINT8   Reserved1[2];                 ///< 6: Reserved
-  UINT32  BaseAddrLow;                  ///< 8:  Low 32bits address base
-  UINT32  BaseAddrHigh;                 ///< 12: High 32bits address base
-  UINT32  LengthAddrLow;                ///< 16: Low 32bits address limit
-  UINT32  LengthAddrHigh;               ///< 20: High 32bits address limit
-  UINT8   Reserved2[4];                 ///< 24: Memory Type
-  UINT32  Flags;                        ///< 28: Flags
-  UINT8   Reserved3[8];                 ///< 32: Reserved
-} CPU_SRAT_MEMORY_ENTRY;
-
-//----------------------------------------------------------------------------
-//                         CRAT TYPEDEFS, STRUCTURES, ENUMS
-//                         Component Resource Affinity Table
-//----------------------------------------------------------------------------
-/// Format for CRAT Header
-typedef struct {
-  UINT8   Sign[4];                      ///< CRAT, Signature for the Component Resource Affinity Table.
-  UINT32  Length;                       ///< Length, in bytes, of the entire CRAT
-  UINT8   Revision;                     ///< 0
-  UINT8   Checksum;                     ///< Entire table must sum to zero.
-  UINT8   OemId[6];                     ///< OEM ID
-  UINT8   OemTableId[8];                ///< OEM Tabled ID
-  UINT32  OemRev;                       ///< OEM Revision
-  UINT8   CreatorId[4];                 ///< Creator ID
-  UINT32  CreatorRev;                   ///< Creator Revision
-  UINT32  TotalEntries;                 ///< total number[n] of entries in the CRAT
-  UINT16  NumDomains;                   ///< Number of HSA proximity domains
-  UINT8   Reserved[6];                  ///< Reserved
-} CRAT_HEADER;
-
-/// Flags field of the CRAT HSA Processing Unit Affinity Structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 HotPluggable:1;             ///< Hot Pluggable
-  UINT32 CpuPresent:1;               ///< Cpu Present
-  UINT32 GpuPresent:1;               ///< Gpu Present
-  UINT32 IommuPresent:1;             ///< IOMMU Present
-  UINT32 :27;                        ///< Reserved
-} CRAT_HSA_PROCESSING_UNIT_FLAG;
-
-/// CRAT HSA Processing Unit Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 0 - CRAT HSA Processing Unit Structure
-  UINT8  Length;                     ///< 40
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_HSA_PROCESSING_UNIT_FLAG Flags; ///< Flags - HSA Processing Unit Affinity Structure
-  UINT32 ProximityDomain;            ///< Integer that represents the proximity domain to which the node belongs to
-  UINT32 ProcessorIdLow;             ///< Low value  of the logical processor included in this HSA proximity domain
-  UINT16 NumCPUCores;                ///< Indicates count of CCompute execution units present in this APU node.
-  UINT16 NumSIMDCores;               ///< Indicates maximum count of HCompute SIMD cores present in this node.
-  UINT16 MaxWavesSIMD;               ///< This identifies the max. number of launched waves per SIMD.
-  UINT16 IoCount;                    ///< Number of discoverable IO Interfaces connecting this node to other components.
-  UINT16 HSACapability;              ///< Must be 0
-  UINT16 LDSSizeInKB;                ///< Size of LDS memory per SIMD Wavefront
-  UINT8  WaveFrontSize;              ///< 64, may be 32 for some FSA based architectures
-  UINT8  NumBanks;                   ///< Number of Banks or "Shader Engines", typically 1 or 2
-  UINT16 uEngineIdentifier;          ///< Identifier (Rev) of the GPU uEngine or firmware
-  UINT8  NumArrays;                  ///< Number of SIMD Arrays per Engine
-  UINT8  NumCUPerArray;              ///< Number of Compute Units (CU) per SIMD Array
-  UINT8  NumSIMDPerCU;               ///< Number of SIMD representing a Compute Unit
-  UINT8  MaxSlotsScratchCU;          ///< Max. Number of temp. memory ("scratch") wave slots
-                                     ///< available to access, may be 0 if HW has no restrictions
-  UINT8  Reserved1[4];               ///< Reserved
-} CRAT_HSA_PROCESSING_UNIT;
-
-/// Flags field of the CRAT Memory Affinity Structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 HotPluggable:1;             ///< Hot Pluggable
-  UINT32 NonVolatile:1;              ///< If set, the memory region represents Non-Volatile memory
-  UINT32 :29;                        ///< Reserved
-} CRAT_MEMORY_FLAG;
-
-/// CRAT Memory Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 1 - CRAT Memory Affinity Structure
-  UINT8  Length;                     ///< 40
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_MEMORY_FLAG Flags;            ///< Flags - Memory Affinity Structure. Indicates whether the region of memory is enabled and can be hot plugged
-  UINT32 ProximityDomain;            ///< Integer that represents the proximity domain to which the node belongs to
-  UINT32 BaseAddressLow;             ///< Low 32Bits of the Base Address of the memory range
-  UINT32 BaseAddressHigh;            ///< High 32Bits of the Base Address of the memory range
-  UINT32 LengthLow;                  ///< Low 32Bits of the length of the memory range
-  UINT32 LengthHigh;                 ///< High 32Bits of the length of the memory range
-  UINT32 Width;                      ///< Memory width - Specifies the number of parallel bits of the memory interface
-  UINT8  Reserved1[8];               ///< Reserved
-} CRAT_MEMORY;
-
-/// Flags field of the CRAT Cache Affinity structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 DataCache:1;                ///< 1 if cache includes data
-  UINT32 InstructionCache:1;         ///< 1 if cache includes instructions
-  UINT32 CpuCache:1;                 ///< 1 if cache is part of CPU functionality
-  UINT32 SimdCache:1;                ///< 1 if cache is part of SIMD functionality
-  UINT32 :27;                        ///< Reserved
-} CRAT_CACHE_FLAG;
-
-/// CRAT Cache Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 2 - CRAT Cache Affinity Structure
-  UINT8  Length;                     ///< 64
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_CACHE_FLAG Flags;             ///< Flags - Cache Affinity Structure. Indicates whether the region of cache is enabled
-  UINT32 ProcessorIdLow;             ///< Low value of a logical processor which includes this component
-  UINT8  SiblingMap[32];             ///< Bitmask of  Processor Id sharing this component. 1 bit per logical processor
-  UINT32 CacheSize;                  ///< Cache size in KB
-  UINT8  CacheLevel;                 ///< Integer representing level: 1, 2, 3, 4, etc.
-  UINT8  LinesPerTag;                ///< Cache Lines per tag
-  UINT16 CacheLineSize;              ///< Cache line size in bytes
-  UINT8  Associativity;              ///< Cache associativity
-                                     ///< The associativity fields are encoded as follows:
-                                     ///< 00h: Reserved.
-                                     ///< 01h: Direct mapped.
-                                     ///< 02h-FEh: Associativity. (e.g., 04h = 4-way associative.)
-                                     ///< FFh: Fully associative
-  UINT8  CacheProperties;            ///< Cache Properties bits [2:0] represent Inclusive/Exclusive property encoded.
-                                     ///< 0: Cache is strictly exclusive to lower level caches.
-                                     ///< 1: Cache is mostly exclusive to lower level caches.
-                                     ///< 2: Cache is strictly inclusive to lower level caches.
-                                     ///< 3: Cache is mostly inclusive to lower level caches.
-                                     ///< 4: Cache is a "constant cache" (= explicit update)
-                                     ///< 5: Cache is a "specialty cache" (e.g. Texture cache)
-                                     ///< 6-7: Reserved
-                                     ///< CacheProperties bits [7:3] are reserved
-  UINT16 CacheLatency;               ///< Cost of time to access cache described in nanoseconds.
-  UINT8  Reserved1[8];               ///< Reserved
-} CRAT_CACHE;
-
-/// Flags field of the CRAT TLB Affinity structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 DataTLB:1;                  ///< 1 if TLB includes translation information for data.
-  UINT32 InstructionTLB:1;           ///< 1 if TLB includes translation information for instructions.
-  UINT32 CpuTLB:1;                   ///< 1 if TLB is part of CPU functionality
-  UINT32 SimdTLB:1;                  ///< 1 if TLB is part of SIMD functionality
-  UINT32 TLB4KBase256:1;             ///< 1 if value in table is factored by 256 to get number of 4K entries
-  UINT32 :1;                         ///< Reserved
-  UINT32 TLB2MBase256:1;             ///< 1 if value in table is factored by 256 to get number of 2M entries
-  UINT32 :1;                         ///< Reserved
-  UINT32 TLB1GBase256:1;             ///< 1 if value in table is factored by 256 to get number of 1G entries
-  UINT32 :22;                        ///< Reserved
-} CRAT_TLB_FLAG;
-
-/// CRAT TLB Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 3 - CRAT TLB  Affinity Structure
-  UINT8  Length;                     ///< 64
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_TLB_FLAG Flags;               ///< Flags - TLB Affinity Structure. Indicates whether the TLB is enabled and defined
-  UINT32 ProcessorIdLow;             ///< Low value of a logical processor which includes this component.
-  UINT8  SiblingMap[32];             ///< Bitmask of Processor Id sharing this component. 1 bit per logical processor
-  UINT32 TlbLevel;                   ///< Integer representing level: 1, 2, 3, 4, etc.
-  UINT8  DataTlbAssociativity2MB;    ///< Data TLB associativity for 2MB pages
-                                     ///< The associativity fields are encoded as follows:
-                                     ///< 00h: Reserved.
-                                     ///< 01h: Direct mapped.
-                                     ///< 02h-FEh: Associativity. (e.g., 04h = 4-way associative.)
-                                     ///< FFh: Fully associative.
-  UINT8  DataTlbSize2MB;             ///< Data TLB number of entries for 2MB.
-  UINT8  InstructionTlbAssociativity2MB;      ///< Instruction TLB associativity for 2MB pages
-                                     ///< The associativity fields are encoded as follows:
-                                     ///< 00h: Reserved.
-                                     ///< 01h: Direct mapped.
-                                     ///< 02h-FEh: Associativity. (e.g., 04h = 4-way associative.)
-                                     ///< FFh: Fully associative.
-  UINT8  InstructionTlbSize2MB;      ///< Instruction TLB number of entries for 2MB pages.
-  UINT8  DataTlbAssociativity4K;     ///< Data TLB Associativity for 4KB pages
-  UINT8  DataTlbSize4K;              ///< Data TLB number of entries for 4KB pages
-  UINT8  InstructionTlbAssociativity4K;       ///< Instruction TLB Associativity for 4KB pages
-  UINT8  InstructionTlbSize4K;       ///< Instruction TLB number of entries for 4KB pages
-  UINT8  DataTlbAssociativity1G;     ///< Data TLB Associativity for 1GB pages
-  UINT8  DataTlbSize1G;              ///< Data TLB number of entries for 1GB pages
-  UINT8  InstructionTlbAssociativity1G;       ///< Instruction TLB Associativity for 1GB pages
-  UINT8  InstructionTlbSize1G;       ///< Instruction TLB number of entries for 1GB pages
-  UINT8  Reserved1[4];               ///< Reserved
-} CRAT_TLB;
-
-/// Flags field of the CRAT FPU Affinity structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 :31;                        ///< Reserved
-} CRAT_FPU_FLAG;
-
-/// CRAT FPU Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 4 - CRAT FPU Affinity Structure
-  UINT8  Length;                     ///< 64
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_FPU_FLAG Flags;               ///< Flags - FPU Affinity Structure. Indicates whether the region of FPU affinity structure is enabled and defined
-  UINT32 ProcessorIdLow;             ///< Low value of a logical processor which includes this component.
-  UINT8  SiblingMap[32];             ///< Bitmask of  Processor Id sharing this component. 1 bit per logical processor
-  UINT32 FPUSize;                    ///< Product specific
-  UINT8  Reserved1[16];              ///< Reserved
-} CRAT_FPU;
-
-/// Flags field of the CRAT IO Affinity structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 Coherency:1;                ///< If set, IO interface supports coherent transactions (natively or through protocol extensions)
-  UINT32 :30;                        ///< Reserved
-} CRAT_IO_FLAG;
-
-/// CRAT IO Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 5 - CRAT IO Affinity Structure
-  UINT8  Length;                     ///< 64
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_IO_FLAG Flags;                ///< Flags - IO Affinity Structure. Indicates whether the region of IO affinity structure is enabled and defined.
-  UINT32 ProximityDomainFrom;        ///< Integer that represents the proximity domain to which the IO Interface belongs to
-  UINT32 ProximityDomainTo;          ///< Integer that represents the other proximity domain to which the IO Interface belongs to
-  UINT8  IoType;                     ///< IO Interface type. Values defined are
-                                     ///< 0: Undefined
-                                     ///< 1: Hypertransport
-                                     ///< 2: PCI Express
-                                     ///< 3: Other (e.g. internal)
-                                     ///< 4-255: Reserved
-  UINT8  VersionMajor;               ///< Major version of the Bus interface
-  UINT16 VersionMinor;               ///< Minor version of the Bus interface ((optional)
-  UINT32 MinimumLatency;             ///< Cost of time to transfer, described in nanoseconds.
-  UINT32 MaximumLatency;             ///< Cost of time to transfer, described in nanoseconds.
-  UINT32 MinimumBandwidth;           ///< Minimum interface Bandwidth in MB/s
-  UINT32 MaximumBandwidth;           ///< Maximum interface Bandwidth in MB/s
-  UINT32 RecommendedTransferSize;    ///< Recommended transfer size to reach maximum interface bandwidth in Bytes
-  UINT8  Reserved1[24];              ///< Reserved
-} CRAT_IO;
-
-#define CRAT_MAX_LENGTH    0x800ul   ///< Reserve 2K for CRAT
-/// CRAT entry type
-typedef enum {
-  CRAT_TYPE_HSA_PROC_UNIT = 0,       ///< 0 - CRAT HSA Processing Unit Structure
-  CRAT_TYPE_MEMORY,                  ///< 1 - CRAT Memory Affinity Structure
-  CRAT_TYPE_CACHE,                   ///< 2 - CRAT Cache Affinity Structure
-  CRAT_TYPE_TLB,                     ///< 3 - CRAT TLB  Affinity Structure
-  CRAT_TYPE_FPU,                     ///< 4 - CRAT FPU Affinity Structure
-  CRAT_TYPE_IO,                      ///< 5 - CRAT IO Affinity Structure
-} CRAT_ENTRY_TYPE;
-
-/*----------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *----------------------------------------------------------------------------------------
- */
-
-AGESA_STATUS
-AmdCpuLate (
-  IN       AMD_CONFIG_PARAMS   *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig
-  );
-
-AGESA_STATUS
-CreateAcpiWhea (
-  IN OUT   AMD_CONFIG_PARAMS    *StdHeader,
-  IN OUT   VOID                 **WheaMcePtr,
-  IN OUT   VOID                 **WheaCmcPtr
-  );
-
-AGESA_STATUS
-CreateDmiRecords (
-  IN OUT   AMD_CONFIG_PARAMS    *StdHeader,
-  IN OUT   DMI_INFO             **DmiTable
-  );
-
-AGESA_STATUS
-GetType4Type7Info (
-  IN       AP_EXE_PARAMS *ApExeParams
-  );
-
-VOID
-DmiGetT4ProcFamilyFromBrandId (
-  IN OUT   UINT8 *T4ProcFamily,
-  IN       PROC_FAMILY_TABLE *CpuDmiProcFamilyTable,
-  IN       CPU_TYPE_INFO *CpuInfo,
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-VOID
-GetNameString (
-  IN OUT   CHAR8 *String,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-BOOLEAN
-IsSourceStrContainTargetStr (
-  IN OUT   CHAR8 *SourceStr,
-  IN OUT   CONST CHAR8 *TargetStr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-CreateAcpiCrat (
-  IN OUT   AMD_CONFIG_PARAMS     *StdHeader,
-     OUT   VOID                  **CratPtr
-  );
-
-AGESA_STATUS
-CreateAcpiCdit (
-  IN OUT   AMD_CONFIG_PARAMS      *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig,
-     OUT   VOID                   **CditPtr
-  );
-
-AGESA_STATUS
-CreateAcpiSrat (
-  IN OUT   AMD_CONFIG_PARAMS    *StdHeader,
-  IN OUT   VOID                 **SratPtr
-  );
-
-AGESA_STATUS
-CreateAcpiSlit (
-  IN OUT   AMD_CONFIG_PARAMS      *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig,
-  IN OUT   VOID                   **SlitPtr
-  );
-
-VOID
-ChecksumAcpiTable (
-  IN OUT   ACPI_TABLE_HEADER *Table,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-RunLateApTaskOnAllAPs (
-  IN       AP_EXE_PARAMS     *ApParams,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-RunLateApTaskOnAllCore0s (
-  IN       AP_EXE_PARAMS     *ApParams,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-#endif // _CPU_LATE_INIT_H_

pi/amd/00630F01/Proc/CPU/cpuRegisters.h

diff --git a/pi/amd/00630F01/Proc/CPU/cpuRegisters.h b/pi/amd/00630F01/Proc/CPU/cpuRegisters.h
deleted file mode 100644
index e41226a..0000000
--- a/pi/amd/00630F01/Proc/CPU/cpuRegisters.h
+++ /dev/null
@@ -1,479 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Register Table Related Functions
- *
- * Contains the definition of the CPU CPUID MSRs and PCI registers with BKDG recommended values
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 284995 $   @e \$Date: 2014-02-17 11:17:41 -0600 (Mon, 17 Feb 2014) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-#ifndef _CPU_REGISTERS_H_
-#define _CPU_REGISTERS_H_
-
-#include "cpuFamRegisters.h"
-/*
- *--------------------------------------------------------------
- *
- *                      M O D U L E S    U S E D
- *
- *---------------------------------------------------------------
- */
-
-/*
- *--------------------------------------------------------------
- *
- *                      D E F I N I T I O N S  /  M A C R O S
- *
- *---------------------------------------------------------------
- */
-
-#undef BIT0
-#undef BIT1
-#undef BIT2
-#undef BIT3
-#undef BIT4
-#undef BIT5
-#undef BIT6
-#undef BIT7
-#undef BIT8
-#undef BIT9
-#undef BIT10
-#undef BIT10
-#undef BIT11
-#undef BIT12
-#undef BIT13
-#undef BIT14
-#undef BIT15
-#undef BIT16
-#undef BIT17
-#undef BIT18
-#undef BIT19
-#undef BIT20
-#undef BIT21
-#undef BIT22
-#undef BIT23
-#undef BIT24
-#undef BIT25
-#undef BIT26
-#undef BIT27
-#undef BIT28
-#undef BIT29
-#undef BIT30
-#undef BIT31
-#undef BIT32
-#undef BIT33
-#undef BIT34
-#undef BIT35
-#undef BIT36
-#undef BIT37
-#undef BIT38
-#undef BIT39
-#undef BIT40
-#undef BIT41
-#undef BIT42
-#undef BIT43
-#undef BIT44
-#undef BIT45
-#undef BIT46
-#undef BIT47
-#undef BIT48
-#undef BIT49
-#undef BIT40
-#undef BIT41
-#undef BIT42
-#undef BIT43
-#undef BIT44
-#undef BIT45
-#undef BIT46
-#undef BIT47
-#undef BIT48
-#undef BIT49
-#undef BIT50
-#undef BIT51
-#undef BIT52
-#undef BIT53
-#undef BIT54
-#undef BIT55
-#undef BIT56
-#undef BIT57
-#undef BIT58
-#undef BIT59
-#undef BIT60
-#undef BIT61
-#undef BIT62
-#undef BIT63
-
-#define BIT0        0x0000000000000001ull
-#define BIT1        0x0000000000000002ull
-#define BIT2        0x0000000000000004ull
-#define BIT3        0x0000000000000008ull
-#define BIT4        0x0000000000000010ull
-#define BIT5        0x0000000000000020ull
-#define BIT6        0x0000000000000040ull
-#define BIT7        0x0000000000000080ull
-#define BIT8        0x0000000000000100ull
-#define BIT9        0x0000000000000200ull
-#define BIT10       0x0000000000000400ull
-#define BIT11       0x0000000000000800ull
-#define BIT12       0x0000000000001000ull
-#define BIT13       0x0000000000002000ull
-#define BIT14       0x0000000000004000ull
-#define BIT15       0x0000000000008000ull
-#define BIT16       0x0000000000010000ull
-#define BIT17       0x0000000000020000ull
-#define BIT18       0x0000000000040000ull
-#define BIT19       0x0000000000080000ull
-#define BIT20       0x0000000000100000ull
-#define BIT21       0x0000000000200000ull
-#define BIT22       0x0000000000400000ull
-#define BIT23       0x0000000000800000ull
-#define BIT24       0x0000000001000000ull
-#define BIT25       0x0000000002000000ull
-#define BIT26       0x0000000004000000ull
-#define BIT27       0x0000000008000000ull
-#define BIT28       0x0000000010000000ull
-#define BIT29       0x0000000020000000ull
-#define BIT30       0x0000000040000000ull
-#define BIT31       0x0000000080000000ull
-#define BIT32       0x0000000100000000ull
-#define BIT33       0x0000000200000000ull
-#define BIT34       0x0000000400000000ull
-#define BIT35       0x0000000800000000ull
-#define BIT36       0x0000001000000000ull
-#define BIT37       0x0000002000000000ull
-#define BIT38       0x0000004000000000ull
-#define BIT39       0x0000008000000000ull
-#define BIT40       0x0000010000000000ull
-#define BIT41       0x0000020000000000ull
-#define BIT42       0x0000040000000000ull
-#define BIT43       0x0000080000000000ull
-#define BIT44       0x0000100000000000ull
-#define BIT45       0x0000200000000000ull
-#define BIT46       0x0000400000000000ull
-#define BIT47       0x0000800000000000ull
-#define BIT48       0x0001000000000000ull
-#define BIT49       0x0002000000000000ull
-#define BIT50       0x0004000000000000ull
-#define BIT51       0x0008000000000000ull
-#define BIT52       0x0010000000000000ull
-#define BIT53       0x0020000000000000ull
-#define BIT54       0x0040000000000000ull
-#define BIT55       0x0080000000000000ull
-#define BIT56       0x0100000000000000ull
-#define BIT57       0x0200000000000000ull
-#define BIT58       0x0400000000000000ull
-#define BIT59       0x0800000000000000ull
-#define BIT60       0x1000000000000000ull
-#define BIT61       0x2000000000000000ull
-#define BIT62       0x4000000000000000ull
-#define BIT63       0x8000000000000000ull
-
-/// CPUID related registers
-#define AMD_CPUID_FMF               0x80000001ul  // Family Model Features information
-#define AMD_CPUID_APICID_LPC_BID    0x00000001ul  // Local APIC ID, Logical Processor Count, Brand ID
-#define AMD_CPUID_L2L3Cache_L2TLB   0x80000006ul
-#define CPUID_ASSOCIATIVITY_DISABLED 0x00
-#define CPUID_ASSOCIATIVITY_1_WAY   0x01
-#define CPUID_ASSOCIATIVITY_2_WAY   0x02
-#define CPUID_ASSOCIATIVITY_4_WAY   0x04
-#define CPUID_ASSOCIATIVITY_8_WAY   0x06
-#define CPUID_ASSOCIATIVITY_16_WAY  0x08
-#define CPUID_ASSOCIATIVITY_32_WAY  0x0A
-#define CPUID_ASSOCIATIVITY_48_WAY  0x0B
-#define CPUID_ASSOCIATIVITY_64_WAY  0x0C
-#define CPUID_ASSOCIATIVITY_96_WAY  0x0D
-#define CPUID_ASSOCIATIVITY_128_WAY 0x0E
-#define CPUID_ASSOCIATIVITY_FULLY   0x0F
-#define AMD_CPUID_TLB_L1Cache       0x80000005ul
-#define AMD_CPUID_L1L2Tlb1GIdentifiers 0x80000019ul
-#define AMD_CPUID_APM               0x80000007ul
-#define LOCAL_APIC_ID               24
-#define LOGICAL_PROCESSOR_COUNT     16
-#define AMD_CPUID_ASIZE_PCCOUNT     0x80000008ul  // Address Size, Physical Core Count
-
-/// CPU Logical ID Transfer
-typedef struct {
-  UINT32         RawId;                         ///< RawID
-  UINT64         LogicalId;                     ///< LogicalID
-} CPU_LOGICAL_ID_XLAT;
-
-/// Logical CPU ID Table
-typedef struct {
-  IN       UINT32  Elements;                    ///< Number of Elements
-  IN       CPU_LOGICAL_ID_XLAT *LogicalIdTable; ///< CPU Logical ID Transfer table Pointer
-} LOGICAL_ID_TABLE;
-
-// MSRs
-// ------------------------
-#define MCG_CTL_P                   0x00000100ul              // bit 8  for MCG_CTL_P under MSRR
-#define MSR_MCG_CAP                 0x00000179ul
-#define DBG_CTL_MSR                 0x000001D9ul
-#define MSR_MC0_CTL                 0x00000400ul
-#define MSR_MC0_STATUS              0x00000401ul
-#define MSR_MC0_MISC                0x00000403ul
-#define MSR_MC1_MISC                0x00000407ul
-#define MSR_MC2_MISC                0x0000040Bul
-#define MSR_MC4_CTL                 0x00000410ul
-#define MSR_MC4_MISC0               0x00000413ul
-#define MSR_MC5_MISC                0x00000417ul
-#define MSR_MC4_MISC1               0xC0000408ul
-#define MSR_MC5_STATUS              0x00000415ul
-#define MSR_MC6_STATUS              0x00000419ul
-
-#define MSR_APIC_BAR                0x0000001Bul
-#define MSR_PATCH_LEVEL             0x0000008Bul
-
-#define CPUID_LONG_MODE_ADDR        0x80000008ul
-
-#define MSR_EXTENDED_FEATURE_EN     0xC0000080ul
-#define MSR_MC_MISC_LINK_THRESHOLD  0xC0000408ul
-#define MSR_MC_MISC_L3_THRESHOLD    0xC0000409ul
-#define MSR_PATCH_LOADER            0xC0010020ul
-
-/// Patch Loader Register
-typedef struct {
-  UINT64 PatchBase:32;                ///< Linear address of patch header address block
-  UINT64 SBZ:32;                      ///< Should be zero
-} PATCH_LOADER_MSR;
-
-#define MSR_SYS_CFG                 0xC0010010ul    // SYSCFG - F15 Shared
-#define MSR_TOM2                    0xC001001Dul    // TOP_MEM2 - F15 Shared
-#define MSR_MC0_CTL_MASK            0xC0010044ul    // MC0 Control Mask
-#define MSR_MC1_CTL_MASK            0xC0010045ul    // MC1 Control Mask
-#define MSR_MC2_CTL_MASK            0xC0010046ul    // MC2 Control Mask
-#define MSR_MC4_CTL_MASK            0xC0010048ul    // MC4 Control Mask
-
-#define MSR_CPUID_FEATS             0xC0011004ul    // CPUID Features
-#define MSR_CPUID_EXT_FEATS         0xC0011005ul    // CPUID Extended Features
-#define MSR_HDT_CFG                 0xC001100Aul
-#define MSR_HWCR                    0xC0010015ul
-#define MSR_NB_CFG                  0xC001001Ful    // NB Config
-#define CPU_WDT_CFG                 0xC0010074ul
-#define ENABLE_CF8_EXT_CFG          0x00004000ul    // [46]
-#define INIT_APIC_CPUID_LO          0x00400000ul    // [54]
-#define MSR_CU_SPMCTL               0xC0010281ul
-#define MSR_CpuWdtCfg               0xC0010074ul    // CPU Watchdog Timer
-#define MSR_LS_CFG                  0xC0011020ul
-#define MSR_IC_CFG                  0xC0011021ul    // ICache Config - F15 Shared
-#define MSR_DC_CFG                  0xC0011022ul
-#define MSR_ME_CFG                  0xC0011029ul
-#define MSR_BU_CFG                  0xC0011023ul
-#define MSR_CU_CFG                  0xC0011023ul    // F15 Shared
-#define MSR_DE_CFG                  0xC0011029ul    // F15 Shared
-#define MSR_BU_CFG2                 0xC001102Aul
-#define MSR_CU_CFG2                 0xC001102Aul    // F15 Shared
-#define MSR_BU_CFG3                 0xC001102Bul
-#define MSR_CU_CFG3                 0xC001102Bul    // F15 Shared
-#define MSR_LS_CFG2                 0xC001102Dul
-#define MSR_CU_PFTCFG               0xC001102Ful
-#define MSR_IBS_OP_DATA3            0xC0011037ul
-#define MSR_C001_1070               0xC0011070ul    // F15 Shared
-
-
-#define MSR_CPUID_NAME_STRING0      0xC0010030ul    // First CPUID namestring register
-#define MSR_CPUID_NAME_STRING1      0xC0010031ul
-#define MSR_CPUID_NAME_STRING2      0XC0010032ul
-#define MSR_CPUID_NAME_STRING3      0xC0010033ul
-#define MSR_CPUID_NAME_STRING4      0xC0010034ul
-#define MSR_CPUID_NAME_STRING5      0xC0010035ul    // Last CPUID namestring register
-#define MSR_MMIO_Cfg_Base           0xC0010058ul    // MMIO Configuration Base Address Register
-#define MSR_BIST                    0xC0010060ul    // BIST Results register
-#define MSR_OSVW_ID_Length          0xC0010140ul
-#define MSR_OSVW_Status             0xC0010141ul
-#define MSR_NB_PERF_CTL0            0xC0010240ul
-#define MSR_NB_PERF_CTR0            0xC0010241ul
-#define MSR_NB_PERF_CTL1            0xC0010242ul
-#define MSR_NB_PERF_CTR1            0xC0010243ul
-#define MSR_NB_PERF_CTL2            0xC0010244ul
-#define MSR_NB_PERF_CTR2            0xC0010245ul
-#define MSR_NB_PERF_CTL3            0xC0010246ul
-#define MSR_NB_PERF_CTR3            0xC0010247ul
-#define CU_SPMCTL                   0xC0010281ul    // Streaming Performance Monitor Control
-#define MSR_PERF_CONTROL3           0xC0010003ul    // Performance control register number 3
-#define MSR_PERF_COUNTER3           0xC0010007ul    // Performance counter register number 3
-#define PERF_RESERVE_BIT_MASK       0x030FFFDFFFFFull  // Mask of the Performance control Reserve bits
-#define PERF_CAR_CORRUPTION_EVENT   0x040040F0E2ul    // Configure the controller to capture the
-                                                    // CAR Corruption
-// FUNC_0 registers
-// ----------------
-#define LINK_INIT_CTRL              0x6C
-#define LINK_INIT_CTRL_REQ_DIS      0x02        // [1] = ReqDis
-#define LINK_INIT_COLD_RST_DET      BIT4
-#define LINK_INIT_BIOS_RST_DET_0    BIT5
-#define LINK_INIT_BIOS_RST_DET_1    BIT9
-#define LINK_INIT_BIOS_RST_DET_2    BIT10
-#define LINK_INIT_BIOS_RST_DET      BIT9 | BIT10
-#define EXTENDED_NODE_ID            0x160
-
-#define CORE_CTRL                   0x1DC
-#define CORE_CTRL_CORE1_EN          0x00000002ul
-#define CORE_CTRL_CORE2_EN          0x00000004ul
-#define CORE_CTRL_CORE3_EN          0x00000008ul
-#define CORE_CTRL_CORE4_EN          0x00000010ul
-#define CORE_CTRL_CORE5_EN          0x00000020ul
-#define CORE_CTRL_CORE6_EN          0x00000040ul
-#define CORE_CTRL_CORE7_EN          0x00000080ul
-#define CORE_CTRL_CORE8_EN          0x00000100ul
-#define CORE_CTRL_CORE9_EN          0x00000200ul
-
-// FUNC_3 registers
-// ----------------
-#define HARDWARE_THERMAL_CTRL_REG       0x64
-#define SOFTWARE_THERMAL_CTRL_REG       0x68
-
-#define ACPI_PSC_0_REG                  0x80    // ACPI Power State Control Registers
-#define ACPI_PSC_4_REG                  0x84
-
-#define NB_CFG_HIGH_REG                 0x8C
-#define POWER_CTRL_MISCELLANEOUS_REG    0xA0
-#define CLOCK_POWER_TIMING_CTRL2_REG    0xDC
-#define NORTH_BRIDGE_CAPABILITIES_REG   0xE8
-#define MULTI_NODE_CPU                  29
-#define CPUID_FMR                       0xFC    // Family / Model registers
-#define DOWNCORE_CTRL                   0x190   // Downcore Control Register
-
-#define LINK_TO_XCS_TOKEN_COUNT_REG_3X148 0x148
-#define REG_HT4_PHY_OFFSET_BASE_4X180    0x180
-#define REG_HT4_PHY_DATA_PORT_BASE_4X184 0x184
-
-// FUNC_4 registers
-// ----------------
-/* Native Die CPUID Register F4x160 */
-#define NATIVE_DIE_CPUID_REG 0x160
-#define NATIVE_DIE_CPUID_PCI_ADDR (MAKE_SBDFO (0, 0, 0x18, FUNC_4, NATIVE_DIE_CPUID_REG))
-
-/// Native Die CPUID PCI Register
-typedef struct {
-  UINT32 Stepping:4;                 ///< Stepping
-  UINT32 BaseModel:4;                ///< Base Model
-  UINT32 BaseFamily:4;               ///< Base Family
-  UINT32 :4;                         ///< Reserved
-  UINT32 ExtModel:4;                 ///< Extended Model
-  UINT32 ExtFamily:8;                ///< Extended Family
-  UINT32 :4;                         ///< Reserved
-} NATIVE_DIE_CPUID_REGISTER;
-
-// FUNC_5 registers
-// ----------------
-#define COMPUTE_UNIT_STATUS       0x80
-#define NORTH_BRIDGE_CAPABILITIES_2_REG  0x84
-
-
-// Misc. defines.
-#define PCI_DEV_BASE    24
-
-#define CPUID_STEPPING_MASK      0x0000000Ful
-#define CPUID_BASE_MODEL_MASK    0x000000F0ul
-#define CPUID_BASE_FAMILY_MASK   0x00000F00ul
-#define CPUID_EXT_MODEL_MASK     0x000F0000ul
-#define CPUID_EXT_FAMILY_MASK    0x0FF00000ul
-
-#define TN_SOCKET_FP2       0
-#define TN_SOCKET_FS1       1
-#define TN_SOCKET_FM2       2
-#define KV_SOCKET_FP3       0
-#define KV_SOCKET_FM2r2     1
-#define SOCKET_IGNORE       0xF
-
-#define LAPIC_BASE_ADDR_MASK    0x0000FFFFFFFFF000ull
-#define APIC_EXT_BRDCST_MASK    0x000E0000ul
-#define APIC_ENABLE_BIT         0x00000800ul
-#define LOCAL_APIC_ADDR         0xFEE00000ul
-#define INT_CMD_REG_LO          0x300
-#define INT_CMD_REG_HI          0x310
-#define REMOTE_MSG_REG          0x380
-#define REMOTE_READ_REG         0xC0
-#define APIC_ID_REG             0x20
-#define APIC20_ApicId           24
-#define CMD_REG_TO_READ_DATA    0x338
-
-#define MAX_CORE_ID_SIZE 8
-#define MAX_CORE_ID_MASK ((1 << MAX_CORE_ID_SIZE) - 1)
-
-/*-------------------------
- * Default definitions
- *-------------------------
- */
-#define DOWNCORE_MASK_SINGLE    0xFFFFFFFEul
-#define DOWNCORE_MASK_DUAL      0xFFFFFFFCul
-#define DOWNCORE_MASK_TRI       0xFFFFFFF8ul
-#define DOWNCORE_MASK_FOUR      0xFFFFFFF0ul
-#define DOWNCORE_MASK_FIVE      0xFFFFFFE0ul
-#define DOWNCORE_MASK_SIX       0xFFFFFFC0ul
-#define DOWNCORE_MASK_SEVEN     0xFFFFFF80ul
-#define DOWNCORE_MASK_EIGHT     0xFFFFFF00ul
-#define DOWNCORE_MASK_TEN       0xFFFFFC00ul
-#define DOWNCORE_MASK_TWELVE    0xFFFFF000ul
-#define DOWNCORE_MASK_FOURTEEN  0xFFFFC000ul
-#define DOWNCORE_MASK_DUAL_COMPUTE_UNIT  0xFFFFFFFAul
-#define DOWNCORE_MASK_TRI_COMPUTE_UNIT   0xFFFFFFEAul
-#define DOWNCORE_MASK_FOUR_COMPUTE_UNIT  0xFFFFFFAAul
-#define DOWNCORE_MASK_FIVE_COMPUTE_UNIT  0xFFFFFEAAul
-#define DOWNCORE_MASK_SIX_COMPUTE_UNIT   0xFFFFFAAAul
-#define DOWNCORE_MASK_SEVEN_COMPUTE_UNIT 0xFFFFEAAAul
-#define DOWNCORE_MASK_EIGHT_COMPUTE_UNIT 0xFFFFAAAAul
-
-#define DELIVERY_STATUS             BIT13
-#define REMOTE_READ_STAT_MASK       0x00030000ul
-#define REMOTE_DELIVERY_PENDING     0x00010000ul
-#define REMOTE_DELIVERY_DONE        0x00020000ul
-
-/*
- * --------------------------------------------------------------------------------------
- *
- *             D E F I N E S    /   T Y P E D E F S   /  S T R U C T U R E S
- *
- * --------------------------------------------------------------------------------------
- */
-
-/// CpuEarly param type
-typedef struct {
-  IN       UINT8                  MemInitPState;        ///< Pstate value during memory initial
-  IN       PLATFORM_CONFIGURATION PlatformConfig;       ///< Runtime configurable user options
-} AMD_CPU_EARLY_PARAMS;
-
-/// CPUID
-typedef enum {
-  REG_EAX,                                    ///< EAX
-  REG_EBX,                                    ///< EBX
-  REG_ECX,                                    ///< ECX
-  REG_EDX                                     ///< EDX
-} CPUID_REG;
-
-#endif      // _CPU_REGISTERS_H_
-

pi/amd/00630F01/Proc/CPU/heapManager.h

diff --git a/pi/amd/00630F01/Proc/CPU/heapManager.h b/pi/amd/00630F01/Proc/CPU/heapManager.h
deleted file mode 100644
index 7a68ed5..0000000
--- a/pi/amd/00630F01/Proc/CPU/heapManager.h
+++ /dev/null
@@ -1,258 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Heap Manager and Heap Allocation APIs, and related functions.
- *
- * Contains code that initialize, maintain, and allocate the heap space.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 296129 $   @e \$Date: 2014-06-23 09:45:14 -0500 (Mon, 23 Jun 2014) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright 2008 - 2014 ADVANCED MICRO DEVICES, INC.  All Rights Reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-#ifndef _HEAP_MANAGER_H_
-#define _HEAP_MANAGER_H_
-
-/*---------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *---------------------------------------------------------------------------------------
- */
-
-
-/*---------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *---------------------------------------------------------------------------------------
- */
-#define AMD_MTRR_VARIABLE_BASE0 0x200
-#define AMD_MTRR_VARIABLE_HEAP_BASE 0x20A
-#define AMD_MTRR_VARIABLE_HEAP_MASK (AMD_MTRR_VARIABLE_HEAP_BASE + 1)
-
-#define AMD_HEAP_START_ADDRESS  0x400000ul
-#define AMD_HEAP_REGION_END_ADDRESS 0xBFFFFFul
-#define AMD_HEAP_SIZE_PER_CORE  0x010000ul
-#define AMD_HEAP_INVALID_HEAP_OFFSET 0xFFFFFFFFul
-#define AMD_HEAP_MTRR_MASK ((0xFFFFFFFFFFFFF800ull & (((UINT64)AMD_HEAP_SIZE_PER_CORE ^ (-1)) + 1)) | 0x800)
-#define AMD_HEAP_SIZE_DWORD_PER_CORE  (AMD_HEAP_SIZE_PER_CORE / 4)
-
-#define AMD_TEMP_TOM            0x20000000ul  // Set TOM to 512 MB (temporary value)
-#define AMD_VAR_MTRR_ENABLE_BIT 0x100000ul    // bit 20
-
-#define AMD_HEAP_RAM_ADDRESS    0xB0000ul
-
-#define HEAP_SIGNATURE_VALID    0x50414548ul // Signature: 'HEAP'
-#define HEAP_SIGNATURE_INVALID  0x00000000ul // Signature cleared
-
-///Heap Manager Life cycle
-#define HEAP_DO_NOT_EXIST_YET        1
-#define HEAP_LOCAL_CACHE             2
-#define HEAP_TEMP_MEM                3
-#define HEAP_SYSTEM_MEM              4
-#define HEAP_DO_NOT_EXIST_ANYMORE    5
-#define HEAP_S3_RESUME               6
-#define HEAP_RUNTIME_SYSTEM_MEM      7
-
-///Heap callout
-#define HEAP_CALLOUT_BOOTTIME        0
-#define HEAP_CALLOUT_RUNTIME         1
-
-#define AMD_MTRR_FIX64k_00000    0x250
-#define AMD_MTRR_FIX16k_80000    0x258
-#define AMD_MTRR_FIX16k_A0000    0x259
-#define AMD_MTRR_FIX4k_C0000     0x268
-#define AMD_MTRR_FIX4k_C8000     0x269
-#define AMD_MTRR_FIX4k_D0000     0x26A
-#define AMD_MTRR_FIX4k_D8000     0x26B
-#define AMD_MTRR_FIX4k_E0000     0x26C
-#define AMD_MTRR_FIX4k_E8000     0x26D
-#define AMD_MTRR_FIX4k_F0000     0x26E
-#define AMD_MTRR_FIX4k_F8000     0x26F
-
-#define AMD_MTRR_FIX64K_WB_DRAM  0x1E
-#define AMD_MTRR_FIX64K_WT_DRAM  0x1C
-#define AMD_MTRR_FIX64K_UC_DRAM  0x18
-#define AMD_MTRR_FIX16K_WB_DRAM  0x1E1E1E1E1E1E1E1Eull
-#define AMD_MTRR_FIX16K_WT_DRAM  0x1C1C1C1C1C1C1C1Cull
-#define AMD_MTRR_FIX16K_UC_DRAM  0x1818181818181818ull
-#define AMD_MTRR_FIX4K_WB_DRAM   0x1E1E1E1E1E1E1E1Eull
-#define AMD_MTRR_FIX4K_WT_DRAM   0x1C1C1C1C1C1C1C1Cull
-#define AMD_MTRR_FIX4K_UC_DRAM   0x1818181818181818ull
-
-/*---------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *---------------------------------------------------------------------------------------
- */
-/// Allocate Heap Parameters
-typedef struct _ALLOCATE_HEAP_PARAMS {
-  UINT32  RequestedBufferSize;                    ///< Size of buffer.
-  UINT32  BufferHandle;                           ///< An unique ID of buffer.
-  UINT8   Persist;                                ///< A flag. If marked, to be stored and passed to AmdInitLate.
-  UINT8   *BufferPtr;                             ///< Pointer to buffer.
-} ALLOCATE_HEAP_PARAMS;
-
-/// Locate Heap Parameters
-typedef struct _LOCATE_HEAP_PTR {
-  UINT32  BufferHandle;                           ///< An unique ID of buffer.
-  UINT32 BufferSize;                              ///< Data buffer size.
-  UINT8   *BufferPtr;                             ///< Pointer to buffer.
-} LOCATE_HEAP_PTR;
-
-/// Heap Node Header
-typedef struct _BUFFER_NODE {
-  UINT32        BufferHandle;                     ///< An unique ID of buffer.
-  UINT32        BufferSize;                       ///< Size of buffer.
-  UINT8         Persist;                          ///< A flag. If marked, to be stored and passed to AmdInitLate.
-  UINT8         PadSize;                          ///< Size of pad.
-  UINT32        OffsetOfNextNode;                 ///< Offset of next node (relative to the base).
-} BUFFER_NODE;
-
-/// Heap Manager
-typedef struct _HEAP_MANAGER {
-  UINT32 Signature;                               ///< a signature to indicate if the heap is valid.
-  UINT32 UsedSize;                                ///< Used size of heap.
-  UINT32 FirstActiveBufferOffset;                 ///< Offset of the first active buffer.
-  UINT32 FirstFreeSpaceOffset;                    ///< Offset of the first free space.
-} HEAP_MANAGER;
-
-/// AGESA Buffer Handles (These are reserved)
-typedef enum {
-  AMD_INIT_RESET_HANDLE = 0x000A000,              ///< Assign 0x000A000 buffer handle to AmdInitReset routine.
-  AMD_INIT_EARLY_HANDLE,                          ///< Assign 0x000A001 buffer handle to AmdInitEarly routine.
-  AMD_INIT_POST_HANDLE,                           ///< Assign 0x000A002 buffer handle to AmdInitPost routine.
-  AMD_INIT_ENV_HANDLE,                            ///< Assign 0x000A003 buffer handle to AmdInitEnv routine.
-  AMD_INIT_MID_HANDLE,                            ///< Assign 0x000A004 buffer handle to AmdInitMid routine.
-  AMD_INIT_LATE_HANDLE,                           ///< Assign 0x000A005 buffer handle to AmdInitLate routine.
-  AMD_INIT_RESUME_HANDLE,                         ///< Assign 0x000A006 buffer handle to AmdInitResume routine.
-  AMD_LATE_RUN_AP_TASK_HANDLE,                    ///< Assign 0x000A007 buffer handle to AmdLateRunApTask routine.
-  AMD_S3_SAVE_HANDLE,                             ///< Assign 0x000A008 buffer handle to AmdS3Save routine.
-  AMD_S3_LATE_RESTORE_HANDLE,                     ///< Assign 0x000A009 buffer handle to AmdS3LateRestore routine.
-  AMD_S3_SCRIPT_SAVE_TABLE_HANDLE,                ///< Assign 0x000A00A buffer handle to be used for S3 save table
-  AMD_S3_SCRIPT_TEMP_BUFFER_HANDLE,               ///< Assign 0x000A00B buffer handle to be used for S3 save table
-  AMD_CPU_AP_TASKING_HANDLE,                      ///< Assign 0x000A00C buffer handle to AP tasking input parameters.
-  AMD_REC_MEM_SOCKET_HANDLE,                      ///< Assign 0x000A00D buffer handle to save socket with memory in memory recovery mode.
-  AMD_MEM_AUTO_HANDLE,                            ///< Assign 0x000A00E buffer handle to AmdMemAuto routine.
-  AMD_MEM_SPD_HANDLE,                             ///< Assign 0x000A00F buffer handle to AmdMemSpd routine.
-  AMD_MEM_DATA_HANDLE,                            ///< Assign 0x000A010 buffer handle to MemData
-  AMD_MEM_TRAIN_BUFFER_HANDLE,                    ///< Assign 0x000A011 buffer handle to allocate buffer for training
-  AMD_MEM_S3_DATA_HANDLE,                         ///< Assign 0x000A012 buffer handle to special case register for S3
-  AMD_MEM_S3_NB_HANDLE,                           ///< Assign 0x000A013 buffer handle to NB block for S3
-  AMD_MEM_S3_MR0_DATA_HANDLE,                     ///< Assign 0x000A014 buffer handle to MR0 data block for S3
-  AMD_UMA_INFO_HANDLE,                            ///< Assign 0x000A015 buffer handle to be used for Uma information
-  AMD_DMI_MEM_DEV_INFO_HANDLE,                    ///< Assign 0x000A016 buffer handle to DMI Type16 17 19 20 information
-  EVENT_LOG_BUFFER_HANDLE,                        ///< Assign 0x000A017 buffer handle to Event Log
-  IDS_CONTROL_HANDLE,                             ///< Assign 0x000A018 buffer handle to AmdIds routine.
-  IDS_HDT_OUT_BUFFER_HANDLE,                      ///< Assign 0x000A019 buffer handle to be used for HDTOUT support.
-  IDS_CHECK_POINT_PERF_HANDLE,                    ///< Assign 0x000A01A buffer handle to Performance analysis
-  AMD_PCIE_COMPLEX_DATA_HANDLE,                   ///< Assign 0x000A01B buffer handle to be used for PCIe support
-  AMD_MEM_SYS_DATA_HANDLE,                        ///< Assign 0x000A01C buffer handle to be used for memory data structure
-  AMD_GNB_SMU_CONFIG_HANDLE,                      ///< Assign 0x000A01D buffer handle to be used for GNB SMU configuration
-  AMD_PP_FUSE_TABLE_HANDLE,                       ///< Assign 0x000A01E buffer handle to be used for TT fuse table
-  AMD_GFX_PLATFORM_CONFIG_HANDLE,                 ///< Assign 0x000A01F buffer handle to be used for Gfx platform configuration
-  AMD_GNB_TEMP_DATA_HANDLE,                       ///< Assign 0x000A020 buffer handle for GNB general purpose data block
-  AMD_MEM_2D_RDQS_HANDLE,                         ///< Assign 0x000A021 buffer handle for 2D training
-  AMD_MEM_2D_RD_WR_HANDLE,                        ///< Assign 0x000A022 buffer handle for 2D Read/Write training
-  AMD_GNB_IOMMU_SCRATCH_MEM_HANDLE,               ///< Assign 0x000A023 buffer handle to be used for GNB IOMMU scratch memory
-  AMD_MEM_S3_SAVE_HANDLE,                         ///< Assign 0x000A024 buffer handle for memory data saved right after memory init
-  AMD_MEM_2D_RDQS_RIM_HANDLE,                     ///< Assign 0x000A025 buffer handle for 2D training Eye RIM Search
-  AMD_MEM_2D_RD_WR_RIM_HANDLE,                    ///< Assign 0x000A026 buffer handle for 2D Read/Write training Eye RIM Search
-  AMD_CPU_NB_PSTATE_FIXUP_HANDLE,                 ///< Assign 0x000A027 buffer handle for an NB P-state workaround
-  AMD_MEM_CRAT_INFO_BUFFER_HANDLE,                ///< Assign 0x000A028 buffer handle for CRAT Memory affinity component structure
-  AMD_SKIP_MEM_S3_SAVE,                           ///< Assign 0x000A029 buffer handle for the flag to skip memory S3 save
-  AMD_SCS_SMU_RAM_INFO,                           ///< Assign 0x000A02A buffer handle for keeping the result of SMU SCS service
-  AMD_SCS_HWP0_FREQ,                              ///< Assign 0x000A02B buffer handler for keeping frequency of HWP0
-  AMD_IS_FEATURE_ENABLED,                         ///< Assign 0x000A02C buffer handle for keeping the result of IsFeatureEnabled
-  AMD_MEM_DATAEYE_WORK_AREA_HANDLE,               ///< Assign 0x000A02D buffer handle for Composite Data Eye Compression Work Area
-  AMD_GNB_SAMU_PATCH_HANDLE,                      ///< Assign 0x000A02E buffer handle for Samu patch buffer
-  AMD_GNB_SAMU_BOOT_CONTROL_HANDLE,               ///< Assign 0x000A02F buffer handle for Samu boot control buffer
-  AMD_GNB_ACP_ENGINE_HANDLE,                      ///< Assign 0x000A030 buffer handle for GNB ACP engine buffer
-  AMD_MEM_PMU_SRAM_MSG_BLOCK_HANDLE,              ///< Assign 0x000A031 buffer handle for PMU SRAM Message Block buffer
-  AMD_GNB_SMU_TABLE_HANDLE,                       ///< Assign 0x000A032 buffer handle for GNB SMU table buffer
-  AMD_GNB_CRAT_HSA_TABLE_HANDLE,                  ///< Assign 0x000A033 buffer handle for GNB CRAT HSA unit table
-  AMD_GNB_BUILD_OPTIONS_HANDLE,                   ///< Assign 0x000A034 buffer handle for GNB build options
-  AMD_S3_FINAL_RESTORE_HANDLE,                    ///< Assign 0x000A035 buffer handle to AmdS3FinalRestore routine.
-  AMD_MEM_MISC_HANDLES_START = 0x1000000,         ///< Reserve 0x1000000 to 0x1FFFFFF buffer handle
-  AMD_MEM_MISC_HANDLES_END = 0x1FFFFFF,           ///< miscellaneous memory init tasks' buffers.
-  AMD_HEAP_IN_MAIN_MEMORY_HANDLE = 0x8000000,     ///< Assign 0x8000000 to AMD_HEAP_IN_MAIN_MEMORY_HANDLE.
-  SOCKET_DIE_MAP_HANDLE = 0x534F4B54,             ///< 'sokt'
-  NODE_ID_MAP_HANDLE = 0x4E4F4445,                ///< 'node'
-  HOP_COUNT_TABLE_HANDLE = 0x484F5053,            ///< 'hops'
-  AMD_FCH_RESET_DATA_BLOCK_HANDLE = 0x46434852,   ///< 'FCHR' Buffer handle for FCH private data block at InitReset
-  AMD_FCH_DATA_BLOCK_HANDLE = 0x46434845,         ///< 'FCHE' Buffer handle for FCH private data block at InitEnv
-  IDS_TRAP_TABLE_HANDLE = 0x49524547,             ///< 'IREG' Handle for IDS register table
-  IDS_SAVE_IDTR_HANDLE = 0x49445452,              ///< 'IDTR'
-  IDS_BSC_IDT_HANDLE = 0x42534349,                ///< 'BSCI' BSC Idt table
-  IDS_NV_TO_CMOS_HANDLE = 0x534D4349,             ///< 'ICMS' Handle for IDS CMOS save
-  IDS_GRA_HANDLE = 0x41524749,                    ///< 'IGRA' Handle for IDS GRA save
-  IDS_EXTEND_HANDLE = 0x54584549,                 ///< 'IEXT' Handle for IDS extend module
-  IDS_TEMP_DATA_HANDLE = 0x504D5459,              ///< 'ITMP' Handle for IDS temp data
-} AGESA_BUFFER_HANDLE;
-
-
-/*---------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *---------------------------------------------------------------------------------------
- */
-
-AGESA_STATUS
-HeapManagerInit (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-HeapAllocateBuffer (
-  IN OUT   ALLOCATE_HEAP_PARAMS *AllocateHeapParams,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-HeapDeallocateBuffer (
-  IN       UINT32 BufferHandle,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-HeapLocateBuffer (
-  IN OUT   LOCATE_HEAP_PTR *LocateHeap,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-UINT64
-HeapGetBaseAddress (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-EventLogInitialization (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-#endif // _HEAP_MANAGER_H_

pi/amd/00630F01/Proc/Common/AmdFch.h

diff --git a/pi/amd/00630F01/Proc/Common/AmdFch.h b/pi/amd/00630F01/Proc/Common/AmdFch.h
deleted file mode 100644
index 469d5af..0000000
--- a/pi/amd/00630F01/Proc/Common/AmdFch.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD FCH Component
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*
-*****************************************************************************
-*
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-* ***************************************************************************
-*
-*/
-
-#ifndef _AMD_FCH_H_
-#define _AMD_FCH_H_
-
-typedef AGESA_STATUS FCH_INIT (IN VOID *DataPtr);
-typedef VOID FCH_TASK_ENTRY (IN VOID *FchCfg);
-
-
-/// FCH API build options
-typedef struct {
-  FCH_INIT        *InitReset;                   ///< InitReset
-  FCH_INIT        *InitResetConstructor;        ///< InitResetConstructor
-  FCH_INIT        *InitEnv;                     ///< InitEnv
-  FCH_INIT        *InitEnvConstructor;          ///< InitEnvConstructor
-  FCH_INIT        *InitMid;                     ///< InitMid
-  FCH_INIT        *InitMidConstructor;          ///< InitMidConstructor
-  FCH_INIT        *InitLate;                    ///< InitLate
-  FCH_INIT        *InitLateConstructor;         ///< InitLateConstructor
-} BLDOPT_FCH_FUNCTION;
-
-#endif

pi/amd/00630F01/Proc/Fch/Common/AcpiLib.h

diff --git a/pi/amd/00630F01/Proc/Fch/Common/AcpiLib.h b/pi/amd/00630F01/Proc/Fch/Common/AcpiLib.h
deleted file mode 100644
index d18fb12..0000000
--- a/pi/amd/00630F01/Proc/Fch/Common/AcpiLib.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH ACPI lib
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*
-*****************************************************************************
-*
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#ifndef _FCH_ACPILIB_H_
-#define _FCH_ACPILIB_H_
-///
-/// RSDP - ACPI 2.0 table RSDP
-///
-typedef struct _RSDP_HEADER {
-  UINT64               Signature;                      ///< RSDP signature "RSD PTR"
-  UINT8                CheckSum;                       ///< checksum of the first 20 bytes
-  UINT8                OEMID[6];                       ///< OEM ID
-  UINT8                Revision;                       ///< 0 for APCI 1.0, 2 for ACPI 2.0
-  UINT32               RsdtAddress;                    ///< physical address of RSDT
-  UINT32               Length;                         ///< total length of RSDP (including extended part)
-  UINT64               XsdtAddress;                    ///< physical address of XSDT
-  UINT8                ExtendedCheckSum;               ///< chechsum of whole table
-  UINT8                Reserved[3];                    ///< Reserved
-} RSDP_HEADER;
-
-///
-/// DESCRIPTION_HEADER - ACPI common table header
-///
-typedef struct _DESCRIPTION_HEADER {
-  UINT32               Signature;                      ///< ACPI signature (4 ASCII characters)
-  UINT32               Length;                         ///< Length of table, in bytes, including header
-  UINT8                Revision;                       ///< ACPI Specification minor version #
-  UINT8                CheckSum;                       ///< To make sum of entire table == 0
-  UINT8                OemId[6];                       ///< OEM identification
-  UINT8                OemTableId[8];                  ///< OEM table identification
-  UINT32               OemRevision;                    ///< OEM revision number
-  UINT32               CreatorId;                      ///< ASL compiler vendor ID
-  UINT32               CreatorRevision;                ///< ASL compiler revision number
-} DESCRIPTION_HEADER;
-
-///
-/// _AcpiRegWrite - ACPI MMIO register R/W structure
-///
-typedef struct _ACPI_REG_WRITE {
-  UINT8        MmioBase;               /// MmioBase: Index of Fch block (For instance GPIO_BASE:0x01 SMI_BASE:0x02)
-  UINT8        MmioReg;                /// MmioReg      : Register index
-  UINT8        DataAndMask;            /// DataANDMask  : AND Register Data
-  UINT8        DataOrMask;             /// DataOrMask   : Or Register Data
-} ACPI_REG_WRITE;
-
-VOID*     AcpiLocateTable (IN UINT32 Signature);
-VOID      AcpiSetTableCheckSum (IN VOID *TablePtr);
-UINT8     AcpiGetTableCheckSum (IN VOID *TablePtr);
-UINT8     GetByteSum (IN VOID *DataPtr, IN UINT32 Length);
-
-#endif

pi/amd/00630F01/Proc/Fch/Common/FchBiosRamUsage.h

diff --git a/pi/amd/00630F01/Proc/Fch/Common/FchBiosRamUsage.h b/pi/amd/00630F01/Proc/Fch/Common/FchBiosRamUsage.h
deleted file mode 100644
index 82dd750..0000000
--- a/pi/amd/00630F01/Proc/Fch/Common/FchBiosRamUsage.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH BIOS Ram usage
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*
-*****************************************************************************
-*
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#ifndef _FCH_BIOS_RAM_USAGE_H_
-#define _FCH_BIOS_RAM_USAGE_H_
-
-#define RESTORE_MEMORY_CONTROLLER_START       0
-#define XHCI_REGISTER_BAR00                   0xD0
-#define XHCI_REGISTER_BAR01                   0xD1
-#define XHCI_REGISTER_BAR02                   0xD2
-#define XHCI_REGISTER_BAR03                   0xD3
-#define XHCI_REGISTER_04H                     0xD4
-#define XHCI_REGISTER_0CH                     0xD5
-#define XHCI_REGISTER_3CH                     0xD6
-#define XHCI1_REGISTER_BAR00                  0xE0
-#define XHCI1_REGISTER_BAR01                  0xE1
-#define XHCI1_REGISTER_BAR02                  0xE2
-#define XHCI1_REGISTER_BAR03                  0xE3
-#define XHCI1_REGISTER_04H                    0xE4
-#define XHCI1_REGISTER_0CH                    0xE5
-#define XHCI1_REGISTER_3CH                    0xE6
-#define RTC_WORKAROUND_DATA_START             0xF0
-#define BOOT_TIME_FLAG_SEC                    0xF8
-#define BOOT_TIME_FLAG_INT19                  0xFC
-
-#endif
-

pi/amd/00630F01/Proc/Fch/Common/FchCommonCfg.h

diff --git a/pi/amd/00630F01/Proc/Fch/Common/FchCommonCfg.h b/pi/amd/00630F01/Proc/Fch/Common/FchCommonCfg.h
deleted file mode 100644
index 39a11ba..0000000
--- a/pi/amd/00630F01/Proc/Fch/Common/FchCommonCfg.h
+++ /dev/null
@@ -1,1282 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH Function Support Definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 302381 $   @e \$Date: 2014-08-29 16:59:06 -0500 (Fri, 29 Aug 2014) $
- *
- */
-/*********************************************************************************
- *
- * Copyright 2008 - 2014 ADVANCED MICRO DEVICES, INC.  All Rights Reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *********************************************************************************/
-#ifndef _FCH_COMMON_CFG_H_
-#define _FCH_COMMON_CFG_H_
-
-#pragma pack (push, 1)
-
-//-----------------------------------------------------------------------------
-//                     FCH DEFINITIONS AND MACROS
-//-----------------------------------------------------------------------------
-
-//
-// FCH Component Data Structure Definitions
-//
-
-/// PCI_ADDRESS - PCI access structure
-#define PCI_ADDRESS(bus, dev, func, reg) \
-                   (UINT32) ( (((UINT32)bus) << 24) + (((UINT32)dev) << 19) + (((UINT32)func) << 16) + ((UINT32)reg) )
-
-#define CPUID_FMF        0x80000001ul  // Family Model Features information
-///
-///  - Byte Register R/W structure
-///
-typedef struct _REG8_MASK {
-  UINT8                 RegIndex;                       /// RegIndex - Reserved
-  UINT8                 AndMask;                        /// AndMask - Reserved
-  UINT8                 OrMask;                         /// OrMask - Reserved
-} REG8_MASK;
-
-
-///
-/// PCIE Reset Block
-///
-typedef enum {
-  NbBlock,                                              ///< Reset for NB PCIE
-  FchBlock                                              ///< Reset for FCH GPP
-} RESET_BLOCK;
-
-///
-/// PCIE Reset Operation
-///
-typedef enum {
-  DeassertReset,                                        ///< DeassertRese - Deassert reset
-  AssertReset                                           ///< AssertReset - Assert reset
-} RESET_OP;
-
-
-///
-/// SD structure
-///
-typedef struct {
-  SD_MODE               SdConfig;                       ///< SD Mode configuration
-                                                        ///   @li <b>00</b> - Disabled
-                                                        ///   @li <b>00</b> - AMDA
-                                                        ///   @li <b>01</b> - DMA
-                                                        ///   @li <b>10</b> - PIO
-                                                        ///
-  UINT8                 SdSpeed;                        ///< SD Speed
-                                                        ///   @li <b>0</b> - Low speed
-                                                        ///   @li <b>1</b> - High speed
-                                                        ///
-  UINT8                 SdBitWidth;                     ///< SD Bit Width
-                                                        ///   @li <b>0</b> - 32BIT clear 23
-                                                        ///   @li <b>1</b> - 64BIT, set 23,default
-                                                        ///
-  UINT32                SdSsid;                         ///< SD Subsystem ID
-  SD_CLOCK_CONTROL      SdClockControl;                 ///< SD Clock Control
-  BOOLEAN               SdClockMultiplier;              ///< SD Clock Multiplier enable/disable
-  UINT8                 SdReTuningMode;                 ///< SD Re-tuning modes select
-                                                        ///    @li <b>0</b> - mode 1
-                                                        ///    @li <b>1</b> - mode 2
-                                                        ///    @li <b>2</b> - mode 3
-  UINT8                 SdHostControllerVersion;        ///< SD controller Version
-                                                        ///    @li <b>1</b> - SD 2.0
-                                                        ///    @li <b>2</b> - SD 3.0
-  UINT8                 SdrCapabilities;                ///< SDR Capability mode select
-                                                        ///    @li <b>00</b> - SDR25/15
-                                                        ///    @li <b>01</b> - SDR50
-                                                        ///    @li <b>11</b> - SDR104
-  UINT8                 SdSlotType;                     ///< SDR Slot Type select
-                                                        ///    @li <b>00</b> - Removable Card Slot
-                                                        ///    @li <b>01</b> - Embedded Slot for One Device
-                                                        ///    @li <b>10</b> - Shared Bus Slot
-} FCH_SD;
-
-///
-/// CODEC_ENTRY - Fch HD Audio OEM Codec structure
-///
-typedef struct _CODEC_ENTRY {
-  UINT8                 Nid;                            /// Nid - Reserved
-  UINT32                Byte40;                         /// Byte40 - Reserved
-} CODEC_ENTRY;
-
-///
-/// CODEC_TBL_LIST - Fch HD Audio Codec table list
-///
-typedef struct _CODEC_TBL_LIST {
-  UINT32                CodecId;                        /// CodecID - Codec ID
-  CONST CODEC_ENTRY*    CodecTablePtr;                  /// CodecTablePtr - Codec table pointer
-} CODEC_TBL_LIST;
-
-///
-/// AZALIA_PIN - HID Azalia or GPIO define structure.
-///
-typedef struct _AZALIA_PIN {
-  UINT8                 AzaliaSdin0;                    ///< AzaliaSdin0
-                                                        ///   @par
-                                                        ///   @li <b>00</b> - GPIO PIN
-                                                        ///   @li <b>10</b> - As a Azalia SDIN pin
-
-  UINT8                 AzaliaSdin1;                    ///< AzaliaSdin1
-                                                        ///   @par
-                                                        /// SDIN1 is define at BIT2 & BIT3
-                                                        ///   @li <b>00</b> - GPIO PIN
-                                                        ///   @li <b>10</b> - As a Azalia SDIN pin
-
-  UINT8                 AzaliaSdin2;                    ///< AzaliaSdin2
-                                                        ///   @par
-                                                        /// SDIN2 is define at BIT4 & BIT5
-                                                        ///   @li <b>00</b> - GPIO PIN
-                                                        ///   @li <b>10</b> - As a Azalia SDIN pin
-
-  UINT8                 AzaliaSdin3;                    ///< AzaliaSdin3
-                                                        ///   @par
-                                                        /// SDIN3 is define at BIT6 & BIT7
-                                                        ///   @li <b>00</b> - GPIO PIN
-                                                        ///   @li <b>10</b> - As a Azalia SDIN pin
-} AZALIA_PIN;
-
-///
-/// Azalia structure
-///
-typedef struct {
-  HDA_CONFIG            AzaliaEnable;                   ///< AzaliaEnable       - Azalia function configuration
-  BOOLEAN               AzaliaMsiEnable;                ///< AzaliaMsiEnable    - Azalia MSI capability
-  UINT32                AzaliaSsid;                     ///< AzaliaSsid         - Azalia Subsystem ID
-  UINT8                 AzaliaPinCfg;                   ///< AzaliaPinCfg       - Azalia Controller SDIN pin Configuration
-                                                        ///  @par
-                                                        ///  @li <b>0</b>       - disable
-                                                        ///  @li <b>1</b>       - enable
-
-  UINT8                 AzaliaFrontPanel;               ///< AzaliaFrontPanel   - Azalia Controller Front Panel Configuration
-                                                        ///   @par
-                                                        /// Support Front Panel configuration
-                                                        ///   @li <b>0</b>      - Auto
-                                                        ///   @li <b>1</b>      - disable
-                                                        ///   @li <b>2</b>      - enable
-
-  UINT8                 FrontPanelDetected;             ///< FrontPanelDetected - Force Azalia Controller Front Panel Configuration
-                                                        ///  @par
-                                                        /// Force Front Panel configuration
-                                                        ///  @li <b>0</b>       - Not Detected
-                                                        ///  @li <b>1</b>       - Detected
-
-  UINT8                 AzaliaSnoop;                    ///< AzaliaSnoop        - Azalia Controller Snoop feature Configuration
-                                                        ///   @par
-                                                        /// Azalia Controller Snoop feature Configuration
-                                                        ///   @li <b>0</b>      - disable
-                                                        ///   @li <b>1</b>      - enable
-
-  UINT8                 AzaliaDummy;                    /// AzaliaDummy         - Reserved */
-
-  AZALIA_PIN            AzaliaConfig;                   /// AzaliaConfig        - Azaliz Pin Configuration
-
-///
-/// AZOEMTBL - Azalia Controller OEM Codec Table Pointer
-///
-  CONST CODEC_TBL_LIST  *AzaliaOemCodecTablePtr;        /// AzaliaOemCodecTablePtr - Oem Azalia Codec Table Pointer
-
-///
-/// AZOEMFPTBL - Azalia Controller Front Panel OEM Table Pointer
-///
-  CONST VOID            *AzaliaOemFpCodecTablePtr;      /// AzaliaOemFpCodecTablePtr - Oem Front Panel Codec Table Pointer
-} FCH_AZALIA;
-
-///
-/// _SPI_DEVICE_PROFILE Spi Device Profile structure
-///
-typedef struct _SPI_DEVICE_PROFILE {
-  UINT32                JEDEC_ID;                       /// JEDEC ID
-  UINT32                RomSize;                        /// ROM Size
-  UINT32                SectorSize;                     /// Sector Size
-  UINT16                MaxNormalSpeed;                 /// Max Normal Speed
-  UINT16                MaxFastSpeed;                   /// Max Fast Speed
-  UINT16                MaxDualSpeed;                   /// Max Dual Speed
-  UINT16                MaxQuadSpeed;                   /// Max Quad Speed
-  UINT8                 QeReadRegister;                 /// QE Read Register
-  UINT8                 QeWriteRegister;                /// QE Write Register
-  UINT8                 QeOperateSize;                  /// QE Operate Size 1byte/2bytes
-  UINT16                QeLocation;                     // QE Location in the register
-} SPI_DEVICE_PROFILE;
-
-///
-/// _SPI_CONTROLLER_PROFILE Spi Device Profile structure
-///
-typedef struct _SPI_CONTROLLER_PROFILE {
-//  UINT32                SPI_CONTROLLER_ID;                       /// SPI Controller ID
-  UINT16                FifoSize;                       /// FIFO Size
-  UINT16                MaxNormalSpeed;                 /// Max Normal Speed
-  UINT16                MaxFastSpeed;                   /// Max Fast Speed
-  UINT16                MaxDualSpeed;                   /// Max Dual Speed
-  UINT16                MaxQuadSpeed;                   /// Max Quad Speed
-} SPI_CONTROLLER_PROFILE;
-
-///
-/// SPI structure
-///
-typedef struct {
-  BOOLEAN               LpcMsiEnable;                   ///< LPC MSI capability
-  UINT32                LpcSsid;                        ///< LPC Subsystem ID
-  UINT32                RomBaseAddress;                 ///< SpiRomBaseAddress
-                                                        ///   @par
-                                                        ///   SPI ROM BASE Address
-                                                        ///
-  UINT8                 SpiSpeed;                       ///< SpiSpeed - Spi Frequency
-                                                        ///  @par
-                                                        ///  SPI Speed [1.0] - the clock speed for non-fast read command
-                                                        ///   @li <b>00</b> - 66Mhz
-                                                        ///   @li <b>01</b> - 33Mhz
-                                                        ///   @li <b>10</b> - 22Mhz
-                                                        ///   @li <b>11</b> - 16.5Mhz
-                                                        ///
-  UINT8                 SpiFastSpeed;                   ///< FastSpeed  - Spi Fast Speed feature
-                                                        ///  SPIFastSpeed [1.0] - the clock speed for Fast Speed Feature
-                                                        ///   @li <b>00</b> - 66Mhz
-                                                        ///   @li <b>01</b> - 33Mhz
-                                                        ///   @li <b>10</b> - 22Mhz
-                                                        ///   @li <b>11</b> - 16.5Mhz
-                                                        ///
-  UINT8                 WriteSpeed;                     ///< WriteSpeed - Spi Write Speed
-                                                        /// @par
-                                                        ///  WriteSpeed [1.0] - the clock speed for Spi write command
-                                                        ///   @li <b>00</b> - 66Mhz
-                                                        ///   @li <b>01</b> - 33Mhz
-                                                        ///   @li <b>10</b> - 22Mhz
-                                                        ///   @li <b>11</b> - 16.5Mhz
-                                                        ///
-  UINT8                 SpiMode;                        ///< SpiMode    - Spi Mode Setting
-                                                        /// @par
-                                                        ///  @li <b>101</b> - Qual-io 1-4-4
-                                                        ///  @li <b>100</b> - Dual-io 1-2-2
-                                                        ///  @li <b>011</b> - Qual-io 1-1-4
-                                                        ///  @li <b>010</b> - Dual-io 1-1-2
-                                                        ///  @li <b>111</b> - FastRead
-                                                        ///  @li <b>110</b> - Normal
-                                                        ///
-  UINT8                 AutoMode;                       ///< AutoMode   - Spi Auto Mode
-                                                        /// @par
-                                                        ///  SPI Auto Mode
-                                                        ///  @li <b>0</b> - Disabled
-                                                        ///  @li <b>1</b> - Enabled
-                                                        ///
-  UINT8                 SpiBurstWrite;                  ///< SpiBurstWrite - Spi Burst Write Mode
-                                                        /// @par
-                                                        ///  SPI Burst Write
-                                                        ///  @li <b>0</b> - Disabled
-                                                        ///  @li <b>1</b> - Enabled
-  BOOLEAN               LpcClk0;                        ///< Lclk0En - LPCCLK0
-                                                        /// @par
-                                                        ///  LPC Clock 0 mode
-                                                        ///  @li <b>0</b> - forced to stop
-                                                        ///  @li <b>1</b> - functioning with CLKRUN protocol
-  BOOLEAN               LpcClk1;                        ///< Lclk1En - LPCCLK1
-                                                        /// @par
-                                                        ///  LPC Clock 1 mode
-                                                        ///  @li <b>0</b> - forced to stop
-                                                        ///  @li <b>1</b> - functioning with CLKRUN protocol
-//  UINT32                SPI100_RX_Timing_Config_Register_38;                 ///< SPI100_RX_Timing_Config_Register_38
-//  UINT16                SPI100_RX_Timing_Config_Register_3C;                 ///< SPI100_RX_Timing_Config_Register_3C
-//  UINT8                 SpiProtectEn0_1d_34;                  ///
-  UINT8                 SPI100_Enable;                  ///
-  SPI_DEVICE_PROFILE    SpiDeviceProfile;               /// Spi Device Profile
-} FCH_SPI;
-
-
-///
-/// IDE structure
-///
-typedef struct {
-  BOOLEAN               IdeEnable;                      ///< IDE function switch
-  BOOLEAN               IdeMsiEnable;                   ///< IDE MSI capability
-  UINT32                IdeSsid;                        ///< IDE controller Subsystem ID
-} FCH_IDE;
-
-///
-/// IR Structure
-///
-typedef struct {
-  IR_CONFIG             IrConfig;                       ///< IrConfig
-  UINT8                 IrPinControl;                   ///< IrPinControl
-} FCH_IR;
-
-
-///
-/// PCI Bridge Structure
-///
-typedef struct {
-  BOOLEAN               PcibMsiEnable;                  ///< PCI-PCI Bridge MSI capability
-  UINT32                PcibSsid;                       ///< PCI-PCI Bridge Subsystem ID
-  UINT8                 PciClks;                        ///< 33MHz PCICLK0/1/2/3 Enable, bits [0:3] used
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  UINT16                PcibClkStopOverride;            ///< PCIB_CLK_Stop Override
-  BOOLEAN               PcibClockRun;                   ///< Enable the auto clkrun functionality
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-} FCH_PCIB;
-
-
-///
-/// - SATA Phy setting structure
-///
-typedef struct _SATA_PHY_SETTING {
-  UINT16                PhyCoreControlWord;             /// PhyCoreControlWord - Reserved
-  UINT32                PhyFineTuneDword;               /// PhyFineTuneDword - Reserved
-} SATA_PHY_SETTING;
-
-///
-/// SATA main setting structure
-///
-typedef struct _SATA_ST {
-  UINT8                 SataModeReg;                    ///< SataModeReg - Sata Controller Mode
-  BOOLEAN               SataEnable;                     ///< SataEnable - Sata Controller Function
-                                                        ///   @par
-                                                        /// Sata Controller
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  UINT8                 Sata6AhciCap;                   ///< Sata6AhciCap - Reserved */
-  BOOLEAN               SataSetMaxGen2;                 ///< SataSetMaxGen2 - Set Sata Max Gen2 mode
-                                                        ///   @par
-                                                        /// Sata Controller Set to Max Gen2 mode
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  BOOLEAN               IdeEnable;                      ///< IdeEnable - Hidden IDE
-                                                        ///  @par
-                                                        /// Sata IDE Controller Combined Mode
-                                                        ///   Enable -  SATA controller has control over Port0 through Port3,
-                                                        ///     IDE controller has control over Port4 and Port7.
-                                                        ///   Disable - SATA controller has full control of all 8 Ports
-                                                        ///     when operating in non-IDE mode.
-                                                        ///  @li <b>0</b> - enable
-                                                        ///  @li <b>1</b> - disable
-                                                        ///
-  UINT8                 SataClkMode;                    /// SataClkMode - Reserved
-} SATA_ST;
-
-///
-/// SATA_PORT_ST - SATA PORT structure
-///
-typedef struct _SATA_PORT_ST {
-  UINT8                 SataPortReg;                    ///< SATA Port bit map - bits[0:7] for ports 0 ~ 7
-                                                        ///  @li <b>0</b> - disable
-                                                        ///  @li <b>1</b> - enable
-                                                        ///
-  BOOLEAN               Port0;                          ///< PORT0 - 0:disable, 1:enable
-  BOOLEAN               Port1;                          ///< PORT1 - 0:disable, 1:enable
-  BOOLEAN               Port2;                          ///< PORT2 - 0:disable, 1:enable
-  BOOLEAN               Port3;                          ///< PORT3 - 0:disable, 1:enable
-  BOOLEAN               Port4;                          ///< PORT4 - 0:disable, 1:enable
-  BOOLEAN               Port5;                          ///< PORT5 - 0:disable, 1:enable
-  BOOLEAN               Port6;                          ///< PORT6 - 0:disable, 1:enable
-  BOOLEAN               Port7;                          ///< PORT7 - 0:disable, 1:enable
-} SATA_PORT_ST;
-
-///
-///< _SATA_PORT_MD - Force Each PORT to GEN1/GEN2 mode
-///
-typedef struct _SATA_PORT_MD {
-  UINT16                SataPortMode;                   ///< SATA Port GEN1/GEN2 mode bit map - bits [0:15] for ports 0 ~ 7
-  UINT8                 Port0;                          ///< PORT0 - set BIT0 to GEN1, BIT1 - PORT0 set to GEN2
-  UINT8                 Port1;                          ///< PORT1 - set BIT2 to GEN1, BIT3 - PORT1 set to GEN2
-  UINT8                 Port2;                          ///< PORT2 - set BIT4 to GEN1, BIT5 - PORT2 set to GEN2
-  UINT8                 Port3;                          ///< PORT3 - set BIT6 to GEN1, BIT7 - PORT3 set to GEN2
-  UINT8                 Port4;                          ///< PORT4 - set BIT8 to GEN1, BIT9 - PORT4 set to GEN2
-  UINT8                 Port5;                          ///< PORT5 - set BIT10 to GEN1, BIT11 - PORT5 set to GEN2
-  UINT8                 Port6;                          ///< PORT6 - set BIT12 to GEN1, BIT13 - PORT6 set to GEN2
-  UINT8                 Port7;                          ///< PORT7 - set BIT14 to GEN1, BIT15 - PORT7 set to GEN2
-} SATA_PORT_MD;
-///
-/// SATA structure
-///
-typedef struct {
-  BOOLEAN               SataMsiEnable;                  ///< SATA MSI capability
-  UINT32                SataIdeSsid;                    ///< SATA IDE mode SSID
-  UINT32                SataRaidSsid;                   ///< SATA RAID mode SSID
-  UINT32                SataRaid5Ssid;                  ///< SATA RAID 5 mode SSID
-  UINT32                SataAhciSsid;                   ///< SATA AHCI mode SSID
-
-  SATA_ST               SataMode;                       /// SataMode - Reserved
-  SATA_CLASS            SataClass;                      ///< SataClass - SATA Controller mode [2:0]
-  UINT8                 SataIdeMode;                    ///< SataIdeMode - Sata IDE Controller mode
-                                                        ///  @par
-                                                        ///   @li <b>0</b> - Legacy IDE mode
-                                                        ///   @li <b>1</b> - Native IDE mode
-                                                        ///
-  UINT8                 SataDisUnusedIdePChannel;       ///< SataDisUnusedIdePChannel-Disable Unused IDE Primary Channel
-                                                        ///  @par
-                                                        ///   @li <b>0</b> - Channel Enable
-                                                        ///   @li <b>1</b> - Channel Disable
-                                                        ///
-  UINT8                 SataDisUnusedIdeSChannel;       ///< SataDisUnusedIdeSChannel - Disable Unused IDE Secondary Channel
-                                                        ///   @par
-                                                        ///    @li <b>0</b> - Channel Enable
-                                                        ///    @li <b>1</b> - Channel Disable
-                                                        ///
-  UINT8                 IdeDisUnusedIdePChannel;        ///< IdeDisUnusedIdePChannel-Disable Unused IDE Primary Channel
-                                                        ///   @par
-                                                        ///    @li <b>0</b> - Channel Enable
-                                                        ///    @li <b>1</b> - Channel Disable
-                                                        ///
-  UINT8                 IdeDisUnusedIdeSChannel;        ///< IdeDisUnusedIdeSChannel-Disable Unused IDE Secondary Channel
-                                                        ///   @par
-                                                        ///    @li <b>0</b> - Channel Enable
-                                                        ///    @li <b>1</b> - Channel Disable
-                                                        ///
-  UINT8                 SataOptionReserved;             /// SataOptionReserved - Reserved
-
-  SATA_PORT_ST          SataEspPort;                    ///<  SataEspPort - SATA port is external accessible on a signal only connector (eSATA:)
-
-  SATA_PORT_ST          SataPortPower;                  ///<  SataPortPower - Port Power configuration
-
-  SATA_PORT_MD          SataPortMd;                     ///<  SataPortMd - Port Mode
-
-  UINT8                 SataAggrLinkPmCap;              /// SataAggrLinkPmCap - 0:OFF   1:ON
-  UINT8                 SataPortMultCap;                /// SataPortMultCap - 0:OFF   1:ON
-  UINT8                 SataClkAutoOff;                 /// SataClkAutoOff - AutoClockOff 0:Disabled, 1:Enabled
-  UINT8                 SataPscCap;                     /// SataPscCap 1:Enable PSC, 0:Disable PSC capability
-  UINT8                 BiosOsHandOff;                  /// BiosOsHandOff - Reserved
-  UINT8                 SataFisBasedSwitching;          /// SataFisBasedSwitching - Reserved
-  UINT8                 SataCccSupport;                 /// SataCccSupport - Reserved
-  UINT8                 SataSscCap;                     /// SataSscCap - 1:Enable, 0:Disable SSC capability
-  UINT8                 SataMsiCapability;              /// SataMsiCapability 0:Hidden 1:Visible
-  UINT8                 SataForceRaid;                  /// SataForceRaid   0:No function 1:Force RAID
-  UINT8                 SataInternal100Spread;          /// SataInternal100Spread - Reserved
-  UINT8                 SataDebugDummy;                 /// SataDebugDummy - Reserved
-  UINT8                 SataTargetSupport8Device;       /// SataTargetSupport8Device - Reserved
-  UINT8                 SataDisableGenericMode;         /// SataDisableGenericMode - Reserved
-  BOOLEAN               SataAhciEnclosureManagement;    /// SataAhciEnclosureManagement - Reserved
-  UINT8                 SataSgpio0;                     /// SataSgpio0 - Reserved
-  UINT8                 SataSgpio1;                     /// SataSgpio1 - Reserved
-  UINT8                 SataPhyPllShutDown;             /// SataPhyPllShutDown - Reserved
-  BOOLEAN               SataHotRemovalEnh;              /// SataHotRemovalEnh - Reserved
-
-  SATA_PORT_ST          SataHotRemovalEnhPort;          ///<  SataHotRemovalEnhPort - Hot Remove
-
-  BOOLEAN               SataOobDetectionEnh;            /// SataOobDetectionEnh - TRUE
-  BOOLEAN               SataPowerSavingEnh;             /// SataPowerSavingEnh - TRUE
-  UINT8                 SataMemoryPowerSaving;          /// SataMemoryPowerSaving - 0-3 Default [3]
-  BOOLEAN               SataRasSupport;                 /// SataRasSupport - Support RAS function TRUE: Enable FALSE: Disable
-  BOOLEAN               SataAhciDisPrefetchFunction;    /// SataAhciDisPrefetchFunction - Disable AHCI Prefetch Function Support
-  BOOLEAN               SataDevSlpPort0;                /// SataDevSlpPort0 - Reserved
-  BOOLEAN               SataDevSlpPort1;                /// SataDevSlpPort1 - Reserved
-  UINT32                TempMmio;                       /// TempMmio - Reserved
-} FCH_SATA;
-
-
-//
-// IMC Message Register Software Interface
-//
-#define CPU_MISC_BUS_DEV_FUN          ((0x18 << 3) + 3)
-
-#define MSG_SYS_TO_IMC                0x80
-#define Fun_80                        0x80
-#define Fun_81                        0x81
-#define Fun_82                        0x82
-#define Fun_83                        0x83
-#define Fun_84                        0x84
-#define Fun_85                        0x85
-#define Fun_86                        0x86
-#define Fun_87                        0x87
-#define Fun_88                        0x88
-#define Fun_89                        0x89
-#define Fun_90                        0x90
-#define MSG_IMC_TO_SYS                0x81
-#define MSG_REG0                      0x82
-#define MSG_REG1                      0x83
-#define MSG_REG2                      0x84
-#define MSG_REG3                      0x85
-#define MSG_REG4                      0x86
-#define MSG_REG5                      0x87
-#define MSG_REG6                      0x88
-#define MSG_REG7                      0x89
-#define MSG_REG8                      0x8A
-#define MSG_REG9                      0x8B
-#define MSG_REGA                      0x8C
-#define MSG_REGB                      0x8D
-#define MSG_REGC                      0x8E
-#define MSG_REGD                      0x8F
-
-#define DISABLED                      0
-#define ENABLED                       1
-
-
-
-///
-/// EC structure
-///
-typedef struct _FCH_EC {
-  UINT8                 MsgFun81Zone0MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun81Zone0MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun81Zone0MsgReg2;           ///<Thermal zone control byte 1
-  UINT8                 MsgFun81Zone0MsgReg3;           ///<Thermal zone control byte 2
-  UINT8                 MsgFun81Zone0MsgReg4;           ///<Bit[3:0] - Thermal diode offset adjustment in degrees Celsius.
-  UINT8                 MsgFun81Zone0MsgReg5;           ///<Hysteresis information
-  UINT8                 MsgFun81Zone0MsgReg6;           ///<SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032
-  UINT8                 MsgFun81Zone0MsgReg7;           ///<Bit[1:0]: 0 - 2,  SMBUS bus number where the SMBUS based temperature sensor is located.
-  UINT8                 MsgFun81Zone0MsgReg8;           ///<Fan PWM stepping rate in unit of PWM level percentage
-  UINT8                 MsgFun81Zone0MsgReg9;           ///<Fan PWM ramping rate in 5ms unit
-//
-// EC LDN9 function 81 zone 1
-//
-  UINT8                 MsgFun81Zone1MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun81Zone1MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun81Zone1MsgReg2;           ///<Thermal zone control byte 1
-  UINT8                 MsgFun81Zone1MsgReg3;           ///<Thermal zone control byte 2
-  UINT8                 MsgFun81Zone1MsgReg4;           ///<Bit[3:0] - Thermal diode offset adjustment in degrees Celsius.
-  UINT8                 MsgFun81Zone1MsgReg5;           ///<Hysteresis information
-  UINT8                 MsgFun81Zone1MsgReg6;           ///<SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032
-  UINT8                 MsgFun81Zone1MsgReg7;           ///<Bit[1:0]: 0 - 2,  SMBUS bus number where the SMBUS based temperature sensor is located.
-  UINT8                 MsgFun81Zone1MsgReg8;           ///<Fan PWM stepping rate in unit of PWM level percentage
-  UINT8                 MsgFun81Zone1MsgReg9;           ///<Fan PWM ramping rate in 5ms unit
-//
-//EC LDN9 function 81 zone 2
-//
-  UINT8                 MsgFun81Zone2MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun81Zone2MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun81Zone2MsgReg2;           ///<Thermal zone control byte 1
-  UINT8                 MsgFun81Zone2MsgReg3;           ///<Thermal zone control byte 2
-  UINT8                 MsgFun81Zone2MsgReg4;           ///<Bit[3:0] - Thermal diode offset adjustment in degrees Celsius.
-  UINT8                 MsgFun81Zone2MsgReg5;           ///<Hysteresis information
-  UINT8                 MsgFun81Zone2MsgReg6;           ///<SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032
-  UINT8                 MsgFun81Zone2MsgReg7;           ///<Bit[1:0]: 0 - 2,  SMBUS bus number where the SMBUS based temperature sensor is located.
-  UINT8                 MsgFun81Zone2MsgReg8;           ///<Fan PWM stepping rate in unit of PWM level percentage
-  UINT8                 MsgFun81Zone2MsgReg9;           ///<Fan PWM ramping rate in 5ms unit
-//
-//EC LDN9 function 81 zone 3
-//
-  UINT8                 MsgFun81Zone3MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun81Zone3MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun81Zone3MsgReg2;           ///<Thermal zone control byte 1
-  UINT8                 MsgFun81Zone3MsgReg3;           ///<Thermal zone control byte 2
-  UINT8                 MsgFun81Zone3MsgReg4;           ///<Bit[3:0] - Thermal diode offset adjustment in degrees Celsius.
-  UINT8                 MsgFun81Zone3MsgReg5;           ///<Hysteresis information
-  UINT8                 MsgFun81Zone3MsgReg6;           ///<SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032
-  UINT8                 MsgFun81Zone3MsgReg7;           ///<Bit[1:0]: 0 - 2,  SMBUS bus number where the SMBUS based temperature sensor is located.
-  UINT8                 MsgFun81Zone3MsgReg8;           ///<Fan PWM stepping rate in unit of PWM level percentage
-  UINT8                 MsgFun81Zone3MsgReg9;           ///<Fan PWM ramping rate in 5ms unit
-//
-//EC LDN9 function 83 zone 0
-//
-  UINT8                 MsgFun83Zone0MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun83Zone0MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun83Zone0MsgReg2;           ///<_AC0
-  UINT8                 MsgFun83Zone0MsgReg3;           ///<_AC1
-  UINT8                 MsgFun83Zone0MsgReg4;           ///<_AC2
-  UINT8                 MsgFun83Zone0MsgReg5;           ///<_AC3
-  UINT8                 MsgFun83Zone0MsgReg6;           ///<_AC4
-  UINT8                 MsgFun83Zone0MsgReg7;           ///<_AC5
-  UINT8                 MsgFun83Zone0MsgReg8;           ///<_AC6
-  UINT8                 MsgFun83Zone0MsgReg9;           ///<_AC7
-  UINT8                 MsgFun83Zone0MsgRegA;           ///<_CRT
-  UINT8                 MsgFun83Zone0MsgRegB;           ///<_PSV
-//
-//EC LDN9 function 83 zone 1
-//
-  UINT8                 MsgFun83Zone1MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun83Zone1MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun83Zone1MsgReg2;           ///<_AC0
-  UINT8                 MsgFun83Zone1MsgReg3;           ///<_AC1
-  UINT8                 MsgFun83Zone1MsgReg4;           ///<_AC2
-  UINT8                 MsgFun83Zone1MsgReg5;           ///<_AC3
-  UINT8                 MsgFun83Zone1MsgReg6;           ///<_AC4
-  UINT8                 MsgFun83Zone1MsgReg7;           ///<_AC5
-  UINT8                 MsgFun83Zone1MsgReg8;           ///<_AC6
-  UINT8                 MsgFun83Zone1MsgReg9;           ///<_AC7
-  UINT8                 MsgFun83Zone1MsgRegA;           ///<_CRT
-  UINT8                 MsgFun83Zone1MsgRegB;           ///<_PSV
-//
-//EC LDN9 function 83 zone 2
-//
-  UINT8                 MsgFun83Zone2MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun83Zone2MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun83Zone2MsgReg2;           ///<_AC0
-  UINT8                 MsgFun83Zone2MsgReg3;           ///<_AC1
-  UINT8                 MsgFun83Zone2MsgReg4;           ///<_AC2
-  UINT8                 MsgFun83Zone2MsgReg5;           ///<_AC3
-  UINT8                 MsgFun83Zone2MsgReg6;           ///<_AC4
-  UINT8                 MsgFun83Zone2MsgReg7;           ///<_AC5
-  UINT8                 MsgFun83Zone2MsgReg8;           ///<_AC6
-  UINT8                 MsgFun83Zone2MsgReg9;           ///<_AC7
-  UINT8                 MsgFun83Zone2MsgRegA;           ///<_CRT
-  UINT8                 MsgFun83Zone2MsgRegB;           ///<_PSV
-//
-//EC LDN9 function 83 zone 3
-//
-  UINT8                 MsgFun83Zone3MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun83Zone3MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun83Zone3MsgReg2;           ///<_AC0
-  UINT8                 MsgFun83Zone3MsgReg3;           ///<_AC1
-  UINT8                 MsgFun83Zone3MsgReg4;           ///<_AC2
-  UINT8                 MsgFun83Zone3MsgReg5;           ///<_AC3
-  UINT8                 MsgFun83Zone3MsgReg6;           ///<_AC4
-  UINT8                 MsgFun83Zone3MsgReg7;           ///<_AC5
-  UINT8                 MsgFun83Zone3MsgReg8;           ///<_AC6
-  UINT8                 MsgFun83Zone3MsgReg9;           ///<_AC7
-  UINT8                 MsgFun83Zone3MsgRegA;           ///<_CRT
-  UINT8                 MsgFun83Zone3MsgRegB;           ///<_PSV
-//
-//EC LDN9 function 85 zone 0
-//
-  UINT8                 MsgFun85Zone0MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun85Zone0MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun85Zone0MsgReg2;           ///<AL0 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg3;           ///<AL1 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg4;           ///<AL2 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg5;           ///<AL3 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg6;           ///<AL4 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg7;           ///<AL5 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg8;           ///<AL6 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg9;           ///<AL7 PWM level in percentage (0 - 100%)
-//
-//EC LDN9 function 85 zone 1
-//
-  UINT8                 MsgFun85Zone1MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun85Zone1MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun85Zone1MsgReg2;           ///<AL0 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg3;           ///<AL1 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg4;           ///<AL2 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg5;           ///<AL3 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg6;           ///<AL4 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg7;           ///<AL5 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg8;           ///<AL6 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg9;           ///<AL7 PWM level in percentage (0 - 100%)
-//
-//EC LDN9 function 85 zone 2
-//
-  UINT8                 MsgFun85Zone2MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun85Zone2MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun85Zone2MsgReg2;           ///<AL0 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg3;           ///<AL1 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg4;           ///<AL2 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg5;           ///<AL3 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg6;           ///<AL4 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg7;           ///<AL5 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg8;           ///<AL6 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg9;           ///<AL7 PWM level in percentage (0 - 100%)
-//
-//EC LDN9 function 85 zone 3
-//
-  UINT8                 MsgFun85Zone3MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun85Zone3MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun85Zone3MsgReg2;           ///<AL0 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg3;           ///<AL1 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg4;           ///<AL2 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg5;           ///<AL3 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg6;           ///<AL4 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg7;           ///<AL5 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg8;           ///<AL6 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg9;           ///<AL7 PWM level in percentage (0 - 100%)
-//
-//EC LDN9 function 89 TEMPIN channel 0
-//
-  UINT8                 MsgFun89Zone0MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun89Zone0MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun89Zone0MsgReg2;           ///<At DWORD bit 0-7
-  UINT8                 MsgFun89Zone0MsgReg3;           ///<At DWORD bit 15-8
-  UINT8                 MsgFun89Zone0MsgReg4;           ///<At DWORD bit 23-16
-  UINT8                 MsgFun89Zone0MsgReg5;           ///<At DWORD bit 31-24
-  UINT8                 MsgFun89Zone0MsgReg6;           ///<Ct DWORD bit 0-7
-  UINT8                 MsgFun89Zone0MsgReg7;           ///<Ct DWORD bit 15-8
-  UINT8                 MsgFun89Zone0MsgReg8;           ///<Ct DWORD bit 23-16
-  UINT8                 MsgFun89Zone0MsgReg9;           ///<Ct DWORD bit 31-24
-  UINT8                 MsgFun89Zone0MsgRegA;           ///<Mode bit 0-7
-//
-//EC LDN9 function 89 TEMPIN channel 1
-//
-  UINT8                 MsgFun89Zone1MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun89Zone1MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun89Zone1MsgReg2;           ///<At DWORD bit 0-7
-  UINT8                 MsgFun89Zone1MsgReg3;           ///<At DWORD bit 15-8
-  UINT8                 MsgFun89Zone1MsgReg4;           ///<At DWORD bit 23-16
-  UINT8                 MsgFun89Zone1MsgReg5;           ///<At DWORD bit 31-24
-  UINT8                 MsgFun89Zone1MsgReg6;           ///<Ct DWORD bit 0-7
-  UINT8                 MsgFun89Zone1MsgReg7;           ///<Ct DWORD bit 15-8
-  UINT8                 MsgFun89Zone1MsgReg8;           ///<Ct DWORD bit 23-16
-  UINT8                 MsgFun89Zone1MsgReg9;           ///<Ct DWORD bit 31-24
-  UINT8                 MsgFun89Zone1MsgRegA;           ///<Mode bit 0-7
-//
-//EC LDN9 function 89 TEMPIN channel 2
-//
-  UINT8                 MsgFun89Zone2MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun89Zone2MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun89Zone2MsgReg2;           ///<At DWORD bit 0-7
-  UINT8                 MsgFun89Zone2MsgReg3;           ///<At DWORD bit 15-8
-  UINT8                 MsgFun89Zone2MsgReg4;           ///<At DWORD bit 23-16
-  UINT8                 MsgFun89Zone2MsgReg5;           ///<At DWORD bit 31-24
-  UINT8                 MsgFun89Zone2MsgReg6;           ///<Ct DWORD bit 0-7
-  UINT8                 MsgFun89Zone2MsgReg7;           ///<Ct DWORD bit 15-8
-  UINT8                 MsgFun89Zone2MsgReg8;           ///<Ct DWORD bit 23-16
-  UINT8                 MsgFun89Zone2MsgReg9;           ///<Ct DWORD bit 31-24
-  UINT8                 MsgFun89Zone2MsgRegA;           ///<Mode bit 0-7
-//
-//EC LDN9 function 89 TEMPIN channel 3
-//
-  UINT8                 MsgFun89Zone3MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun89Zone3MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun89Zone3MsgReg2;           ///<At DWORD bit 0-7
-  UINT8                 MsgFun89Zone3MsgReg3;           ///<At DWORD bit 15-8
-  UINT8                 MsgFun89Zone3MsgReg4;           ///<At DWORD bit 23-16
-  UINT8                 MsgFun89Zone3MsgReg5;           ///<At DWORD bit 31-24
-  UINT8                 MsgFun89Zone3MsgReg6;           ///<Ct DWORD bit 0-7
-  UINT8                 MsgFun89Zone3MsgReg7;           ///<Ct DWORD bit 15-8
-  UINT8                 MsgFun89Zone3MsgReg8;           ///<Ct DWORD bit 23-16
-  UINT8                 MsgFun89Zone3MsgReg9;           ///<Ct DWORD bit 31-24
-  UINT8                 MsgFun89Zone3MsgRegA;           ///<Mode bit 0-7
-//
-// FLAG for Fun83/85/89 support
-//
-  UINT16                IMCFUNSupportBitMap;            ///< Bit0=81FunZone0 support(1=On;0=Off); bit1-3=81FunZone1-Zone3;Bit4-7=83FunZone0-Zone3;Bit8-11=85FunZone0-Zone3;Bit11-15=89FunZone0-Zone3;
-} FCH_EC;
-
-///
-/// IMC structure
-///
-typedef struct _FCH_IMC {
-  UINT8                 ImcEnable;                      ///< ImcEnable - IMC Enable
-  UINT8                 ImcEnabled;                     ///< ImcEnabled - IMC Enable
-  UINT8                 ImcSureBootTimer;               ///< ImcSureBootTimer - IMc SureBootTimer function
-  FCH_EC                EcStruct;                       ///< EC structure
-  UINT8                 ImcEnableOverWrite;             ///< OverWrite IMC with the EC structure
-                                                        ///   @li <b>00</b> - by default strapping
-                                                        ///   @li <b>01</b> - enable
-                                                        ///   @li <b>10</b> - disable
-                                                        ///
-} FCH_IMC;
-
-
-///
-/// Hpet structure
-///
-typedef struct {
-  BOOLEAN               HpetEnable;                     ///< HPET function switch
-
-  BOOLEAN               HpetMsiDis;                     ///< HpetMsiDis - South Bridge HPET MSI Configuration
-                                                        ///   @par
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT32                HpetBase;                       ///< HpetBase
-                                                        ///   @par
-                                                        ///  HPET Base address
-} FCH_HPET;
-
-
-///
-/// GCPU related parameters
-///
-typedef struct {
-  UINT8                 AcDcMsg;                        ///< Send a message to CPU to indicate the power mode (AC vs battery)
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 TimerTickTrack;                 ///< Send a message to CPU to indicate the latest periodic timer interval
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 ClockInterruptTag;              ///< Mark the periodic timer interrupt
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 OhciTrafficHanding;             ///< Cause CPU to break out from C state when USB OHCI has pending traffic
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 EhciTrafficHanding;             ///< Cause CPU to break out from C state when USB EHCI has pending traffic
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 GcpuMsgCMultiCore;              ///< Track of CPU C state by monitoring each core's C state message
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 GcpuMsgCStage;                  ///< Enable the FCH C state coordination logic
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-} FCH_GCPU;
-
-
-///
-/// Timer
-///
-typedef struct {
-  BOOLEAN               Enable;                         ///< Whether to register timer SMI in POST
-  BOOLEAN               StartNow;                       ///< Whether to start the SMI immediately during registration
-  UINT16                CycleDuration;                  ///< [14:0] - Actual cycle duration = CycleDuration + 1
-} TIMER_SMI;
-
-///
-/// CS support
-///
-typedef struct {
-  BOOLEAN               FchCsD3Cold;                    ///< FCH Cs D3 Cold function
-  BOOLEAN               FchCsHwReduced;                 ///< FCH Cs hardware reduced ACPI flag
-  BOOLEAN               FchCsPwrBtn;                    ///< FCH Cs Power Button function
-  BOOLEAN               FchCsAcDc;                      ///< FCH Cs AcDc function
-  BOOLEAN               AsfNfcEnable;                   ///< FCH Cs NFC function
-  UINT8                 AsfNfcInterruptPin;             ///<    NFC Interrupt pin define
-  UINT8                 AsfNfcRegPuPin;                 ///<    NFC RegPu pin define
-  UINT8                 AsfNfcWakePin;                  ///<    NFC Wake Pin define
-  UINT8                 PowerButtonGpe;                 ///<    GPE# used by Power Button device
-  UINT8                 AcDcTimerGpe;                   ///<    GPE# used by Timer device
-} FCH_CS;
-
-
-///
-/// MISC structure
-///
-typedef struct {
-  BOOLEAN               NativePcieSupport;              /// PCIe NativePcieSupport - Debug function. 1:Enabled, 0:Disabled
-  BOOLEAN               S3Resume;                       /// S3Resume - Flag of ACPI S3 Resume.
-  BOOLEAN               RebootRequired;                 /// RebootRequired - Flag of Reboot system is required.
-  UINT8                 FchVariant;                     /// FchVariant - FCH Variant value.
-  UINT8                 Cg2Pll;                         ///< CG2 PLL - 0:disable, 1:enable
-  TIMER_SMI             LongTimer;                      ///< Long Timer SMI
-  TIMER_SMI             ShortTimer;                     ///< Short Timer SMI
-  UINT32                FchCpuId;                       ///< Saving CpuId for FCH Module.
-  BOOLEAN               NoneSioKbcSupport;              ///< NoneSioKbcSupport - No KBC/SIO controller ( Turn on Inchip KBC emulation function )
-  FCH_CS                FchCsSupport;                   ///< FCH Cs function structure
-} FCH_MISC;
-
-
-///
-/// SMBus structure
-///
-typedef struct {
-  UINT32                SmbusSsid;                      ///< SMBUS controller Subsystem ID
-} FCH_SMBUS;
-
-
-///
-/// Acpi structure
-///
-typedef struct {
-  UINT16                Smbus0BaseAddress;              ///< Smbus0BaseAddress
-                                                        ///   @par
-                                                        ///  Smbus BASE Address
-                                                        ///
-  UINT16                Smbus1BaseAddress;              ///< Smbus1BaseAddress
-                                                        ///   @par
-                                                        ///  Smbus1 (ASF) BASE Address
-                                                        ///
-  UINT16                SioPmeBaseAddress;              ///< SioPmeBaseAddress
-                                                        ///   @par
-                                                        ///  SIO PME BASE Address
-                                                        ///
-  UINT32                WatchDogTimerBase;              ///< WatchDogTimerBase
-                                                        ///   @par
-                                                        ///  Watch Dog Timer Address
-                                                        ///
-  UINT16                AcpiPm1EvtBlkAddr;              ///< AcpiPm1EvtBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI PM1 event block Address
-                                                        ///
-  UINT16                AcpiPm1CntBlkAddr;              ///< AcpiPm1CntBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI PM1 Control block Address
-                                                        ///
-  UINT16                AcpiPmTmrBlkAddr;               ///< AcpiPmTmrBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI PM timer block Address
-                                                        ///
-  UINT16                CpuControlBlkAddr;              ///< CpuControlBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI CPU control block Address
-                                                        ///
-  UINT16                AcpiGpe0BlkAddr;                ///< AcpiGpe0BlkAddr
-                                                        ///   @par
-                                                        ///  ACPI GPE0 block Address
-                                                        ///
-  UINT16                SmiCmdPortAddr;                 ///< SmiCmdPortAddr
-                                                        ///   @par
-                                                        ///  SMI command port Address
-                                                        ///
-  UINT16                AcpiPmaCntBlkAddr;              ///< AcpiPmaCntBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI PMA Control block Address
-                                                        ///
-  BOOLEAN               AnyHt200MhzLink;                ///< AnyHt200MhzLink
-                                                        ///   @par
-                                                        ///  HT Link Speed on 200MHz option for each CPU specific LDTSTP# (Force enable)
-                                                        ///
-  BOOLEAN               SpreadSpectrum;                 ///< SpreadSpectrum
-                                                        ///  @par
-                                                        ///  Spread Spectrum function
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  POWER_FAIL            PwrFailShadow;                  ///< PwrFailShadow = PM_Reg: 5Bh [3:0]
-                                                        ///  @par
-                                                        ///   @li  <b>00</b> - Always off
-                                                        ///   @li  <b>01</b> - Always on
-                                                        ///   @li  <b>11</b> - Use previous
-                                                        ///
-  UINT8                 StressResetMode;                ///< StressResetMode 01-10
-                                                        ///   @li  <b>00</b> - Disabed
-                                                        ///   @li  <b>01</b> - Io Write 0x64 with 0xfe
-                                                        ///   @li  <b>10</b> - Io Write 0xcf9 with 0x06
-                                                        ///   @li  <b>11</b> - Io Write 0xcf9 with 0x0e
-                                                        ///
-  BOOLEAN               MtC1eEnable;                    /// MtC1eEnable - Enable MtC1e
-  VOID*                 OemProgrammingTablePtr;         /// Pointer of ACPI OEM table
-  UINT8                 SpreadSpectrumOptions;          /// SpreadSpectrumOptions - Spread Spectrum Option
-  BOOLEAN               PwrDownDisp2ClkPcieR;           /// Power down DISP2_CLK and PCIE_RCLK_Output for power savings
-} FCH_ACPI;
-
-
-///
-/// HWM temp parameter structure
-///
-typedef struct _FCH_HWM_TEMP_PAR {
-  UINT16                At;                             ///< At
-  UINT16                Ct;                             ///< Ct
-  UINT8                 Mode;                           ///< Mode BIT0:HiRatio BIT1:HiCurrent
-} FCH_HWM_TEMP_PAR;
-
-///
-/// HWM Current structure
-///
-typedef struct _FCH_HWM_CUR {
-  UINT16                FanSpeed[5];                    ///< FanSpeed    - fan Speed
-  UINT16                Temperature[5];                 ///< Temperature - temperature
-  UINT16                Voltage[8];                     ///< Voltage     - voltage
-} FCH_HWM_CUR;
-
-///
-/// HWM fan control structure
-///
-typedef struct _FCH_HWM_FAN_CTR {
-  UINT8                 InputControlReg00;              /// Fan Input Control register, PM2 offset [0:4]0
-  UINT8                 ControlReg01;                   /// Fan control register, PM2 offset [0:4]1
-  UINT8                 FreqReg02;                      /// Fan frequency register, PM2 offset [0:4]2
-  UINT8                 LowDutyReg03;                   /// Low Duty register, PM2 offset [0:4]3
-  UINT8                 MedDutyReg04;                   /// Med Duty register, PM2 offset [0:4]4
-  UINT8                 MultiplierReg05;                /// Multiplier register, PM2 offset [0:4]5
-  UINT16                LowTempReg06;                   /// Low Temp register, PM2 offset [0:4]6
-  UINT16                MedTempReg08;                   /// Med Temp register, PM2 offset [0:4]8
-  UINT16                HighTempReg0A;                  /// High Temp register, PM2 offset [0:4]A
-  UINT8                 LinearRangeReg0C;               /// Linear Range register, PM2 offset [0:4]C
-  UINT8                 LinearHoldCountReg0D;           /// Linear Hold Count register, PM2 offset [0:4]D
-} FCH_HWM_FAN_CTR;
-
-///
-/// Hwm structure
-///
-typedef struct _FCH_HWM {
-  UINT8                 HwMonitorEnable;                ///< HwMonitorEnable
-  UINT32                HwmControl;                     ///< hwmControl
-                                                        ///   @par
-                                                        ///  HWM control configuration
-                                                        ///   @li <b>0</b> - HWM is Enabled
-                                                        ///   @li <b>1</b> - IMC is Enabled
-                                                        ///
-  UINT8                 FanSampleFreqDiv;               ///< Sampling rate of Fan Speed
-                                                        ///   @li <b>00</b> - Base(22.5KHz)
-                                                        ///   @li <b>01</b> - Base(22.5KHz)/2
-                                                        ///   @li <b>10</b> - Base(22.5KHz)/4
-                                                        ///   @li <b>11</b> - Base(22.5KHz)/8
-                                                        ///
-  UINT8                 HwmFchtsiAutoPoll;              ///< TSI Auto Polling
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  UINT8                 HwmFchtsiAutoPollStarted;       ///< HwmSbtsiAutoPollStarted
-  UINT8                 FanLinearEnhanceEn;             ///< FanLinearEnhanceEn
-  UINT8                 FanLinearHoldFix;               ///< FanLinearHoldFix
-  UINT8                 FanLinearRangeOutLimit;         ///< FanLinearRangeOutLimit
-  UINT16                HwmCalibrationFactor;           /// Calibration Factor
-  FCH_HWM_CUR           HwmCurrent;                     /// HWM Current structure
-  FCH_HWM_CUR           HwmCurrentRaw;                  /// HWM Current Raw structure
-  FCH_HWM_TEMP_PAR      HwmTempPar[5];                  /// HWM Temp parameter structure
-  FCH_HWM_FAN_CTR       HwmFanControl[5];               /// HWM Fan Control structure
-  FCH_HWM_FAN_CTR       HwmFanControlCooked[5];               /// HWM Fan Control structure
-} FCH_HWM;
-
-
-///
-/// Gec structure
-///
-typedef struct {
-  BOOLEAN               GecEnable;                      ///< GecEnable - GEC function switch
-  UINT8                 GecPhyStatus;                   /// GEC PHY Status
-  UINT8                 GecPowerPolicy;                 /// GEC Power Policy
-                                                        ///   @li <b>00</b> - GEC is powered down in S3 and S5
-                                                        ///   @li <b>01</b> - GEC is powered down only in S5
-                                                        ///   @li <b>10</b> - GEC is powered down only in S3
-                                                        ///   @li <b>11</b> - GEC is never powered down
-                                                        ///
-  UINT8                 GecDebugBus;                    /// GEC Debug Bus
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  UINT32                GecShadowRomBase;               ///< GecShadowRomBase
-                                                        ///   @par
-                                                        ///  GEC (NIC) SHADOWROM BASE Address
-                                                        ///
-  VOID                  *PtrDynamicGecRomAddress;       /// Pointer of Dynamic GEC ROM Address
-} FCH_GEC;
-
-
-///
-/// _ABTblEntry - AB link register table R/W structure
-///
-typedef struct _AB_TBL_ENTRY {
-  UINT8                 RegType;                        /// RegType  : AB Register Type (ABCFG, AXCFG and so on)
-  UINT32                RegIndex;                       /// RegIndex : AB Register Index
-  UINT32                RegMask;                        /// RegMask  : AB Register Mask
-  UINT32                RegData;                        /// RegData  : AB Register Data
-} AB_TBL_ENTRY;
-
-///
-/// AB structure
-///
-typedef struct {
-  BOOLEAN               AbMsiEnable;                    ///< ABlink MSI capability
-  UINT8                 ALinkClkGateOff;                /// Alink Clock Gate-Off function - 0:disable, 1:enable *KR
-  UINT8                 BLinkClkGateOff;                /// Blink Clock Gate-Off function - 0:disable, 1:enable *KR
-  UINT8                 AbClockGating;                  /// AB Clock Gating - 0:disable, 1:enable *KR
-  UINT8                 GppClockGating;                 /// GPP Clock Gating - 0:disable, 1:enable
-  UINT8                 UmiL1TimerOverride;             /// UMI L1 inactivity timer overwrite value
-  UINT8                 UmiLinkWidth;                   /// UMI Link Width
-  UINT8                 UmiDynamicSpeedChange;          /// UMI Dynamic Speed Change - 0:disable, 1:enable
-  UINT8                 PcieRefClockOverClocking;       /// PCIe Ref Clock OverClocking value
-  UINT8                 UmiGppTxDriverStrength;         /// UMI GPP TX Driver Strength
-  BOOLEAN               NbSbGen2;                       /// UMI link Gen2 - 0:Gen1, 1:Gen2
-  UINT8                 PcieOrderRule;                  /// PCIe Order Rule - 0:disable, 1:enable *KR AB Posted Pass Non-Posted
-  UINT8                 SlowSpeedAbLinkClock;           /// Slow Speed AB Link Clock - 0:disable, 1:enable *KR
-  BOOLEAN               ResetCpuOnSyncFlood;            /// Reset Cpu On Sync Flood - 0:disable, 1:enable *KR
-  BOOLEAN               AbDmaMemoryWrtie3264B;          /// AB DMA Memory Write 32/64 BYTE Support *KR only
-  BOOLEAN               AbMemoryPowerSaving;            /// AB Memory Power Saving *KR only
-  BOOLEAN               SbgDmaMemoryWrtie3264ByteCount; /// SBG DMA Memory Write 32/64 BYTE Count Support *KR only
-  BOOLEAN               SbgMemoryPowerSaving;           /// SBG Memory Power Saving *KR only
-} FCH_AB;
-
-
-/**
- * PCIE_CAP_ID - PCIe Cap ID
- *
- */
-#define  PCIE_CAP_ID    0x10
-
-///
-/// FCH_GPP_PORT_CONFIG - Fch GPP port config structure
-///
-typedef struct {
-  BOOLEAN               PortPresent;                    ///< Port connection
-                                                        ///  @par
-                                                        ///  @li <b>0</b> - Port doesn't have slot. No need to train the link
-                                                        ///  @li <b>1</b> - Port connection defined and needs to be trained
-                                                        ///
-  BOOLEAN               PortDetected;                   ///< Link training status
-                                                        ///  @par
-                                                        ///  @li <b>0</b> - EP not detected
-                                                        ///  @li <b>1</b> - EP detected
-                                                        ///
-  BOOLEAN               PortIsGen2;                     ///< Port link speed configuration
-                                                        ///  @par
-                                                        ///  @li <b>00</b> - Auto
-                                                        ///  @li <b>01</b> - Forced GEN1
-                                                        ///  @li <b>10</b> - Forced GEN2
-                                                        ///  @li <b>11</b> - Reserved
-                                                        ///
-  BOOLEAN               PortHotPlug;                    ///< Support hot plug?
-                                                        ///  @par
-                                                        ///  @li <b>0</b> - No support
-                                                        ///  @li <b>1</b> - support
-                                                        ///
-  UINT8                 PortMisc;                       ///  PortMisc - Reserved
-} FCH_GPP_PORT_CONFIG;
-
-///
-/// GPP structure
-///
-typedef struct {
-  FCH_GPP_PORT_CONFIG   PortCfg[4];                     /// GPP port configuration structure
-  GPP_LINKMODE          GppLinkConfig;                  ///< GppLinkConfig - PCIE_GPP_Enable[3:0]
-                                                        ///  @li  <b>0000</b> - Port ABCD -> 4:0:0:0
-                                                        ///  @li  <b>0010</b> - Port ABCD -> 2:2:0:0
-                                                        ///  @li  <b>0011</b> - Port ABCD -> 2:1:1:0
-                                                        ///  @li  <b>0100</b> - Port ABCD -> 1:1:1:1
-                                                        ///
-  BOOLEAN               GppFunctionEnable;              ///< GPP Function - 0:disable, 1:enable
-  BOOLEAN               GppToggleReset;                 ///< Toggle GPP core reset
-  UINT8                 GppHotPlugGeventNum;            ///< Hotplug GEVENT # - valid value 0-31
-  UINT8                 GppFoundGfxDev;                 ///< Gpp Found Gfx Device
-                                                        ///  @li   <b>0</b> - Not found
-                                                        ///  @li   <b>1</b> - Found
-                                                        ///
-  BOOLEAN               GppGen2;                        ///< GPP Gen2 - 0:disable, 1:enable
-  UINT8                 GppGen2Strap;                   ///< GPP Gen2 Strap - 0:disable, 1:enable, FCH itself uses this
-  BOOLEAN               GppMemWrImprove;                ///< GPP Memory Write Improve - 0:disable, 1:enable
-  BOOLEAN               GppUnhidePorts;                 ///< GPP Unhide Ports - 0:disable, 1:enable
-  UINT8                 GppPortAspm;                    ///< GppPortAspm - ASPM state for all GPP ports
-                                                        ///  @li   <b>01</b> - Disabled
-                                                        ///  @li   <b>01</b> - L0s
-                                                        ///  @li   <b>10</b> - L1
-                                                        ///  @li   <b>11</b> - L0s + L1
-                                                        ///
-  BOOLEAN               GppLaneReversal;                ///< GPP Lane Reversal - 0:disable, 1:enable
-  BOOLEAN               GppPhyPllPowerDown;             ///< GPP PHY PLL Power Down - 0:disable, 1:enable
-  BOOLEAN               GppDynamicPowerSaving;          ///< GPP Dynamic Power Saving - 0:disable, 1:enable
-  BOOLEAN               PcieAer;                        ///< PcieAer - Advanced Error Report: 0/1-disable/enable
-  BOOLEAN               PcieRas;                        ///< PCIe RAS - 0:disable, 1:enable
-  BOOLEAN               PcieCompliance;                 ///< PCIe Compliance - 0:disable, 1:enable
-  BOOLEAN               PcieSoftwareDownGrade;          ///< PCIe Software Down Grade
-  BOOLEAN               UmiPhyPllPowerDown;             ///< UMI PHY PLL Power Down - 0:disable, 1:enable
-  BOOLEAN               SerialDebugBusEnable;           ///< Serial Debug Bus Enable
-  UINT8                 GppHardwareDownGrade;           ///< GppHardwareDownGrade - Gpp HW Down Grade function 0:Disable, 1-4: portA-D
-  UINT8                 GppL1ImmediateAck;              ///< GppL1ImmediateAck - Gpp L1 Immediate ACK 0: enable, 1: disable
-  BOOLEAN               NewGppAlgorithm;                ///< NewGppAlgorithm - New GPP procedure
-  UINT8                 HotPlugPortsStatus;             ///< HotPlugPortsStatus - Save Hot-Plug Ports Status
-  UINT8                 FailPortsStatus;                ///< FailPortsStatus - Save Failure Ports Status
-  UINT8                 GppPortMinPollingTime;          ///< GppPortMinPollingTime - Min. Polling time for Gpp Port Training
-  BOOLEAN               IsCapsuleMode;                  ///< IsCapsuleMode - Support Capsule Mode in FCH
-} FCH_GPP;
-
-
-///
-/// FCH USB sturcture
-///
-typedef struct {
-  BOOLEAN               Ohci1Enable;                    ///< OHCI1 controller enable
-  BOOLEAN               Ohci2Enable;                    ///< OHCI2 controller enable
-  BOOLEAN               Ohci3Enable;                    ///< OHCI3 controller enable
-  BOOLEAN               Ohci4Enable;                    ///< OHCI4 controller enable
-  BOOLEAN               Ehci1Enable;                    ///< EHCI1 controller enable
-  BOOLEAN               Ehci2Enable;                    ///< EHCI2 controller enable
-  BOOLEAN               Ehci3Enable;                    ///< EHCI3 controller enable
-  BOOLEAN               Xhci0Enable;                    ///< XHCI0 controller enable
-  BOOLEAN               Xhci1Enable;                    ///< XHCI1 controller enable
-  BOOLEAN               UsbMsiEnable;                   ///< USB MSI capability
-  UINT32                OhciSsid;                       ///< OHCI SSID
-  UINT32                Ohci4Ssid;                      ///< OHCI 4 SSID
-  UINT32                EhciSsid;                       ///< EHCI SSID
-  UINT32                XhciSsid;                       ///< XHCI SSID
-  BOOLEAN               UsbPhyPowerDown;                ///< USB PHY Power Down - 0:disable, 1:enable
-  UINT32                UserDefineXhciRomAddr;          ///< XHCI ROM address define by platform BIOS
-  UINT8                 Ehci1Phy[5];                    ///< EHCI1 USB PHY Driving Strength value table
-  UINT8                 Ehci2Phy[5];                    ///< EHCI2 USB PHY Driving Strength value table
-  UINT8                 Ehci3Phy[4];                    ///< EHCI3 USB PHY Driving Strength value table
-  UINT8                 Xhci20Phy[4];                   ///< XHCI USB 2.0 PHY Driving Strength value table
-  UINT8                 Ehci1DebugPortSel;              ///< DebugPortSel for Ehci1 Hub
-                                                        ///  @li   <b>000</b> - Disable
-                                                        ///  @li   <b>001</b> - HubDownStreamPort0
-                                                        ///  @li   <b>010</b> - HubDownStreamPort1
-                                                        ///  @li   <b>011</b> - HubDownStreamPort2
-                                                        ///  @li   <b>100</b> - HubDownStreamPort3
-  UINT8                 Ehci2DebugPortSel;              ///< DebugPortSel for Ehci2 Hub
-                                                        ///  @li   <b>000</b> - Disable
-                                                        ///  @li   <b>001</b> - HubDownStreamPort0
-                                                        ///  @li   <b>010</b> - HubDownStreamPort1
-                                                        ///  @li   <b>011</b> - HubDownStreamPort2
-                                                        ///  @li   <b>100</b> - HubDownStreamPort3
-  UINT8                 Ehci3DebugPortSel;              ///< DebugPortSel for Ehci3 Hub
-                                                        ///  @li   <b>000</b> - Disable
-                                                        ///  @li   <b>001</b> - HubDownStreamPort0
-                                                        ///  @li   <b>010</b> - HubDownStreamPort1
-                                                        ///  @li   <b>011</b> - HubDownStreamPort2
-                                                        ///  @li   <b>100</b> - HubDownStreamPort3
-} FCH_USB;
-
-
-/// Private: FCH_DATA_BLOCK_RESET
-typedef struct _FCH_RESET_DATA_BLOCK {
-  AMD_CONFIG_PARAMS     *StdHeader;                     ///< Header structure
-  FCH_RESET_INTERFACE   FchReset;                       ///< Reset interface
-
-  UINT8                 FastSpeed;                      ///< SPI FastSpeed: 1-66MHz, 2-33MHz, 3-22MHz, 4-16.5MHz, 5-100Mhz
-  UINT8                 WriteSpeed;                     ///< SPI Write Speed: 1-66MHz, 2-33MHz, 3-22MHz, 4-16.5MHz, 5-100Mhz
-  UINT8                 Mode;                           ///< SPI Mode
-                                                        ///  @li   <b>101</b> - Qual-io 1-4-4
-                                                        ///  @li   <b>100</b> - Dual-io 1-2-2
-                                                        ///  @li   <b>011</b> - Qual-io 1-1-4
-                                                        ///  @li   <b>010</b> - Dual-io 1-1-2
-                                                        ///  @li   <b>111</b> - FastRead
-                                                        ///  @li   <b>110</b> - Normal
-                                                        ///
-  UINT8                 AutoMode;                       ///< SPI Auto Mode - 0:disable, 1:enable
-  UINT8                 BurstWrite;                     ///< SPI Burst Write - 0:disable, 1:enable
-  BOOLEAN               Sata6AhciCap;                   ///< SATA 6 AHCI Capability - TRUE:enable, FALSE:disable
-  UINT8                 Cg2Pll;                         ///< CG2 PLL - 0:disable, 1:enable
-  BOOLEAN               EcKbd;                          ///< EC KBD - 0:disable, 1:enable
-  BOOLEAN               LegacyFree;                     ///< Legacy Free - 0:disable, 1:enable
-  BOOLEAN               SataSetMaxGen2;                 ///< SATA enable maximum GEN2
-  UINT8                 SataClkMode;                    ///< SATA reference clock selector and divider
-  UINT8                 SataModeReg;                    ///< Output: SATAConfig PMIO:0xDA
-  BOOLEAN               SataInternal100Spread;          ///< SATA internal 100MHz spread ON/OFF
-  UINT8                 SpiSpeed;                       ///< SPI NormSpeed: 1-66MHz, 2-33MHz, 3-22MHz, 4-16.5MHz, 5-100Mhz
-//  UINT32                SPI100_RX_Timing_Config_Register_38;                 ///< SPI100_RX_Timing_Config_Register_38
-//  UINT16                SPI100_RX_Timing_Config_Register_3C;                 ///< SPI100_RX_Timing_Config_Register_3C
-//  UINT8                 SpiProtectEn0_1d_34;                  ///
-  UINT8                 SPI100_Enable;                  ///
-  BOOLEAN               EcChannel0;                     ///< Enable EC channel 0
-  FCH_GPP               Gpp;                            ///< GPP subsystem
-  FCH_SPI               Spi;                            ///< SPI subsystem
-  BOOLEAN               QeEnabled;                      /// Quad Mode Enabled
-  BOOLEAN               FchOscout1ClkContinous;         ///< FCH OSCOUT1_CLK Continous
-  VOID*                 EarlyOemGpioTable;              /// Pointer of Early OEM GPIO table
-//  VOID*                 OemSpiDeviceTable;              /// Pointer of OEM Spi Device table
-  VOID*                 OemResetProgrammingTablePtr;    /// Pointer of ACPI OEM table
-} FCH_RESET_DATA_BLOCK;
-
-
-/// Private: FCH_DATA_BLOCK
-typedef struct _FCH_DATA_BLOCK {
-  AMD_CONFIG_PARAMS     *StdHeader;                     ///< Header structure
-
-  FCH_ACPI              HwAcpi;                         ///< ACPI structure
-  FCH_AB                Ab;                             ///< AB structure
-  FCH_GPP               Gpp;                            ///< GPP structure
-  FCH_USB               Usb;                            ///< USB structure
-  FCH_SATA              Sata;                           ///< SATA structure
-  FCH_SMBUS             Smbus;                          ///< SMBus structure
-  FCH_IDE               Ide;                            ///< IDE structure
-  FCH_AZALIA            Azalia;                         ///< Azalia structure
-  FCH_SPI               Spi;                            ///< SPI structure
-  FCH_PCIB              Pcib;                           ///< PCIB structure
-  FCH_GEC               Gec;                            ///< GEC structure
-  FCH_SD                Sd;                             ///< SD structure
-  FCH_HWM               Hwm;                            ///< Hardware Moniter structure
-  FCH_IR                Ir;                             ///< IR structure
-  FCH_HPET              Hpet;                           ///< HPET structure
-  FCH_GCPU              Gcpu;                           ///< GCPU structure
-  FCH_IMC               Imc;                            ///< IMC structure
-  FCH_MISC              Misc;                           ///< MISC structure
-  VOID*                 PostOemGpioTable;              /// Pointer of Post OEM GPIO table
-} FCH_DATA_BLOCK;
-
-#pragma pack (pop)
-
-#endif

pi/amd/00630F01/Proc/Fch/Common/FchDef.h

diff --git a/pi/amd/00630F01/Proc/Fch/Common/FchDef.h b/pi/amd/00630F01/Proc/Fch/Common/FchDef.h
deleted file mode 100644
index d8317b9..0000000
--- a/pi/amd/00630F01/Proc/Fch/Common/FchDef.h
+++ /dev/null
@@ -1,477 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH routine definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright 2008 - 2014 ADVANCED MICRO DEVICES, INC.  All Rights Reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *****************************************************************************/
-#ifndef _FCH_DEF_H_
-#define _FCH_DEF_H_
-
-
-UINT32        ReadAlink (IN UINT32 Index, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WriteAlink (IN UINT32 Index, IN UINT32 Data, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          RwAlink (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ReadMem (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *ValuePtr);
-VOID          WriteMem (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *ValuePtr);
-VOID          RwMem (IN UINT32 Address, IN UINT8 OpFlag, IN UINT32 Mask, IN UINT32 Data);
-VOID          ReadPci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WritePci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          RwPci (IN UINT32 Address, IN UINT8 OpFlag, IN UINT32 Mask, IN UINT32  Data, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ProgramPciByteTable (IN REG8_MASK* pPciByteTable, IN UINT16 dwTableSize, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ProgramFchAcpiMmioTbl (IN ACPI_REG_WRITE  *pAcpiTbl, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ProgramFchSciMapTbl (IN SCI_MAP_CONTROL  *pSciMapTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock);
-VOID          ProgramFchGpioTbl (IN GPIO_CONTROL  *pGpioTbl);
-VOID          ProgramFchSataPhyTbl (IN SATA_PHY_CONTROL  *pSataPhyTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock);
-VOID          GetChipSysMode (IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-BOOLEAN       IsImcEnabled (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ReadPmio (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WritePmio (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          RwPmio (IN UINT8 Address, IN UINT8 OpFlag, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ReadPmio2 (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WritePmio2 (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          RwPmio2 (IN UINT8 Address, IN UINT8  OpFlag, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ReadBiosram (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WriteBiosram (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          GetFchAcpiMmioBase (OUT UINT32 *AcpiMmioBase, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          GetFchAcpiPmBase (OUT  UINT16 *AcpiPmBase, IN AMD_CONFIG_PARAMS *StdHeader);
-UINT8         ReadFchSleepType (IN AMD_CONFIG_PARAMS *StdHeader);
-UINT8         ReadFchChipsetRevision (IN AMD_CONFIG_PARAMS *StdHeader);
-
-///
-/// Fch Ab Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetAb (IN VOID* FchDataPtr);
-VOID  FchProgramAbPowerOnReset (IN VOID* FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvAb (IN VOID* FchDataPtr);
-VOID  FchInitEnvAbSpecial (IN VOID* FchDataPtr);
-VOID  FchInitMidAb (IN VOID* FchDataPtr);
-VOID  FchInitLateAb (IN VOID* FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID  FchInitEnvAbLinkInit (IN VOID* FchDataPtr);
-BOOLEAN IsUmiOneLaneGen1Mode (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchAbLateProgram (IN VOID* FchDataPtr);
-
-///
-/// Fch Pcie Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetPcie    (IN VOID* FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvPcie        (IN VOID* FchDataPtr);
-VOID  FchInitMidPcie        (IN VOID* FchDataPtr);
-VOID  FchInitLatePcie       (IN VOID* FchDataPtr);
-VOID  ProgramPcieNativeMode (IN VOID* FchDataPtr);
-
-///
-/// Fch Gpp Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetGpp (IN VOID* FchDataPtr);
-VOID  ProgramFchGppInitReset (IN FCH_GPP *FchGpp, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchResetPcie (IN RESET_BLOCK  ResetBlock, IN RESET_OP ResetOp, IN AMD_CONFIG_PARAMS *StdHeader);
-
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvGpp (IN VOID* FchDataPtr);
-VOID  FchInitMidGpp (IN VOID* FchDataPtr);
-VOID  FchInitLateGpp (IN VOID* FchDataPtr);
-
-///
-///  Common Gpp Routines
-///
-VOID  ProgramGppTogglePcieReset (IN BOOLEAN DoToggling, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchGppForceGen1 (IN FCH_GPP *FchGpp, IN CONST UINT8 ActivePorts, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchGppForceGen2 (IN FCH_GPP *FchGpp, IN CONST UINT8 ActivePorts, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchGppDynamicPowerSaving (IN FCH_GPP *FchGpp, IN AMD_CONFIG_PARAMS *StdHeader);
-UINT8 GppPortPollingLtssm (IN FCH_GPP *FchGpp, IN UINT8 ActivePorts, IN BOOLEAN IsGen2, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  GppGen2Workaround (IN FCH_GPP *FchGpp, IN AMD_CONFIG_PARAMS *StdHeader);
-UINT8 FchFindPciCap (IN UINT32 PciAddress, IN UINT8 TargetCapId, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchGppPortInit (IN FCH_GPP *FchGpp, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchGppPortInitPhaseII (IN FCH_GPP *FchGpp, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchGppPortInitS3Phase (IN FCH_GPP *FchGpp, IN AMD_CONFIG_PARAMS *StdHeader);
-UINT32 GppGetFchTempBus (IN AMD_CONFIG_PARAMS *StdHeader);
-
-///
-/// Fch Azalia Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetAzalia    (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvAzalia      (IN VOID  *FchDataPtr);
-VOID  FchInitMidAzalia      (IN VOID  *FchDataPtr);
-VOID  FchInitLateAzalia     (IN VOID  *FchDataPtr);
-
-
-///
-/// Fch GEC Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetGec (IN VOID*   FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID FchInitEnvGec (IN VOID*   FchDataPtr);
-VOID FchInitMidGec (IN VOID*   FchDataPtr);
-VOID FchInitLateGec (IN VOID*   FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID FchInitGecController (IN VOID*   FchDataPtr);
-VOID FchSwInitGecBootRom (IN VOID*   FchDataPtr);
-
-///
-/// Fch HwAcpi Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetHwAcpiP    (IN VOID  *FchDataPtr);
-VOID  FchInitResetHwAcpi     (IN VOID  *FchDataPtr);
-VOID  ProgramFchHwAcpiResetP (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvHwAcpiP                      (IN VOID  *FchDataPtr);
-VOID  FchInitEnvHwAcpi                       (IN VOID  *FchDataPtr);
-VOID  ProgramEnvPFchAcpiMmio                 (IN VOID *FchDataPtr);
-VOID  ProgramFchEnvHwAcpiPciReg              (IN VOID *FchDataPtr);
-VOID  ProgramSpecificFchInitEnvAcpiMmio      (IN VOID *FchDataPtr);
-VOID  ProgramFchEnvSpreadSpectrum            (IN VOID *FchDataPtr);
-VOID  FchInitMidHwAcpi      (IN VOID  *FchDataPtr);
-VOID  FchInitLateHwAcpi     (IN VOID  *FchDataPtr);
-
-///
-///  Other Public Routines
-///
-VOID HpetInit               (IN VOID  *FchDataPtr);
-VOID C3PopupSetting         (IN VOID  *FchDataPtr);
-VOID MtC1eEnable            (IN VOID  *FchDataPtr);
-VOID GcpuRelatedSetting     (IN VOID  *FchDataPtr);
-VOID StressResetModeLate    (IN VOID  *FchDataPtr);
-
-///
-/// Fch Hwm Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetHwm (IN VOID* FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvHwm (IN VOID* FchDataPtr);
-VOID  FchInitMidHwm (IN VOID* FchDataPtr);
-VOID  FchInitLateHwm (IN VOID* FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID  HwmInitRegister (IN VOID* FchDataPtr);
-VOID  HwmProcessParameter (IN VOID* FchDataPtr);
-VOID  HwmSetRegister (IN VOID* FchDataPtr);
-VOID  HwmGetCalibrationFactor (IN VOID* FchDataPtr);
-VOID  HwmFchtsiAutoPolling (IN VOID* FchDataPtr);
-VOID  HwmGetRawData (IN VOID* FchDataPtr);
-VOID  HwmCaculate (IN VOID* FchDataPtr);
-VOID  HwmFchtsiAutoPollingOff (IN VOID* FchDataPtr);
-VOID  FchECfancontrolservice (IN VOID* FchDataPtr);
-
-
-///
-/// Fch Ide Routines
-///
-VOID  FchInitEnvIde (IN VOID* FchDataPtr);
-VOID  FchInitMidIde (IN VOID* FchDataPtr);
-VOID  FchInitLateIde (IN VOID* FchDataPtr);
-
-
-///
-/// Fch Imc Routines
-///
-///  Pei Phase
-///
-VOID    FchInitResetImc    (IN VOID  *FchDataPtr);
-VOID    FchInitResetEc     (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID    FchInitEnvImc      (IN VOID  *FchDataPtr);
-VOID    FchInitMidImc      (IN VOID  *FchDataPtr);
-VOID    FchInitLateImc     (IN VOID  *FchDataPtr);
-VOID    FchInitEnvEc       (IN VOID  *FchDataPtr);
-VOID    FchInitMidEc       (IN VOID  *FchDataPtr);
-VOID    FchInitLateEc      (IN VOID  *FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID    EnterEcConfig (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    ExitEcConfig (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    ReadEc8    (IN UINT8 Address, IN UINT8* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    WriteEc8   (IN UINT8 Address, IN UINT8* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    RwEc8      (IN UINT8 Address, IN UINT8 AndMask, IN UINT8 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    WriteECmsg (IN UINT8 Address, IN UINT8 OpFlag, IN VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    ReadECmsg  (IN UINT8 Address, IN UINT8 OpFlag, OUT VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    WaitForEcLDN9MailboxCmdAck (IN AMD_CONFIG_PARAMS *StdHeader);
-
-VOID    ImcSleep                   (IN VOID  *FchDataPtr);
-VOID    ImcEnableSurebootTimer     (IN VOID  *FchDataPtr);
-VOID    ImcDisarmSurebootTimer     (IN VOID  *FchDataPtr);
-VOID    ImcDisableSurebootTimer    (IN VOID  *FchDataPtr);
-VOID    ImcWakeup                  (IN VOID  *FchDataPtr);
-VOID    ImcIdle                    (IN VOID  *FchDataPtr);
-BOOLEAN ValidateImcFirmware        (IN VOID  *FchDataPtr);
-VOID    SoftwareToggleImcStrapping (IN VOID  *FchDataPtr);
-VOID    ImcCrashReset              (IN VOID  *FchDataPtr);
-VOID    SoftwareDisableImc         (IN VOID  *FchDataPtr);
-
-
-///
-/// Fch Ir Routines
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvIr (IN VOID* FchDataPtr);
-VOID  FchInitMidIr (IN VOID* FchDataPtr);
-VOID  FchInitLateIr (IN VOID* FchDataPtr);
-
-///
-/// Fch Pcib Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetPcib (IN VOID* FchDataPtr);
-VOID  FchInitResetPcibPort80Enable (IN VOID* FchDataPtr);
-
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvPcib (IN VOID* FchDataPtr);
-VOID  FchInitMidPcib (IN VOID* FchDataPtr);
-VOID  FchInitLatePcib (IN VOID* FchDataPtr);
-
-
-///
-/// Fch SATA Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetSata          (IN VOID  *FchDataPtr);
-VOID  FchInitResetSataProgram   (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitMidSata                   (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSata                   (IN VOID  *FchDataPtr);
-VOID  FchInitEnvProgramSataPciRegs     (IN VOID  *FchDataPtr);
-VOID  FchInitMidProgramSataRegs        (IN VOID  *FchDataPtr);
-VOID  FchInitLateProgramSataRegs       (IN VOID  *FchDataPtr);
-
-VOID  FchInitLateSata           (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataIde         (IN VOID  *FchDataPtr);
-VOID  FchInitMidSataIde         (IN VOID  *FchDataPtr);
-VOID  FchInitLateSataIde        (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataAhci        (IN VOID  *FchDataPtr);
-VOID  FchInitMidSataAhci        (IN VOID  *FchDataPtr);
-VOID  FchInitLateSataAhci       (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataRaid        (IN VOID  *FchDataPtr);
-VOID  FchInitMidSataRaid        (IN VOID  *FchDataPtr);
-VOID  FchInitLateSataRaid       (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataIde2Ahci    (IN VOID  *FchDataPtr);
-VOID  FchInitMidSataIde2Ahci    (IN VOID  *FchDataPtr);
-VOID  FchInitLateSataIde2Ahci   (IN VOID  *FchDataPtr);
-
-VOID SataAhciSetDeviceNumMsi     (IN VOID  *FchDataPtr);
-VOID SataRaidSetDeviceNumMsi     (IN VOID  *FchDataPtr);
-VOID SataIde2AhciSetDeviceNumMsi (IN VOID  *FchDataPtr);
-VOID  SataSetIrqIntResource (IN VOID  *FchDataPtr, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  SataBar5setting (IN VOID *FchDataPtr, IN UINT32 *Bar5Ptr);
-VOID  SataEnableWriteAccess (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  SataDisableWriteAccess (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  SataSetDeviceNumMsi (IN VOID  *FchDataPtr);
-VOID  FchSataSetDeviceNumMsi (IN VOID  *FchDataPtr);
-VOID  ShutdownUnconnectedSataPortClock (IN VOID *FchDataPtr, IN UINT32 Bar5);
-VOID  FchShutdownUnconnectedSataPortClock (IN VOID *FchDataPtr, IN UINT32 Bar5);
-VOID  SataDriveDetection (IN VOID *FchDataPtr, IN UINT32 *Bar5Ptr);
-VOID  FchSataDriveDetection (IN VOID *FchDataPtr, IN UINT32 *Bar5Ptr);
-VOID  FchSataGpioInitial (IN  VOID  *FchDataPtr);
-VOID  SataBar5RegSet (IN  VOID  *FchDataPtr);
-VOID  SataSetPortGenMode (IN  VOID  *FchDataPtr);
-VOID  FchSataSetPortGenMode (IN  VOID  *FchDataPtr);
-VOID  FchProgramSataPhy (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchSataDriveFpga (IN  VOID  *FchDataPtr);
-VOID  FchInitEnvSataRaidProgram  (IN VOID  *FchDataPtr);
-
-///
-/// FCH USB Controller Public Function
-///
-///  Pei Phase
-///
-VOID  FchInitResetUsb            (IN VOID  *FchDataPtr);
-VOID  FchInitResetOhci           (IN VOID  *FchDataPtr);
-VOID  FchInitResetEhci           (IN VOID  *FchDataPtr);
-VOID  FchInitResetXhci           (IN VOID  *FchDataPtr);
-VOID  FchInitResetXhciProgram    (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvUsb              (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsb              (IN VOID  *FchDataPtr);
-VOID  FchInitLateUsb             (IN VOID  *FchDataPtr);
-VOID  FchInitEnvUsbOhci          (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbOhci          (IN VOID  *FchDataPtr);
-VOID  FchInitLateUsbOhci         (IN VOID  *FchDataPtr);
-VOID  FchInitEnvUsbEhci          (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbEhci          (IN VOID  *FchDataPtr);
-VOID  FchInitLateUsbEhci         (IN VOID  *FchDataPtr);
-VOID  FchInitEnvUsbXhci          (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbXhci          (IN VOID  *FchDataPtr);
-VOID  FchInitLateUsbXhci         (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbOhci1         (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbOhci2         (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbOhci3         (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbOhci4         (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbEhci1         (IN FCH_DATA_BLOCK  *FchDataPtr);
-VOID  FchInitMidUsbEhci2         (IN FCH_DATA_BLOCK  *FchDataPtr);
-VOID  FchInitMidUsbEhci3         (IN FCH_DATA_BLOCK  *FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID  FchSetUsbEnableReg         (IN FCH_DATA_BLOCK *FchDataPtr);
-VOID  FchOhciInitAfterPciInit    (IN UINT32 Value, IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchEhciInitAfterPciInit    (IN UINT32 Value, IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchXhciInitBeforePciInit   (IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchXhciInitIndirectReg     (IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchInitLateUsbXhciProgram  (IN VOID  *FchDataPtr);
-VOID  FchXhciPowerSavingProgram  (IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchXhciUsbPhyCalibrated    (IN FCH_DATA_BLOCK* FchDataPtr);
-
-///
-/// Fch Sd Routines
-///
-VOID  FchInitEnvSd  (IN VOID  *FchDataPtr);
-VOID  FchInitMidSd  (IN VOID  *FchDataPtr);
-VOID  FchInitLateSd (IN VOID  *FchDataPtr);
-
-///
-///  Other Public Routines
-///
-
-VOID FchInitEnvSdProgram (IN VOID  *FchDataPtr);
-
-///
-/// Fch Spi Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetSpi        (IN VOID  *FchDataPtr);
-VOID  FchInitResetLpc        (IN VOID  *FchDataPtr);
-VOID  FchInitResetLpcProgram (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvSpi          (IN VOID  *FchDataPtr);
-VOID  FchInitMidSpi          (IN VOID  *FchDataPtr);
-VOID  FchInitLateSpi         (IN VOID  *FchDataPtr);
-VOID  FchInitEnvLpc          (IN VOID  *FchDataPtr);
-VOID  FchInitMidLpc          (IN VOID  *FchDataPtr);
-VOID  FchInitLateLpc         (IN VOID  *FchDataPtr);
-VOID  FchInitEnvLpcProgram   (IN VOID  *FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID  FchSpiUnlock       (IN VOID  *FchDataPtr);
-VOID  FchSpiLock         (IN VOID  *FchDataPtr);
-
-/*--------------------------- Documentation Pages ---------------------------*/
-VOID  FchStall (IN UINT32 uSec, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  CimFchStall (IN UINT32 uSec, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchPciReset (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  OutPort80 (IN UINT32 pcode, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  OutPort1080 (IN UINT32 pcode, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  GetEfuseStatus (IN VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  TurnOffCG2 (OUT VOID);
-VOID  BackUpCG2 (OUT VOID);
-VOID  FchCopyMem (IN VOID* pDest, IN VOID* pSource, IN UINTN Length);
-VOID* GetRomSigPtr (IN UINTN* RomSigPtr, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  RwXhciIndReg (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  RwXhci0IndReg (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  RwXhci1IndReg (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  ReadXhci0Phy (IN UINT32 Port, IN UINT32 Address, IN UINT32 *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  ReadXhci1Phy (IN UINT32 Port, IN UINT32 Address, IN UINT32 *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  AcLossControl (IN UINT8 AcLossControlValue);
-VOID  FchVgaInit (OUT VOID);
-VOID  RecordFchConfigPtr (IN UINT32 FchConfigPtr);
-VOID  ValidateFchVariant (IN VOID  *FchDataPtr);
-VOID  RecordSmiStatus (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  ClearAllSmiStatus (IN AMD_CONFIG_PARAMS *StdHeader);
-BOOLEAN  IsGCPU (IN VOID  *FchDataPtr);
-BOOLEAN  IsExternalClockMode (IN VOID  *FchDataPtr);
-VOID  SbSleepTrapControl (IN BOOLEAN SleepTrap);
-
-AGESA_STATUS
-FchSpiTransfer (
-  IN       UINT8    PrefixCode,
-  IN       UINT8    Opcode,
-  IN  OUT  UINT8    *DataPtr,
-  IN       UINT8    *AddressPtr,
-  IN       UINT8    Length,
-  IN       BOOLEAN  WriteFlag,
-  IN       BOOLEAN  AddressFlag,
-  IN       BOOLEAN  DataFlag,
-  IN       BOOLEAN  FinishedFlag
-  );
-
-BOOLEAN
-FchPlatformSpiQe (
-  IN       VOID     *FchDataPtr
-  );
-
-#endif
-

pi/amd/00630F01/Proc/Fch/Fch.h

diff --git a/pi/amd/00630F01/Proc/Fch/Fch.h b/pi/amd/00630F01/Proc/Fch/Fch.h
deleted file mode 100644
index 6685c67..0000000
--- a/pi/amd/00630F01/Proc/Fch/Fch.h
+++ /dev/null
@@ -1,2285 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH registers definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*
-*****************************************************************************
-*
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#define FCH_REVISION       "0.0.5.0"
-#define FCH_ID             "FCH_A05"
-#define FCH_VERSION        0x0000
-
-/**
- * @page fchinitguide FCH implement phase in AGESA
- *
- * FCH provides below access to supported FCH service functions
- * and data.
- *   - @subpage fchreset "FCH_INIT_RESET"
- *   - @subpage fchenv "FCH_INIT_ENV"
- *   - @subpage fchmid "FCH_INIT_MID"
- *   - @subpage fchlate "FCH_INIT_LATE"
- *   - @subpage fchs3early "FCH_INIT_S3_EARLY_RESTORE"
- *   - @subpage fchs3late "FCH_INIT_S3_LATE_RESTORE"
- *   - @subpage fchsmm "FCH_SMM_SERVICE"
- *   - @subpage fchsmmacpion "FCH_SMM_ACPION"
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchreset FCH_INIT_RESET
- *  @section FCH_INIT_RESET Interface Call
- *  @par
- *     Initialize structure referenced by FCH_RESET_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_RESET_CallIn Call Prototype
- *  @par
- *     AGESA_STATUS FchInitReset (IN AMD_RESET_PARAMS *ResetParams);
- *  @subsection FCH_INIT_RESET_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_RESET_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSmbus0BaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSmbus1BaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSioPmeBaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgWatchDogTimerBase  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgGecShadowRomBase   </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSpiRomBaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiPm1EvtBlkAddr  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiPm1CntBlkAddr  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiPmTmrBlkAddr   </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgCpuControlBlkAddr  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiGpe0BlkAddr    </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSmiCmdPortAddr     </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiPmaCntBlkAddr  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_RESET_INTERFACE::SataEnable      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_RESET_INTERFACE::IdeEnable       </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchenv FCH_INIT_ENV
- *  @section FCH_INIT_ENV Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_ENV_CallIn Call Prototype
- *  @par
- *     AGESA_STATUS FchInitEnv (IN AMD_ENV_PARAMS *EnvParams);
- *  @subsection FCH_INIT_ENV_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_ENV_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SdConfig              </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::AzaliaController      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::IrConfig              </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataIdeMode           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci1Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci2Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci3Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci4Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchmid FCH_INIT_MID
- *  @section FCH_INIT_MID Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_MID_CallIn Call Prototype
- *  @par
- *     AGESA_STATUS FchInitMid (IN AMD_MID_PARAMS *MidParams);
- *  @subsection FCH_INIT_MID_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_MID_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::AzaliaController      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::IdeEnable             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchlate FCH_INIT_LATE
- *  @section FCH_INIT_LATE Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_LATE_CallIn Call Prototype
- *  @par
- *     AGESA_STATUS FchInitLate (IN AMD_S3SAVE_PARAMS *LateParams);
- *  @subsection FCH_INIT_LATE_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_LATE_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSpiRomBaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchs3early FCH_INIT_S3_EARLY_RESTORE
- *  @section FCH_INIT_S3_EARLY_RESTORE Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_S3_EARLY_RESTORE_CallIn Call Prototype
- *  @par
- *     VOID FchInitS3EarlyRestore (IN FCH_DATA_BLOCK *FchDataPtr);
- *  @subsection FCH_INIT_S3_EARLY_RESTORE_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_S3_EARLY_RESTORE_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SdConfig              </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::AzaliaController      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::IrConfig              </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataIdeMode           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci1Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci2Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci3Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci4Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchs3late FCH_INIT_S3_LATE_RESTORE
- *  @section FCH_INIT_S3_LATE_RESTORE Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_S3_LATE_RESTORE_CallIn Call Prototype
- *  @par
- *     VOID FchInitS3LateRestore (IN FCH_DATA_BLOCK *FchDataPtr);
- *  @subsection FCH_INIT_S3_LATE_RESTORE_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_S3_LATE_RESTORE_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::AzaliaController      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::IdeEnable             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSpiRomBaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchsmm FCH_SMM_SERVICE
- *  @section FCH_SMM_SERVICE Interface Call
- *  Initialize structure referenced by FCHCFG to default recommended value.
- *  @subsection FCH_SMM_SERVICE_CallIn Call Prototype
- *  @par
- *     FchSmmService ((FCHCFG*)pConfig)     (Followed PH Interface)
- *  @subsection FCH_SMM_SERVICE_CallID Service ID
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_SMM_SERVICE  --> 0x00010060 </TD></TR>
- *  </TABLE>
- *  @subsection FCH_SMM_SERVICE_CallOut Prepare for Callout
- *  @par
- *    Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_SMM_SERVICE_Config Prepare for Configuration Data.
- *  @par
- *     Not necessary on current implementation
- *
- */
-#define FCH_SMM_SERVICE              0x00010060ul
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchsmmacpion FCH_SMM_ACPION
- *  @section FCH_SMM_ACPION Interface Call
- *  Initialize structure referenced by FCHCFG to default recommended value.
- *  @subsection FCH_SMM_ACPION_CallIn Call Prototype
- *  @par
- *     FchSmmAcpiOn ((FCHCFG*)pConfig)     (Followed PH Interface)
- *  @subsection FCH_SMM_ACPION_CallID Service ID
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_SMM_ACPION  --> 0x00010061 </TD></TR>
- *  </TABLE>
- *  @subsection FCH_SMM_ACPION_CallOut Prepare for Callout
- *  @par
- *    Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_SMM_ACPION_Config Prepare for Configuration Data.
- *  @par
- *     Not necessary on current implementation
- *
- */
-#define FCH_SMM_ACPION               0x00010061ul
-
-#ifndef OEM_CALLBACK_BASE
-  #define OEM_CALLBACK_BASE         0x00010100ul
-#endif
-
-//0x00 - 0x0F callback functions are reserved for bootblock
-#define SATA_PHY_PROGRAMMING        OEM_CALLBACK_BASE + 0x10
-#define PULL_UP_PULL_DOWN_SETTINGS  OEM_CALLBACK_BASE + 0x20
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page CB_SBGPP_RESET_ASSERT_Page CB_SBGPP_RESET_ASSERT
- *  @section CB_SBGPP_RESET_ASSERT Interface Call
- *  Initialize structure referenced by FCHCFG to default recommended value.
- *  @subsection CB_SBGPP_RESET_ASSERT_CallID Service ID
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> CB_SBGPP_RESET_ASSERT  --> 0x00010130 </TD></TR>
- *  </TABLE>
- *  @subsection CB_SBGPP_RESET_ASSERT_Config Prepare for Configuration Data.
- *  @par
- *     Not necessary on current implementation
- *
- */
-#define CB_SBGPP_RESET_ASSERT       OEM_CALLBACK_BASE + 0x30
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page CB_SBGPP_RESET_DEASSERT_Page CB_SBGPP_RESET_DEASSERT
- *  @section CB_SBGPP_RESET_DEASSERT  Interface Call
- *  Initialize structure referenced by FCHCFG to default recommended value.
- *  @subsection CB_SBGPP_RESET_DEASSERT _CallID Service ID
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> CB_SBGPP_RESET_DEASSERT   --> 0x00010131 </TD></TR>
- *  </TABLE>
- *  @subsection CB_SBGPP_RESET_DEASSERT _Config Prepare for Configuration Data.
- *  @par
- *     Not necessary on current implementation
- *
- */
-#define CB_SBGPP_RESET_DEASSERT     OEM_CALLBACK_BASE + 0x31
-
-#define CFG_ADDR_PORT               0xCF8
-#define CFG_DATA_PORT               0xCFC
-
-#define ALINK_ACCESS_INDEX          0x0CD8
-#define ALINK_ACCESS_DATA           ALINK_ACCESS_INDEX + 4
-
-/*------------------------------------------------------------------
-; I/O Base Address - Should be set by host BIOS
-;------------------------------------------------------------------ */
-#define DELAY_PORT                  0x0E0
-
-#define FCH_8259_CONTROL_REG_MASTER 0x20
-#define FCH_8259_MASK_REG_MASTER    0x21
-
-/*------------------------------------------------------------------
-; DEBUG_PORT = 8-bit I/O Port Address for POST Code Display
-;------------------------------------------------------------------ */
-// ASIC VendorID and DeviceIDs
-#define ATI_VID                      0x1002
-#define AMD_FCH_VID                  0x1022
-#define FCH_DEVICE_ID                0x780B
-#define FCH_SATA_VID                 AMD_FCH_VID      // Dev 17 Func 0
-#define FCH_SATA_DID                 0x7800
-#define FCH_SATA_AHCI_DID            0x7801
-#define FCH_SATA_RAID_DID            0x7802
-#define FCH_SATA_RAID5_DID           0x7803
-#define FCH_SATA_AMDAHCI_DID         0x7804
-#define FCH_SATA_RAID_DOTHILL_DID    0x7805
-#define FCH_SATA_RAID5_DOTHILL_DID   0x780A
-#define FCH_USB_OHCI_VID             AMD_FCH_VID      // Dev 18 Func 0, Dev 19 Func 0
-#define FCH_USB_OHCI_DID             0x7807
-#define FCH_USB_EHCI_VID             AMD_FCH_VID      // Dev 18 Func 2, Dev 19 Func 2
-#define FCH_USB_EHCI_DID             0x7808
-#define FCH_USB_XHCI_VID             AMD_FCH_VID      // Dev 10 Func 0, Dev 10 Func 1
-#define FCH_USB_XHCI_DID             0x7812
-#define FCH_USB_XHCI_DID_BOLTON      0x7814
-#define FCH_SMBUS_VID                AMD_FCH_VID      // Dev 20 Func 0
-#define FCH_SMBUS_DID                0x780B
-#define FCH_IDE_VID                  AMD_FCH_VID      // Dev 20 Func 1
-#define FCH_IDE_DID                  0x780C
-#define FCH_AZALIA_VID               AMD_FCH_VID      // Dev 20 Func 2
-#define FCH_AZALIA_DID               0x780D
-#define FCH_LPC_VID                  AMD_FCH_VID      // Dev 20 Func 3
-#define FCH_LPC_DID                  0x780E
-#define FCH_PCIB_VID                 AMD_FCH_VID      // Dev 20 Func 4
-#define FCH_PCIB_DID                 0x780F
-#define FCH_USB_OHCIF_VID            AMD_FCH_VID      // dev 20 Func 5
-#define FCH_USB_OHCIF_DID            0x7809
-#define FCH_NIC_VID                  0x14E4          // Dev 20 Func 6
-#define FCH_NIC_DID                  0x1699
-#define FCH_SD_VID                   AMD_FCH_VID      // Dev 20 Func 7
-#define FCH_SD_DID                   0x7806
-
-//FCH Variant
-#define FCH_Variant_EFUSE_LOCATION        0x1E        // EFUSE bit 240-247
-
-#define FCH_M2                            0x01
-#define FCH_M3                            0x03
-#define FCH_M3T                           0x07
-#define FCH_D2                            0x0F
-#define FCH_D3                            0x1F
-#define FCH_D4                            0x3F
-#define FCH_BOLTON                        0x15
-#define FCH_YANGTZE                       0x39
-#define FCH_YANGTZEA1                     0x3A
-//Misc
-#define R_FCH_ACPI_PM1_STATUS              0x00
-#define R_FCH_ACPI_PM1_ENABLE              0x02
-#define R_FCH_ACPI_PM_CONTROL              0x04
-#define R_FCH_ACPI_EVENT_STATUS            0x20
-#define R_FCH_ACPI_EVENT_ENABLE            0x24
-#define R_FCH_PM_ACPI_PMA_CNT_BLK_LO       0x2C
-
-// ACPI Sleep Type
-#define ACPI_SLPTYP_S0                     0
-#define ACPI_SLPTYP_S1                     1
-#define ACPI_SLPTYP_S3                     3
-#define ACPI_SLPTYP_S4                     4
-#define ACPI_SLPTYP_S5                     5
-
-//#define SATA_BUS_DEV_FUN_FPGA            0x228
-#define SATA_BUS_DEV_FUN            ((0x11 << 3) + 0)
-#define FCH_SATA1_BUS        0
-#define FCH_SATA1_DEV        17
-#define FCH_SATA1_FUNC       0
-
-#define FC_BUS_DEV_FUN              ((0x11 << 3) + 1)
-#define FCH_XHCI_BUS        0
-#define FCH_XHCI_DEV        16
-#define FCH_XHCI_FUNC       0
-#define USB_XHCI_BUS_DEV_FUN        ((FCH_XHCI_DEV << 3) + FCH_XHCI_FUNC)
-#define FCH_XHCI1_BUS        0
-#define FCH_XHCI1_DEV        16
-#define FCH_XHCI1_FUNC       1
-#define USB_XHCI1_BUS_DEV_FUN       ((FCH_XHCI1_DEV << 3) + FCH_XHCI1_FUNC)
-#define USB1_OHCI_BUS_DEV_FUN       ((0x12 << 3) + 0)    // PORT 0-4
-#define FCH_OHCI1_BUS        0
-#define FCH_OHCI1_DEV        18
-#define FCH_OHCI1_FUNC       0
-#define USB2_OHCI_BUS_DEV_FUN       ((0x13 << 3) + 0)    // PORT 5-9
-#define FCH_OHCI2_BUS        0
-#define FCH_OHCI2_DEV        19
-#define FCH_OHCI2_FUNC       0
-#define USB3_OHCI_BUS_DEV_FUN       ((0x16 << 3) + 0)    // PORT 10-13
-#define FCH_OHCI3_BUS        0
-#define FCH_OHCI3_DEV        22
-#define FCH_OHCI3_FUNC       0
-#define USB1_EHCI_BUS_DEV_FUN       ((0x12 << 3) + 2)    // PORT 0-4
-#define FCH_EHCI1_BUS        0
-#define FCH_EHCI1_DEV        18
-#define FCH_EHCI1_FUNC       2
-#define USB2_EHCI_BUS_DEV_FUN       ((0x13 << 3) + 2)    // PORT 5-9
-#define FCH_EHCI2_BUS        0
-#define FCH_EHCI2_DEV        19
-#define FCH_EHCI2_FUNC       2
-#define USB3_EHCI_BUS_DEV_FUN       ((0x16 << 3) + 2)  // PORT 10-13
-#define FCH_EHCI3_BUS        0
-#define FCH_EHCI3_DEV        22
-#define FCH_EHCI3_FUNC       2
-#define SMBUS_BUS_DEV_FUN           ((0x14 << 3) + 0)
-#define FCH_ISA_BUS          0
-#define FCH_ISA_DEV          20
-#define FCH_ISA_FUNC         0
-#define IDE_BUS_DEV_FUN             ((0x14 << 3) + 1)
-#define FCH_IDE_BUS          0
-#define FCH_IDE_DEV          20
-#define FCH_IDE_FUNC         1
-#define AZALIA_BUS_DEV_FUN          ((0x14 << 3) + 2)
-#define FCH_AZALIA_BUS       0
-#define FCH_AZALIA_DEV       20
-#define FCH_AZALIA_FUNC      2
-#define LPC_BUS_DEV_FUN             ((0x14 << 3) + 3)
-#define FCH_LPC_BUS          0
-#define FCH_LPC_DEV          20
-#define FCH_LPC_FUNC         3
-#define PCIB_BUS_DEV_FUN            ((0x14 << 3) + 4)    // P2P in SB700
-#define FCH_PCI_BUS          0
-#define FCH_PCI_DEV          20
-#define FCH_PCI_FUNC         4
-#define USB4_OHCI_BUS_DEV_FUN       ((0x14 << 3) + 5)    // PORT FL0 - FL1
-#define FCH_OHCI4_BUS        0
-#define FCH_OHCI4_DEV        20
-#define FCH_OHCI4_FUNC       5
-//Gigabyte Ethernet Controller
-#define GEC_BUS_DEV_FUN             ((0x14 << 3) + 6)
-#define FCH_GBEC_BUS         0
-#define FCH_GBEC_DEV         20
-#define FCH_GBEC_FUNC        6
-
-#define SD_BUS_DEV_FUN            ((0x14 << 3) + 7)      // SD Controller
-#define SD_PCI_BUS          0
-#define SD_PCI_DEV          20
-#define SD_PCI_FUNC         7
-
-
-#define FCH_GPP_BUS          0
-#define FCH_GPP_DEV          21
-#define FCH_GPP_FUNC         0
-#define GPP0_BUS_DEV_FUN            ((0x15 << 3) + 0)    // GPP P2P bridge PORT0
-#define GPP1_BUS_DEV_FUN            ((0x15 << 3) + 1)    // GPP P2P bridge PORT1
-#define GPP2_BUS_DEV_FUN            ((0x15 << 3) + 2)    // GPP P2P bridge PORT2
-#define GPP3_BUS_DEV_FUN            ((0x15 << 3) + 3)    // GPP P2P bridge PORT3
-
-#define ACPI_MMIO_BASE  0xFED80000ul
-#define FCH_CFG_BASE     0x000   // DWORD
-#define GPIO_BASE       0x100   // BYTE
-#define SMI_BASE        0x200   // DWORD
-#define PMIO_BASE       0x300   // DWORD
-#define PMIO2_BASE      0x400   // BYTE
-#define BIOS_RAM_BASE   0x500   // BYTE
-#define CMOS_RAM_BASE   0x600   // BYTE
-#define CMOS_BASE       0x700   // BYTE
-#define ASF_BASE        0x900   // DWORD
-#define SMBUS_BASE      0xA00   // DWORD
-#define WATCHDOG_BASE   0xB00   //
-#define HPET_BASE       0xC00   // DWORD
-#define IOMUX_BASE      0xD00   // BYTE
-#define MISC_BASE       0xE00
-#define SERIAL_DEBUG_BASE  0x1000
-#define GFX_DAC_BASE       0x1400
-#define GPIO_BANK0_BASE    0x1500   // DWORD
-//#define GPIO_BANK1_BASE    0x1600   // DWORD
-//#define GPIO_BANK2_BASE    0x1700   // DWORD
-#define CEC_BASE           0x1800
-#define XHCI_BASE          0x1C00
-#define ACDC_BASE          0x1D00
-#define AOAC_BASE          0x1E00
-
-
-// Chip type definition
-#define CHIPTYPE_HUDSON2         (1 << 0)
-#define CHIPTYPE_YUBA            (1 << 1)
-
-//
-// ROM SIG type definition
-//
-#define NUM_OF_ROMSIG_FILED      0x04
-#define XHCI_FILED_NUM           0x03
-#define ROMSIG_CFG_MASK          0x07
-#define XHCI_BOOT_RAM_OFFSET     0x8000
-#define INSTRUCTION_RAM_SIG      0x55AA
-#define ROMSIG_SIG               0x55AA55AAul
-
-// RegSpace field (AB_INDEX[31:29]
-#define AXINDC         0               // AXINDC
-#define AXINDP         2               // AXINDP
-#define ABCFG          6               // ABCFG
-#define AXCFG          4               // AXCFG
-#define RCINDXC        1               // PCIEIND
-#define RCINDXP        3               // PCIEIND_P
-
-#define GPP_DEV_NUM    21              //
-#define MAX_GPP_PORTS  4
-
-#define PCIE_FORCE_GEN1_EFUSE_LOCATION     0x14    // EFUSE bit 160
-//
-// ABCFG Registers
-//
-#define FCH_ABCFG_REG00     0x00  // VENDOR ID
-#define FCH_ABCFG_REG08     0x08  // REVISION ID
-#define FCH_ABCFG_REG40     0x40  // BL_EVENTCNT0LO
-#define FCH_ABCFG_REG44     0x44  // BL_EVENTCNT1LO
-#define FCH_ABCFG_REG48     0x48  // BL_EVENTCNTSEL
-#define FCH_ABCFG_REG4A     0x4A  // BL_EVENTCNT0HI
-#define FCH_ABCFG_REG4B     0x4B  // BL_EVENTCNT1HI
-#define FCH_ABCFG_REG4C     0x4C  // BL_EVENTCNTCTL
-#define FCH_ABCFG_REG50     0x50  // MISCCTL_50
-#define FCH_ABCFG_REG54     0x54  // MISCCTL_54
-#define FCH_ABCFG_REG58     0x58  // BL RAB CONTROL
-
-#define FCH_ABCFG_REG60     0x60  // LINKWIDTH_CTL
-#define FCH_ABCFG_REG64     0x64  // LINKWIDTH_UP_INTERVAL
-#define FCH_ABCFG_REG68     0x68  // LINKWIDTH_DN_INVERVAL
-#define FCH_ABCFG_REG6C     0x6C  // LINKWIDTH_UPSTREAM_DWORDS
-#define FCH_ABCFG_REG70     0x70  // LINKWIDTH_DOWNSTREAM_DWORDS
-#define FCH_ABCFG_REG74     0x74  // LINKWIDTH_THRESHOLD_INCREASE
-#define FCH_ABCFG_REG78     0x78  // LINKWIDTH_THRESHOLD_DECREASE
-
-#define FCH_ABCFG_REG80     0x80  // BL DMA PREFETCH CONTROL
-#define FCH_ABCFG_REG88     0x88  //
-#define FCH_ABCFG_REG8C     0x8C  //
-#define FCH_ABCFG_REG90     0x90  // BIF CONTROL 0
-#define FCH_ABCFG_REG94     0x94  // MSI CONTROL
-#define FCH_ABCFG_REG98     0x98  // BIF CONTROL 1
-#define FCH_ABCFG_REG9C     0x9C  // MISCCTL_9C
-#define FCH_ABCFG_REGA0     0xA0  // BIF PHY CONTROL ENABLE
-#define FCH_ABCFG_REGA4     0xA4  // BIF PHY CONTROL A4
-#define FCH_ABCFG_REGA8     0xA8  // BIF PHY CONTROL A8
-#define FCH_ABCFG_REGB0     0xB0  // HYPERFLASH-PCIE PORT MAPPING
-#define FCH_ABCFG_REGB8     0xB8  //
-#define FCH_ABCFG_REGB4     0xB4  //
-#define FCH_ABCFG_REGBC     0xBC  //
-#define FCH_ABCFG_REGC0     0xC0  // PCIE_GPP_ENABLE
-#define FCH_ABCFG_REGC4     0xC4  // PCIE_P2P_INT_MAP
-#define FCH_ABCFG_REGD0     0xD0  // MCTP_VDM_TX_FIFO_DATA
-#define FCH_ABCFG_REGD4     0xD4  // MCTP_VMD_TX_CONTROL
-#define FCH_ABCFG_REGE0     0xE0  // MCTP_VDM_RX_FIFO_DATA
-#define FCH_ABCFG_REGE4     0xE4  // MCTP_VDM_RX_FIFO_STATUS
-#define FCH_ABCFG_REGEC     0xEC  // MCTP_VDM_CONTROL
-#define FCH_ABCFG_REGF0     0xF0  // GPP_UPSTREAM_CONTROL
-#define FCH_ABCFG_REGF4     0xF4  // GPP_SYSTEM_ERROR_CONTROL
-#define FCH_ABCFG_REGFC     0xFC  // FCH_TRAP_CONTROL
-#define FCH_ABCFG_REG100    0x100 // FCH_TRAP0_ADDRL
-#define FCH_ABCFG_REG104    0x104 // FCH_TRAP0_ADDRH
-#define FCH_ABCFG_REG108    0x108 // FCH_TRAP0_CMD
-#define FCH_ABCFG_REG10C    0x10C // FCH_TRAP1_DATA
-#define FCH_ABCFG_REG110    0x110 // FCH_TRAP1_ADDRL
-#define FCH_ABCFG_REG114    0x114 // FCH_TRAP1_ADDRH
-#define FCH_ABCFG_REG118    0x118 // FCH_TRAP1_CMD
-#define FCH_ABCFG_REG11C    0x11C // FCH_TRAP1_DATA
-#define FCH_ABCFG_REG120    0x120 // FCH_TRAP2_ADDRL
-#define FCH_ABCFG_REG124    0x124 // FCH_TRAP2_ADDRH
-#define FCH_ABCFG_REG128    0x128 // FCH_TRAP2_CMD
-#define FCH_ABCFG_REG12C    0x12C // FCH_TRAP2_DATA
-#define FCH_ABCFG_REG130    0x130 // FCH_TRAP3_ADDRL
-#define FCH_ABCFG_REG134    0x134 // FCH_TRAP3_ADDRH
-#define FCH_ABCFG_REG138    0x138 // FCH_TRAP3_CMD
-#define FCH_ABCFG_REG13C    0x13C // FCH_TRAP3_DATA
-#define FCH_ABCFG_REG208    0x208 // KR New
-#define FCH_ABCFG_REG300    0x300 // MCTP_VDM_RX_SMI_CONTROL
-#define FCH_ABCFG_REG310    0x310 // BIF_GPP_STRAP_SYSTEM_0
-#define FCH_ABCFG_REG314    0x314 // BIF_GPP_STRAP_SYSTEM_1
-#define FCH_ABCFG_REG31C    0x31C // BIF_GPP_STRAP_LINK_CONTROL_0
-#define FCH_ABCFG_REG320    0x320 // BIF_GPP_STRAP_LINK_CONTROL_LANE_A
-#define FCH_ABCFG_REG324    0x324 // BIF_GPP_STRAP_LINK_CONTROL_LANE_B
-#define FCH_ABCFG_REG328    0x328 // BIF_GPP_STRAP_LINK_CONTROL_LANE_C
-#define FCH_ABCFG_REG32C    0x32C // BIF_GPP_STRAP_LINK_CONTROL_LANE_D
-#define FCH_ABCFG_REG330    0x330 // BIF_GPP_STRAP_BIF_0
-#define FCH_ABCFG_REG334    0x334 // BIF_GPP_STRAP_BIF_1
-#define FCH_ABCFG_REG338    0x338 // BIF_GPP_STRAP_BIF_2
-#define FCH_ABCFG_REG340    0x340 // BIF_GPP_STRAP_BIF_LANE_A
-#define FCH_ABCFG_REG344    0x344 // BIF_GPP_STRAP_BIF_LANE_B
-#define FCH_ABCFG_REG348    0x348 // BIF_GPP_STRAP_BIF_LANE_C
-#define FCH_ABCFG_REG34C    0x34C // BIF_GPP_STRAP_BIF_LANE_D
-#define FCH_ABCFG_REG350    0x350 // BIF_GPP_STRAP_PHY_LOGICAL _0
-#define FCH_ABCFG_REG354    0x354 // BIF_GPP_STRAP_PHY_LOGICAL _1
-#define FCH_ABCFG_REG404    0x404 // GPP0_SHADOW_COMMAND
-#define FCH_ABCFG_REG418    0x418 // GPP0_SHADOW_BUS_NUMBER
-#define FCH_ABCFG_REG41C    0x41C // GPP0_SHADOW_IO_LIMIT_BASE
-#define FCH_ABCFG_REG420    0x420 // GPP0_SHADOW_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG424    0x424 // GPP0_SHADOW_PREF_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG428    0x428 // GPP0_SHADOW_PREF_MEM_BASE_UPPER
-#define FCH_ABCFG_REG42C    0x42C // GPP0_SHADOW_PREF_MEM_LIMIT_UPPER
-#define FCH_ABCFG_REG430    0x430 // GPP0_SHADOW_IO_LIMIT_BASE_UPPER
-#define FCH_ABCFG_REG43C    0x43C // GPP0_SHADOW_BRIDGE_CONTROL
-#define FCH_ABCFG_REG444    0x444 // GPP1_SHADOW_COMMAND
-#define FCH_ABCFG_REG458    0x458 // GPP1_SHADOW_BUS_NUMBER
-#define FCH_ABCFG_REG45C    0x45C // GPP1_SHADOW_IO_LIMIT_BASE
-#define FCH_ABCFG_REG460    0x460 // GPP1_SHADOW_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG464    0x464 // GPP1_SHADOW_PREF_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG468    0x468 // GPP1_SHADOW_PREF_MEM_BASE_UPPER
-#define FCH_ABCFG_REG46C    0x46C // GPP1_SHADOW_PREF_MEM_LIMIT_UPPER
-#define FCH_ABCFG_REG470    0x470 // GPP1_SHADOW_IO_LIMIT_BASE_UPPER
-#define FCH_ABCFG_REG47C    0x47C // GPP1_SHADOW_BRIDGE_CONTROL
-#define FCH_ABCFG_REG484    0x484 // GPP2_SHADOW_COMMAND
-#define FCH_ABCFG_REG498    0x498 // GPP2_SHADOW_BUS_NUMBER
-#define FCH_ABCFG_REG49C    0x49C // GPP2_SHADOW_IO_LIMIT_BASE
-#define FCH_ABCFG_REG4A0    0x4A0 // GPP2_SHADOW_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG4A4    0x4A4 // GPP2_SHADOW_PREF_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG4A8    0x4A8 // GPP2_SHADOW_PREF_MEM_BASE_UPPER
-#define FCH_ABCFG_REG4AC    0x4AC // GPP2_SHADOW_PREF_MEM_LIMIT_UPPER
-#define FCH_ABCFG_REG4B0    0x4B0 // GPP2_SHADOW_IO_LIMIT_BASE_UPPER
-#define FCH_ABCFG_REG4BC    0x4BC // GPP2_SHADOW_BRIDGE_CONTROL
-#define FCH_ABCFG_REG4C4    0x4C4 // GPP3_SHADOW_COMMAND
-#define FCH_ABCFG_REG4D8    0x4D8 // GPP3_SHADOW_BUS_NUMBER
-#define FCH_ABCFG_REG4DC    0x4DC // GPP3_SHADOW_IO_LIMIT_BASE
-#define FCH_ABCFG_REG4E0    0x4E0 // GPP3_SHADOW_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG4E4    0x4E4 // GPP3_SHADOW_PREF_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG4E8    0x4E8 // GPP3_SHADOW_PREF_MEM_BASE_UPPER
-#define FCH_ABCFG_REG4EC    0x4EC // GPP3_SHADOW_PREF_MEM_LIMIT_UPPER
-#define FCH_ABCFG_REG4F0    0x4F0 // GPP3_SHADOW_IO_LIMIT_BASE_UPPER
-#define FCH_ABCFG_REG4FC    0x4FC // GPP3_SHADOW_BRIDGE_CONTROL
-#define FCH_ABCFG_REG10040  0x10040ul  // AL_EVENTCNT0LO
-#define FCH_ABCFG_REG10044  0x10044ul  // AL_EVENTCNT1LO
-#define FCH_ABCFG_REG10048  0x10048ul  // AL_EVENTCNTSEL
-#define FCH_ABCFG_REG1004A  0x1004Aul  // AL_EVENTCNT0HI
-#define FCH_ABCFG_REG1004B  0x1004Bul  // AL_EVENTCNT1HI
-#define FCH_ABCFG_REG1004C  0x1004Cul  // AL_EVENTCNTCTL
-#define FCH_ABCFG_REG10050  0x10050ul  // MISCCTL_10050
-#define FCH_ABCFG_REG10054  0x10054ul  // AL_ARB_CTL
-#define FCH_ABCFG_REG10056  0x10056ul  // AL_CLK_CTL
-#define FCH_ABCFG_REG10058  0x10058ul  // AL RAB CONTROL
-#define FCH_ABCFG_REG1005C  0x1005Cul  // AL MLT CONTROL
-#define FCH_ABCFG_REG10060  0x10060ul  // AL DMA PREFETCH ENABLE
-#define FCH_ABCFG_REG10064  0x10064ul  // AL DMA PREFETCH FLUSH CONTROL
-#define FCH_ABCFG_REG10068  0x10068ul  // AL PREFETCH LIMIT
-#define FCH_ABCFG_REG1006C  0x1006Cul  // AL DMA PREFETCH CONTROL
-#define FCH_ABCFG_REG10070  0x10070ul  // MISCCTL_10070
-#define FCH_ABCFG_REG10080  0x10080ul  // CLKMUXSTATUS
-#define FCH_ABCFG_REG10090  0x10090ul  // BIF CONTROL 0
-#define FCH_ABCFG_REG1009C  0x1009Cul  // MISCCTL_1009C
-
-//
-// RCINDX_P Registers
-//
-#define FCH_RCINDXP_REG01   0x01 | RCINDXP << 29 // PCIEP_SCRATCH
-#define FCH_RCINDXP_REG02   0x02 | RCINDXP << 29 //
-#define FCH_RCINDXP_REG10   0x10 | RCINDXP << 29 //
-#define FCH_RCINDXP_REG20   0x20 | RCINDXP << 29 // PCIE_TX_CNTL
-#define FCH_RCINDXP_REG21   0x21 | RCINDXP << 29 // PCIE_TX_REQUESTER_ID
-#define FCH_RCINDXP_REG50   0x50 | RCINDXP << 29 // PCIE_P_PORT_LANE_STATUS
-#define FCH_RCINDXP_REG6A   0x6A | RCINDXP << 29 //
-#define FCH_RCINDXP_REG70   0x70 | RCINDXP << 29 // PCIE_RX_CNTL
-#define FCH_RCINDXP_REGA0   0xA0 | RCINDXP << 29 // PCIE_LC_CNTL
-#define FCH_RCINDXP_REGA1   0xA1 | RCINDXP << 29 // PCIE_LC_TRAINING_CNTL
-#define FCH_RCINDXP_REGA2   0xA2 | RCINDXP << 29 //
-#define FCH_RCINDXP_REGA4   0xA4 | RCINDXP << 29 //
-#define FCH_RCINDXP_REGA5   0xA5 | RCINDXP << 29 // PCIE_LC_STATE0
-#define FCH_RCINDXP_REGC0   0xC0 | RCINDXP << 29 //
-
-//
-// RCINDX_C Registers
-//
-#define FCH_RCINDXC_REG02   0x02 | RCINDXC << 29  // PCIE_HW_DEBUG
-#define FCH_RCINDXC_REG10   0x10 | RCINDXC << 29  // PCIE_CNTL
-#define FCH_RCINDXC_REG40   0x40 | RCINDXC << 29  // PCIE_P_CNTL
-#define FCH_RCINDXC_REG65   0x65 | RCINDXC << 29  // PCIE_P_PAD_FORCE_DIS
-#define FCH_RCINDXC_REGC0   0xC0 | RCINDXC << 29  // PCIE_STRAP_MISC
-#define FCH_RCINDXC_REGC1   0xC1 | RCINDXC << 29  // PCIE_STRAP_MISC2
-
-
-//
-// AXINDC Registers
-//
-#define FCH_AX_INDXC_REG02  0x02 // PCIEP_HW_DEBUG
-#define FCH_AX_INDXC_REG10  0x10
-#define FCH_AX_INDXC_REG30  0x30
-#define FCH_AX_DATAC_REG34  0x34
-#define FCH_AX_INDXP_REG38  0x38
-#define FCH_AX_DATAP_REG3C  0x3C
-#define FCH_AX_INDXC_REG40  0x40 | AXINDC << 29
-#define FCH_AX_INDXC_REGA4  0xA4 | AXINDC << 29
-
-#define FCH_AX_INDXP_REG02  0x02 | AXINDP << 29
-#define FCH_AX_INDXP_REGA0  0xA0 | AXINDP << 29
-#define FCH_AX_INDXP_REGA4  0xA4 | AXINDP << 29
-#define FCH_AX_INDXP_REGB1  0xB1 | AXINDP << 29
-
-#define FCH_AX_CFG_REG68  0x68 | AXCFG << 29
-#define FCH_AX_CFG_REG88  0x88 | AXCFG << 29
-
-#define FCH_AB_REG04         0x04
-#define FCH_AB_REG40         0x40
-
-//Sata Port Configuration
-#define SIX_PORTS       0
-#define FOUR_PORTS      1
-
-#define SATA_EFUSE_LOCATION     0x10    // EFUSE bit 133
-#define SATA_DH_EFUSE_LOCATION  0x11    // EFUSE bit 138
-#define SATA_FIS_BASE_EFUSE_LOC 0x15    // EFUSE bit 169
-#define SATA_EFUSE_BIT          0x20    //
-#define SATA_DH_EFUSE_BIT       0x04    //
-#define FCH_SATA_REG00           0x000   // Vendor ID - R- 16 bits
-#define FCH_SATA_REG02           0x002   // Device ID - RW -16 bits
-#define FCH_SATA_REG04           0x004   // PCI Command - RW - 16 bits
-#define FCH_SATA_REG06           0x006   // PCI Status - RW - 16 bits
-#define FCH_SATA_REG08           0x008   // Revision ID/PCI Class Code - R - 32 bits - Offset: 08
-#define FCH_SATA_REG0C           0x00C   // Cache Line Size - R/W - 8bits
-#define FCH_SATA_REG0D           0x00D   // Latency Timer - RW - 8 bits
-#define FCH_SATA_REG0E           0x00E   // Header Type - R - 8 bits
-#define FCH_SATA_REG0F           0x00F   // BIST - R - 8 bits
-#define FCH_SATA_REG10           0x010   // Base Address Register 0 - RW - 32 bits
-#define FCH_SATA_REG14           0x014   // Base Address Register 1 - RW- 32 bits
-#define FCH_SATA_REG18           0x018   // Base Address Register 2 - RW - 32 bits
-#define FCH_SATA_REG1C           0x01C   // Base Address Register 3 - RW - 32 bits
-#define FCH_SATA_REG20           0x020   // Base Address Register 4 - RW - 32 bits
-#define FCH_SATA_REG24           0x024   // Base Address Register 5 - RW - 32 bits
-#define FCH_SATA_REG2C           0x02C   // Subsystem Vendor ID - R - 16 bits
-#define FCH_SATA_REG2D           0x02D   // Subsystem ID - R - 16 bits
-#define FCH_SATA_REG30           0x030   // Expansion ROM Base Address - 32 bits
-#define FCH_SATA_REG34           0x034   // Capabilities Pointer - R - 32 bits
-#define FCH_SATA_REG3C           0x03C   // Interrupt Line - RW - 8 bits
-#define FCH_SATA_REG3D           0x03D   // Interrupt Pin - R - 8 bits
-#define FCH_SATA_REG3E           0x03E   // Min Grant - R - 8 bits
-#define FCH_SATA_REG3F           0x03F   // Max Latency - R - 8 bits
-#define FCH_SATA_REG40           0x040   // Configuration - RW - 32 bits
-#define FCH_SATA_REG44           0x044   // Software Data Register - RW - 32 bits
-#define FCH_SATA_REG48           0x048
-#define FCH_SATA_REG4C           0x04C
-#define FCH_SATA_REG50           0x050   // Message Capability - R - 16 bits
-#define FCH_SATA_REG52           0x052   // Message Control - R/W - 16 bits
-#define FCH_SATA_REG54           0x054   // Message Address - R/W - 32 bits
-#define FCH_SATA_REG58           0x058   // Message Data - R/W - 16 bits
-#define FCH_SATA_REG5C           0x05C   // RAMBIST Control Register - R/W - 8 bits
-#define FCH_SATA_REG5D           0x05D   // RAMBIST Status0 Register - R - 8 bits
-#define FCH_SATA_REG5E           0x05E   // RAMBIST Status1 Register - R - 8 bits
-#define FCH_SATA_REG60           0x060   // Power Management Capabilities - R - 32 bits
-#define FCH_SATA_REG64           0x064   // Power Management Control + Status - RW - 32 bits
-#define FCH_SATA_REG68           0x068   // MSI Program - R/W - 8 bits
-#define FCH_SATA_REG69           0x069   // PCI Burst Timer - R/W - 8 bits
-#define FCH_SATA_REG70           0x070   // PCI Bus Master - IDE0 - RW - 32 bits
-#define FCH_SATA_REG74           0x074   // PRD Table Address - IDE0 - RW - 32 bits
-#define FCH_SATA_REG78           0x078   // PCI Bus Master - IDE1 - RW - 32 bits
-#define FCH_SATA_REG7C           0x07C   // PRD Table Address - IDE1 - RW - 32 bits
-#define FCH_SATA_REG80           0x080   // Data Transfer Mode - IDE0 - RW - 32 bits
-#define FCH_SATA_REG84           0x084   // Data Transfer Mode - IDE1 - RW - 32 bits
-#define FCH_SATA_REG86           0x086   // PY Global Control
-#define FCH_SATA_REG87           0x087
-#define FCH_SATA_REG88           0x088   // PHY Port0 Control - Port0 PY fine tune (0:23)
-#define FCH_SATA_REG8A           0x08A
-#define FCH_SATA_REG8C           0x08C   // PHY Port1 Control - Port0 PY fine tune (0:23)
-#define FCH_SATA_REG8E           0x08E
-#define FCH_SATA_REG90           0x090   // PHY Port2 Control - Port0 PY fine tune (0:23)
-#define FCH_SATA_REG92           0x092
-#define FCH_SATA_REG94           0x094   // PHY Port3 Control - Port0 PY fine tune (0:23)
-#define FCH_SATA_REG96           0x096
-#define FCH_SATA_REG98           0x098   // EEPROM Memory Address - Command + Status - RW - 32 bits
-#define FCH_SATA_REG9C           0x09C   // EEPROM Memory Data - RW - 32 bits
-#define FCH_SATA_REGA0           0x0A0   //
-#define FCH_SATA_REGA4           0x0A4   //
-#define FCH_SATA_REGA5           0x0A5   //;
-#define FCH_SATA_REGA8           0x0A8   //
-#define FCH_SATA_REGAD           0x0AD   //;
-#define FCH_SATA_REGB0           0x0B0   // IDE1 Task File Configuration + Status - RW - 32 bits
-#define FCH_SATA_REGB5           0x0B5   //;
-#define FCH_SATA_REGBD           0x0BD   //;
-#define FCH_SATA_REGC0           0x0C0   // BA5 Indirect Address - RW - 32 bits
-#define FCH_SATA_REGC4           0x0C4   // BA5 Indirect Access - RW - 32 bits
-
-#define FCH_SATA_BAR5_REG00      0x000   // PCI Bus Master - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG04      0x004   // PRD Table Address - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG08      0x008   // PCI Bus Master - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG0C      0x00C   // PRD Table Address - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG10      0x010   // PCI Bus Master2 - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG1C      0x01C
-#define FCH_SATA_BAR5_REG18      0x018   // PCI Bus Master2 - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG20      0x020   // PRD Address - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG24      0x024   // PCI Bus Master Byte Count - IDE0- RW - 32 bits
-#define FCH_SATA_BAR5_REG28      0x028   // PRD Address - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG2C      0x02C   // PCI Bus Master Byte Count - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG40      0x040   // FIFO Valid Byte Count and Control - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG44      0x044   // FIFO Valid Byte Count and Control - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG48      0x048   // System Configuration Status - Command - RW - 32 bits
-#define FCH_SATA_BAR5_REG4C      0x04C   // System Software Data Register - RW - 32 bits
-#define FCH_SATA_BAR5_REG50      0x050   // FLAS Memory Address - Command + Status - RW - 32 bits
-#define FCH_SATA_BAR5_REG54      0x054   // FLAS Memory Data - RW - 32 bits
-#define FCH_SATA_BAR5_REG58      0x058   // EEPROM Memory Address - Command + Status - RW - 32 bits
-#define FCH_SATA_BAR5_REG5C      0x05C   // EEPROM Memory Data - RW - 32 bits
-#define FCH_SATA_BAR5_REG60      0x060   // FIFO Port - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG68      0x068   // FIFO Pointers1- IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG6C      0x06C   // FIFO Pointers2- IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG70      0x070   // FIFO Port - IDE1- RW - 32 bits
-#define FCH_SATA_BAR5_REG78      0x078   // FIFO Pointers1- IDE1- RW - 32 bits
-#define FCH_SATA_BAR5_REG7C      0x07C   // FIFO Pointers2- IDE1- RW - 32 bits
-#define FCH_SATA_BAR5_REG80      0x080   // IDE0 Task File Register 0- RW - 32 bits
-#define FCH_SATA_BAR5_REG84      0x084   // IDE0 Task File Register 1- RW - 32 bits
-#define FCH_SATA_BAR5_REG88      0x088   // IDE0 Task File Register 2- RW - 32 bits
-#define FCH_SATA_BAR5_REG8C      0x08C   // IDE0 Read Data - RW - 32 bits
-#define FCH_SATA_BAR5_REG90      0x090   // IDE0 Task File Register 0 - Command Buffering - RW - 32 bits
-#define FCH_SATA_BAR5_REG94      0x094   // IDE0 Task File Register 1 - Command Buffering - RW - 32 bits
-#define FCH_SATA_BAR5_REG9C      0x09C   // IDE0 Virtual DMA/PIO Read Byte Count - RW - 32 bits
-#define FCH_SATA_BAR5_REGA0      0x0A0   // IDE0 Task File Configuration + Status - RW - 32 bits
-#define FCH_SATA_BAR5_REGB4      0x0B4   // Data Transfer Mode -IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REGC0      0x0C0   // IDE1 Task File Register 0 - RW - 32 bits
-#define FCH_SATA_BAR5_REGC4      0x0C4   // IDE1 Task File Register 1 - RW - 32 bits
-#define FCH_SATA_BAR5_REGC8      0x0C8   // IDE1 Task File Register 2 - RW - 32 bits
-#define FCH_SATA_BAR5_REGCC      0x0CC   //  Read/Write Data - RW - 32 bits
-#define FCH_SATA_BAR5_REGD0      0x0D0   // IDE1 Task File Register 0 - Command Buffering - RW - 32 bits
-#define FCH_SATA_BAR5_REGD4      0x0D4   // IDE1 Task File Register 1 - Command Buffering - RW - 32 bits
-#define FCH_SATA_BAR5_REGDC      0x0DC   // IDE1 Virtual DMA/PIO Read Byte Count - RW - 32 bits
-#define FCH_SATA_BAR5_REGE0      0x0E0   // IDE1 Task File Configuration + Status - RW - 32 bits
-#define FCH_SATA_BAR5_REGF4      0x0F4   // Data Transfer Mode - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REGF8      0x0F8   // PORT Configuration
-#define FCH_SATA_BAR5_REGFC      0x0FC
-#define FCH_SATA_BAR5_REG100     0x0100  // Serial ATA SControl - RW - 32 bits - [Offset: 100h (channel 1) / 180
-#define FCH_SATA_BAR5_REG104     0x0104  // Serial ATA Sstatus - RW - 32 bits - [Offset: 104h (channel 1) / 184h (cannel
-#define FCH_SATA_BAR5_REG108     0x0108  // Serial ATA Serror - RW - 32 bits - [Offset: 108h (channel 1) / 188h (cannel
-#define FCH_SATA_BAR5_REG10C     0x010C  // Serial ATA Sdevice - RW - 32 bits - [Offset: 10Ch (channel 1) / 18Ch (cannel
-#define FCH_SATA_BAR5_REG144     0x0144  // Serial ATA PY Configuration - RW - 32 bits
-#define FCH_SATA_BAR5_REG148     0x0148  // SIEN - RW - 32 bits - [Offset: 148 (channel 1) / 1C8 (cannel 2)]
-#define FCH_SATA_BAR5_REG14C     0x014C  // SFISCfg - RW - 32 bits - [Offset: 14C (channel 1) / 1CC (cannel 2)]
-#define FCH_SATA_BAR5_REG120     0x0120  //
-#define FCH_SATA_BAR5_REG128     0x0128  // Port Serial ATA Status
-#define FCH_SATA_BAR5_REG12C     0x012C  // Port Serial ATA Control
-#define FCH_SATA_BAR5_REG130     0x0130
-#define FCH_SATA_BAR5_REG1B0     0x01B0
-#define FCH_SATA_BAR5_REG230     0x0230
-#define FCH_SATA_BAR5_REG2B0     0x02B0
-#define FCH_SATA_BAR5_REG330     0x0330
-#define FCH_SATA_BAR5_REG3B0     0x03B0
-#define FCH_SATA_BAR5_REG430     0x0430
-#define FCH_SATA_BAR5_REG4B0     0x04B0
-
-
-// USB ports
-#define NUM_USB1_PORTS           5
-#define NUM_USB2_PORTS           5
-#define NUM_USB3_PORTS           4
-#define NUM_USB4_PORTS           2
-#define NUM_XHC0_PORTS           2
-#define NUM_XHC1_PORTS           2
-
-
-//
-//  USB OHCI Device 0x7807
-//  Device 18 (0x11)/Device 19 (0x12)/Device 22 (0x16) Func 0
-//  Device 20 (0x14) Func 5 (FL) 0x7809
-//
-#define FCH_OHCI_REG00           0x00        // Device/Vendor ID - R (0x43971002ul)
-#define FCH_OHCI_REG04           0x04        // Command - RW
-#define FCH_OHCI_REG06           0x06        // Status - R
-#define FCH_OHCI_REG08           0x08        // Revision ID/Class Code - R
-#define FCH_OHCI_REG0C           0x0C        // Miscellaneous - RW
-#define FCH_OHCI_REG10           0x10        // Bar_OCI - RW
-#define FCH_OHCI_REG2C           0x2C        // Subsystem Vendor ID/ Subsystem ID - RW
-#define FCH_OHCI_REG34           0x34        // Capability Pointer - R
-#define FCH_OHCI_REG3C           0x3C        // Interrupt Line - RW
-#define FCH_OHCI_REG3D           0x3D        // Interrupt Line - RW
-#define FCH_OHCI_REG40           0x40        // Config Timers - RW
-#define FCH_OHCI_REG42           0x42        // Port Disable Control - RW (800)
-#define FCH_OHCI_REG46           0x46        // USB PHY Battery Charger - RW (800)
-#define FCH_OHCI_REG48           0x48        // Port Force Reset - RW (800)
-#define FCH_OHCI_REG4C           0x4C        // MSI - RW   (800)
-#define FCH_OHCI_REG50           0x50        // Misc Control - RW
-#define FCH_OHCI_REG51           0x51
-#define FCH_OHCI_REG52           0x52
-#define FCH_OHCI_REG58           0x58        // Over Current Control - RW
-#define FCH_OHCI_REG5C           0x5C        // Over Current Control - RW
-#define FCH_OHCI_REG60           0x60        // Serial Bus Release Number - RW
-#define FCH_OHCI_REG68           0x68        // Over Current PME Enable - RW
-#define FCH_OHCI_REG74           0x74        // Target Timeout Control - RW
-#define FCH_OHCI_REG80           0x80        //
-#define FCH_OHCI_REGD0           0x0D0       // MSI Control - RW
-#define FCH_OHCI_REGD4           0x0D4       // MSI Address - RW
-#define FCH_OHCI_REGD8           0x0D8       // MSI Data - RW
-#define FCH_OHCI_REGE4           0x0E4       // HT MSI Support
-#define FCH_OHCI_REGF0           0x0F0       // Function Level Reset Capability
-#define FCH_OHCI_REGF4           0x0F4       // Function Level Reset Control
-
-#define FCH_OHCI_BAR_REG00       0x00        // cRevision - R
-#define FCH_OHCI_BAR_REG04       0x04        // cControl
-#define FCH_OHCI_BAR_REG08       0x08        // cCommandStatus
-#define FCH_OHCI_BAR_REG0C       0x0C        // cInterruptStatus  RW
-#define FCH_OHCI_BAR_REG10       0x10        // cInterruptEnable
-#define FCH_OHCI_BAR_REG14       0x14        // cInterruptDisable
-#define FCH_OHCI_BAR_REG18       0x18        // HcCCA
-#define FCH_OHCI_BAR_REG1C       0x1C        // cPeriodCurrentED
-#define FCH_OHCI_BAR_REG20       0x20        // HcControleadED
-#define FCH_OHCI_BAR_REG24       0x24        // cControlCurrentED  RW
-#define FCH_OHCI_BAR_REG28       0x28        // HcBulkeadED
-#define FCH_OHCI_BAR_REG2C       0x2C        // cBulkCurrentED- RW
-#define FCH_OHCI_BAR_REG30       0x30        // HcDoneead
-#define FCH_OHCI_BAR_REG34       0x34        // cFmInterval
-#define FCH_OHCI_BAR_REG38       0x38        // cFmRemaining
-#define FCH_OHCI_BAR_REG3C       0x3C        // cFmNumber
-#define FCH_OHCI_BAR_REG40       0x40        // cPeriodicStart
-#define FCH_OHCI_BAR_REG44       0x44        // HcLSThresold
-#define FCH_OHCI_BAR_REG48       0x48        // HcRDescriptorA
-#define FCH_OHCI_BAR_REG4C       0x4C        // HcRDescriptorB
-#define FCH_OHCI_BAR_REG50       0x50        // HcRStatus
-#define FCH_OHCI_BAR_REG54       0x54        // HcRhPortStatus (800)
-#define FCH_OHCI_BAR_REG58       0x58        // HcRhPortStatus NPD (800)
-#define FCH_OHCI_BAR_REGF0       0xF0        // OHCI Loop Back feature Support (800)
-
-#define FCH_OHCI_PORTSC_CCS      0x1         // HcRhPortStatus
-#define FCH_OHCI_PORTSC_PES      0x2         // HcRhPortStatus
-#define FCH_OHCI_PORTSC_PSS      0x4         // HcRhPortStatus
-#define FCH_OHCI_PORTSC_PPS      0x100       // HcRhPortStatus
-#define FCH_OHCI_PORTSC_LSDA     0x200       // HcRhPortStatus
-#define FCH_OHCI_PORTSC_PRS      0x10        // HcRhPortStatus
-
-//
-//  USB EHCI Device 0x7808
-//  Device 18 (0x11)/Device 19 (0x12)/Device 22 (0x16) Func 2
-//
-#define FCH_EHCI_REG00           0x00        // DEVICE/VENDOR ID - R
-#define FCH_EHCI_REG04           0x04        // Command - RW
-#define FCH_EHCI_REG06           0x06        // Status - R
-#define FCH_EHCI_REG08           0x08        // Revision ID/Class Code - R
-#define FCH_EHCI_REG0C           0x0C        // Miscellaneous - RW
-#define FCH_EHCI_REG10           0x10        // BAR - RW
-#define FCH_EHCI_REG2C           0x2C        // Subsystem ID/Subsystem Vendor ID - RW
-#define FCH_EHCI_REG34           0x34        // Capability Pointer - R
-#define FCH_EHCI_REG3C           0x3C        // Interrupt Line - RW
-#define FCH_EHCI_REG3D           0x3D        // Interrupt Line - RW
-#define FCH_EHCI_REG40           0x40        // Config Timers - RW
-#define FCH_EHCI_REG4C           0x4C        // MSI - RW
-#define FCH_EHCI_REG50           0x50        // EHCI Misc Control - RW
-#define FCH_EHCI_REG54           0x54        // EHCI Misc Control - RW
-#define FCH_EHCI_REG60           0x60        // SBRN - R
-#define FCH_EHCI_REG61           0x61        // FLADJ - RW
-#define FCH_EHCI_REG62           0x62        // PORTWAKECAP - RW
-#define FCH_EHCI_REG74           0x74        // EHCI Misc Control2 - RW
-#define FCH_EHCI_REG84           0x84        // HUB Configure 1 - RW
-#define FCH_EHCI_REG88           0x88        // - RW
-#define FCH_EHCI_REG90           0x90        // HUB Configure 4 - RW
-#define FCH_EHCI_REGC0           0x0C0       // PME control - RW (800)
-#define FCH_EHCI_REGC4           0x0C4       // PME Data /Status - RW (800)
-#define FCH_EHCI_REGD0           0x0D0       // MSI Control - RW
-#define FCH_EHCI_REGD4           0x0D4       // MSI Address - RW
-#define FCH_EHCI_REGD8           0x0D8       // MSI Data - RW
-#define FCH_EHCI_REGE4           0x0E4       // EHCI Debug Port Support - RW (800)
-#define FCH_EHCI_REGF0           0x0F0       // Function Level Reset Capability - R (800)
-#define FCH_EHCI_REGF4           0x0F4       // Function Level Reset Capability - R (800)
-
-#define FCH_EHCI_BAR_REG00       0x00        // CAPLENGT - R
-#define FCH_EHCI_BAR_REG02       0x002       // CIVERSION- R
-#define FCH_EHCI_BAR_REG04       0x004       // CSPARAMS - R
-#define FCH_EHCI_BAR_REG08       0x008       // CCPARAMS - R
-#define FCH_EHCI_BAR_REG0C       0x00C       // CSP-PORTROUTE - R
-
-#define FCH_EHCI_BAR_REG20       0x020       // USBCMD - RW - 32 bits
-#define FCH_EHCI_BAR_REG24       0x024       // USBSTS - RW - 32 bits
-#define FCH_EHCI_BAR_REG28       0x028       // USBINTR -RW - 32 bits
-#define FCH_EHCI_BAR_REG2C       0x02C       // FRINDEX -RW - 32 bits
-#define FCH_EHCI_BAR_REG30       0x030       // CTRLDSSEGMENT -RW - 32 bits
-#define FCH_EHCI_BAR_REG34       0x034       // PERIODICLISTBASE -RW - 32 bits
-#define FCH_EHCI_BAR_REG38       0x038       // ASYNCLISTADDR -RW - 32 bits
-#define FCH_EHCI_BAR_REG60       0x060       // CONFIGFLAG -RW - 32 bits
-#define FCH_EHCI_BAR_REG64       0x064       // PORTSC (1-N_PORTS) -RW - 32 bits
-#define FCH_EHCI_BAR_REGA0       0x0A0       // DebugPort MISC Control - RW - 32 bits (800)
-#define FCH_EHCI_BAR_REGA4       0x0A4       // Packet Buffer Threshold Values - RW - 32 bits
-#define FCH_EHCI_BAR_REGA8       0x0A8       // USB PHY Status 0 - R
-#define FCH_EHCI_BAR_REGAC       0x0AC       // USB PHY Status 1 - R
-#define FCH_EHCI_BAR_REGB0       0x0B0       // USB PHY Status 2 - R
-#define FCH_EHCI_BAR_REGB4       0x0B4       // UTMI Control - RW (800)
-#define FCH_EHCI_BAR_REGB8       0x0B8       // Loopback Test
-#define FCH_EHCI_BAR_REGBC       0x0BC       // EHCI MISC Control
-#define FCH_EHCI_BAR_REGC0       0x0C0       // USB PHY Calibration
-#define FCH_EHCI_BAR_REGC4       0x0C4       // USB Common PHY Control
-#define FCH_EHCI_BAR_REGC8       0x0C8       // EHCI Debug Purpose
-#define FCH_EHCI_BAR_REGCC       0x0CC       // Ehci Spare 1 (800) **
-#define FCH_EHCI_BAR_REGD0       0x0D0
-#define FCH_EHCI_BAR_REGD4       0x0D4
-#define FCH_EHCI_BAR_REG100      0x100       // USB debug port
-
-//
-//  USB XHCI Device 0x7812/0x7814
-//  Device 16 (0x10) Func 0/1
-//
-#define FCH_XHCI_REG00           0x00        // DEVICE/VENDOR ID - R
-#define FCH_XHCI_REG04           0x04        // Command - RW
-#define FCH_XHCI_REG10           0x10        // Bar0
-#define FCH_XHCI_REG2C           0x2C        // Sub System ID
-#define FCH_XHCI_REG40           0x40        // Index0
-#define FCH_XHCI_REG44           0x44        // Data0
-#define FCH_XHCI_REG48           0x48        // Index1
-#define FCH_XHCI_REG4C           0x4C        // Data0
-#define FCH_XHCI_REG54           0x54        // PME Control/Status
-#define XHCI_EFUSE_LOCATION      0x18        // EFUSE bit 192, 193
-
-#define FCH_XHCI_BAR_REG420      0x420       // Port Status and Control
-#define FCH_XHCI_PORTSC_CCS      0x1         // Port Status and Control
-#define FCH_XHCI_PORTSC_PED      0x2         // Port Status and Control
-#define FCH_XHCI_PORTSC_PLS      0x1E0       // Port Status and Control
-#define FCH_XHCI_PORTSC_SPEED    0x3C00      // Port Status and Control
-#define FCH_XHCI_PORTSC_PR       0x10        // Port Status and Control
-
-//
-//  FCH CFG device  0x780B
-//  Device 20 (0x14) Func 0
-//
-#define FCH_CFG_REG00            0x000       // VendorID - R
-#define FCH_CFG_REG02            0x002       // DeviceID - R
-#define FCH_CFG_REG04            0x004       // Command- RW
-#define FCH_CFG_REG05            0x005       // Command- RW
-#define FCH_CFG_REG06            0x006       // STATUS- RW
-#define FCH_CFG_REG08            0x008       // Revision ID/Class Code- R
-#define FCH_CFG_REG0A            0x00A       //
-#define FCH_CFG_REG0B            0x00B       //
-#define FCH_CFG_REG0C            0x00C       // Cache Line Size- R
-#define FCH_CFG_REG0D            0x00D       // Latency Timer- R
-#define FCH_CFG_REG0E            0x00E       // Header Type- R
-#define FCH_CFG_REG0F            0x00F       // BIST- R
-#define FCH_CFG_REG10            0x010       // Base Address 0- R
-#define FCH_CFG_REG11            0x011       //;
-#define FCH_CFG_REG12            0x012       //;
-#define FCH_CFG_REG13            0x013       //;
-#define FCH_CFG_REG14            0x014       // Base Address 1- R
-#define FCH_CFG_REG18            0x018       // Base Address 2- R
-#define FCH_CFG_REG1C            0x01C       // Base Address 3- R
-#define FCH_CFG_REG20            0x020       // Base Address 4- R
-#define FCH_CFG_REG24            0x024       // Base Address 5- R
-#define FCH_CFG_REG28            0x028       // Cardbus CIS Pointer- R
-#define FCH_CFG_REG2C            0x02C       // Subsystem Vendor ID- W
-#define FCH_CFG_REG2E            0x02E       // Subsystem ID- W
-#define FCH_CFG_REG30            0x030       // Expansion ROM Base Address - R
-#define FCH_CFG_REG34            0x034       // Capability Pointer - R  (800) default changed as 0x00
-#define FCH_CFG_REG3C            0x03C       // Interrupt Line - R
-#define FCH_CFG_REG3D            0x03D       // Interrupt Pin - R
-#define FCH_CFG_REG3E            0x03E       // Min_Gnt - R
-#define FCH_CFG_REG3F            0x03F       // Max_Lat - R
-#define FCH_CFG_REG90            0x090       // Smbus Base Address - R
-#define FCH_CFG_REG9C            0x09C       // SBResourceMMIO_BASE
-
-//
-//  FCH SATA IDE device
-//  Device 20 (0x14) Func 1
-//
-
-#define FCH_IDE_REG00            0x00        // Vendor ID
-#define FCH_IDE_REG02            0x02        // Device ID
-#define FCH_IDE_REG04            0x04        // Command
-#define FCH_IDE_REG06            0x06        // Status
-#define FCH_IDE_REG08            0x08        // Revision ID/Class Code
-#define FCH_IDE_REG09            0x09        // Class Code
-#define FCH_IDE_REG2C            0x2C        // Subsystem ID and Subsystem Vendor ID
-#define FCH_IDE_REG40            0x40        // Configuration - RW - 32 bits
-#define FCH_IDE_REG34            0x34
-#define FCH_IDE_REG62            0x62        // IDE Internal Control
-#define FCH_IDE_REG63            0x63        // IDE Internal Control
-//
-//  FCH AZALIA device  0x780D
-//  Device 20 (0x14) Func 2
-//
-#define ATI_AZALIA_ExtBlk_Addr          0x0F8
-#define ATI_AZALIA_ExtBlk_DATA          0x0FC
-
-#define FCH_AZ_REG00             0x00        // Vendor ID - R
-#define FCH_AZ_REG02             0x02        // Device ID - R/W
-#define FCH_AZ_REG04             0x04        // PCI Command
-#define FCH_AZ_REG06             0x06        // PCI Status - R/W
-#define FCH_AZ_REG08             0x08        // Revision ID
-#define FCH_AZ_REG09             0x09        // Programming Interface
-#define FCH_AZ_REG0A             0x0A        // Sub Class Code
-#define FCH_AZ_REG0B             0x0B        // Base Class Code
-#define FCH_AZ_REG0C             0x0C        // Cache Line Size - R/W
-#define FCH_AZ_REG0D             0x0D        // Latency Timer
-#define FCH_AZ_REG0E             0x0E        // Header Type
-#define FCH_AZ_REG0F             0x0F        // BIST
-#define FCH_AZ_REG10             0x10        // Lower Base Address Register
-#define FCH_AZ_REG14             0x14        // Upper Base Address Register
-#define FCH_AZ_REG2C             0x2C        // Subsystem Vendor ID
-#define FCH_AZ_REG2D             0x2D        // Subsystem ID
-#define FCH_AZ_REG34             0x34        // Capabilities Pointer
-#define FCH_AZ_REG3C             0x3C        // Interrupt Line
-#define FCH_AZ_REG3D             0x3D        // Interrupt Pin
-#define FCH_AZ_REG3E             0x3E        // Minimum Grant
-#define FCH_AZ_REG3F             0x3F        // Maximum Latency
-#define FCH_AZ_REG40             0x40        // Misc Control 1
-#define FCH_AZ_REG42             0x42        // Misc Control 2 Register
-#define FCH_AZ_REG43             0x43        // Misc Control 3 Register
-#define FCH_AZ_REG44             0x44        // Interrupt Pin Control Register
-#define FCH_AZ_REG46             0x46        // Debug Control Register
-#define FCH_AZ_REG4C             0x4C
-#define FCH_AZ_REG50             0x50        // Power Management Capability ID
-#define FCH_AZ_REG52             0x52        // Power Management Capabilities
-#define FCH_AZ_REG54             0x54        // Power Management Control/Status
-#define FCH_AZ_REG60             0x60        // MSI Capability ID
-#define FCH_AZ_REG62             0x62        // MSI Message Control
-#define FCH_AZ_REG64             0x64        // MSI Message Lower Address
-#define FCH_AZ_REG68             0x68        // MSI Message Upper Address
-#define FCH_AZ_REG6C             0x6C        // MSI Message Data
-
-#define FCH_AZ_BAR_REG00         0x00        // Global Capabilities - R
-#define FCH_AZ_BAR_REG02         0x02        // Minor Version - R
-#define FCH_AZ_BAR_REG03         0x03        // Major Version - R
-#define FCH_AZ_BAR_REG04         0x04        // Output Payload Capability - R
-#define FCH_AZ_BAR_REG06         0x06        // Input Payload Capability - R
-#define FCH_AZ_BAR_REG08         0x08        // Global Control - R/W
-#define FCH_AZ_BAR_REG0C         0x0C        // Wake Enable - R/W
-#define FCH_AZ_BAR_REG0E         0x0E        // State Change Status - R/W
-#define FCH_AZ_BAR_REG10         0x10        // Global Status - R/W
-#define FCH_AZ_BAR_REG18         0x18        // Output Stream Payload Capability - R
-#define FCH_AZ_BAR_REG1A         0x1A        // Input Stream Payload Capability - R
-#define FCH_AZ_BAR_REG20         0x20        // Interrupt Control - R/W
-#define FCH_AZ_BAR_REG24         0x24        // Interrupt Status - R/W
-#define FCH_AZ_BAR_REG30         0x30        // Wall Clock Counter - R
-#define FCH_AZ_BAR_REG38         0x38        // Stream Synchronization - R/W
-#define FCH_AZ_BAR_REG40         0x40        // CORB Lower Base Address - R/W
-#define FCH_AZ_BAR_REG44         0x44        // CORB Upper Base Address - RW
-#define FCH_AZ_BAR_REG48         0x48        // CORB Write Pointer - R/W
-#define FCH_AZ_BAR_REG4A         0x4A        // CORB Read Pointer - R/W
-#define FCH_AZ_BAR_REG4C         0x4C        // CORB Control - R/W
-#define FCH_AZ_BAR_REG4D         0x4D        // CORB Status - R/W
-#define FCH_AZ_BAR_REG4E         0x4E        // CORB Size - R/W
-#define FCH_AZ_BAR_REG50         0x50        // RIRB Lower Base Address - RW
-#define FCH_AZ_BAR_REG54         0x54        // RIRB Upper Address - RW
-#define FCH_AZ_BAR_REG58         0x58        // RIRB Write Pointer - RW
-#define FCH_AZ_BAR_REG5A         0x5A        // RIRB Response Interrupt Count - R/W
-#define FCH_AZ_BAR_REG5C         0x5C        // RIRB Control - R/W
-#define FCH_AZ_BAR_REG5D         0x5D        // RIRB Status - R/W
-#define FCH_AZ_BAR_REG5E         0x5E        // RIRB Size - R/W
-#define FCH_AZ_BAR_REG60         0x60        // Immediate Command Output Interface - R/W
-#define FCH_AZ_BAR_REG64         0x64        // Immediate Command Input Interface - R/W
-#define FCH_AZ_BAR_REG68         0x68        // Immediate Command Input Interface - R/W
-#define FCH_AZ_BAR_REG70         0x70        // DMA Position Lower Base Address - R/W
-#define FCH_AZ_BAR_REG74         0x74        // DMA Position Upper Base Address - R/W
-#define FCH_AZ_BAR_REG2030       0x2030      // Wall Clock Counter Alias - R
-
-//
-//  FCH LPC Device  0x780E
-//  Device 20 (0x14) Func 3
-//
-#define FCH_LPC_REG00            0x00        // VID- R
-#define FCH_LPC_REG02            0x02        // DID- R
-#define FCH_LPC_REG04            0x04        // CMD- RW
-#define FCH_LPC_REG06            0x06        // STATUS- RW
-#define FCH_LPC_REG08            0x08        // Revision  ID/Class Code - R
-#define FCH_LPC_REG0C            0x0C        // Cache Line Size - R
-#define FCH_LPC_REG0D            0x0D        // Latency Timer - R
-#define FCH_LPC_REG0E            0x0E        // Header Type - R
-#define FCH_LPC_REG0F            0x0F        // BIST- R
-#define FCH_LPC_REG10            0x10        // Base Address Reg 0- RW*
-#define FCH_LPC_REG2C            0x2C        // Subsystem ID & Subsystem Vendor ID - Wo/Ro
-#define FCH_LPC_REG34            0x34        // Capabilities Pointer - Ro
-#define FCH_LPC_REG40            0x40        // PCI Control - RW
-#define FCH_LPC_REG44            0x44        // IO Port Decode Enable Register 1- RW
-#define FCH_LPC_REG45            0x45        // IO Port Decode Enable Register 2- RW
-#define FCH_LPC_REG46            0x46        // IO Port Decode Enable Register 3- RW
-#define FCH_LPC_REG47            0x47        // IO Port Decode Enable Register 4- RW
-#define FCH_LPC_REG48            0x48        // IO/Mem Port Decode Enable Register 5- RW
-#define FCH_LPC_REG49            0x49        // LPC Sync Timeout Count - RW
-#define FCH_LPC_REG4A            0x4A        // IO/Mem Port Decode Enable Register 6- RW
-#define FCH_LPC_REG4C            0x4C        // Memory Range Register - RW
-#define FCH_LPC_REG50            0x50        // Rom Protect 0 - RW
-#define FCH_LPC_REG54            0x54        // Rom Protect 1 - RW
-#define FCH_LPC_REG58            0x58        // Rom Protect 2 - RW
-#define FCH_LPC_REG5C            0x5C        // Rom Protect 3 - RW
-#define FCH_LPC_REG60            0x60        // PCI Memory Start Address of LPC Target Cycles -
-#define FCH_LPC_REG62            0x62        // PCI Memory End Address of LPC Target Cycles -
-#define FCH_LPC_REG64            0x64        // PCI IO base Address of Wide Generic Port - RW
-#define FCH_LPC_REG65            0x65
-#define FCH_LPC_REG66            0x66
-#define FCH_LPC_REG67            0x67
-#define FCH_LPC_REG68            0x68        // LPC ROM Address Range 1 (Start Address) - RW
-#define FCH_LPC_REG69            0x69
-#define FCH_LPC_REG6A            0x6A        // LPC ROM Address Range 1 (End Address) - RW
-#define FCH_LPC_REG6B            0x6B
-#define FCH_LPC_REG6C            0x6C        // LPC ROM Address Range 2 (Start Address)- RW
-#define FCH_LPC_REG6D            0x6D
-#define FCH_LPC_REG6E            0x6E        // LPC ROM Address Range 2 (End Address) - RW
-#define FCH_LPC_REG6F            0x6F
-#define FCH_LPC_REG70            0x70        // Firmware ub Select - RW*
-#define FCH_LPC_REG71            0x71
-#define FCH_LPC_REG72            0x72
-#define FCH_LPC_REG73            0x73
-#define FCH_LPC_REG74            0x74        // Alternative Wide IO Range Enable- W/R
-#define FCH_LPC_REG78            0x78        // Miscellaneous Control Bits- W/R
-#define FCH_LPC_REG7C            0x7C        // TPM (trusted plant form module) reg- W/R
-#define FCH_LPC_REG9C            0x9C
-#define FCH_LPC_REG80            0x80        // MSI Capability Register- R
-#define FCH_LPC_REGA0            0x0A0       // SPI base address
-#define FCH_LPC_REGA1            0x0A1       // SPI base address
-#define FCH_LPC_REGA2            0x0A2       // SPI base address
-#define FCH_LPC_REGA3            0x0A3       // SPI base address
-#define FCH_LPC_REGA4            0x0A4
-#define FCH_LPC_REGB8            0x0B8
-#define FCH_LPC_REGBA            0x0BA       // EcControl
-#define FCH_LPC_REGBB            0x0BB       // HostControl
-#define FCH_LPC_REGC8            0x0C8
-#define FCH_LPC_REGCC            0x0CC       // AutoRomCfg
-#define FCH_LPC_REGD0            0x0D0
-#define FCH_LPC_REGD3            0x0D3
-#define FCH_LPC_REGD4            0x0D4
-
-//
-//  FCH PCIB  0x780F
-//  Device 20 (0x14) Func 4
-//
-#define FCH_PCIB_REG04            0x04       // Command
-#define FCH_PCIB_REG0D            0x0D       // Primary Master Latency Timer
-#define FCH_PCIB_REG1B            0x1B       // Secondary Latency Timer
-#define FCH_PCIB_REG1C            0x1C       // IO Base
-#define FCH_PCIB_REG1D            0x1D       // IO Limit
-#define FCH_PCIB_REG40            0x40       // CPCTRL
-#define FCH_PCIB_REG42            0x42       // CLKCTRL
-#define FCH_PCIB_REG48            0x48       //
-#define FCH_PCIB_REG4A            0x4A       // PCICLK Enable Bits
-#define FCH_PCIB_REG4B            0x4B       // Misc Control
-#define FCH_PCIB_REG4C            0x4C       // AutoClockRun Control
-#define FCH_PCIB_REG50            0x50       // Dual Address Cycle Enable and PCIB_CLK_Stop Override
-#define FCH_PCIB_REG65            0x65       // Misc Control
-#define FCH_PCIB_REG66            0x66       // Misc Control
-//
-//  FCH GEC 0x14E4 0x1699
-//  Device 20 (0x14) Func 6
-//
-#define FCH_GEC_REG10             0x10       // GEC BAR
-
-//
-//  FCH SD
-//  Device 20 (0x14) Func 7
-//
-#define SD_PCI_REG10              0x10
-#define SD_PCI_REG2C              0x2C
-#define SD_PCI_REGA4              0xA4
-#define SD_PCI_REGA8              0xA8
-#define SD_PCI_REGAC              0xAC
-#define SD_PCI_REGB0              0xB0
-#define SD_PCI_REGB8              0xB8
-#define SD_PCI_REGBC              0xBC
-#define SD_PCI_REGD0              0xD0
-#define SD_PCI_REGF0              0xF0
-#define SD_PCI_REGF4              0xF4
-#define SD_PCI_REGF8              0xF8
-#define SD_PCI_REGFC              0xFC
-#define FCH_SD_BAR_REG28          0x28       // SDHC_CTRL1
-#define SD_CARD_PRESENT           BIT0
-#define FCH_SD_BAR_REG2C          0x2C       // SDHC_CTRL2
-#define FCH_SD_FREQUENCY_SLT      BIT2
-#define FCH_SD_BAR_REG3C          0x3C       // SDHC_HOST_CTRL2
-#define FCH_SD_1_8V               BIT3
-
-//
-//  FCH MMIO Base (SMI)
-//    offset : 0x200
-//
-#define FCH_SMI_REG00            0x00         // EventStatus
-#define FCH_SMI_REG04            0x04         // EventEnable
-#define FCH_SMI_REG08            0x08         // SciTrig
-#define FCH_SMI_REG0C            0x0C         // SciLevl
-#define FCH_SMI_REG10            0x10         // SmiSciStatus
-#define FCH_SMI_REG14            0x14         // SmiSciEn
-#define FCH_SMI_REG18            0x18         // ForceSciEn
-#define FCH_SMI_REG1C            0x1C         // SciRwData
-#define FCH_SMI_REG3C            0x3C         // DataErrorStatus
-#define FCH_SMI_REG20            0x20         // SciS0En
-#define FCH_SMI_Gevent0          0x40         // SciMap0
-#define FCH_SMI_Gevent1          0x41         // SciMap1
-#define FCH_SMI_Gevent2          0x42         // SciMap2
-#define FCH_SMI_Gevent3          0x43         // SciMap3
-#define FCH_SMI_Gevent4          0x44         // SciMap4
-#define FCH_SMI_Gevent5          0x45         // SciMap5
-#define FCH_SMI_Gevent6          0x46         // SciMap6
-#define FCH_SMI_Gevent7          0x47         // SciMap7
-#define FCH_SMI_Gevent8          0x48         // SciMap8
-#define FCH_SMI_Gevent9          0x49         // SciMap9
-#define FCH_SMI_Gevent10         0x4A         // SciMap10
-#define FCH_SMI_Gevent11         0x4B         // SciMap11
-#define FCH_SMI_Gevent12         0x4C         // SciMap12
-#define FCH_SMI_Gevent13         0x4D         // SciMap13
-#define FCH_SMI_Gevent14         0x4E         // SciMap14
-#define FCH_SMI_Gevent15         0x4F         // SciMap15
-#define FCH_SMI_Gevent16         0x50         // SciMap16
-#define FCH_SMI_Gevent17         0x51         // SciMap17
-#define FCH_SMI_Gevent18         0x52         // SciMap18
-#define FCH_SMI_Gevent19         0x53         // SciMap19
-#define FCH_SMI_Gevent20         0x54         // SciMap20
-#define FCH_SMI_Gevent21         0x55         // SciMap21
-#define FCH_SMI_Gevent22         0x56         // SciMap22
-#define FCH_SMI_Gevent23         0x57         // SciMap23
-#define FCH_SMI_Usbwakup0        0x58         // SciMap24
-#define FCH_SMI_Usbwakup1        0x59         // SciMap25
-#define FCH_SMI_Usbwakup2        0x5A         // SciMap26
-#define FCH_SMI_Usbwakup3        0x5B         // SciMap27
-#define FCH_SMI_SBGppPme0        0x5C         // SciMap28
-#define FCH_SMI_SBGppPme1        0x5D         // SciMap29
-#define FCH_SMI_SBGppPme2        0x5E         // SciMap30
-#define FCH_SMI_SBGppPme3        0x5F         // SciMap31
-#define FCH_SMI_SBGppHp0         0x60         // SciMap32
-#define FCH_SMI_SBGppHp1         0x61         // SciMap33
-#define FCH_SMI_SBGppHp2         0x62         // SciMap34
-#define FCH_SMI_SBGppHp3         0x63         // SciMap35
-#define FCH_SMI_AzaliaPme        0x64         // SciMap36
-#define FCH_SMI_SataGevent0      0x65         // SciMap37
-#define FCH_SMI_SataGevent1      0x66         // SciMap38
-#define FCH_SMI_GecPme           0x67         // SciMap39
-#define FCH_SMI_IMCGevent0       0x68         // SciMap40
-#define FCH_SMI_IMCGevent1       0x69         // SciMap41
-#define FCH_SMI_CIRPme           0x6A         // SciMap42
-#define FCH_SMI_WakePinGevent    0x6B         // SciMap43
-#define FCH_SMI_FanThGevent      0x6C         // SciMap44    //FanThermalGevent
-#define FCH_SMI_ASFMasterIntr    0x6D         // SciMap45
-#define FCH_SMI_ASFSlaveIntr     0x6E         // SciMap46
-#define FCH_SMI_SMBUS0           0x6F         // SciMap47
-#define FCH_SMI_TWARN            0x70         // SciMap48
-#define FCH_SMI_TMI              0x71         // SciMap49    // TrafficMonitorIntr
-#define FCH_SMI_iLLB             0x72         // SciMap50
-#define FCH_SMI_PowerButton      0x73         // SciMap51
-#define FCH_SMI_ProcHot          0x74         // SciMap52
-#define FCH_SMI_APUHwAssertion   0x75         // SciMap53
-#define FCH_SMI_APUSciAssertion  0x76         // SciMap54
-#define FCH_SMI_RAS              0x77         // SciMap55
-#define FCH_SMI_xHC0Pme          0x78         // SciMap56
-#define FCH_SMI_xHC1Pme          0x79         // SciMap57
-#define FCH_SMI_AcDcWake         0x7A         // SciMap58
-
-// Empty from 0x72-0x7F
-//#Define FCH_SMI_REG7C            0x7F         // SciMap63  ***
-
-#define FCH_SMI_REG80            0x80         //  SmiStatus0
-#define FCH_SMI_REG84            0x84         // SmiStatus1
-#define FCH_SMI_REG88            0x88         // SmiStatus2
-#define FCH_SMI_REG8C            0x8C         // SmiStatus3
-#define FCH_SMI_REG90            0x90         // SmiStatus4
-#define FCH_SMI_REG94            0x94         // SmiPointer
-#define FCH_SMI_REG96            0x96         // SmiTimer
-#define FCH_SMI_REG98            0x98         // SmiTrig
-#define FCH_SMI_REG9C            0x9C         // SmiTrig
-#define FCH_SMI_REGA0            0xA0
-#define FCH_SMI_REGA1            0xA1
-#define FCH_SMI_REGA2            0xA2
-#define FCH_SMI_REGA3            0xA3
-#define FCH_SMI_REGA4            0xA4
-#define FCH_SMI_REGA5            0xA5
-#define FCH_SMI_REGA6            0xA6
-#define FCH_SMI_REGA7            0xA7
-#define FCH_SMI_REGA8            0xA8
-#define FCH_SMI_REGA9            0xA9
-#define FCH_SMI_REGAA            0xAA
-#define FCH_SMI_REGAB            0xAB
-#define FCH_SMI_REGAC            0xAC
-#define FCH_SMI_REGAD            0xAD
-#define FCH_SMI_REGAE            0xAE
-#define FCH_SMI_REGAF            0xAF
-#define FCH_SMI_REGB0            0xB0
-#define FCH_SMI_REGB1            0xB1
-#define FCH_SMI_REGB2            0xB2
-#define FCH_SMI_REGB3            0xB3
-#define FCH_SMI_REGB4            0xB4
-#define FCH_SMI_REGB5            0xB5
-#define FCH_SMI_REGB6            0xB6
-#define FCH_SMI_REGB7            0xB7
-#define FCH_SMI_REGB8            0xB8
-#define FCH_SMI_REGB9            0xB9
-#define FCH_SMI_REGBA            0xBA
-#define FCH_SMI_REGBB            0xBB
-#define FCH_SMI_REGBC            0xBC
-#define FCH_SMI_REGBD            0xBD
-#define FCH_SMI_REGBE            0xBE
-#define FCH_SMI_REGBF            0xBF
-#define FCH_SMI_REGC0            0xC0
-#define FCH_SMI_REGC1            0xC1
-#define FCH_SMI_REGC2            0xC2
-#define FCH_SMI_REGC3            0xC3
-#define FCH_SMI_REGC4            0xC4
-#define FCH_SMI_REGC5            0xC5
-#define FCH_SMI_REGC6            0xC6
-#define FCH_SMI_REGC7            0xC7
-#define FCH_SMI_REGC8            0xC8
-#define FCH_SMI_REGCA            0xCA         //  IoTrapping1
-#define FCH_SMI_REGCC            0xCC         //  IoTrapping2
-#define FCH_SMI_REGCE            0xCE         //  IoTrapping3
-#define FCH_SMI_TRAPPING_WRITE   0x01
-#define FCH_SMI_REGD0            0xD0         //  MemTrapping0
-#define FCH_SMI_REGD4            0xD4         //  MemRdOvrData0
-#define FCH_SMI_REGD8            0xD8         //  MemTrapping1
-#define FCH_SMI_REGDC            0xDC         //  MemRdOvrData1
-#define FCH_SMI_REGE0            0xE0         //  MemTrapping2
-#define FCH_SMI_REGE4            0xE4         //  MemRdOvrData2
-#define FCH_SMI_REGE8            0xE8         //  MemTrapping3
-#define FCH_SMI_REGEC            0xEC         //  MemRdOvrData3
-#define FCH_SMI_REGF0            0xF0         //  CfgTrapping0
-#define FCH_SMI_REGF4            0xF4         //  CfgTrapping1
-#define FCH_SMI_REGF8            0xF8         //  CfgTrapping2
-#define FCH_SMI_REGFC            0xFC         //  CfgTrapping3
-
-//
-//  FCH MMIO Base (PMIO)
-//    offset : 0x300
-//
-#define FCH_PMIOA_REG00          0x00        // ISA Decode
-#define FCH_PMIOA_REG04          0x04        // ISA Control
-#define FCH_PMIOA_REG08          0x08        // PCI Control
-#define FCH_PMIOA_REG0C          0x0C        // StpClkSmaf
-#define FCH_PMIOA_REG10          0x10        // RetryDetect
-#define FCH_PMIOA_REG14          0x14        // StuckDetect
-#define FCH_PMIOA_REG20          0x20        // BiosRamEn
-#define FCH_PMIOA_REG24          0x24        //  AcpiMmioEn
-#define FCH_PMIOA_REG28          0x28         // AsfEn
-#define FCH_PMIOA_REG2C          0x2C         // Smbus0En
-#define FCH_PMIOA_REG2E          0x2E         // Smbus0Sel
-#define FCH_PMIOA_REG34          0x34         // IoApicEn
-#define FCH_PMIOA_REG3C          0x3C         // SmartVoltEn
-#define FCH_PMIOA_REG40          0x40         // SmartVolt2En
-#define FCH_PMIOA_REG44          0x44         // BootTimerEn
-#define FCH_PMIOA_REG48          0x48         // WatchDogTimerEn
-#define FCH_PMIOA_REG4C          0x4C         // WatchDogTimerConfig
-#define FCH_PMIOA_REG50          0x50         // HPETEn
-#define FCH_PMIOA_REG54          0x54         // SerialIrqConfig
-#define FCH_PMIOA_REG56          0x56         // RtcControl
-#define FCH_PMIOA_REG58          0x58         // VRT_T1
-#define FCH_PMIOA_REG59          0x59         // VRT_T2
-#define FCH_PMIOA_REG5A          0x5A         // IntruderControl
-#define FCH_PMIOA_REG5B          0x5B         // RtcShadow
-#define FCH_PMIOA_REG5C          0x5C
-#define FCH_PMIOA_REG5D          0x5D
-#define FCH_PMIOA_REG5E          0x5E         // RtcExtIndex
-#define FCH_PMIOA_REG5F          0x5F         // RtcExtData
-#define FCH_PMIOA_REG60          0x60         // AcpiPm1EvtBlk
-#define FCH_PMIOA_REG62          0x62         // AcpiPm1CntBlk
-#define FCH_PMIOA_REG64          0x64         // AcpiPmTmrBlk
-#define FCH_PMIOA_REG66          0x66         // P_CNTBlk
-#define FCH_PMIOA_REG68          0x68         // AcpiGpe0Blk
-#define FCH_PMIOA_REG6A          0x6A         // AcpiSmiCmd
-#define FCH_PMIOA_REG6C          0x6C         // AcpiPm2CntBlk
-#define FCH_PMIOA_REG6E          0x6E         // AcpiPmaCntBlk
-#define FCH_PMIOA_REG74          0x74         // AcpiConfig
-#define FCH_PMIOA_REG78          0x78         // WakeIoAddr
-#define FCH_PMIOA_REG7A          0x7A         // HaltCountEn
-#define FCH_PMIOA_REG7C          0x7C         // C1eWrPortAdr
-#define FCH_PMIOA_REG7E          0x7E         // CStateEn
-#define FCH_PMIOA_REG7F          0x7F         // CStateEn
-#define FCH_PMIOA_REG80          0x80         // BreakEvent
-#define FCH_PMIOA_REG84          0x84         // AutoArbEn
-#define FCH_PMIOA_REG88          0x88         // CStateControl
-#define FCH_PMIOA_REG89          0x89         //
-#define FCH_PMIOA_REG8C          0x8C         // StpClkHoldTime
-#define FCH_PMIOA_REG8E          0x8E         // PopUpEndTime
-#define FCH_PMIOA_REG90          0x90         // C4Control
-#define FCH_PMIOA_REG94          0x94         // CStateTiming0
-#define FCH_PMIOA_REG96          0x96         //
-#define FCH_PMIOA_REG97          0x97         //
-#define FCH_PMIOA_REG98          0x98         // CStateTiming1
-#define FCH_PMIOA_REG99          0x99         //
-#define FCH_PMIOA_REG9B          0x9B         //
-#define FCH_PMIOA_REG9C          0x9C         // C2Count
-#define FCH_PMIOA_REG9D          0x9D         // C3Count
-#define FCH_PMIOA_REG9E          0x9E         // C4Count
-#define FCH_PMIOA_REGA0          0xA0         // MessageCState
-#define FCH_PMIOA_REGA4          0xA4         //
-#define FCH_PMIOA_REGA8          0xA8         // TrafficMonitorIdleTime
-#define FCH_PMIOA_REGAA          0xAA         // TrafficMonitorIntTime
-#define FCH_PMIOA_REGAC          0xAC         // TrafficMonitorTrafficCount
-#define FCH_PMIOA_REGAE          0xAE         // TrafficMonitorIntrCount
-#define FCH_PMIOA_REGB0          0xB0         // TrafficMonitorTimeTick
-#define FCH_PMIOA_REGB4          0xB4         // FidVidControl
-#define FCH_PMIOA_REGB6          0xB6         // TPRESET1
-#define FCH_PMIOA_REGB7          0xB7         // Tpreset1b
-#define FCH_PMIOA_REGB8          0xB8         // TPRESET2
-#define FCH_PMIOA_REGB9          0xB9         // Test0
-#define FCH_PMIOA_REGBA          0xBA         // S_StateControl
-#define FCH_PMIOA_REGBB          0xBB         //
-#define FCH_PMIOA_REGBC          0xBC         // ThrottlingControl
-#define FCH_PMIOA_REGBE          0xBE         // ResetControl
-#define FCH_PMIOA_REGBF          0xBF         // ResetControl
-#define FCH_PMIOA_REGC0          0xC0         // S5Status
-#define FCH_PMIOA_REGC2          0xC2         // ResetStatus
-#define FCH_PMIOA_REGC4          0xC4         // ResetCommand
-#define FCH_PMIOA_REGC5          0xC5         // CF9Shadow
-#define FCH_PMIOA_REGC6          0xC6         // HTControl
-#define FCH_PMIOA_REGC8          0xC8         // Misc
-#define FCH_PMIOA_REGCC          0xCC         // IoDrvSth
-#define FCH_PMIOA_REGD0          0xD0         // CLKRunEn
-#define FCH_PMIOA_REGD2          0xD2         // PmioDebug
-#define FCH_PMIOA_REGD3          0xD3         // SD
-#define FCH_PMIOA_REGD6          0xD6         // IMCGating
-#define FCH_PMIOA_REGD7          0xD7         //
-#define FCH_PMIOA_REGD8          0xD8         // MiscIndex
-#define FCH_PMIOA_REGD9          0xD9         // MiscData
-#define FCH_PMIOA_REGDA          0xDA         // SataConfig
-#define FCH_PMIOA_REGDC          0xDC         // HyperFlashConfig
-#define FCH_PMIOA_REGDE          0xDE         // ABConfig
-#define FCH_PMIOA_REGE0          0xE0         // ABRegBar
-#define FCH_PMIOA_REGE4          0xE4
-#define FCH_PMIOA_REGE6          0xE6         // FcEn
-#define FCH_PMIOA_REGE7          0xE7
-#define FCH_PMIOA_REGE8          0xE8
-#define FCH_PMIOA_REGEA          0xEA         // PcibConfig
-#define FCH_PMIOA_REGEB          0xEB         // AzEn
-#define FCH_PMIOA_REGEC          0xEC         // LpcGating
-#define FCH_PMIOA_REGED          0xED         // UsbGating
-#define FCH_PMIOA_REGEE          0xEE         // UsbCntrl
-#define FCH_PMIOA_REGEF          0xEF         // UsbEnable
-#define FCH_PMIOA_REGF0          0xF0         // UsbControl
-#define FCH_PMIOA_REGF2          0xF2         // UsbControl2
-#define FCH_PMIOA_REGF3          0xF3         // UsbDebug
-#define FCH_PMIOA_REGF4          0xF4         // UsbDebug
-#define FCH_PMIOA_REGF6          0xF6         // GecEn
-#define FCH_PMIOA_REGF8          0xF8         // GecConfig
-#define FCH_PMIOA_REGFC          0xFC         // TraceMemoryEn
-
-//
-//  FCH MMIO Base (PMIO2)
-//    offset : 0x400
-//
-#define FCH_PMIO2_REG00          0x00        // Fan0InputControl
-#define FCH_PMIO2_REG01          0x01        // Fan0Control
-#define FCH_PMIO2_REG02          0x02        // Fan0Freq
-#define FCH_PMIO2_REG03          0x03        // LowDuty0
-#define FCH_PMIO2_REG04          0x04        // MidDuty0
-
-#define FCH_PMIO2_REG10          0x00        // Fan1InputControl
-#define FCH_PMIO2_REG11          0x01        // Fan1Control
-#define FCH_PMIO2_REG12          0x02        // Fan1Freq
-#define FCH_PMIO2_REG13          0x03        // LowDuty1
-#define FCH_PMIO2_REG14          0x04        // MidDuty1
-
-#define FCH_PMIO2_REG63          0x63        // SampleFreqDiv
-#define FCH_PMIO2_REG69          0x69        // Fan0 Speed
-#define FCH_PMIO2_REG95          0x95        // Temperature
-#define FCH_PMIO2_REGB8          0xB8        // Voltage
-#define FCH_PMIO2_REGEA          0xEA        // Hwm_Calibration
-
-#define FCH_PMIO2_REG92          0x92        //
-#define FCH_PMIO2_REGF8          0xF8        // VoltageSamleSel
-#define FCH_PMIO2_REGF9          0xF9        // TempSampleSel
-
-#define FCH_PMIO2_REG          0xFC         // TraceMemoryEn
-
-
-//
-//  FCH MMIO Base (GPIO/IoMux)
-//    offset : 0x100/0xD00
-//
-/*
-GPIO from 0 ~ 67, (GEVENT 0-23) 128 ~ 150, 160 ~ 226.
-*/
-#define FCH_GPIO_REG00           0x00
-#define FCH_GPIO_REG06           0x06
-#define FCH_GPIO_REG09           0x09
-#define FCH_GPIO_REG10           0x0A
-#define FCH_GPIO_REG17           0x11
-#define FCH_GPIO_REG21           0x15
-#define FCH_GPIO_REG28           0x1C
-#define FCH_GPIO_REG32           0x20
-#define FCH_GPIO_REG33           0x21
-#define FCH_GPIO_REG34           0x22
-#define FCH_GPIO_REG35           0x23
-#define FCH_GPIO_REG36           0x24
-#define FCH_GPIO_REG37           0x25
-#define FCH_GPIO_REG38           0x26
-#define FCH_GPIO_REG39           0x27
-#define FCH_GPIO_REG40           0x28
-#define FCH_GPIO_REG41           0x29
-#define FCH_GPIO_REG42           0x2A
-#define FCH_GPIO_REG43           0x2B
-#define FCH_GPIO_REG44           0x2C
-#define FCH_GPIO_REG45           0x2D
-#define FCH_GPIO_REG46           0x2E
-#define FCH_GPIO_REG47           0x2F
-#define FCH_GPIO_REG48           0x30
-#define FCH_GPIO_REG49           0x31
-#define FCH_GPIO_REG50           0x32
-#define FCH_GPIO_REG51           0x33
-#define FCH_GPIO_REG52           0x34
-#define FCH_GPIO_REG53           0x35
-#define FCH_GPIO_REG54           0x36
-#define FCH_GPIO_REG55           0x37
-#define FCH_GPIO_REG56           0x38
-#define FCH_GPIO_REG57           0x39
-#define FCH_GPIO_REG58           0x3A
-#define FCH_GPIO_REG59           0x3B
-#define FCH_GPIO_REG60           0x3C
-#define FCH_GPIO_REG61           0x3D
-#define FCH_GPIO_REG62           0x3E
-#define FCH_GPIO_REG63           0x3F
-#define FCH_GPIO_REG64           0x40
-#define FCH_GPIO_REG65           0x41
-#define FCH_GPIO_REG66           0x42
-#define FCH_GPIO_REG67           0x43
-#define FCH_GPIO_REG68           0x44
-#define FCH_GPIO_REG69           0x45
-#define FCH_GPIO_REG70           0x46
-#define FCH_GPIO_REG71           0x47
-#define FCH_GPIO_REG72           0x48
-#define FCH_GPIO_REG73           0x49
-#define FCH_GPIO_REG74           0x4A
-#define FCH_GPIO_REG75           0x4B
-#define FCH_GPIO_REG76           0x4C
-#define FCH_GPIO_REG77           0x4D
-#define FCH_GPIO_REG78           0x4E
-#define FCH_GPIO_REG79           0x4F
-#define FCH_GPIO_REG80           0x50
-
-#define FCH_GEVENT_REG00         0x60
-#define FCH_GEVENT_REG01         0x61
-#define FCH_GEVENT_REG02         0x62
-#define FCH_GEVENT_REG03         0x63
-#define FCH_GEVENT_REG04         0x64
-#define FCH_GEVENT_REG05         0x65
-#define FCH_GEVENT_REG06         0x66
-#define FCH_GEVENT_REG07         0x67
-#define FCH_GEVENT_REG08         0x68
-#define FCH_GEVENT_REG09         0x69
-#define FCH_GEVENT_REG10         0x6A
-#define FCH_GEVENT_REG11         0x6B
-#define FCH_GEVENT_REG12         0x6C
-#define FCH_GEVENT_REG13         0x6D
-#define FCH_GEVENT_REG14         0x6E
-#define FCH_GEVENT_REG15         0x6F
-#define FCH_GEVENT_REG16         0x70
-#define FCH_GEVENT_REG17         0x71
-#define FCH_GEVENT_REG18         0x72
-#define FCH_GEVENT_REG19         0x73
-#define FCH_GEVENT_REG20         0x74
-#define FCH_GEVENT_REG21         0x75
-#define FCH_GEVENT_REG22         0x76
-#define FCH_GEVENT_REG23         0x77
-// S5-DOMAIN GPIO
-#define FCH_GPIO_REG160          0xA0
-#define FCH_GPIO_REG161          0xA1
-#define FCH_GPIO_REG162          0xA2
-#define FCH_GPIO_REG163          0xA3
-#define FCH_GPIO_REG164          0xA4
-#define FCH_GPIO_REG165          0xA5
-#define FCH_GPIO_REG166          0xA6
-#define FCH_GPIO_REG167          0xA7
-#define FCH_GPIO_REG168          0xA8
-#define FCH_GPIO_REG169          0xA9
-#define FCH_GPIO_REG170          0xAA
-#define FCH_GPIO_REG171          0xAB
-#define FCH_GPIO_REG172          0xAC
-#define FCH_GPIO_REG173          0xAD
-#define FCH_GPIO_REG174          0xAE
-#define FCH_GPIO_REG175          0xAF
-#define FCH_GPIO_REG176          0xB0
-#define FCH_GPIO_REG177          0xB1
-#define FCH_GPIO_REG178          0xB2
-#define FCH_GPIO_REG179          0xB3
-#define FCH_GPIO_REG180          0xB4
-#define FCH_GPIO_REG181          0xB5
-#define FCH_GPIO_REG182          0xB6
-#define FCH_GPIO_REG183          0xB7
-#define FCH_GPIO_REG184          0xB8
-#define FCH_GPIO_REG185          0xB9
-#define FCH_GPIO_REG186          0xBA
-#define FCH_GPIO_REG187          0xBB
-#define FCH_GPIO_REG188          0xBC
-#define FCH_GPIO_REG189          0xBD
-#define FCH_GPIO_REG190          0xBE
-#define FCH_GPIO_REG191          0xBF
-#define FCH_GPIO_REG192          0xC0
-#define FCH_GPIO_REG193          0xC1
-#define FCH_GPIO_REG194          0xC2
-#define FCH_GPIO_REG195          0xC3
-#define FCH_GPIO_REG196          0xC4
-#define FCH_GPIO_REG197          0xC5
-#define FCH_GPIO_REG198          0xC6
-#define FCH_GPIO_REG199          0xC7
-#define FCH_GPIO_REG200          0xC8
-#define FCH_GPIO_REG201          0xC9
-#define FCH_GPIO_REG202          0xCA
-#define FCH_GPIO_REG203          0xCB
-#define FCH_GPIO_REG204          0xCC
-#define FCH_GPIO_REG205          0xCD
-#define FCH_GPIO_REG206          0xCE
-#define FCH_GPIO_REG207          0xCF
-#define FCH_GPIO_REG208          0xD0
-#define FCH_GPIO_REG209          0xD1
-#define FCH_GPIO_REG210          0xD2
-#define FCH_GPIO_REG211          0xD3
-#define FCH_GPIO_REG212          0xD4
-#define FCH_GPIO_REG213          0xD5
-#define FCH_GPIO_REG214          0xD6
-#define FCH_GPIO_REG215          0xD7
-#define FCH_GPIO_REG216          0xD8
-#define FCH_GPIO_REG217          0xD9
-#define FCH_GPIO_REG218          0xDA
-#define FCH_GPIO_REG219          0xDB
-#define FCH_GPIO_REG220          0xDC
-#define FCH_GPIO_REG221          0xDD
-#define FCH_GPIO_REG222          0xDE
-#define FCH_GPIO_REG223          0xDF
-#define FCH_GPIO_REG224          0xF0
-#define FCH_GPIO_REG225          0xF1
-#define FCH_GPIO_REG226          0xF2
-#define FCH_GPIO_REG227          0xF3
-#define FCH_GPIO_REG228          0xF4
-
-//
-//  FCH MMIO Base (GPIO BANK0)
-//    offset : 0x1500
-//
-#define FCH_GPIO_PULL_UP_ENABLE      BIT4
-#define FCH_GPIO_PULL_DOWN_ENABLE    BIT5
-#define FCH_GPIO_OUTPUT_VALUE        BIT6
-#define FCH_GPIO_OUTPUT_ENABLE       (1 << 7)
-
-#define FCH_GPIO_068_AZ_SDIN0_GPIO26      0x68
-#define FCH_GPIO_06C_AZ_SDIN1_GPIO27      0x6C
-#define FCH_GPIO_070_AZ_SDIN2_GPIO28      0x70
-#define FCH_GPIO_074_AZ_SDIN3_GPIO29      0x74
-
-#define FCH_GPIO_10C_GPIO55_AGPI067       0x10C
-#define FCH_GPIO_118_GPIO59_AGPI070       0x118
-
-//
-//  FCH MMIO Base (IoMux)
-//    offset : 0xD00
-//
-#define FCH_IOMUX_1A_AZ_SDIN0_EGPIO26          0x1A
-#define FCH_IOMUX_1B_AZ_SDIN1_EGPIO27          0x1B
-#define FCH_IOMUX_1C_AZ_SDIN2_EGPIO28          0x1C
-#define FCH_IOMUX_1D_AZ_SDIN3_EGPIO29          0x1D
-
-//
-//  FCH MMIO Base (SMBUS)
-//    offset : 0xA00
-//
-#define FCH_SMBUS_REG12           0x12        //   I2CbusConfig
-
-//
-//  FCH MMIO Base (MISC)
-//    offset : 0xE00
-//
-#define FCH_MISC_REG00           0x00        //  ClkCntrl0
-/*
-FCH_MISC_REG00                   EQU     000h
-  ClkCntrl0                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG04           0x04        //  ClkCntrl1
-/*
-FCH_MISC_REG04                   EQU     004h
-  ClkCntrl1                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG08           0x08        //  ClkCntrl2
-/*
-FCH_MISC_REG08                   EQU     008h
-  ClkCntrl2                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG0C           0x0C        //  ClkCntrl3
-/*
-FCH_MISC_REG0C                   EQU     00Ch
-  ClkCntrl3                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG10           0x10        //  ClkCntrl4
-/*
-FCH_MISC_REG10                   EQU     010h
-  ClkCntrl4                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG14           0x14        //   ClkCntrl5
-/*
-FCH_MISC_REG14                   EQU     014h
-  ClkCntrl5                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG18           0x18        //   ClkCntrl6
-/*
-FCH_MISC_REG18                   EQU     018h
-  ClkCntrl6                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG1C           0x1C
-#define FCH_MISC_REG30           0x30         // OscFreqCounter
-/*
-FCH_MISC_REG30                   EQU     030h
-  OscCounter                  EQU     0FFFFFFFFh                  ; The 32bit register shows the number of OSC clock per second.
-*/
-#define FCH_MISC_REG34           0x34         //  HpetClkPeriod
-/*
-FCH_MISC_REG34                   EQU     034h
-  HpetClkPeriod               EQU     0FFFFFFFFh                  ; default - 0x429B17Eh (14.31818M).
-*/
-#define FCH_MISC_REG28           0x28         //  ClkDrvSth2
-#define FCH_MISC_REG2C           0x2C
-#define FCH_MISC_REG40           0x40         //  MiscCntrl      for clock only
-#define FCH_MISC_REG41           0x41         //  MiscCntr2
-#define FCH_MISC_REG42           0x42         //  MiscCntr3
-#define FCH_MISC_REG44           0x44         //  ValueOnPort80
-#define FCH_MISC_REG50           0x50         //
-#define FCH_MISCx50_JTAG_CONTROL_ECO           0xFED80E50ul   //
-#define FCH_MISCx68_MEMORY_POWER_SAVING_CONTROL           0xFED80E68ul   //
-
-#define FCH_MISC_REG6C           0x6C         //  EcoBit2
-/*
-FCH_MISC_REG40                   EQU     040h
-*/
-
-#define FCH_MISC_REG80           0x80        /**< FCH_MISC_REG80
-                                   *   @par
-                                   *   StrapStatus [15.0] - FCH chip Strap Status
-                                   *    @li <b>0001</b> - Not USED FWH
-                                   *    @li <b>0002</b> - Not USED LPC ROM
-                                   *    @li <b>0004</b> - EC enabled
-                                   *    @li <b>0008</b> - Reserved
-                                   *    @li <b>0010</b> - Internal Clock mode
-                                   */
-#define FCH_MISC_REGB6           0xB6         //
-
-#define  ChipSysNotUseFWHRom    0x0001                            // EcPwm3 pad
-#define  ChipSysNotUseLpcRom    0x0002                            // Inverted version from EcPwm2 pad (default - 1)
-                                                                  // Note: Both EcPwm3 and EcPwm2 straps pins are used to select boot ROM type.
-#define  ChipSysEcEnable        0x0004                            // Enable Embedded Controller (EC)
-#define  ChipSysBootFailTmrEn   0x0008                            // Enable Watchdog function
-#define  ChipSysIntClkGen       0x0010                            // Select 25Mhz crystal clock or 100Mhz PCI-E clock **
-
-#define FCH_MISC_REG84           0x84         //  StrapOverride
-/*
-FCH_MISC_REG84                   EQU     084h
-  Override FWHDisableStrap    EQU     BIT0                        ; Override FWHDiableStrap value from external pin.
-  Override UseLpcRomStrap     EQU     BIT1                        ; Override UseLpcRomStrap value from external pin.
-  Override EcEnableStrap      EQU     BIT2                        ; Override EcEnableStrap value from external pin.
-  Override BootFailTmrEnStrap EQU     BIT3                        ; Override BootFailTmrEnStrap value from external pin.
-  Override DefaultModeStrap   EQU     BIT5                        ; Override DefaultModeStrap value from external pin.
-  Override I2CRomStrap        EQU     BIT7                        ; Override I2CRomStrap value from external pin.
-  Override ILAAutorunEnBStrap EQU     BIT8                        ; Override ILAAutorunEnBStrap value from external pin.
-  Override FcPllBypStrap      EQU     BIT9                        ; Override FcPllBypStrap value from external pin.
-  Override PciPllBypStrap     EQU     BIT10                       ; Override PciPllBypStrap value from external pin.
-  Override ShortResetStrap    EQU     BIT11                       ; Override ShortResetStrap value from external pin.
-  Override FastBif2ClkStrap   EQU     BIT13                       ; Override FastBif2ClkStrap value from external pin
-  PciRomBootStrap             EQU     BIT15                       ; Override PCI Rom Boot Strap value from external pin
-  BlinkSlowModestrap          EQU     BIT16                       ; Override Blink Slow mode (100Mhz) from external pin
-  ClkGenStrap                 EQU     BIT17                       ; Override CLKGEN from external pin.
-  BIF_GEN2_COMPL_Strap        EQU     BIT18                       ; Override BIF_ GEN2_COMPLIANCE strap from external pin.
-  StrapOverrideEn             EQU     BIT31                       ; Enable override strapping feature.
-*/
-#define FCH_MISC_REGC0           0xC0        //  CPU_Pstate0
-/*
-FCH_MISC_REGC0                   EQU     0C0h
-  Core0_PState                EQU     BIT0+BIT1+BIT2              ; 000: P0  001: P1  010: P2 011: P3 100: P4 101: P5 110: P6 111: P7
-  Core1_PState                EQU     BIT4+BIT5+BIT6
-  Core2_PState                EQU     BIT8+BIT9+BIT10
-  Core3_PState                EQU     BIT12+BIT13+BIT14
-  Core4_PState                EQU     BIT16++BIT17+BIT18
-  Core5_PState                EQU     BIT20+BIT21+BIT22
-  Core6_PState                EQU     BIT24+BIT25+BIT26
-  Core7_PState                EQU     BIT28+BIT29+BIT30
-*/
-#define FCH_MISC_REGC4           0xC4         //  CPU_Pstate1
-/*
-FCH_MISC_REGC4                   EQU     0C4h
-  Core8_PState                EQU     BIT0+BIT1+BIT2              ; 000: P0  001: P1  010: P2 011: P3 100: P4 101: P5 110: P6 111: P7
-  Core9_PState                EQU     BIT4+BIT5+BIT6
-  Core10_PState               EQU     BIT8+BIT9+BIT10
-  Core11_PState               EQU     BIT12+BIT13+BIT14
-  Core12_PState               EQU     BIT16++BIT17+BIT18
-  Core13_PState               EQU     BIT20+BIT21+BIT22
-  Core14_PState               EQU     BIT24+BIT25+BIT26
-  Core15_PState               EQU     BIT28+BIT29+BIT30
-*/
-#define FCH_MISC_REGD0           0xD0         //  CPU_Cstate0
-/*
-FCH_MISC_REGD0                   EQU     0D0h
-  Core0_CState                EQU     BIT0+BIT1+BIT2              ; 000: C0  001: C1  010: C2 011: C3 100: C4 101: C5 110: C6 111: C7
-  Core1_CState                EQU     BIT4+BIT5+BIT6
-  Core2_CState                EQU     BIT8+BIT9+BIT10
-  Core3_CState                EQU     BIT12+BIT13+BIT14
-  Core4_CState                EQU     BIT16++BIT17+BIT18
-  Core5_CState                EQU     BIT20+BIT21+BIT22
-  Core6_CState                EQU     BIT24+BIT25+BIT26
-  Core7_CState                EQU     BIT28+BIT29+BIT30
-*/
-#define FCH_MISC_REGD4           0xD4         //  CPU_Cstate1
-/*
-FCH_MISC_REGD4                   EQU     0D4h
-  Core8_CState                EQU     BIT0+BIT1+BIT2              ; 000: C0  001: C1  010: C2 011: C3 100: C4 101: C5 110: C6 111: C7
-  Core9_CState                EQU     BIT4+BIT5+BIT6
-  Core10_CState               EQU     BIT8+BIT9+BIT10
-  Core11_CState               EQU     BIT12+BIT13+BIT14
-  Core12_CState               EQU     BIT16++BIT17+BIT18
-  Core13_CState               EQU     BIT20+BIT21+BIT22
-  Core14_CState               EQU     BIT24+BIT25+BIT26
-  Core15_CState               EQU     BIT28+BIT29+BIT30
-*/
-#define FCH_MISC_REGF0           0xF0         //  SataPortSts
-/*
-FCH_MISC_REGF0                   EQU     0F0h
-  Port0Sts                    EQU     BIT0                        ; The selected status of Port 0.
-  Port1Sts                    EQU     BIT1                        ; The selected status of Port 1
-  Port2Sts                    EQU     BIT2                        ; The selected status of Port 2.
-  Port3Sts                    EQU     BIT3                        ; The selected status of Port 3
-  Port4Sts                    EQU     BIT4                        ; The selected status of Port 4.
-  Port5Sts                    EQU     BIT5                        ; The selected status of Port 5
-  SataPortSel                 EQU     BIT24+BIT25                 ; 00  - Select "led" for Port 0 to 5
-                                  ; 01 - Select "delete" for Port 0 to 5
-                                  ; 10 - Select "err" for Port 0 to 5
-                                  ; 11 - Select "led" for Port 0 to 5
-*/
-
-//
-//  FCH MMIO Base (SERIAL_DEBUG_BASE)
-//    offset : 0x1000
-//
-#define FCH_SDB_REG00            0x00        //
-#define FCH_SDB_REG74            0x74
-
-#define FCH_RTC_REG00            0x00        // Seconds - RW
-#define FCH_RTC_REG01            0x01        // Seconds Alarm - RW
-#define FCH_RTC_REG02            0x02        // Minutes - RW
-#define FCH_RTC_REG03            0x03        // Minutes Alarm - RW
-#define FCH_RTC_REG04            0x04        // ours - RW
-#define FCH_RTC_REG05            0x05        // ours Alarm- RW
-#define FCH_RTC_REG06            0x06        // Day of Week - RW
-#define FCH_RTC_REG07            0x07        // Date of Mont - RW
-#define FCH_RTC_REG08            0x08        // Mont - RW
-#define FCH_RTC_REG09            0x09        // Year - RW
-#define FCH_RTC_REG0A            0x0A        // Register A - RW
-#define FCH_RTC_REG0B            0x0B        // Register B - RW
-#define FCH_RTC_REG0C            0x0C        // Register C - R
-#define FCH_RTC_REG0D            0x0D        // DateAlarm - RW
-#define FCH_RTC_REG32            0x32        // AltCentury - RW
-#define FCH_RTC_REG48            0x48        // Century - RW
-#define FCH_RTC_REG50            0x50        // Extended RAM Address Port - RW
-#define FCH_RTC_REG53            0x53        // Extended RAM Data Port - RW
-#define FCH_RTC_REG7E            0x7E        // RTC Time Clear - RW
-#define FCH_RTC_REG7F            0x7F        // RTC RAM Enable - RW
-
-#define FCH_ECMOS_REG00           0x00        // scratch - reg
-//;BIT0=0   AsicDebug is enabled
-//;BIT1=0   SLT S3 runs
-#define FCH_ECMOS_REG01          0x01
-#define FCH_ECMOS_REG02          0x02
-#define FCH_ECMOS_REG03          0x03
-#define FCH_ECMOS_REG04          0x04
-#define FCH_ECMOS_REG05          0x05
-#define FCH_ECMOS_REG06          0x06
-#define FCH_ECMOS_REG07          0x07
-#define FCH_ECMOS_REG08          0x08        // save 32BIT Physical address of Config structure
-#define FCH_ECMOS_REG09          0x09
-#define FCH_ECMOS_REG0A          0x0A
-#define FCH_ECMOS_REG0B          0x0B
-
-#define FCH_ECMOS_REG0C          0x0C        //;save MODULE_ID
-#define FCH_ECMOS_REG0D          0x0D        //;Reserve for NB
-
-//
-//  FCH AOAC Base (FCH_AOAC_BASE)
-//    offset : 0x1E00
-//
-#define FCH_AOACx94S013_CONTROL            0xFED81E94ul        //
-#define FCH_AOACx94S013_CONTROL_ARBITER_DIS            (1 << 14)
-#define FCH_AOACx94S013_CONTROL_INTERRUPT_DIS          (1 << 15)
-
-#define FCH_IOMAP_REG00          0x000   // Dma_C 0
-#define FCH_IOMAP_REG02          0x002   // Dma_C 1
-#define FCH_IOMAP_REG04          0x004   // Dma_C 2
-#define FCH_IOMAP_REG06          0x006   // Dma_C 3
-#define FCH_IOMAP_REG08          0x008   // Dma_Status
-#define FCH_IOMAP_REG09          0x009   // Dma_WriteRest
-#define FCH_IOMAP_REG0A          0x00A   // Dma_WriteMask
-#define FCH_IOMAP_REG0B          0x00B   // Dma_WriteMode
-#define FCH_IOMAP_REG0C          0x00C   // Dma_Clear
-#define FCH_IOMAP_REG0D          0x00D   // Dma_MasterClr
-#define FCH_IOMAP_REG0E          0x00E   // Dma_ClrMask
-#define FCH_IOMAP_REG0F          0x00F   // Dma_AllMask
-#define FCH_IOMAP_REG20          0x020   // IntrCntrlReg1
-#define FCH_IOMAP_REG21          0x021   // IntrCntrlReg2
-#define FCH_IOMAP_REG40          0x040   // TimerC0
-#define FCH_IOMAP_REG41          0x041   // TimerC1
-#define FCH_IOMAP_REG42          0x042   // TimerC2
-#define FCH_IOMAP_REG43          0x043   // Tmr1CntrlWord
-#define FCH_IOMAP_REG61          0x061   // Nmi_Status
-#define FCH_IOMAP_REG70          0x070   // Nmi_Enable
-#define FCH_IOMAP_REG71          0x071   // RtcDataPort
-#define FCH_IOMAP_REG72          0x072   // AlternatRtcAddrPort
-#define FCH_IOMAP_REG73          0x073   // AlternatRtcDataPort
-#define FCH_IOMAP_REG80          0x080   // Dma_Page_Reserved0
-#define FCH_IOMAP_REG81          0x081   // Dma_PageC2
-#define FCH_IOMAP_REG82          0x082   // Dma_PageC3
-#define FCH_IOMAP_REG83          0x083   // Dma_PageC1
-#define FCH_IOMAP_REG84          0x084   // Dma_Page_Reserved1
-#define FCH_IOMAP_REG85          0x085   // Dma_Page_Reserved2
-#define FCH_IOMAP_REG86          0x086   // Dma_Page_Reserved3
-#define FCH_IOMAP_REG87          0x087   // Dma_PageC0
-#define FCH_IOMAP_REG88          0x088   // Dma_Page_Reserved4
-#define FCH_IOMAP_REG89          0x089   // Dma_PageC6
-#define FCH_IOMAP_REG8A          0x08A   // Dma_PageC7
-#define FCH_IOMAP_REG8B          0x08B   // Dma_PageC5
-#define FCH_IOMAP_REG8C          0x08C   // Dma_Page_Reserved5
-#define FCH_IOMAP_REG8D          0x08D   // Dma_Page_Reserved6
-#define FCH_IOMAP_REG8E          0x08E   // Dma_Page_Reserved7
-#define FCH_IOMAP_REG8F          0x08F   // Dma_Refres
-#define FCH_IOMAP_REG92          0x092   // FastInit
-#define FCH_IOMAP_REGA0          0x0A0   // IntrCntrl2Reg1
-#define FCH_IOMAP_REGA1          0x0A1   // IntrCntrl2Reg2
-#define FCH_IOMAP_REGC0          0x0C0   // Dma2_C4Addr
-#define FCH_IOMAP_REGC2          0x0C2   // Dma2_C4Cnt
-#define FCH_IOMAP_REGC4          0x0C4   // Dma2_C5Addr
-#define FCH_IOMAP_REGC6          0x0C6   // Dma2_C5Cnt
-#define FCH_IOMAP_REGC8          0x0C8   // Dma2_C6Addr
-#define FCH_IOMAP_REGCA          0x0CA   // Dma2_C6Cnt
-#define FCH_IOMAP_REGCC          0x0CC   // Dma2_C7Addr
-#define FCH_IOMAP_REGCE          0x0CE   // Dma2_C7Cnt
-#define FCH_IOMAP_REGD0          0x0D0   // Dma_Status
-#define FCH_IOMAP_REGD2          0x0D2   // Dma_WriteRest
-#define FCH_IOMAP_REGD4          0x0D4   // Dma_WriteMask
-#define FCH_IOMAP_REGD6          0x0D6   // Dma_WriteMode
-#define FCH_IOMAP_REGD8          0x0D8   // Dma_Clear
-#define FCH_IOMAP_REGDA          0x0DA   // Dma_Clear
-#define FCH_IOMAP_REGDC          0x0DC   // Dma_ClrMask
-#define FCH_IOMAP_REGDE          0x0DE   // Dma_ClrMask
-#define FCH_IOMAP_REGF0          0x0F0   // NCP_Error
-#define FCH_IOMAP_REG40B         0x040B  // DMA1_Extend
-#define FCH_IOMAP_REG4D0         0x04D0  // IntrEdgeControl
-#define FCH_IOMAP_REG4D6         0x04D6  // DMA2_Extend
-#define FCH_IOMAP_REGC00         0x0C00  // Pci_Intr_Index
-#define FCH_IOMAP_REGC01         0x0C01  // Pci_Intr_Data
-#define FCH_IOMAP_REGC14         0x0C14  // Pci_Error
-#define FCH_IOMAP_REGC50         0x0C50  // CMIndex
-#define FCH_IOMAP_REGC51         0x0C51  // CMData
-#define FCH_IOMAP_REGC52         0x0C52  // GpmPort
-#define FCH_IOMAP_REGC6F         0x0C6F  // Isa_Misc
-#define FCH_IOMAP_REGCD0         0x0CD0  // PMio2_Index
-#define FCH_IOMAP_REGCD1         0x0CD1  // PMio2_Data
-#define FCH_IOMAP_REGCD4         0x0CD4  // BIOSRAM_Index
-#define FCH_IOMAP_REGCD5         0x0CD5  // BIOSRAM_Data
-#define FCH_IOMAP_REGCD6         0x0CD6  // PM_Index
-#define FCH_IOMAP_REGCD7         0x0CD7  // PM_Data
-#define FCH_IOMAP_REGCF9         0x0CF9          // CF9Rst reg
-
-#define FCH_IRQ_INTA             0x00    // INTA#
-#define FCH_IRQ_INTB             0x01    // INTB#
-#define FCH_IRQ_INTC             0x02    // INTC#
-#define FCH_IRQ_INTD             0x03    // INTD#
-#define FCH_IRQ_INTE             0x04    // INTE#
-#define FCH_IRQ_INTF             0x05    // INTF#
-#define FCH_IRQ_INTG             0x06    // INTG#
-#define FCH_IRQ_INTH             0x07    // INTH#
-#define FCH_IRQ_SCI              0x10    // SCI
-#define FCH_IRQ_SMBUS0           0x11    // SMBUS0
-#define FCH_IRQ_ASF              0x12    // ASF
-#define FCH_IRQ_HDAUDIO          0x13    // HD Audio
-#define FCH_IRQ_FC               0x14    // FC
-#define FCH_IRQ_GEC              0x15    // GEC
-#define FCH_IRQ_SD               0x17    // SD
-#define FCH_IRQ_IMCINT0          0x20    // IMC INT0
-#define FCH_IRQ_IMCINT1          0x21    // IMC INT1
-#define FCH_IRQ_IMCINT2          0x22    // IMC INT2
-#define FCH_IRQ_IMCINT3          0x23    // IMC INT3
-#define FCH_IRQ_IMCINT4          0x24    // IMC INT4
-#define FCH_IRQ_IMCINT5          0x25    // IMC INT5
-#define FCH_IRQ_USB18INTA        0x30    // Dev 18 (USB) INTA#
-#define FCH_IRQ_USB18INTB        0x31    // Dev 18 (USB) INTB#
-#define FCH_IRQ_USB19INTA        0x32    // Dev 19 (USB) INTA#
-#define FCH_IRQ_USB19INTB        0x33    // Dev 19 (USB) INTB#
-#define FCH_IRQ_USB22INTA        0x34    // Dev 22 (USB) INTA#
-#define FCH_IRQ_USB22INTB        0x35    // Dev 22 (USB) INTB#
-#define FCH_IRQ_USB20INTC        0x36    // Dev 20 (USB) INTC#
-#define FCH_IRQ_IDE              0x40    // IDE pci interrupt
-#define FCH_IRQ_SATA             0x41    // SATA pci interrupt
-#define FCH_IRQ_GPPINT0          0x50    // Gpp Int0
-#define FCH_IRQ_GPPINT1          0x51    // Gpp Int1
-#define FCH_IRQ_GPPINT2          0x52    // Gpp Int2
-#define FCH_IRQ_GPPINT3          0x53    // Gpp Int3
-#define FCH_IRQ_GPIO             0x62    // GPIO Controller
-#define FCH_IRQ_IOAPIC           0x80    // Select IRQ routing to IoApic mode
-#define FCH_IRQ_PIC              0x00    // Select IRQ routing to PIC mode
-
-#define FCH_SPI_MMIO_REG00       0x00        //SPI_
-#define FCH_SPI_OPCODE           0x000000FFl  //
-#define FCH_SPI_TX_COUNT         0x00000F00l  //
-#define FCH_SPI_RX_COUNT         0x0000F000l  //
-#define FCH_SPI_EXEC_OPCODE      0x00010000l  //
-#define FCH_SPI_FIFO_PTR_CRL     0x00100000l  //
-#define FCH_SPI_FIFO_PTR_INC     0x00200000l  //
-#define FCH_SPI_BUSY             0x80000000l  //
-#define FCH_SPI_MMIO_REG0C       0x0C        //SPI_Cntrl1 Register
-#define FCH_SPI_PARAMETER        0x000000FFl  //
-#define FCH_SPI_FIFO_PTR         0x00000700l  //
-#define FCH_SPI_BYTE_PROGRAM     0xFF000000l  //
-#define FCH_SPI_MMIO_REG1C       0x1C        //
-#define FCH_SPI_RETRY_TIMES      0x3         //
-
-#define FCH_SPI_MMIO_REG1D       0x1D        //
-#define FCH_SPI_MMIO_REG1E       0x1E        //
-#define FCH_SPI_MMIO_REG1F       0x1F        //
-#define FCH_SPI_MMIO_REG4E       0x4E        //
-
-#define FCH_SPI_MMIO_REG1F_X05_TX_BYTE_COUNT   0x05        //
-#define FCH_SPI_MMIO_REG1F_X06_RX_BYTE_COUNT   0x06        //
-
-#define FCH_SPI_MMIO_REG20       0x20        //
-#define FCH_SPI_MMIO_REG22       0x22        //
-#define FCH_SPI_MMIO_REG38       0x38        //
-#define FCH_SPI_MMIO_REG3C       0x3C        //
-
-#define FCH_SPI_MMIO_REG45_CMDCODE           0x45        //
-#define FCH_SPI_MMIO_REG47_CMDTRIGGER        0x47        //
-#define FCH_SPI_MMIO_REG48_TXBYTECOUNT       0x48        //
-#define FCH_SPI_MMIO_REG4B_RXBYTECOUNT       0x4B        //
-#define FCH_SPI_MMIO_REG4C_SPISTATUS         0x4C        //
-#define FCH_SPI_MMIO_REG80_FIFO              0x80        //
-
-#define FCH_SPI_MODE_FAST        0x7        //
-#define FCH_SPI_MODE_NORMAL      0x6        //
-#define FCH_SPI_MODE_QUAL_144    0x5        //
-#define FCH_SPI_MODE_QUAL_122    0x4        //
-#define FCH_SPI_MODE_QUAL_114    0x3        //
-#define FCH_SPI_MODE_QUAL_112    0x2        //
-
-#define FCH_SPI_DEVICE_MODE_DIS  0x7        //
-#define FCH_SPI_DEVICE_MODE_144  0x4        //
-#define FCH_SPI_DEVICE_MODE_114  0x3        //
-#define FCH_SPI_DEVICE_MODE_122  0x2        //
-#define FCH_SPI_DEVICE_MODE_112  0x1        //
-#define FCH_SPI_DEVICE_MODE_FAST 0x0        //
-
-#define FCH_SPI_SPEED_16M        0x4        //
-#define FCH_SPI_SPEED_22M        0x3        //
-#define FCH_SPI_SPEED_33M        0x2        //
-#define FCH_SPI_SPEED_66M        0x1        //
-#define FCH_SPI_SPEED_100M       0x5        //
-
-#define AMD_NB_REG78            0x78
-#define AMD_NB_SCRATCH          AMD_NB_REG78
-#define MailBoxPort             0x3E
-
-#define MAX_LT_POLLINGS         0x4000
-#define SMI_TIMER_ENABLE        BIT15
-
-
-#define ACPIMMIO32(x) (*(volatile UINT32*)(UINTN)(x))
-#define ACPIMMIO16(x) (*(volatile UINT16*)(UINTN)(x))
-#define ACPIMMIO8(x)  (*(volatile UINT8*)(UINTN)(x))
-
-#define U3PLL_LOCK                   BIT7
-#define U3PLL_RESET                  BIT8
-#define U3PHY_RESET                  BIT9
-#define U3CORE_RESET                 BIT10
-#define XHC0_FUNC_RESET              BIT11
-#define XHC1_FUNC_RESET              BIT12
-
-#define XHCI_ACPI_MMIO_AMD_REG00     0x00
-#define XHCI_ACPI_MMIO_AMD_REG04     0x04
-#define XHCI_ACPI_MMIO_AMD_REG08     0x08
-#define XHCI_ACPI_MMIO_AMD_REG10     0x10
-#define XHCI_ACPI_MMIO_AMD_REG14     0x14
-#define XHCI_ACPI_MMIO_AMD_REG20     0x20
-#define XHCI_ACPI_MMIO_AMD_REG24     0x24
-#define XHCI_ACPI_MMIO_AMD_REG28     0x28
-#define XHCI_ACPI_MMIO_AMD_REG30     0x30
-#define XHCI_ACPI_MMIO_AMD_REG40     0x40
-#define XHCI_ACPI_MMIO_AMD_REG48     0x48 // USB3.0_Ind_REG Index
-#define XHCI_ACPI_MMIO_AMD_REG4C     0x4C // USB2.0_Ind_REG Data
-#define XHCI_ACPI_MMIO_AMD_REG8C     0x8C
-#define XHCI_ACPI_MMIO_AMD_REG90     0x90 // adaptation timer settings
-#define XHCI_ACPI_MMIO_AMD_REG98     0x98
-#define XHCI_ACPI_MMIO_AMD_REGA0     0xA0 // BAR 0
-#define XHCI_ACPI_MMIO_AMD_REGA4     0xA4 // BAR 1
-#define XHCI_ACPI_MMIO_AMD_REGA8     0xA8 // BAR 2
-#define XHCI_ACPI_MMIO_AMD_REGB0     0xB0 // SPI_Valid_Base.
-#define XHCI_ACPI_MMIO_AMD_REGC0     0xC0 // Firmware starting offset for coping
-#define XHCI_ACPI_MMIO_AMD_REGB4     0xB4
-#define XHCI_ACPI_MMIO_AMD_REGD0     0xD0
-
-#define FCH_XHCI_REG48                0x48 // XHCI IND_REG Index registers
-#define FCH_XHCI_REG4C                0x4C // XHCI IND_REG Data registers
-
-#define FCH_XHCI_IND60_BASE           0x40000000ul //
-
-#define FCH_XHCI_IND60_REG00           FCH_XHCI_IND60_BASE + 0x00 //
-#define FCH_XHCI_IND60_REG04           FCH_XHCI_IND60_BASE + 0x04 //
-#define FCH_XHCI_IND60_REG08           FCH_XHCI_IND60_BASE + 0x08 //
-#define FCH_XHCI_IND60_REG0C           FCH_XHCI_IND60_BASE + 0x0C //
-#define FCH_XHCI_IND60_REG18           FCH_XHCI_IND60_BASE + 0x18 //
-#define FCH_XHCI_IND60_REG48           FCH_XHCI_IND60_BASE + 0x48 //
-#define FCH_XHCI_IND60_REG50           FCH_XHCI_IND60_BASE + 0x50 //
-#define FCH_XHCI_IND60_REG54           FCH_XHCI_IND60_BASE + 0x54 //
-
-#define FCH_XHCI_IND_REG00            0x00  //
-#define FCH_XHCI_IND_REG04            0x04  //
-#define FCH_XHCI_IND_REG48            0x48  //
-#define FCH_XHCI_IND_REG54            0x54  //
-#define FCH_XHCI_IND_REG88            0x88  //
-#define FCH_XHCI_IND_REG94            0x94  // adaptation mode settings
-#define FCH_XHCI_IND_REG98            0x98  // CR phase and frequency filter settings
-#define FCH_XHCI_IND_REGC8            0xC8  //
-#define FCH_XHCI_IND_REGD4            0xD4  // adaptation mode settings
-#define FCH_XHCI_IND_REGD8            0xD8  // CR phase and frequency filter settings
-#define FCH_XHCI_IND_REG100           0x100 //
-#define FCH_XHCI_IND_REG120           0x120 //
-#define FCH_XHCI_IND_REG128           0x128 //
-#define MAX_XHCI_PORTS                0x04
-
-//SMBUS
-#define FCH_SMB_IOREG00               0x00        // SMBusStatus
-#define FCH_SMB_IOREG01               0x01        // SMBusSlaveStatus
-#define FCH_SMB_IOREG02               0x02        // SMBusControl
-#define FCH_SMB_IOREG03               0x03        // SMBusHostCmd
-#define FCH_SMB_IOREG04               0x04        // SMBusAddress
-#define FCH_SMB_IOREG05               0x05        // SMBusData0
-#define FCH_SMB_IOREG06               0x06        // SMBusData1
-#define FCH_SMB_IOREG07               0x07        // SMBusBlockData
-#define FCH_SMB_IOREG08               0x08        // SMBusSlaveControl
-#define FCH_SMB_IOREG14               0x14        // SMBusAutoPoll
-#define FCH_SMB_IOREG16               0x16        // SMBusPausePoll
-#define FCH_SMB_IOREG17               0x17        // SMBusHostCmd2
-
-#define FCH_SMB_CMD_QUICK             0x00 << 2   // Quick Read or Write
-#define FCH_SMB_CMD_BYTE              0x01 << 2   // Byte Read or Write
-#define FCH_SMB_CMD_BYTE_DATA         0x02 << 2   // Byte Data Read or Write
-#define FCH_SMB_CMD_WORD_DATA         0x03 << 2   // Word Data Read or Write
-#define FCH_SMB_CMD_BLOCK             0x05 << 2   // Block Read or Write
-
-#define FCH_SMB_ALL_HOST_STATUS       0x1f        // HostBusy+SMBInterrupt+DeviceErr+BusCollision+Failed
-#define FCH_SMB_CMD_BYTE_DATA_START   0x48        // Byte Data Read or Write
-#define FCH_SMB_CMD_START             BIT6
-#define FCH_SMB_READ_ENABLE           BIT0
-#define FCH_SMB_AUTO_POLL_EN          BIT0
-#define FCH_SMB_POLL2BYTE             BIT7
-
-#define SBTSI_ADDR                    0x98
-#define SBTSI_REG01                   0x01
-#define SBTSI_REG09                   0x09
-#define SBTSI_REG10                   0x10
-#define SBTSI_READORDER               BIT5
-
-#define FCH_EC_ENTER_CONFIG           0X5A
-#define FCH_EC_EXIT_CONFIG            0XA5
-#define FCH_EC_REG07                  0X07
-#define FCH_EC_REG30                  0X30
-#define FCH_EC_REG60                  0X60
-#define FCH_EC_REG61                  0X61
-
-#define FCH_IMC_ROMSIG                0x55aa55aaul
-
-#define SPI_HEAD_LENGTH 0x0E
-#define SPI_BAR0_VLD  0x01
-#define SPI_BASE0     (0x00 << 7)
-#define SPI_BAR1_VLD  (0x01 << 8)
-#define SPI_BASE1     (SPI_HEAD_LENGTH << 10)
-#define SPI_BAR2_VLD  (0x01 << 16)
-#define SPI_BASE2(x)  ((SPI_HEAD_LENGTH + ACPIMMIO16(x)) << 18)
-
-#define FW_TO_SIGADDR_OFFSET  0x0C
-#define BCD_ADDR_OFFSET       0x02
-#define BCD_SIZE_OFFSET       0x04
-#define FW_ADDR_OFFSET        0x06
-#define FW_SIZE_OFFSET        0x08
-#define ACD_ADDR_OFFSET       0x0A
-#define ACD_SIZE_OFFSET       0x0C
-#define XHC_BOOT_RAM_SIZE     0x8000
-
-#define PKT_DATA_REG       ACPI_MMIO_BASE + GFX_DAC_BASE + 0x00
-#define PKT_LEN_REG        ACPI_MMIO_BASE + GFX_DAC_BASE + 0x14
-#define PKT_CTRL_REG       ACPI_MMIO_BASE + GFX_DAC_BASE + 0x15
-#define EFUS_DAC_ADJUSTMENT_CONTROL    0x850A8ul
-#define BGADJ                             0x1F
-#define DACADJ                            0x1B
-#define EFUS_DAC_ADJUSTMENT_CONTROL_DATA  (BGADJ + (DACADJ << 8) + BIT16 )
-
-#define KABINI_OSC_OUT_CLOCK_SEL_48MHz  0x02
-#define KABINI_OSC_OUT_CLOCK_SEL_25MHz  0x01
-
-#define RTC_WORKAROUND_SECOND           0x00
-#define RTC_VALID_SECOND_VALUE          0x59
-#define RTC_SECOND_RESET_VALUE          0x30
-#define RTC_SECOND_LOWER_NIBBLE         0x0F
-#define RTC_VALID_SECOND_VALUE_LN       0x09
-
-#ifndef FCH_DEADLOOP
-  #define FCH_DEADLOOP()    { volatile UINTN __i; __i = 1; while (__i); }
-#endif
-
-#define OHCI_ARB_REGQ_VLD_EN            BIT2
-

pi/amd/00630F01/Proc/Fch/FchPlatform.h

diff --git a/pi/amd/00630F01/Proc/Fch/FchPlatform.h b/pi/amd/00630F01/Proc/Fch/FchPlatform.h
deleted file mode 100644
index 3306fd5..0000000
--- a/pi/amd/00630F01/Proc/Fch/FchPlatform.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH platform definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*
-*****************************************************************************
-*
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#ifndef  _FCH_PLATFORM_H_
-#define  _FCH_PLATFORM_H_
-
-#define MAX_SATA_PORTS 8
-
-#include "AGESA.h"
-
-#ifndef FCHOEM_ACPI_RESTORE_SWSMI
-  #define FCHOEM_BEFORE_PCI_RESTORE_SWSMI    0xD3
-  #define FCHOEM_AFTER_PCI_RESTORE_SWSMI     0xD4
-  #define FCHOEM_ENABLE_ACPI_SWSMI           0xA0
-  #define FCHOEM_DISABLE_ACPI_SWSMI          0xA1
-  #define FCHOEM_START_TIMER_SMI             0xBC
-  #define FCHOEM_STOP_TIMER_SMI              0xBD
-#endif
-
-#ifndef FCHOEM_SPI_UNLOCK_SWSMI
-  #define FCHOEM_SPI_UNLOCK_SWSMI            0xAA
-#endif
-#ifndef FCHOEM_SPI_LOCK_SWSMI
-  #define FCHOEM_SPI_LOCK_SWSMI              0xAB
-#endif
-
-#ifndef FCHOEM_ACPI_TABLE_RANGE_LOW
-  #define FCHOEM_ACPI_TABLE_RANGE_LOW        0xE0000ul
-#endif
-
-#ifndef FCHOEM_ACPI_TABLE_RANGE_HIGH
-  #define FCHOEM_ACPI_TABLE_RANGE_HIGH       0xFFFF0ul
-#endif
-
-#ifndef FCHOEM_ACPI_BYTE_CHECHSUM
-  #define FCHOEM_ACPI_BYTE_CHECHSUM          0x100
-#endif
-
-#ifndef FCHOEM_IO_DELAY_PORT
-  #define FCHOEM_IO_DELAY_PORT               0x80
-#endif
-
-#ifndef FCHOEM_OUTPUT_DEBUG_PORT
-  #define FCHOEM_OUTPUT_DEBUG_PORT           0x80
-#endif
-
-#define FCH_PCIRST_BASE_IO                   0xCF9
-#define FCH_PCI_RESET_COMMAND06              0x06
-#define FCH_PCI_RESET_COMMAND0E              0x0E
-#define FCH_KBDRST_BASE_IO                   0x64
-#define FCH_KBC_RESET_COMMAND                0xFE
-#define FCH_ROMSIG_BASE_IO                   0x20000l
-#define FCH_ROMSIG_SIGNATURE                 0x55AA55AAul
-#define FCH_MAX_TIMER                        0xFFFFFFFFul
-#define FCH_GEC_INTERNAL_REG                 0x6804
-#define FCH_HPET_REG_MASK                    0xFFFFF800ul
-#define FCH_FAKE_USB_BAR_ADDRESS             0x58830000ul
-
-
-#ifndef FCHOEM_ELAPSED_TIME_UNIT
-  #define FCHOEM_ELAPSED_TIME_UNIT           28
-#endif
-
-#ifndef FCHOEM_ELAPSED_TIME_DIVIDER
-  #define FCHOEM_ELAPSED_TIME_DIVIDER        100
-#endif
-
-#include "Fch.h"
-#include "amdlib.h"
-#include "FchCommonCfg.h"
-#include "AcpiLib.h"
-#include "FchDef.h"
-#include "FchBiosRamUsage.h"
-#include "AmdFch.h"
-
-extern BUILD_OPT_CFG    UserOptions;
-
-#endif // _FCH_PLATFORM_H_

pi/amd/00630F01/Proc/IDS/Debug/IdsDebugPrint.h

diff --git a/pi/amd/00630F01/Proc/IDS/Debug/IdsDebugPrint.h b/pi/amd/00630F01/Proc/IDS/Debug/IdsDebugPrint.h
deleted file mode 100644
index 352e709..0000000
--- a/pi/amd/00630F01/Proc/IDS/Debug/IdsDebugPrint.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Integrated Debug Print Routines
- *
- * Contains all functions related to IDS Debug Print
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _IDS_DEBUGPRINT_H_
-#define _IDS_DEBUGPRINT_H_
-
-///Debug String End flag
-#define DEBUG_STRING_END_FLAG (0x0)
-/// return status for debug print
-typedef enum {
-  IDS_DEBUG_PRINT_SUCCESS = 0,      ///< success
-  IDS_DEBUG_PRINT_BUFFER_OVERFLOW,      ///< Bufer overflow
-} IDS_DEBUG_PRINT_STATUS;
-
-/// Private datas for debug print
-typedef struct _IDS_DEBUG_PRINT_PRIVATE_DATA {
-  BOOLEAN saveContext;      /// save context
-} IDS_DEBUG_PRINT_PRIVATE_DATA;
-
-typedef BOOLEAN (*PF_IDS_DEBUG_PRINT_SUPPORT) (VOID);
-typedef BOOLEAN (*PF_IDS_DEBUG_PRINT_FILTER) (UINT64 *Filter);
-typedef VOID (*PF_IDS_DEBUG_PRINT_PRINT) (CHAR8 *Buffer, UINTN BufferSize, IDS_DEBUG_PRINT_PRIVATE_DATA *debugPrintPrivate);
-typedef VOID (*PF_IDS_DEBUG_INIT_PRIVATE_DATA) (UINT64 flag, IDS_DEBUG_PRINT_PRIVATE_DATA *debugPrintPrivate);
-
-/// Debug print Hw layer service class
-typedef struct _IDS_DEBUG_PRINT {
-  PF_IDS_DEBUG_PRINT_SUPPORT  support;    ///Check if support
-  PF_IDS_DEBUG_PRINT_FILTER  customfilter;  ///Get if any customize filters
-  PF_IDS_DEBUG_INIT_PRIVATE_DATA  InitPrivateData; ///Init private data
-  PF_IDS_DEBUG_PRINT_PRINT  print;  ///Print data to Hw layer
-} IDS_DEBUG_PRINT;
-
-
-VOID
-GetDebugPrintList (
-  IN OUT   CONST IDS_DEBUG_PRINT   ***pIdsDebugPrintListPtr
-  );
-
-
-#endif //_IDS_DEBUGPRINT_H_
-

pi/amd/00630F01/Proc/IDS/Debug/IdsDpHdtout.h

diff --git a/pi/amd/00630F01/Proc/IDS/Debug/IdsDpHdtout.h b/pi/amd/00630F01/Proc/IDS/Debug/IdsDpHdtout.h
deleted file mode 100644
index 982f513..0000000
--- a/pi/amd/00630F01/Proc/IDS/Debug/IdsDpHdtout.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Integrated Debug Debug_library Routines
- *
- * Contains all functions related to HDTOUT
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _IDS_HDTOUT_H_
-#define _IDS_HDTOUT_H_
-
-#define HDTOUT_VERSION          0x0200
-
-/// HDTOUT command
-#define HDTOUT_COMMAND        0x99cc
-#define HDTOUT_INIT           (0x10BF0000ul | HDTOUT_COMMAND)
-#define HDTOUT_ASSERT         (0xA0BF0000ul | HDTOUT_COMMAND)
-#define HDTOUT_EXIT           (0xE0BF0000ul | HDTOUT_COMMAND)
-#define HDTOUT_PRINT          (0xC0BF0000ul | HDTOUT_COMMAND)
-#define HDTOUT_TIME_ANALYSE   (0xD0BF0000ul | HDTOUT_COMMAND)
-#define HDTOUT_BREAKPOINT     (0xB0BF0000ul | HDTOUT_COMMAND)
-#define HDTOUT_ERROR          (0x1EBF0000ul | HDTOUT_COMMAND)
-
-
-#define HDTOUT_ERROR_HEAP_ALLOCATION       0x1
-#define HDTOUT_ERROR_HEAP_AllOCATE_FAIL       0x2
-
-#define HDTOUT_PRINTCTRL_OFF      0
-#define HDTOUT_PRINTCTRL_ON       1
-#define HDTOUT_ALL_CORES          0
-#define HDTOUT_BSP_ONLY           1
-#define HDTOUT_BUFFER_MODE_OFF    0
-#define HDTOUT_BUFFER_MODE_ON     1
-
-#define HDTOUT_HEADER_SIGNATURE     0xDB1099CCul
-#define HDTOUT_DEFAULT_BUFFER_SIZE  0x1000
-/// HDTOUT Header.
-typedef struct _HDTOUT_HEADER {
-  UINT32 Signature;               ///< 0xDB1099CC
-  UINT16 Version;                 ///< HDTOUT version.
-  UINT16 BufferSize;              ///< Size in bytes.
-  UINT16 DataIndex;               ///< Data Index.
-  UINT8  PrintCtrl;               ///< 0 off no print  1 on print
-  UINT8  NumBreakpointUnit;       ///< default 0 no bp unit others number of bp unit
-  UINT32 FuncListAddr;            ///< 32 bit address to the list of functions that script can execute
-  UINT8  ConsoleType;             ///< Console type - deprecated
-  UINT8  Event;                   ///< Event type. - deprecated
-  UINT8  OutBufferMode;           ///< Off:stack mode, On: heap mode - deprecated
-  UINT32 EnableMask;              ///< Bitmap to select which part should be streamed out
-  UINT64 ConsoleFilter;           ///< Filter use to select which part should be streamed out
-  UINT8  BspOnlyFlag;             ///< 1 Only Enable Bsp output, 0 enable On All cores
-  UINT8  Reserved[56 - 32];       ///< Reserved for header expansion
-
-  CHAR8  BreakpointList[300];     ///< Breakpoint list
-  CHAR8  StatusStr[156];          ///< Shows current node, DCT, CS,...
-  CHAR8  Data[2];                 ///< HDTOUT content. Its size will be determined by BufferSize.
-} HDTOUT_HEADER;
-
-#define IDS_HDTOUT_BP_AND_OFF             0
-#define IDS_HDTOUT_BP_AND_ON              1
-
-#define IDS_HDTOUT_BPFLAG_FORMAT_STR   0
-#define IDS_HDTOUT_BPFLAG_STATUS_STR   1
-
-#define HDTOUT_BP_ACTION_HALT          1
-#define HDTOUT_BP_ACTION_PRINTON       2
-#define HDTOUT_BP_ACTION_PRINTONE      3
-#define HDTOUT_BP_ACTION_PRINTOFF      4
-
-///breakpoint unit of HDTOUT
-typedef struct _BREAKPOINT_UNIT {
-  UINT8 AndFlag : 1;        ///< Next string is ANDed to current string
-  UINT8 BpFlag : 1;         ///< Format string or Status string
-  UINT8 Action : 4;         ///< Halt, start HDTOUT, or stop HDT,...
-  UINT8 BpStrOffset;        ///< Offset from BreakpointList to the breakpoint string
-} BREAKPOINT_UNIT;
-
-
-BOOLEAN
-AmdIdsHdtOutSupport (
-  VOID
-  );
-
-#endif //_IDS_HDTOUT_H_
-

pi/amd/00630F01/Proc/IDS/Debug/IdsDpRam.h

diff --git a/pi/amd/00630F01/Proc/IDS/Debug/IdsDpRam.h b/pi/amd/00630F01/Proc/IDS/Debug/IdsDpRam.h
deleted file mode 100644
index cec4527..0000000
--- a/pi/amd/00630F01/Proc/IDS/Debug/IdsDpRam.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Integrated Debug Print Routines
- *
- * Contains all functions related to IDS Debug Print
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _IDS_DP_RAM_H_
-#define _IDS_DP_RAM_H_
-
-#pragma pack (push, 1)
-
-///Debug Print RAM signature
-#define DEBUG_PRINT_RAM_SIG   MAKE_SIGNATURE ('D','P','R','M')
-
-/// Debug Print Ram Header
-typedef struct _IDS_DEBUG_PRINT_RAM_HEADER {
-  SIGNATURE DpRamSig;      /// 00 'D','P','R','M'
-  UINT32    LatestIdx;     /// 04 Latest Index
-  UINT8     Reserved[8];   /// Reserved
-} IDS_DEBUG_PRINT_RAM_HEADER;
-
-///Debug Print RAM Signature Offset
-#define DEBUG_PRINT_RAM_SIG_ADDR  ((UINTN) IDS_DPRAM_BASE + (UINTN) &(((IDS_DEBUG_PRINT_RAM_HEADER *) 0)->DpRamSig))
-///Debug Print RAM Latest Index Offset
-#define DEBUG_PRINT_RAM_LATESTIDX_ADDR ((UINTN) IDS_DPRAM_BASE + (UINTN) &(((IDS_DEBUG_PRINT_RAM_HEADER *) 0)->LatestIdx))
-
-///Print Buffer start
-#define DEBUG_PRINT_BUFFER_START     ((UINTN) IDS_DPRAM_BASE + sizeof (IDS_DEBUG_PRINT_RAM_HEADER))
-///Print Buffer Size
-#define DEBUG_PRINT_BUFFER_SIZE      ((UINT32) IDS_DPRAM_SIZE - sizeof (IDS_DEBUG_PRINT_RAM_HEADER))
-///Debug Print RAM default Value
-#define DEBUG_PRINT_BUFFER_DFT_VALUE ((UINT8) 0xCC)
-
-#pragma pack (pop)
-
-#endif //_IDS_DP_RAM_H_
-

pi/amd/00630F01/Proc/IDS/Family/0x15/IdsF15AllService.h

diff --git a/pi/amd/00630F01/Proc/IDS/Family/0x15/IdsF15AllService.h b/pi/amd/00630F01/Proc/IDS/Family/0x15/IdsF15AllService.h
deleted file mode 100644
index 8f0aa65..0000000
--- a/pi/amd/00630F01/Proc/IDS/Family/0x15/IdsF15AllService.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD IDS Routines
- *
- * Contains AMD AGESA IDS Translation
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _IDS_F15_ALLSERVICE_H_
-#define _IDS_F15_ALLSERVICE_H_
-#ifdef __IDS_EXTENDED__
-  #include IDS_EXT_INCLUDE_F15 (IdsIntF15AllService)
-#endif
-
-#endif
-

pi/amd/00630F01/Proc/IDS/Family/0x15/KV/IdsF15KvAllService.h

diff --git a/pi/amd/00630F01/Proc/IDS/Family/0x15/KV/IdsF15KvAllService.h b/pi/amd/00630F01/Proc/IDS/Family/0x15/KV/IdsF15KvAllService.h
deleted file mode 100644
index 1d7a680..0000000
--- a/pi/amd/00630F01/Proc/IDS/Family/0x15/KV/IdsF15KvAllService.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD IDS Routines
- *
- * Contains AMD AGESA IDS Translation
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
- #ifndef _IDS_F15_KV_ALLSERVICE_H_
-#define _IDS_F15_KV_ALLSERVICE_H_
-#ifdef __IDS_EXTENDED__
-  #include IDS_EXT_INCLUDE_F15_KV (IdsIntF15KvAllService)
-#endif
-
-#endif  //_IDS_F15_KV_ALLSERVICE_H_
-

pi/amd/00630F01/Proc/IDS/Family/0x15/KV/IdsF15KvNvDef.h

diff --git a/pi/amd/00630F01/Proc/IDS/Family/0x15/KV/IdsF15KvNvDef.h b/pi/amd/00630F01/Proc/IDS/Family/0x15/KV/IdsF15KvNvDef.h
deleted file mode 100644
index b10c1c3..0000000
--- a/pi/amd/00630F01/Proc/IDS/Family/0x15/KV/IdsF15KvNvDef.h
+++ /dev/null
@@ -1,287 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * IDS NV definition for F15Kv
- *
- * Auto generated from CBS XML file
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS F15Kv
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-
-#ifndef _IDSF15KVNVDEF_H_
-#define _IDSF15KVNVDEF_H_
-///HTC Enable
-///Enable or disable Hardware Thermal Control. D18F3x64[0]
-typedef enum {
-  IdsNvThermalHTCEnDisabled = 0,///<Disabled
-  IdsNvThermalHTCEnEnabled = 1,///<Enabled
-  IdsNvThermalHTCEnAuto = 3,///<Auto
-} IdsNvThermalHTCEn;
-
-///HTC Override
-///Enable or disable Thermal Control Override
-typedef enum {
-  IdsNvThermalHTCOverrideDisabled = 0,///<Disabled
-  IdsNvThermalHTCOverrideEnabled = 1,///<Enabled
-} IdsNvThermalHTCOverride;
-
-///HTC P-state limit select
-///Specifies the P-state limit of all cores when in the P-state based HTC-active state
-#define IdsNvThermalHtcPstateLimitMin 0
-#define IdsNvThermalHtcPstateLimitMax 7
-
-///HTC Temperature Hysteresis
-///Sets the temperature hysteresis for HTC. D18F3x64[27:24]
-#define IdsNvThermalHTCTempHysMin 0
-#define IdsNvThermalHTCTempHysMax 0xF
-
-///HTC Activation Temp
-///Sets the HTC temperature limit. D18F3x64[22:16]
-#define IdsNvThermalHTCActTempMin 0
-#define IdsNvThermalHTCActTempMax 0x7F
-
-///Bank Interleave
-///Interleave memory blocks across the DRAM chip selects for node 0.
-typedef enum {
-  IdsNvMemMappingBankInterleaveDisabled = 0,///<Disabled
-  IdsNvMemMappingBankInterleaveAuto = 1,///<Auto
-} IdsNvMemMappingBankInterleave;
-
-///DRAM Channel Interleave
-///Interleave between two DCTs when they are in unganged mode.
-typedef enum {
-  IdsNvMemMappingChlInterleaveAddress_bit_6 = 0,///<Address bit 6
-  IdsNvMemMappingChlInterleaveAddress_bit_12 = 1,///<Address bit 12
-  IdsNvMemMappingChlInterleaveHash__exclusive_OR_of_address_bits_20_16__6_ = 2,///<Hash: exclusive OR of address bits[20:16, 6]
-  IdsNvMemMappingChlInterleaveHash__excluseive_OR_of_address_bits_20_16__9_ = 3,///<Hash: excluseive OR of address bits[20:16, 9]
-  IdsNvMemMappingChlInterleaveAddress_bit_8 = 4,///<Address bit 8
-  IdsNvMemMappingChlInterleaveAddress_bit_9 = 5,///<Address bit 9
-  IdsNvMemMappingChlInterleaveDisabled = 0xF,///<Disabled
-  IdsNvMemMappingChlInterleaveAuto = 0xFF,///<Auto
-} IdsNvMemMappingChlInterleave;
-
-///ECC Symbol Size
-///ECC symbol size and code selection. D18F3x180[25]
-typedef enum {
-  IdsNvEccSymbolSizex4 = 0,///<x4
-  IdsNvEccSymbolSizex8 = 1,///<x8
-  IdsNvEccSymbolSizeAuto = 3,///<Auto
-} IdsNvEccSymbolSize;
-
-///DRAM prefetches triggered from CPU requests
-///Enable or disable DRAM prefetches Prefetch triggered by CPU requests.
-typedef enum {
-  IdsNvPrefetchPrefCpuDis0 = 0,///<0
-  IdsNvPrefetchPrefCpuDis1 = 1,///<1
-  IdsNvPrefetchPrefCpuDisAuto = 3,///<Auto
-} IdsNvPrefetchPrefCpuDis;
-
-///HW prefetch training on SW Prefetches
-///Enable or disable Hardware Prefetch training on Software Prefetches
-typedef enum {
-  IdsNvPrefetchDisHWPFforSWPF0 = 0,///<0
-  IdsNvPrefetchDisHWPFforSWPF1 = 1,///<1
-  IdsNvPrefetchDisHWPFforSWPFAuto = 3,///<Auto
-} IdsNvPrefetchDisHWPFforSWPF;
-
-///Hardware Prefetches
-///Enable or disable Hardware Prefetches.
-typedef enum {
-  IdsNvPrefetchDisHWPF0 = 0,///<0
-  IdsNvPrefetchDisHWPF1 = 1,///<1
-  IdsNvPrefetchDisHWPFAuto = 3,///<Auto
-} IdsNvPrefetchDisHWPF;
-
-///UMI Gen2
-///Enable or disable UMI link Gen2
-typedef enum {
-  IdsNvFchGppUmiGen2Disabled = 0,///<Disabled
-  IdsNvFchGppUmiGen2Enabled = 1,///<Enabled
-} IdsNvFchGppUmiGen2;
-
-///SATA Controller
-///Disable or enable OnChip SATA controller
-typedef enum {
-  IdsNvFchSataEnableDisabled = 0,///<Disabled
-  IdsNvFchSataEnableEnabled = 1,///<Enabled
-} IdsNvFchSataEnable;
-
-///SATA Mode
-///Select OnChip SATA Type
-typedef enum {
-  IdsNvFchSataClassNative_IDE = 0,///<Native IDE
-  IdsNvFchSataClassRAID = 1,///<RAID
-  IdsNvFchSataClassAHCI = 3,///<AHCI
-  IdsNvFchSataClassLegacy_IDE = 3,///<Legacy IDE
-  IdsNvFchSataClassIDE__AHCI = 4,///<IDE->AHCI
-  IdsNvFchSataClassAHCI_as_ID_0x7804 = 5,///<AHCI as ID 0x7804
-  IdsNvFchSataClassIDE__AHCI_as_ID_0x7804 = 6,///<IDE->AHCI as ID 0x7804
-} IdsNvFchSataClass;
-
-///OnChip IDE
-///Select OnChip IDE controller mode
-typedef enum {
-  IdsNvFchSataIdeModeLegacy_IDE = 0,///<Legacy IDE
-  IdsNvFchSataIdeModeNative_IDE = 1,///<Native IDE
-} IdsNvFchSataIdeMode;
-
-///IDE Controller
-///Disable or enable OnChip IDE controller
-typedef enum {
-  IdsNvFchSataIdeEnableDisabled = 0,///<Disabled
-  IdsNvFchSataIdeEnableEnabled = 1,///<Enabled
-} IdsNvFchSataIdeEnable;
-
-///XHC Switch (Bus 0 Dev 16 Fn 0/1)
-///Select disable or enable XHCI HCs (Bus 0 Dev 16 Fn 0/1)
-typedef enum {
-  IdsNvFchUsbXhciSwitchDisabled = 0,///<Disabled
-  IdsNvFchUsbXhciSwitchEnabled = 1,///<Enabled
-} IdsNvFchUsbXhciSwitch;
-
-///USB1(Bus 0 Dev 18 Fn 0/2)
-///Select disable or enable USB1 HCs (Bus 0 Dev 18 Fn 0/2)
-typedef enum {
-  IdsNvFchUsbOhci1EnableDisabled = 0,///<Disabled
-  IdsNvFchUsbOhci1EnableEnabled = 1,///<Enabled
-} IdsNvFchUsbOhci1Enable;
-
-///USB2 (Bus 0 Dev 19 Fn 0/2)
-///Select disable or enable USB2 HCs (Bus 0 Dev 19 Fn 0/2)
-typedef enum {
-  IdsNvFchUsbOhci2EnableDisabled = 0,///<Disabled
-  IdsNvFchUsbOhci2EnableEnabled = 1,///<Enabled
-} IdsNvFchUsbOhci2Enable;
-
-///USB3 (Bus 0 Dev 22 Fn 0/2)
-///Select disable or enable USB3 HCs (Bus 0 Dev 22 Fn 0/2)
-typedef enum {
-  IdsNvFchUsbOhci3EnableDisabled = 0,///<Disabled
-  IdsNvFchUsbOhci3EnableEnabled = 1,///<Enabled
-} IdsNvFchUsbOhci3Enable;
-
-///USB4 (Bus 0 Dev 20 Fn 5)
-///Select disable or enable USB4 HC (Bus 0 Dev 20 Fn 5)
-typedef enum {
-  IdsNvFchUsbOhci4EnableDisabled = 0,///<Disabled
-  IdsNvFchUsbOhci4EnableEnabled = 1,///<Enabled
-} IdsNvFchUsbOhci4Enable;
-
-///Hardware Monitor Enable
-///Master switch to enable or disable hardware monitor function
-typedef enum {
-  IdsNvFchHwmEnableDisabled = 0,///<Disabled
-  IdsNvFchHwmEnableEnabled = 1,///<Enabled
-} IdsNvFchHwmEnable;
-
-///In-Chip IR
-///Enable or disable the In-Chip IR
-typedef enum {
-  IdsNvFchIrConfigDisabled = 0,///<Disabled
-  IdsNvFchIrConfigRX_TX0_Only = 1,///<RX_TX0 Only
-  IdsNvFchIrConfigRX_TX1_Only = 2,///<RX_TX1 Only
-  IdsNvFchIrConfigRX__TX0__and_TX1 = 3,///<RX, TX0, and TX1
-} IdsNvFchIrConfig;
-
-///SD Configuration Mode
-///Select SD Mode
-typedef enum {
-  IdsNvFchSdConfigDisabled = 0,///<Disabled
-  IdsNvFchSdConfigADMA = 1,///<ADMA
-  IdsNvFchSdConfigDMA = 2,///<DMA
-  IdsNvFchSdConfigPIO = 3,///<PIO
-} IdsNvFchSdConfig;
-
-///Azalia Device
-///Select disable or enable Azalia Device
-typedef enum {
-  IdsNvFchAzaliaControlAuto = 0,///<Auto
-  IdsNvFchAzaliaControlDisabled = 1,///<Disabled
-  IdsNvFchAzaliaControlEnabled = 2,///<Enabled
-  IdsNvFchAzaliaControlReserved = 3,///<Reserved
-} IdsNvFchAzaliaControl;
-
-///Integrated Graphics Controller
-///Enable Integrate Graphics controller
-typedef enum {
-  IdsNvGnbGfxiGPU_CONTROLAuto = 0,///<Auto
-  IdsNvGnbGfxiGPU_CONTROLDisabled = 1,///<Disabled
-  IdsNvGnbGfxiGPU_CONTROLForces = 2,///<Forces
-} IdsNvGnbGfxiGPU_CONTROL;
-
-///UMA Frame buffer Size
-///Set UMA FB size
-typedef enum {
-  IdsNvGnbGfxUmaFrameBufferSizeAuto = 0,///<Auto
-  IdsNvGnbGfxUmaFrameBufferSize32M = 1,///<32M
-  IdsNvGnbGfxUmaFrameBufferSize64M = 2,///<64M
-  IdsNvGnbGfxUmaFrameBufferSize128M = 3,///<128M
-  IdsNvGnbGfxUmaFrameBufferSize256M = 4,///<256M
-  IdsNvGnbGfxUmaFrameBufferSize384M = 5,///<384M
-  IdsNvGnbGfxUmaFrameBufferSize512M = 6,///<512M
-  IdsNvGnbGfxUmaFrameBufferSize1G = 7,///<1G
-  IdsNvGnbGfxUmaFrameBufferSize2G = 8,///<2G
-  IdsNvGnbGfxUmaFrameBufferSize4G = 9,///<4G
-} IdsNvGnbGfxUmaFrameBufferSize;
-
-///NB Azalia
-///Enable Integrate HD Audio controller
-typedef enum {
-  IdsNvGnbGfxNbAzaliaDisabled = 0,///<Disabled
-  IdsNvGnbGfxNbAzaliaEnabled = 1,///<Enabled
-  IdsNvGnbGfxNbAzaliaAuto = 0xf,///<Auto
-} IdsNvGnbGfxNbAzalia;
-
-///PSPP Policy
-///PCIe speed power policy
-typedef enum {
-  IdsNvGnbPciePsppPolicyDisabled = 0,///<Disabled
-  IdsNvGnbPciePsppPolicyPerformance = 1,///<Performance
-  IdsNvGnbPciePsppPolicyBalanced_High = 2,///<Balanced-High
-  IdsNvGnbPciePsppPolicyBalanced_Low = 3,///<Balanced-Low
-  IdsNvGnbPciePsppPolicyPower_Saving = 4,///<Power Saving
-  IdsNvGnbPciePsppPolicyAuto = 5,///<Auto
-} IdsNvGnbPciePsppPolicy;
-
-///IOMMU
-///
-typedef enum {
-  IdsNvGnbNbIOMMUDisabled = 0,///<Disabled
-  IdsNvGnbNbIOMMUEnabled = 1,///<Enabled
-} IdsNvGnbNbIOMMU;
-
-#endif // _IDSF15KVNVDEF_H_
-

pi/amd/00630F01/Proc/IDS/Family/0x15/TN/IdsF15TnAllService.h

diff --git a/pi/amd/00630F01/Proc/IDS/Family/0x15/TN/IdsF15TnAllService.h b/pi/amd/00630F01/Proc/IDS/Family/0x15/TN/IdsF15TnAllService.h
deleted file mode 100644
index 9e99f32..0000000
--- a/pi/amd/00630F01/Proc/IDS/Family/0x15/TN/IdsF15TnAllService.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD IDS Routines
- *
- * Contains AMD AGESA IDS Translation
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _IDS_F15_TN_ALLSERVICE_H_
-#define _IDS_F15_TN_ALLSERVICE_H_
-#ifdef __IDS_EXTENDED__
-  #include IDS_EXT_INCLUDE_F15_TN (IdsIntF15TnAllService)
-#endif
-
-#endif  //_IDS_F15_TN_ALLSERVICE_H_
-

pi/amd/00630F01/Proc/IDS/Family/0x15/TN/IdsF15TnNvDef.h

diff --git a/pi/amd/00630F01/Proc/IDS/Family/0x15/TN/IdsF15TnNvDef.h b/pi/amd/00630F01/Proc/IDS/Family/0x15/TN/IdsF15TnNvDef.h
deleted file mode 100644
index bdc7ac1..0000000
--- a/pi/amd/00630F01/Proc/IDS/Family/0x15/TN/IdsF15TnNvDef.h
+++ /dev/null
@@ -1,287 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * IDS NV definition for F15Tn
- *
- * Auto generated from CBS XML file
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS F15Tn
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-
-#ifndef _IDSF15TNNVDEF_H_
-#define _IDSF15TNNVDEF_H_
-///HTC Enable
-///Enable or disable Hardware Thermal Control. D18F3x64[0]
-typedef enum {
-  IdsNvThermalHTCEnDisabled = 0,///<Disabled
-  IdsNvThermalHTCEnEnabled = 1,///<Enabled
-  IdsNvThermalHTCEnAuto = 3,///<Auto
-} IdsNvThermalHTCEn;
-
-///HTC Override
-///Enable or disable Thermal Control Override
-typedef enum {
-  IdsNvThermalHTCOverrideDisabled = 0,///<Disabled
-  IdsNvThermalHTCOverrideEnabled = 1,///<Enabled
-} IdsNvThermalHTCOverride;
-
-///HTC P-state limit select
-///Specifies the P-state limit of all cores when in the P-state based HTC-active state
-#define IdsNvThermalHtcPstateLimitMin 0
-#define IdsNvThermalHtcPstateLimitMax 7
-
-///HTC Temperature Hysteresis
-///Sets the temperature hysteresis for HTC. D18F3x64[27:24]
-#define IdsNvThermalHTCTempHysMin 0
-#define IdsNvThermalHTCTempHysMax 0xF
-
-///HTC Activation Temp
-///Sets the HTC temperature limit. D18F3x64[22:16]
-#define IdsNvThermalHTCActTempMin 0
-#define IdsNvThermalHTCActTempMax 0x7F
-
-///Bank Interleave
-///Interleave memory blocks across the DRAM chip selects for node 0.
-typedef enum {
-  IdsNvMemMappingBankInterleaveDisabled = 0,///<Disabled
-  IdsNvMemMappingBankInterleaveAuto = 1,///<Auto
-} IdsNvMemMappingBankInterleave;
-
-///DRAM Channel Interleave
-///Interleave between two DCTs when they are in unganged mode.
-typedef enum {
-  IdsNvMemMappingChlInterleaveAddress_bit_6 = 0,///<Address bit 6
-  IdsNvMemMappingChlInterleaveAddress_bit_12 = 1,///<Address bit 12
-  IdsNvMemMappingChlInterleaveHash__exclusive_OR_of_address_bits_20_16__6_ = 2,///<Hash: exclusive OR of address bits[20:16, 6]
-  IdsNvMemMappingChlInterleaveHash__excluseive_OR_of_address_bits_20_16__9_ = 3,///<Hash: excluseive OR of address bits[20:16, 9]
-  IdsNvMemMappingChlInterleaveAddress_bit_8 = 4,///<Address bit 8
-  IdsNvMemMappingChlInterleaveAddress_bit_9 = 5,///<Address bit 9
-  IdsNvMemMappingChlInterleaveDisabled = 0xF,///<Disabled
-  IdsNvMemMappingChlInterleaveAuto = 0xFF,///<Auto
-} IdsNvMemMappingChlInterleave;
-
-///ECC Symbol Size
-///ECC symbol size and code selection. D18F3x180[25]
-typedef enum {
-  IdsNvEccSymbolSizex4 = 0,///<x4
-  IdsNvEccSymbolSizex8 = 1,///<x8
-  IdsNvEccSymbolSizeAuto = 3,///<Auto
-} IdsNvEccSymbolSize;
-
-///DRAM prefetches triggered from CPU requests
-///Enable or disable DRAM prefetches Prefetch triggered by CPU requests.
-typedef enum {
-  IdsNvPrefetchPrefCpuDis0 = 0,///<0
-  IdsNvPrefetchPrefCpuDis1 = 1,///<1
-  IdsNvPrefetchPrefCpuDisAuto = 3,///<Auto
-} IdsNvPrefetchPrefCpuDis;
-
-///HW prefetch training on SW Prefetches
-///Enable or disable Hardware Prefetch training on Software Prefetches
-typedef enum {
-  IdsNvPrefetchDisHWPFforSWPF0 = 0,///<0
-  IdsNvPrefetchDisHWPFforSWPF1 = 1,///<1
-  IdsNvPrefetchDisHWPFforSWPFAuto = 3,///<Auto
-} IdsNvPrefetchDisHWPFforSWPF;
-
-///Hardware Prefetches
-///Enable or disable Hardware Prefetches.
-typedef enum {
-  IdsNvPrefetchDisHWPF0 = 0,///<0
-  IdsNvPrefetchDisHWPF1 = 1,///<1
-  IdsNvPrefetchDisHWPFAuto = 3,///<Auto
-} IdsNvPrefetchDisHWPF;
-
-///UMI Gen2
-///Enable or disable UMI link Gen2
-typedef enum {
-  IdsNvFchGppUmiGen2Disabled = 0,///<Disabled
-  IdsNvFchGppUmiGen2Enabled = 1,///<Enabled
-} IdsNvFchGppUmiGen2;
-
-///SATA Controller
-///Disable or enable OnChip SATA controller
-typedef enum {
-  IdsNvFchSataEnableDisabled = 0,///<Disabled
-  IdsNvFchSataEnableEnabled = 1,///<Enabled
-} IdsNvFchSataEnable;
-
-///SATA Mode
-///Select OnChip SATA Type
-typedef enum {
-  IdsNvFchSataClassNative_IDE = 0,///<Native IDE
-  IdsNvFchSataClassRAID = 1,///<RAID
-  IdsNvFchSataClassAHCI = 3,///<AHCI
-  IdsNvFchSataClassLegacy_IDE = 3,///<Legacy IDE
-  IdsNvFchSataClassIDE__AHCI = 4,///<IDE->AHCI
-  IdsNvFchSataClassAHCI_as_ID_0x7804 = 5,///<AHCI as ID 0x7804
-  IdsNvFchSataClassIDE__AHCI_as_ID_0x7804 = 6,///<IDE->AHCI as ID 0x7804
-} IdsNvFchSataClass;
-
-///OnChip IDE
-///Select OnChip IDE controller mode
-typedef enum {
-  IdsNvFchSataIdeModeLegacy_IDE = 0,///<Legacy IDE
-  IdsNvFchSataIdeModeNative_IDE = 1,///<Native IDE
-} IdsNvFchSataIdeMode;
-
-///IDE Controller
-///Disable or enable OnChip IDE controller
-typedef enum {
-  IdsNvFchSataIdeEnableDisabled = 0,///<Disabled
-  IdsNvFchSataIdeEnableEnabled = 1,///<Enabled
-} IdsNvFchSataIdeEnable;
-
-///XHC Switch (Bus 0 Dev 16 Fn 0/1)
-///Select disable or enable XHCI HCs (Bus 0 Dev 16 Fn 0/1)
-typedef enum {
-  IdsNvFchUsbXhciSwitchDisabled = 0,///<Disabled
-  IdsNvFchUsbXhciSwitchEnabled = 1,///<Enabled
-} IdsNvFchUsbXhciSwitch;
-
-///USB1(Bus 0 Dev 18 Fn 0/2)
-///Select disable or enable USB1 HCs (Bus 0 Dev 18 Fn 0/2)
-typedef enum {
-  IdsNvFchUsbOhci1EnableDisabled = 0,///<Disabled
-  IdsNvFchUsbOhci1EnableEnabled = 1,///<Enabled
-} IdsNvFchUsbOhci1Enable;
-
-///USB2 (Bus 0 Dev 19 Fn 0/2)
-///Select disable or enable USB2 HCs (Bus 0 Dev 19 Fn 0/2)
-typedef enum {
-  IdsNvFchUsbOhci2EnableDisabled = 0,///<Disabled
-  IdsNvFchUsbOhci2EnableEnabled = 1,///<Enabled
-} IdsNvFchUsbOhci2Enable;
-
-///USB3 (Bus 0 Dev 22 Fn 0/2)
-///Select disable or enable USB3 HCs (Bus 0 Dev 22 Fn 0/2)
-typedef enum {
-  IdsNvFchUsbOhci3EnableDisabled = 0,///<Disabled
-  IdsNvFchUsbOhci3EnableEnabled = 1,///<Enabled
-} IdsNvFchUsbOhci3Enable;
-
-///USB4 (Bus 0 Dev 20 Fn 5)
-///Select disable or enable USB4 HC (Bus 0 Dev 20 Fn 5)
-typedef enum {
-  IdsNvFchUsbOhci4EnableDisabled = 0,///<Disabled
-  IdsNvFchUsbOhci4EnableEnabled = 1,///<Enabled
-} IdsNvFchUsbOhci4Enable;
-
-///Hardware Monitor Enable
-///Master switch to enable or disable hardware monitor function
-typedef enum {
-  IdsNvFchHwmEnableDisabled = 0,///<Disabled
-  IdsNvFchHwmEnableEnabled = 1,///<Enabled
-} IdsNvFchHwmEnable;
-
-///In-Chip IR
-///Enable or disable the In-Chip IR
-typedef enum {
-  IdsNvFchIrConfigDisabled = 0,///<Disabled
-  IdsNvFchIrConfigRX_TX0_Only = 1,///<RX_TX0 Only
-  IdsNvFchIrConfigRX_TX1_Only = 2,///<RX_TX1 Only
-  IdsNvFchIrConfigRX__TX0__and_TX1 = 3,///<RX, TX0, and TX1
-} IdsNvFchIrConfig;
-
-///SD Configuration Mode
-///Select SD Mode
-typedef enum {
-  IdsNvFchSdConfigDisabled = 0,///<Disabled
-  IdsNvFchSdConfigADMA = 1,///<ADMA
-  IdsNvFchSdConfigDMA = 2,///<DMA
-  IdsNvFchSdConfigPIO = 3,///<PIO
-} IdsNvFchSdConfig;
-
-///Azalia Device
-///Select disable or enable Azalia Device
-typedef enum {
-  IdsNvFchAzaliaControlAuto = 0,///<Auto
-  IdsNvFchAzaliaControlDisabled = 1,///<Disabled
-  IdsNvFchAzaliaControlEnabled = 2,///<Enabled
-  IdsNvFchAzaliaControlReserved = 3,///<Reserved
-} IdsNvFchAzaliaControl;
-
-///Integrated Graphics Controller
-///Enable Integrate Graphics controller
-typedef enum {
-  IdsNvGnbGfxiGPU_CONTROLAuto = 0,///<Auto
-  IdsNvGnbGfxiGPU_CONTROLDisabled = 1,///<Disabled
-  IdsNvGnbGfxiGPU_CONTROLForces = 2,///<Forces
-} IdsNvGnbGfxiGPU_CONTROL;
-
-///UMA Frame buffer Size
-///Set UMA FB size
-typedef enum {
-  IdsNvGnbGfxUmaFrameBufferSizeAuto = 0,///<Auto
-  IdsNvGnbGfxUmaFrameBufferSize32M = 1,///<32M
-  IdsNvGnbGfxUmaFrameBufferSize64M = 2,///<64M
-  IdsNvGnbGfxUmaFrameBufferSize128M = 3,///<128M
-  IdsNvGnbGfxUmaFrameBufferSize256M = 4,///<256M
-  IdsNvGnbGfxUmaFrameBufferSize384M = 5,///<384M
-  IdsNvGnbGfxUmaFrameBufferSize512M = 6,///<512M
-  IdsNvGnbGfxUmaFrameBufferSize1G = 7,///<1G
-  IdsNvGnbGfxUmaFrameBufferSize2G = 8,///<2G
-  IdsNvGnbGfxUmaFrameBufferSize4G = 9,///<4G
-} IdsNvGnbGfxUmaFrameBufferSize;
-
-///NB Azalia
-///Enable Integrate HD Audio controller
-typedef enum {
-  IdsNvGnbGfxNbAzaliaDisabled = 0,///<Disabled
-  IdsNvGnbGfxNbAzaliaEnabled = 1,///<Enabled
-  IdsNvGnbGfxNbAzaliaAuto = 0xf,///<Auto
-} IdsNvGnbGfxNbAzalia;
-
-///PSPP Policy
-///PCIe speed power policy
-typedef enum {
-  IdsNvGnbPciePsppPolicyDisabled = 0,///<Disabled
-  IdsNvGnbPciePsppPolicyPerformance = 1,///<Performance
-  IdsNvGnbPciePsppPolicyBalanced_High = 2,///<Balanced-High
-  IdsNvGnbPciePsppPolicyBalanced_Low = 3,///<Balanced-Low
-  IdsNvGnbPciePsppPolicyPower_Saving = 4,///<Power Saving
-  IdsNvGnbPciePsppPolicyAuto = 5,///<Auto
-} IdsNvGnbPciePsppPolicy;
-
-///IOMMU
-///
-typedef enum {
-  IdsNvGnbNbIOMMUDisabled = 0,///<Disabled
-  IdsNvGnbNbIOMMUEnabled = 1,///<Enabled
-} IdsNvGnbNbIOMMU;
-
-#endif // _IDSF15TNNVDEF_H_
-

pi/amd/00630F01/Proc/IDS/IdsLib.h

diff --git a/pi/amd/00630F01/Proc/IDS/IdsLib.h b/pi/amd/00630F01/Proc/IDS/IdsLib.h
deleted file mode 100644
index 2aec84a..0000000
--- a/pi/amd/00630F01/Proc/IDS/IdsLib.h
+++ /dev/null
@@ -1,381 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD IDS Routines
- *
- * Contains AMD AGESA Integrated Debug Macros
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _IDS_LIB_H_
-#define _IDS_LIB_H_
-#include "OptionsIds.h"
-#include "cpuRegisters.h"
-#include "cpuApicUtilities.h"
-#include "Table.h"
-///Specific time stamp performance analysis which need ids control support
-#if IDSOPT_CONTROL_ENABLED == TRUE
-  #define PERF_SPEC_TS_ANALYSE(StdHeader)  IdsPerfSpecTsAnalyse(StdHeader)
-#else
-  #define PERF_SPEC_TS_ANALYSE(StdHeader)
-#endif
-
-#define IDS_NV_READ(NvValue, Nvid, IdsNvPtr, StdHeader)\
-  NvValue = AmdIdsNvReader ((Nvid), (IdsNvPtr), (StdHeader));
-
-#define IDS_NV_READ_SKIP(NvValue, Nvid, IdsNvPtr, StdHeader)\
-  if (((NvValue) = AmdIdsNvReader ((Nvid), (IdsNvPtr), (StdHeader))) != IDS_UNSUPPORTED)
-#define IDS_GET_MASK32(HighBit, LowBit) ((((UINT32) 1 << (HighBit - LowBit + 1)) - 1) << LowBit)
-
-#define IDS_MAX_MEM_ITEMS   80     ///< Maximum IDS Mem Table Size in Heap.
-///Macro for Ids family feat
-#define MAKE_IDS_FAMILY_FEAT_ALL_CORES(FEAT_ID, FAMILY, FUNCTION) \
-        {IDS_FEAT_COMMON, IDS_ALL_CORES, FEAT_ID, FAMILY, FUNCTION}
-
-///Macro for signature
-#define MAKE_SIGNATURE(a, b, c, d) ((UINT32) ((d << 24) | (c << 16) | (b << 8) | a))
-typedef UINT32 SIGNATURE;
-
-// TYPEDEFS, STRUCTURES, ENUMS
-//
-
-typedef AGESA_STATUS (*PF_IDS_AP_TASK) (VOID *AptaskPara, AMD_CONFIG_PARAMS *StdHeader);
-
-///Structure define for IdsAgesaRunFcnOnApLate
-typedef struct _IDSAPLATETASK {
-  PF_IDS_AP_TASK  ApTask; ///< Point function which AP need to do
-  VOID *ApTaskPara; ///< Point to Ap function parameter1
-} IDSAPLATETASK;
-
-/// Data Structure defining IDS Data in HEAP
-/// This data structure contains information that is stored in HEAP and will be
-/// used in IDS backend function. It includes the size of memory to be allocated
-/// for IDS, the relative offsets of the mapping table IDS setup options, the GRA
-/// table and the register table to override mem setting. It also includes a base
-/// address of IDS override image which will be used to control the behavior of
-/// AGESA testpoint if this feature is enabled.
-typedef struct {
-  BOOLEAN IgnoreIdsDefault;             ///< Control ignore Default value of IDS NV list specified by IdsNvTableOffset
-  UINT64 IdsImageBase;                 ///< IDS Override Image Base Address
-  UINT32 IdsHeapMemSize;              ///< IDS Total Memory Size in Heap
-  UINT32 IdsNvTableOffset;            ///< Offset of IDS NV Table
-  UINT32 IdsMemTableOffset;           ///< Offset of IDS Mem Table
-  UINT32 IdsExtendOffset;                ///< Offset of Ids extend heap
-} IDS_CONTROL_STRUCT;
-
-/// Data Structure of Parameters for TestPoint_TSC.
-typedef struct {
-  UINT32 LineInFile;                    ///< Line of current time counter
-  UINT64 Description;                  ///<Description ID
-  UINT64 StartTsc;                  ///< The StartTimer of TestPoint_TSC
-} TestPoint_TSC;
-
-#define MAX_PERFORMANCE_UNIT_NUM (IDS_TP_END - TP_BEGINPROCAMDINITEARLY)
-/// Data Structure of Parameters for TP_Perf_STRUCT.
-typedef struct {
-  UINT32 Signature;                ///< "PERF"
-  UINT32 Version;       ///< version
-  UINT32 Index;                    ///< The Index of TP_Perf_STRUCT
-  UINT32 TscInMhz;            ///< Tsc counter in 1 mhz
-  TestPoint_TSC TP[MAX_PERFORMANCE_UNIT_NUM];       ///< The TP of TP_Perf_STRUCT
-} TP_Perf_STRUCT;
-
-///Bus speed Optimization
-typedef enum {
-  IDS_POWER_POLICY_PERFORMANCE = 0,              ///< Performance
-  IDS_POWER_POLICY_POWER = 1,              ///< Power
-  IDS_POWER_POLICY_AUTO = 3,              ///< Auto
-} IDS_NV_AMDBUSSPEEDOPTIMIZATION;
-
-///IDS early AP task
-typedef struct _IDS_EARLY_AP_TASK0 {
-  UINT8 Core;             ///< Core to run Aptask
-  AP_TASK ApTask;        ///< Speicify task property
-} IDS_EARLY_AP_TASK0;
-
-#define IDS_EARLY_AP_TASK_PARA_NUM 100
-///IDS early AP task
-typedef struct _IDS_EARLY_AP_TASK {
-  IDS_EARLY_AP_TASK0 Ap_Task0;    ///< Ap Task exclude parameter buffer
-  UINT8 Parameters[IDS_EARLY_AP_TASK_PARA_NUM];          ///< Parameter buffer
-} IDS_EARLY_AP_TASK;
-
-///AP service Time Point
-typedef enum {
-  IDS_AP_RUN_CODE_EARLY,       ///< Amdinitearly
-  IDS_AP_RUN_CODE_POST,        ///< Amdinitpost
-  IDS_AP_RUN_CODE_LATE,        ///< After AmdInitPost
-  IDS_AP_RUN_CODE_END          ///< Last element
-} IDS_AP_RUN_CODE_TIMEPOINT;
-
-/// Parameters for IdsRunCodeOnCores
-typedef struct _IDS_RUNCODE_PARAMS {
-  IDS_AP_RUN_CODE_TIMEPOINT TimePoint; ///< TimePoint
-  UINT8 Socket;                           ///< IDS_ALL_SOCKET: all sockets
-  UINT8 Core;                             ///< IDS_ALL_CORE: all cores
-  PF_AP_TASK_IO ApTask;                    ///< Only support this type function
-  UINT16 ParamsDataSizeInDwords;   ///< Size of the data to be transferred rounded up to the nearest dword
-  VOID   *ParamsDataPtr;           ///< Pointer to the parameter
-} IDS_RUNCODE_PARAMS;
-
-
-#define IDS_ALL_SOCKET 0xFF
-#define IDS_ALL_MODULE 0xFF
-#define IDS_ALL_CORE   0xFF
-#define IDS_ALL_DCT   0xFF
-
-/*----------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *----------------------------------------------------------------------------------------
- */
-
-IDS_STATUS
-IdsSubUCode (
-  IN OUT  VOID *DataPtr,
-  IN OUT  AMD_CONFIG_PARAMS *StdHeader,
-  IN      IDS_NV_ITEM *IdsNvPtr
-  );
-
-IDS_STATUS
-IdsSubGangingMode (
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader,
-  IN       IDS_NV_ITEM *IdsNvPtr
-  );
-
-IDS_STATUS
-IdsSubPowerDownMode (
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader,
-  IN       IDS_NV_ITEM *IdsNvPtr
-  );
-
-IDS_STATUS
-IdsSubAllMemClkEn (
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader,
-  IN       IDS_NV_ITEM *IdsNvPtr
-  );
-
-IDS_STATUS
-IdsSubPostPState (
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader,
-  IN       IDS_NV_ITEM *IdsNvPtr
-  );
-
-IDS_STATUS
-IdsSubPowerPolicyOverride (
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader,
-  IN       IDS_NV_ITEM *IdsNvPtr
-  );
-
-AGESA_STATUS
-AmdIdsCtrlInitialize (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-IDS_STATUS
-AmdIdsNvReader (
-  IN      UINT16 IdsNvId,
-  IN      IDS_NV_ITEM *NvTablePtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-AmdGetIdsNvTable (
-  IN OUT   VOID  **IdsNvTable,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-IdsOutPort (
-  IN       UINT32 Addr,
-  IN       UINT32 Value,
-  IN       UINT32 Flag
-  );
-
-IDS_STATUS
-IdsCommonReturn (
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader,
-  IN       IDS_NV_ITEM *IdsNvPtr
-  );
-
-AGESA_STATUS
-IdsAgesaRunFcnOnApLate  (
-  IN       UINTN               ApicIdOfCore,
-  IN         IDSAPLATETASK  *ApLateTaskPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-IdsRunCodeOnCores (
-  IN       IDS_RUNCODE_PARAMS *PIdsRuncodeParams,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-IdsAgesaRunFcnOnAllCoresLate  (
-  IN         IDSAPLATETASK  *ApLateTaskPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-IDS_STATUS
-IdsParseFeatTbl (
-  IN       AGESA_IDS_OPTION IdsOption,
-  IN       CONST IDS_FAMILY_FEAT_STRUCT * PIdsFeatTbl[],
-  IN OUT   VOID *DataPtr,
-  IN       IDS_NV_ITEM *IdsNvPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-IDS_STATUS
-IdsSubPowerDownCtrl (
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader,
-  IN       IDS_NV_ITEM *IdsNvPtr
-  );
-
-IDS_STATUS
-IdsSubHdtOut (
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader,
-  IN       IDS_NV_ITEM *IdsNvPtr
-  );
-
-UINT8
-IdsGetNumPstatesFamCommon (
-  IN OUT   AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-VOID
-IdsApRunCodeOnAllLocalCores (
-  IN       AP_TASK *TaskPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-IDS_STATUS
-IdsSubTargetPstate (
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader,
-  IN       IDS_NV_ITEM *IdsNvPtr
-  );
-
-VOID
-IdsMakePciRegEntry (
-  IN OUT   TABLE_ENTRY_FIELDS **TableEntry,
-  IN       UINT64 Family,
-  IN       UINT64 Revision,
-  IN       UINT32 PciAddr,
-  IN       UINT32 Data,
-  IN        UINT32 Mask
-  );
-
-VOID
-IdsLibPciWriteBitsToAllNode (
-  IN       PCI_ADDR PciAddress,
-  IN       UINT8 Highbit,
-  IN       UINT8 Lowbit,
-  IN       UINT32 *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-VOID
-IdsRunCodeOnCoreEarly (
-  IN       UINT8 Socket,
-  IN       UINT8 Core,
-  IN       AP_TASK* ApTask,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-IdsGetMask64bits (
-  IN       UINT64 RegVal,
-  IN       UINT8  Highbit,
-  IN       UINT8  Lowbit,
-  IN OUT   UINT64 *AndMask,
-  IN OUT   UINT64 *OrMask
-  );
-
-VOID
-IdsGetMask32bits (
-  IN       UINT32 RegVal,
-  IN       UINT8  Highbit,
-  IN       UINT8  Lowbit,
-  IN OUT   UINT32 *AndMask,
-  IN OUT   UINT32 *OrMask
-  );
-
-VOID
-IdsGetMask16bits (
-  IN       UINT16 RegVal,
-  IN       UINT8  Highbit,
-  IN       UINT8  Lowbit,
-  IN OUT   UINT32 *AndMask,
-  IN OUT   UINT32 *OrMask
-  );
-
-VOID
-IdsGetStartEndModule (
-  IN       UINT8  ModuleId,
-  IN OUT   UINT8 *StartModule,
-  IN OUT   UINT8 *EndModule
-  );
-
-
-VOID
-IdsGetStartEndSocket (
-  IN       UINT8  SocketId,
-  IN OUT   UINT8 *StartSocket,
-  IN OUT   UINT8 *EndSocket
-  );
-
-BOOLEAN
-IdsCheckPciExist (
-  IN       PCI_ADDR PciAddr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-IdsLibDataMaskSet32 (
-  IN OUT   UINT32 *Value,
-  IN       UINT32  AndMask,
-  IN       UINT32  OrMask
-  );
-#define IDS_CPB_BOOST_DIS_IGNORE  0xFFFFFFFFul
-
-#endif //_IDS_LIB_H_
-

pi/amd/00630F01/Proc/IDS/OptionsIds.h

diff --git a/pi/amd/00630F01/Proc/IDS/OptionsIds.h b/pi/amd/00630F01/Proc/IDS/OptionsIds.h
deleted file mode 100644
index 0d58e7e..0000000
--- a/pi/amd/00630F01/Proc/IDS/OptionsIds.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * IDS Option File
- *
- * This file is used to switch on/off IDS features.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Core
- * @e \$Revision: 281181 $   @e \$Date: 2013-12-18 02:18:55 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _OPTION_IDS_H_
-#define _OPTION_IDS_H_
-
-/**
- *
- *  This file generates the defaults tables for the Integrated Debug Support
- * Module. The documented build options are imported from a user controlled
- * file for processing. The build options for the Integrated Debug Support
- * Module are listed below:
- *
- *    IDSOPT_IDS_ENABLED
- *    IDSOPT_ERROR_TRAP_ENABLED
- *    IDSOPT_CONTROL_ENABLED
- *
- *      Warning: When you enable the IDSOPT_CONTROL_NV_TO_CMOS feature.
- *      please make the cmos region defined by IDS_OPT_CMOS_REGION_START &
- *      IDS_OPT_CMOS_REGION_END can be touched between IDS HOOK point
- *      IDS_CPU_Early_Override and IDS_BEFORE_AP_EARLY_HALT of BSP
- *
- *      IDSOPT_CONTROL_NV_TO_CMOS
- *        IDS_OPT_CMOS_INDEX_PORT
- *        IDS_OPT_CMOS_DATA_PORT
- *        IDS_OPT_CMOS_REGION_START
- *        IDS_OPT_CMOS_REGION_END
- *
- *    IDSOPT_TRACING_ENABLED
- *      IDSOPT_TRACING_CONSOLE_HDTOUT
- *      IDSOPT_TRACING_CONSOLE_SERIALPORT
- *        IDSOPT_SERIAL_PORT (default 0x3F8)
- *      IDSOPT_TRACING_CONSOLE_REDIRECT_IO
- *        IDSOPT_DEBUG_PRINT_IO_PORT (default 0x80)
- *      IDSOPT_TRACING_CONSOLE_RAM
- *        IDSOPT_DPRAM_BASE
- *        IDSOPT_DPRAM_SIZE
- *        IDSOPT_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL (default FALSE)
- *      IDSOPT_CUSTOMIZE_TRACING_SERVICE
- *      IDSOPT_CUSTOMIZE_TRACING_SERVICE_INIT
- *      IDSOPT_CUSTOMIZE_TRACING_SERVICE_EXIT
- *
- *    IDSOPT_TRACE_BLD_CFG
- *    IDSOPT_PERF_ANALYSIS
- *    IDSOPT_ASSERT_ENABLED
- *    IDS_DEBUG_PORT
- *    IDSOPT_CAR_CORRUPTION_CHECK_ENABLED
- *    IDSOPT_DEBUG_CODE_ENABLED
- *    IDSOPT_IDT_EXCEPTION_TRAP
- *    IDSOPT_C_OPTIMIZATION_DISABLED
- *
- **/
-
-#endif

pi/amd/00630F01/binaryPI/AGESA.c

diff --git a/pi/amd/00630F01/binaryPI/AGESA.c b/pi/amd/00630F01/binaryPI/AGESA.c
deleted file mode 100644
index 7a6851d..0000000
--- a/pi/amd/00630F01/binaryPI/AGESA.c
+++ /dev/null
@@ -1,696 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Agesa structures and definitions
- *
- * Contains AMD AGESA core interface
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Include
- * @e \$Revision: 85818 $   @e \$Date: 2013-01-11 17:04:21 -0600 (Fri, 11 Jan 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- *               2013 - 2014, Sage Electronic Engineering, LLC
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#include <AGESA.h>
-#include <agesawrapper.h>
-#include <AcpiLib.h>
-#include <amdlib.h>
-#include <cbfs.h>
-#include <FchCommonCfg.h>
-#include <Fch.h>
-#include <FchDef.h>
-#include <FieldAccessors.h>
-
-#define CONFIG_CBFS_AGESA_NAME "AGESA"
-
-AGESA_STATUS
-HeapAllocateBuffer (
-  IN OUT   VOID *AllocateHeapParams,
-  IN OUT   VOID *StdHeader
-  );
-
-AGESA_STATUS
-HeapDeallocateBuffer (
-  IN       UINT32 BufferHandle,
-  IN       VOID *StdHeader
-  );
-
-CONST UINT32 ImageSignature = IMAGE_SIGNATURE;
-CONST UINT32 ModuleSignature = MODULE_SIGNATURE;
-CONST CHAR8 ModuleIdentifier[] = AGESA_ID;
-
-/************************************************************************
- *
- *  AGESA Basic Level interface structure definition and function prototypes
- *
- ***********************************************************************/
-
-
-/**********************************************************************
- * Interface call:  AmdCreateStruct
- **********************************************************************/
-AGESA_STATUS
-AmdCreateStruct (
-  IN OUT   AMD_INTERFACE_PARAMS *InterfaceParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	InterfaceParams->StdHeader.Func = AMD_CREATE_STRUCT;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(InterfaceParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdReleaseStruct
- **********************************************************************/
-AGESA_STATUS
-AmdReleaseStruct (
-  IN OUT   AMD_INTERFACE_PARAMS *InterfaceParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	InterfaceParams->StdHeader.Func = AMD_RELEASE_STRUCT;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(InterfaceParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitReset
- **********************************************************************/
-AGESA_STATUS
-AmdInitReset (
-  IN OUT   AMD_RESET_PARAMS     *ResetParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	ResetParams->StdHeader.Func = AMD_INIT_RESET;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(ResetParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitEarly
- **********************************************************************/
-AGESA_STATUS
-AmdInitEarly (
-  IN OUT   AMD_EARLY_PARAMS     *EarlyParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	EarlyParams->StdHeader.Func = AMD_INIT_EARLY;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(EarlyParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitPost
- **********************************************************************/
-AGESA_STATUS
-AmdInitPost (
-  IN OUT   AMD_POST_PARAMS      *PostParams         ///< Amd Cpu init param
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	PostParams->StdHeader.Func = AMD_INIT_POST;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(PostParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitEnv
- **********************************************************************/
-AGESA_STATUS
-AmdInitEnv (
-  IN OUT   AMD_ENV_PARAMS       *EnvParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	EnvParams->StdHeader.Func = AMD_INIT_ENV;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(EnvParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitMid
- **********************************************************************/
-AGESA_STATUS
-AmdInitMid (
-  IN OUT   AMD_MID_PARAMS       *MidParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	MidParams->StdHeader.Func = AMD_INIT_MID;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(MidParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitLate
- **********************************************************************/
-AGESA_STATUS
-AmdInitLate (
-  IN OUT   AMD_LATE_PARAMS      *LateParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	LateParams->StdHeader.Func = AMD_INIT_LATE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(LateParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitRecovery
- **********************************************************************/
-AGESA_STATUS
-AmdInitRecovery (
-  IN OUT   AMD_RECOVERY_PARAMS    *RecoveryParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	RecoveryParams->StdHeader.Func = AMD_INIT_RECOVERY;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(RecoveryParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitResume
- **********************************************************************/
-AGESA_STATUS
-AmdInitResume (
-  IN       AMD_RESUME_PARAMS    *ResumeParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	ResumeParams->StdHeader.Func = AMD_INIT_RESUME;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(ResumeParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdS3LateRestore
- **********************************************************************/
-AGESA_STATUS
-AmdS3LateRestore (
-  IN OUT   AMD_S3LATE_PARAMS    *S3LateParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	S3LateParams->StdHeader.Func = AMD_S3LATE_RESTORE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(S3LateParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdS3Save
- **********************************************************************/
-AGESA_STATUS
-AmdS3Save (
-  IN OUT   AMD_S3SAVE_PARAMS    *AmdS3SaveParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdS3SaveParams->StdHeader.Func = AMD_S3_SAVE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdS3SaveParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdLateRunApTask
- **********************************************************************/
-AGESA_STATUS
-AmdLateRunApTask (
-  IN       AP_EXE_PARAMS  *AmdApExeParams
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdApExeParams->StdHeader.Func = AMD_LATE_RUN_AP_TASK;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdApExeParams);
-}
-
-/**********************************************************************
- * Interface service call:  AmdGetApicId
- **********************************************************************/
-AGESA_STATUS
-AmdGetApicId (
-  IN OUT AMD_APIC_PARAMS *AmdParamApic
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdParamApic->StdHeader.Func = AMD_GET_APIC_ID;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdParamApic);
-}
-
-/**********************************************************************
- * Interface service call:  AmdGetPciAddress
- **********************************************************************/
-AGESA_STATUS
-AmdGetPciAddress (
-  IN OUT   AMD_GET_PCI_PARAMS *AmdParamGetPci
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdParamGetPci->StdHeader.Func = AMD_GET_PCI_ADDRESS;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdParamGetPci);
-}
-
-/**********************************************************************
- * Interface service call:  AmdIdentifyCore
- **********************************************************************/
-AGESA_STATUS
-AmdIdentifyCore (
-  IN OUT  AMD_IDENTIFY_PARAMS *AmdParamIdentify
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdParamIdentify->StdHeader.Func = AMD_IDENTIFY_CORE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdParamIdentify);
-}
-
-/**********************************************************************
- * Interface service call:  AmdReadEventLog
- **********************************************************************/
-AGESA_STATUS
-AmdReadEventLog (
-  IN       EVENT_PARAMS *Event
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	Event->StdHeader.Func = AMD_READ_EVENT_LOG;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(Event);
-}
-
-/**********************************************************************
- * Interface service call:  AmdIdentifyDimm
- **********************************************************************/
-AGESA_STATUS
-AmdIdentifyDimm (
-  IN OUT   AMD_IDENTIFY_DIMM *AmdDimmIdentify
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdDimmIdentify->StdHeader.Func = AMD_IDENTIFY_DIMMS;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdDimmIdentify);
-}
-
-AGESA_STATUS
-AmdIdsRunApTaskLate (
-  IN       AP_EXE_PARAMS  *AmdApExeParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdApExeParams->StdHeader.Func = -1;
-	return AGESA_UNSUPPORTED;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdApExeParams);
-}
-
-/**********************************************************************
- * Interface service call:  AmdGet2DDataEye
- **********************************************************************/
-AGESA_STATUS
-AmdGet2DDataEye (
-  IN OUT   AMD_GET_DATAEYE *AmdGetDataEye
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdGetDataEye->StdHeader.Func = AMD_GET_2D_DATA_EYE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdGetDataEye);
-}
-
-/**********************************************************************
- * FCH Functions
- **********************************************************************/
-
-VOID FchInitS3LateRestore (IN FCH_DATA_BLOCK *FchDataPtr);
-VOID FchInitS3EarlyRestore (IN FCH_DATA_BLOCK *FchDataPtr);
-
-VOID
-FchInitS3EarlyRestore (
-  IN      FCH_DATA_BLOCK     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	FchDataPtr->StdHeader->Func = FCH_INIT_S3_EARLY_RESTORE;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-VOID
-FchInitS3LateRestore (
-  IN      FCH_DATA_BLOCK     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	FchDataPtr->StdHeader->Func = FCH_INIT_S3_LATE_RESTORE;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * WaitForEcLDN9MailboxCmdAck
- *
- *
- * @param[in] StdHeader
- *
- */
-VOID
-WaitForEcLDN9MailboxCmdAck (
-  IN AMD_CONFIG_PARAMS  *StdHeader
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(StdHeader);
-}
-
-/**
- * ImcSleep - IMC Sleep.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcSleep (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * SoftwareDisableImc - Software disable IMC strap
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-SoftwareDisableImc (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * ImcEnableSurebootTimer - IMC Enable Sureboot Timer.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcEnableSurebootTimer (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * ImcDisableSurebootTimer - IMC Disable Sureboot Timer.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcDisableSurebootTimer (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * ImcWakeup - IMC Wakeup.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcWakeup (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * ImcIdle - IMC Idle.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcIdle (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-// TODO This has to be removed
-AGESA_STATUS
-HeapAllocateBuffer (
-  IN OUT   VOID *AllocateHeapParams,
-  IN OUT   VOID *StdHeader
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-
-	AMD_INTERFACE_PARAMS InterfaceParams = {};
-
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-
-	InterfaceParams.StdHeader = *(AMD_CONFIG_PARAMS*)StdHeader;
-	InterfaceParams.StdHeader.Func = AMD_HEAP_ALLOCATE_BUFFER;
-
-	InterfaceParams.AllocationMethod = PreMemHeap;
-	InterfaceParams.NewStructPtr = AllocateHeapParams;
-
-	return Dispatcher(&InterfaceParams);
-}
-
-// TODO This has to be removed
-AGESA_STATUS
-HeapDeallocateBuffer (
-  IN       UINT32 BufferHandle,
-  IN       VOID *StdHeader
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-
-	AMD_INTERFACE_PARAMS InterfaceParams = {};
-
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-
-	InterfaceParams.StdHeader = *(AMD_CONFIG_PARAMS*)StdHeader;
-	InterfaceParams.StdHeader.Func = AMD_HEAP_DEALLOCATE_BUFFER;
-
-	InterfaceParams.NewStructPtr = &BufferHandle;
-
-	return Dispatcher(&InterfaceParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdSetValue
- **********************************************************************/
-AGESA_STATUS
-AmdSetValue (
-  IN       CONST AGESA_FIELD_NAME name,
-  IN OUT   VOID* value,
-  IN       UINT32 size
-  )
-{
-	AGESA_STATUS status = AGESA_UNSUPPORTED;
-
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-
-	AMD_ACCESSOR_PARAMS AccessorParams = {};
-
-	if (!module) return status;
-	Dispatcher = module->ModuleDispatcher;
-
-	AccessorParams.StdHeader.AltImageBasePtr = 0;
-	AccessorParams.StdHeader.CalloutPtr = NULL;
-	AccessorParams.StdHeader.Func = AMD_SET_VALUE;
-	AccessorParams.StdHeader.ImageBasePtr = 0;
-
-	AccessorParams.AllocationMethod = ByHost;
-	AccessorParams.FieldName = name;
-	AccessorParams.FieldValue = value;
-	AccessorParams.FieldSize = size;
-
-	status = Dispatcher(&AccessorParams);
-	return status;
-}
-
-/**********************************************************************
- * Interface call:  AmdGetValue
- **********************************************************************/
-AGESA_STATUS
-AmdGetValue (
-  IN       CONST AGESA_FIELD_NAME name,
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  )
-{
-	AGESA_STATUS status = AGESA_UNSUPPORTED;
-
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-
-	AMD_ACCESSOR_PARAMS AccessorParams = {};
-
-	ASSERT(module);
-	if (!module) return status;
-	Dispatcher = module->ModuleDispatcher;
-	ASSERT(Dispatcher);
-
-	AccessorParams.StdHeader.AltImageBasePtr = 0;
-	AccessorParams.StdHeader.CalloutPtr = NULL;
-	AccessorParams.StdHeader.Func = AMD_GET_VALUE;
-	AccessorParams.StdHeader.ImageBasePtr = 0;
-
-	AccessorParams.AllocationMethod = ByHost;
-	AccessorParams.FieldName = name;
-	AccessorParams.FieldValue = *value;
-	AccessorParams.FieldSize = size;
-
-	status = Dispatcher(&AccessorParams);
-	ASSERT(AGESA_SUCCESS == status);
-
-	*value = AccessorParams.FieldValue;
-	size = AccessorParams.FieldSize;
-
-	return status;
-}

pi/amd/00630F01/binaryPI/FieldAccessors.h

diff --git a/pi/amd/00630F01/binaryPI/FieldAccessors.h b/pi/amd/00630F01/binaryPI/FieldAccessors.h
deleted file mode 100644
index bfbccbe..0000000
--- a/pi/amd/00630F01/binaryPI/FieldAccessors.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/*****************************************************************************
- *
- * Copyright (c) 2013 - 2014, Sage Electronic Engineering, LLC
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _FIELDACCESSORS_H_
-#define _FIELDACCESSORS_H_
-
-#include "AGESA.h"
-
-/// AGESA value name
-typedef enum {
-	AMD_GLOBAL_USER_OPTIONS    = 0x00020000,
-	AMD_GLOBAL_NUM_SOCKETS     = 0x00020001,
-	AMD_GLOBAL_NUM_MODULES     = 0x00020002,
-} AGESA_FIELD_NAME;
-
-typedef AGESA_STATUS (*SETTER_ENTRY) (
-  IN OUT   VOID* value,
-  IN       UINT32 size
-  );
-
-typedef AGESA_STATUS (*GETTER_ENTRY) (
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-/// Accessor Interface.
-typedef struct {
-  IN       AMD_CONFIG_PARAMS   StdHeader;          ///< Standard configuration header
-  IN       AGESA_FIELD_NAME    FieldName;          ///< The service to init
-  IN       ALLOCATION_METHOD   AllocationMethod;   ///< For pointers, how to allocate space for copied data
-  IN OUT   VOID                *Struct;            ///< The struct for the service.
-  IN OUT   UINT32              FieldSize;          ///< The size of the data value.
-  IN OUT   VOID                *FieldValue;        ///< The value retrieved or set into the target structure.
-} AMD_ACCESSOR_PARAMS;
-
-
-/**********************************************************************
- * Interface call:  AmdSetValue
- **********************************************************************/
-AGESA_STATUS
-AmdGetValue (
-  IN       CONST AGESA_FIELD_NAME name,
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-/**********************************************************************
- * Interface call:  AmdSetValue
- **********************************************************************/
-AGESA_STATUS
-AmdSetValue (
-  IN       CONST AGESA_FIELD_NAME name,
-  IN OUT   VOID* value,
-  IN       UINT32 size
-  );
-
-/**
- * Dispatch Table.
- *
- * The push high dispatcher uses this table to find what entries are currently in the build image.
- */
-typedef struct {
-  UINT32              FunctionId;
-  SETTER_ENTRY        SetValueEntryPoint;
-  GETTER_ENTRY        GetValueEntryPoint;
-} ACCESSOR_DISPATCH_TABLE;
-
-AGESA_STATUS
-GetUserOptions(
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-AGESA_STATUS
-GetNumSockets(
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-AGESA_STATUS
-GetNumModules(
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-#endif /* _FIELDACCESSORS_H_ */

pi/amd/00630F01/binaryPI/gcc-intrin.h

diff --git a/pi/amd/00630F01/binaryPI/gcc-intrin.h b/pi/amd/00630F01/binaryPI/gcc-intrin.h
deleted file mode 100644
index a637715..0000000
--- a/pi/amd/00630F01/binaryPI/gcc-intrin.h
+++ /dev/null
@@ -1,833 +0,0 @@
-/*
-  Compatibility <intrin_x86.h> header for GCC -- GCC equivalents of intrinsic
-  Microsoft Visual C++ functions. Originally developed for the ReactOS
-  (<http://www.reactos.org/>) and TinyKrnl (<http://www.tinykrnl.org/>)
-  projects.
-
-  Copyright (c) 2006 KJK::Hyperion <hackbunny@reactos.com>
-                2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
-                2014 Sage Electronic Engineering, LLC
-  All rights reserved.
-
-  Permission is hereby granted, free of charge, to any person obtaining a
-  copy of this software and associated documentation files (the "Software"),
-  to deal in the Software without restriction, including without limitation
-  the rights to use, copy, modify, merge, publish, distribute, sublicense,
-  and/or sell copies of the Software, and to permit persons to whom the
-  Software is furnished to do so, subject to the following conditions:
-
-  The above copyright notice and this permission notice shall be included in
-  all copies or substantial portions of the Software.
-
-  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-  DEALINGS IN THE SOFTWARE.
-*/
-
-#if defined (__GNUC__)
-
-#if !defined(AMDLIB_OPTIMIZE)
-	#define AMDLIB_OPTIMIZE
-#endif
-
-/* I/O intrin functions.  */
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned char __inbyte(unsigned short Port)
-{
-  unsigned char value;
-
-  __asm__ __volatile__ (
-    "in  %1, %0"
-    : "=a" (value)
-    : "Nd" (Port)
-    );
-
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned short __inword(unsigned short Port)
-{
-  unsigned short value;
-
-  __asm__ __volatile__ (
-    "in  %1, %0"
-    : "=a" (value)
-    : "Nd" (Port)
-    );
-
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __indword(unsigned short Port)
-{
-  unsigned long value;
-
-  __asm__ __volatile__ (
-    "in  %1, %0"
-    : "=a" (value)
-    : "Nd" (Port)
-    );
-  return value;
-
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __outbyte(unsigned short Port,unsigned char Data)
-{
-  __asm__ __volatile__ (
-    "out  %0, %1"
-    :
-    : "a" (Data), "Nd" (Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __outword(unsigned short Port,unsigned short Data)
-{
-  __asm__ __volatile__ (
-    "out  %0, %1"
-    :
-    : "a" (Data), "Nd" (Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __outdword(unsigned short Port,unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "out  %0, %1"
-    :
-    : "a" (Data), "Nd" (Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __inbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "rep ; insb"
-    : "+D" (Buffer), "+c" (Count)
-    : "d"(Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __inwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "rep ; insw"
-    : "+D" (Buffer), "+c" (Count)
-    : "d"(Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __indwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "rep ; insl"
-    : "+D" (Buffer), "+c" (Count)
-    : "d"(Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __outbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "rep ; outsb"
-    : "+S" (Buffer), "+c" (Count)
-    : "d"(Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __outwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "rep ; outsw"
-    : "+S" (Buffer), "+c" (Count)
-    : "d"(Port)
-  );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __outdwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-   "rep ; outsl"
-   : "+S" (Buffer), "+c" (Count)
-   : "d"(Port)
-   );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readdr0(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr0, %[value]"
-    : [value] "=r" (value)
-    );
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readdr1(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr1, %[value]"
-    : [value] "=r" (value)
-    );
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readdr2(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr2, %[value]"
-    : [value] "=r" (value)
-    );
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readdr3(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr3, %[value]"
-    : [value] "=r" (value)
-    );
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readdr7(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr7, %[value]"
-    : [value] "=r" (value)
-    );
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readdr(unsigned long reg)
-{
-  switch (reg){
-    case 0:
-      return __readdr0 ();
-      break;
-
-    case 1:
-      return __readdr1 ();
-      break;
-
-    case 2:
-      return __readdr2 ();
-      break;
-
-    case 3:
-      return __readdr3 ();
-      break;
-
-    case 7:
-      return __readdr7 ();
-      break;
-
-    default:
-      return -1;
-      break;
-  }
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writedr0(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%dr0"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writedr1(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%dr1"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writedr2(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%dr2"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writedr3(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%dr3"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writedr7(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%dr7"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writedr(unsigned long reg, unsigned long Data)
-{
-  switch (reg){
-    case 0:
-      __writedr0 (Data);
-      break;
-
-    case 1:
-      __writedr1 (Data);
-      break;
-
-    case 2:
-      __writedr2 (Data);
-      break;
-
-    case 3:
-      __writedr3 (Data);
-      break;
-
-    case 7:
-      __writedr7 (Data);
-      break;
-
-    default:
-      break;
-  }
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readcr0(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr0, %[value]"
-    : [value] "=r" (value));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readcr2(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr2, %[value]"
-    : [value] "=r" (value));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readcr3(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr3, %[value]"
-    : [value] "=r" (value));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readcr4(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr4, %[value]"
-    : [value] "=r" (value));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readcr8(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr8, %[value]"
-    : [value] "=r" (value));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readcr(unsigned long reg)
-{
-  switch (reg){
-    case 0:
-      return __readcr0 ();
-      break;
-
-    case 2:
-      return __readcr2 ();
-      break;
-
-    case 3:
-      return __readcr3 ();
-      break;
-
-    case 4:
-      return __readcr4 ();
-      break;
-
-    case 8:
-      return __readcr8 ();
-      break;
-
-    default:
-      return -1;
-      break;
-  }
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writecr0(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%cr0"
-    :
-    : "r" (Data)
-    : "memory"
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writecr2(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%cr2"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writecr3(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%cr3"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writecr4(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%cr4"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writecr8(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%cr8"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writecr(unsigned long reg, unsigned long Data)
-{
-  switch (reg){
-    case 0:
-      __writecr0 (Data);
-      break;
-
-    case 2:
-      __writecr2 (Data);
-      break;
-
-    case 3:
-      __writecr3 (Data);
-      break;
-
-    case 4:
-      __writecr4 (Data);
-      break;
-
-    case 8:
-      __writecr8 (Data);
-      break;
-
-    default:
-      break;
-  }
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-UINT64 __readmsr(UINT32 msr)
-{
-  UINT64 retval;
-  __asm__ __volatile__(
-       "rdmsr"
-       : "=A" (retval)
-       : "c" (msr)
-       );
-   return retval;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writemsr (UINT32 msr, UINT64 Value)
-{
-  __asm__ __volatile__ (
-     "wrmsr"
-     :
-     : "c" (msr), "A" (Value)
-     );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-UINT64 __rdtsc(void)
-{
-  UINT64 retval;
-  __asm__ __volatile__ (
-     "rdtsc"
-     : "=A" (retval));
-  return retval;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __cpuid(int CPUInfo[], const int InfoType)
-{
-   __asm__ __volatile__(
-     "cpuid"
-     :"=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3])
-     : "a" (InfoType)
-     );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _disable(void)
-{
-  __asm__ __volatile__ ("cli");
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _enable(void)
-{
-  __asm__ __volatile__ ("sti");
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __halt(void)
-{
-  __asm__ __volatile__ ("hlt");
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __debugbreak(void)
-{
-  __asm__ __volatile__ ("int3");
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __invd(void)
-{
-  __asm__ __volatile__ ("invd");
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __wbinvd(void)
-{
-  __asm__ __volatile__ ("wbinvd");
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __lidt(void *Source)
-{
-  __asm__ __volatile__("lidt %0" : : "m"(*(short*)Source));
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writefsbyte(const unsigned long Offset, const unsigned char Data)
-{
-  __asm__ ("movb %[Data], %%fs:%a[Offset]"
-          :
-          : [Offset] "ir" (Offset), [Data] "iq" (Data));
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writefsword(const unsigned long Offset, const unsigned short Data)
-{
-  __asm__ ("movw %[Data], %%fs:%a[Offset]"
-          :
-          : [Offset] "ir" (Offset), [Data] "ir" (Data));
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writefsdword(const unsigned long Offset, const unsigned long Data)
-{
-  __asm__ ("movl %[Data], %%fs:%a[Offset]"
-           :
-           : [Offset] "ir" (Offset), [Data] "ir" (Data));
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned char __readfsbyte(const unsigned long Offset)
-{
-  unsigned char value;
-  __asm__ ("movb %%fs:%a[Offset], %[value]"
-          : [value] "=q" (value)
-          : [Offset] "ir" (Offset));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned short __readfsword(const unsigned long Offset)
-{
-  unsigned short value;
-  __asm__ ("movw %%fs:%a[Offset], %[value]"
-           : [value] "=q" (value)
-           : [Offset] "ir" (Offset));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readfsdword(unsigned long Offset)
-{
-  unsigned long value;
-  __asm__ ("movl %%fs:%a[Offset], %[value]"
-           : [value] "=r" (value)
-           : [Offset] "ir" (Offset));
-  return value;
-}
-
-#ifdef __SSE3__
-typedef long long __v2di __attribute__ ((__vector_size__ (16)));
-typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _mm_stream_si128_fs2 (void *__A, __m128i __B)
-{
-  __asm__(".byte 0x64"); // fs prefix
-  __builtin_ia32_movntdq ((__v2di *)__A, (__v2di)__B);
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _mm_stream_si128_fs (void *__A, void *__B)
-{
-  __m128i data;
-  data = (__m128i) __builtin_ia32_lddqu ((char const *)__B);
-  _mm_stream_si128_fs2 (__A, data);
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _mm_clflush_fs (void *__A)
-{
-  __asm__(".byte 0x64"); // fs prefix
-  __builtin_ia32_clflush (__A);
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _mm_mfence (void)
-{
-  __builtin_ia32_mfence ();
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _mm_sfence (void)
-{
-  __builtin_ia32_sfence ();
-}
-#endif /* __SSE3__ */
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __stosb(unsigned char *dest, unsigned char data, size_t count)
-{
-   __asm__ __volatile__ (
-    "rep ; stosb "
-    : "+D" (dest), "+c" (count)
-    : "a"(data)
-  );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __movsb(unsigned char *dest, unsigned char *data, size_t count)
-{
-   __asm__ __volatile__ (
-    "movsb "
-    : "+D" (dest), "+S"(data), "+c" (count)
-  );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void debug_point ( unsigned short Port,  unsigned long Data )
-{
-   __outdword (Port, Data);
-   __asm__ __volatile__ (".word 0xfeeb");
-
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void delay_point ( unsigned short Port, unsigned long Data, unsigned long delayTime )
-{
-  UINTN  Index;
-  Index = 0;
-  __outdword (Port, Data);
-  while (Index < delayTime * 600000) {
-    __outdword (0xE0, 0);
-    Index ++;
-  }
-}
-#endif /* defined (__GNUC__) */

pi/amd/00630F01/binaryPI/gcccar.inc

diff --git a/pi/amd/00630F01/binaryPI/gcccar.inc b/pi/amd/00630F01/binaryPI/gcccar.inc
deleted file mode 100644
index b2e8765..0000000
--- a/pi/amd/00630F01/binaryPI/gcccar.inc
+++ /dev/null
@@ -1,1596 +0,0 @@
-/*
- * Copyright (c) 2012, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/******************************************************************************
-* AMD Generic Encapsulated Software Architecture
-*
-* $Workfile:: GccCar.inc    $Revision:: 32932   $
-*
-* Description: GccCar.inc - AGESA cache-as-RAM setup Include File for GCC complier
-*
-******************************************************************************/
-
-.altmacro
-
-BSP_STACK_BASE_ADDR     =       0x30000         /* Base address for primary cores stack   */
-BSP_STACK_SIZE          =       0x10000         /* 64KB for BSP core                      */
-CORE0_STACK_BASE_ADDR   =       0x80000         /* Base address for primary cores stack   */
-CORE0_STACK_SIZE        =       0x4000          /* 16KB for primary cores                 */
-CORE1_STACK_BASE_ADDR   =       0x40000         /* Base address for AP cores              */
-CORE1_STACK_SIZE        =       0x1000          /* 4KB for each AP cores                  */
-
-APIC_BASE_ADDRESS       =       0x0000001B
-  APIC_BSC              =       8               /* Boot Strap Core  */
-
-APIC_MSG_REG            = 0x380        # Location of BSC message
-    APIC_MSG            = 0x00DE00AD   # Message data
-APIC_CMD_LO_REG         = 0x300        # APIC command low
-APIC_CMD_HI_REG         = 0x310        # APIC command high
-    CMD_REG_TO_READ_DATA = 0x00000338  # APIC command for remote read of APIC_MSG_REG
-    REMOTE_READ_STS       = 0x00030000 # Remote read status mask
-    REMOTE_DELIVERY_PEND  = 0x00010000 # Remote read is pending
-    REMOTE_DELIVERY_DONE  = 0x00020000 # Remote read is complete
-    DELIVERY_STS_BIT    = 12          #Delivery status valid bit
-APIC_ID_REG             = 0x0020       # Local APIC ID offset
-    APIC20_APICID       = 24
-APIC_REMOTE_READ_REG    = 0x00C0       # Remote read offset
-
-# Flags can only run from bits 31 to 24.  Bits 23:0 are in use.
-AMD_CU_NEED_TO_WAIT     = 31
-AMD_CU_SEND_INVD_MSG    = 30
-AMD_CU_RESTORE_ES       = 29
-
-AMD_MTRR_VARIABLE_BASE0  =      0x0200
-AMD_MTRR_VARIABLE_BASE6  =      0x020C
-AMD_MTRR_VARIABLE_BASE7 = 0x020E
-    VMTRR_VALID             =     11
-    MTRR_TYPE_WB            =     0x06
-    MTRR_TYPE_WP            =     0x05
-    MTRR_TYPE_WT            =     0x04
-    MTRR_TYPE_UC            =     0x00
-AMD_MTRR_VARIABLE_MASK7 = 0x020F
-AMD_MTRR_FIX64k_00000    =      0x0250
-AMD_MTRR_FIX16k_80000    =      0x0258
-AMD_MTRR_FIX16k_A0000    =      0x0259
-AMD_MTRR_FIX4k_C0000     =      0x0268
-AMD_MTRR_FIX4k_C8000     =      0x0269
-AMD_MTRR_FIX4k_D0000     =      0x026A
-AMD_MTRR_FIX4k_D8000     =      0x026B
-AMD_MTRR_FIX4k_E0000     =      0x026C
-AMD_MTRR_FIX4k_E8000     =      0x026D
-AMD_MTRR_FIX4k_F0000     =      0x026E
-AMD_MTRR_FIX4k_F8000     =      0x026F
-
-/* Reproduced from AGESA.h */
-AMD_AP_MTRR_FIX64k_00000  =  0x00000250
-AMD_AP_MTRR_FIX16k_80000  =  0x00000258
-AMD_AP_MTRR_FIX16k_A0000  =  0x00000259
-AMD_AP_MTRR_FIX4k_C0000   =  0x00000268
-AMD_AP_MTRR_FIX4k_C8000   =  0x00000269
-AMD_AP_MTRR_FIX4k_D0000   =  0x0000026A
-AMD_AP_MTRR_FIX4k_D8000   =  0x0000026B
-AMD_AP_MTRR_FIX4k_E0000   =  0x0000026C
-AMD_AP_MTRR_FIX4k_E8000   =  0x0000026D
-AMD_AP_MTRR_FIX4k_F0000   =  0x0000026E
-AMD_AP_MTRR_FIX4k_F8000   =  0x0000026F
-CPU_LIST_TERMINAL         =  0xFFFFFFFF
-
-AMD_MTRR_DEFTYPE         =      0x02FF
-    WB_DRAM_TYPE         =      0x1E             /* MemType - memory type */
-    MTRR_DEF_TYPE_EN     =      11               /* MtrrDefTypeEn - variable and fixed MTRRs default enabled */
-    MTRR_DEF_TYPE_FIX_EN =      10               /* MtrrDefTypeEn - fixed MTRRs default enabled */
-
-HWCR                     =      0x0C0010015      /* Hardware Configuration                                                                                                                                       */
-    INVD_WBINVD          =      0x04             /* INVD to WBINVD conversion */
-
-IORR_BASE                =      0x0C0010016      /* IO Range Regusters Base/Mask, 2 pairs */
-                                                 /*  uses 16h - 19h                                                                                                                                                             */
-TOP_MEM                  =      0x0C001001A      /* Top of Memory                                                                                                                                                                                */
-TOP_MEM2                 =      0x0C001001D      /* Top of Memory2                                                                                                                                                                       */
-
-LS_CFG                   =      0x0C0011020      /* Load-Store Configuration                                                                                                                             */
-    DIS_SS               =     28                /* Family 10h,12h,15h:Disable Streng Store functionality */
-    DIS_STREAM_ST        =     28                /* Family 14h:DisStreamSt - Disable Streaming Store functionality */
-
-IC_CFG                   =      0x0C0011021      /* Instruction Cache Config Register  */
-    IC_DIS_SPEC_TLB_RLD  =      9                /*   Disable speculative TLB reloads  */
-    DIS_IND              =      14               /*   Family 10-14h:Disable Indirect Branch Predictor */
-    DIS_I_CACHE          =      14               /*   Family 15h:DisICache - Disable Indirect Branch Predictor */
-
-DC_CFG                   =      0x0C0011022      /* Data Cache Configuration                                                                                                                                   */
-    DC_DIS_SPEC_TLB_RLD      =  4                /*   Disable speculative TLB reloads */
-    DIS_CLR_WBTOL2_SMC_HIT   =  8                /*   self modifying code check buffer bit */
-    DIS_HW_PF                =  13               /*   Hardware prefetches bit                                                                                                                                    */
-
-CU_CFG                  = 0x0C0011023  /* Family 15h: Combined Unit Configuration */
-    L2_WAY_LOCK_EN          = 23      /*   L2WayLock - L2 way lock enable */
-    L2_FIRST_LOCKED_WAY     = 19      /*   L2FirstLockedWay - first L2 way lockedh */
-    L2_FIRST_LOCKED_WAY_OR_MASK  = 0x000780000
-
-DE_CFG                   =      0x0C0011029      /* Decode Configuration */
-    CL_FLUSH_SERIALIZE   =      23               /*   Family 12h,15h: CL Flush Serialization */
-
-BU_CFG2                  =      0x0C001102A      /* Family 10h: Bus Unit Configuration 2 */
-CU_CFG2                  =      0x0C001102A      /* Family 15h: Combined Unit Configuration 2 */
-    F10_CL_LINES_TO_NB_DIS  =   15               /*   ClLinesToNbDis - allows WP code to be cached in L2 */
-    IC_DIS_SPEC_TLB_WR      =   35               /*   IcDisSpecTlbWr - ITLB speculative writes */
-
-CU_CFG3                  =      0x0C001102B      /* Combined Unit Configuration 3 */
-    COMBINE_CR0_CD       =      49               /*   Combine CR0.CD for both cores of a compute unit */
-
-CR0_PE                  = 0           # Protection Enable
-CR0_NW                  = 29          # Not Write-through
-CR0_CD                  = 30          # Cache Disable
-CR0_PG                  = 31          # Paging Enable
-
-/* CPUID Functions */
-
-CPUID_MODEL              =      1
-AMD_CPUID_FMF            =      0x80000001       /* Family Model Features information */
-AMD_CPUID_L2Cache        =      0X80000006       /* L2/L3 cache info */
-AMD_CPUID_APIC           =      0x80000008       /* Long Mode and APIC info., core count */
-    APIC_ID_CORE_ID_SIZE      = 12               /* ApicIdCoreIdSize bit position */
-
-NB_CFG                   =      0x0C001001F      /* Northbridge Configuration Register */
-    INIT_APIC_ID_CPU_ID_LO    = 54               /*  InitApicIdCpuIdLo - is core# in high or low half of APIC ID? */
-    ENABLE_CF8_EXT_CFG        = 46               /*  EnableCf8ExtCfg - enable CF8 extended configuration cycles */
-
-MTRR_SYS_CFG             =      0x0C0010010      /* System Configuration Register */
-  CHX_TO_DIRTY_DIS       =      16               /*   ChxToDirtyDis    Change to dirty disable  */
-  SYS_UC_LOCK_EN         =      17               /*   SysUcLockEn      System lock command enable */
-  MTRR_FIX_DRAM_EN       =      18               /*   MtrrFixDramEn    MTRR fixed RdDram and WrDram attributes enable */
-  MTRR_FIX_DRAM_MOD_EN   =      19               /*   MtrrFixDramModEn MTRR fixed RdDram and WrDram modification enable */
-  MTRR_VAR_DRAM_EN       =      20               /*   MtrrVarDramEn    MTRR variable DRAM enable */
-  MTRR_TOM2_EN           =      21               /*   MtrrTom2En       MTRR top of memory 2 enable */
-
-PERF_CONTROL3            =      0x0C0010003      /* Performance event control three */
-    PERF_CONTROL3_RESERVE_L  =  0x00200000       /* Preserve the reserved bits */
-    PERF_CONTROL3_RESERVE_H  =  0x0FCF0          /* Preserve the reserved bits */
-    CONFIG_EVENT_L           =  0x0F0E2          /* All cores with level detection */
-    CONFIG_EVENT_H           =  4                /* Increment count by number of event */
-                                                 /* occured in clock cycle */
-    EVENT_ENABLE             =  22               /* Enable the event */
-PERF_COUNTER3            =      0x0C0010007      /* Performance event counter three */
-
-FUNC_3			=	3
-MCA_NB_CFG		=	0x44		 /* MCA NB Configuration */
-CPU_ERR_DIS             =       6                /* CPU error response disable */
-PRODUCT_INFO_REG1	=	0x1FC			/* Product Information Register 1 */
-
-# Local use flags, in upper most byte if ESI
-FLAG_UNKNOWN_FAMILY     = 24          # Signals that the family# of the installed processor is not recognized
-FLAG_STACK_REENTRY      = 25          # Signals that the environment has made a re-entry (2nd) call to set up the stack
-FLAG_IS_PRIMARY         = 26          # Signals that this core is the primary within the comoute unit
-FLAG_CORE_NOT_IDENTIFIED     = 27          # Signals that the cores/compute units of the installed processor is not recognized
-FLAG_FORCE_32K_STACK     = 28         # Signals that to force 32KB stack size for BSP core
-CR0_MASK    = ((1 << CR0_CD) | (1 << CR0_NW))
-MSR_MASK    = ((1 << MTRR_DEF_TYPE_EN)+(1 << MTRR_DEF_TYPE_FIX_EN))
-
-/****************************************************************************
- *
- *                      CPU MACROS - PUBLIC
- *
- ****************************************************************************/
-.macro   _WRMSR
-        .byte 0x0f, 0x30
-.endm
-
-.macro  _RDMSR
-        .byte   0x0F, 0x32
-.endm
-
-.macro AMD_CPUID arg0
-  .ifb \arg0
-    mov   $0x1, %eax
-    .byte 0x0F, 0x0A2                     /* Execute instruction */
-    bswap %eax
-    xchg  %ah, %al                        /* Ext model in al now */
-    rol   $0x08, %eax                     /* Ext model in ah, model in al */
-    and   $0x0FFCF, ax                    /* Keep 23:16, 7:6, 3:0 */
-  .else
-    mov   \arg0, %eax
-    .byte 0x0F, 0x0A2
-  .endif
-.endm
-
-.macro MAKE_EXT_PCI_ADDR  Seg, Bus, Dev, Func, Offset
-	mov $(1 << 31 | (Seg) << 28 | (((Offset) & (0x0F00)) >> 8) << 24 | (Bus) << 16 | (Dev) << 11 | (Func) << 8) | ((Offset) & (0xFC)), %eax
-.endm
-/****************************************************************************
-*
-* AMD_ENABLE_STACK_FAMILY_HOOK Macro - Stackless
-*
-*   Set any family specific controls needed to enable the use of
-*   cache as general storage before main memory is available.
-*
-* Inputs:
-*       none
-* Outputs:
-*       none
- ****************************************************************************/
-.macro  AMD_ENABLE_STACK_FAMILY_HOOK
-
-//    AMD_ENABLE_STACK_FAMILY_HOOK_F10
-//    AMD_ENABLE_STACK_FAMILY_HOOK_F12
-    AMD_ENABLE_STACK_FAMILY_HOOK_F14
-    AMD_ENABLE_STACK_FAMILY_HOOK_F15
-.endm
-
-/****************************************************************************
-*
-* AMD_DISABLE_STACK_FAMILY_HOOK Macro - Stackless
-*
-*   Return any family specific controls to their 'standard'
-*   settings for using cache with main memory.
-*
-* Inputs:
-*       none
-* Outputs:
-*       none
- ****************************************************************************/
-.macro  AMD_DISABLE_STACK_FAMILY_HOOK
-
-    //AMD_DISABLE_STACK_FAMILY_HOOK_F10
-    //AMD_DISABLE_STACK_FAMILY_HOOK_F12
-    AMD_DISABLE_STACK_FAMILY_HOOK_F14
-    AMD_DISABLE_STACK_FAMILY_HOOK_F15
-
-.endm
-
-/****************************************************************************
-*
-* GET_NODE_ID_CORE_ID Macro - Stackless
-*
-*   Read family specific values to determine the node and core
-*   numbers for the core executing this code.
-*
-* Inputs:
-*     none
-* Outputs:
-*     SI[7:0] = Core# (0..N, relative to node)
-*     SI[15:8]= Node# (0..N)
-*     SI[23:16]= reserved
-*     SI[24]=   flag: 1=Family Unrecognized
-*     SI[25]=   flag: 1=Interface re-entry call
-*     SI[26]=   flag: 1=Core is primary of compute unit
-*     SI[31:27]= reserved, =0
-****************************************************************************/
-.macro  GET_NODE_ID_CORE_ID
-    LOCAL  node_core_exit
-
-    mov     $-1, %si
-    //GET_NODE_ID_CORE_ID_F10
-    //GET_NODE_ID_CORE_ID_F12
-    //GET_NODE_ID_CORE_ID_F14
-    GET_NODE_ID_CORE_ID_F15
-    /*
-     * Check for unrecognized Family
-     */
-    cmp     $-1, %si                      # Has family (node/core) already been discovered?
-    jnz     node_core_exit              # Br if yes
-
-   mov     $((1 << FLAG_UNKNOWN_FAMILY)+(1 << FLAG_IS_PRIMARY)), %esi # No, Set error code, Only let BSP continue
-
-    mov     $APIC_BASE_ADDRESS, %ecx      # MSR:0000_001B
-    _RDMSR
-    bt      $APIC_BSC, %eax               # Is this the BSC?
-    jc      node_core_exit              # Br if yes
-    hlt                                 # Kill APs
-node_core_exit:
-
-.endm
-
-/****************************************************************************
-##                      Family 10h MACROS
-##***************************************************************************
-#---------------------------------------------------
-#
-# AMD_ENABLE_STACK_FAMILY_HOOK_F10 Macro - Stackless
-#
-#   Set any family specific controls needed to enable the use of
-#   cache as general storage before main memory is available.
-#
-# Inputs:
-#       ESI - node#, core#, flags from GET_NODE_ID_CORE_ID
-# Outputs:
-#       none
-#
-# Family 10h requirements (BKDG section 2.3.3):
-#   * Paging disabled
-#   * MSRC001_0015[INVDWBINVD]=0
-#   * MSRC001_1021[DIS_IND]=1
-#   * MSRC001_1021[DIS_SPEC_TLB_RLD]=1
-#   * MSRC001_1022[DIS_SPEC_TLB_RLD]=1
-#   * MSRC001_1022[DIS_CLR_WBTOL2_SMC_HIT]=1
-#   * MSRC001_1022[DIS_HW_PF]=1
-#   * MSRC001_102A[IcDisSpecTlbWr]=1
-#   * MSRC001_102A[ClLinesToNbDis]=1
-#   * No INVD or WBINVD, no exceptions, page faults or interrupts
-****************************************************************************/
-.macro AMD_ENABLE_STACK_FAMILY_HOOK_F10
-    LOCAL   fam10_enable_stack_hook_exit
-
-    AMD_CPUID   $CPUID_MODEL
-    shr     $20, %eax                     # AL = cpu extended family
-    cmp     $0x01, %al                      # Is this family 10h?
-    jnz     fam10_enable_stack_hook_exit # Br if no
-
-    mov     $DC_CFG, %ecx                 # MSR:C001_1022
-    _RDMSR
-    bts     $DC_DIS_SPEC_TLB_RLD, %eax     # Turn on Disable speculative DTLB reloads bit
-    bts     $DIS_CLR_WBTOL2_SMC_HIT, %eax  # Turn on Disable the self modifying code check buffer bit
-    bts     $DIS_HW_PF, %eax               # Turn on Disable hardware prefetches bit
-    _WRMSR
-
-    dec     %cx                          # MSR:C001_1021
-    _RDMSR
-    bts     $IC_DIS_SPEC_TLB_RLD, %eax     # Turn on Disable speculative TLB reloads bit
-    bts     $DIS_IND, %eax                 # Turn on Disable indirect branch predictor
-    _WRMSR
-
-    mov     $BU_CFG2, %ecx                # MSR C001_102A
-    _RDMSR
-    bts     $F10_CL_LINES_TO_NB_DIS, %eax   # Allow BIOS ROM to be cached in the IC
-    bts     $(IC_DIS_SPEC_TLB_WR-32), %edx  #Disable speculative writes to the ITLB
-    _WRMSR
-
-    mov     $HWCR, %ecx                    # MSR C001_0015
-    _RDMSR
-    bt      $FLAG_STACK_REENTRY, %esi                 # Check if stack has already been set
-    jc      fam10_skipClearingBit4
-    btr     $INVD_WBINVD, %eax             # disable INVD -> WBINVD conversion
-    _WRMSR
-
-fam10_skipClearingBit4:
-    mov %esi, %eax                         # load core#
-    or %al, %al                       # If (BSP)
-    jne  fam10_enable_stack_hook_exit
-    mov     $PERF_COUNTER3, %ecx       #   Select performance counter three
-                                        #   to count number of CAR evictions
-    xor     %eax, %eax                #   Initialize the lower part of the counter to zero
-    xor     %edx, %edx                #   Initializa the upper part of the counter to zero
-    _WRMSR                          #   Save it
-    mov     $PERF_CONTROL3, %ecx      #   Select the event control three
-    _RDMSR                          #   Get the current setting
-    and     $PERF_CONTROL3_RESERVE_L, %eax   # Preserve the reserved bits
-    or      $CONFIG_EVENT_L, %eax      #   Set the lower part of event register to
-                                        #   select CAR Corruption occurred by any cores
-    and     $PERF_CONTROL3_RESERVE_H, %dx   # Preserve the reserved bits
-    or      $CONFIG_EVENT_H, %dx       #   Set the upper part of event register
-    _WRMSR                          #   Save it
-    bts     $EVENT_ENABLE, %eax        #   Enable it
-    _WRMSR                          #   Save it
-
-fam10_enable_stack_hook_exit:
-.endm
-
-/*****************************************************************************
-**                      Family 14h MACROS
-*****************************************************************************/
-/*****************************************************************************
-*
-* AMD_ENABLE_STACK_FAMILY_HOOK_F14 Macro - Stackless
-*
-*   Set any family specific controls needed to enable the use of
-*   cache as general storage before main memory is available.
-*
-* Inputs:
-*       ESI - node#, core#, flags from GET_NODE_ID_CORE_ID
-* Outputs:
-*       none
-*
-* Family 14h requirements (BKDG section 2.3.3):
-*   * Paging must be disabled.
-*   * MSRC001_0015[INVD_WBINVD]=0.
-*   * MSRC001_1020[DisStreamSt]=1.
-*   * MSRC001_1021[DIS_SPEC_TLB_RLD]=1. Disable speculative ITLB reloads.
-*   * MSRC001_1022[DIS_HW_PF]=1.
-*   * No INVD or WBINVD, no exceptions, page faults or interrupts
-*****************************************************************************/
-.macro  AMD_ENABLE_STACK_FAMILY_HOOK_F14
-    LOCAL   fam14_enable_stack_hook_exit
-
-    AMD_CPUID   $CPUID_MODEL
-    shr     $20, %eax                     # AL = cpu extended family
-    cmp     $0x05, %al                     # Is this family 14h?
-    jnz     fam14_enable_stack_hook_exit # Br if no
-
-    mov     $DC_CFG, %ecx                 # MSR:C001_1022
-    _RDMSR
-    bts     $DIS_HW_PF, %eax              # Disable hardware prefetches
-    _WRMSR
-
-    dec     %cx  #IC_CFG                 # MSR:C001_1021
-    _RDMSR
-    bts     $IC_DIS_SPEC_TLB_RLD, %eax    # Disable speculative TLB reloads
-    _WRMSR
-
-    dec     %cx  #LS_CFG                 # MSR:C001_1020
-    _RDMSR
-    bts     $DIS_STREAM_ST, %eax          # Disabled Streaming store functionality
-    _WRMSR
-
-    mov     $HWCR, %ecx                   # MSR C001_0015
-    _RDMSR
-    bt      $FLAG_STACK_REENTRY, %esi     # Check if stack has already been set
-    jc      fam14_skipClearingBit4
-    btr     $INVD_WBINVD, %eax            # Disable INVD -> WBINVD conversion
-    _WRMSR
-fam14_skipClearingBit4:                 # Keeping this label
-
-fam14_enable_stack_hook_exit:
-.endm
-
-/*****************************************************************************
-*
-* AMD_DISABLE_STACK_FAMILY_HOOK_F14 Macro - Stackless
-*
-*   Return any family specific controls to their 'standard'
-*   settings for using cache with main memory.
-*
-* Inputs:
-*       ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
-* Outputs:
-*       none
-*
-* Family 14h requirements:
-*   * INVD or WBINVD
-*   * MSRC001_0015[INVD_WBINVD]=1.
-*   * MSRC001_1020[DisStreamSt]=0.
-*   * MSRC001_1021[DIS_SPEC_TLB_RLD]=0.
-*   * MSRC001_1022[DIS_HW_PF]=0.
-*****************************************************************************/
-.macro  AMD_DISABLE_STACK_FAMILY_HOOK_F14
-    LOCAL   fam14_disable_stack_hook_exit
-
-    AMD_CPUID   $CPUID_MODEL
-    shr     $20, %eax                     # AL = cpu extended family
-    cmp     $0x05, %al                     # Is this family 14h?
-    jnz     fam14_disable_stack_hook_exit # Br if no
-
-    mov     $LS_CFG, %ecx                 # MSR:C001_1020
-    _RDMSR
-    btr     $DIS_STREAM_ST, %eax          # Turn on Streaming store functionality
-    _WRMSR
-
-    inc     %cx  #IC_CFG                 # MSR:C001_1021
-    _RDMSR
-    btr     $IC_DIS_SPEC_TLB_RLD, %eax    # Turn on speculative DC-TLB reloads
-    _WRMSR
-
-    inc     %cx  #DC_CFG                 # MSR:C001_1022
-    _RDMSR
-    btr     $DIS_HW_PF, %eax              # Turn on hardware prefetches
-    _WRMSR
-
-    #--------------------------------------------------------------------------
-    # Begin critical sequence in which EAX, BX, ECX, and EDX must be preserved.
-    #--------------------------------------------------------------------------
-
-    mov     $HWCR, %ecx                    # MSR:C001_0015h
-    _RDMSR
-    btr     $INVD_WBINVD, %eax            # Disable INVD -> WBINVD conversion
-    _WRMSR
-    invd                                # Clear the cache tag RAMs
-    bts     $INVD_WBINVD, %eax            # Turn on Conversion of INVD to WBINVD
-    _WRMSR
-
-    #--------------------------------------------------------------------------
-    # End critical sequence in which EAX, BX, ECX, and EDX must be preserved.
-    #--------------------------------------------------------------------------
-
-fam14_disable_stack_hook_exit:
-.endm
-
-/*****************************************************************************
-*
-* GET_NODE_ID_CORE_ID_F14 Macro - Stackless
-*
-*   Read family specific values to determine the node and core
-*   numbers for the core executing this code.
-*
-* Inputs:
-*     none
-* Outputs:
-*     SI = core#, node# & flags (see GET_NODE_ID_CORE_ID macro above)
-*****************************************************************************/
-.macro  GET_NODE_ID_CORE_ID_F14
-
-    LOCAL   node_core_f14_exit
-
-    cmp     $0x-1, %si                      # Has node/core already been discovered?
-    jnz     node_core_f14_exit          # Br if yes
-
-    AMD_CPUID   $CPUID_MODEL
-    shr     $20, %eax                     # AL = cpu extended family
-    cmp     $0x05, %al                     # Is this family 14h?
-    jnz     node_core_f14_exit          # Br if no
-
-    xor     %esi, %esi                    # Node must be 0
-    bts     $FLAG_IS_PRIMARY, %esi        # all family 14h cores are primary
-    mov     $APIC_BASE_ADDRESS, %ecx      # MSR:0000_001B
-    _RDMSR
-    bt      $APIC_BSC, %eax               # Is this the BSC?
-    jc      node_core_f14_exit          # Br if yes
-    inc     %si                          # Set core to 1
-node_core_f14_exit:
-.endm
-
-/*****************************************************************************
-**                      Family 15h MACROS
-*****************************************************************************/
-/*****************************************************************************
-*
-* AMD_ENABLE_STACK_FAMILY_HOOK_F15 Macro - Stackless
-*
-*   Set any family specific controls needed to enable the use of
-*   cache as general storage before main memory is available.
-*
-* Inputs:
-*       ESI - node#, core#, flags from GET_NODE_ID_CORE_ID
-* Outputs:
-*       none
-*
-* Family 15h requirements (BKDG #42301 section 2.3.3):
-*   * Paging must be disabled.
-*   * MSRC001_0015[INVD_WBINVD]=0
-*   * MSRC001_1020[DisSS]=1
-*   * MSRC001_1021[DIS_SPEC_TLB_RLD]=1
-*   * MSRC001_1022[DIS_SPEC_TLB_RLD]=1
-*   * MSRC001_1022[DisHwPf]=1
-*   * No INVD or WBINVD, no exceptions, page faults or interrupts
-*****************************************************************************/
-.macro  AMD_ENABLE_STACK_FAMILY_HOOK_F15
-    LOCAL   fam15_enable_stack_hook_exit
-    GET_NODE_ID_CORE_ID
-    mov     %esi, %eax
-    bt      $FLAG_IS_PRIMARY, %eax     # Is this a 2nd entry?
-    jnc      1f
-    MAKE_EXT_PCI_ADDR  0, 0, 24, FUNC_3, 0x44 //MCA_NB_CFG
-    mov     $0xCF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    in      %dx, %eax
-    bts     $CPU_ERR_DIS, %eax
-    out     %eax, %dx
-1:
-    AMD_CPUID   $CPUID_MODEL
-    mov     %eax, %ebx                # Save revision info to EBX
-    shr     $20, %eax                 # AL = cpu extended family
-    cmp     $0x06, %al                     # Is this family 15h?
-    jnz     fam15_enable_stack_hook_exit # Br if no
-
-    bt      $FLAG_STACK_REENTRY , %esi                 # Check if stack has already been set
-    jc      fam15_skipClearingBit4
-    mov     $HWCR, %ecx                   # MSR C001_0015
-    _RDMSR
-    btr     $INVD_WBINVD, %eax            # disable INVD -> WBINVD conversion
-    _WRMSR
-
-fam15_skipClearingBit4:
-    mov     $LS_CFG, %ecx                 # MSR:C001_1020
-    _RDMSR
-    bts     $DIS_SS, %eax                 # Turn on Streaming store functionality disabled bit
-    _WRMSR
-
-    inc     %ecx  #IC_CFG                # MSR:C001_1021
-    _RDMSR
-    bts     $IC_DIS_SPEC_TLB_RLD, %eax    # Turn on Disable speculative IC-TLB reloads bit
-    _WRMSR
-
-    //mov     %ebx, %eax                   # Restore revision info to EAX
-    //shr     $16, %eax
-    //and     $0x0F, %al                   # AL = cpu extended model
-
-    inc     %ecx  #DC_CFG                # MSR:C001_1022
-    _RDMSR
-    bts     $DC_DIS_SPEC_TLB_RLD, %eax    # Turn on Disable speculative DC-TLB reloads bit
-    bts     $DIS_HW_PF, %eax              # Turn on Disable hardware prefetches bit
-    _WRMSR				# Remove KM in PI 1.1.0.0
-
-    mov     %ebx,  %eax                  # Restore revision info to EAX
-    shr     $16, %eax
-    and     $0xF, %al
-    #.if (al == 01h)   Is this TN or KV?
-    cmp     $1, %eax
-    jz     1f
-    cmp     $3, %eax
-    jz      3f			# Skip if it is KV, it is only for TN from Label 1 to 3
-    jmp     2f
-1:  #.if (al == 01h)				# TN only
-    #Enable MSRC001_001F[EnableCf8ExtCfg]
-    mov     $NB_CFG, %ecx    # MSR:C001_001F
-    _rdmsr
-    bts     $(ENABLE_CF8_EXT_CFG - 32), %edx
-    _wrmsr
-    # Set F3x44[6, CpuErrDis] = 1
-//    MAKE_EXT_PCI_ADDR  0, 0, 24, FUNC_3, 0x44 //MCA_NB_CFG
-    //mov $(1 << 31 | 2 << 28 | (((MCA_NB_CFG) & (0x0F00)) >> 8) << 24 | 2 << 16 | 1 << 11 | FUNC_3 << 8), %eax
-
-//    mov     $0xCF8, %dx
-//    out     %eax, %dx
-//    add     $4, %dx
-//    in      %dx, %eax
-//    bts     $CPU_ERR_DIS, %eax
-//    out     %eax, %dx
-
-3:
-//    MAKE_EXT_PCI_ADDR  0, 0, 24, FUNC_3, 0x44 //MCA_NB_CFG
-//    mov     $0xCF8, %dx
-//    out     %eax, %dx
-//    add     $4, %dx
-//    in      %dx, %eax
-//    bts     $CPU_ERR_DIS, %eax
-//    out     %eax, %dx
-
-    mov     $CU_CFG, %ecx   # TN or KV
-    _RDMSR
-    bt      $L2_WAY_LOCK_EN, %eax
-    #.if (!carry?)
-    jc      2f
-    bts     $L2_WAY_LOCK_EN, %eax
-    or     $L2_FIRST_LOCKED_WAY_OR_MASK, %eax
-    _WRMSR
-    #.endif
-    #.endif
-2:
-    mov     %ebx, %eax          # Restore revision info to EAX
-    xchg    %ah, %al
-    shr     $8, %eax
-    //and     $0xF, %al
-    #.if (ax == 6100h)                     ; Is this TN-A0?
-    cmp     $0x6100, %ax
-    jnz     2f
-    MAKE_EXT_PCI_ADDR   0, 0, 24, FUNC_3, PRODUCT_INFO_REG1
-    mov     $0xCF8, %dx
-    out     %eax, %dx
-    add     $4,  %dx
-    in      %dx,  %eax
-    bt      $21,  %eax
-    jc      2f
-    mov     $CU_CFG2, %ecx     #MSR:C001_102A
-    _RDMSR
-    bts     $8, %eax
-    _WRMSR
-    # .endif
-
-2:  # Do Standard Family 15 work
-
-    mov     $CU_CFG3, %ecx                # MSR:C001_102B
-    _RDMSR
-    btr     $(COMBINE_CR0_CD - 32), %edx         # Clear CombineCr0Cd bit
-    _WRMSR
-
-fam15_enable_stack_hook_exit:
-.endm
-
-/*****************************************************************************
-*
-* AMD_DISABLE_STACK_FAMILY_HOOK_F15 Macro - Stackless
-*
-*   Return any family specific controls to their 'standard'
-*   settings for using cache with main memory.
-*
-* Inputs:
-*       ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
-* Outputs:
-*       none
-*
-* Family 15h requirements:
-*   * INVD or WBINVD
-*   * MSRC001_0015[INVD_WBINVD]=1
-*   * MSRC001_1020[DisSS]=0
-*   * MSRC001_1021[DIS_SPEC_TLB_RLD]=0
-*   * MSRC001_1022[DIS_SPEC_TLB_RLD]=0
-*   * MSRC001_1022[DIS_HW_PF]=0
-*****************************************************************************/
-.macro  AMD_DISABLE_STACK_FAMILY_HOOK_F15
-    LOCAL   fam15_disable_stack_hook_exit
-    LOCAL   fam15_disable_stack_remote_read_exit
-
-    AMD_CPUID   $CPUID_MODEL
-    mov     %eax, %ebx                    # Save revision info to EBX
-    shr     $20, %eax                     # AL = cpu extended family
-    cmp     $0x06, %al                     # Is this family 15h?
-    jnz     fam15_disable_stack_hook_exit # Br if no
-
-    mov     %ebx, %edi                    # Save revision info to EDI
-    AMD_CPUID  $AMD_CPUID_APIC
-    mov     %cl,  %al                     # AL = number of cores - 1
-    shr     $APIC_ID_CORE_ID_SIZE, %cx    # CL = ApicIdCoreIdSize
-    mov     $1,   %bx
-    shl     %cl,  %bl                     # BL = theoretical number of cores on socket
-    dec     %bx                           # BL = core number on socket mask
-    mov     %bl,  %ah                     # AH = core number on socket mask
-    mov     %edi, %ebx                    # Restore revision info to EBX
-    mov     %ax,  %di                     # DI[15:8] = core number mask, DI[7:0] = number of cores - 1
-
-    and     $0x0F00FF, %ebx
-    mov     %ebx,  %eax
-    shr     $8,    %eax
-    or      %ax,   %bx                    # Save Extended Model, Model and Stepping to BX
-	                                  # [11:8] = Extended Model, [7:4] = Model, [3:0] = Stepping (bx=0000000000010100, ok)
-
-    mov     $APIC_BASE_ADDRESS, %ecx
-    _RDMSR                                # dx=0 ax=fee00800
-    mov     %bx,  %dx                     # Save Extended Model, Model and Stepping to DX
-    shl     $16,  %edx                    #EDX[31:16] = Extended Model, Model and Stepping
-    mov     %eax ,%ebx                    # EBX = LAPIC base
-    xor     %ecx ,%ecx                    # Zero out CU flags
-    bts     $AMD_CU_NEED_TO_WAIT,  %ecx  # Default to waiting
-    bts     $AMD_CU_SEND_INVD_MSG, %ecx  # Default to signaling
-    mov     %cr0, %eax
-    bt      $CR0_PE, %ax                  # Are we in protected mode?
-    # .if (!carry?)
-    jc      1f
-    bts     $AMD_CU_RESTORE_ES, %ecx  # Indicate ES restore is required
-    mov     %es,   %cx    # Save ES segment register to CX
-    xor     %ax,   %ax
-    mov     %ax,   %es    # Set ES to big real mode selector for 4GB access
-    # .endif
-
-1:
-    and     $0x0F000, %bx                  # EBX = LAPIC base, offset 0
-    or      $APIC_ID_REG, %bl		#
-    mov     %es:(%ebx), %eax               # EAX[31:24] = APIC ID
-    shr     $APIC20_APICID, %eax          # AL = APIC ID
-    mov     %al, %ah                      # AH = APIC ID
-    mov     %di, %dx                      # DH = core mask
-    and     %dh, %ah                      # AH = core number #  ax=111 dx=01000F03
-
-    # .if (zero?)
-    jnz      1f
-    #  Core 0 of a socket
-        btr     $AMD_CU_SEND_INVD_MSG, %ecx  # No need to signal after INVD
-        #.if (dl != 0)
-	cmp     $0,  %dl
-        jz      2f
-        # This socket has multiple cores
-        and     $0xf000, %bx            # EBX = LAPIC base, offset 0
-        or      $APIC_MSG_REG, %bx
-        mov     $APIC_MSG,  %edi
-	mov     %edi,  %es:(%ebx)      # Signal for non core 0s to complete CAR breakdown
-        jmp     1f
-        #.else
-2:      btr     $AMD_CU_NEED_TO_WAIT, %ecx   # No need to wait on a single core CPU
-	#.endif
-    # .endif
-1:
-
-    bt      $AMD_CU_NEED_TO_WAIT, %ecx  #cx = c0000000
-    #.if (carry?)
-    jnc    1f
-        #.if (ah == dl)
-        cmp  %dl,  %ah
-        jnz  2f
-        # This is the highest numbered core on this socket -- wait on core 0
-            not  %dh                       # Flip the mask to determine local core 0's APID ID
-            and   %dh, %al                 # AL = target APIC ID  # ax=310
-        jmp   3f
-2:      #.else
-        # All other cores (including core 0) wait on the next highest core.
-        # In this way, cores will halt in a cascading fashion down to 0.
-            inc    %al
-        #.endif
-3:
-        shl     $APIC20_APICID, %eax
-        and     $0x0F000, %bx
-        or      $APIC_CMD_HI_REG, %bx
-        mov     %eax, %es:(%ebx)          # Set target APIC ID
-
-        # Use bits 23:16 as a timeout for unresponsive cores
-        ror     $8,  %ecx
-        mov     $0xFF, %ch
-        stc
-
-        #.while (carry?)
-5:	jnc     4f
-            and     $0xF000, %bx         #EBX = LAPIC base, offset 0
-            or      $APIC_CMD_LO_REG, %bx # bx = 00000000FEE00300
-            mov     $CMD_REG_TO_READ_DATA, %eax
-            mov     %eax, %es:(%ebx)     #Fire remove read IPI
-            inc     %ch                  #Pre increment the timeout
-            stc
-            #.while (carry?)
-7:          jnc     6f
-                dec     %ch                   #Check the timeout
-                jz      fam15_disable_stack_remote_read_exit
-                mov     %es:(%ebx), %eax      # ax = 0000000000020338
-                bt      $DELIVERY_STS_BIT, %eax
-            jmp     7b
-6:          #.endw
-            stc
-            #.while (carry?)
-7:          jnc     6f
-                mov     %es:(%ebx), %eax
-                and     $REMOTE_READ_STS, %eax
-                #.if (eax == REMOTE_DELIVERY_PEND)
-                    cmp     $REMOTE_DELIVERY_PEND, %eax
-                    jnz      8f
-                    dec     %ch               # Check the timeout
-                    jz      fam15_disable_stack_hook_exit # Branch if there is an unreponsive core
-                    stc
-                jmp     9f
-8:              #.else
-                    clc
-9:              #.endif
-            jmp     7b
-6:          #.endw
-            #.if (eax == REMOTE_DELIVERY_DONE)
-            cmp     $REMOTE_DELIVERY_DONE, %eax
-            jnz     6f
-                and     $0x0F000, %bx        #EBX = LAPIC base, offset 0
-                or      $APIC_REMOTE_READ_REG, %bl
-                mov     %es:(%ebx), %eax
-                #.if (eax == APIC_MSG)
-                cmp     $APIC_MSG, %eax     # ax=00000000FFC5BBB2
-                jnz     8f
-                    clc
-                jmp     9f
-                #.else
-8:                  stc
-9:              #.endif
-            jmp     7f
-6:          #.else
-                dec     %ch
-                jz      fam15_disable_stack_remote_read_exit
-                stc
-7:          #.endif
-        jmp     5b
-4:      #.endw
-
-fam15_disable_stack_remote_read_exit:
-        rol   $8, %ecx                 # Restore ECX
-
-1:  #.endif
-
-    bt     $AMD_CU_RESTORE_ES,  %ecx
-    #.if (carry?)
-    jnc    1f
-        mov    %cx, %es
-1:
-    mov    %ecx,   %edi
-    shr    $16, %edx
-    mov    %dx,  %bx
-
-    #Handshaking complete.  Continue tearing down CAR.
-
-    mov     $LS_CFG, %ecx                 # MSR:C001_1020
-    _RDMSR
-    btr     $DIS_SS, %eax                 # Turn on Streaming store functionality
-    _WRMSR
-
-    inc     %ecx  #IC_CFG                # MSR:C001_1021
-    _RDMSR
-    btr     $IC_DIS_SPEC_TLB_RLD, %eax    # Turn on speculative TLB reloads
-    _WRMSR
-
-    inc     %ecx  #DC_CFG                # MSR:C001_1022
-    _RDMSR
-    btr     $DC_DIS_SPEC_TLB_RLD, %eax    # Turn on speculative TLB reloads
-    btr     $DIS_HW_PF, %eax              # Turn on hardware prefetches
-    _WRMSR
-    #--------------------------------------------------------------------------
-    # Begin critical sequence in which EAX, BX, ECX, and EDX must be preserved.
-    #--------------------------------------------------------------------------
-
-    mov     $HWCR, %ecx                    # MSR:C001_0015h
-    _RDMSR
-    btr     $INVD_WBINVD, %eax            # Disable INVD -> WBINVD conversion
-    _WRMSR
-    wbinvd                                # Clear the cache tag RAMs
-    #.if (bh == 01h) || (bh == 03h)      ; Is this TN or KV?
-    cmp   $01, %bh
-    jz    4f
-    cmp   $03, %bh
-    jnz   1f
-4:  mov   $CU_CFG, %ecx                 # MSR:C001_1023
-    _RDMSR
-    shr   $L2_FIRST_LOCKED_WAY, %eax
-    and   $0x1F,  %eax
-    #.if (eax == 01Fh)
-    cmp   $0x1F,  %eax                  #Check if way 15 of the L2 needs to be reserved
-    jnz   3f
-    _RDMSR
-    btr   $L2_WAY_LOCK_EN, %eax
-    _WRMSR
-3:  #.endif
-
-1:  #.endif
-    #Do Standard Family 15 work
-    mov     $HWCR, %ecx                    # MSR:C001_0015h
-    _RDMSR
-    bts     $INVD_WBINVD, %eax            # Turn on Conversion of INVD to WBINVD
-    _WRMSR
-    #.endif                              # end
-    0:
-//
-//    #--------------------------------------------------------------------------
-//    # End critical sequence in which EAX, BX, ECX, and EDX must be preserved.
-//    #--------------------------------------------------------------------------
-//
-    mov     $CU_CFG3, %ecx                # MSR:C001_102B
-    _RDMSR
-    bts     $(COMBINE_CR0_CD - 32), %edx         # Set CombineCr0Cd bit
-    _WRMSR
-
-    bt      $AMD_CU_SEND_INVD_MSG, %edi
-    #.if (carry?)
-    jnc     1f
-    # Non core zero needs to signal to core 0 to proceed
-    mov     $APIC_BASE_ADDRESS, %ecx
-    _RDMSR
-    mov     %eax, %ebx                # EBX = LAPIC base
-    and     $0x0F000, %bx              # EBX = LAPIC base, offset 0
-    or      $APIC_MSG_REG, %bx
-    mov     $APIC_MSG, %eax
-    mov     %eax, %es:(%ebx)           # Signal for core 0 to complete CAR breakdown
-
-1:  #.endif
-
-fam15_disable_stack_hook_exit:
-.endm
-
-/*****************************************************************************
-*
-* GET_NODE_ID_CORE_ID_F15 Macro - Stackless
-*
-*   Read family specific values to determine the node and core
-*   numbers for the core executing this code.
-*
-* Inputs:
-*     none
-* Outputs:
-*     SI = core#, node# & flags (see GET_NODE_ID_CORE_ID macro above)
-*****************************************************************************/
-.macro  GET_NODE_ID_CORE_ID_F15
-
-    LOCAL   node_core_f15_exit
-    LOCAL   node_core_f15_AP
-    LOCAL   node_core_f15_shared
-    LOCAL node_core_f15_AP_not_TN
-
-#define F15_L2Size	512
-#define F15_ShareCores  2
-#define F15_AllocMem    0
-#define F15_AllocExe    0
-#define F15_SzAddrBus   48
-#define F15_pad         0
-    cmp     $-1, %si                      # Has node/core already been discovered?
-    jnz     node_core_f15_exit          # Br if yes
-
-    AMD_CPUID   $CPUID_MODEL
-    shr     $12, %eax                     # AL = cpu extended family
-    cmp     $06, %ah                     # Is this family 15h?
-    jnz     node_core_f15_exit          # Br if no
-    shr     $4,  %al                     # AL = cpu extended model
-    shr     $16, %ebx                    # BH = LocalApicId
-    mov     %al, %bl                     # BL = cpu extended model
-
-    # LoadTableAddress(FAM15H_INFO_STRUCT)
-    # movd    mm5, eax                    # load pointer to Family Info Struc
-
-    xor     %esi, %esi                    # Assume BSC, clear local flags
-    mov     $APIC_BASE_ADDRESS, %ecx      # MSR:0000_001B
-    _RDMSR
-    bt      $APIC_BSC, %eax               # Is this the BSC?
-    jnc      node_core_f15_AP            # Br if no
-
-    # This is the BSP.
-    # Enable routing tables on BSP (just in case the HT init code has not yet enabled them)
-    mov     $0x8000C06C, %eax              # PCI address for D18F0x6C Link Initialization Control Register
-    mov     $0x0CF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    in      %dx, %eax
-    btr     $0, %eax                      # Set LinkInitializationControl[RouteTblDis] = 0
-    out     %eax, %dx
-    jmp     node_core_f15_shared        #
-
-node_core_f15_AP:
-    mov     %bl, %al                        # AL = cpu extended model
-    shr     $8,  %bx                        # BL = CPUID Fn0000_0001_EBX[LocalApicId]
-//    cmp    $1,  %al                        # Is This TN?
-//    jz     4f
-//    cmp    $3,  %al
-//    jnz    node_core_f15_AP_not_TN
-4:  mov     %bx, %si
-    jmp     node_core_f15_shared
-    #
-    # This is an AP. Routing tables have been enabled by the HT Init process.
-    # Also, the MailBox register was set by the BSP during early init
-    #   The Mailbox register content is formatted as follows:
-    #         UINT32 Node:4;          // The node id of Core's node.
-    #         UINT32 Socket:4;        // The socket of this Core's node.
-    #         UINT32 Module:2;        // The internal module number for Core's node.
-    #         UINT32 ModuleType:2;    // Single Module = 0, Multi-module = 1.
-    #         UINT32 :20;             // Reserved
-    #
-node_core_f15_AP_not_TN:
-//    mov     $0x0C0000408, %ecx             # Read the family 15h mailbox
-//    _RDMSR                              #      MC4_MISC1[63:32]
-//    mov     %dx, %si                      # SI = raw mailbox contents (will extract node# from this)
-//    shr     $24, %ebx                     # BL = CPUID Fn0000_0001_EBX[LocalApicId]
-//    mov     %bx, %di                      # DI = Initial APIC ID (will extract core# from this)
-//
-//    AMD_CPUID   $AMD_CPUID_APIC          #
-//    shr     $4, %ch                       # CH = ApicIdSize, #bits in APIC ID that show core#
-//    inc     %cl                          # CL = Number of enabled cores in the socket
-//    mov     %cx, %bx
-//
-//    mov     $NB_CFG, %ecx
-//    _RDMSR                              # EDX has InitApicIdCpuIdLo bit
-//
-//    mov     %bh, %cl                      # CL = APIC ID size
-//    mov     $1, %al                       # Convert APIC ID size to an AND mask
-//    shl     %cl, %al                      # AL = 2^APIC ID size
-//    dec     %al                          # AL = mask for relative core number
-//    xor     %ah, %ah                      # AX = mask for relative core number
-//    bt      $(INIT_APIC_ID_CPU_ID_LO-32), %edx # InitApicIdCpuIdLo == 1?
-//    #.if (!carry?)                       # Br if yes
-//    jc      0f
-//        mov     $8, %ch                   # Calculate core number shift count
-//        sub     %cl, %ch                  # CH = core shift count
-//        mov     %ch, %cl
-//        shr     %cl, %di                  # Right justify core number
-//    #.endif
-//    0:
-//    and     %ax, %di                      # DI = socket-relative core number
-//
-//    mov     %si, %cx                      # CX = raw mailbox value
-//    shr     $10, %cx                      # CL[1:0] = ModuleType or #nodes per socket (0-SCM, 1-MCM)
-//    and     $3, %cl                       # Isolate ModuleType
-//    xor     %bh, %bh                      # BX = Number of enabled cores in the socket
-//    shr     %cl, %bx                      # BX = Number of enabled cores per node
-//    xor     %dx, %dx                      # Clear upper word for div
-//    mov     %di, %ax                      # AX = socket-relative core number
-//    div     %bx                          # DX = node-relative core number
-//    movzx   %si, %eax                     # Prepare return value
-//    and     $0x000F, %ax                   # AX = node number
-//    shl     $8,%ax                       # [15:8]=node#
-//    mov     %dl, %al                      # [7:0]=core# (relative to node)
-//    mov     %eax, %esi                    # ESI = node-relative core number
-
-      #
-      #   determine if this core shares MTRRs
-      #
-node_core_f15_shared:
-    mov     $0x8000C580, %eax              # Compute Unit Status
-    mov     %si, %bx
-    shl     $3, %bh                       # Move node# to PCI Dev# field
-    add     %bh, %ah                      # Adjust for node number
-    mov     $0x0CF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    in      %dx, %eax                     # [3:0]=Enabled# [19:16]=DualCore
-
-                                        # BL is MyCore#
-    mov     $0x06, %cx                     # Use CH as 'first of pair' core#
-    #.while (cl > 0)
-    jmp  0f
-    8:
-        bt      $0, %eax                  # Is pair enabled?
-        #.if (carry?)                    #
-        jnc     1f
-            mov     $0x01, %bh             #   flag core as primary
-            bt      $16, %eax             # Is there a 2nd in the pair?
-            #.if (carry?)                #
-            jnc 4f
-                #.break .if (ch == bl)   # Does 1st match MyCore#?
-                cmp     %bl, %ch
-                je      9f
-                inc     %ch
-                xor     %bh, %bh          #     flag core as NOT primary
-                #.break .if (ch == bl)   # Does 2nd match MyCore#?
-                cmp     %bl, %ch
-                je      9f
-                jmp     2f
-            #.else                       # No 2nd core
-            4:
-                #.break .if (ch == bl)   # Does 1st match MyCore#?
-                cmp     %bl, %ch
-                je      9f
-            #.endif
-            2:
-            inc     %ch
-        #.endif
-        1:
-        shr     $1, %eax
-        dec     %cl
-    #.endw
-    0:
-    #.if (cl == 0)
-    cmp $0x0, %cl
-    ja	8b
-    9:
-    or	%cl, %cl
-    jne 1f
-        #Error - core# didn't match Compute Unit Status content
-        bts     $FLAG_CORE_NOT_IDENTIFIED, %esi
-        bts     $FLAG_IS_PRIMARY, %esi    #   Set Is_Primary for unknowns
-    #.endif
-    1:
-    #.if (bh != 0)                       # Check state of primary for the matched core
-    or %bh, %bh
-    je 2f
-        bts     $FLAG_IS_PRIMARY, %esi    #   Set shared flag into return value
-    #.endif
-    2:
-
-node_core_f15_exit:
-
-.endm
-
-/*****************************************************************************
-* AMD_ENABLE_STACK:  Setup a stack
-*
-*   In:
-*       EBX  = Return address (preserved)
-*
-*   Out:
-*       SS:ESP - Our new private stack location
-*
-*       EAX = AGESA_STATUS
-*
-*       ECX = Stack size in bytes
-*
-*   Requirements:
-*       * This routine presently is limited to a max of 64 processor cores
-*   Preserved:
-*       ebx ebp
-*   Destroyed:
-*       eax, ecx, edx, edi, esi, ds, es, ss, esp
-*       mmx0, mmx1
-*
-*   Description:
-* Fixed MTRR address allocation to cores:
-* The BSP gets 64K of stack, Core0 of each node gets 16K of stack, all other cores get 4K.
-* There is a max of 1 BSP, 7 core0s and 56 other cores.
-* Although each core has it's own cache storage, they share the address space. Each core must
-* be assigned a private and unique address space for its stack. To support legacy systems,
-* the stack needs to be within the legacy address space (1st 1Meg). Room must also be reserved
-* for the other legacy elements (Interrupt vectors, BIOS ROM, video buffer, etc.)
-*
-* 80000h                                        40000h                                      00000h
-*     +----------+----------+----------+----------+----------+----------+----------+----------+
-* 64K |          |          |          |          |          |          |          |          |  64K  ea
-*  ea +----------+----------+----------+----------+----------+----------+----------+----------+
-*     |                             MTRR 0000_0250 MTRRfix64K_00000                           |
-*     +----------+----------+----------+----------+----------+----------+----------+----------+
-*     |  7 ,  6  |  5 ,  4  |  3 ,  2  |  1 ,  0  |     0    |          |          |          | <-node
-*     |7..1,7..1 |7..1,7..1 |7..1,7..1 |7..1,7..1 |     0    |          |          |          | <-core
-*     +----------+----------+----------+----------+----------+----------+----------+----------+
-*
-* C0000h                       B0000h                      A0000h                      90000h                      80000h
-*     +------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+
-*16K  |      |      |      |      |      |      |      |      |      |      |      |      |      |      |      |      |
-* ea  +------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+
-*     |              MTRR 0259 MTRRfix16K_A0000               |             MTRR 0258 MTRRfix16K_80000                |
-*     +------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+
-*     | > Dis|play B|uffer |   <  |      |      |      |      |   7  |  6   |  5   |  4   |  3   |  2   |  1   |      | <-node
-*     | >   T| e  m |p o r |a r y |  B u |f f e |r   A |r e a<|   0  |  0   |  0   |  0   |  0   |  0   |  0   |      | <-core
-*     +------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+
-*
-* E0000h                                            D0000h                                         C0000h
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-* 4K  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  4K  ea
-*  ea +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     |  026B MTRRfix4K_D8000 | 026A MTRRfix4K_D0000  | 0269 MTRRfix4K_C8000  | 0268 MTRRfix4K_C0000  |
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  | >| V| I| D| E| O|  |B |I |O |S |  |A |r |e |a<|
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*
-* 100000h                                           F0000h                                          E0000h
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  4K  ea
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     |  026F MTRRfix4K_F8000 | 026E MTRRfix4K_F0000  | 026D MTRRfix4K_E8000  | 026C MTRRfix4K_E0000  |
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     | >|MA|IN| B|IO|S |RA|NG|E |  |  |  |  |  |  |< | >|EX|TE|ND|ED| B|IO|S |ZO|NE|  |  |  |  |  |< |
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*****************************************************************************/
-.macro  AMD_ENABLE_STACK
-
-# These are local labels. Declared so linker doesn't cause 'redefined label' errors
-    LOCAL   SetupStack
-    LOCAL   Real16bMode
-    LOCAL   Protected32Mode
-    LOCAL   ClearTheStack
-
-#   Note that SS:ESP will be default stack.  Note that this stack
-#   routine will not be used after memory has been initialized.  Because
-#   of its limited lifetime, it will not conflict with typical PCI devices.
-    movd    %ebx, %mm0                    # Put return address in a safe place
-    movd    %ebp, %mm1                    # Save some other user registers
-
-    # get node id and core id of current executing core
-    GET_NODE_ID_CORE_ID                 # Sets ESI[23:16]=Shared core## SI[15,8]= Node## SI[7,0]= core# (relative to node)
-    # Note: ESI[31:24] are used for flags:  Unrecognized Family,  Is_Primary core,  Stack already established
-
-    # determine if stack is already enabled. We are using the DefType MSR for this determination.
-    # It is =0 after reset; CAR setup sets it to enable the MTRRs
-    mov     %cr0, %eax
-    test    $CR0_MASK, %eax              # Is cache disabled? (CD & NW bits)
-    jnz     SetupStack                  # Jump if yes
-    mov     $AMD_MTRR_DEFTYPE, %ecx       # MSR:0000_02FF
-    _RDMSR
-    test    $MSR_MASK, %eax                     # Are the default types enabled? (MTRR_DEF_TYPE_EN + MTRR_DEF_TYPE_FIX_EN)
-    jz      SetupStack                  # Jump if no
-    or      $FLAG_STACK_REENTRY, %esi             # Bit25, indicate stack has already been initialized
-
-SetupStack:
-    # Set node to map the first 16MB to node 0# 0000_0000 to 00FF_FFFF as DRAM
-    mov     %esi, %ebx                    # Get my Node/Core info
-    xor     %bl, %bl
-    shl     $3, %bh                       # Isolate my node#, match alignment for PCI Dev#
-    mov     $0x8000C144, %eax              # D18F1x44:DRAM Base/Limit# N is Base, N+4 is Limit
-    add     %bh, %ah
-    mov     %eax, %ebx                    # Save PCI address for Base/Limit pair
-
-    mov     $0x0CF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    xor     %eax, %eax                    # Least Significant bit is AD24 so 0 sets mask of 00FF_FFFF (16MB)
-    out     %eax, %dx                     # DRAM Limit = node0, no interleave
-
-    mov     %ebx, %eax
-    sub     $4, %eax                      # Now point to the Base register
-    mov     $0x0CF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    mov     $0x00000003, %eax              # Set the read and write enable bits
-    out     %eax, %dx                     # DRAM Base = 0x0000, R/W
-
-    AMD_ENABLE_STACK_FAMILY_HOOK
-
-    # Init CPU MSRs for our init routines
-    mov     $MTRR_SYS_CFG, %ecx           # SYS_CFG
-    _RDMSR
-    bts     $MTRR_FIX_DRAM_MOD_EN, %eax   # Turn on modification enable bit
-    _WRMSR
-
-    mov     %esi, %eax
-    bt      $FLAG_STACK_REENTRY, %eax     # Is this a 2nd entry?
-    #.if (!carry?)                       #   On a re-entry, do not clear MTRRs or reset TOM; just reset the stack SS:ESP
-    jc 0f
-        bt      $FLAG_IS_PRIMARY, %eax    #   Is this core the primary in a compute unit?
-        #.if (carry?)                    #     Families using shared groups do not need to clear the MTRRs since that is done at power-on reset
-            #  Note: Relying on MSRs to be cleared to 0's at reset for families w/shared cores
-            # Clear all variable and Fixed MTRRs for non-shared cores
-        jnc 0f
-        mov     $AMD_MTRR_VARIABLE_BASE0, %ecx
-        xor     %eax, %eax
-        xor     %edx, %edx
-        #.while (cl != 10h)                  # Variable MTRRphysBase[n] and MTRRphysMask[n]
-        jmp	1f
-        2:
-            _WRMSR
-            inc     %cl
-        #.endw
-        1:
-        cmp	$0x10, %cl
-        jne	2b
-        mov     $AMD_MTRR_FIX64k_00000, %cx   # MSR:0000_0250
-        _WRMSR
-        mov     $AMD_MTRR_FIX16k_80000, %cx   # MSR:0000_0258
-        _WRMSR
-        mov     $AMD_MTRR_FIX16k_A0000, %cx   # MSR:0000_0259
-        _WRMSR
-        mov     $AMD_MTRR_FIX4k_C0000, %cx    # Fixed 4Ks: MTRRfix4K_C0000 to MTRRfix4K_F8000
-        #.while (cl != 70h)
-        jmp 3f
-        4:
-            _WRMSR
-            inc     %cl
-        #.endw
-        3:
-        cmp $0x70, %cl
-        jne  4b
-        # Set TOP_MEM (C001_001A) for non-shared cores to 16M. This will be increased at heap init.
-        #  - not strictly needed since the FixedMTRRs take presedence.
-        mov     $(16 * 1024 * 1024), %eax
-        mov     $TOP_MEM, %ecx            # MSR:C001_001A
-        _WRMSR
-        #.endif                          #   End Is_Primary
-    #.endif                              # End Stack_ReEntry
-    0:
-    # Clear IORRs (C001_0016-19) and TOM2(C001_001D) for all cores
-    xor     %eax, %eax
-    xor     %edx, %edx
-    mov     $IORR_BASE, %ecx              # MSR:C001_0016 - 0019
-    #.while (cl != 1Ah)
-    jmp  1f
-    2:
-        _WRMSR
-        inc     %cl
-    #.endw
-    1:
-    cmp $0x1A, %cl
-    jne  2b
-    mov     $TOP_MEM2, %ecx               # MSR:C001_001D
-    _WRMSR
-
-    # setup MTTRs for stacks
-    #   A speculative read can be generated by a speculative fetch mis-aligned in a code zone
-    #    or due to a data zone being interpreted as code. When a speculative read occurs outside a
-    #    controlled region (intentionally used by software), it could cause an unwanted cache eviction.
-    #   To prevent speculative reads from causing an eviction, the unused cache ranges are set
-    #    to UC type. Only the actively used regions (stack, heap) are reflected in the MTRRs.
-    #    Note: some core stack regions will share an MTRR since the control granularity is much
-    #    larger than the allocated stack zone. The allocation algorithm must account for this 'extra'
-    #    space covered by the MTRR when parseling out cache space for the various uses. In some cases
-    #    this could reduce the amount of EXE cache available to a core. see cpuCacheInit.c
-    #
-    # Outcome of this block is that:   (Note the MTRR map at the top of the file)
-    #   ebp - start address of stack block
-    #   ebx - [31:16] - MTRR MSR address
-    #       - [15:8]  - slot# in MTRR register
-    #       - [7:0]   - block size in #4K blocks
-    # review: ESI[31:24]=Flags; SI[15,8]= Node#; SI[7,0]= core# (relative to node)
-    #
-
-    mov     %si, %ax                      # Load node, core
-    #.if (al == 0)                       # Is a core 0?
-    or %al, %al
-    jne 1f
-        #.if (ah == 0)                   # Is Node 0? (BSP)
-        or %ah, %ah
-        jne 2f
-            # Is BSP, assign a 64K stack
-            mov     $((AMD_MTRR_FIX64k_00000 << 16) + (3 << 8) + (BSP_STACK_SIZE  / 0x1000)), %ebx
-            mov     $BSP_STACK_BASE_ADDR, %ebp
-            jmp     0f
-        #.else   # node 1 to 7, core0
-        2:
-            # Is a Core0 of secondary node, assign 16K stacks
-            mov     $AMD_MTRR_FIX16k_80000, %bx
-            shl     $16, %ebx             #
-            mov     %ah, %bh              # Node# is used as slot#
-            mov     $(CORE0_STACK_SIZE / 0x1000), %bl
-            mov     %ah, %al              # Base = (Node# * Size)#
-            mul     %bl                  #
-            movzx   %ax, %eax             #
-            shl     $12, %eax             # Expand back to full byte count (* 4K)
-            add     $CORE0_STACK_BASE_ADDR, %eax
-            mov     %eax, %ebp
-        #.endif
-        jmp 0f
-    #.else    #core 1 thru core 7
-    1:
-        # Is core 1-7 of any node, assign 4K stacks
-        mov     $8, %al                   # CoreIndex = ( (Node# * 8) ...
-        mul     %ah                      #
-        mov     %si, %bx                  #
-        add     %bl, %al                  #         ...  + Core#)#
-
-        mov     $AMD_MTRR_FIX64k_00000, %bx
-        shl     $16, %ebx                 #
-        mov     %al, %bh                  # Slot# = (CoreIndex / 16) + 4#
-        shr     $4, %bh                   #
-        add     $4, %bh                   #
-        mov     $(CORE1_STACK_SIZE / 0x1000), %bl
-
-        mul     %bl                      # Base = ( (CoreIndex * Size) ...
-        movzx   %ax, %eax                 #
-        shl     $12, %eax                 # Expand back to full byte count (* 4K)
-        add     $CORE1_STACK_BASE_ADDR, %eax #     ...   + Base_Addr)#
-        mov     %eax, %ebp
-    #.endif
-    0:
-
-    # Now set the MTRR. Add this to already existing settings (don't clear any MTRR)
-    mov     $WB_DRAM_TYPE, %edi           # Load Cache type in 1st slot
-    mov     %bh, %cl                      # ShiftCount =  ((slot#   ...
-    and     $0x03, %cl                     #   ...  % 4)             ...
-    shl     $0x03, %cl                       #   ...  * 8)#
-    shl     %cl, %edi                     # Cache type is now in correct position
-    ror     $16, %ebx                     # Get the MTRR address
-    movzx   %bx, %ecx                     #
-    rol     $16, %ebx                     # Put slot# & size back in BX
-    _RDMSR                              # Read-modify-write the MSR
-    #.if (bh < 4)                        # Is value in lower or upper half of MSR?
-    cmp $4, %bh
-    jae 1f
-        or      %edi, %eax                #
-        jmp     0f
-    #.else
-    1:                               #
-        or      %edi, %edx                #
-    #.endif                              #
-    0:
-    _WRMSR                              #
-
-    # Enable MTRR defaults as UC type
-    mov     $AMD_MTRR_DEFTYPE, %ecx       # MSR:0000_02FF
-    _RDMSR                              # Read-modify-write the MSR
-    bts     $MTRR_DEF_TYPE_EN, %eax       # MtrrDefTypeEn
-    bts     $MTRR_DEF_TYPE_FIX_EN, %eax   # MtrrDefTypeFixEn
-    _WRMSR
-
-    # Close the modification window on the Fixed MTRRs
-    mov     $MTRR_SYS_CFG, %ecx           # MSR:0C001_0010
-    _RDMSR
-    bts     $MTRR_FIX_DRAM_EN, %eax       # MtrrFixDramEn
-    bts     $MTRR_VAR_DRAM_EN, %eax       # variable MTRR enable bit
-    btr     $MTRR_FIX_DRAM_MOD_EN, %eax   # Turn off modification enable bit
-    _WRMSR
-
-    # Enable caching in CR0
-    mov     %cr0, %eax                    # Enable WT/WB cache
-    btr     $CR0_PG, %eax                     # Make sure paging is disabled
-    btr     $CR0_CD, %eax                     # Clear CR0 NW and CD
-    btr     $CR0_NW, %eax
-    mov     %eax, %cr0
-
-    # Use the Stack Base & size to calculate SS and ESP values
-    # review:
-    #       esi[31:24]=Flags; esi[15,8]= Node#; esi[7,0]= core# (relative to node)
-    #       ebp - start address of stack block
-    #       ebx - [31:16] - MTRR MSR address
-    #           - [15:8]  - slot# in MTRR register
-    #           - [7:0]   - block size in #4K blocks
-    #
-    mov     %ebp, %esp                    # Initialize the stack pointer
-    mov     %esp, %edi                    # Copy the stack start to edi
-    movzx   %bl, %bx
-    movzx   %bx, %ebx                     # Clear upper ebx, don't need MSR addr anymore
-    shl     $12, %ebx                     # Make size full byte count (* 4K)
-    add     %ebx, %esp                    # Set the Stack Pointer as full linear address
-    sub     $4, %esp
-    mov     %esp,%ebp
-    #
-    # review:
-    #       esi[31:24]=Flags; esi[15,8]= Node#; esi[7,0]= core# (relative to node)
-    #       edi - 32b start address of stack block
-    #       ebx - size of stack block
-    #       esp - 32b linear stack pointer
-    #
-
-    # Determine mode for SS base;
-    mov     %cr0, %ecx                    # Check for 32-bit protect mode
-    bt      $CR0_PE, %ecx                 #
-    #.if (!carry?)                       # PE=0 means real mode
-    jc      Protected32Mode
-    mov     %cs, %cx                      # PE=1
-    cmp     $0x0D000, %cx                  # Check for CS
-    jb      Protected32Mode             # If CS < D000, it is a selector instead of a segment
-            # alter SS:ESP for 16b Real Mode:
-Real16bMode:
-    mov     %edi, %eax
-    shr     $4, %eax                      # Create a Real Mode segment for ss, ds, es
-    mov     %ax, %ss
-    mov     %ax, %ds
-    mov     %ax, %es
-    shl     $4, %eax
-    sub     %eax, %edi                    # Adjust the clearing pointer for Seg:Offset mode
-    mov     %ebx, %esp                    # Make SP an offset from SS
-    sub     $4, %esp              #
-    mov     %esp,%ebp
-    #    .endif                          # endif
-    # #else
-    #   Default is to use Protected 32b Mode
-    #.endif
-    ;
-Protected32Mode:
-    #
-    # Clear The Stack
-    #   Now that we have set the location and the MTRRs, initialize the cache by
-    #   reading then writing to zero all of the stack area.
-    # review:
-    #       ss  - Stack base
-    #       esp - stack pointer
-    #       ebx - size of stack block
-    #       esi[31:24]=Flags; esi[15,8]= Node#; esi[7,0]= core# (relative to node)
-    #       edi -  address of start of stack block
-    #
-
-ClearTheStack:                          # Stack base is in SS, stack pointer is in ESP
-    shr     $2, %ebx                      # ebx = stack block size in dwords
-    mov     %bx, %cx                      #
-    # Check our flags - Don't clear an existing stack
-    #.if ( !(esi & 0FF000000h))          # Check our flags
-    test    $(1 << FLAG_STACK_REENTRY), %esi
-    jne 1f
-        cld
-        mov     %edi, %esi
-        rep     lodsl (%esi)    # Pre-load the range
-        xor     %eax, %eax
-        mov     %bx, %cx
-        mov     %edi, %esi                # Preserve base for push on stack
-        rep     stosl (%edi)    # Clear the range
-        movl     $0x0ABCDDCBA, (%esp) # Put marker in top stack dword
-        shl     $2, %ebx                  # Put stack size and base
-        push    %ebx                     #  in top of stack
-        push    %esi
-
-        mov     %ebx, %ecx                # Return size of stack in bytes
-        xor     %eax, %eax                # eax = 0 : no error return code
-        jmp     0f
-    #.else
-    1:
-        movzx   %cx, %ecx
-        shl     $2, %ecx                  # Return size of stack in bytes
-        mov     %esi, %eax
-        shr     $24, %eax                 # Keep the flags as part of the error report
-        or      $0x40000000, %eax          # eax = AGESA_WARNING (Stack has already been set up)
-    #.endif
-    0:
-
-    movd        %mm0, %ebx                # Restore return address
-    movd        %mm1, %ebp
-.endm
-
-/*****************************************************************************
-* AMD_DISABLE_STACK:  Destroy the stack inside the cache. This routine
-*                     should only be executed on the BSP
-*
-*   In:
-*       none
-*
-*   Out:
-*       EAX = AGESA_SUCCESS
-*
-*   Preserved:
-*       ebx
-*   Destroyed:
-*       eax, ecx, edx, esp
-*****************************************************************************/
-.macro  AMD_DISABLE_STACK
-
-    mov     %ebx, %esp                    # Save return address
-
-    # get node/core/flags of current executing core
-    GET_NODE_ID_CORE_ID                 # Sets ESI[15,8]= Node#; ESI[7,0]= core# (relative to node)
-
-    # Turn on modification enable bit
-    mov     $MTRR_SYS_CFG, %ecx           # MSR:C001_0010
-    _RDMSR
-    bts     $MTRR_FIX_DRAM_MOD_EN, %eax   # Enable modifications
-    _WRMSR
-
-    # Set lower 640K MTRRs for Write-Back memory caching
-    mov     $AMD_MTRR_FIX64k_00000, %ecx
-    mov     $0x1E1E1E1E, %eax
-    mov     %eax, %edx
-    _WRMSR                              # 0 - 512K = WB Mem
-    mov     $AMD_MTRR_FIX16k_80000, %ecx
-    _WRMSR                              # 512K - 640K = WB Mem
-
-    # Turn off modification enable bit
-    mov     $MTRR_SYS_CFG, %ecx           # MSR:C001_0010
-    _RDMSR
-    btr     $MTRR_FIX_DRAM_MOD_EN, %eax   # Disable modification
-    _WRMSR
-
-    AMD_DISABLE_STACK_FAMILY_HOOK       # Re-Enable 'normal' cache operations
-
-    mov     %esp, %ebx
-    xor     %eax, %eax
-
-.endm
-

pi/amd/00660F01/AGESA.h

diff --git a/pi/amd/00660F01/AGESA.h b/pi/amd/00660F01/AGESA.h
deleted file mode 100644
index a47e14f..0000000
--- a/pi/amd/00660F01/AGESA.h
+++ /dev/null
@@ -1,3889 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Agesa structures and definitions
- *
- * Contains AMD AGESA core interface
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Include
- * @e \$Revision: 314282 $   @e \$Date: 2015-03-08 04:44:40 -0500 (Sun, 08 Mar 2015) $
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-
-#ifndef _AGESA_H_
-#define _AGESA_H_
-
-#include  "Porting.h"
-#include  "AMD.h"
-
-//
-//
-// AGESA Types and Definitions
-//
-//
-
-// AGESA BASIC CALLOUTS
-#define AGESA_MEM_RELEASE              0x00028000ul
-
-// AGESA ADVANCED CALLOUTS, Processor
-#define AGESA_CHECK_UMA                         0x00028100ul
-#define AGESA_DO_RESET                          0x00028101ul
-#define AGESA_ALLOCATE_BUFFER                   0x00028102ul
-#define AGESA_DEALLOCATE_BUFFER                 0x00028103ul
-#define AGESA_LOCATE_BUFFER                     0x00028104ul
-#define AGESA_RUNFUNC_ONAP                      0x00028105ul
-#define AGESA_RUNFUNC_ON_ALL_APS                0x00028106ul
-#define AGESA_IDLE_AN_AP                        0x00028107ul
-#define AGESA_WAIT_FOR_ALL_APS                  0x00028108ul
-
-// AGESA ADVANCED CALLOUTS, Memory
-#define AGESA_READ_SPD                 0x00028140ul
-#define AGESA_HOOKBEFORE_DRAM_INIT     0x00028141ul
-#define AGESA_HOOKBEFORE_DQS_TRAINING  0x00028142ul
-#define AGESA_READ_SPD_RECOVERY        0x00028143ul
-#define AGESA_HOOKBEFORE_EXIT_SELF_REF 0x00028144ul
-#define AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY     0x00028145ul
-#define AGESA_EXTERNAL_2D_TRAIN_VREF_CHANGE     0x00028146ul
-#define AGESA_EXTERNAL_VOLTAGE_ADJUST  0x00028147ul
-
-// AGESA IDS CALLOUTS
-#define AGESA_GET_IDS_INIT_DATA       0x00028200ul
-
-// AGESA GNB CALLOUTS
-#define AGESA_GNB_PCIE_SLOT_RESET      0x00028301ul
-#define AGESA_GNB_GFX_GET_VBIOS_IMAGE  0x00028302ul
-#define AGESA_GNB_PCIE_CLK_REQ         0x00028303ul
-
-// AGESA FCH CALLOUTS
-#define AGESA_FCH_OEM_CALLOUT          0x00028401ul
-
-//-----------------------------------------------------------------------------
-//                     FCH DEFINITIONS AND MACROS
-//
-//-----------------------------------------------------------------------------
-
-/// Configuration values for SdConfig
-typedef enum {
-  SdDisable = 0,                      ///< Disabled
-  SdVer2,                             ///< Version 2.0
-  SdVer3,                              ///< Version 3.0
-  SdV3SDR50,                            ///< V3 SdSDR50
-  SdV3SDR104,                          ///< V3 SdSDR104
-  SdV3DDR50,                             ///< V3 SdDDR50
-  SdDump                             ///< SD DUMP, don't touch SD
-} SD_MODE;
-
-/// Configuration values for SdClockControl
-typedef enum {
-  Sd50MhzTraceCableLengthWithinSixInches = 4,           ///< 50Mhz, default
-  Sd40MhzTraceCableLengthSix2ElevenInches = 6,          ///< 40Mhz
-  Sd25MhzTraceCableLengthEleven2TwentyfourInches = 7,   ///< 25Mhz
-} SD_CLOCK_CONTROL;
-
-/// Configuration values for AzaliaController
-typedef enum {
-  AzAuto = 0,                         ///< Auto - Detect Azalia controller automatically
-  AzDisable,                          ///< Diable - Disable Azalia controller
-  AzEnable                            ///< Enable - Enable Azalia controller
-} HDA_CONFIG;
-
-/// Configuration values for IrConfig
-typedef enum {
-  IrDisable  = 0,                     ///< Disable
-  IrRxTx0    = 1,                     ///< Rx and Tx0
-  IrRxTx1    = 2,                     ///< Rx and Tx1
-  IrRxTx0Tx1 = 3                      ///< Rx and both Tx0,Tx1
-} IR_CONFIG;
-
-/// Configuration values for SataClass
-typedef enum {
-  SataNativeIde = 0,                  ///< Native IDE mode
-  SataRaid,                           ///< RAID mode
-  SataAhci,                           ///< AHCI mode
-  SataLegacyIde,                      ///< Legacy IDE mode
-  SataIde2Ahci,                       ///< IDE->AHCI mode
-  SataAhci7804,                       ///< AHCI mode as 7804 ID (AMD driver)
-  SataIde2Ahci7804                    ///< IDE->AHCI mode as 7804 ID (AMD driver)
-} SATA_CLASS;
-
-/// Configuration values for BLDCFG_FCH_GPP_LINK_CONFIG
-typedef enum {
-  PortA4       = 0,                   ///< 4:0:0:0
-  PortA2B2     = 2,                   ///< 2:2:0:0
-  PortA2B1C1   = 3,                   ///< 2:1:1:0
-  PortA1B1C1D1 = 4                    ///< 1:1:1:1
-} GPP_LINKMODE;
-
-/// Configuration values for FchPowerFail
-typedef enum {
-  AlwaysOff   = 0,                    ///< Always power off after power resumes
-  AlwaysOn    = 1,                    ///< Always power on after power resumes
-  UsePrevious = 3,                    ///< Resume to same setting when power fails
-} POWER_FAIL;
-
-
-/// Configuration values for SATA Link Speed
-typedef enum {
-  Gen1   = 1,                         ///< SATA port GEN1 speed
-  Gen2   = 2,                         ///< SATA port GEN2 speed
-  Gen3   = 3,                         ///< SATA port GEN3 speed
-} SATA_SPEED;
-
-
-/// Configuration values for GPIO function
-typedef enum {
-  Function0   = 0,                    ///< GPIO Function 1
-  Function1   = 1,                    ///< GPIO Function 1
-  Function2   = 2,                    ///< GPIO Function 2
-  Function3   = 3,                    ///< GPIO Function 3
-} GPIO_FUN;
-
-/// Configuration values for memory phy voltage (VDDR)
-#define  VOLT0_95   0                 ///< VDDR 0.95V
-#define  VOLT1_05   1                 ///< VDDR 1.05V
-#define  MAX_VDDR   2                 ///< Maxmum value for this enum definition
-
-/// Configuration values for GPIO_CFG
-typedef enum {
-  OwnedByEc   = 1 << 0,               ///< This bit can only be written by EC
-  OwnedByHost = 1 << 1,               ///< This bit can only be written by host (BIOS)
-  Sticky      = 1 << 2,               ///< If set, [6:3] are sticky
-  PullUpB     = 1 << 3,               ///< 0: Pullup enable; 1: Pullup disabled
-  PullDown    = 1 << 4,               ///< 0: Pulldown disabled; 1: Pulldown enable
-  GpioOutEnB  = 1 << 5,               ///< 0: Output enable; 1: Output disable
-  GpioOut     = 1 << 6,               ///< Output state when GpioOutEnB is 0
-  GpioIn      = 1 << 7,               ///< This bit is read only - current pin state
-} CFG_BYTE;
-
-/// Configuration values for GPIO_CFG2
-typedef enum {
-  DrvStrengthSel_4mA = 0 << 1,               ///< 18:17 DrvStrengthSel.
-  DrvStrengthSel_8mA = 1 << 1,               ///< 18:17 DrvStrengthSel.
-  DrvStrengthSel_12mA = 2 << 1,               ///< 18:17 DrvStrengthSel.
-  DrvStrengthSel_16mA = 3 << 1,               ///< 18:17 DrvStrengthSel.
-  PullUpSel_8K     = 1 << 3,               ///< 19 PullUpSel. Read-write. 0=4 K pull-up is selected. 1=8 K pull-up is selected.
-  PullUpEnable    = 1 << 4,               ///< 20 PullUpEnable. Read-write. 0=Pull-up is disabled on the pin. 1=Pull-up is enabled on the pin.
-  PullDownEnable  = 1 << 5,               ///< 21 PullDownEnable. Read-write. 0=Pull-down is disabled on the pin. 1=Pull-down is enabled on thepin.
-  OutputValue     = 1 << 6,               ///< 22 OutputValue. Read-write. 0=low. 1=high.
-  OutputEnable      = 1 << 7,               ///< 23 OutputEnable. Read-write. 0=Output is disabled on the pin. 1=Output is enabled on the pin.
-} CFG2_BYTE;
-
-/// FCH GPIO CONTROL
-typedef struct {
-  IN         UINT8        GpioPin;               ///< Gpio Pin, valid range: 0-67, 128-150, 160-228
-  IN         GPIO_FUN     PinFunction;           ///< Multi-function selection
-  IN         CFG_BYTE     CfgByte;               ///< GPIO Register value
-} GPIO_CONTROL;
-
-///
-/// FCH SCI MAP CONTROL
-///
-typedef struct {
-  IN         UINT8        InputPin;              ///< Input Pin, valid range 0-63
-  IN         UINT8        GpeMap;                ///< Gpe Map, valid range 0-31
-} SCI_MAP_CONTROL;
-
-///
-/// FCH SATA PHY CONTROL
-///
-typedef struct {
-  IN         BOOLEAN      CommonPhy;             ///< Common PHY or not
-                                      ///<   @li <b>FALSE</b> - Only applied to specified port
-                                      ///<   @li <b>TRUE</b>  - Apply to all SATA ports
-  IN         SATA_SPEED   Gen;                   ///< SATA speed
-  IN         UINT8        Port;                  ///< Port number, valid range: 0-7
-  IN         UINT32       PhyData;               ///< SATA PHY data, valid range: 0-0xFFFFFFFF
-} SATA_PHY_CONTROL;
-
-///
-/// FCH Component Data Structure in InitReset stage
-///
-typedef struct {
-  IN       BOOLEAN      UmiGen2;             ///< Enable Gen2 data rate of UMI
-                                             ///<   @li <b>FALSE</b> - Disable Gen2
-                                             ///<   @li <b>TRUE</b>  - Enable Gen2
-
-  IN       BOOLEAN      SataEnable;          ///< SATA controller function
-                                             ///<   @li <b>FALSE</b> - SATA controller is disabled
-                                             ///<   @li <b>TRUE</b> - SATA controller is enabled
-
-  IN       BOOLEAN      IdeEnable;           ///< SATA IDE controller mode enabled/disabled
-                                             ///<   @li <b>FALSE</b> - IDE controller is disabled
-                                             ///<   @li <b>TRUE</b> - IDE controller is enabled
-
-  IN       BOOLEAN      GppEnable;           ///< Master switch of GPP function
-                                             ///<   @li <b>FALSE</b> - GPP disabled
-                                             ///<   @li <b>TRUE</b> - GPP enabled
-
-  IN       BOOLEAN      Xhci0Enable;         ///< XHCI0 controller function
-                                             ///<   @li <b>FALSE</b> - XHCI0 controller disabled
-                                             ///<   @li <b>TRUE</b> - XHCI0 controller enabled
-
-  IN       BOOLEAN      Xhci1Enable;         ///< XHCI1 controller function
-                                             ///<   @li <b>FALSE</b> - XHCI1 controller disabled
-                                             ///<   @li <b>TRUE</b> - XHCI1 controller enabled
-} FCH_RESET_INTERFACE;
-
-
-///
-/// FCH Component Data Structure from InitEnv stage
-///
-typedef struct {
-  IN       SD_MODE      SdConfig;            ///< Secure Digital (SD) controller mode
-  IN       HDA_CONFIG   AzaliaController;    ///< Azalia HD Audio Controller
-
-  IN       IR_CONFIG    IrConfig;            ///< Infrared (IR) Configuration
-  IN       BOOLEAN      UmiGen2;             ///< Enable Gen2 data rate of UMI
-                                             ///<   @li <b>FALSE</b> - Disable Gen2
-                                             ///<   @li <b>TRUE</b>  - Enable Gen2
-
-  IN       SATA_CLASS   SataClass;           ///< SATA controller mode
-  IN       BOOLEAN      SataEnable;          ///< SATA controller function
-                                             ///<   @li <b>FALSE</b> - SATA controller is disabled
-                                             ///<   @li <b>TRUE</b> - SATA controller is enabled
-
-  IN       BOOLEAN      IdeEnable;           ///< SATA IDE controller mode enabled/disabled
-                                             ///<   @li <b>FALSE</b> - IDE controller is disabled
-                                             ///<   @li <b>TRUE</b> - IDE controller is enabled
-
-  IN       BOOLEAN      SataIdeMode;         ///< Native mode of SATA IDE controller
-                                             ///<   @li <b>FALSE</b> - Legacy IDE mode
-                                             ///<   @li <b>TRUE</b> - Native IDE mode
-
-  IN       BOOLEAN      Ohci1Enable;         ///< OHCI controller #1 Function
-                                             ///<   @li <b>FALSE</b> - OHCI1 is disabled
-                                             ///<   @li <b>TRUE</b> - OHCI1 is enabled
-
-  IN       BOOLEAN      Ohci2Enable;         ///< OHCI controller #2 Function
-                                             ///<   @li <b>FALSE</b> - OHCI2 is disabled
-                                             ///<   @li <b>TRUE</b> - OHCI2 is enabled
-
-  IN       BOOLEAN      Ohci3Enable;         ///< OHCI controller #3 Function
-                                             ///<   @li <b>FALSE</b> - OHCI3 is disabled
-                                             ///<   @li <b>TRUE</b> - OHCI3 is enabled
-
-  IN       BOOLEAN      Ohci4Enable;         ///< OHCI controller #4 Function
-                                             ///<   @li <b>FALSE</b> - OHCI4 is disabled
-                                             ///<   @li <b>TRUE</b> - OHCI4 is enabled
-
-  IN       BOOLEAN      GppEnable;           ///< Master switch of GPP function
-                                             ///<   @li <b>FALSE</b> - GPP disabled
-                                             ///<   @li <b>TRUE</b> - GPP enabled
-
-  IN       POWER_FAIL   FchPowerFail;        ///< FCH power failure option
-} FCH_INTERFACE;
-
-
-/*----------------------------------------------------------------------------
- *   CPU Feature related info
- *----------------------------------------------------------------------------
- */
-/// Build Configuration values for BLDCFG_PLATFORM_CONNECTED_STANDBY_MODE
-typedef enum {
-  ConnectedStandbyAuto     = 0,     ///< Auto
-  ConnectedStandbyDisabled = 1,     ///< Disabled
-  MaxConnectedStandbyMode  = 2      ///< Not a valid value, used for verifying input
-} PLATFORM_CONNECTED_STANDBY_MODES;
-
-/// Build Configuration values for BLDCFG_PLATFORM_CSTATE_MODE
-typedef enum {
-  CStateModeDisabled = 0,           ///< Disabled
-  CStateModeC6       = 1,           ///< C6 State
-  MaxCStateMode      = 2            ///< Not a valid value, used for verifying input
-} PLATFORM_CSTATE_MODES;
-
-/// Build Configuration values for BLDCFG_PLATFORM_CPB_MODE
-typedef enum {
-  CpbModeAuto     = 0,           ///< Auto
-  CpbModeDisabled = 1,           ///< Disabled
-  MaxCpbMode      = 2            ///< Not a valid value, used for verifying input
-} PLATFORM_CPB_MODES;
-
-
-/// Build Configuration values for BLDCFG_ACPI_PSTATES_PSD_POLICY
-#define PsdPolicyProcessorDefault  0       ///< PSD is dependent or independent per processor default
-#define PsdPolicyDependent         1       ///< PSD is forced dependent
-#define PsdPolicyIndependent       2       ///< PSD is forced independent
-#define PsdPolicyMax               3       ///< Not a valid value, used for verifying input
-
-/*----------------------------------------------------------------------------
- *   GNB PCIe configuration info
- *----------------------------------------------------------------------------
- */
-
-// Event definitions
-
-#define GNB_EVENT_INVALID_CONFIGURATION               0x20010000ul   // User configuration invalid
-#define GNB_EVENT_INVALID_PCIE_TOPOLOGY_CONFIGURATION 0x20010001ul   // Requested lane allocation for PCIe port can not be supported
-#define GNB_EVENT_INVALID_PCIE_PORT_CONFIGURATION     0x20010002ul   // Requested incorrect PCIe port device address
-#define GNB_EVENT_INVALID_DDI_LINK_CONFIGURATION      0x20010003ul   // Incorrect parameter in DDI link configuration
-#define GNB_EVENT_INVALID_LINK_WIDTH_CONFIGURATION    0x20010004ul   // Invalid with for PCIe port or DDI link
-#define GNB_EVENT_INVALID_LANES_CONFIGURATION         0x20010005ul   // Lane double subscribe lanes
-#define GNB_EVENT_INVALID_DDI_TOPOLOGY_CONFIGURATION  0x20010006ul   // Requested lane allocation for DDI link(s) can not be supported
-#define GNB_EVENT_LINK_TRAINING_FAIL                  0x20020000ul   // PCIe Link training fail
-#define GNB_EVENT_BROKEN_LANE_RECOVERY                0x20030000ul   // Broken lane workaround applied to recover link training
-#define GNB_EVENT_GEN2_SUPPORT_RECOVERY               0x20040000ul   // Scale back to GEN1 to recover link training
-
-
-#define DESCRIPTOR_TERMINATE_LIST           0x80000000ull
-#define DESCRIPTOR_IGNORE                   0x40000000ull
-
-/// PCIe link initialization
-typedef enum {
-  EndpointDetect = 0,                                     ///< Detect endpoint presence
-  EndpointNotPresent                                      ///< Endpoint not present (or connected). Used in case there is alternative way to determine
-                                                          ///< if device present on board or in slot. For example GPIO can be used to determine device presence.
-} PCIE_ENDPOINT_STATUS;
-
-
-/// PCIe port misc extended controls
-typedef struct  {
-  IN      UINT8                     LinkComplianceMode :1;  ///< Force port into compliance mode (device will not be trained, port output compliance pattern)
-  IN      UINT8                     LinkSafeMode       :2;  /**< Safe mode PCIe capability. (Parameter may limit PCIe speed requested through PCIe_PORT_DATA::LinkSpeedCapability)
-                                                             *  @li @b 0 - port can advertize muximum supported capability
-                                                             *  @li @b 1 - port limit advertized capability and speed to PCIe Gen1
-                                                             */
-  IN      UINT8                     SbLink             :1;  /**< PCIe link type
-                                                             *  @li @b 0 - General purpose port
-                                                             *  @li @b 1 - Port connected to SB
-                                                             */
-  IN      UINT8                     ClkPmSupport       :1;  /**< Clock Power Management Support
-                                                             *  @li @b 0 - Clock Power Management not configured
-                                                             *  @li @b 1 - Clock Power Management configured according to PCIe device capability
-                                                             */
-} PCIe_PORT_MISC_CONTROL;
-
-/// The IO APIC Interrupt Mapping Info
-typedef struct {
-  IN      UINT8                     GroupMap;               /**< Group mapping for slot or endpoint device (connected to PCIE port) interrupts .
-                                                             *  @li <b>0</b> - IGNORE THIS STRUCTURE AND USE RECOMMENDED SETTINGS
-                                                             *  @li <b>1</b> - mapped to Grp 0 (Interrupts 0..3   of IO APIC redirection table)
-                                                             *  @li <b>2</b> - mapped to Grp 1 (Interrupts 4..7   of IO APIC redirection table)
-                                                             *  @li ...
-                                                             *  @li <b>8</b> - mapped to Grp 7 (Interrupts 28..31 of IO APIC redirection table)
-                                                             */
-  IN      UINT8                     Swizzle;                /**< Swizzle interrupt in the Group.
-                                                             *  @li <b>0</b> - ABCD
-                                                             *  @li <b>1</b> - BCDA
-                                                             *  @li <b>2</b> - CDAB
-                                                             *  @li <b>3</b> - DABC
-                                                             */
-  IN      UINT8                     BridgeInt;              /**< IOAPIC redirection table entry for PCIE bridge interrupt
-                                                             *  @li <b>0</b>  - Entry 0  of IO APIC redirection table
-                                                             *  @li <b>1</b>  - Entry 1  of IO APIC redirection table
-                                                             *  @li ...
-                                                             *  @li <b>31</b> - Entry 31 of IO APIC redirection table
-                                                             */
-} APIC_DEVICE_INFO;
-
-/// Initial Offset Calibration Control
-typedef enum {
-  ADAPT_IOC_DISABLED = 0,                                     ///< Initial Offset Calibration Disabled
-  ADAPT_IOC_ENABLED                                           ///< Initial Offset Calibration Enabled
-} ADAPT_IOC_CONTROL;
-
-/// DFE Control values
-typedef enum {
-  ADAPT_DFE_CONTROL_DISABLED = 0,                             ///< DFE Disabled
-  ADAPD_DFE_CONTROL_1TAP_DFE = 4,                             ///< 1-tap DFE
-  ADAPD_DFE_CONTROL_1TAP_DFE_FBF,                             ///< 1-tap DFE with Future Bit Filtering
-  ADAPD_DFE_CONTROL_2TAP_DFE,                                ///< 2-tap DFE
-  ADAPD_DFE_CONTROL_2TAP_DFE_FBF                              ///< 2-tap DFE with Future Bit Filtering
-} ADAPT_DFE_CONTROL;
-
-/// LEQ Control values
-typedef enum {
-  ADAPT_LEQ_CONTROL_DISABLED = 0,                              ///< LEQ Disabled
-  ADAPT_LEQ_CONTROL_DC_GAIN  = 2,                              ///< DC Gain Adaptation
-  ADAPT_LEQ_CONTROL_DC_GAIN_POLE                               ///< DC Gain and Pole Adaptation
-} ADAPT_LEQ_CONTROL;
-
-/// Dynamic Offset Calibration Control
-typedef enum {
-  ADAPT_DOC_DISABLED = 0,                                      ///< Dynamic Offset Calibration Disabled
-  ADAPT_DOC_ENABLED                                            ///< Dynamic Offset Calibration Enabled
-} ADAPT_DOC_CONTROL;
-
-/// FOM Calculation Control
-typedef enum {
-  ADAPT_FOMC_DISABLED = 0,                                    ///< FOM Calculation Disabled
-  ADAPT_FOMC_ENABLED                                          ///< FOM Calculation Enabled
-} ADAPT_FOMC_CONTROL;
-
-/// PI Offset Calibration Control
-typedef enum {
-  ADAPT_PIOC_DISABLED = 0,                                    ///< PI Offset Calibration Disabled
-  ADAPT_PIOC_ENABLED                                          ///< PI Offset Calibration Enabled
-} ADAPT_PIOC_CONTROL;
-
-/// GEN3 RxAdaptMode Configuration Structure
-typedef struct {
-  IN      BOOLEAN                InitOffsetCancellation;     ///< Initial Offset Cancellation Enable
-  IN      UINT8                  DFEControl;                 ///< DFE Control
-  IN      UINT8                  LEQControl;                 ///< LEQ Control
-  IN      BOOLEAN                DynamicOffsetCalibration;   ///< Dynamic Offset Calibration Enable
-  IN      BOOLEAN                FOMCalculation;             ///< FOM Calculation Enable
-  IN      BOOLEAN                PIOffsetCalibration;        ///< PI Offset Calibratino Enable
-} RX_ADAPT_MODE;
-
-/// PCIe port configuration data
-typedef struct  {
-  IN       UINT8                   PortPresent;              ///< Enable PCIe port for initialization.
-  IN       UINT8                   ChannelType;              /**< Channel type.
-                                                               *  @li @b 0 - "lowLoss",
-                                                               *  @li @b 1 - "highLoss",
-                                                               *  @li @b 2 - "mob0db",
-                                                               *  @li @b 3 - "mob3db",
-                                                               *  @li @b 4 - "extnd6db"
-                                                               *  @li @b 5 - "extnd8db"
-                                                               */
-  IN       UINT8                   DeviceNumber;             /**< PCI Device number for port.
-                                                               *   @li @b 0 - Native port device number
-                                                               *   @li @b N - Port device number (See available configurations in BKDG
-                                                               */
-  IN       UINT8                   FunctionNumber;           ///< Reserved for future use
-  IN       UINT8                   LinkSpeedCapability;      /**< PCIe link speed/
-                                                               *  @li @b 0 - Maximum supported by silicon
-                                                               *  @li @b 1 - Gen1
-                                                               *  @li @b 2 - Gen2
-                                                               *  @li @b 3 - Gen3
-                                                               */
-  IN       UINT8                   LinkAspm;                 /**< ASPM control. (see AgesaPcieLinkAspm for additional option to control ASPM)
-                                                               *  @li @b 0 - Disabled
-                                                               *  @li @b 1 - L0s only
-                                                               *  @li @b 2 - L1 only
-                                                               *  @li @b 3 - L0s and L1
-                                                               */
-  IN       UINT8                   LinkHotplug;              /**< Hotplug control.
-                                                               *  @li @b 0 - Disabled
-                                                               *  @li @b 1 - Basic
-                                                               *  @li @b 2 - Server
-                                                               *  @li @b 3 - Enhanced
-                                                               */
-  IN       UINT8                   ResetId;                  /**< Arbitrary number greater than 0 assigned by platform firmware for GPIO
-                                                               *   identification which control reset for given port.
-                                                               *   Each port with unique GPIO should have unique ResetId assigned.
-                                                               *   All ports use same GPIO to control reset should have same ResetId assigned.
-                                                               *   see AgesaPcieSlotResetContol.
-                                                               */
-  IN       PCIe_PORT_MISC_CONTROL  MiscControls;             ///< Misc extended controls
-  IN       APIC_DEVICE_INFO        ApicDeviceInfo;           ///< IOAPIC device programming info
-  IN       PCIE_ENDPOINT_STATUS    EndpointStatus;           ///< PCIe endpoint (device connected to PCIe port) status
-  IN       RX_ADAPT_MODE           RxAdaptMode;              ///< Gen3 RxAdaptMode configuration
-} PCIe_PORT_DATA;
-
-/// DDI channel lane mapping
-typedef struct {                                          ///< Structure that discribe lane mapping
-  IN      UINT8              Lane0   :2;                  /**< Lane 0 mapping
-                                                           *  @li @b 0 - Map to lane 0
-                                                           *  @li @b 1 - Map to lane 1
-                                                           *  @li @b 2 - Map to lane 2
-                                                           *  @li @b 2 - Map to lane 3
-                                                           */
-  IN      UINT8              Lane1   :2;                  ///< Lane 1 mapping (see "Lane 0 mapping")
-  IN      UINT8              Lane2   :2;                  ///< Lane 2 mapping (see "Lane 0 mapping")
-  IN      UINT8              Lane3   :2;                  ///< Lane 3 mapping (see "Lane 0 mapping")
-} CHANNEL_MAPPING;                                        ///< Lane mapping
-
-/// Common Channel Mapping
-typedef union {
-  IN      UINT8                ChannelMappingValue;       ///< Raw lane mapping
-  IN      CHANNEL_MAPPING      ChannelMapping;            ///< Channel mapping
-} CONN_CHANNEL_MAPPING;
-
-/// DDI Configuration data
-typedef struct  {
-  IN       UINT8                ConnectorType;            /**< Display Connector Type
-                                                            *  @li @b 0 - DP
-                                                            *  @li @b 1 - eDP
-                                                            *  @li @b 2 - Single Link DVI-D
-                                                            *  @li @b 3 - Dual  Link DVI-D (see @ref DualLinkDviDescription "Example Dual Link DVI connector description")
-                                                            *  @li @b 4 - HDMI
-                                                            *  @li @b 5 - DP-to-VGA
-                                                            *  @li @b 6 - DP-to-LVDS
-                                                            *  @li @b 7 - Hudson-2 NutMeg DP-to-VGA
-                                                            *  @li @b 8 - Single Link DVI-I
-                                                            *  @li @b 9 - Native CRT (Family 0x14)
-                                                            *  @li @b 10 - Native LVDS (Family 0x14)
-                                                            *  @li @b 11 - Auto detect LCD panel connector type. VBIOS is able to auto detect the LVDS connector type: native LVDS, eDP or DP-to-LVDS
-                                                            *              The auto detection method only support panel with EDID.
-                                                            */
-  IN       UINT8                AuxIndex;                 /**< Indicates which AUX or DDC Line is used
-                                                            *  @li @b 0 - AUX1
-                                                            *  @li @b 1 - AUX2
-                                                            *  @li @b 2 - AUX3
-                                                            *  @li @b 3 - AUX4
-                                                            *  @li @b 4 - AUX5
-                                                            *  @li @b 5 - AUX6
-                                                            */
-  IN       UINT8                HdpIndex;                 /**< Indicates which HDP pin is used
-                                                            *  @li @b 0 - HDP1
-                                                            *  @li @b 1 - HDP2
-                                                            *  @li @b 2 - HDP3
-                                                            *  @li @b 3 - HDP4
-                                                            *  @li @b 4 - HDP5
-                                                            *  @li @b 5 - HDP6
-                                                            */
-  IN       CONN_CHANNEL_MAPPING Mapping[2];               /**< Set specific mapping of lanes to connector pins
-                                                            *  @li Mapping[0] define mapping for group of 4 lanes starting at PCIe_ENGINE_DATA.StartLane
-                                                            *  @li Mapping[1] define mapping for group of 4 lanes ending at PCIe_ENGINE_DATA.EndLane (only applicable for Dual DDI link)
-                                                            *  if Mapping[x] set to 0 than default mapping assumed
-                                                            */
-  IN       UINT8                LanePnInversionMask;      /**< Specifies whether to invert the state of P and N for each lane. Each bit represents a PCIe lane on the DDI port.
-                                                            *  @li 0 - Do not invert (default)
-                                                            *  @li 1 - Invert P and N on this lane
-                                                            */
-  IN       UINT8                Flags;                    /**< Capabilities flags
-                                                            *  @li Flags bit[0] DDI_DATA_FLAGS_DP1_1_ONLY Selects downgrade PHY link to DP1.1
-                                                            *  @li Flags bit[7:1] Reserved
-                                                            */
-} PCIe_DDI_DATA;
-
-/// Engine Configuration
-typedef struct {
-  IN       UINT8                EngineType;               /**< Engine type
-                                                           *  @li @b 0 -  Ignore engine configuration
-                                                           *  @li @b 1 -  PCIe port
-                                                           *  @li @b 2 -  DDI
-                                                           */
-  IN       UINT16               StartLane;                /**< Start Lane ID (in reversed configuration StartLane > EndLane)
-                                                           * Refer to lane descriptions and supported configurations in BKDG
-                                                           */
-  IN       UINT16               EndLane;                  /**< End lane ID (in reversed configuration StartLane > EndLane)
-                                                           * Refer to lane descriptions and supported configurations in BKDG
-                                                           */
-
-} PCIe_ENGINE_DATA;
-
-/// PCIe port descriptor
-typedef struct {
-  IN       UINT32               Flags;                    /**< Descriptor flags
-                                                           * @li @b Bit31 - last descriptor in complex
-                                                           */
-  IN       PCIe_ENGINE_DATA     EngineData;               ///< Engine data
-  IN       PCIe_PORT_DATA       Port;                     ///< PCIe port specific configuration info
-} PCIe_PORT_DESCRIPTOR;
-
-/// DDI descriptor
-typedef struct {
-  IN       UINT32               Flags;                    /**< Descriptor flags
-                                                           * @li @b Bit31 - last descriptor in complex
-                                                           */
-  IN       PCIe_ENGINE_DATA     EngineData;               ///< Engine data
-  IN       PCIe_DDI_DATA        Ddi;                      ///< DDI port specific configuration info
-} PCIe_DDI_DESCRIPTOR;
-
-/// PCIe Complex descriptor
-typedef struct {
-  IN       UINT32               Flags;                    /**< Descriptor flags
-                                                           * @li @b Bit31 - last descriptor in topology
-                                                           */
-  IN       UINT32               SocketId;                 ///< Socket Id
-  IN       PCIe_PORT_DESCRIPTOR *PciePortList;            ///< Pointer to array of PCIe port descriptors or NULL (Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST).
-  IN       PCIe_DDI_DESCRIPTOR  *DdiLinkList;             ///< Pointer to array DDI link descriptors (Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST).
-  IN       VOID                 *Reserved;                ///< Reserved for future use
-} PCIe_COMPLEX_DESCRIPTOR;
-
-/// Action to control PCIe slot reset
-typedef enum {
-  AssertSlotReset,                                        ///< Assert slot reset
-  DeassertSlotReset                                       ///< Deassert slot reset
-} PCIE_RESET_CONTROL;
-
-///Slot Reset Info
-typedef struct {
-  IN      AMD_CONFIG_PARAMS     StdHeader;                ///< Standard configuration header
-  IN      UINT8                 ResetId;                  ///< Slot reset ID as specified in PCIe_PORT_DESCRIPTOR
-  IN      UINT8                 ResetControl;             ///< Reset control as in PCIE_RESET_CONTROL
-} PCIe_SLOT_RESET_INFO;
-
-#define GFX_VBIOS_IMAGE_FLAG_SPECIAL_POST  0x1
-
-///VBIOS image info
-typedef struct {
-  IN      AMD_CONFIG_PARAMS     StdHeader;                ///< Standard configuration header
-  OUT     VOID                  *ImagePtr;                ///< Pointer to VBIOS image
-  IN      PCI_ADDR              GfxPciAddress;            ///< PCI address of integrated graphics controller
-  IN      UINT32                Flags;                    ///< BIT[0] - special repost requred
-} GFX_VBIOS_IMAGE_INFO;
-
-/// Engine descriptor type
-typedef enum {
-  PcieUnusedEngine = 0,                                   ///< Unused descriptor
-  PciePortEngine = 1,                                     ///< PCIe port
-  PcieDdiEngine = 2,                                      ///< DDI
-  MaxPcieEngine                                           ///< Max engine type for boundary check.
-} PCIE_ENGINE_TYPE;
-
-/// PCIe link capability/speed
-typedef enum  {
-  PcieGenMaxSupported,                                    ///< Maximum supported
-  PcieGen1 = 1,                                           ///< Gen1
-  PcieGen2,                                               ///< Gen2
-  PcieGen3,                                               ///< Gen3
-  MaxPcieGen                                              ///< Max Gen for boundary check
-} PCIE_LINK_SPEED_CAP;
-
-/// PCIe PSPP Power policy
-typedef enum  {
-  PsppDisabled,                                           ///< PSPP disabled
-  PsppPerformance = 1,                                    ///< Performance
-  PsppBalanceHigh,                                        ///< Balance-High
-  PsppBalanceLow,                                         ///< Balance-Low
-  PsppPowerSaving,                                        ///< Power Saving
-  MaxPspp                                                 ///< Max Pspp for boundary check
-} PCIE_PSPP_POLICY;
-
-/// DDI display connector type
-typedef enum {
-  ConnectorTypeDP,                                        ///< DP
-  ConnectorTypeEDP,                                       ///< eDP
-  ConnectorTypeSingleLinkDVI,                             ///< Single Link DVI-D
-  ConnectorTypeDualLinkDVI,                               ///< Dual  Link DVI-D
-  ConnectorTypeHDMI,                                      ///< HDMI
-  ConnectorTypeDpToVga,                                   ///< DP-to-VGA
-  ConnectorTypeDpToLvds,                                  ///< DP-to-LVDS
-  ConnectorTypeNutmegDpToVga,                             ///< Hudson-2 NutMeg DP-to-VGA
-  ConnectorTypeSingleLinkDviI,                            ///< Single Link DVI-I
-  ConnectorTypeCrt,                                       ///< CRT (VGA)
-  ConnectorTypeLvds,                                      ///< LVDS
-  ConnectorTypeEDPToLvds,                                 ///< 3rd party common eDP-to-LVDS translator chip without AMD SW init
-  ConnectorTypeEDPToLvdsSwInit,                           ///< 3rd party eDP-to-LVDS translator which requires AMD SW init
-  ConnectorTypeAutoDetect,                                ///< VBIOS auto detect connector type (native LVDS, eDP or DP-to-LVDS)
-  MaxConnectorType                                        ///< Not valid value, used to verify input
-} PCIE_CONNECTOR_TYPE;
-
-/// PCIe link channel type
-typedef enum {
-  ChannelTypeLowLoss,                                     ///< Low Loss
-  ChannelTypeHighLoss,                                    ///< High Loss
-  ChannelTypeMob0db,                                      ///< Mobile 0dB
-  ChannelTypeMob3db,                                      ///< Mobile 3dB
-  ChannelTypeExt6db,                                      ///< Extended 6dB
-  ChannelTypeExt8db,                                      ///< Extended 8dB
-  MaxChannelType                                          ///< Not valid value, used to verify input
-} PCIE_CHANNEL_TYPE;
-
-/// PCIe link ASPM
-typedef enum {
-  AspmDisabled,                                           ///< Disabled
-  AspmL0s,                                                ///< PCIe L0s link state
-  AspmL1,                                                 ///< PCIe L1 link state
-  AspmL0sL1,                                              ///< PCIe L0s & L1 link state
-  MaxAspm                                                 ///< Not valid value, used to verify input
-} PCIE_ASPM_TYPE;
-
-/// PCIe link hotplug support
-typedef enum {
-  HotplugDisabled,                                        ///< Hotplug disable
-  HotplugBasic,                                           ///< Basic Hotplug
-  HotplugServer,                                          ///< Server Hotplug
-  HotplugEnhanced,                                        ///< Enhanced
-  HotplugInboard,                                         ///< Inboard
-  MaxHotplug                                              ///< Not valid value, used to verify input
-} PCIE_HOTPLUG_TYPE;
-
-/// PCIe link initialization
-typedef enum {
-  PortDisabled,                                           ///< Disable
-  PortEnabled                                             ///< Enable
-} PCIE_PORT_ENABLE;
-
-/// PCIe ACS capability - Access Control Services
-typedef enum  {
-  PcieAcsDisabled,                                        ///< Disabled
-  PcieAcsEnabled,                                         ///< Enabled
-} PCIE_ACS_CAP;
-
-/// PCIe ClkPmSupport initialization
-typedef enum {
-  ClkPmSupportDisabled,                                   ///< Disable
-  ClkPmSupportEnabled                                     ///< Enable
-} CLKPM_SUPPORT_ENABLE;
-
-/// DDI Aux channel
-typedef enum {
-  Aux1,                                                   ///< Aux1
-  Aux2,                                                   ///< Aux2
-  Aux3,                                                   ///< Aux3
-  Aux4,                                                   ///< Aux4
-  Aux5,                                                   ///< Aux5
-  Aux6,                                                   ///< Aux6
-  MaxAux                                                  ///< Not valid value, used to verify input
-} PCIE_AUX_TYPE;
-
-/// DDI Hdp Index
-typedef enum {
-  Hdp1,                                                   ///< Hdp1
-  Hdp2,                                                   ///< Hdp2
-  Hdp3,                                                   ///< Hdp3
-  Hdp4,                                                   ///< Hdp4
-  Hdp5,                                                   ///< Hdp5
-  Hdp6,                                                   ///< Hdp6
-  MaxHdp                                                  ///< Not valid value, used to verify input
-} PCIE_HDP_TYPE;
-
-/// PCIe_DDI_DATA.Flags definitions
-#define DDI_DATA_FLAGS_DP1_1_ONLY                        0x01         ///< BIT[0] Selects downgrade PHY link to DP1.1
-#define EXT_DISPLAY_PATH_CAPS_DP_FIXED_VS_EN             0x02         ///< BIT[1] VBIOS will always output fixed voltage swing during DP link training
-#define EXT_DISPLAY_PATH_CAPS_HDMI20_PI3EQX1204          0x04         ///< BIT[2] HDMI 2.0 connector
-#define EXT_DISPLAY_PATH_CAPS_HDMI20_TISN65DP159RSBT     0x08         ///< BIT[3] HDMI 2.0 connector
-
-/// DP receiver definitions with fixed voltage swing
-typedef enum {
-  DP_VS_0_4V_0DB,                                         ///< 0x00
-  DP_VS_0_6V_0DB,                                         ///< 0x01
-  DP_VS_0_8V_0DB,                                         ///< 0x02
-  DP_VS_1_2V_0DB,                                         ///< 0x03
-  DP_VS_0_4V_3_5DB = 0x8,                                 ///< 0x08
-  DP_VS_0_6V_3_5DB,                                       ///< 0x09
-  DP_VS_0_8V_3_5DB,                                       ///< 0x0a
-  DP_VS_0_4V_6DB = 0x10,                                  ///< 0x10
-  DP_VS_0_6V_6DB,                                         ///< 0x11
-  DP_VS_0_4V_9_5DB = 0x18                                 ///< 0x18
-} DP_FIXED_VOLT_SWING_TYPE;
-
-// definition for eDP 1.4 VSMode
-#define EDP_VS_LEGACY_MODE                  0             ///< Legacy Mode
-#define EDP_VS_LOW_VDIFF_MODE               1             ///< Low Vdiff Training Mode
-#define EDP_VS_HIGH_VDIFF_MODE              2             ///< High Vdiff Training Mode
-#define EDP_VS_STRETCH_MODE                 3             ///< Stretched DP training mode
-#define EDP_VS_SINGLE_VDIFF_MODE            4             ///< Single Vdiff Training Mode
-#define EDP_VS_VARIABLE_PREM_MODE           5             ///< Single Vdiff Training with Variable Transition Vdiff
-
-///  HDMI re-driver register/value
-typedef struct _HDMI_RE_DRIVER_I2C_REG_INFO {
-  IN  UINT8       RegIndex;                               ///< HDMI re-driver Register Index
-  IN  UINT8       RegVal;                                 ///< HDMI re-driver Register Value
-} HDMI_RE_DRIVER_I2C_REG_INFO;
-
-/// AZ I2SBUS select
-typedef enum {
-  GnbAcpI2sBus,                                            ///< I2sBus
-  GnbAcpAzalia,                                            ///< Azalia
-  MaxAcp                                                   ///< Not valid value, used to verify input
-} GNB_ACP_TYPE;
-
-/// AZ I2SBUS pin configuration
-typedef enum {
-  GnbAcp4Tx4RxBluetooth,                                   ///< 4Tx4Rx and Bluetooth
-  GnbAcp2Tx4RxBluetooth,                                   ///< 2Tx4Rx and Bluetooth
-  GnbAcp6Tx4RxBluetooth,                                   ///< 6Tx4Rx and Bluetooth
-  GnbAcpPinNotConfigured                                   ///< Not valid value, used to verify input
-} GNB_ACP_AZ_I2SBUS_PIN;
-
-/// Alternative DRAM MAC
-typedef enum {
-  MAC_UNTESTEDMAC,                               ///< Assign 0 to Untested MAC
-  MAC_700k,                                      ///< Assign 1 to 700k
-  MAC_600k,                                      ///< Assign 2 to 600k
-  MAC_500k,                                      ///< Assign 3 to 500k
-  MAC_400k,                                      ///< Assign 4 to 400k
-  MAC_300k,                                      ///< Assign 5 to 300k
-  MAC_200k,                                      ///< Assign 6 to 200k
-  MAC_UNRESTRICTEDMAC = 8,                       ///< Assign 8 to Unrestricted MAC
-} DRAM_MAXIMUM_ACTIVATE_COUNT;
-
-// Macro for statically initializing various structures
-#define  PCIE_ENGINE_DATA_INITIALIZER(mType, mStartLane, mEndLane) {mType, mStartLane, mEndLane}
-#define  PCIE_PORT_DATA_INITIALIZER(mPortPresent, mChannelType, mDevAddress, mHotplug, mMaxLinkSpeed, mMaxLinkCap, mAspm, mResetId) \
-{mPortPresent, mChannelType, mDevAddress, 0, mMaxLinkSpeed, mAspm, mHotplug, mResetId, {0, mMaxLinkCap, 0, 0}, {0, 0, 0}, EndpointDetect, \
-{ADAPT_IOC_ENABLED, ADAPT_DFE_CONTROL_DISABLED, ADAPT_LEQ_CONTROL_DC_GAIN_POLE, ADAPT_DOC_DISABLED, ADAPT_FOMC_ENABLED, ADAPT_PIOC_DISABLED}}
-#define  PCIE_PORT_DATA_INITIALIZER_V2(mPortPresent, mChannelType, mDevAddress, mDevFunction, mHotplug, mMaxLinkSpeed, mMaxLinkCap, mAspm, mResetId, mClkPmSupport) \
-{mPortPresent, mChannelType, mDevAddress, mDevFunction, mMaxLinkSpeed, mAspm, mHotplug, mResetId, {0, mMaxLinkCap, 0, mClkPmSupport}, {0, 0, 0}, EndpointDetect, \
-{ADAPT_IOC_ENABLED, ADAPT_DFE_CONTROL_DISABLED, ADAPT_LEQ_CONTROL_DC_GAIN_POLE, ADAPT_DOC_DISABLED, ADAPT_FOMC_ENABLED, ADAPT_PIOC_DISABLED}}
-#define  PCIE_PORT_DATA_INITIALIZER_GEN3(mPortPresent, mChannelType, mDevAddress, mDevFunction, mHotplug, mMaxLinkSpeed, mMaxLinkCap, mAspm, mResetId, mClkPmSupport, \
-mInitOffsetCancellation, mDFEControl, mLEQControl, mDynamicOffsetCalibration, mFOMCalculation, mPIOffsetCalibration) \
-{mPortPresent, mChannelType, mDevAddress, mDevFunction, mMaxLinkSpeed, mAspm, mHotplug, mResetId, {0, mMaxLinkCap, 0, mClkPmSupport}, {0, 0, 0}, EndpointDetect, \
-{mInitOffsetCancellation, mDFEControl, mLEQControl, mDynamicOffsetCalibration, mFOMCalculation, mPIOffsetCalibration}}
-#define  PCIE_DDI_DATA_INITIALIZER(mConnectorType, mAuxIndex, mHpdIndex ) \
-{mConnectorType, mAuxIndex, mHpdIndex, {0, 0}, 0, 0}
-#define  PCIE_DDI_DATA_INITIALIZER_V1(mConnectorType, mAuxIndex, mHpdIndex, mMapping0, mMapping1, mPNInversion) \
-{mConnectorType, mAuxIndex, mHpdIndex, {mMapping0, mMapping1}, mPNInversion, 0}
-#define  PCIE_DDI_DATA_INITIALIZER_V2(mConnectorType, mAuxIndex, mHpdIndex, mMapping0, mMapping1, mPNInversion, mFlags) \
-{mConnectorType, mAuxIndex, mHpdIndex, {mMapping0, mMapping1}, mPNInversion, mFlags}
-
-///IOMMU requestor ID
-typedef struct {
-  IN       UINT16     Bus       :8;                                ///< Bus
-  IN       UINT16     Device    :5;                                ///< Device
-  IN       UINT16     Function  :3;                                ///< Function
-} IOMMU_REQUESTOR_ID;
-
-/// IVMD exclusion range descriptor
-typedef struct {
-  IN       UINT32               Flags;                    /**< Descriptor flags
-                                                           * @li @b Flags[31] - Terminate descriptor array.
-                                                           * @li @b Flags[30] - Ignore descriptor.
-                                                           */
-  IN       IOMMU_REQUESTOR_ID   RequestorIdStart;         ///< Requestor ID start
-  IN       IOMMU_REQUESTOR_ID   RequestorIdEnd;           ///< Requestor ID end (use same as start for single ID)
-  IN       UINT64               RangeBaseAddress;         ///< Phisical base address of exclusion range
-  IN       UINT64               RangeLength;              ///< Length of exclusion range in bytes
-} IOMMU_EXCLUSION_RANGE_DESCRIPTOR;
-
-/*----------------------------------------------------------------------------
- *   GNB configuration info
- *----------------------------------------------------------------------------
- */
-
-/// LVDS Misc Control Field
-typedef struct {
-  IN  UINT8     FpdiMode:1;          ///< This item configures LVDS 888bit panel mode
-                                     ///< @li FALSE = LVDS 888 panel in LDI mode
-                                     ///< @li TRUE =  LVDS 888 panel in FPDI mode
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_888_FPDI_MODE}
-  IN  UINT8     DlChSwap:1;          ///< This item configures LVDS panel lower and upper link mapping
-                                     ///< @li FALSE = Lower link and upper link not swap
-                                     ///< @li TRUE = Lower link and upper link are swapped
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_DL_CH_SWAP}
-  IN  UINT8     BitDepth:1;          ///< Customer may use 888 bit LVDS panel, but the LVDS panel EDID does not support v1.4 so that VBIOS can not decide the panel bit per color
-                                     ///< @li FALSE = LCD 666 18bit panel
-                                     ///< @li TRUE = LCD 888 24bit panel
-                                     ///< @BldCfgItem{BLDCFG_LVDS_BIT_DEPTH}
-  IN  UINT8     ParamOverwriteEn:1;  ///< LVDS parameter overwrite enable
-                                     ///< @li FALSE = LVDS parameter overwrite disable
-                                     ///< @li TRUE = LVDS parameter overwrite enable
-                                     ///< @BldCfgItem{BLDCFG_LVDS_PARAM_OVERWRITE_EN}
-  IN  UINT8     BLONActiveLow:1;     ///< This item configures polarity of signal sent to digital BLON output pin
-                                     ///< @li FALSE = Not inverted(active high)
-                                     ///< @li TRUE = Inverted (active low)
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_BLON_ACTIVE_LOW}
-  IN  UINT8     LvdsVoltOverwriteEn:1;  ///< This item configures polarity of DP-to-LVDS output voltage overwrite
-                                        ///< @li FALSE = DP-to-LVDS output voltage overwrite disable, use VBIOS default setting.
-                                        ///< @li TRUE = Use ucLVDSVolAdjust value to program register LVDS_CTRL_4
-                                        ///< @BldCfgItem{BLDCFG_LVDS_MISC_VOLT_OVERWRITE_ENABLE}
-  IN  UINT8     Reserved:2;          ///< Reserved
-} LVDS_MISC_CONTROL_FIELD;
-
-/// LVDS Misc Control
-typedef union _LVDS_MISC_CONTROL {
-  IN LVDS_MISC_CONTROL_FIELD Field;  ///< LVDS_MISC_CONTROL_FIELD
-  IN UINT8   Value;                  ///< LVDS Misc Control Value
-} LVDS_MISC_CONTROL;
-
-/// Display Misc Control Field
-typedef struct {
-  IN  UINT8     Reserved1:3;                  ///< Reserved
-  IN  UINT8     VbiosFastBootEn:1;            ///< This item configures VBIOS skip display device detection in every set mode if LCD panel is connect and LID is open.
-                                              ///< @li FALSE = VBIOS fast boot is disable.
-                                              ///< @li TRUE = VBIOS fast boot is enable.
-                                              ///< @BldCfgItem{BLDCFG_DISPLAY_MISC_VBIOS_FAST_BOOT_ENABLE}
-  IN  UINT8     Reserved2:4;                  ///< Reserved
-} DISPLAY_MISC_CONTROL_FIELD;
-
-/// LVDS Misc Control
-typedef union _DISPLAY_MISC_CONTROL {
-  IN DISPLAY_MISC_CONTROL_FIELD Field;  ///< DISPLAY_MISC_CONTROL_FIELD
-  IN UINT8   Value;                     ///< Display Misc Control Value
-} DISPLAY_MISC_CONTROL;
-
-/// HD Audio Codec table list
-typedef struct _CODEC_VERB_TABLE_LIST {
-  IN  UINT32           CodecId;             ///<  CodecID - Codec ID
-  IN  UINT32           CodecTablePtr;       ///<  CodecTablePtr - Codec table pointer
-} CODEC_VERB_TABLE_LIST;
-
-/// POST Configuration settings for GNB.
-typedef struct {
-  IN UINT8       IgpuEnableDisablePolicy;   ///< This item defines the iGPU Enable/Disable policy
-                                            ///< @li 0 = Auto - use existing default -
-                                            ///< @li 1 = Disable iGPU if any PCIe/PCI graphics card present
-                                            ///< @BldCfgItem{BLDCFG_IGPU_ENABLE_DISABLE_POLICY}
-} GNB_POST_CONFIGURATION;
-
-/// iGPU Enable/Disable Policy values
-#define IGPU_DISABLE_AUTO        0        ///< Auto setting - disable iGPU if ANY PCI graphics or non-AMD PCIe graphics
-#define IGPU_DISABLE_ANY_PCIE    1        ///< Disable iGPU if any PCI or PCIE graphics card is present
-
-/// ENV Configuration settings for GNB.
-typedef struct {
-  IN  UINT8     Gnb3dStereoPinIndex;      ///< 3D Stereo Pin ID.
-                                          ///< @li 0 = Stereo 3D is disabled (default).
-                                          ///< @li 1 = Use processor pin HPD1.
-                                          ///< @li 2 = Use processor pin HPD2
-                                          ///< @li 3 = Use processor pin HPD3
-                                          ///< @li 4 = Use processor pin HPD4
-                                          ///< @li 5 = Use processor pin HPD5
-                                          ///< @li 6 = Use processor pin HPD6
-                                          ///< @BldCfgItem{BLDCFG_STEREO_3D_PINOUT}
-  IN  BOOLEAN    IommuSupport;            ///< IOMMU support.
-                                          ///< @li FALSE = Disabled. Disable and hide IOMMU device.
-                                          ///< @li TRUE  = Initialize IOMMU subsystem. Generate ACPI IVRS table.
-                                          ///< BldCfgItem{BLDCFG_IOMMU_SUPPORT}
-  IN  UINT16     LvdsSpreadSpectrum;      ///< Spread spectrum value in 0.01 %
-                                          ///< BldCfgItem{BLDCFG_GFX_LVDS_SPREAD_SPECTRUM}
-  IN  UINT16     LvdsSpreadSpectrumRate;  ///< Spread spectrum frequency used by SS hardware logic in unit of 10Hz, 0 - default frequency 40kHz
-                                          ///< BldCfgItem{BLDCFG_GFX_LVDS_SPREAD_SPECTRUM_RATE}
-  IN  UINT8      LvdsPowerOnSeqDigonToDe;    ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_DIGON_TO_DE}
-  IN  UINT8      LvdsPowerOnSeqDeToVaryBl;   ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_DE_TO_VARY_BL}
-  IN  UINT8      LvdsPowerOnSeqDeToDigon;    ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_DE_TO_DIGON}
-  IN  UINT8      LvdsPowerOnSeqVaryBlToDe;   ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWERS_ON_SEQ_VARY_BL_TO_DE}
-  IN  UINT8      LvdsPowerOnSeqOnToOffDelay; ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_ON_TO_OFF_DELAY}
-  IN  UINT8      LvdsPowerOnSeqVaryBlToBlon; ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_VARY_BL_TO_BLON}
-  IN  UINT8      LvdsPowerOnSeqBlonToVaryBl; ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_BLON_TO_VARY_BL}
-  IN  UINT16     LvdsMaxPixelClockFreq;      ///< This item configures the maximum pixel clock frequency supported.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_MAX_PIXEL_CLOCK_FREQ}
-  IN  UINT32     LcdBitDepthControlValue;    ///< This item configures the LCD bit depth control settings.
-                                             ///< @BldCfgItem{BLDCFG_LCD_BIT_DEPTH_CONTROL_VALUE}
-  IN  UINT8      Lvds24bbpPanelMode;         ///< This item configures the LVDS 24 BBP mode.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_24BBP_PANEL_MODE}
-  IN  LVDS_MISC_CONTROL      LvdsMiscControl;///< This item configures LVDS swap/Hsync/Vsync/BLON
-  IN  UINT16     PcieRefClkSpreadSpectrum;   ///< Spread spectrum value in 0.01 %
-                                             ///< @BldCfgItem{BLDCFG_PCIE_REFCLK_SPREAD_SPECTRUM}
-  IN  BOOLEAN    GnbRemoteDisplaySupport;    ///< This item enables Wireless Display Support
-                                             ///< @li TRUE  = Enable Wireless Display Support
-                                             ///< @li FALSE = Disable Wireless Display Support
-                                             ///< @BldCfgItem{BLDCFG_REMOTE_DISPLAY_SUPPORT}
-  IN UINT8       LvdsMiscVoltAdjustment;     ///< Register LVDS_CTRL_4 to adjust LVDS output voltage
-                                             ///< @BldCfgItem{BLDCFG_LVDS_MISC_VOL_ADJUSTMENT}
-  IN DISPLAY_MISC_CONTROL DisplayMiscControl;///< This item configures display misc control
-  IN DP_FIXED_VOLT_SWING_TYPE DpFixedVoltSwingType;///< To indicate fixed voltage swing value
-                                                   ///< @BldCfgItem{BLDCFG_DP_FIXED_VOLT_SWING}
-  IN  UINT32    GpuFrequencyLimit;           ///< GNB GPU Max Frequency(NULL if platform configured)
-                                             ///< @BldCfgItem{BLDCFG_GPU_FREQUENCY_LIMIT}
-  IN UINT8  EDPv1_4VSMode;                   ///< @BldCfgItem{BLDCFG_EDP_V1_4_VS_MODE}
-  IN UINT8  ExtHDMIReDrvSlvAddr;             ///< @BldCfgItem{BLDCFG_EXT_HDMI_RE_DRIVE_SLAVE_ADDR}
-  IN UINT8  ExtHDMIReDrvRegNum;              ///< @BldCfgItem{BLDCFG_EXT_HDMI_RE_DRIVE_REG_NUM}
-  IN UINT64 ExtHDMIRegSetting;               ///< @BldCfgItem{BLDCFG_EXT_HDMI_RE_DRIVE_REG_INFO}
-} GNB_ENV_CONFIGURATION;
-
-/// Configuration settings for GNB.
-typedef struct {
-  IN  UINT8     iGpuVgaMode;                 ///< VGA resources decoding configuration for iGPU
-                                             ///< @li 0 = iGPU decode all VGA resources (must be primary VGA adapter)
-                                             ///< @li 1 = iGPU will not decode any VGA resources (must be secondary graphics adapter)
-  IN  UINT8     PcieAcsCapability;           ///< Pcie ACS Capability support
-                                             ///< @li 0 = Disabled
-                                             ///< @li 1 = Enabled
-  IN  UINT64    GnbIoapicAddress;            ///< GNB IOAPIC Base Address(NULL if platform configured)
-                                             ///< @BldCfgItem{BLDCFG_GNB_IOAPIC_ADDRESS}
-  IN  UINT8     MaxNumAudioEndpoints;        ///< Max number of audio endpoints
-                                             ///< @BldCfgItem{BLDCFG_MAX_NUM_AUDIO_ENDPOINTS}
-} GNB_MID_CONFIGURATION;
-
-/// GNB configuration info
-typedef struct {
-  IN       PCIe_COMPLEX_DESCRIPTOR  *PcieComplexList;  /**< Pointer to array of structures describe PCIe topology on each processor package or NULL.
-                                                        * Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST
-                                                        * Example of topology definition for single socket system:
-                                                        * @code
-                                                        *  PCIe_PORT_DESCRIPTOR PortList [] = {
-                                                        *    // Initialize Port descriptor (PCIe port, Lanes 8:15, PCI Device Number 2, ...)
-                                                        *    {
-                                                        *      0,   //Descriptor flags
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 8, 15),
-                                                        *      PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 2, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
-                                                        *    },
-                                                        *    // Initialize Port descriptor (PCIe port, Lanes 16:19, PCI Device Number 3, ...)
-                                                        *    {
-                                                        *      0,   //Descriptor flags
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 16, 19),
-                                                        *      PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 3, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
-                                                        *    },
-                                                        *    // Initialize Port descriptor (PCIe port, Lanes 4, PCI Device Number 4, ...)
-                                                        *    {
-                                                        *      DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate last element of array
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 4, 4),
-                                                        *      PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 4, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
-                                                        *    }
-                                                        *  };
-                                                        *  PCIe_PORT_DESCRIPTOR DdiList [] = {
-                                                        *    // Initialize Ddi descriptor (DDI interface Lanes 24:27, Display Port Connector, ...)
-                                                        *    {
-                                                        *      0,   //Descriptor flags
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1, 0)
-                                                        *    },
-                                                        *    // Initialize Ddi descriptor (DDI interface Lanes 28:31, HDMI, ...)
-                                                        *    {
-                                                        *      DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate last element of array
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 28, 31),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2, 0)
-                                                        *    }
-                                                        *  };
-                                                        * PCIe_COMPLEX_DESCRIPTOR PlatformTopology = {
-                                                        *   DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate complexes list
-                                                        *   0,  //Socket ID
-                                                        *   &PortList[0],
-                                                        *   &DdiList[0],
-                                                        * }
-                                                        * @endcode
-                                                        */
-  IN       UINT8                    PsppPolicy;         /**< PSPP (PCIe Speed Power Policy)
-                                                         *  @li @b 0 - Disabled
-                                                         *  @li @b 1 - Performance
-                                                         *  @li @b 2 - Balance-High
-                                                         *  @li @b 3 - Balance-Low
-                                                         *  @li @b 4 - Power Saving
-                                                         */
-
-} GNB_CONFIGURATION;
-
-/// Late Configuration settings for GNB.
-typedef struct {
-  IN        BOOLEAN                 Reserved;           ///< Reserved -- Docked TDP headroom
-  IN        UINT8                   GnbIoapicId;        ///< GNB IOAPIC ID, platform BIOS needs to pass correct id number, default is 0xFF.
-                                                        ///< If BLDCFG_GNB_IOAPIC_ADDRESS == NULL or BLDCFG_IOMMU_SUPPORT == NULL or GnbIoapicId == default(0xFF), AGESA will skip it anyway.
-                                                        ///< @li 0~n = IOAPIC ID number for IVRS which should be matched with MADT
-  IN        UINT8                   FchIoapicId;        ///< Fch IOAPIC ID, platform BIOS needs to pass correct id number, default is 0xFF.
-                                                        ///< If BLDCFG_IOMMU_SUPPORT == NULL or or FchIoapicId == default(0xFF), AGESA will skip it anyway.
-                                                        ///< @li 0~n = IOAPIC ID number for IVRS which should be matched with MADT
-
-} GNB_LATE_CONFIGURATION;
-
-//
-//  MEMORY-SPECIFIC DATA STRUCTURES
-//
-//
-//
-//
-// AGESA MAXIMIUM VALUES
-//
-//   These Max values are used to define array sizes and associated loop
-//   counts in the code.  They reflect the maximum values that AGESA
-//   currently supports and does not necessarily reflect the hardware
-//   capabilities of configuration.
-//
-
-#define MAX_SOCKETS_SUPPORTED   1   ///< Max number of sockets in system
-#define MAX_CHANNELS_PER_SOCKET 4   ///< Max Channels per sockets
-#define MAX_DIMMS_PER_CHANNEL   4   ///< Max DIMMs on a memory channel (independent of platform)
-#define NUMBER_OF_DELAY_TABLES  9   ///< Number of tables defined in CH_DEF_STRUCT.
-                                    ///< Eg: UINT16  *RcvEnDlys;
-                                    ///<     UINT8   *WrDqsDlys;
-                                    ///<     UINT8   *RdDqsDlys;
-                                    ///<     UINT8   *WrDatDlys;
-                                    ///<     UINT8   *RdDqsMinDlys;
-                                    ///<     UINT8   *RdDqsMaxDlys;
-                                    ///<     UINT8   *WrDatMinDlys;
-                                    ///<     UINT8   *WrDatMaxDlys;
-#define NUMBER_OF_FAILURE_MASK_TABLES 1 ///< Number of failure mask tables
-
-#define MAX_PLATFORM_TYPES     16   ///< Platform types per system
-
-#define MCT_TRNG_KEEPOUT_START  0x00004000ul    ///< base [39:8]
-#define MCT_TRNG_KEEPOUT_END    0x00007FFFul    ///< base [39:8]
-#define DATAEYE_VREF_RANGE     31   ///< Number of VREF steps in Data Eye Bitmap
-
-#define UMA_ATTRIBUTE_INTERLEAVE 0x80000000ul   ///< Uma Region is interleaved
-#define UMA_ATTRIBUTE_ON_DCT0    0x40000000ul   ///< UMA resides on memory that belongs to DCT0
-#define UMA_ATTRIBUTE_ON_DCT1    0x20000000ul   ///< UMA resides on memory that belongs to DCT1
-#define UMA_ATTRIBUTE_ON_DCT2    0x10000000ul   ///< UMA resides on memory that belongs to DCT2
-#define UMA_ATTRIBUTE_ON_DCT3    0x08000000ul   ///< UMA resides on memory that belongs to DCT3
-
-typedef UINT8 PSO_TABLE;            ///< Platform Configuration Table
-
-//        AGESA DEFINITIONS
-//
-//        Many of these are derived from the platform and hardware specific definitions
-
-/// EccSymbolSize override value
-#define ECCSYMBOLSIZE_USE_BKDG      0   ///< Use BKDG Recommended Value
-#define ECCSYMBOLSIZE_FORCE_X4      4   ///< Force to x4
-#define ECCSYMBOLSIZE_FORCE_X8      8   ///< Force to x8
-/// CPU Package Type
-#define PT_L1       0                 ///< L1 Package type
-#define PT_M2       1                 ///< AM Package type
-#define PT_S1       2                 ///< S1 Package type
-
-/// Build Configuration values for BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT & BLDCFG_MEMORY_CLOCK_SELECT
-#define DDR400_FREQUENCY  200     ///< DDR 400
-#define DDR533_FREQUENCY  266     ///< DDR 533
-#define DDR667_FREQUENCY  333     ///< DDR 667
-#define DDR800_FREQUENCY  400     ///< DDR 800
-#define DDR1066_FREQUENCY 533     ///< DDR 1066
-#define DDR1333_FREQUENCY 667     ///< DDR 1333
-#define DDR1600_FREQUENCY 800     ///< DDR 1600
-#define DDR1866_FREQUENCY 933     ///< DDR 1866
-#define DDR2100_FREQUENCY 1050    ///< DDR 2100
-#define DDR2133_FREQUENCY 1066    ///< DDR 2133
-#define DDR2400_FREQUENCY 1200    ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
-
-/// Build Configuration values for BLDCFG_TIMING_MODE_SELECT
-#define TIMING_MODE_AUTO     0  ///< Use best rate possible
-#define TIMING_MODE_LIMITED  1  ///< Set user top limit
-#define TIMING_MODE_SPECIFIC 2  ///< Set user specified speed
-
-/// Build Configuration values for BLDCFG_MEMORY_QUADRANK_TYPE
-#define QUADRANK_REGISTERED  0  ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED  1  ///< Quadrank unbuffered DIMM
-
-/// Build Configuration values for BLDCFG_POWER_DOWN_MODE
-#define POWER_DOWN_BY_CHANNEL      0  ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT  1  ///< Chip select power down mode
-#define POWER_DOWN_MODE_AUTO       2  ///< AGESA to select power down mode
-
-/// Build Configuration limit for BLDCFG_GNB_GPU_MAX_FREQUENCY
-#define UNSUPPORTED_GPU_FREQUENCY 901 ///< Highest limit of GPU frequency
-
-/// Structures use to pass system Logical CPU-ID
-typedef struct {
-  IN OUT   UINT16 Family;             ///< Indicates logical ID Family
-  IN OUT   UINT16 Revision;           ///< Indicates logical ID Family
-} CPU_LOGICAL_ID;
-
-/// Structures use to report AMP status
-typedef struct {
-  OUT   BOOLEAN AmpVoltageValid;                 ///< Indicates if Amp voltage is valid
-  OUT   BOOLEAN AmpSupportDetectedButNotEnabled; ///< Indicates if Amp support is detected but not enabled
-  OUT   BOOLEAN AmpSelectedButNotEnabled;        ///< Indicates if Amp is selected but not enabled
-} AMP_STATUS;
-
-/// Normalized Critical Composite Data Eye
-///  Bit 15 represents trained eye Center
-///  Bit 0  represents eye center -15 delay steps
-///  Bit 31 represents eye center +16 delay steps
-///  Offset 0  represents +15 Vref Steps
-///  Offset 31  represents -15 Vref Steps
-typedef UINT32 COMPOSITE_DATAEYE[DATAEYE_VREF_RANGE];
-
-/// Build Configuration values for BLDCFG_AMD_PLATFORM_TYPE
-typedef enum {
-  AMD_PLATFORM_SERVER = 0x8000,     ///< Server
-  AMD_PLATFORM_DESKTOP = 0x10000,   ///< Desktop
-  AMD_PLATFORM_MOBILE = 0x20000,    ///< Mobile
-} AMD_PLATFORM_TYPE;
-
-/// Dram technology type
-typedef enum {
-  DDR2_TECHNOLOGY,        ///< DDR2 technology
-  DDR3_TECHNOLOGY,        ///< DDR3 technology
-  GDDR5_TECHNOLOGY,       ///< GDDR5 technology
-  UNSUPPORTED_TECHNOLOGY, ///< Unsupported technology
-} TECHNOLOGY_TYPE;
-
-/// Low voltage support
-typedef enum {
-  VOLT_INITIAL,              ///< Initial value for VDDIO
-  VOLT1_5,                   ///< 1.5 Volt
-  VOLT1_35,                  ///< 1.35 Volt
-  VOLT1_25,                  ///< 1.25 Volt
-  VOLT_UNSUPPORTED = 0xFF    ///< No common voltage found
-} DIMM_VOLTAGE;
-
-/// AMP voltage support
-typedef enum {
-  AMP_VOLT_RSVD,             ///< Reserved
-  AMP_VOLT1_5,               ///< 1.5 Volt
-  AMP_VOLT1_55,              ///< 1.55 Volt
-  AMP_VOLT1_6,               ///< 1.6 Volt
-  AMP_VOLT1_65,              ///< 1.65 Volt
-  AMP_VOLT1_7,               ///< 1.7 Volt
-  AMP_VOLT1_75,              ///< 1.75 Volt
-  AMP_VOLT1_8,               ///< 1.8 Volt
-  AMP_VOLT1_85,              ///< 1.85 Volt
-  AMP_VOLT1_9,               ///< 1.9 Volt
-  AMP_VOLT1_45 = 0x10,       ///< 1.45 Volt
-  AMP_VOLT1_4  = 0x20,       ///< 1.4 Volt
-  AMP_VOLT1_35 = 0x30,       ///< 1.35 Volt
-  AMP_VOLT1_3  = 0x40,       ///< 1.3 Volt
-  AMP_VOLT1_25 = 0x50,       ///< 1.25 Volt
-  AMP_VOLT1_2  = 0x60        ///< 1.2 Volt
-} AMP_DIMM_VOLTAGE;
-
-/// Build Configuration values for BLDCFG_RESOLUTION
-typedef enum {
-  DISPLAY_1920x1080_And_Below = 0,        ///< 1920x1080 and below
-  DISPLAY_2560x1600 = 1,                  ///< 2560x1600
-  DISPLAY_3840x2160 = 2                   ///< 3840x2160
-} DISPLAY_RESOLUTION;
-
-/// Build Configuration values for BLDCFG_ACP_SIZE
-typedef enum {
-  NO_ACP_SIZE = 0x00,        ///< NO ACP
-  ACP_SIZE_2MB = 0x20,       ///< UMA 4MB aligned
-  ACP_SIZE_4MB = 0x40,       ///< UMA 128MB aligned
-} ACP_SIZE;
-
-/// UMA Version
-typedef enum {
-  UMA_LEGACY = 0,              ///< UMA Legacy Version
-  UMA_NON_LEGACY = 1           ///< UMA Non Legacy Version
-} UMA_VERSION;
-
-/// UMA Mode
-typedef enum {
-  UMA_NONE = 0,              ///< UMA None
-  UMA_SPECIFIED = 1,         ///< UMA Specified
-  UMA_AUTO = 2               ///< UMA Auto
-} UMA_MODE;
-
-/// Force Training Mode
-typedef enum {
-  FORCE_TRAIN_1D = 0,              ///< 1D Training only
-  FORCE_TRAIN_2D = 1,              ///< 2D Training only
-  FORCE_TRAIN_AUTO = 2             ///< Auto - 1D or 2D depending on configuration
-} FORCE_TRAIN_MODE;
-
-/// PMU Training Mode
-typedef enum {
-  PMU_TRAIN_1D = 0,                ///< PMU 1D Training only
-  PMU_TRAIN_1D_2D_READ = 1,        ///< PMU 1D and 2D Training read only
-  PMU_TRAIN_1D_2D = 2,             ///< PMU 1D and 2D Training
-  PMU_TRAIN_AUTO = 3               ///< Auto - PMU Training depend on configuration
-} PMU_TRAIN_MODE;
-
-///  The possible DRAM prefetch mode settings.
-typedef enum  {
-  DRAM_PREFETCHER_AUTO,                         ///< Use the recommended setting for the processor. In most cases, the recommended setting is enabled.
-  DISABLE_DRAM_PREFETCH_FOR_IO,                 ///< Disable DRAM prefetching for I/O requests only.
-  DISABLE_DRAM_PREFETCH_FOR_CPU,                ///< Disable DRAM prefetching for requests from processor cores only.
-  DISABLE_DRAM_PREFETCHER,                      ///< Disable DRAM prefetching.
-  MAX_DRAM_FREFETCH_MODE                        ///< Not a DRAM prefetch mode, use for limit checking.
-} DRAM_PREFETCH_MODE;
-
-/// Build Configuration values for BLDCFG_UMA_ALIGNMENT
-typedef enum {
-  NO_UMA_ALIGNED = 0x00FFFFFF,           ///< NO UMA aligned
-  UMA_4MB_ALIGNED = 0x00FFFFC0,          ///< UMA 4MB aligned
-  UMA_128MB_ALIGNED = 0x00FFF800,        ///< UMA 128MB aligned
-  UMA_256MB_ALIGNED = 0x00FFF000,        ///< UMA 256MB aligned
-  UMA_512MB_ALIGNED = 0x00FFE000,        ///< UMA 512MB aligned
-} UMA_ALIGNMENT;
-
-///
-///   Global MCT Configuration Status Word (GStatus)
-///
-typedef enum {
-  GsbMTRRshort,              ///< Ran out of MTRRs while mapping memory
-  GsbAllECCDimms,            ///< All banks of all Nodes are ECC capable
-  GsbDramECCDis,             ///< Dram ECC requested but not enabled.
-  GsbSoftHole,               ///< A Node Base gap was created
-  GsbHWHole,                 ///< A HW dram remap was created
-  GsbNodeIntlv,              ///< Node Memory interleaving was enabled
-  GsbSpIntRemapHole,         ///< Special condition for Node Interleave and HW remapping
-  GsbEnDIMMSpareNW,          ///< Indicates that DIMM Spare can be used without a warm reset
-
-  GsbEOL                     ///< End of list
-} GLOBAL_STATUS_FIELD;
-
-///
-///   Local Error Status (DIE_STRUCT.ErrStatus[31:0])
-///
-typedef enum {
-  EsbNoDimms,                  ///< No DIMMs
-  EsbSpdChkSum,                ///< SPD Checksum fail
-  EsbDimmMismatchM,            ///< dimm module type(buffer) mismatch
-  EsbDimmMismatchT,            ///< dimm CL/T mismatch
-  EsbDimmMismatchO,            ///< dimm organization mismatch (128-bit)
-  EsbNoTrcTrfc,                ///< SPD missing Trc or Trfc info
-  EsbNoCycTime,                ///< SPD missing byte 23 or 25
-  EsbBkIntDis,                 ///< Bank interleave requested but not enabled
-  EsbDramECCDis,               ///< Dram ECC requested but not enabled
-  EsbSpareDis,                 ///< Online spare requested but not enabled
-  EsbMinimumMode,              ///< Running in Minimum Mode
-  EsbNoRcvrEn,                 ///< No DQS Receiver Enable pass window found
-  EsbSmallRcvr,                ///< DQS Rcvr En pass window too small (far right of dynamic range)
-  EsbNoDqsPos,                 ///< No DQS-DQ passing positions
-  EsbSmallDqs,                 ///< DQS-DQ passing window too small
-  EsbDCBKScrubDis,             ///< DCache scrub requested but not enabled
-
-  EsbEMPNotSupported,          ///< Processor is not capable for EMP.
-  EsbEMPConflict,               ///< EMP requested but cannot be enabled since
-                               ///< channel interleaving, bank interleaving, or bank swizzle is enabled.
-  EsbEMPDis,                   ///< EMP requested but cannot be enabled since
-                               ///< memory size of each DCT is not a power of two.
-
-  EsbEOL                       ///< End of list
-} ERROR_STATUS_FIELD;
-
-///
-///  Local Configuration Status (DIE_STRUCT.Status[31:0])
-///
-typedef enum {
-  SbRegistered,                ///< All DIMMs are Registered
-  SbEccDimms,                  ///< All banks ECC capable
-  SbParDimms,                  ///< All banks Addr/CMD Parity capable
-  SbDiagClks,                  ///< Jedec ALL slots clock enable diag mode
-  Sb128bitmode,                ///< DCT in 128-bit mode operation
-  Sb64MuxedMode,               ///< DCT in 64-bit mux'ed mode.
-  Sb2TMode,                    ///< 2T CMD timing mode is enabled.
-  SbSWNodeHole,                ///< Remapping of Node Base on this Node to create a gap.
-  SbHWHole,                    ///< Memory Hole created on this Node using HW remapping.
-  SbOver400Mhz,                ///< DCT freq greater than or equal to 400MHz flag
-  SbDQSPosPass2,               ///< Used for TrainDQSPos DIMM0/1, when freq greater than or equal to 400MHz
-  SbDQSRcvLimit,               ///< Used for DQSRcvEnTrain to know we have reached the upper bound.
-  SbExtConfig,                 ///< Indicate the default setting for extended PCI configuration support
-  SbLrdimms,                   ///< All DIMMs are LRDIMMs
-
-  SbEOL                        ///< End of list
-} LOCAL_STATUS_FIELD;
-
-
-///< CPU MSR Register definitions ------------------------------------------
-#define SYS_CFG     0xC0010010ul
-#define TOP_MEM     0xC001001Aul
-#define TOP_MEM2    0xC001001Dul
-#define HWCR        0xC0010015ul
-#define NB_CFG      0xC001001Ful
-
-#define FS_BASE     0xC0000100ul
-#define IORR0_BASE  0xC0010016ul
-#define IORR0_MASK  0xC0010017ul
-#define BU_CFG      0xC0011023ul
-#define BU_CFG2     0xC001102Aul
-#define COFVID_STAT 0xC0010071ul
-#define TSC         0x10
-
-//-----------------------------------------------------------------------------
-///
-/// SPD Data for each DIMM.
-///
-typedef struct _SPD_DEF_STRUCT_DX {
-  IN BOOLEAN SpdValid; ///< Indicates that the SPD is valid
-  IN BOOLEAN DimmPresent; ///< Indicates that the DIMM is present and Data is valid
-  IN UINT32 Adderess;  ///< SMBus Address
-  IN UINT8 Data[512]; ///< Buffer for 256 Bytes of SPD data from DIMM
-} SPD_DEF_STRUCT_DX;
-
-//-----------------------------------------------------------------------------
-///
-/// SPD Data for each DIMM.
-///
-typedef struct _SPD_DEF_STRUCT {
-  IN BOOLEAN DimmPresent;  ///< Indicates that the DIMM is present and Data is valid
-  IN UINT8 Data[256];      ///< Buffer for 256 Bytes of SPD data from DIMM
-} SPD_DEF_STRUCT;
-
-//-----------------------------------------------------------------------------
-///
-/// VDDP_VDDR Voltage Info for Low Power DIMM
-///
-typedef struct _VDDP_VDDR_VOLTAGE {
-  IN BOOLEAN IsValid;               ///< Indicates if daata is valid
-  IN UINT8 Voltage;    ///< VDDP VDDR Voltage Value
-} VDDP_VDDR_VOLTAGE;
-
-///
-/// Channel Definition Structure.
-/// This data structure defines entries that are specific to the channel initialization
-///
-typedef struct _CH_DEF_STRUCT {
-  OUT UINT8   ChannelID;         ///< Physical channel ID of a socket(0 = CH A, 1 = CH B, 2 = CH C, 3 = CH D)
-  OUT TECHNOLOGY_TYPE TechType;  ///< Technology type of this channel
-  OUT UINT8   ChDimmPresent;     ///< For each bit n 0..7, 1 = DIMM n is present.
-                                 ///<  DIMM#  Select Signal
-                                 ///<  0      MA0_CS_L[0, 1]
-                                 ///<  1      MB0_CS_L[0, 1]
-                                 ///<  2      MA1_CS_L[0, 1]
-                                 ///<  3      MB1_CS_L[0, 1]
-                                 ///<  4      MA2_CS_L[0, 1]
-                                 ///<  5      MB2_CS_L[0, 1]
-                                 ///<  6      MA3_CS_L[0, 1]
-                                 ///<  7      MB3_CS_L[0, 1]
-
-  OUT struct _DCT_STRUCT *DCTPtr; ///< Pointer to the DCT data of this channel.
-  OUT struct _DIE_STRUCT *MCTPtr; ///< Pointer to the node data of this channel.
-  OUT SPD_DEF_STRUCT *SpdPtr;    ///< Pointer to the SPD data for this channel. (Setup by NB Constructor)
-  OUT SPD_DEF_STRUCT *DimmSpdPtr[MAX_DIMMS_PER_CHANNEL]; ///< Array of pointers to
-                                 ///<   SPD Data for each Dimm. (Setup by Tech Block Constructor)
-  OUT UINT8   ChDimmValid;       ///< For each bit n 0..3, 1 = DIMM n is valid and is/will be configured where 4..7 are reserved.
-                                 ///<
-  OUT UINT8   RegDimmPresent;   ///< For each bit n 0..3, 1 = DIMM n is a registered DIMM where 4..7 are reserved.
-  OUT UINT8   LrDimmPresent;     ///< For each bit n 0..3, 1 = DIMM n is Load Reduced DIMM where 4..7 are reserved.
-  OUT UINT8   SODimmPresent;     ///< For each bit n 0..3, 1 = DIMM n is a SO-DIMM, where 4..7 are reserved.
-  OUT UINT8   Loads;             ///< Number of devices loading bus
-  OUT UINT8   Dimms;             ///< Number of DIMMs loading Channel
-  OUT UINT8   Ranks;             ///< Number of ranks loading Channel DATA
-  OUT BOOLEAN SlowMode;          ///< 1T or 2T CMD mode (slow access mode)
-  OUT BOOLEAN SlowModePs1;       ///< 1T or 2T CMD mode (slow access mode) for Mem Pstate 1
-                                 ///< FALSE = 1T
-                                 ///< TRUE = 2T
-  ///< The following pointers will be pointed to dynamically allocated buffers.
-  ///< Each buffer is two dimensional (RowCount x ColumnCount) and is lay-outed as in below.
-  ///< Example: If DIMM and Byte based training, then
-  ///< XX is a value in Hex
-  ///<                        BYTE 0, BYTE 1, BYTE 2, BYTE 3, BYTE 4, BYTE 5, BYTE 6, BYTE 7, ECC BYTE
-  ///<  Row1 -  Logical DIMM0    XX      XX      XX      XX      XX      XX      XX      XX      XX
-  ///<  Row2 -  Logical DIMM1    XX      XX      XX      XX      XX      XX      XX      XX      XX
-  OUT UINT16  *RcvEnDlys;       ///< DQS Receiver Enable Delays
-  OUT UINT8   *WrDqsDlys;       ///< Write DQS delays (only valid for DDR3)
-  OUT UINT8   *RdDqsDlys;       ///< Read Dqs delays
-  OUT UINT8   *WrDatDlys;       ///< Write Data delays
-  OUT UINT8   *RdDqs2dDlys;     ///< 2d Read DQS data
-  OUT UINT8   *RdDqsMinDlys;    ///< Minimum Window for Read DQS
-  OUT UINT8   *RdDqsMaxDlys;    ///< Maximum Window for Read DQS
-  OUT UINT8   *WrDatMinDlys;    ///< Minimum Window for Write data
-  OUT UINT8   *WrDatMaxDlys;    ///< Maximum Window for Write data
-  OUT UINT16  *RcvEnDlysMemPs1;       ///< DQS Receiver Enable Delays for Mem Pstate 1
-  OUT UINT8   *WrDqsDlysMemPs1;       ///< Write DQS delays (only valid for DDR3) for Mem Pstate 1
-  OUT UINT8   *RdDqsDlysMemPs1;       ///< Read Dqs delays for Memory Pstate 1
-  OUT UINT8   *WrDatDlysMemPs1;       ///< Write Data delays for Memory Pstate 1
-  OUT UINT8   *RdDqs2dDlysMemPs1;     ///< 2d Read DQS data for Memory Pstate 1
-  OUT UINT8   *RdDqsMinDlysMemPs1;    ///< Minimum Window for Read DQS for Memory Pstate 1
-  OUT UINT8   *RdDqsMaxDlysMemPs1;    ///< Maximum Window for Read DQS for Memory Pstate 1
-  OUT UINT8   *WrDatMinDlysMemPs1;    ///< Minimum Window for Write data for Memory Pstate 1
-  OUT UINT8   *WrDatMaxDlysMemPs1;    ///< Maximum Window for Write data for Memory Pstate 1
-  OUT UINT8   RowCount;         ///< Number of rows of the allocated buffer.
-  OUT UINT8   ColumnCount;      ///< Number of columns of the allocated buffer.
-  OUT UINT8   *FailingBitMask;    ///< Table of masks to Track Failing bits
-  OUT UINT8   *FailingBitMaskMemPs1;    ///< Table of masks to Track Failing bits for Memory Pstate 1
-  OUT VOID    *RdDataEyes;        ///< Pointer to Read Data Eye Bitmaps
-  OUT VOID    *WrDataEyes;        ///< Pointer to Write Data Eye Bitmaps
-  OUT UINT32  DctOdcCtl;          ///< Output Driver Strength (see BKDG FN2:Offset 9Ch, index 00h)
-  OUT UINT32  DctAddrTmg;         ///< Address Bus Timing (see BKDG FN2:Offset 9Ch, index 04h)
-  OUT UINT32  DctAddrTmgPs1;      ///< Address Bus Timing (see BKDG FN2:Offset 9Ch, index 04h) for Mem Pstate 1
-  OUT UINT32  PhyRODTCSLow;       ///< Phy Read ODT Pattern Chip Select low (see BKDG FN2:Offset 9Ch, index 180h)
-  OUT UINT32  PhyRODTCSHigh;      ///< Phy Read ODT Pattern Chip Select high (see BKDG FN2:Offset 9Ch, index 181h)
-  OUT UINT32  PhyWODTCSLow;       ///< Phy Write ODT Pattern Chip Select low (see BKDG FN2:Offset 9Ch, index 182h)
-  OUT UINT32  PhyWODTCSHigh;      ///< Phy Write ODT Pattern Chip Select high (see BKDG FN2:Offset 9Ch, index 183)
-  OUT UINT8   PhyWLODT[4];        ///< Write Levelization ODT Pattern for Dimm 0-3 or CS 0-7(see BKDG FN2:Offset 9Ch, index 0x8[11:8])
-  OUT UINT16  DctEccDqsLike;      ///< DCT DQS ECC UINT8 like...
-  OUT UINT8   DctEccDqsScale;     ///< DCT DQS ECC UINT8 scale
-  OUT UINT16  PtrPatternBufA;     ///< Ptr on stack to aligned DQS testing pattern
-  OUT UINT16  PtrPatternBufB;     ///< Ptr on stack to aligned DQS testing pattern
-  OUT UINT8   ByteLane;           ///< Current UINT8 Lane (0..7)
-  OUT UINT8   Direction;          ///< Current DQS-DQ training write direction (0=read, 1=write)
-  OUT UINT8   Pattern;            ///< Current pattern
-  OUT UINT8   DqsDelay;           ///< Current DQS delay value
-  OUT UINT16  HostBiosSrvc1;      ///< UINT16 sized general purpose field for use by host BIOS.  Scratch space.
-  OUT UINT32  HostBiosSrvc2;      ///< UINT32 sized general purpose field for use by host BIOS.  Scratch space.
-  OUT UINT16  DctMaxRdLat[4];     ///< Max Read Latency (ns) for the DCT
-                                  ///< DctMaxRdLat [i] is for NBPstate i
-  OUT UINT8   DIMMValidCh;        ///< DIMM# in CH
-  OUT UINT8   MaxCh;              ///< Max number of CH in system
-  OUT UINT8   Dct;                ///< Dct pointer
-  OUT UINT8   WrDatGrossH;        ///< Write Data Gross delay high value
-  OUT UINT8   DqsRcvEnGrossL;     ///< DQS Receive Enable Gross Delay low
-
-  OUT UINT8   TrwtWB;             ///<  Non-SPD timing value for TrwtWB
-  OUT UINT8   CurrRcvrDctADelay;  ///< for keep current RcvrEnDly
-  OUT UINT16  T1000;              ///< get the T1000 figure (cycle time (ns) * 1K)
-  OUT UINT8   DqsRcvEnPass;       ///< for TrainRcvrEn UINT8 lane pass flag
-  OUT UINT8   DqsRcvEnSaved;      ///< for TrainRcvrEn UINT8 lane saved flag
-  OUT UINT8   SeedPass1Remainder; ///< for Phy assisted DQS receiver enable training
-
-  OUT UINT8   ClToNbFlag;         ///< is used to restore ClLinesToNbDis bit after memory
-  OUT UINT32  NodeSysBase;        ///< for channel interleave usage
-  OUT UINT8   RefRawCard[MAX_DIMMS_PER_CHANNEL];   ///< Array of rawcards detected
-  OUT UINT8   CtrlWrd02[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 2 values per DIMM
-  OUT UINT8   CtrlWrd03[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 3 values per DIMM
-  OUT UINT8   CtrlWrd04[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 4 values per DIMM
-  OUT UINT8   CtrlWrd05[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 5 values per DIMM
-  OUT UINT8   CtrlWrd08[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 8 values per DIMM
-
-  OUT UINT16  CsPresentDCT;       ///< For each bit n 0..7, 1 = Chip-select n is present
-  OUT UINT8   DimmMirrorPresent;  ///< For each bit n 0..3, 1 = DIMM n is OnDimmMirror capable where 4..7 are reserved.
-  OUT UINT8   DimmSpdCse;         ///< For each bit n 0..3, 1 = DIMM n SPD checksum error where 4..7 are reserved.
-  OUT UINT8   DimmExclude;        ///< For each bit n 0..3, 1 = DIMM n gets excluded where 4..7 are reserved.
-  OUT UINT8   DimmYr06;           ///< Bitmap indicating which Dimms have a manufacturer's year code <= 2006
-  OUT UINT8   DimmWk2406;         ///< Bitmap indicating which Dimms have a manufacturer's week code <= 24 of 2006 (June)
-  OUT UINT8   DimmPlPresent;      ///< Bitmap indicating that Planar (1) or Stacked (0) Dimms are present.
-  OUT UINT8   DimmQrPresent;      ///< QuadRank DIMM present?
-  OUT UINT8   DimmDrPresent;      ///< Bitmap indicating that Dual Rank Dimms are present
-  OUT UINT8   DimmSRPresent;      ///< Bitmap indicating that Single Rank Dimms are present
-  OUT UINT8   Dimmx4Present;      ///< For each bit n 0..3, 1 = DIMM n contains x4 data devices. where 4..7 are reserved.
-  OUT UINT8   Dimmx8Present;      ///< For each bit n 0..3, 1 = DIMM n contains x8 data devices. where 4..7 are reserved.
-  OUT UINT8   Dimmx16Present;     ///< For each bit n 0..3, 1 = DIMM n contains x16 data devices. where 4..7 are reserved.
-  OUT UINT8   LrdimmPhysicalRanks[MAX_DIMMS_PER_CHANNEL];///< Number of Physical Ranks for LRDIMMs
-  OUT UINT8   LrDimmLogicalRanks[MAX_DIMMS_PER_CHANNEL];///< Number of LRDIMM Logical ranks in this configuration
-  OUT UINT8   LrDimmRankMult[MAX_DIMMS_PER_CHANNEL];///< Rank Multipication factor per dimm.
-  OUT UINT8   DimmNibbleAccess;   ///< For each bit n 0..3, 1 = DIMM n will use nibble signaling. Where 4..7 are reserved.
-  OUT UINT8   *MemClkDisMap;      ///<  This pointer will be set to point to an array that describes
-                                  ///<  the routing of M[B,A]_CLK pins to the DIMMs' ranks. AGESA will
-                                  ///<  base on this array to disable unused MemClk to save power.
-                                  ///<
-                                  ///<  The array must have 8 entries. Each entry, which associates with
-                                  ///<  one MemClkDis bit, is a bitmap of 8 CS that that MemClk is routed to.
-                                  ///<    Example:
-                                  ///<    BKDG definition of Fn2x88[MemClkDis] bitmap for AM3 package
-                                  ///<    is like below:
-                                  ///<         Bit AM3/S1g3 pin name
-                                  ///<         0   M[B,A]_CLK_H/L[0]
-                                  ///<         1   M[B,A]_CLK_H/L[1]
-                                  ///<         2   M[B,A]_CLK_H/L[2]
-                                  ///<         3   M[B,A]_CLK_H/L[3]
-                                  ///<         4   M[B,A]_CLK_H/L[4]
-                                  ///<         5   M[B,A]_CLK_H/L[5]
-                                  ///<         6   M[B,A]_CLK_H/L[6]
-                                  ///<         7   M[B,A]_CLK_H/L[7]
-                                  ///<    And platform has the following routing:
-                                  ///<         CS0   M[B,A]_CLK_H/L[4]
-                                  ///<         CS1   M[B,A]_CLK_H/L[2]
-                                  ///<         CS2   M[B,A]_CLK_H/L[3]
-                                  ///<         CS3   M[B,A]_CLK_H/L[5]
-                                  ///<    Then MemClkDisMap should be pointed to the following array:
-                                  ///<               CLK_2 CLK_3 CLK_4 CLK_5
-                                  ///<    0x00, 0x00, 0x02, 0x04, 0x01, 0x08, 0x00, 0x00
-                                  ///<  Each entry of the array is the bitmask of 8 chip selects.
-
-  OUT UINT8   *CKETriMap;         ///<  This pointer will be set to point to an array that describes
-                                  ///<  the routing of CKE pins to the DIMMs' ranks.
-                                  ///<  The array must have 2 entries. Each entry, which associates with
-                                  ///<  one CKE pin, is a bitmap of 8 CS that that CKE is routed to.
-                                  ///<  AGESA will base on this array to disable unused CKE pins to save power.
-
-  OUT UINT8   *ODTTriMap;         ///<  This pointer will be set to point to an array that describes
-                                  ///<  the routing of ODT pins to the DIMMs' ranks.
-                                  ///<  The array must have 4 entries. Each entry, which associates with
-                                  ///<  one ODT pin, is a bitmap of 8 CS that that ODT is routed to.
-                                  ///<  AGESA will base on this array to disable unused ODT pins to save power.
-
-  OUT UINT8   *ChipSelTriMap;     ///<  This pointer will be set to point to an array that describes
-                                  ///<  the routing of chip select pins to the DIMMs' ranks.
-                                  ///<  The array must have 8 entries. Each entry is a bitmap of 8 CS.
-                                  ///<  AGESA will base on this array to disable unused Chip select pins to save power.
-
-  OUT UINT8   DimmSRTPresent;     ///< For each bit n 0..3, 1 = DIMM n supports Extended Temperature Range where 4..7 are reserved
-  OUT UINT8   DimmASRPresent;     ///< For each bit n 0..3, 1 = DIMM n supports Auto Self Refresh where 4..7 are reserved
-
-  OUT BOOLEAN   ExtendTmp;        ///<  If extended temperature is supported on all dimms on a channel.
-
-  OUT UINT8   MaxVref;            ///<  Maximum Vref Value for channel
-
-  OUT UINT8   Reserved[100];      ///< Reserved
-} CH_DEF_STRUCT;
-
-///
-/// DCT Channel Timing Parameters.
-/// This data structure sets timings that are specific to the channel.
-///
-typedef struct _CH_TIMING_STRUCT {
-  OUT UINT16  DctDimmValid;       ///< For each bit n 0..3, 1=DIMM n is valid and is/will be configured where 4..7 are reserved.
-  OUT UINT16  DimmMirrorPresent;  ///< For each bit n 0..3, 1=DIMM n is OnDimmMirror capable where 4..7 are reserved.
-  OUT UINT16  DimmSpdCse;         ///< For each bit n 0..3, 1=DIMM n SPD checksum error where 4..7 are reserved.
-  OUT UINT16  DimmExclude;        ///< For each bit n 0..3, 1 = DIMM n gets excluded where 4..7 are reserved.
-  OUT UINT16  CsPresent;          ///< For each bit n 0..7, 1=Chip-select n is present
-  OUT UINT16  CsEnabled;          ///< For each bit n 0..7, 1=Chip-select n is enabled
-  OUT UINT16  CsTestFail;         ///< For each bit n 0..7, 1=Chip-select n is present but disabled
-  OUT UINT16  CsTrainFail;        ///< Bitmap showing which chipselects failed training
-  OUT UINT16  DIMM1KPage;         ///< For each bit n 0..3, 1=DIMM n contains 1K page devices. where 4..7 are reserved
-  OUT UINT16  DimmQrPresent;      ///< QuadRank DIMM present?
-  OUT UINT16  DimmDrPresent;      ///< Bitmap indicating that Dual Rank Dimms are present , where 4..7 are reserved
-  OUT UINT8   DimmSRPresent;      ///< Bitmap indicating that Single Rank Dimms are present, where 4..7 are reserved
-  OUT UINT16  Dimmx4Present;      ///< For each bit n 0..3, 1=DIMM n contains x4 data devices. where 4..7 are reserved
-  OUT UINT16  Dimmx8Present;      ///< For each bit n 0..3, 1=DIMM n contains x8 data devices. where 4..7 are reserved
-  OUT UINT16  Dimmx16Present;     ///< For each bit n 0..3, 1=DIMM n contains x16 data devices. where 4..7 are reserved
-
-  OUT UINT16  DIMMTrcd;           ///< Minimax Trcd*40 (ns) of DIMMs
-  OUT UINT16  DIMMTrp;            ///< Minimax Trp*40 (ns) of DIMMs
-  OUT UINT16  DIMMTrtp;           ///< Minimax Trtp*40 (ns) of DIMMs
-  OUT UINT16  DIMMTras;           ///< Minimax Tras*40 (ns) of DIMMs
-  OUT UINT16  DIMMTrc;            ///< Minimax Trc*40 (ns) of DIMMs
-  OUT UINT16  DIMMTwr;            ///< Minimax Twr*40 (ns) of DIMMs
-  OUT UINT16  DIMMTrrd;           ///< Minimax Trrd*40 (ns) of DIMMs
-  OUT UINT16  DIMMTwtr;           ///< Minimax Twtr*40 (ns) of DIMMs
-  OUT UINT16  DIMMTfaw;           ///< Minimax Tfaw*40 (ns) of DIMMs
-  OUT UINT16  TargetSpeed;        ///< Target DRAM bus speed in MHz
-  OUT UINT16  Speed;              ///< DRAM bus speed in MHz
-                                  ///<  400 (MHz)
-                                  ///<  533 (MHz)
-                                  ///<  667 (MHz)
-                                  ///<  800 (MHz)
-                                  ///<  and so on...
-  OUT UINT8   Trcpage;            ///< DCT Trcpage (10 ns)
-  OUT UINT8   CasL;               ///< CAS latency DCT setting (busclocks)
-  OUT UINT8   Trcd;               ///< DCT Trcd (busclocks)
-  OUT UINT8   Trp;                ///< DCT Trp (busclocks)
-  OUT UINT8   Trtp;               ///< DCT Trtp (busclocks)
-  OUT UINT8   Tras;               ///< DCT Tras (busclocks)
-  OUT UINT8   Trc;                ///< DCT Trc (busclocks)
-  OUT UINT8   Twr;                ///< DCT Twr (busclocks)
-  OUT UINT8   Trrd;               ///< DCT Trrd (busclocks)
-  OUT UINT8   Twtr;               ///< DCT Twtr (busclocks)
-  OUT UINT8   Tfaw;               ///< DCT Tfaw (busclocks)
-  OUT UINT16  Trfc0;              ///< DCT Logical DIMM0 Trfc (in ns)
-  OUT UINT16  Trfc1;              ///< DCT Logical DIMM1 Trfc (in ns)
-  OUT UINT16  Trfc2;              ///< DCT Logical DIMM2 Trfc (in ns)
-  OUT UINT16  Trfc3;              ///< DCT Logical DIMM3 Trfc (in ns)
-  OUT UINT32  DctMemSize;         ///< Base[47:16], total DRAM size controlled by this DCT.
-                                  ///<
-  OUT BOOLEAN SlowMode;           ///< 1T or 2T CMD mode (slow access mode)
-                                  ///< FALSE = 1T
-                                  ///< TRUE = 2T
-  OUT UINT8   TrwtTO;             ///< DCT TrwtTO (busclocks)
-  OUT UINT8   Twrrd;              ///< DCT Twrrd (busclocks)
-  OUT UINT8   Twrwr;              ///< DCT Twrwr (busclocks)
-  OUT UINT8   Trdrd;              ///< DCT Trdrd (busclocks)
-  OUT UINT8   TrwtWB;             ///< DCT TrwtWB (busclocks)
-  OUT UINT8   TrdrdSD;            ///< DCT TrdrdSD (busclocks)
-  OUT UINT8   TwrwrSD;            ///< DCT TwrwrSD (busclocks)
-  OUT UINT8   TwrrdSD;            ///< DCT TwrrdSD (busclocks)
-  OUT UINT16  MaxRdLat0;          ///< Max Read Latency 0
-  OUT UINT16  MaxRdLat1;          ///< Max Read Latency 1
-  OUT UINT16  MaxRdLat2;          ///< Max Read Latency 2
-  OUT UINT16  MaxRdLat3;          ///< Max Read Latency 3
-  OUT UINT8   WrDatGrossH;        ///< Temporary variables must be removed
-  OUT UINT8   DqsRcvEnGrossL;     ///< Temporary variables must be removed
-} CH_TIMING_STRUCT;
-
-///
-/// Data for each DCT.
-/// This data structure defines data used to configure each DRAM controller.
-///
-typedef struct _DCT_STRUCT {
-  OUT UINT8   Dct;                ///< Current Dct
-  OUT CH_TIMING_STRUCT Timings;   ///< Channel Timing structure
-  OUT CH_TIMING_STRUCT *TimingsMemPs1;   ///< Pointed to channel timing structure for memory Pstate 1
-  OUT CH_DEF_STRUCT    *ChData;   ///< Pointed to a dynamically allocated array of Channel structures
-  OUT UINT8   ChannelCount;       ///< Number of channel per this DCT
-  OUT BOOLEAN BkIntDis;           ///< Bank interleave requested but not enabled on current DCT
-  OUT UINT8 BankAddrMap;          ///< Bank Address Mapping
-  OUT UINT8 EnabledChipSels;      ///< Number of enabled chip selects on current DCT
-} DCT_STRUCT;
-
-
-///
-/// Data Structure defining each Die.
-/// This data structure contains information that is used to configure each Die.
-///
-typedef struct _DIE_STRUCT {
-
-  /// Advanced:
-
-  OUT UINT8   NodeId;              ///< Node ID of current controller
-  OUT UINT8   SocketId;            ///< Socket ID of this Die
-  OUT UINT8   DieId;               ///< ID of this die relative to the socket
-  OUT PCI_ADDR      PciAddr;       ///< Pci bus and device number of this controller.
-  OUT AGESA_STATUS  ErrCode;       ///< Current error condition of Node
-                                   ///<  0x0 = AGESA_SUCCESS
-                                   ///<  0x1 = AGESA_UNSUPPORTED
-                                   ///<  0x2 = AGESA_BOUNDS_CHK
-                                   ///<  0x3 = AGESA_ALERT
-                                   ///<  0x4 = AGESA_WARNING
-                                   ///<  0x5 = AGESA_ERROR
-                                   ///<  0x6 = AGESA_CRITICAL
-                                   ///<  0x7 = AGESA_FATAL
-                                   ///<
-  OUT BOOLEAN ErrStatus[EsbEOL];   ///< Error Status bit Field
-                                   ///<
-  OUT BOOLEAN Status[SbEOL];       ///< Status bit Field
-                                   ///<
-  OUT UINT32  NodeMemSize;         ///< Base[47:16], total DRAM size controlled by both DCT0 and DCT1 of this Node.
-                                   ///<
-  OUT UINT32  NodeSysBase;         ///< Base[47:16] (system address) DRAM base address of this Node.
-                                   ///<
-  OUT UINT32  NodeHoleBase;        ///< If not zero, Base[47:16] (system address) of dram hole for HW remapping.  Dram hole exists on this Node
-                                   ///<
-  OUT UINT32  NodeSysLimit;        ///< Base[47:16] (system address) DRAM limit address of this Node.
-                                   ///<
-  OUT UINT32  DimmPresent;         ///< For each bit n 0..7, 1 = DIMM n is present.
-                                   ///<   DIMM#  Select Signal
-                                   ///<   0      MA0_CS_L[0, 1]
-                                   ///<   1      MB0_CS_L[0, 1]
-                                   ///<   2      MA1_CS_L[0, 1]
-                                   ///<   3      MB1_CS_L[0, 1]
-                                   ///<   4      MA2_CS_L[0, 1]
-                                   ///<   5      MB2_CS_L[0, 1]
-                                   ///<   6      MA3_CS_L[0, 1]
-                                   ///<   7      MB3_CS_L[0, 1]
-                                   ///<
-  OUT UINT32  DimmValid;           ///< For each bit n 0..7, 1 = DIMM n is valid and is / will be configured
-  OUT UINT32  RegDimmPresent;      ///< For each bit n 0..7, 1 = DIMM n is registered DIMM
-  OUT UINT32  LrDimmPresent;       ///< For each bit n 0..7, 1 = DIMM n is Load Reduced DIMM
-  OUT UINT32  DimmEccPresent;      ///< For each bit n 0..7, 1 = DIMM n is ECC capable.
-  OUT UINT32  DimmParPresent;      ///< For each bit n 0..7, 1 = DIMM n is ADR/CMD Parity capable.
-                                   ///<
-  OUT UINT16  DimmTrainFail;       ///< Bitmap showing which dimms failed training
-  OUT UINT16  ChannelTrainFail;    ///< Bitmap showing the channel information about failed Chip Selects
-                                   ///<  0 in any bit field indicates Channel 0
-                                   ///<  1 in any bit field indicates Channel 1
-  OUT UINT8   Dct;                 ///<  Need to be removed
-                                   ///<  DCT pointer
-  OUT BOOLEAN GangedMode;          ///< Ganged mode
-                                   ///<  0 = disabled
-                                   ///<  1 = enabled
-  OUT CPU_LOGICAL_ID LogicalCpuid; ///< The logical CPUID of the node
-                                   ///<
-  OUT UINT16  HostBiosSrvc1;       ///< UINT16 sized general purpose field for use by host BIOS.  Scratch space.
-                                   ///<
-  OUT UINT32  HostBiosSrvc2;       ///< UINT32 sized general purpose field for use by host BIOS.  Scratch space.
-                                   ///<
-  OUT UINT8   MLoad;               ///< Need to be removed
-                                   ///< Number of devices loading MAA bus
-                                   ///<
-  OUT UINT8   MaxAsyncLat;         ///< Legacy wrapper
-                                   ///<
-  OUT UINT8   ChbD3Rcvrdly;        ///< Legacy wrapper
-                                   ///<
-  OUT UINT16  ChaMaxRdLat;         ///< Max Read Latency (ns) for DCT 0
-                                   ///<
-  OUT UINT8   ChbD3BcRcvrdly;      ///< CHB DIMM 3 Check UINT8 Receiver Enable Delay
-
-  OUT DCT_STRUCT *DctData;         ///< Pointed to a dynamically allocated array of DCT_STRUCTs
-  OUT UINT8   DctCount;            ///< Number of DCTs per this Die
-  OUT UINT8   Reserved[16];        ///< Reserved
-} DIE_STRUCT;
-
-/**********************************************************************
- * S3 data block structure
- **********************************************************************/
-/// AmdInitResume, AmdS3LateRestore, and AmdInitRtb param structure
-typedef struct {
-     OUT   UINT32 Signature;           ///< "ASTR" for AMD Suspend-To-RAM
-     OUT   UINT16 Version;             ///< S3 Params version number
-  IN OUT   UINT32 Flags;               ///< Indicates operation
-  IN OUT   VOID   *NvStorage;          ///< Pointer to memory critical save state data
-  IN OUT   UINT32 NvStorageSize;       ///< Size in bytes of the NvStorage region
-  IN OUT   VOID   *VolatileStorage;    ///< Pointer to remaining AMD save state data
-  IN OUT   UINT32 VolatileStorageSize; ///< Size in bytes of the VolatileStorage region
-} S3_DATA_BLOCK;
-
-/// Header at the beginning of a context save buffer.
-typedef struct {
-  _2BYTE_ALIGN UINT16 Version; ///< Version of header
-  _4BYTE_ALIGN UINT32 Revision; ///< Revision of the S3 data blob
-  _2BYTE_ALIGN UINT16 NumDevices; ///< Number of devices in the list
-  _2BYTE_ALIGN UINT16 RelativeOrMaskOffset; ///< Size of device list + header
-  _4BYTE_ALIGN UINT32 BlobSize; ///<Size of the whole S3 data blob (including the header)
-  _4BYTE_ALIGN UINT32 NextBlockOffset; ///< Size of the whole device save context
-} DEVICE_BLOCK_HEADER;
-
-///===============================================================================
-/// MEM_PARAMETER_STRUCT
-/// This data structure is used to pass wrapper parameters to the memory configuration code
-///
-typedef struct _MEM_PARAMETER_STRUCT {
-
-  // Basic (Return parameters)
-  // (This section contains the outbound parameters from the memory init code)
-
-  OUT BOOLEAN GStatus[GsbEOL]; ///< Global Status bitfield.
-                               ///<
-  OUT UINT32 HoleBase; ///< If not zero Base[47:16] (system address) of sub 4GB dram hole for HW remapping.
-                       ///<
-  OUT UINT32 Sub4GCacheTop; ///< If not zero, the 32-bit top of cacheable memory.
-                       ///<
-  OUT UINT32 Sub1THoleBase; ///< If not zero Base[47:16] (system address) of sub 1TB dram hole.
-                       ///<
-  OUT UINT32 SysLimit; ///< Limit[47:16] (system address).
-                       ///<
-  OUT DIMM_VOLTAGE DDR3Voltage; ///< Find support voltage and send back to platform BIOS.
-                        ///<
-  OUT VDDP_VDDR_VOLTAGE VddpVddrVoltage; ///< For a given configuration, request is made to change the VDDP/VDDR
-                                        ///< voltage in platform BIOS via AgesaHookBeforeDramInit callout and
-                                        ///< MEM_PARAMETER_STRUCT.VddpVddrVoltage.Voltage parameter if
-                                        ///< MEM_PARAMETER_STRUCT.VddpVddrVoltage.IsValid is TRUE. The
-                                        ///< MEM_PARAMETER_STRUCT.VddpVddrVoltage.Voltage is defined in
-                                        ///< MEMORY_PHY_VOLTAGE
-  OUT UINT8 ExternalVrefValue; ///< Target reference voltage for external Vref for 2D training
-                               ///<
-  OUT struct _MEM_DATA_STRUCT *MemData; ///< Access to global memory init data.
-
-  //  Advanced (Optional parameters)
-  //  Optional (all defaults values will be initialized by the
-  //  'AmdMemInitDataStructDef' based on AMD defaults. It is up
-  //  to the IBV/OEM to change the defaults after initialization
-  //  but prior to the main entry to the memory code):
-
-  // Memory Map/Mgt.
-
-  IN  UINT16 BottomIo; ///< Bottom of 32-bit IO space (8-bits).
-                      ///<   NV_BOTTOM_IO[7:0]=Addr[31:24]
-                     ///<
-  IN  BOOLEAN MemHoleRemapping; ///< Memory Hole Remapping (1-bit).
-                                  ///<  FALSE = disable
-                                  ///<  TRUE  = enable
-                                  ///<
-  IN  BOOLEAN LimitMemoryToBelow1Tb; ///< Limit memory address space to below 1 TB
-                                     ///<  FALSE = disable
-                                     ///<  TRUE  = enable
-                                     ///<
-                                     ///< @BldCfgItem{BLDCFG_LIMIT_MEMORY_TO_BELOW_1TB}
-
-                                     // Dram Timing
-
-  IN  UINT32 UserTimingMode; ///< User Memclock Mode.
-                                     ///< @BldCfgItem{BLDCFG_TIMING_MODE_SELECT}
-
-  IN  UINT32 MemClockValue; ///< Memory Clock Value.
-                                  ///< @BldCfgItem{BLDCFG_MEMORY_CLOCK_SELECT}
-
-                                  // Dram Configuration
-
-  IN  BOOLEAN EnableBankSwapOnly; ///< Bank Swap Only
-                                  ///<  - FALSE =disable (default)
-                                  ///<  - TRUE = enable
-                                  ///<
-                                  ///< @BldCfgItem{BLDCFG_MEMORY_ENABLE_BANK_SWAP_ONLY}
-
-  IN  BOOLEAN EnableBankIntlv; ///< Dram Bank (chip-select) Interleaving (1-bit).
-                                  ///<  - FALSE =disable (default)
-                                  ///<  - TRUE = enable
-                                  ///<
-                                  ///< @BldCfgItem{BLDCFG_MEMORY_ENABLE_BANK_INTERLEAVING}
-
-  IN  BOOLEAN EnableNodeIntlv; ///< Node Memory Interleaving (1-bit).
-                              ///<   - FALSE = disable (default)
-                              ///<   - TRUE = enable
-                              ///<
-                              ///< @BldCfgItem{BLDCFG_MEMORY_ENABLE_NODE_INTERLEAVING}
-
-  IN  BOOLEAN EnableChannelIntlv; ///< Channel Interleaving (1-bit).
-                              ///<   - FALSE = disable (default)
-                              ///<   - TRUE = enable
-                              ///<
-                              ///< @BldCfgItem{BLDCFG_MEMORY_CHANNEL_INTERLEAVING}
-  // DllPDBypassMode
-
-  IN  BOOLEAN EnableDllPDBypassMode; ///< Enable low-power DDR phy operation. This feature is used for low-power
-                                ///< solder-down DRAM motherboard designs with route matched CK/DQS/DQ signals.
-                                ///< It limits maximim achieveable DDR rates on the platform and should not be
-                                ///< enabled for systems requiring high DDR rate operation and/or DIMM-based systems.
-                                ///<   - FALSE = disable
-                                ///<   - TRUE = enable (default)
-                                ///<
-                                ///< @BldCfgItem{BLDCFG_DDR_PHY_DLL_BYPASS_MODE}
-  // ECC
-
-  IN  BOOLEAN EnableEccFeature; ///< enable ECC error to go into MCE.
-                              ///<   - FALSE = disable (default)
-                              ///<   - TRUE = enable
-                              ///<
-                              ///< @BldCfgItem{BLDCFG_ENABLE_ECC_FEATURE}
-  // Dram Power
-
-  IN  BOOLEAN EnablePowerDown; ///< CKE based power down mode (1-bit).
-                              ///<   - FALSE =disable (default)
-                              ///<   - TRUE =enable
-                             ///<
-                             ///< @BldCfgItem{BLDCFG_MEMORY_POWER_DOWN}
-
-  // Dram Mac Default
-
-  IN  UINT8 DramMacDefault;  ///< Default Maximum Activate Count
-                             ///<
-                             ///< @BldCfgItem{BLDCFG_MEMORY_ALTERNATIVE_MAX_ACTIVATE_COUNT}
-
-  // Dram Extended Temperature Range
-
-  IN  BOOLEAN EnableExtendedTemperatureRange; ///< enable extended temperature support.
-                              ///<   - FALSE =disable (default)
-                              ///<   - TRUE =enable
-                             ///<
-                             ///< @BldCfgItem{BLDCFG_MEMORY_EXTENDED_TEMPERATURE_RANGE}
-                             // Extended temperature range
-
-  // Online Spare
-
-  IN  BOOLEAN EnableOnLineSpareCtl; ///< Chip Select Spare Control bit 0.
-                              ///<  - FALSE = disable Spare (default)
-                              ///<  - TRUE = enable Spare
-                              ///<
-                              ///< @BldCfgItem{BLDCFG_ONLINE_SPARE}
-
-  IN  UINT8 *TableBasedAlterations; ///< Desired modifications to register settings.
-
-  IN  PSO_TABLE *PlatformMemoryConfiguration;
-  ///< A table that contains platform specific settings.
-  ///< For example, MemClk routing, the number of DIMM slots per channel, ....
-  ///< AGESA initializes this pointer with DefaultPlatformMemoryConfiguration that
-  ///< contains default conservative settings. Platform BIOS can either tweak
-  ///< DefaultPlatformMemoryConfiguration or reassign this pointer to its own table.
-  ///<
-  IN  BOOLEAN EnableParity; ///< Parity control.
-                               ///<  - TRUE = enable
-                               ///<  - FALSE = disable (default)
-                               ///<
-                               ///< @BldCfgItem{BLDCFG_MEMORY_PARITY_ENABLE}
-
-  IN  BOOLEAN EnableBankSwizzle; ///< BankSwizzle control.
-                               ///<  - FALSE = disable
-                               ///<  - TRUE = enable  (default)
-                              ///<
-                              ///< @BldCfgItem{BLDCFG_BANK_SWIZZLE}
-                              ///<
-
-  IN  BOOLEAN EnableMemClr; ///< Memory Clear functionality control.
-                              ///<  - FALSE = disable
-                              ///<  - TRUE = enable  (default)
-                              ///<
-  // Uma Configuration
-
-  IN  UMA_VERSION UmaVersion; ///< Uma Version
-                              ///<  0 = Legacy Version
-                              ///<  1 = Non-Legacy Version
-  IN  UMA_MODE UmaMode; ///<  Uma Mode
-                       ///<  0 = None
-                       ///<  1 = Specified
-                       ///<  2 = Auto
-  IN OUT  UINT32 UmaSize; ///<  The size of shared graphics dram (16-bits)
-                     ///<  NV_UMA_Size[31:0]=Addr[47:16]
-                     ///<
-  OUT UINT32 UmaBase; ///<  The allocated Uma base address (32-bits)
-                     ///<  NV_UMA_Base[31:0]=Addr[47:16]
-                     ///<
-
-                      /// Memory Restore Feature
-
-  IN  BOOLEAN MemRestoreCtl; ///< Memory context restore control
-                        ///<   FALSE = perform memory init as normal (AMD default)
-                        ///<   TRUE = restore memory context and skip training. This requires
-                        ///<          MemContext is valid before AmdInitPost
-                        ///<
-  IN  BOOLEAN SaveMemContextCtl; ///< Control switch to save memory context at the end of MemAuto
-                          ///<   TRUE = AGESA will setup MemContext block before exit AmdInitPost
-                          ///<   FALSE = AGESA will not setup MemContext block. Platform is
-                          ///<           expected to call S3Save later in POST if it wants to
-                          ///<           use memory context restore feature.
-   ///<
-  IN OUT S3_DATA_BLOCK MemContext; ///< Memory context block describes the data that platform needs to
-                           ///< save and restore for memory context restore feature to work.
-                           ///< It uses the subset of S3Save block to save/restore. Hence platform
-                           ///< may save only S3 block and uses it for both S3 resume and
-                           ///< memory context restore.
-                            ///<  - If MemRestoreCtl is TRUE, platform needs to pass in MemContext
-                            ///<    before AmdInitPost.
-                            ///<  - If SaveMemContextCtl is TRUE, platform needs to save MemContext
-                            ///<    right after AmdInitPost.
-  ///<
-  IN     BOOLEAN IsCapsuleMode; ///< Capsule reboot control
-                           ///<   FALSE = This is not a capsule reboot.
-                           ///<   TRUE = This is a capsule reboot.
-                           ///<
-  IN     BOOLEAN ExternalVrefCtl; ///< Control the use of external Vref
-                           ///<   TRUE = AGESA will use the function defined in "AGESA_EXTERNAL_VREF_CHANGE" in function list
-                          ///<          to change the vref
-                          ///<   FALSE = AGESA will will use the internal vref control.
-                          ///< @BldCfgItem{BLDCFG_ENABLE_EXTERNAL_VREF_FEATURE}
-                            ///<
-  IN     FORCE_TRAIN_MODE ForceTrainMode; ///<  Training Mode
-                                          ///<  0 = Force 1D Training for all configurations
-                                          ///<  1 = Force 2D Training for all configurations
-                                          ///<  2 = Auto - AGESA will control 1D or 2D
-  IN     TECHNOLOGY_TYPE DimmTypeUsedInMixedConfig; ///< Select the preferred technology type that AGESA will enable
-                                               ///< when it is mixed with other technology types.
-                                               ///<   DDR3_TECHNOLOGY = Use DDR3 DIMMs
-                                               ///<   GDDR5_TECHNOLOGY = Use GDDR5 DIMMs
-                                               ///<   UNSUPPORTED_TECHNOLOGY = Exit with fatal error when DDR3 and GDDR5 DIMMs
-                                               ///<                            are installed on the same system
-                                               ///< @BldCfgItem{BLDCFG_DIMM_TYPE_USED_IN_MIXED_CONFIG}
-  IN     BOOLEAN AmpEnable; ///< AMP functionality control
-                       ///<   TRUE = Enable, platform BIOS requests to enable memory overclocking function, and AGESA
-                       ///<          detects if memory is capable of it
-                       ///<   FALSE = Disable, there is no request to enable memory overclocking function
-                       ///<
-  IN     BOOLEAN AmpWarningMsgEnable; ///< AMP warning messages control
-                                ///<   TRUE = Enable to log the warning messages of AMP
-                                ///<   FALSE = Disable
-                                ///<
-  OUT    AMP_STATUS AmpStatus; ///< AMP status allows platform BIOS to check which voltage or warning message it should
-                        ///< use/apply.
-                        ///<
-                        ///<   AmpVoltageValid :
-                        ///<       TRUE - AGESA does enable AMP function, so use AmpVoltage for voltage adjustment
-                         ///<       FALSE - AGESA does not enable AMP function, so use DDRVoltage for voltage adjustment
-                         ///<
-                         ///<   AmpSupportDetectedButNotEnabled :
-                         ///<       TRUE - Display warning message of "AMP support detected but not enabled"
-                         ///<       FALSE - No corresponding message should be displayed
-                         ///<
-                         ///<   AmpSelectedButNotEnabled :
-                         ///<       TRUE - Display warning message of "AMP selected but not enabled"
-                         ///<       FALSE - No corresponding message should be displayed
-                         ///<
-                         ///<   Note that both of warning message status reports are controlled by AmpWarningMsgEnable
-                         ///<
-  OUT    AMP_DIMM_VOLTAGE AmpVoltage; ///< AMP voltage which will be sent back to platform BIOS, and
-                         ///< the value in AmpVoltage is valid only if AmpStatus is TRUE returned
-  IN     BOOLEAN DataEyeEn; ///< Get 2D training data eye
-                         ///<   TRUE  = Enable to get the 2D data eye
-                         ///<   FALSE = The 2D data eye is not enabled
-                         ///< @BldCfgItem{BLDCFG_ENABLE_DATA_EYE}
-  IN     BOOLEAN DramDoubleRefreshRate; ///< Specify the average time between refresh requests to all DRAM devices.
-                                ///<   TRUE  = 2x refresh rate.
-                                ///<   FALSE = 1x refresh rate.
-                                ///< @BldCfgItem{BLDCFG_DRAM_DOUBLE_REFRESH_RATE}
-  IN     PMU_TRAIN_MODE PmuTrainMode; ///<  PMU Training Mode
-                                  ///< @BldCfgItem{BLDCFG_PMU_TRAINING_MODE}
-                                  ///<  0 = PMU 1D Training only for all configurations
-                                  ///<  1 = PMU 1D and 2D Training read only for all configurations
-                                  ///<  2 = PMU 1D and 2D Training for all configurations
-                                  ///<  3 = AGESA control type of training depend on configurations
-  IN     BOOLEAN CfgEccRedirection; ///< ECC Redirection.
-                               ///< Build-time customizable only - @BldCfgItem{BLDCFG_ECC_REDIRECTION}
-  IN     UINT16 CfgScrubDramRate; ///< Scrub Dram Rate.
-                               ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_DRAM_RATE}
-  IN     UINT16 CfgScrubL2Rate; ///< Scrub L2Rate.
-                               ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_L2_RATE}
-  IN     UINT16 CfgScrubL3Rate; ///< Scrub L3Rate.
-                               ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_L3_RATE}
-  IN     UINT16 CfgScrubIcRate; ///< Scrub Ic Rate.
-                               ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_IC_RATE}
-  IN     UINT16 CfgScrubDcRate; ///< Scrub Dc Rate.
-                               ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_DC_RATE}
-  IN     BOOLEAN CfgEccSyncFlood; ///< ECC Sync Flood.
-                               ///< Build-time customizable only - @BldCfgItem{BLDCFG_ECC_SYNC_FLOOD}
-  IN     UINT16 CfgEccSymbolSize; ///< ECC Symbol Size.
-                               ///< Build-time customizable only - @BldCfgItem{BLDCFG_ECC_SYMBOL_SIZE}
-  IN     BOOLEAN CfgDqsTrainingControl; ///< Dqs Training Control.
-                                 ///< Build-time customizable only - @BldCfgItem{BLDCFG_DQS_TRAINING_CONTROL}
-  IN     BOOLEAN CfgUmaAbove4G; ///< Uma Above 4G Support
-  IN     UMA_ALIGNMENT CfgUmaAlignment; ///< Uma alignment
-  IN     BOOLEAN CfgMemoryAllClocksOn; ///< Memory All Clocks On.
-                                ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_ALL_CLOCKS_ON}
-  IN     UINT32 CfgMemoryBusFrequencyLimit; ///< Memory Bus Frequency Limit.
-                                ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT}
-  IN     UINT32 CfgPowerDownMode; ///< Power Down Mode.
-  IN     BOOLEAN CfgIgnoreSpdChecksum; ///< Ignore Spd Checksum.
-                               ///< Build-time customizable only - @BldCfgItem{BLDCFG_IGNORE_SPD_CHECKSUM}
-  IN     BOOLEAN CfgMemoryModeUnganged; ///< Memory Mode Unganged.
-                               ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_MODE_UNGANGED}
-  IN     BOOLEAN CfgMemoryQuadRankCapable; ///< Memory Quad Rank Capable.
-  IN     BOOLEAN CfgMemoryRDimmCapable; ///< Memory RDIMM Capable.
-  IN     BOOLEAN CfgMemoryLRDimmCapable; ///< Memory LRDIMM Capable.
-  IN     BOOLEAN CfgMemoryUDimmCapable; ///< Memory UDIMM Capable.
-  IN     BOOLEAN CfgMemorySODimmCapable; ///< Memory SODimm Capable.
-                               ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_SODIMM_CAPABLE}
-                                 ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_QUAD_RANK_CAPABLE}
-  IN     TECHNOLOGY_TYPE CfgDimmTypeUsedInMixedConfig; // Dimm Type Used In Mized Config
-  IN     BOOLEAN CfgDramDoubleRefreshRateEn; ///< Double DRAM refresh rate
-  IN     BOOLEAN DimmTypeDddr4Capable;        ///< Indicates that the system is DDR4 Capable
-                                             ///<   TRUE = Enable, platfrom BIOS requests support for DDR4
-                                             ///<   FALSE = Disable, platform BIOS requests no DDR4 support
-                                             ///< @BldCfgItem{BLDCFG_DIMM_TYPE_DDR4_CAPABLE}
-  IN     BOOLEAN DimmTypeDddr3Capable;        ///< Indicates that the system is DDR3 Capable
-                                             ///<   TRUE = Enable, platfrom BIOS requests support for DDR3
-                                             ///<   FALSE = Disable, platform BIOS requests no DDR3 support
-                                             ///< @BldCfgItem{BLDCFG_DIMM_TYPE_DDR3_CAPABLE}
-  IN     UINT16 CustomVddioSupport;          ///< CustomVddioSupport
-                                             ///< @BldCfgItem{BLDCFG_CUSTOM_VDDIO_VOLTAGE}
-
-} MEM_PARAMETER_STRUCT;
-
-
-///
-/// Function definition.
-/// This data structure passes function pointers to the memory configuration code.
-/// The wrapper can use this structure with customized versions.
-///
-typedef struct _MEM_FUNCTION_STRUCT {
-
-  // PUBLIC required Internal functions
-
-  IN OUT BOOLEAN (*amdMemGetPsCfgU) ( VOID *pMemData);  ///< Proc for Unbuffered DIMMs, platform specific
-  IN OUT BOOLEAN (*amdMemGetPsCfgR) (VOID *pMemData);   ///< Proc for Registered DIMMs, platform specific
-
-  // PUBLIC optional functions
-
-  IN OUT VOID (*amdMemEccInit) (VOID *pMemData);                  ///< NB proc for ECC feature
-  IN OUT VOID (*amdMemChipSelectInterleaveInit) (VOID *pMemData); ///< NB proc for CS interleave feature
-  IN OUT VOID (*amdMemDctInterleavingInit) (VOID *pMemData);      ///< NB proc for Channel interleave feature
-  IN OUT VOID (*amdMemMctInterleavingInit) (VOID *pMemData);      ///< NB proc for Node interleave feature
-  IN OUT VOID (*amdMemParallelTraining) (VOID *pMemData);         ///< NB proc for parallel training feature
-  IN OUT VOID (*amdMemEarlySampleSupport) (VOID *pMemData);       ///< NB code for early sample support feature
-  IN OUT VOID (*amdMemMultiPartInitSupport) (VOID *pMemData);     ///< NB code for 'multi-part'
-  IN OUT VOID (*amdMemOnlineSpareSupport) (VOID *pMemData);       ///< NB code for On-Line Spare feature
-  IN OUT VOID (*amdMemUDimmInit) (VOID *pMemData);                ///< NB code for UDIMMs
-  IN OUT VOID (*amdMemRDimmInit) (VOID *pMemData);                ///< NB code for RDIMMs
-  IN OUT VOID (*amdMemLrDimmInit) (VOID *pMemData);               ///< NB code for LRDIMMs
-  IN OUT UINT32   Reserved[100]; ///< Reserved for later function definition
-} MEM_FUNCTION_STRUCT;
-
-///
-/// Socket Structure
-///
-///
-typedef struct _MEM_SOCKET_STRUCT {
-  OUT VOID *ChannelPtr[MAX_CHANNELS_PER_SOCKET];  ///< Pointers to each channels training data
-
-  OUT VOID *TimingsPtr[MAX_CHANNELS_PER_SOCKET];  ///< Pointers to each channels timing data
-} MEM_SOCKET_STRUCT;
-
-///
-/// Contains all data relevant to Memory Initialization.
-///
-typedef struct _MEM_DATA_STRUCT {
-  IN AMD_CONFIG_PARAMS StdHeader;             ///< Standard configuration header
-
-  IN MEM_PARAMETER_STRUCT *ParameterListPtr;  ///< List of input Parameters
-
-  OUT MEM_FUNCTION_STRUCT FunctionList;       ///< List of function Pointers
-
-  IN OUT AGESA_STATUS (*GetPlatformCfg[MAX_PLATFORM_TYPES]) (struct _MEM_DATA_STRUCT *MemData, UINT8 SocketID, CH_DEF_STRUCT *CurrentChannel); ///< look-up platform info
-
-  IN OUT BOOLEAN (*ErrorHandling)(struct _DIE_STRUCT *MCTPtr, UINT8 DCT, UINT16 ChipSelMask, AMD_CONFIG_PARAMS *StdHeader); ///< Error Handling
-
-
-  OUT MEM_SOCKET_STRUCT SocketList[MAX_SOCKETS_SUPPORTED];  ///< Socket list for memory code.
-                                   ///< SocketList is a shortcut for IBVs to retrieve training
-                                   ///< and timing data for each channel indexed by socket/channel,
-                                   ///< eliminating their need to parse die/dct/channel etc.
-                                   ///< It contains pointers to the populated data structures for
-                                   ///< each channel and skips the channel structures that are
-                                   ///< unpopulated. In the case of channels sharing the same DCT,
-                                   ///< the pTimings pointers will point to the same DCT Timing data.
-
-  OUT DIE_STRUCT *DiesPerSystem;  ///< Pointed to an array of DIE_STRUCTs
-  OUT UINT8      DieCount;        ///< Number of MCTs in the system.
-
-  IN SPD_DEF_STRUCT *SpdDataStructure;              ///< Pointer to SPD Data structure
-
-  IN OUT  struct _PLATFORM_CONFIGURATION   *PlatFormConfig;    ///< Platform profile/build option config structure
-
-  IN OUT BOOLEAN IsFlowControlSupported;    ///< Indicates if flow control is supported
-
-  OUT UINT32 TscRate;             ///< The rate at which the TSC increments in megahertz.
-  IN BOOLEAN PhyReceiverLowPower;  ///< Force PHY receiver in low power.
-                                   ///<   TRUE  = PHY receiver low power
-                                   ///<   FALSE = PHY receiver high power
-} MEM_DATA_STRUCT;
-
-///
-/// Uma Structure
-///
-///
-typedef struct _UMA_INFO {
-  OUT UINT64 UmaBase;          ///< UmaBase[63:0] = Addr[63:0]
-  OUT UINT32 UmaSize;          ///< UmaSize[31:0] = Addr[31:0]
-  OUT UINT32 UmaAttributes;    ///< Indicate the attribute of Uma
-  OUT UINT8  UmaMode;          ///< Indicate the mode of Uma
-  OUT UINT16 MemClock;         ///< Indicate memory running speed in MHz
-  OUT UINT8  MemType;          ///< Indicate the DRAM technology type that is being used
-  OUT UINT8  Reserved[2];      ///< Reserved for future usage
-} UMA_INFO;
-
-
-/// Bitfield for ID
-typedef struct {
-  OUT UINT16 SocketId:8;       ///< Socket ID
-  OUT UINT16 ModuleId:8;       ///< Module ID
-} ID_FIELD;
-///
-/// Union for ID of socket and module that will be passed out in call out
-///
-typedef union {
-  OUT ID_FIELD IdField;         ///< Bitfield for ID
-  OUT UINT16 IdInformation;     ///< ID information for call out
-} ID_INFO;
-
-//  AGESA MEMORY ERRORS
-
-// AGESA_SUCCESS memory events
-#define MEM_EVENT_CAPSULE_IN_EFFECT      0x04013600ul          ///< Capsule is in effect
-#define MEM_EVENT_CONTEXT_RESTORE_IN_EFFECT     0x04023600ul   ///< Context restore is in effect
-
-// AGESA_ALERT Memory Errors
-#define MEM_ALERT_USER_TMG_MODE_OVERRULED   0x04010000ul       ///< TIMING_MODE_SPECIFIC is requested but
-                                                               ///< cannot be applied to current configurations.
-#define MEM_ALERT_ORG_MISMATCH_DIMM 0x04010100ul               ///< DIMM organization miss-match
-#define MEM_ALERT_BK_INT_DIS 0x04010200ul                      ///< Bank interleaving disable for internal issue
-
-// AGESA_ERROR Memory Errors
-#define MEM_ERROR_NO_DQS_POS_RD_WINDOW 0x04010300ul            ///< No DQS Position window for RD DQS
-#define MEM_ERROR_SMALL_DQS_POS_RD_WINDOW 0x04020300ul         ///< Small DQS Position window for RD DQS
-#define MEM_ERROR_NO_DQS_POS_WR_WINDOW 0x04030300ul            ///< No DQS Position window for WR DQS
-#define MEM_ERROR_SMALL_DQS_POS_WR_WINDOW 0x04040300ul         ///< Small DQS Position window for WR DQS
-#define MEM_ERROR_DIMM_SPARING_NOT_ENABLED 0x04010500ul        ///< DIMM sparing has not been enabled for an internal issues
-#define MEM_ERROR_RCVR_EN_VALUE_TOO_LARGE 0x04050300ul         ///< Receive Enable value is too large
-#define MEM_ERROR_RCVR_EN_NO_PASSING_WINDOW 0x04060300ul       ///< There is no DQS receiver enable window
-#define MEM_ERROR_DRAM_ENABLED_TIME_OUT 0x04010600ul           ///< Time out when polling DramEnabled bit
-#define MEM_ERROR_DCT_ACCESS_DONE_TIME_OUT 0x04010700ul        ///< Time out when polling DctAccessDone bit
-#define MEM_ERROR_SEND_CTRL_WORD_TIME_OUT 0x04010800ul         ///< Time out when polling SendCtrlWord bit
-#define MEM_ERROR_PREF_DRAM_TRAIN_MODE_TIME_OUT 0x04010900ul   ///< Time out when polling PrefDramTrainMode bit
-#define MEM_ERROR_ENTER_SELF_REF_TIME_OUT 0x04010A00ul         ///< Time out when polling EnterSelfRef bit
-#define MEM_ERROR_FREQ_CHG_IN_PROG_TIME_OUT 0x04010B00ul       ///< Time out when polling FreqChgInProg bit
-#define MEM_ERROR_EXIT_SELF_REF_TIME_OUT 0x04020A00ul          ///< Time out when polling ExitSelfRef bit
-#define MEM_ERROR_SEND_MRS_CMD_TIME_OUT 0x04010C00ul           ///< Time out when polling SendMrsCmd bit
-#define MEM_ERROR_SEND_ZQ_CMD_TIME_OUT 0x04010D00ul            ///< Time out when polling SendZQCmd bit
-#define MEM_ERROR_DCT_EXTRA_ACCESS_DONE_TIME_OUT 0x04010E00ul  ///< Time out when polling DctExtraAccessDone bit
-#define MEM_ERROR_MEM_CLR_BUSY_TIME_OUT 0x04010F00ul           ///< Time out when polling MemClrBusy bit
-#define MEM_ERROR_MEM_CLEARED_TIME_OUT 0x04020F00ul            ///< Time out when polling MemCleared bit
-#define MEM_ERROR_FLUSH_WR_TIME_OUT 0x04011000ul               ///< Time out when polling FlushWr bit
-#define MEM_ERROR_NBPSTATE_TRANSITION_TIME_OUT 0x04012600ul    ///< Time out when polling CurNBPstate bit
-#define MEM_ERROR_MAX_LAT_NO_WINDOW 0x04070300ul               ///< Fail to find pass during Max Rd Latency training
-#define MEM_ERROR_PARALLEL_TRAINING_LAUNCH_FAIL 0x04080300ul   ///< Fail to launch training code on an AP
-#define MEM_ERROR_PARALLEL_TRAINING_TIME_OUT 0x04090300ul      ///< Fail to finish parallel training
-#define MEM_ERROR_NO_ADDRESS_MAPPING 0x04011100ul              ///< No address mapping found for a dimm
-#define MEM_ERROR_RCVR_EN_NO_PASSING_WINDOW_EQUAL_LIMIT  0x040A0300ul ///< There is no DQS receiver enable window and the value is equal to the largest value
-#define MEM_ERROR_RCVR_EN_VALUE_TOO_LARGE_LIMIT_LESS_ONE 0x040B0300ul ///< Receive Enable value is too large and is 1 less than limit
-#define MEM_ERROR_CHECKSUM_NV_SPDCHK_RESTRT_ERROR  0x04011200ul       ///< SPD Checksum error for NV_SPDCHK_RESTRT
-#define MEM_ERROR_NO_CHIPSELECT 0x04011300ul                   ///< No chipselects found
-#define MEM_ERROR_UNSUPPORTED_333MHZ_UDIMM 0x04011500ul        ///< Unbuffered dimm is not supported at 333MHz
-#define MEM_ERROR_WL_PRE_OUT_OF_RANGE 0x040C0300ul             ///< Returned PRE value during write levelizzation was out of range
-#define MEM_ERROR_NO_2D_RDDQS_WINDOW 0x040D0300ul              ///< No 2D RdDqs Window
-#define MEM_ERROR_NO_2D_RDDQS_HEIGHT 0x040E0300ul              ///< No 2D RdDqs Height
-#define MEM_ERROR_2D_DQS_ERROR  0x040F0300ul                   ///< 2d RdDqs Error
-#define MEM_ERROR_INVALID_2D_RDDQS_VALUE  0x04022400ul         ///< 2d RdDqs invalid value found
-#define MEM_ERROR_2D_DQS_VREF_MARGIN_ERROR  0x04023400ul       ///< 2d RdDqs Vef Margin error found
-#define MEM_ERROR_LR_IBT_NOT_FOUND  0x04013500ul               ///< No LR dimm IBT value is found
-#define MEM_ERROR_MR0_NOT_FOUND  0x04023500ul                  ///< No MR0 value is found
-#define MEM_ERROR_ODT_PATTERN_NOT_FOUND  0x04033500ul          ///< No odt pattern value is found
-#define MEM_ERROR_RC2_IBT_NOT_FOUND  0x04043500ul              ///< No RC2 IBT value is found
-#define MEM_ERROR_RC10_OP_SPEED_NOT_FOUND  0x04053500ul        ///< No RC10 op speed is found
-#define MEM_ERROR_RTT_NOT_FOUND  0x04063500ul                  ///< No RTT value is found
-#define MEM_ERROR_P2D_NOT_FOUND  0x04073500ul                  ///< No 2D training config value is found
-#define MEM_ERROR_SAO_NOT_FOUND  0x04083500ul                  ///< No slow access mode, Address timing and Output driver compensation value is found
-#define MEM_ERROR_CLK_DIS_MAP_NOT_FOUND  0x04093500ul          ///< No CLK disable map is found
-#define MEM_ERROR_CKE_TRI_MAP_NOT_FOUND  0x040A3500ul          ///< No CKE tristate map is found
-#define MEM_ERROR_ODT_TRI_MAP_NOT_FOUND  0x040B3500ul          ///< No ODT tristate map is found
-#define MEM_ERROR_CS_TRI_MAP_NOT_FOUND  0x040C3500ul           ///< No CS tristate map is found
-#define MEM_ERROR_TRAINING_SEED_NOT_FOUND  0x040D3500ul        ///< No training seed is found
-#define MEM_ERROR_NO_2D_WRDAT_WINDOW 0x040D0400ul              ///< No 2D WrDat Window
-#define MEM_ERROR_NO_2D_WRDAT_HEIGHT 0x040E0400ul              ///< No 2D WrDat Height
-#define MEM_ERROR_2D_WRDAT_ERROR  0x040F0400ul                 ///< 2d WrDat Error
-#define MEM_ERROR_INVALID_2D_WRDAT_VALUE  0x04100400ul         ///< 2d WrDat invalid value found
-#define MEM_ERROR_2D_WRDAT_VREF_MARGIN_ERROR  0x04110400ul     ///< 2d WrDat Vef Margin error found
-#define MEM_ERROR_PMU_TRAINING 0x04120400ul                    ///< Fail PMU training.
-
-// AGESA_WARNING Memory Errors
-#define MEM_WARNING_UNSUPPORTED_QRDIMM      0x04011600ul       ///< QR DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_UDIMM       0x04021600ul       ///< U DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_SODIMM      0x04031600ul       ///< SO-DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_X4DIMM      0x04041600ul       ///< x4 DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_RDIMM       0x04051600ul       ///< R DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_LRDIMM      0x04061600ul       ///< LR DIMMs detected but not supported
-#define MEM_WARNING_EMP_NOT_SUPPORTED       0x04011700ul       ///< Processor is not capable for EMP
-#define MEM_WARNING_EMP_CONFLICT            0x04021700ul       ///< EMP cannot be enabled if channel interleaving,
-#define MEM_WARNING_EMP_NOT_ENABLED         0x04031700ul       ///< Memory size is not power of two.
-#define MEM_WARNING_ECC_DIS                 0x04041700ul       ///< ECC has been disabled as a result of an internal issue
-#define MEM_WARNING_PERFORMANCE_ENABLED_BATTERY_LIFE_PREFERRED 0x04011800ul  ///< Performance has been enabled, but battery life is preferred.
-                                                                             ///< bank interleaving, or bank swizzle is enabled.
-#define MEM_WARNING_NO_SPDTRC_FOUND               0x04011900ul ///< No Trc timing value found in SPD of a dimm.
-#define MEM_WARNING_NODE_INTERLEAVING_NOT_ENABLED 0x04012000ul ///< Node Interleaveing Requested, but could not be enabled
-#define MEM_WARNING_CHANNEL_INTERLEAVING_NOT_ENABLED 0x04012100ul ///< Channel Interleaveing Requested, but could not be enabled
-#define MEM_WARNING_BANK_INTERLEAVING_NOT_ENABLED 0x04012200ul ///< Bank Interleaveing Requested, but could not be enabled
-#define MEM_WARNING_VOLTAGE_1_35_NOT_SUPPORTED    0x04012300ul ///< Voltage 1.35 determined, but could not be supported
-#define MEM_WARNING_INITIAL_DDR3VOLT_NONZERO      0x04012400ul ///< DDR3 voltage initial value is not 0
-#define MEM_WARNING_NO_COMMONLY_SUPPORTED_VDDIO   0x04012500ul ///< Cannot find a commonly supported VDDIO
-#define MEM_WARNING_AMP_SUPPORT_DETECTED_BUT_NOT_ENABLED 0x04012900ul ///< AMP support detected but not enabled
-#define MEM_WARNING_AMP_SELECTED_BUT_NOT_ENABLED  0x04022900ul ///< AMP selected but not enabled
-
-// AGESA_FATAL Memory Errors
-#define MEM_ERROR_MINIMUM_MODE              0x04011A00ul       ///< Running in minimum mode
-#define MEM_ERROR_MODULE_TYPE_MISMATCH_DIMM 0x04011B00ul       ///< DIMM modules are miss-matched
-#define MEM_ERROR_NO_DIMM_FOUND_ON_SYSTEM   0x04011C00ul       ///< No DIMMs have been found
-#define MEM_ERROR_MISMATCH_DIMM_CLOCKS      0x04011D00ul       ///< DIMM clocks miss-matched
-#define MEM_ERROR_NO_CYC_TIME               0x04011E00ul       ///< No cycle time found
-#define MEM_ERROR_HEAP_ALLOCATE_DYN_STORING_OF_TRAINED_TIMINGS     0x04011F00ul  ///< Heap allocation error with dynamic storing of trained timings
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_DCT_STRUCT_AND_CH_DEF_STRUCTs  0x04021F00ul  ///< Heap allocation error for DCT_STRUCT and CH_DEF_STRUCT
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_REMOTE_TRAINING_ENV   0x04031F00ul           ///< Heap allocation error with REMOTE_TRAINING_ENV
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_SPD               0x04041F00ul    ///< Heap allocation error for SPD data
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_RECEIVED_DATA     0x04051F00ul    ///< Heap allocation error for RECEIVED_DATA during parallel training
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_S3_SPECIAL_CASE_REGISTERS     0x04061F00ul   ///< Heap allocation error for S3 "SPECIAL_CASE_REGISTER"
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_TRAINING_DATA     0x04071F00ul    ///< Heap allocation error for Training Data
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_IDENTIFY_DIMM_MEM_NB_BLOCK    0x04081F00ul   ///< Heap allocation error for  DIMM Identify "MEM_NB_BLOCK
-#define MEM_ERROR_NO_CONSTRUCTOR_FOR_IDENTIFY_DIMM    0x04022300ul    ///< No Constructor for DIMM Identify
-#define MEM_ERROR_VDDIO_UNSUPPORTED                   0x04022500ul    ///< VDDIO of the dimms on the board is not supported
-#define MEM_ERROR_VDDPVDDR_UNSUPPORTED                0x04032500ul    ///< VDDP/VDDR value indicated by the platform BIOS is not supported
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_2D                0x040B1F00ul    ///< Heap allocation error for 2D training data
-#define MEM_ERROR_HEAP_DEALLOCATE_FOR_2D              0x040C1F00ul    ///< Heap de-allocation error for 2D training data
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_DATAEYE           0x040F1F00ul    ///< Heap allocation error for DATAEYE Storage
-#define MEM_ERROR_HEAP_DEALLOCATE_FOR_DATAEYE         0x040E1F00ul    ///< Heap de-allocation error for DATAEYE Storage
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_PMU_SRAM_MSG_BLOCK            0x04101F00ul    ///< Heap allocation error for PMU SRAM Message Block Storage
-#define MEM_ERROR_HEAP_DEALLOCATE_FOR_PMU_SRAM_MSG_BLOCK          0x04111F00ul    ///< Heap de-allocation error for PMU SRAM Message Block Storage
-#define MEM_ERROR_HEAP_LOCATE_FOR_PMU_SRAM_MSG_BLOCK              0x04121F00ul    ///< Heap location error for PMU SRAM Message Block Storage
-
-// AGESA_CRITICAL Memory Errors
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR3    0x04091F00ul    ///< Heap allocation error for DMI table for DDR3
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR2    0x040A1F00ul    ///< Heap allocation error for DMI table for DDR2
-#define MEM_ERROR_UNSUPPORTED_DIMM_CONFIG             0x04011400ul    ///< Dimm population is not supported
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_CRAT_MEM_AFFINITY 0x040D1F00ul    ///< Heap allocation error for CRAT memory affinity info
-
-
-
-/*----------------------------------------------------------------------------
- *
- *                END OF MEMORY-SPECIFIC DATA STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-
-/*----------------------------------------------------------------------------
- *
- *                    CPU RELATED DEFINITIONS
- *
- *----------------------------------------------------------------------------
- */
-
-// CPU Event definitions.
-
-// Defines used to filter CPU events based on functional blocks
-#define CPU_EVENT_PM_EVENT_MASK                         0xFF00FF00ul
-#define CPU_EVENT_PM_EVENT_CLASS                        0x08000400ul
-
-//================================================================
-// CPU General events
-//    Heap allocation                     (AppFunction =      01h)
-#define CPU_ERROR_HEAP_BUFFER_IS_NOT_PRESENT            0x08000100ul
-#define CPU_ERROR_HEAP_IS_ALREADY_INITIALIZED           0x08010100ul
-#define CPU_ERROR_HEAP_IS_FULL                          0x08020100ul
-#define CPU_ERROR_HEAP_BUFFER_HANDLE_IS_ALREADY_USED    0x08030100ul
-#define CPU_ERROR_HEAP_BUFFER_HANDLE_IS_NOT_PRESENT     0x08040100ul
-//    BrandId                             (AppFunction =      02h)
-#define CPU_ERROR_BRANDID_HEAP_NOT_AVAILABLE            0x08000200ul
-//    Micro code patch                    (AppFunction =      03h)
-#define CPU_ERROR_MICRO_CODE_PATCH_IS_NOT_LOADED        0x08000300ul
-//    Power management                    (AppFunction =      04h)
-#define CPU_EVENT_PM_PSTATE_OVERCURRENT                 0x08000400ul
-#define CPU_EVENT_PM_ALL_PSTATE_OVERCURRENT             0x08010400ul
-#define CPU_ERROR_PSTATE_HEAP_NOT_AVAILABLE             0x08020400ul
-#define CPU_ERROR_PM_NB_PSTATE_MISMATCH                 0x08030400ul
-#define CPU_ERROR_PM_ALL_PSTATE_OVER_FREQUENCY_LIMIT    0x08040400ul
-#define CPU_EVENT_PM_PSTATE_FREQUENCY_LIMIT             0x08050400ul
-//    Other CPU events                    (AppFunction =      05h)
-#define CPU_EVENT_BIST_ERROR                            0x08000500ul
-#define CPU_EVENT_UNKNOWN_PROCESSOR_FAMILY              0x08010500ul
-#define CPU_EVENT_STACK_REENTRY                         0x08020500ul
-#define CPU_EVENT_CORE_NOT_IDENTIFIED                   0x08030500ul
-
-//=================================================================
-// CPU Feature events
-//    Execution cache                     (AppFunction =      21h)
-//        AGESA_CACHE_SIZE_REDUCED                            2101
-//        AGESA_CACHE_REGIONS_ACROSS_1MB                      2102
-//        AGESA_CACHE_REGIONS_ACROSS_4GB                      2103
-//        AGESA_REGION_NOT_ALIGNED_ON_BOUNDARY                2104
-//        AGESA_CACHE_START_ADDRESS_LESS_D0000                2105
-//        AGESA_THREE_CACHE_REGIONS_ABOVE_1MB                 2106
-//        AGESA_DEALLOCATE_CACHE_REGIONS                      2107
-#define CPU_EVENT_EXECUTION_CACHE_ALLOCATION_ERROR      0x08002100ul
-//    Core Leveling                       (AppFunction =      22h)
-#define CPU_WARNING_ADJUSTED_LEVELING_MODE              0x08002200ul
-//    SCS initialization                  (AppFunction =      24h)
-//        AGESA_SCS_HEAP_ENTRY_MISSING                        2401
-//        AGESA_SCS_BUFFER_EMPTY                              2402
-//        AGESA_SCS_WEIGHTS_MISMATCH                          2403
-#define CPU_EVENT_SCS_INITIALIZATION_ERROR              0x08002400ul
-//    BTC vid adjustment error
-#define CPU_EVENT_BTC_INITIALIZATION_ERROR              0x08002500ul
-
-// CPU Build Configuration structures and definitions
-
-/// Build Configuration structure for BLDCFG_AP_MTRR_SETTINGS
-typedef struct {
-  IN  UINT32 MsrAddr;     ///< Fixed-Sized MTRR address
-  IN  UINT64 MsrData;     ///< MTRR Settings
-} AP_MTRR_SETTINGS;
-
-#define AMD_AP_MTRR_FIX64k_00000    0x00000250ul
-#define AMD_AP_MTRR_FIX16k_80000    0x00000258ul
-#define AMD_AP_MTRR_FIX16k_A0000    0x00000259ul
-#define AMD_AP_MTRR_FIX4k_C0000     0x00000268ul
-#define AMD_AP_MTRR_FIX4k_C8000     0x00000269ul
-#define AMD_AP_MTRR_FIX4k_D0000     0x0000026Aul
-#define AMD_AP_MTRR_FIX4k_D8000     0x0000026Bul
-#define AMD_AP_MTRR_FIX4k_E0000     0x0000026Cul
-#define AMD_AP_MTRR_FIX4k_E8000     0x0000026Dul
-#define AMD_AP_MTRR_FIX4k_F0000     0x0000026Eul
-#define AMD_AP_MTRR_FIX4k_F8000     0x0000026Ful
-#define CPU_LIST_TERMINAL           0xFFFFFFFFul
-
-/// Data structure for the Mapping Item between Unified ID for IDS Setup Option
-/// and the option value.
-///
-typedef struct {
-  IN    UINT16 IdsNvId;           ///< Unified ID for IDS Setup Option.
-  OUT UINT16 IdsNvValue;        ///< The value of IDS Setup Option.
-} IDS_NV_ITEM;
-
-/// Data Structure for IDS CallOut Function
-typedef struct {
-  IN    AMD_CONFIG_PARAMS StdHeader;        ///< Standard configuration header
-  IN    IDS_NV_ITEM *IdsNvPtr;              ///< Memory Pointer of IDS NV Table
-  IN OUT UINTN Reserved;              ///< reserved
-} IDS_CALLOUT_STRUCT;
-
-/// Data Structure for Connected Standby Function
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;           ///< Standard configuration header
-  IN       VOID              *CsRestoreTable;     ///< Pointer to the CsRestoreTable
-  IN       UINT32            CsRestoreTableSize;  ///< Size in bytes of the CsRestoreTable
-} CS_CALLOUT_STRUCT;
-
-/************************************************************************
- *
- *  AGESA interface Call-Out function parameter structures
- *
- ***********************************************************************/
-
-/// Parameters structure for interface call-out AgesaAllocateBuffer
-typedef struct {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;      ///< Standard configuration header
-  IN OUT    UINT32              BufferLength;   ///< Size of buffer to allocate
-  IN        UINT32              BufferHandle;   ///< Identifier or name for the buffer
-  OUT       VOID                *BufferPointer; ///< location of the created buffer
-} AGESA_BUFFER_PARAMS;
-
-/// Parameters structure for interface call-out AgesaHeapRebase
-typedef struct {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;      ///< Standard configuration header
-     OUT    UINTN               HeapAddress;    ///< The address which heap content will be temporarily stored in
-} AGESA_REBASE_PARAMS;
-
-/// Parameters structure for interface call-out AgesaRunCodeOnAp
-typedef struct {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;            ///< Standard configuration header
-  IN        UINT32              FunctionNumber;       ///< Index of the procedure to execute
-  IN        VOID                *RelatedDataBlock;    ///< Location of data structure the procedure will use
-  IN        UINT32              RelatedBlockLength;   ///< Size of the related data block
-  IN        BOOLEAN             AllAPs;               ///< run on all Aps or on one only
-} AP_EXE_PARAMS;
-
-/// Parameters structure for the interface call-out AgesaReadSpd & AgesaReadSpdRecovery
-typedef struct {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;      ///< Standard configuration header
-  IN        UINT8               SocketId;       ///< Address of SPD - socket ID
-  IN        UINT8               MemChannelId;   ///< Address of SPD - memory channel ID
-  IN        UINT8               DimmId;         ///< Address of SPD - DIMM ID
-  IN OUT    UINT8               *Buffer;        ///< Location where to place the SPD content
-  IN OUT    MEM_DATA_STRUCT     *MemData;       ///< Location of the MemData structure, for reference
-} AGESA_READ_SPD_PARAMS;
-
-/// VoltageType values
-typedef enum {
-  VTYPE_CPU_VREF,                                    ///< Cpu side Vref
-  VTYPE_DIMM_VREF,                                   ///< Dimm Side Vref
-  VTYPE_VDDIO                                        ///< Vddio
-} VTYPE;
-
-/// Parameters structure for the interface call-out AgesaExternalVoltageAdjust
-typedef struct _VOLTAGE_ADJUST {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;     ///< Standard configuration header
-  IN OUT    MEM_DATA_STRUCT     *MemData;      ///< Location of the MemData structure, for reference
-  IN        VTYPE               VoltageType;   ///< Which Voltage Type to adjust
-  IN        INT8                AdjustValue;   ///< Positive/Negative Adjust Value
-} VOLTAGE_ADJUST;
-
-/// Buffer Handles
-typedef enum {
-  AMD_DMI_INFO_BUFFER_HANDLE = 0x000D000,       ///< Assign 0x000D000 buffer handle to DMI function
-  AMD_PSTATE_DATA_BUFFER_HANDLE,                ///< Assign 0x000D001 buffer handle to Pstate data
-  AMD_PSTATE_ACPI_BUFFER_HANDLE,                ///< Assign 0x000D002 buffer handle to Pstate table
-  AMD_BRAND_ID_BUFFER_HANDLE,                   ///< Assign 0x000D003 buffer handle to Brand ID
-  AMD_WHEA_BUFFER_HANDLE,                       ///< Assign 0x000D004 buffer handle to WHEA function
-  AMD_S3_INFO_BUFFER_HANDLE,                    ///< Assign 0x000D005 buffer handle to S3 function
-  AMD_S3_NB_INFO_BUFFER_HANDLE,                 ///< Assign 0x000D006 buffer handle to S3 NB device info
-  AMD_ACPI_ALIB_BUFFER_HANDLE,                  ///< Assign 0x000D007 buffer handle to ALIB SSDT table
-  AMD_ACPI_IVRS_BUFFER_HANDLE,                  ///< Assign 0x000D008 buffer handle to IOMMU IVRS table
-  AMD_CRAT_INFO_BUFFER_HANDLE,                  ///< Assign 0x000D009 buffer handle to CRAT function
-  AMD_ACPI_CDIT_BUFFER_HANDLE,                  ///< Assign 0x000D00A buffer handle to CDIT function
-  AMD_GNB_SMU_MEMORY_INFO_BUFFER_HANDLE         ///< Assign 0x000D00B buffer handle to SMU memory parameters function
-} AMD_BUFFER_HANDLE;
-
-
-/************************************************************************
- *
- *  AGESA interface Call-Out function prototypes
- *
- ***********************************************************************/
-
-VOID
-AgesaDoReset (
-  IN        UINTN               ResetType,
-  IN OUT    AMD_CONFIG_PARAMS   *StdHeader
-  );
-
-AGESA_STATUS
-AgesaAllocateBuffer (
-  IN      UINTN                 FcnData,
-  IN OUT  AGESA_BUFFER_PARAMS   *AllocParams
-  );
-
-AGESA_STATUS
-AgesaDeallocateBuffer (
-  IN      UINTN                 FcnData,
-  IN OUT  AGESA_BUFFER_PARAMS   *DeallocParams
-  );
-
-AGESA_STATUS
-AgesaLocateBuffer (
-  IN      UINTN                 FcnData,
-  IN OUT  AGESA_BUFFER_PARAMS   *LocateParams
-  );
-
-AGESA_STATUS
-AgesaHeapRebase (
-  IN      UINTN                 FcnData,
-  IN OUT  AGESA_REBASE_PARAMS   *RebaseParams
-  );
-
-AGESA_STATUS
-AgesaReadSpd (
-  IN        UINTN                 FcnData,
-  IN OUT    AGESA_READ_SPD_PARAMS *ReadSpd
-  );
-
-AGESA_STATUS
-AgesaReadSpdRecovery (
-  IN        UINTN                 FcnData,
-  IN OUT    AGESA_READ_SPD_PARAMS *ReadSpd
-  );
-
-AGESA_STATUS
-AgesaHookBeforeDramInitRecovery (
-  IN       UINTN           FcnData,
-  IN OUT   MEM_DATA_STRUCT *MemData
-  );
-
-AGESA_STATUS
-AgesaRunFcnOnAp (
-  IN        UINTN               ApicIdOfCore,
-  IN        AP_EXE_PARAMS       *LaunchApParams
-  );
-
-AGESA_STATUS
-AgesaRunFcnOnAllAps (
-  IN       UINTN               FcnData,
-  IN       AP_EXE_PARAMS       *LaunchApParams
-  );
-
-AGESA_STATUS
-AgesaWaitForAllApsFinished (
-  IN       UINTN             FcnData,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-AgesaIdleAnAp (
-  IN        UINTN               ApicIdOfCore,
-  IN        AMD_CONFIG_PARAMS   *StdHeader
-  );
-
-AGESA_STATUS
-AgesaHookBeforeDramInit (
-  IN        UINTN               SocketIdModuleId,
-  IN OUT    MEM_DATA_STRUCT     *MemData
-  );
-
-AGESA_STATUS
-AgesaHookBeforeDQSTraining (
-  IN        UINTN               SocketIdModuleId,
-  IN OUT    MEM_DATA_STRUCT     *MemData
-  );
-
-AGESA_STATUS
-AgesaHookBeforeExitSelfRefresh (
-  IN        UINTN               FcnData,
-  IN OUT    MEM_DATA_STRUCT     *MemData
-  );
-
-AGESA_STATUS
-AgesaPcieSlotResetControl (
-  IN      UINTN                 FcnData,
-  IN      PCIe_SLOT_RESET_INFO  *ResetInfo
- );
-
-AGESA_STATUS
-AgesaGetVbiosImage (
-  IN       UINTN                 FcnData,
-  IN OUT   GFX_VBIOS_IMAGE_INFO *VbiosImageInfo
-  );
-
-AGESA_STATUS
-AgesaFchOemCallout (
-  IN      VOID                  *FchData
- );
-
-AGESA_STATUS
-AgesaExternal2dTrainVrefChange (
-  IN        UINTN               SocketIdModuleId,
-  IN OUT    MEM_DATA_STRUCT     *MemData
-  );
-
-AGESA_STATUS
-AgesaGetIdsData  (
-  IN       UINTN              Data,
-  IN OUT   IDS_CALLOUT_STRUCT *IdsCalloutData
-  );
-
-AGESA_STATUS
-AgesaExternalVoltageAdjust (
-  IN       UINTN           SocketIdModuleId,
-  IN OUT   VOLTAGE_ADJUST *AdjustValue
-  );
-
-AGESA_STATUS
-AgesaGnbOemCallout (
-  IN        AMD_CONFIG_PARAMS   *StdHeader,
-  IN        UINTN               FcnData,
-  IN OUT    VOID                *GnbCalloutData
- );
-
-/************************************************************************
- *
- *  AGESA interface structure definition and function prototypes
- *
- ***********************************************************************/
-
-/**********************************************************************
- * Platform Configuration:  The parameters in boot branch function
- **********************************************************************/
-
-///  The possible platform control flow settings.
-typedef enum  {
-  Nfcm,                                          ///< Normal Flow Control Mode.
-  UmaDr,                                         ///< UMA using Display Refresh flow control.
-  UmaIfcm,                                       ///< UMA using Isochronous Flow Control.
-  Ifcm,                                          ///< Isochronous Flow Control Mode (other than for UMA).
-  Iommu,                                         ///< An IOMMU is in use in the system.
-  MaxControlFlow                                 ///< Not a control flow mode, use for limit checking.
-} PLATFORM_CONTROL_FLOW;
-
-///  The possible hardware prefetch mode settings.
-typedef enum  {
-  HARDWARE_PREFETCHER_AUTO,                     ///< Use the recommended setting for the processor. In most cases, the recommended setting is enabled.
-  DISABLE_HW_PREFETCHER_TRAINING_ON_SOFTWARE_PREFETCHES,  ///< Use the recommended setting for the hardware prefetcher, but disable training on software prefetches.
-  DISABLE_L1_PREFETCHER,                        ///< Use the recommended settings for the hardware prefetcher, but disable L1 prefetching and above.
-  DISABLE_L2_STRIDE_PREFETCHER,                 ///< Use the recommended settings for the hardware prefetcher, but disable the L2 stride prefetcher and above
-  DISABLE_HARDWARE_PREFETCH,                    ///< Disable hardware prefetching.
-  MAX_HARDWARE_PREFETCH_MODE                    ///< Not a hardware prefetch mode, use for limit checking.
-} HARDWARE_PREFETCH_MODE;
-
-///  The possible software prefetch mode settings.
-typedef enum  {
-  SOFTWARE_PREFETCHES_AUTO,                     ///< Use the recommended setting for the processor. In most cases, the recommended setting is enabled.
-  DISABLE_SOFTWARE_PREFETCHES,                  ///< Disable software prefetches (convert software prefetch instructions to NOP).
-  MAX_SOFTWARE_PREFETCH_MODE                    ///< Not a software prefetch mode, use for limit checking.
-} SOFTWARE_PREFETCH_MODE;
-
-/// Advanced performance tunings, prefetchers.
-/// These settings provide for performance tuning to optimize for specific workloads.
-typedef struct {
-  IN HARDWARE_PREFETCH_MODE  HardwarePrefetchMode; ///< This value provides for advanced performance tuning by controlling the hardware prefetcher setting.
-  IN SOFTWARE_PREFETCH_MODE  SoftwarePrefetchMode; ///< This value provides for advanced performance tuning by controlling the software prefetch instructions.
-  IN DRAM_PREFETCH_MODE      DramPrefetchMode;     ///< This value provides for advanced performance tuning by controlling the DRAM prefetcher setting.
-} ADVANCED_PERFORMANCE_PROFILE;
-
-///  The possible memory power policy settings.
-typedef enum  {
-  Performance,                                   ///< Optimize for performance.
-  BatteryLife,                                   ///< Optimize for battery life.
-  Auto,                                          ///< Auto
-  MaxPowerPolicy                                 ///< Not a power policy mode, use for limit checking.
-} MEMORY_POWER_POLICY;
-
-///  Platform performance settings for optimized settings.
-///  Several configuration settings for the processor depend upon other parts and
-///  general designer choices for the system. The determination of these data points
-///  is not standard for all platforms, so the host environment needs to provide these
-///  to specify how the system is to be configured.
-typedef struct {
-  IN PLATFORM_CONTROL_FLOW PlatformControlFlowMode;    ///< The platform's control flow mode for optimum platform performance.
-                                                       ///< @BldCfgItem{BLDCFG_PLATFORM_CONTROL_FLOW_MODE}
-  IN BOOLEAN               Use32ByteRefresh;           ///< Display Refresh traffic generates 32 byte requests.
-                                                       ///< @BldCfgItem{BLDCFG_USE_32_BYTE_REFRESH}
-  IN BOOLEAN               UseVariableMctIsocPriority; ///< The Memory controller will be set to Variable Isoc Priority.
-                                                       ///< @BldCfgItem{BLDCFG_USE_VARIABLE_MCT_ISOC_PRIORITY}
-  IN ADVANCED_PERFORMANCE_PROFILE AdvancedPerformanceProfile;   ///< The advanced platform performance settings.
-  IN MEMORY_POWER_POLICY   MemoryPowerPolicy;          ///< The memory's desired power policy
-                                                       ///< @BldCfgItem{BLDCFG_MEMORY_POWER_POLICY_MODE}
-  IN BOOLEAN               NbPstatesSupported;         ///< The Nb-Pstates is supported or not
-                                                       ///< @BldCfgItem{BLDCFG_NB_PSTATES_SUPPORTED}
-} PERFORMANCE_PROFILE;
-
-///  Platform settings that describe the voltage regulator modules of the system.
-///  Many power management settings are dependent upon the characteristics of the
-///  on-board voltage regulator module (VRM).  The host environment needs to provide
-///  these to specify how the system is to be configured.
-typedef struct {
-  IN UINT32  CurrentLimit;                         ///< Vrm Current Limit.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_CURRENT_LIMIT}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_CURRENT_LIMIT}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_GFX_CURRENT_LIMIT}
-  IN UINT32  LowPowerThreshold;                    ///< Vrm Low Power Threshold.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_LOW_POWER_THRESHOLD}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_LOW_POWER_THRESHOLD}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_GFX_LOW_POWER_THRESHOLD}
-  IN UINT32  SlewRate;                             ///< Vrm Slew Rate.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_SLEW_RATE}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_SLEW_RATE}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_GFX_SLEW_RATE}
-  IN BOOLEAN HiSpeedEnable;                        ///< Select high speed VRM.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_HIGH_SPEED_ENABLE}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_HIGH_SPEED_ENABLE}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_GFX_HIGH_SPEED_ENABLE}
-  IN UINT32  MaximumCurrentLimit;                  ///< Vrm Maximum Current Limit.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_MAXIMUM_CURRENT_LIMIT}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_MAXIMUM_CURRENT_LIMIT}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_GFX_MAXIMUM_CURRENT_LIMIT}
-  IN UINT32  SviOcpLevel;                          ///< SVI OCP Level.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_SVI_OCP_LEVEL}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_SVI_OCP_LEVEL}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_GFX_SVI_OCP_LEVEL}
-} PLATFORM_VRM_CONFIGURATION;
-
-///  The VRM types to characterize.
-typedef enum  {
-  CoreVrm,                                       ///< VDD plane.
-  NbVrm,                                         ///< VDDNB plane.
-  GfxVrm,                                        ///< GFX plane.
-  MaxVrmType                                     ///< Not a valid VRM type, use for limit checking.
-} PLATFORM_VRM_TYPE;
-
-///  The StapmBoost settings.
-typedef enum  {
-  StapmBoostDisabled,                            ///< Disable Stapm Boost
-  StapmBoostEnabled,                             ///< Enable Stapm Boost
-  StapmBoostSystemConfig                         ///< Default setting uses IRM programming setting
-} STAPM_BOOST_TYPE;
-
-
-///  These to specify how the system is to be configured for STAPM
-typedef struct {
-  IN UINT32  CfgStapmScalar;                      ///< Specify a % scalar to adjust this. Leave this unused for now until it is figured out.
-                                                  ///< @BldCfgItem{BLDCFG_STAPM_SCALAR}
-  IN UINT32  CfgStapmBoost;                       ///< If STAPM boost is enabled. System will actively track skin temperature and will allow higher performance till Skin temperature is below the limit
-                                                  ///< @BldCfgItem{BLDCFG_STAPM_BOOST}
-  IN UINT32  CfgStapmTimeConstant;                ///< Maximum power that the APU is allowed to consume when STAPM is enabled and Skin temperature is below the limit.
-                                                  ///< Specified time in seconds.
-                                                  ///< @BldCfgItem{BLDCFG_STAPM_TIME_CONSTANT}
-} PLATFORM_STAPM_CONFIGURATION;
-
-/// FCH Platform Configuration Policy
-typedef struct {
-  IN UINT16     CfgSmbus0BaseAddress;             ///< SMBUS0 Controller Base Address
-  IN UINT16     CfgSmbus1BaseAddress;             ///< SMBUS1 Controller Base Address
-  IN UINT16     CfgSioPmeBaseAddress;             ///< I/O base address for LPC I/O target range
-  IN UINT16     CfgAcpiPm1EvtBlkAddr;             ///< I/O base address of ACPI power management Event Block
-  IN UINT16     CfgAcpiPm1CntBlkAddr;             ///< I/O base address of ACPI power management Control Block
-  IN UINT16     CfgAcpiPmTmrBlkAddr;              ///< I/O base address of ACPI power management Timer Block
-  IN UINT16     CfgCpuControlBlkAddr;             ///< I/O base address of ACPI power management CPU Control Block
-  IN UINT16     CfgAcpiGpe0BlkAddr;               ///< I/O base address of ACPI power management General Purpose Event Block
-  IN UINT16     CfgSmiCmdPortAddr;                ///< I/O base address of ACPI SMI Command Block
-  IN UINT16     CfgAcpiPmaCntBlkAddr;             ///< I/O base address of ACPI power management additional control block
-  IN UINT32     CfgGecShadowRomBase;              ///< 32-bit base address to the GEC shadow ROM
-  IN UINT32     CfgWatchDogTimerBase;             ///< Watchdog Timer base address
-  IN UINT32     CfgSpiRomBaseAddress;             ///< Base address for the SPI ROM controller
-  IN UINT32     CfgHpetBaseAddress;               ///< HPET MMIO base address
-  IN UINT32     CfgAzaliaSsid;                    ///< Subsystem ID of HD Audio controller
-  IN UINT32     CfgSmbusSsid;                     ///< Subsystem ID of SMBUS controller
-  IN UINT32     CfgIdeSsid;                       ///< Subsystem ID of IDE controller
-  IN UINT32     CfgSataAhciSsid;                  ///< Subsystem ID of SATA controller in AHCI mode
-  IN UINT32     CfgSataIdeSsid;                   ///< Subsystem ID of SATA controller in IDE mode
-  IN UINT32     CfgSataRaid5Ssid;                 ///< Subsystem ID of SATA controller in RAID5 mode
-  IN UINT32     CfgSataRaidSsid;                  ///< Subsystem ID of SATA controller in RAID mode
-  IN UINT32     CfgEhciSsid;                      ///< Subsystem ID of EHCI
-  IN UINT32     CfgOhciSsid;                      ///< Subsystem ID of OHCI
-  IN UINT32     CfgLpcSsid;                       ///< Subsystem ID of LPC ISA Bridge
-  IN UINT32     CfgSdSsid;                        ///< Subsystem ID of SecureDigital controller
-  IN UINT32     CfgXhciSsid;                      ///< Subsystem ID of XHCI
-  IN BOOLEAN    CfgFchPort80BehindPcib;           ///< Is port80 cycle going to the PCI bridge
-  IN BOOLEAN    CfgFchEnableAcpiSleepTrap;        ///< ACPI sleep SMI enable/disable
-  IN GPP_LINKMODE CfgFchGppLinkConfig;            ///< GPP link configuration
-  IN BOOLEAN    CfgFchGppPort0Present;            ///< Is FCH GPP port 0 present
-  IN BOOLEAN    CfgFchGppPort1Present;            ///< Is FCH GPP port 1 present
-  IN BOOLEAN    CfgFchGppPort2Present;            ///< Is FCH GPP port 2 present
-  IN BOOLEAN    CfgFchGppPort3Present;            ///< Is FCH GPP port 3 present
-  IN BOOLEAN    CfgFchGppPort0HotPlug;            ///< Is FCH GPP port 0 hotplug capable
-  IN BOOLEAN    CfgFchGppPort1HotPlug;            ///< Is FCH GPP port 1 hotplug capable
-  IN BOOLEAN    CfgFchGppPort2HotPlug;            ///< Is FCH GPP port 2 hotplug capable
-  IN BOOLEAN    CfgFchGppPort3HotPlug;            ///< Is FCH GPP port 3 hotplug capable
-
-  IN UINT8   CfgFchEsataPortBitMap;               ///< ESATA Port definition, eg: [0]=1, means port 0 is ESATA capable
-  IN UINT8   CfgFchIrPinControl;                  ///< Register bitfield describing Infrared Pin Control:
-                                                  ///<   [0] - IR Enable 0
-                                                  ///<   [1] - IR Enable 1
-                                                  ///<   [2] - IR Tx0
-                                                  ///<   [3] - IR Tx1
-                                                  ///<   [4] - IR Open Drain
-                                                  ///<   [5] - IR Enable LED
-  IN SD_CLOCK_CONTROL CfgFchSdClockControl;       ///< FCH SD Clock Control
-  IN SCI_MAP_CONTROL  *CfgFchSciMapControl;       ///< FCH SCI Mapping Control
-  IN SATA_PHY_CONTROL *CfgFchSataPhyControl;      ///< FCH SATA PHY Control
-  IN GPIO_CONTROL     *CfgFchGpioControl;         ///< FCH GPIO Control
-  IN BOOLEAN          CfgFchRtcWorkAround;        ///< FCH RTC Workaround
-  IN BOOLEAN          CfgFchUsbPortDisWorkAround; ///< FCH USB Workaround
-} FCH_PLATFORM_POLICY;
-
-
-/// Build Option/Configuration Boolean Structure.
-typedef struct {
-  IN  AMD_CODE_HEADER VersionString;              ///< AMD embedded code version string
-
-  //Build Option Area
-  IN BOOLEAN OptionUDimms;                        ///< @ref BLDOPT_REMOVE_UDIMMS_SUPPORT "BLDOPT_REMOVE_UDIMMS_SUPPORT"
-  IN BOOLEAN OptionRDimms;                        ///< @ref BLDOPT_REMOVE_RDIMMS_SUPPORT "BLDOPT_REMOVE_RDIMMS_SUPPORT"
-  IN BOOLEAN OptionLrDimms;                       ///< @ref BLDOPT_REMOVE_LRDIMMS_SUPPORT "BLDOPT_REMOVE_LRDIMMS_SUPPORT"
-  IN BOOLEAN OptionEcc;                           ///< @ref BLDOPT_REMOVE_ECC_SUPPORT "BLDOPT_REMOVE_ECC_SUPPORT"
-  IN BOOLEAN OptionBankInterleave;                ///< @ref BLDOPT_REMOVE_BANK_INTERLEAVE "BLDOPT_REMOVE_BANK_INTERLEAVE"
-  IN BOOLEAN OptionDctInterleave;                 ///< @ref BLDOPT_REMOVE_DCT_INTERLEAVE "BLDOPT_REMOVE_DCT_INTERLEAVE"
-  IN BOOLEAN OptionNodeInterleave;                ///< @ref BLDOPT_REMOVE_NODE_INTERLEAVE "BLDOPT_REMOVE_NODE_INTERLEAVE"
-  IN BOOLEAN OptionParallelTraining;              ///< @ref BLDOPT_REMOVE_PARALLEL_TRAINING "BLDOPT_REMOVE_PARALLEL_TRAINING"
-  IN BOOLEAN OptionOnlineSpare;                   ///< @ref BLDOPT_REMOVE_ONLINE_SPARE_SUPPORT "BLDOPT_REMOVE_ONLINE_SPARE_SUPPORT"
-  IN BOOLEAN OptionMemRestore;                    ///< @ref BLDOPT_REMOVE_MEM_RESTORE_SUPPORT "BLDOPT_REMOVE_MEM_RESTORE_SUPPORT"
-  IN BOOLEAN OptionAcpiPstates;                   ///< @ref BLDOPT_REMOVE_ACPI_PSTATES "BLDOPT_REMOVE_ACPI_PSTATES"
-  IN BOOLEAN OptionCrat;                          ///< @ref BLDOPT_REMOVE_CRAT "BLDOPT_REMOVE_CRAT"
-  IN BOOLEAN OptionCdit;                          ///< @ref BLDOPT_REMOVE_CDIT "BLDOPT_REMOVE_CDIT"
-  IN BOOLEAN OptionWhea;                          ///< @ref BLDOPT_REMOVE_WHEA "BLDOPT_REMOVE_WHEA"
-  IN BOOLEAN OptionDmi;                           ///< @ref BLDOPT_REMOVE_DMI "BLDOPT_REMOVE_DMI"
-  IN BOOLEAN OptionEarlySamples;                  ///< @ref BLDOPT_REMOVE_EARLY_SAMPLES "BLDOPT_REMOVE_EARLY_SAMPLES"
-  IN BOOLEAN OptionAddrToCsTranslator;            ///< ADDR_TO_CS_TRANSLATOR
-
-  //Build Configuration Area
-  IN UINT64 CfgPciMmioAddress;                    ///< Pci Mmio Base Address to use for PCI Config accesses.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_PCI_MMIO_BASE}
-  IN UINT32 CfgPciMmioSize;                       ///< Pci Mmio region Size.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_PCI_MMIO_SIZE}
-  IN PLATFORM_VRM_CONFIGURATION CfgPlatVrmCfg[MaxVrmType]; ///< Several configuration settings for the voltage regulator modules.
-  IN UINT32 CfgCpuFrequencyLimit;                 ///< CPU frequency limit
-  IN PLATFORM_CONNECTED_STANDBY_MODES CfgPlatformConnectedStandbyMode; ///< Enable or disable connected standby
-  IN UINT32 CfgPlatNumIoApics;                    ///< The number of IO APICS for the platform.
-  IN UINT32 CfgMemInitPstate;                     ///< Memory Init Pstate.
-  IN PLATFORM_CSTATE_MODES CfgPlatformCStateMode; ///< Select the C-State Mode that will used.
-  IN UINT32 CfgPlatformCStateOpData;              ///< An IO port or additional C-State setup data, depends on C-State mode.
-  IN UINT16 CfgPlatformCStateIoBaseAddress;       ///< Specifies I/O ports that can be used to allow CPU to enter CStates
-  IN PLATFORM_CPB_MODES CfgPlatformCpbMode;       ///< Enable or disable core performance boost
-  IN UINT32 CfgCoreLevelingMode;                  ///< Apply any downcoring or core count leveling as specified.
-  IN PERFORMANCE_PROFILE CfgPerformanceProfile;   ///< The platform's control flow mode and platform performance settings.
-
-  IN UINT32 CfgAmdPlatformType;                   ///< Designate the platform as a Server, Desktop, or Mobile.
-  IN UINT32 CfgAmdPowerCeiling;                   ///< PowerCeiling, specifies a maximum power usage limit for the platform
-  IN UINT16 CfgHtcTemperatureLimit;               ///< Hardware Thermal Control temperature limit in tenths of degrees Celsius.
-  IN UINT16 CfgLhtcTemperatureLimit;              ///< Local Hardware Thermal Control temperature limit in tenths of degrees Celsius.
-
-  IN UINT32 CfgMemoryBusFrequencyLimit;           ///< Memory Bus Frequency Limit.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT}
-  IN BOOLEAN CfgMemoryModeUnganged;               ///< Memory Mode Unganged.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_MODE_UNGANGED}
-  IN BOOLEAN CfgMemoryQuadRankCapable;            ///< Memory Quad Rank Capable.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_QUAD_RANK_CAPABLE}
-  IN UINT32 CfgMemoryQuadrankType;        ///< Memory Quadrank Type.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_QUADRANK_TYPE}
-  IN BOOLEAN CfgMemoryRDimmCapable;               ///< Memory RDIMM Capable.
-  IN BOOLEAN CfgMemoryLRDimmCapable;              ///< Memory LRDIMM Capable.
-  IN BOOLEAN CfgMemoryUDimmCapable;               ///< Memory UDIMM Capable.
-  IN BOOLEAN CfgMemorySODimmCapable;              ///< Memory SODimm Capable.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_SODIMM_CAPABLE}
-  IN BOOLEAN CfgLimitMemoryToBelow1Tb;            ///< Limit memory address space to below 1TB
-  IN BOOLEAN CfgMemoryEnableBankSwapOnly;         ///< Memory Enable Bank Swap Only @BldCfgItem{BLDCFG_MEMORY_ENABLE_BANK_SWAP_ONLY}
-  IN BOOLEAN CfgMemoryEnableBankInterleaving;     ///< Memory Enable Bank Interleaving.
-  IN BOOLEAN CfgMemoryEnableNodeInterleaving;     ///< Memory Enable Node Interleaving.
-  IN BOOLEAN CfgMemoryChannelInterleaving;        ///< Memory Channel Interleaving.
-  IN BOOLEAN CfgMemoryPowerDown;                  ///< Memory Power Down.
-  IN UINT8   CfgMemoryMacDefault;                 ///< Memory DRAM MAC Default
-  IN BOOLEAN CfgMemoryExtendedTemperatureRange;   ///< Memory Extended Temperature Range
-  IN UINT32  CfgPowerDownMode;                    ///< Power Down Mode.
-  IN BOOLEAN CfgOnlineSpare;                      ///< Online Spare.
-  IN BOOLEAN CfgMemoryParityEnable;               ///< Memory Parity Enable.
-  IN BOOLEAN CfgBankSwizzle;                      ///< Bank Swizzle.
-  IN UINT32  CfgTimingModeSelect;                 ///< Timing Mode Select.
-  IN UINT32  CfgMemoryClockSelect;                ///< Memory Clock Select.
-  IN BOOLEAN CfgDqsTrainingControl;               ///< Dqs Training Control.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_DQS_TRAINING_CONTROL}
-  IN BOOLEAN CfgIgnoreSpdChecksum;                ///< Ignore Spd Checksum.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_IGNORE_SPD_CHECKSUM}
-  IN BOOLEAN CfgUseBurstMode;                     ///< Use Burst Mode.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_USE_BURST_MODE}
-  IN BOOLEAN CfgMemoryAllClocksOn;                ///< Memory All Clocks On.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_ALL_CLOCKS_ON}
-  IN BOOLEAN CfgDdrPhyDllBypassMode;              ///< Enable DllPDBypassMode
-  IN BOOLEAN CfgEnableEccFeature;                 ///< Enable ECC Feature.
-  IN BOOLEAN CfgEccRedirection;                   ///< ECC Redirection.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_ECC_REDIRECTION}
-  IN UINT16  CfgScrubDramRate;                    ///< Scrub Dram Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_DRAM_RATE}
-  IN UINT16  CfgScrubL2Rate;                      ///< Scrub L2Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_L2_RATE}
-  IN UINT16  CfgScrubL3Rate;                      ///< Scrub L3Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_L3_RATE}
-  IN UINT16  CfgScrubIcRate;                      ///< Scrub Ic Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_IC_RATE}
-  IN UINT16  CfgScrubDcRate;                      ///< Scrub Dc Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_DC_RATE}
-  IN BOOLEAN CfgEccSyncFlood;                     ///< ECC Sync Flood.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_ECC_SYNC_FLOOD}
-  IN UINT16  CfgEccSymbolSize;                    ///< ECC Symbol Size.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_ECC_SYMBOL_SIZE}
-  IN UINT64  CfgHeapDramAddress;                  ///< Heap contents will be temporarily stored in this address during the transition.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_HEAP_DRAM_ADDRESS}
-  IN BOOLEAN CfgNodeMem1GBAlign;                  ///< Node Mem 1GB boundary Alignment
-  IN BOOLEAN CfgS3LateRestore;                    ///< S3 Late Restore
-  IN BOOLEAN CfgAcpiPstateIndependent;            ///< PSD method dependent/Independent
-  IN UINT32  CfgAcpiPstatesPsdPolicy;             ///< PSD policy
-  IN AP_MTRR_SETTINGS *CfgApMtrrSettingsList;     ///< The AP's MTRR settings before final halt
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_AP_MTRR_SETTINGS_LIST}
-  IN UMA_VERSION CfgUmaVersion;                   ///< Uma Version
-  IN UMA_MODE CfgUmaMode;                         ///< Uma Mode
-  IN UINT32 CfgUmaSize;                           ///< Uma Size [31:0]=Addr[47:16]
-  IN BOOLEAN CfgUmaAbove4G;                       ///< Uma Above 4G Support
-  IN UMA_ALIGNMENT CfgUmaAlignment;               ///< Uma alignment
-  IN BOOLEAN CfgProcessorScopeInSb;               ///< ACPI Processor Object in \\_SB scope
-  IN CHAR8   CfgProcessorScopeName0;              ///< OEM specific 1st character of processor scope name.
-  IN CHAR8   CfgProcessorScopeName1;              ///< OEM specific 2nd character of processor scope name.
-  IN UINT8   CfgGnbHdAudio;                       ///< GNB HD Audio
-  IN UINT8   CfgAbmSupport;                       ///< Abm Support
-  IN UINT8   CfgDynamicRefreshRate;               ///< DRR Dynamic Refresh Rate
-  IN UINT16  CfgLcdBackLightControl;              ///< LCD Backlight Control
-  IN UINT8   CfgGnb3dStereoPinIndex;                ///< 3D Stereo Pin ID.
-  IN UINT32  CfgTempPcieMmioBaseAddress;          ///< Temp pcie MMIO base Address
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_TEMP_PCIE_MMIO_BASE_ADDRESS}
-  IN UINT32  CfgGnbIGPUSSID;                      ///< Gnb internal GPU SSID
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_IGPU_SUBSYSTEM_ID}
-  IN UINT32  CfgGnbHDAudioSSID;                   ///< Gnb HD Audio SSID
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID}
-  IN UINT32  CfgGnbPcieSSID;                      ///< Gnb PCIe SSID
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_APU_PCIE_PORTS_SUBSYSTEM_ID}
-  IN UINT16  CfgLvdsSpreadSpectrum;               ///< Lvds Spread Spectrum
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_GFX_LVDS_SPREAD_SPECTRUM}
-  IN UINT16  CfgLvdsSpreadSpectrumRate;           ///< Lvds Spread Spectrum Rate
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_GFX_LVDS_SPREAD_SPECTRUM_RATE}
-  IN FCH_PLATFORM_POLICY  *FchBldCfg;             ///< FCH platform build configuration policy
-
-  IN BOOLEAN    CfgIommuSupport;                  ///< IOMMU support
-  IN UINT8      CfgLvdsPowerOnSeqDigonToDe;       ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqDeToVaryBl;      ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqDeToDigon;       ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqVaryBlToDe;      ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqOnToOffDelay;    ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqVaryBlToBlon;    ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqBlonToVaryBl;    ///< Panel initialization timing
-  IN UINT16     CfgLvdsMaxPixelClockFreq;         ///< The maximum pixel clock frequency supported
-  IN UINT32     CfgLcdBitDepthControlValue;       ///< The LCD bit depth control settings
-  IN UINT8      CfgLvds24bbpPanelMode;            ///< The LVDS 24 BBP mode
-  IN LVDS_MISC_CONTROL CfgLvdsMiscControl;        ///< THe LVDS Misc control
-  IN UINT16     CfgPcieRefClkSpreadSpectrum;      ///< PCIe Reference Clock Spread Spectrum
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_PCIE_REFCLK_SPREAD_SPECTRUM}
-  IN BOOLEAN    CfgExternalVrefCtlFeature;        ///< External Vref control
-  IN FORCE_TRAIN_MODE   CfgForceTrainMode;        ///< Force Train Mode
-  IN BOOLEAN    CfgGnbRemoteDisplaySupport;       ///< Wireless Display Support
-  IN IOMMU_EXCLUSION_RANGE_DESCRIPTOR *CfgIvrsExclusionRangeList;
-  IN BOOLEAN    CfgGnbSyncFloodPinAsNmi;          ///< @ref BLDCFG_USE_SYNCFLOOD_AS_NMI "BLDCFG_USE_SYNCFLOOD_AS_NMI"
-  IN UINT8      CfgIgpuEnableDisablePolicy;       ///< This item defines the iGPU Enable/Disable policy
-                                                  ///< @li 0 = Auto - use current default
-                                                  ///< @li 2 = Disable iGPU if ANY PCI or PCIe Graphics card is present
-                                                  ///< @BldCfgItem{BLDCFG_IGPU_ENABLE_DISABLE_POLICY}
-  IN UINT8      CfgGnbSwTjOffset;                 ///< Software-writeable TjOffset to account for changes in junction temperature
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_GNB_THERMAL_SENSOR_CORRECTION}
-  IN UINT8      CfgLvdsMiscVoltAdjustment;        ///< Register LVDS_CTRL_4 to adjust LVDS output voltage
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_LVDS_MISC_VOL_ADJUSTMENT}
-  IN DISPLAY_MISC_CONTROL CfgDisplayMiscControl;  ///< The Display Misc control
-  IN DP_FIXED_VOLT_SWING_TYPE CfgDpFixedVoltSwingType;///< To indicate fixed voltage swing value
-                                                      ///< @BldCfgItem{BLDCFG_DP_FIXED_VOLT_SWING}
-  IN TECHNOLOGY_TYPE CfgDimmTypeUsedInMixedConfig; ///< Select the preferred technology type that AGESA will enable
-                                                   ///< when it is mixed with other technology types.
-  IN BOOLEAN CfgHybridBoostEnable;                ///< HyBrid Boost support
-                                                  ///< @BldCfgItem{BLDCFG_HYBRID_BOOST_ENABLE}
-  IN UINT64  CfgGnbIoapicAddress;                 ///< GNB IOAPIC Base Address(NULL if platform configured)
-                                                  ///< @BldCfgItem{BLDCFG_GNB_IOAPIC_ADDRESS}
-  IN BOOLEAN CfgDataEyeEn;                        ///< Enable get 2D Data Eye
-  IN UINT32 CfgBatteryBoostTune;                  ///< @BldCfgItem{BLDCFG_BATTERY_BOOST_TUNE}
-  IN BOOLEAN CfgDramDoubleRefreshRateEn;          ///< Double DRAM refresh rate
-  IN DISPLAY_RESOLUTION CfgGnbResolution;         ///< Display Resolution
-                                                  ///< @BldCfgItem{BLDCFG_RESOLUTION}
-  IN ACP_SIZE  CfgGnbAcpSize;                     ///< ACP size [31:0]=Addr[47:16]
-                                                  ///< @BldCfgItem{BLDCFG_ACP_SIZE}
-  IN PMU_TRAIN_MODE   CfgPmuTrainMode;            ///< Force Train Mode
-                                                  ///< @BldCfgItem{BLDCFG_PMU_TRAINING_MODE}
-  IN UINT8 CfgMemoryPhyVoltage;                   ///< Memory Phy voltage (VDDR)
-                                                  ///< @BldCfgItem{BLDCFG_MEMORY_PHY_VOLTAGE}
-  IN UINT32 CfgGpuFrequencyLimit;                 ///< @BldCfgItem{BLDCFG_GPU_FREQUENCY_LIMIT}
-  IN UINT8 CfgMaxNumAudioEndpoints;               ///< @BldCfgItem{BLDCFG_MAX_NUM_AUDIO_ENDPOINTS}
-  IN BOOLEAN CfgBapmEnable;                       ///< @BldCfgItem{BLDCFG_BAPM_ENABLE}
-  IN UINT32  CfgGnbAzI2sBusSelect;                ///< Acp AZ/I2sBus select
-                                                  ///< @BldCfgItem{BLDCFG_GNB_AZ_I2SBUS_SELECT}
-  IN UINT32  CfgGnbAzI2sBusPinConfig;             ///< Acp AZ/I2sBus pin configuration
-                                                  ///< @BldCfgItem{BLDCFG_GNB_AZ_I2SBUS_PIN_CONFIG}
-  IN UINT32  CfgPkgPwrLimitAC;                    ///< Package Power Limit under AC
-                                                  ///< @BldCfgItem{BLDCFG_PPT_LIMIT_AC}
-  IN UINT32  CfgPkgPwrLimitDC;                    ///< Package Power Limit under DC
-                                                  ///< @BldCfgItem{BLDCFG_PPT_LIMIT_DC}
-  IN UINT32  CfgSystemConfiguration;              ///< SMU System Configuration
-                                                  ///< @BldCfgItem{BLDCFG_SYSTEM_CONFIGURATION}
-  IN PLATFORM_STAPM_CONFIGURATION CfgPlatStapmConfig; ///< Several configuration settings for the STAPM.
-  IN UINT8  CfgEDPv1_4VSMode;                     ///< @BldCfgItem{BLDCFG_EDP_V1_4_VS_MODE}
-  IN UINT8  CfgExtHDMIReDrvSlvAddr;               ///< @BldCfgItem{BLDCFG_EXT_HDMI_RE_DRIVE_SLAVE_ADDR}
-  IN UINT8  CfgExtHDMIReDrvRegNum;                ///< @BldCfgItem{BLDCFG_EXT_HDMI_RE_DRIVE_REG_NUM}
-  IN UINT64 CfgExtHDMIRegSetting;                 ///< @BldCfgItem{BLDCFG_EXT_HDMI_RE_DRIVE_REG_INFO}
-  IN UINT32 CfgThermCtlLimit;                     ///< @BldCfgItem{BLDCFG_THERMCTL_LIMIT}
-  IN UINT32 CfgCodecVerbTable;                    ///< @BldCfgItem{BLDCFG_CODEC_VERB_TABLE}
-  IN UINT32 CfgGnbAzSsid;                         ///< @BldCfgItem{BLDCFG_GNB_AZ_SSID}
-  IN UINT16  CfgCustomVddioVoltage;               ///< Custom VDDIO voltage
-                                                  ///< @BldCfgItem{BLDCFG_CUSTOM_VDDIO_VOLTAGE}
-  IN BOOLEAN CfgAcpPowerGating;                   ///< @BldCfgItem{BLDCFG_ACP_POWER_GATING}
-  IN BOOLEAN Reserved;                            ///< reserved...
-} BUILD_OPT_CFG;
-
-///  A structure containing platform specific operational characteristics. This
-///  structure is initially populated by the initializer with a copy of the same
-///  structure that was created at build time using the build configuration controls.
-typedef struct _PLATFORM_CONFIGURATION {
-  IN PERFORMANCE_PROFILE PlatformProfile;             ///< Several configuration settings for the processor.
-  IN UINT8               CoreLevelingMode;            ///< Indicates how to balance the number of cores per processor.
-                                                      ///< @BldCfgItem{BLDCFG_CORE_LEVELING_MODE}
-  IN PLATFORM_CSTATE_MODES  CStateMode;               ///< Specifies the method of C-State enablement - Disabled, or C6.
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_CSTATE_MODE}
-  IN UINT32              CStatePlatformData;          ///< This element specifies some pertinent data needed for the operation of the Cstate feature
-                                                      ///< If CStateMode is CStateModeC6, this item is reserved
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_CSTATE_OPDATA}
-  IN UINT16              CStateIoBaseAddress;         ///< This item specifies a free block of 8 consecutive bytes of I/O ports that
-                                                      ///< can be used to allow the CPU to enter Cstates.
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_CSTATE_IO_BASE_ADDRESS}
-  IN PLATFORM_CPB_MODES  CpbMode;                     ///< Specifies the method of core performance boost enablement - Disabled, or Auto.
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_CPB_MODE}
-  IN BOOLEAN             UserOptionDmi;               ///< When set to TRUE, the DMI data table is generated.
-  IN BOOLEAN             UserOptionPState;            ///< When set to TRUE, the PState data tables are generated.
-  IN BOOLEAN             UserOptionCrat;              ///< When set to TRUE, the CRAT data table is generated.
-  IN BOOLEAN             UserOptionCdit;              ///< When set to TRUE, the CDIT data table is generated.
-  IN BOOLEAN             UserOptionWhea;              ///< When set to TRUE, the WHEA data table is generated.
-  IN UINT32              PowerCeiling;                ///< P-State Ceiling Enabling Deck - Max power milli-watts.
-  IN BOOLEAN             ForcePstateIndependent;      ///< Deprecated in favor of PstatesPsdPolicy.
-                                                      ///< P-State _PSD is forced independent.
-                                                      ///< @BldCfgItem{BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT}
-  IN UINT32              PstatesPsdPolicy;            ///< PSD policy
-                                                      ///< @BldCfgItem{BLDCFG_ACPI_PSTATES_PSD_POLICY}
-  IN UINT32              CpuFrequencyLimit;           ///< @BldCfgItem{BLDCFG_CPU_FREQUENCY_LIMIT}
-  IN PLATFORM_CONNECTED_STANDBY_MODES CfgPlatformConnectedStandbyMode; ///< @BldCfgItem{BLDCFG_CPU_CONNECTED_STANDBY_MODE}
-  IN UINT32              NumberOfIoApics;             ///< Number of I/O APICs in the system
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_NUM_IO_APICS}
-  IN PLATFORM_VRM_CONFIGURATION VrmProperties[MaxVrmType]; ///< Several configuration settings for the voltage regulator modules.
-  IN BOOLEAN             ProcessorScopeInSb;          ///< ACPI Processor Object in \\_SB scope
-                                                      ///< @BldCfgItem{BLDCFG_PROCESSOR_SCOPE_IN_SB}
-  IN CHAR8               ProcessorScopeName0;         ///< OEM specific 1st character of processor scope name.
-                                                      ///< @BldCfgItem{BLDCFG_PROCESSOR_SCOPE_NAME0}
-  IN CHAR8               ProcessorScopeName1;         ///< OEM specific 2nd character of processor scope name.
-                                                      ///< @BldCfgItem{BLDCFG_PROCESSOR_SCOPE_NAME1}
-  IN UINT8               GnbHdAudio;                  ///< Control GFX HD Audio controller(Used for HDMI and DP display output),
-                                                      ///< essentially it enables function 1 of graphics device.
-                                                      ///< @li 0 = HD Audio disable
-                                                      ///< @li 1 = HD Audio enable
-                                                      ///< @BldCfgItem{BLDCFG_CFG_GNB_HD_AUDIO}
-  IN UINT8               AbmSupport;                  ///< Automatic adjust LVDS/eDP Back light level support.It is
-                                                      ///< characteristic specific to display panel which used by platform design.
-                                                      ///< @li 0 = ABM support disabled
-                                                      ///< @li 1 = ABM support enabled
-                                                      ///< @BldCfgItem{BLDCFG_CFG_ABM_SUPPORT}
-  IN UINT8               DynamicRefreshRate;          ///< Adjust refresh rate on LVDS/eDP.
-                                                      ///< @BldCfgItem{BLDCFG_CFG_DYNAMIC_REFRESH_RATE}
-  IN UINT16              LcdBackLightControl;         ///< The PWM frequency to LCD backlight control.
-                                                      ///< If equal to 0 backlight not controlled by iGPU
-                                                      ///< @BldCfgItem{BLDCFG_CFG_LCD_BACK_LIGHT_CONTROL}
-  IN UINT16              HtcTemperatureLimit;         ///< The Hardware Thermal Control temperature limit in tenths of degrees Celsius.
-                                                      ///< If equal to 0, use hardware defaults.
-                                                      ///< @BldCfgItem{BLDCFG_HTC_TEMPERATURE_LIMIT}
-  IN UINT16              LhtcTemperatureLimit;        ///< The Local Hardware Thermal Control temperature limit in tenths of degrees Celsius.
-                                                      ///< If equal to 0, use hardware defaults.
-                                                      ///< @BldCfgItem{BLDCFG_LHTC_TEMPERATURE_LIMIT}
-  IN DISPLAY_RESOLUTION  Resolution;                  ///< Display Resolution
-                                                      ///< @BldCfgItem{BLDCFG_RESOLUTION}
-  IN ACP_SIZE            AcpSize;                     ///< The size of ACP dram
-                                                      ///< ACP_Size[31:0]=Addr[47:16]
-                                                      ///< @BldCfgItem{BLDCFG_ACP_SIZE}
-  IN UINT32              BatteryBoostTune;            ///< @BldCfgItem{BLDCFG_BATTERY_BOOST_TUNE}
-  IN UINT32              PkgPwrLimitAC;               ///< Package Power Limit under AC
-                                                      ///< @BldCfgItem{BLDCFG_PPT_LIMIT_AC}
-  IN UINT32              PkgPwrLimitDC;               ///< Package Power Limit under DC
-                                                      ///< @BldCfgItem{BLDCFG_PPT_LIMIT_DC}
-  IN UINT32              SystemConfiguration;         ///< SMU System Configuration
-                                                      ///< @BldCfgItem{BLDCFG_SYSTEM_CONFIGURATION}
-  IN PLATFORM_STAPM_CONFIGURATION PlatStapmConfig; ///< Several configuration settings for the STAPM.
-  IN UINT32              ThermCtlLimit;               ///< @BldCfgItem{BLDCFG_THERMCTL_LIMIT}
-  IN UINT64              AzaliaCodecVerbTable;        ///< @BldCfgItem{BLDCFG_CODEC_VERB_TABLE}
-  IN UINT32              AzaliaSsid;                  ///< @BldCfgItem{BLDCFG_GNB_AZ_SSID}
-  IN UINT32              GnbAzI2sBusSelect;           ///< @BldCfgItem{BLDCFG_GNB_AZ_I2SBUS_SELECT}
-  IN UINT32              GnbAzI2sBusPinConfig;        ///< @BldCfgItem{BLDCFG_GNB_AZ_I2SBUS_PIN_CONFIG}
-  IN BOOLEAN             AcpPowerGating;              ///< @BldCfgItem{BLDCFG_ACP_POWER_GATING}
-} PLATFORM_CONFIGURATION;
-
-
-/**********************************************************************
- * Structures for: AmdInitLate
- **********************************************************************/
-#define PROC_VERSION_LENGTH  48
-#define MAX_DIMMS_PER_SOCKET 16
-#define PROC_MANU_LENGTH     29
-
-/*  Interface Parameter Structures  */
-/// DMI Type4 - Processor ID
-typedef struct {
-  OUT UINT32                    ProcIdLsd;              ///< Lower half of 64b ID
-  OUT UINT32                    ProcIdMsd;              ///< Upper half of 64b ID
-} TYPE4_PROC_ID;
-
-/// DMI Type 4 - Processor information
-typedef struct {
-  OUT UINT8                     T4ProcType;             ///< CPU Type
-  OUT UINT8                     T4ProcFamily;           ///< Family 1
-  OUT TYPE4_PROC_ID             T4ProcId;               ///< Id
-  OUT UINT8                     T4Voltage;              ///< Voltage
-  OUT UINT16                    T4ExternalClock;        ///< External clock
-  OUT UINT16                    T4MaxSpeed;             ///< Max speed
-  OUT UINT16                    T4CurrentSpeed;         ///< Current speed
-  OUT UINT8                     T4Status;               ///< Status
-  OUT UINT8                     T4ProcUpgrade;          ///< Up grade
-  OUT UINT8                     T4CoreCount;            ///< Core count
-  OUT UINT8                     T4CoreEnabled;          ///< Core Enable
-  OUT UINT8                     T4ThreadCount;          ///< Thread count
-  OUT UINT16                    T4ProcCharacteristics;  ///< Characteristics
-  OUT UINT16                    T4ProcFamily2;          ///< Family 2
-  OUT CHAR8                     T4ProcVersion[PROC_VERSION_LENGTH]; ///< Cpu version
-  OUT CHAR8                     T4ProcManufacturer[PROC_MANU_LENGTH]; ///< Manufacturer
-} TYPE4_DMI_INFO;
-
-/// DMI Type 7 - Cache information
-typedef struct _TYPE7_DMI_INFO {
-  OUT UINT16                    T7CacheCfg;             ///< Cache cfg
-  OUT UINT16                    T7MaxCacheSize;         ///< Max size
-  OUT UINT16                    T7InstallSize;          ///< Install size
-  OUT UINT16                    T7SupportedSramType;    ///< Supported Sram Type
-  OUT UINT16                    T7CurrentSramType;      ///< Current type
-  OUT UINT8                     T7CacheSpeed;           ///< Speed
-  OUT UINT8                     T7ErrorCorrectionType;  ///< ECC type
-  OUT UINT8                     T7SystemCacheType;      ///< Cache type
-  OUT UINT8                     T7Associativity;        ///< Associativity
-} TYPE7_DMI_INFO;
-
-/// DMI Type 16 offset 04h - Location
-typedef enum {
-  OtherLocation = 0x01,                                 ///< Assign 01 to Other
-  UnknownLocation,                                      ///< Assign 02 to Unknown
-  SystemboardOrMotherboard,                             ///< Assign 03 to systemboard or motherboard
-  IsaAddonCard,                                         ///< Assign 04 to ISA add-on card
-  EisaAddonCard,                                        ///< Assign 05 to EISA add-on card
-  PciAddonCard,                                         ///< Assign 06 to PCI add-on card
-  McaAddonCard,                                         ///< Assign 07 to MCA add-on card
-  PcmciaAddonCard,                                      ///< Assign 08 to PCMCIA add-on card
-  ProprietaryAddonCard,                                 ///< Assign 09 to proprietary add-on card
-  NuBus,                                                ///< Assign 0A to NuBus
-  Pc98C20AddonCard,                                     ///< Assign 0A0 to PC-98/C20 add-on card
-  Pc98C24AddonCard,                                     ///< Assign 0A1 to PC-98/C24 add-on card
-  Pc98EAddoncard,                                       ///< Assign 0A2 to PC-98/E add-on card
-  Pc98LocalBusAddonCard                                 ///< Assign 0A3 to PC-98/Local bus add-on card
-} DMI_T16_LOCATION;
-
-/// DMI Type 16 offset 05h - Memory Error Correction
-typedef enum {
-  OtherUse = 0x01,                                      ///< Assign 01 to Other
-  UnknownUse,                                           ///< Assign 02 to Unknown
-  SystemMemory,                                         ///< Assign 03 to system memory
-  VideoMemory,                                          ///< Assign 04 to video memory
-  FlashMemory,                                          ///< Assign 05 to flash memory
-  NonvolatileRam,                                       ///< Assign 06 to non-volatile RAM
-  CacheMemory                                           ///< Assign 07 to cache memory
-} DMI_T16_USE;
-
-/// DMI Type 16 offset 07h - Maximum Capacity
-typedef enum {
-  Dmi16OtherErrCorrection = 0x01,                       ///< Assign 01 to Other
-  Dmi16UnknownErrCorrection,                            ///< Assign 02 to Unknown
-  Dmi16NoneErrCorrection,                               ///< Assign 03 to None
-  Dmi16Parity,                                          ///< Assign 04 to parity
-  Dmi16SingleBitEcc,                                    ///< Assign 05 to Single-bit ECC
-  Dmi16MultiBitEcc,                                     ///< Assign 06 to Multi-bit ECC
-  Dmi16Crc                                              ///< Assign 07 to CRC
-} DMI_T16_ERROR_CORRECTION;
-
-/// DMI Type 16 - Physical Memory Array
-typedef struct {
-  OUT DMI_T16_LOCATION          Location;               ///< The physical location of the Memory Array,
-                                                        ///< whether on the system board or an add-in board.
-  OUT DMI_T16_USE               Use;                    ///< Identifies the function for which the array
-                                                        ///< is used.
-  OUT DMI_T16_ERROR_CORRECTION  MemoryErrorCorrection;  ///< The primary hardware error correction or
-                                                        ///< detection method supported by this memory array.
-  OUT UINT16                    NumberOfMemoryDevices;  ///< The number of slots or sockets available
-                                                        ///< for memory devices in this array.
-} TYPE16_DMI_INFO;
-
-/// DMI Type 17 offset 0Eh - Form Factor
-typedef enum {
-  OtherFormFactor = 0x01,                               ///< Assign 01 to Other
-  UnknowFormFactor,                                     ///< Assign 02 to Unknown
-  SimmFormFactor,                                       ///< Assign 03 to SIMM
-  SipFormFactor,                                        ///< Assign 04 to SIP
-  ChipFormFactor,                                       ///< Assign 05 to Chip
-  DipFormFactor,                                        ///< Assign 06 to DIP
-  ZipFormFactor,                                        ///< Assign 07 to ZIP
-  ProprietaryCardFormFactor,                            ///< Assign 08 to Proprietary Card
-  DimmFormFactorFormFactor,                             ///< Assign 09 to DIMM
-  TsopFormFactor,                                       ///< Assign 10 to TSOP
-  RowOfChipsFormFactor,                                 ///< Assign 11 to Row of chips
-  RimmFormFactor,                                       ///< Assign 12 to RIMM
-  SodimmFormFactor,                                     ///< Assign 13 to SODIMM
-  SrimmFormFactor,                                      ///< Assign 14 to SRIMM
-  FbDimmFormFactor                                      ///< Assign 15 to FB-DIMM
-} DMI_T17_FORM_FACTOR;
-
-/// DMI Type 17 offset 12h - Memory Type
-typedef enum {
-  OtherMemType = 0x01,                                  ///< Assign 01 to Other
-  UnknownMemType,                                       ///< Assign 02 to Unknown
-  DramMemType,                                          ///< Assign 03 to DRAM
-  EdramMemType,                                         ///< Assign 04 to EDRAM
-  VramMemType,                                          ///< Assign 05 to VRAM
-  SramMemType,                                          ///< Assign 06 to SRAM
-  RamMemType,                                           ///< Assign 07 to RAM
-  RomMemType,                                           ///< Assign 08 to ROM
-  FlashMemType,                                         ///< Assign 09 to Flash
-  EepromMemType,                                        ///< Assign 10 to EEPROM
-  FepromMemType,                                        ///< Assign 11 to FEPROM
-  EpromMemType,                                         ///< Assign 12 to EPROM
-  CdramMemType,                                         ///< Assign 13 to CDRAM
-  ThreeDramMemType,                                     ///< Assign 14 to 3DRAM
-  SdramMemType,                                         ///< Assign 15 to SDRAM
-  SgramMemType,                                         ///< Assign 16 to SGRAM
-  RdramMemType,                                         ///< Assign 17 to RDRAM
-  DdrMemType,                                           ///< Assign 18 to DDR
-  Ddr2MemType,                                          ///< Assign 19 to DDR2
-  Ddr2FbdimmMemType,                                    ///< Assign 20 to DDR2 FB-DIMM
-  Ddr3MemType = 0x18,                                   ///< Assign 24 to DDR3
-  Fbd2MemType                                           ///< Assign 25 to FBD2
-} DMI_T17_MEMORY_TYPE;
-
-/// DMI Type 17 offset 13h - Type Detail
-typedef struct {
-  OUT UINT16                    Reserved1:1;            ///< Reserved
-  OUT UINT16                    Other:1;                ///< Other
-  OUT UINT16                    Unknown:1;              ///< Unknown
-  OUT UINT16                    FastPaged:1;            ///< Fast-Paged
-  OUT UINT16                    StaticColumn:1;         ///< Static column
-  OUT UINT16                    PseudoStatic:1;         ///< Pseudo-static
-  OUT UINT16                    Rambus:1;               ///< RAMBUS
-  OUT UINT16                    Synchronous:1;          ///< Synchronous
-  OUT UINT16                    Cmos:1;                 ///< CMOS
-  OUT UINT16                    Edo:1;                  ///< EDO
-  OUT UINT16                    WindowDram:1;           ///< Window DRAM
-  OUT UINT16                    CacheDram:1;            ///< Cache Dram
-  OUT UINT16                    NonVolatile:1;          ///< Non-volatile
-  OUT UINT16                    Registered:1;           ///< Registered (Buffered)
-  OUT UINT16                    Unbuffered:1;           ///< Unbuffered (Unregistered)
-  OUT UINT16                    Reserved2:1;            ///< Reserved
-} DMI_T17_TYPE_DETAIL;
-
-/// DMI Type 17 - Memory Device
-typedef struct {
-  OUT UINT16                    Handle;                 ///< The temporary handle, or instance number, associated with the structure
-  OUT UINT16                    TotalWidth;             ///< Total Width, in bits, of this memory device, including any check or error-correction bits.
-  OUT UINT16                    DataWidth;              ///< Data Width, in bits, of this memory device.
-  OUT UINT16                    MemorySize;             ///< The size of the memory device.
-  OUT DMI_T17_FORM_FACTOR       FormFactor;             ///< The implementation form factor for this memory device.
-  OUT UINT8                     DeviceSet;              ///< Identifies when the Memory Device is one of a set of
-                                                        ///< Memory Devices that must be populated with all devices of
-                                                        ///< the same type and size, and the set to which this device belongs.
-  OUT CHAR8                     DeviceLocator[8];       ///< The string number of the string that identifies the physically labeled socket or board position where the memory device is located.
-  OUT CHAR8                     BankLocator[10];        ///< The string number of the string that identifies the physically labeled bank where the memory device is located.
-  OUT DMI_T17_MEMORY_TYPE       MemoryType;             ///< The type of memory used in this device.
-  OUT DMI_T17_TYPE_DETAIL       TypeDetail;             ///< Additional detail on the memory device type
-  OUT UINT16                    Speed;                  ///< Identifies the speed of the device, in megahertz (MHz).
-  OUT UINT64                    ManufacturerIdCode;     ///< Manufacturer ID code.
-  OUT CHAR8                     SerialNumber[9];        ///< Serial Number.
-  OUT CHAR8                     PartNumber[19];         ///< Part Number.
-  OUT UINT8                     Attributes;             ///< Bits 7-4: Reserved, Bits 3-0: rank.
-  OUT UINT32                    ExtSize;                ///< Extended Size.
-  OUT UINT16                    ConfigSpeed;            ///< Configured memory clock speed
-  OUT UINT16                    MinimumVoltage;         ///< Minimum operating voltage for this device, in millivolts
-  OUT UINT16                    MaximumVoltage;         ///< Maximum operating voltage for this device, in millivolts
-  OUT UINT16                    ConfiguredVoltage;      ///< Configured voltage for this device, in millivolts
-} TYPE17_DMI_INFO;
-
-/// Memory DMI Type 17 - for memory use
-typedef struct {
-  OUT UINT8                     Socket:3;               ///< Socket ID
-  OUT UINT8                     Channel:2;              ///< Channel ID
-  OUT UINT8                     Dimm:2;                 ///< DIMM ID
-  OUT UINT8                     DimmPresent:1;          ///< Dimm Present
-  OUT UINT16                    Handle;                 ///< The temporary handle, or instance number, associated with the structure
-  OUT UINT16                    TotalWidth;             ///< Total Width, in bits, of this memory device, including any check or error-correction bits.
-  OUT UINT16                    DataWidth;              ///< Data Width, in bits, of this memory device.
-  OUT UINT16                    MemorySize;             ///< The size of the memory device.
-  OUT DMI_T17_FORM_FACTOR       FormFactor;             ///< The implementation form factor for this memory device.
-  OUT UINT8                     DeviceLocator;          ///< The string number of the string that identifies the physically labeled socket or board position where the memory device is located.
-  OUT UINT8                     BankLocator;            ///< The string number of the string that identifies the physically labeled bank where the memory device is located.
-  OUT UINT16                    Speed;                  ///< Identifies the speed of the device, in megahertz (MHz).
-  OUT UINT64                    ManufacturerIdCode;     ///< Manufacturer ID code.
-  OUT UINT8                     SerialNumber[4];        ///< Serial Number.
-  OUT UINT8                     PartNumber[18];         ///< Part Number.
-  OUT UINT8                     Attributes;             ///< Bits 7-4: Reserved, Bits 3-0: rank.
-  OUT UINT32                    ExtSize;                ///< Extended Size.
-  OUT UINT16                    ConfigSpeed;            ///< Configured memory clock speed
-  OUT UINT16                    MinimumVoltage;         ///< Minimum operating voltage for this device, in millivolts
-  OUT UINT16                    MaximumVoltage;         ///< Maximum operating voltage for this device, in millivolts
-  OUT UINT16                    ConfiguredVoltage;      ///< Configured voltage for this device, in millivolts
-} MEM_DMI_PHYSICAL_DIMM_INFO;
-
-/// Memory DMI Type 20 - for memory use
-typedef struct {
-  OUT UINT8                     Socket:3;               ///< Socket ID
-  OUT UINT8                     Channel:2;              ///< Channel ID
-  OUT UINT8                     Dimm:2;                 ///< DIMM ID
-  OUT UINT8                     DimmPresent:1;          ///< Dimm Present
-  OUT UINT32                    StartingAddr;           ///< The physical address, in kilobytes, of a range
-                                                        ///< of memory mapped to the referenced Memory Device.
-  OUT UINT32                    EndingAddr;             ///< The handle, or instance number, associated with
-                                                        ///< the Memory Device structure to which this address
-                                                        ///< range is mapped.
-  OUT UINT16                    MemoryDeviceHandle;     ///< The handle, or instance number, associated with
-                                                        ///< the Memory Device structure to which this address
-                                                        ///< range is mapped.
-  OUT UINT64                    ExtStartingAddr;        ///< The physical address, in bytes, of a range of
-                                                        ///< memory mapped to the referenced Memory Device.
-  OUT UINT64                    ExtEndingAddr;          ///< The physical ending address, in bytes, of the last of
-                                                        ///< a range of addresses mapped to the referenced Memory Device.
-} MEM_DMI_LOGICAL_DIMM_INFO;
-
-/// DMI Type 19 - Memory Array Mapped Address
-typedef struct {
-  OUT UINT32                    StartingAddr;           ///< The physical address, in kilobytes,
-                                                        ///< of a range of memory mapped to the
-                                                        ///< specified physical memory array.
-  OUT UINT32                    EndingAddr;             ///< The physical ending address of the
-                                                        ///< last kilobyte of a range of addresses
-                                                        ///< mapped to the specified physical memory array.
-  OUT UINT16                    MemoryArrayHandle;      ///< The handle, or instance number, associated
-                                                        ///< with the physical memory array to which this
-                                                        ///< address range is mapped.
-  OUT UINT8                     PartitionWidth;         ///< Identifies the number of memory devices that
-                                                        ///< form a single row of memory for the address
-                                                        ///< partition defined by this structure.
-  OUT UINT64                    ExtStartingAddr;        ///< The physical address, in bytes, of a range of
-                                                        ///< memory mapped to the specified Physical Memory Array.
-  OUT UINT64                    ExtEndingAddr;          ///< The physical address, in bytes, of a range of
-                                                        ///< memory mapped to the specified Physical Memory Array.
-} TYPE19_DMI_INFO;
-
-///DMI Type 20 - Memory Device Mapped Address
-typedef struct {
-  OUT UINT32                    StartingAddr;           ///< The physical address, in kilobytes, of a range
-                                                        ///< of memory mapped to the referenced Memory Device.
-  OUT UINT32                    EndingAddr;             ///< The handle, or instance number, associated with
-                                                        ///< the Memory Device structure to which this address
-                                                        ///< range is mapped.
-  OUT UINT16                    MemoryDeviceHandle;     ///< The handle, or instance number, associated with
-                                                        ///< the Memory Device structure to which this address
-                                                        ///< range is mapped.
-  OUT UINT16                    MemoryArrayMappedAddressHandle; ///< The handle, or instance number, associated
-                                                        ///< with the Memory Array Mapped Address structure to
-                                                        ///< which this device address range is mapped.
-  OUT UINT8                     PartitionRowPosition;   ///< Identifies the position of the referenced Memory
-                                                        ///< Device in a row of the address partition.
-  OUT UINT8                     InterleavePosition;     ///< The position of the referenced Memory Device in
-                                                        ///< an interleave.
-  OUT UINT8                     InterleavedDataDepth;   ///< The maximum number of consecutive rows from the
-                                                        ///< referenced Memory Device that are accessed in a
-                                                        ///< single interleaved transfer.
-  OUT UINT64                    ExtStartingAddr;        ///< The physical address, in bytes, of a range of
-                                                        ///< memory mapped to the referenced Memory Device.
-  OUT UINT64                    ExtEndingAddr;          ///< The physical ending address, in bytes, of the last of
-                                                        ///< a range of addresses mapped to the referenced Memory Device.
-} TYPE20_DMI_INFO;
-
-/// Collection of pointers to the DMI records
-typedef struct {
-  OUT TYPE4_DMI_INFO            T4[MAX_SOCKETS_SUPPORTED];    ///< Type 4 struc
-  OUT TYPE7_DMI_INFO            T7L1[MAX_SOCKETS_SUPPORTED];  ///< Type 7 struc 1
-  OUT TYPE7_DMI_INFO            T7L2[MAX_SOCKETS_SUPPORTED];  ///< Type 7 struc 2
-  OUT TYPE7_DMI_INFO            T7L3[MAX_SOCKETS_SUPPORTED];  ///< Type 7 struc 3
-  OUT TYPE16_DMI_INFO           T16;                          ///< Type 16 struc
-  OUT TYPE17_DMI_INFO           T17[MAX_SOCKETS_SUPPORTED][MAX_CHANNELS_PER_SOCKET][MAX_DIMMS_PER_CHANNEL]; ///< Type 17 struc
-  OUT TYPE19_DMI_INFO           T19;                          ///< Type 19 struc
-  OUT TYPE20_DMI_INFO           T20[MAX_SOCKETS_SUPPORTED][MAX_CHANNELS_PER_SOCKET][MAX_DIMMS_PER_CHANNEL]; ///< Type 20 struc
-} DMI_INFO;
-
-/**********************************************************************
- * Interface call:  AllocateExecutionCache
- **********************************************************************/
-#define MAX_CACHE_REGIONS    3
-
-/// AllocateExecutionCache sub param structure for cached memory region
-typedef struct {
-  IN OUT   UINT32               ExeCacheStartAddr;      ///< Start address
-  IN OUT   UINT32               ExeCacheSize;           ///< Size
-} EXECUTION_CACHE_REGION;
-
-/**********************************************************************
- * Interface call:  AmdGetAvailableExeCacheSize
- **********************************************************************/
-/// Get available Cache remain
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS    StdHeader;              ///< Standard configuration header
-     OUT   UINT32               AvailableExeCacheSize;  ///< Remain size
-} AMD_GET_EXE_SIZE_PARAMS;
-
-AGESA_STATUS
-AmdGetAvailableExeCacheSize (
-  IN OUT   AMD_GET_EXE_SIZE_PARAMS *AmdGetExeSizeParams
-  );
-
-/// Selection type for core leveling
-typedef enum {
-  CORE_LEVEL_LOWEST,            ///< Level to lowest common denominator
-  CORE_LEVEL_TWO,               ///< Level to 2 cores
-  CORE_LEVEL_POWER_OF_TWO,      ///< Level to 1,2,4 or 8
-  CORE_LEVEL_NONE,              ///< Do no leveling
-  CORE_LEVEL_COMPUTE_UNIT,      ///< Level cores to one core per compute unit
-  CORE_LEVEL_COMPUTE_UNIT_TWO,  ///< Level cores to two cores per compute unit
-  CORE_LEVEL_COMPUTE_UNIT_THREE,  ///< Level cores to three cores per compute unit
-  CORE_LEVEL_ONE,               ///< Level to 1 core
-  CORE_LEVEL_THREE,             ///< Level to 3 cores
-  CORE_LEVEL_FOUR,              ///< Level to 4 cores
-  CORE_LEVEL_FIVE,              ///< Level to 5 cores
-  CORE_LEVEL_SIX,               ///< Level to 6 cores
-  CORE_LEVEL_SEVEN,             ///< Level to 7 cores
-  CORE_LEVEL_EIGHT,             ///< Level to 8 cores
-  CORE_LEVEL_NINE,              ///< Level to 9 cores
-  CORE_LEVEL_TEN,               ///< Level to 10 cores
-  CORE_LEVEL_ELEVEN,            ///< Level to 11 cores
-  CORE_LEVEL_TWELVE,            ///< Level to 12 cores
-  CORE_LEVEL_THIRTEEN,          ///< Level to 13 cores
-  CORE_LEVEL_FOURTEEN,          ///< Level to 14 cores
-  CORE_LEVEL_FIFTEEN,           ///< Level to 15 cores
-  CoreLevelModeMax              ///< Used for bounds checking
-} CORE_LEVELING_TYPE;
-
-
-
-
-
-/************************************************************************
- *
- *  AGESA Basic Level interface structure definition and function prototypes
- *
- ***********************************************************************/
-
-/**********************************************************************
- * Interface call:  AmdCreateStruct
- **********************************************************************/
-AGESA_STATUS
-AmdCreateStruct (
-  IN OUT   AMD_INTERFACE_PARAMS *InterfaceParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdReleaseStruct
- **********************************************************************/
-AGESA_STATUS
-AmdReleaseStruct (
-  IN OUT   AMD_INTERFACE_PARAMS *InterfaceParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdInitReset
- **********************************************************************/
-/// AmdInitReset param structure
-typedef struct {
-  IN       AMD_CONFIG_PARAMS         StdHeader;        ///< Standard configuration header
-  IN       EXECUTION_CACHE_REGION    CacheRegion[3];   ///< The cached memory region
-  IN       FCH_RESET_INTERFACE       FchInterface;     ///< Interface for FCH configuration
-} AMD_RESET_PARAMS;
-
-AGESA_STATUS
-AmdInitReset (
-  IN OUT   AMD_RESET_PARAMS     *ResetParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitEarly
- **********************************************************************/
-/// InitEarly param structure
-///
-/// Provide defaults or customizations to each service performed in AmdInitEarly.
-///
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;        ///< Standard configuration header
-  IN       EXECUTION_CACHE_REGION CacheRegion[3];   ///< Execution Map Interface
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-  IN       GNB_CONFIGURATION      GnbConfig;        ///< GNB configuration
-} AMD_EARLY_PARAMS;
-
-AGESA_STATUS
-AmdInitEarly (
-  IN OUT   AMD_EARLY_PARAMS     *EarlyParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitPost
- **********************************************************************/
-/// AmdInitPost param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;        ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-  IN       MEM_PARAMETER_STRUCT   MemConfig;        ///< Memory post param
-  IN       GNB_POST_CONFIGURATION GnbPostConfig;    ///< GNB post param
-} AMD_POST_PARAMS;
-
-AGESA_STATUS
-AmdInitPost (
-  IN OUT   AMD_POST_PARAMS      *PostParams         ///< Amd Cpu init param
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitEnv
- **********************************************************************/
-/// AmdInitEnv param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;            ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;       ///< platform operational characteristics.
-  IN       GNB_ENV_CONFIGURATION  GnbEnvConfiguration;  ///< GNB configuration
-  IN       FCH_INTERFACE          FchInterface;         ///< FCH configuration
-} AMD_ENV_PARAMS;
-
-AGESA_STATUS
-AmdInitEnv (
-  IN OUT   AMD_ENV_PARAMS       *EnvParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitMid
- **********************************************************************/
-/// AmdInitMid param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;        ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-  IN       GNB_MID_CONFIGURATION  GnbMidConfiguration;  ///< GNB configuration
-  IN       FCH_INTERFACE          FchInterface;     ///< FCH configuration
-} AMD_MID_PARAMS;
-
-AGESA_STATUS
-AmdInitMid (
-  IN OUT   AMD_MID_PARAMS       *MidParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitLate
- **********************************************************************/
-/// AmdInitLate param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;              ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;         ///< platform operational characteristics.
-  IN       IOMMU_EXCLUSION_RANGE_DESCRIPTOR  *IvrsExclusionRangeList;   ///< Pointer to array of exclusion ranges
-     OUT   DMI_INFO               *DmiTable;              ///< DMI Interface
-     OUT   VOID                   *AcpiPState;            ///< Acpi Pstate SSDT Table
-     OUT   VOID                   *AcpiWheaMce;           ///< WHEA MCE Table
-     OUT   VOID                   *AcpiWheaCmc;           ///< WHEA CMC Table
-     OUT   VOID                   *AcpiAlib;              ///< ACPI SSDT table with ALIB implementation
-     OUT   VOID                   *AcpiIvrs;              ///< IOMMU ACPI IVRS(I/O Virtualization Reporting Structure) table
-     OUT   VOID                   *AcpiCrat;              ///< Component Resource Affinity Table table
-     OUT   VOID                   *AcpiCdit;              ///< Component Locality Distance Information table
-  IN       GNB_LATE_CONFIGURATION GnbLateConfiguration;   ///< GNB configuration
-} AMD_LATE_PARAMS;
-
-AGESA_STATUS
-AmdInitLate (
-  IN OUT   AMD_LATE_PARAMS      *LateParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdInitRecovery
- **********************************************************************/
-/// CPU Recovery Parameters
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS StdHeader;             ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-} AMD_CPU_RECOVERY_PARAMS;
-
-/// AmdInitRecovery param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS        StdHeader;            ///< Standard configuration header
-  IN       MEM_PARAMETER_STRUCT     MemConfig;            ///< Memory post param
-  IN       EXECUTION_CACHE_REGION   CacheRegion[3];       ///< The cached memory region. And the max cache region is 3
-  IN       AMD_CPU_RECOVERY_PARAMS  CpuRecoveryParams;    ///< Params for CPU related recovery init.
-} AMD_RECOVERY_PARAMS;
-
-AGESA_STATUS
-AmdInitRecovery (
-  IN OUT   AMD_RECOVERY_PARAMS    *RecoveryParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdInitResume
- **********************************************************************/
-/// AmdInitResume param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;      ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig; ///< Platform operational characteristics
-  IN       S3_DATA_BLOCK          S3DataBlock;    ///< Save state data
-} AMD_RESUME_PARAMS;
-
-AGESA_STATUS
-AmdInitResume (
-  IN       AMD_RESUME_PARAMS    *ResumeParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdS3LateRestore
- **********************************************************************/
-/// AmdS3LateRestore param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS    StdHeader;          ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< Platform operational characteristics.
-  IN       S3_DATA_BLOCK          S3DataBlock;      ///< Save state data
-} AMD_S3LATE_PARAMS;
-
-AGESA_STATUS
-AmdS3LateRestore (
-  IN OUT   AMD_S3LATE_PARAMS    *S3LateParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdS3FinalRestore
- **********************************************************************/
-/// AmdS3FinalRestore param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS    StdHeader;          ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< Platform operational characteristics.
-  IN       S3_DATA_BLOCK          S3DataBlock;      ///< Save state data
-} AMD_S3FINAL_PARAMS;
-
-AGESA_STATUS
-AmdS3FinalRestore (
-  IN OUT   AMD_S3FINAL_PARAMS    *S3FinalParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdInitRtb
- **********************************************************************/
-/// AmdInitRtb param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS    StdHeader;          ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-     OUT   S3_DATA_BLOCK          S3DataBlock;      ///< Save state data
-  IN       FCH_INTERFACE          FchInterface;     ///< FCH configuration
-} AMD_RTB_PARAMS;
-
-AGESA_STATUS
-AmdInitRtb (
-  IN OUT   AMD_RTB_PARAMS    *AmdInitRtbParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdLateRunApTask
- **********************************************************************/
-/**
- * Entry point for AP tasking.
- */
-AGESA_STATUS
-AmdLateRunApTask (
-  IN       AP_EXE_PARAMS  *AmdApExeParams
-);
-
-//
-// General Services API
-//
-
-/**********************************************************************
- * Interface service call:  AmdGetApicId
- **********************************************************************/
-/// Request the APIC ID of a particular core.
-
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;        ///< Standard configuration header
-  IN       UINT8             Socket;           ///< The Core's Socket.
-  IN       UINT8             Core;             ///< The Core id.
-     OUT   BOOLEAN           IsPresent;        ///< The Core is present, and  ApicAddress is valid.
-     OUT   UINT8             ApicAddress;      ///< The Core's APIC ID.
-} AMD_APIC_PARAMS;
-
-/**
- * Get a specified Core's APIC ID.
- */
-AGESA_STATUS
-AmdGetApicId (
-  IN OUT AMD_APIC_PARAMS *AmdParamApic
-);
-
-/**********************************************************************
- * Interface service call:  AmdGetPciAddress
- **********************************************************************/
-/// Request the PCI Address of a Processor Module (that is, its Northbridge)
-
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;        ///< Standard configuration header
-  IN       UINT8             Socket;           ///< The Processor's socket
-  IN       UINT8             Module;           ///< The Module in that Processor
-     OUT   BOOLEAN           IsPresent;        ///< The Core is present, and  PciAddress is valid.
-     OUT   PCI_ADDR          PciAddress;       ///< The Processor's PCI Config Space address (Function 0, Register 0)
-} AMD_GET_PCI_PARAMS;
-
-/**
- * Get Processor Module's PCI Config Space address.
- */
-AGESA_STATUS
-AmdGetPciAddress (
-  IN OUT   AMD_GET_PCI_PARAMS *AmdParamGetPci
-);
-
-/**********************************************************************
- * Interface service call:  AmdIdentifyCore
- **********************************************************************/
-/// Request the identity (Socket, Module, Core) of the current Processor Core
-
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;         ///< Standard configuration header
-     OUT   UINT8             Socket;            ///< The current Core's Socket
-     OUT   UINT8             Module;            ///< The current Core's Processor Module
-     OUT   UINT8             Core;              ///< The current Core's core id.
-} AMD_IDENTIFY_PARAMS;
-
-/**
- * "Who am I" for the current running core.
- */
-AGESA_STATUS
-AmdIdentifyCore (
-  IN OUT  AMD_IDENTIFY_PARAMS *AmdParamIdentify
-);
-
-/**********************************************************************
- * Interface service call:  AmdReadEventLog
- **********************************************************************/
-/// An Event Log Entry.
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;         ///< Standard configuration header
-     OUT   UINT32            EventClass;        ///< The severity of this event, matches AGESA_STATUS.
-     OUT   UINT32            EventInfo;         ///< The unique event identifier, zero means "no event".
-     OUT   UINT32            DataParam1;        ///< Data specific to the Event.
-     OUT   UINT32            DataParam2;        ///< Data specific to the Event.
-     OUT   UINT32            DataParam3;        ///< Data specific to the Event.
-     OUT   UINT32            DataParam4;        ///< Data specific to the Event.
-} EVENT_PARAMS;
-
-/**
- * Read an Event from the Event Log.
- */
-AGESA_STATUS
-AmdReadEventLog (
-  IN       EVENT_PARAMS *Event
-);
-
-/**********************************************************************
- * Interface service call:  AmdIdentifyDimm
- **********************************************************************/
-/// Request the identity of dimm from system address
-
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS StdHeader;            ///< Standard configuration header
-  IN       UINT64            MemoryAddress;        ///< System Address that needs to be translated to dimm identification.
-  OUT      UINT8             SocketId;             ///< The socket on which the targeted address locates.
-  OUT      UINT8             MemChannelId;         ///< The channel on which the targeted address locates.
-  OUT      UINT8             DimmId;               ///< The dimm on which the targeted address locates.
-  OUT      UINT8             ChipSelect;           ///< The chip select on which the targeted address locates.
-  OUT      UINT8             Bank;                 ///< The Bank for which the error address resides
-  OUT      UINT32            Row;                  ///< The Row for which the error address resides
-  OUT      UINT16            Column;               ///< The Column for which the error address resides
-} AMD_IDENTIFY_DIMM;
-
-/**
- * Get the dimm identification for the address.
- */
-AGESA_STATUS
-AmdIdentifyDimm (
-  IN OUT   AMD_IDENTIFY_DIMM *AmdDimmIdentify
-);
-
-AGESA_STATUS
-AmdIdsRunApTaskLate (
-  IN       AP_EXE_PARAMS  *AmdApExeParams
-  );
-
-/// Request the 2D Data Eye Training Data
-#define RD_DATAEYE  0
-#define WR_DATAEYE  1
-
-/**********************************************************************
- * Interface service call:  AmdGet2DDataEye
- **********************************************************************/
-/// Request the training data eye on Socket, Channel, Dimm.
-
-typedef struct _AMD_GET_DATAEYE {
-  IN OUT AMD_CONFIG_PARAMS StdHeader;            ///< Standard configuration header
-  IN OUT AMD_POST_PARAMS *PostParamsPtr;         ///< Pointer to AMD_POST_PARAMS
-  IN  UINT8 SocketId;                            ///< The socket number to get the 2D data eye
-  IN  UINT8 MemChannelId;                        ///< The channel number to get the 2D data eye
-  IN  UINT8 DimmId;                              ///< The dimm number to get the 2D data eye
-  IN  UINT8 DataEyeType;                         ///< Get the 2D data eye on read or write training
-  OUT UINT8* DataEyeBuffer;                      ///< The buffer to stores the 2D data eye
-} AMD_GET_DATAEYE;
-
-AGESA_STATUS
-AmdGet2DDataEye (
-  IN OUT   AMD_GET_DATAEYE *AmdGetDataEye
-  );
-
-#define AGESA_IDS_DFT_VAL   0xFFFF                  ///<  Default value of every uninitlized NV item, the action for it will be ignored
-#define AGESA_IDS_NV_END    0xFFFF                  ///< Flag specify end of option structure
-/// WARNING: Don't change the comment below, it used as signature for script
-/// AGESA IDS NV ID Definitions
-typedef enum {
-  AGESA_IDS_EXT_ID_START                   = 0x0000,///< 0x0000                                                             specify the start of external NV id
-
-  AGESA_IDS_NV_UCODE,                               ///< 0x0001                                                            Enable or disable microcode patching
-
-  AGESA_IDS_NV_TARGET_PSTATE,                       ///< 0x0002                                                        Set the P-state required to be activated
-  AGESA_IDS_NV_POSTPSTATE,                          ///< 0x0003                                           Set the P-state required to be activated through POST
-
-  AGESA_IDS_NV_BANK_INTERLEAVE,                     ///< 0x0004                                                               Enable or disable Bank Interleave
-  AGESA_IDS_NV_CHANNEL_INTERLEAVE,                  ///< 0x0005                                                            Enable or disable Channel Interleave
-  AGESA_IDS_NV_NODE_INTERLEAVE,                     ///< 0x0006                                                               Enable or disable Node Interleave
-  AGESA_IDS_NV_MEMHOLE,                             ///< 0x0007                                                                  Enables or disable memory hole
-
-  AGESA_IDS_NV_SCRUB_REDIRECTION,                   ///< 0x0008                                           Enable or disable a write to dram with corrected data
-  AGESA_IDS_NV_DRAM_SCRUB,                          ///< 0x0009                                                   Set the rate of background scrubbing for DRAM
-  AGESA_IDS_NV_DCACHE_SCRUB,                        ///< 0x000A                                            Set the rate of background scrubbing for the DCache.
-  AGESA_IDS_NV_L2_SCRUB,                            ///< 0x000B                                           Set the rate of background scrubbing for the L2 cache
-  AGESA_IDS_NV_L3_SCRUB,                            ///< 0x000C                                           Set the rate of background scrubbing for the L3 cache
-  AGESA_IDS_NV_ICACHE_SCRUB,                        ///< 0x000D                                             Set the rate of background scrubbing for the Icache
-  AGESA_IDS_NV_SYNC_ON_ECC_ERROR,                   ///< 0x000E                                    Enable or disable the sync flood on un-correctable ECC error
-  AGESA_IDS_NV_ECC_SYMBOL_SIZE,                     ///< 0x000F                                                                             Set ECC symbol size
-
-  AGESA_IDS_NV_ALL_MEMCLKS,                         ///< 0x0010                                                      Enable or disable all memory clocks enable
-  AGESA_IDS_NV_DCT_GANGING_MODE,                    ///< 0x0011                                                                             Set the Ganged mode
-  AGESA_IDS_NV_DRAM_BURST_LENGTH32,                 ///< 0x0012                                                                    Set the DRAM Burst Length 32
-  AGESA_IDS_NV_MEMORY_POWER_DOWN,                   ///< 0x0013                                                        Enable or disable Memory power down mode
-  AGESA_IDS_NV_MEMORY_POWER_DOWN_MODE,              ///< 0x0014                                                                  Set the Memory power down mode
-  AGESA_IDS_NV_DLL_SHUT_DOWN,                       ///< 0x0015                                                                   Enable or disable DLLShutdown
-  AGESA_IDS_NV_ONLINE_SPARE,                        ///< 0x0016      Enable or disable the Dram controller to designate a DIMM bank as a spare for logical swap
-
-  AGESA_IDS_NV_HDTOUT,                              ///< 0x0017                                                                Enable or disable HDTOUT feature
-
-  AGESA_IDS_NV_GNBHDAUDIOEN,                        ///< 0x0018                                                                  Enable or disable GNB HD Audio
-
-  AGESA_IDS_NV_CPB_EN,                              ///< 0x0019                                                                          Core Performance Boost
-
-  AGESA_IDS_NV_HTC_EN,                              ///< 0x001A                                                                                      HTC Enable
-  AGESA_IDS_NV_HTC_OVERRIDE,                        ///< 0x001B                                                                                    HTC Override
-  AGESA_IDS_NV_HTC_PSTATE_LIMIT,                    ///< 0x001C                                                                        HTC P-state limit select
-  AGESA_IDS_NV_HTC_TEMP_HYS,                        ///< 0x001D                                                                      HTC Temperature Hysteresis
-  AGESA_IDS_NV_HTC_ACT_TEMP,                        ///< 0x001E                                                                             HTC Activation Temp
-
-  AGESA_IDS_NV_DRAMCON,                             ///< 0x001F                                                  Specify the mode for controller initialization
-  AGESA_IDS_NV_ALL_CKE,                             ///< 0x0020                                                                       Enable or disable all CKE
-  AGESA_IDS_NV_ALL_CS,                              ///< 0x0021                                                                        Enable or disable all CS
-  AGESA_IDS_NV_MSR_DE_CFG_BIT16,                    ///< 0x0022                                               Workaround GCC/C000005 issue for XV Core on CZ A0
-  AGESA_IDS_EXT_ID_END,                             ///< 0x0023                                                               specify the end of external NV ID
-} IDS_EX_NV_ID;
-
-
-#define IDS_NUM_EXT_NV_ITEM (AGESA_IDS_EXT_ID_END - AGESA_IDS_EXT_ID_START + 1)
-
-
-#endif // _AGESA_H_

pi/amd/00660F01/AMD.h

diff --git a/pi/amd/00660F01/AMD.h b/pi/amd/00660F01/AMD.h
deleted file mode 100644
index 16e51f1..0000000
--- a/pi/amd/00660F01/AMD.h
+++ /dev/null
@@ -1,476 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Agesa structures and definitions
- *
- * Contains AMD AGESA core interface
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Include
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-
-#ifndef _AMD_H_
-#define _AMD_H_
-
-#define Int16FromChar(a,b) (UINT16)((a) << 0 | (b) << 8)
-#define Int32FromChar(a,b,c,d) (UINT32)((a) << 0 | (b) << 8 | (c) << 16 | (d) << 24)
-#define Int64FromChar(a,b,c,d,e,f,g,h) ((UINT64)(Int32FromChar(a,b,c,d)<<32) | (UINT64)Int32FromChar(e,f,g,h))
-
-#define AGESA_REVISION  "Arch2008"
-#define AGESA_ID        {'A', 'G', 'E', 'S', 'A', 0x00, 0x00, 0x00}
-
-//
-//
-// AGESA Types and Definitions
-//
-//
-#define LAST_ENTRY          0xFFFFFFFFul
-#define IMAGE_SIGNATURE     Int32FromChar ('$', 'A', 'M', 'D')
-#define MODULE_SIGNATURE    Int32FromChar ('$', 'M', 'O', 'D')
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-/// The return status for all AGESA public services.
-///
-/// Services return the most severe status of any logged event.  Status other than SUCCESS, UNSUPPORTED, and BOUNDS_CHK
-/// will have log entries with more detail.
-///
-typedef enum {
-  AGESA_SUCCESS = 0,             ///< The service completed normally. Info may be logged.
-  AGESA_UNSUPPORTED,             ///< The dispatcher or create struct had an unimplemented function requested.
-                                 ///<  Not logged.
-  AGESA_BOUNDS_CHK,              ///< A dynamic parameter was out of range and the service was not provided.
-                                 ///< Example, memory address not installed, heap buffer handle not found.
-                                 ///< Not Logged.
-  // AGESA_STATUS of greater severity (the ones below this line), always have a log entry available.
-  AGESA_ALERT,                   ///< An observed condition, but no loss of function.  See Log.
-  AGESA_WARNING,                 ///< Possible or minor loss of function.  See Log.
-  AGESA_ERROR,                   ///< Significant loss of function, boot may be possible.  See Log.
-  AGESA_CRITICAL,                ///< Continue boot only to notify user.  See Log.
-  AGESA_FATAL,                   ///< Halt booting.  See Log, however Fatal errors pertaining to heap problems
-                                 ///< may not be able to reliably produce log events.
-  AgesaStatusMax                 ///< Not a status, for limit checking.
-} AGESA_STATUS;
-
-/// For checking whether a status is at or above the mandatory log level.
-#define AGESA_STATUS_LOG_LEVEL AGESA_ALERT
-
-/**
- * Callout method to the host environment.
- *
- * Callout using a dispatch with appropriate thunk layer, which is determined by the host environment.
- *
- * @param[in]        Function      The specific callout function being invoked.
- * @param[in]        FcnData       Function specific data item.
- * @param[in,out]    ConfigPtr     Reference to Callout params.
- */
-typedef AGESA_STATUS (*CALLOUT_ENTRY) (
-  IN       UINT32  Function,
-  IN       UINTN   FcnData,
-  IN OUT   VOID    *ConfigPtr
-  );
-
-typedef AGESA_STATUS (*IMAGE_ENTRY) (VOID *ConfigPtr);
-typedef AGESA_STATUS (*MODULE_ENTRY) (VOID *ConfigPtr);
-
-///This allocation type is used by the AmdCreateStruct entry point
-typedef enum {
-  PreMemHeap = 0,                                           ///< Create heap in cache.
-  PostMemDram,                                              ///< Create heap in memory.
-  ByHost                                                    ///< Create heap by Host.
-} ALLOCATION_METHOD;
-
-/// These width descriptors are used by the library function, and others, to specify the data size
-typedef enum ACCESS_WIDTH {
-  AccessWidthNone = 0,                                      ///< dummy access width
-  AccessWidth8 = 1,                                         ///< Access width is 8 bits.
-  AccessWidth16,                                            ///< Access width is 16 bits.
-  AccessWidth32,                                            ///< Access width is 32 bits.
-  AccessWidth64,                                            ///< Access width is 64 bits.
-
-  AccessS3SaveWidth8 = 0x81,                                ///< Save 8 bits data.
-  AccessS3SaveWidth16,                                      ///< Save 16 bits data.
-  AccessS3SaveWidth32,                                      ///< Save 32 bits data.
-  AccessS3SaveWidth64,                                      ///< Save 64 bits data.
-} ACCESS_WIDTH;
-
-/// AGESA struct name
-typedef enum {
-  // AGESA BASIC FUNCTIONS
-  AMD_INIT_RECOVERY          = 0x00021000,                           ///< AmdInitRecovery entry point handle

-  AMD_CREATE_STRUCT          = 0x00022000,                                        ///< AmdCreateStruct handle

-  AMD_INIT_EARLY             = 0x00023000,                                           ///< AmdInitEarly entry point handle

-  AMD_INIT_ENV               = 0x00024000,                                             ///< AmdInitEnv entry point handle

-  AMD_INIT_LATE              = 0x00025000,                                            ///< AmdInitLate entry point handle

-  AMD_INIT_MID               = 0x00026000,                                             ///< AmdInitMid entry point handle

-  AMD_INIT_POST              = 0x00027000,                                            ///< AmdInitPost entry point handle

-  AMD_INIT_RESET             = 0x00028000,                                           ///< AmdInitReset entry point handle

-  AMD_INIT_RESUME            = 0x00029000,                                          ///< AmdInitResume entry point handle

-  AMD_RELEASE_STRUCT         = 0x0002A000,                                       ///< AmdReleaseStruct handle

-  AMD_S3LATE_RESTORE         = 0x0002B000,                                       ///< AmdS3LateRestore entry point handle

-  AMD_GET_APIC_ID            = 0x0002C000,                                          ///< AmdGetApicId entry point handle

-  AMD_GET_PCI_ADDRESS        = 0x0002D000,                               ///< AmdGetPciAddress entry point handle

-  AMD_IDENTIFY_CORE          = 0x0002E000,                                        ///< AmdIdentifyCore general service handle

-  AMD_READ_EVENT_LOG         = 0x0002F000,                                       ///< AmdReadEventLog general service handle

-  AMD_GET_EXECACHE_SIZE      = 0x00030000,                                    ///< AmdGetAvailableExeCacheSize general service handle

-  AMD_LATE_RUN_AP_TASK       = 0x00031000,                                     ///< AmdLateRunApTask entry point handle

-  AMD_IDENTIFY_DIMMS         = 0x00032000,                                       ///< AmdIdentifyDimm general service handle

-  AMD_GET_2D_DATA_EYE        = 0x00033000,                                      ///< AmdGet2DDataEye general service handle

-  AMD_S3FINAL_RESTORE        = 0x00034000,                                      ///< AmdS3FinalRestore entry point handle

-  AMD_INIT_RTB               = 0x00035000,                                              ///< AmdInitRtb entry point handle

-	  // Add
-  AMD_HEAP_ALLOCATE_BUFFER   = 0x00038000,
-  AMD_HEAP_DEALLOCATE_BUFFER = 0x00039000,
-  FCH_INIT_RESET             = 0x00040000,
-  FCH_INIT_ENV               = 0x00041000,
-  FCH_INIT_MID               = 0x00042000,
-  FCH_INIT_LATE              = 0x00043000,
-  FCH_INIT_S3_EARLY_RESTORE  = 0x00044000,
-  FCH_INIT_S3_LATE_RESTORE   = 0x00045000,
-  AMD_SET_VALUE              = 0x00081000,
-  AMD_GET_VALUE              = 0x00082000
-} AGESA_STRUCT_NAME;
-
-  /*  ResetType constant values */
-#define WARM_RESET_WHENEVER 1
-#define COLD_RESET_WHENEVER 2
-#define WARM_RESET_IMMEDIATELY 3
-#define COLD_RESET_IMMEDIATELY 4
-
-
-// AGESA Structures
-
-/// The standard header for all AGESA services.
-/// For internal AGESA naming conventions, see @ref amdconfigparamname .
-typedef struct {
-  IN       UINT32          ImageBasePtr;     ///< The AGESA Image base address.
-  IN       UINT32          Func;             ///< The service desired
-  IN       UINT32          AltImageBasePtr;  ///< Alternate Image location
-  IN       CALLOUT_ENTRY   CalloutPtr;       ///< For Callout from AGESA
-  IN       UINT8           HeapStatus;       ///< For heap status from boot time slide.
-  IN       UINT64          HeapBasePtr;      ///< Location of the heap
-  IN OUT   UINT8           Reserved[7];      ///< This space is reserved for future use.
-} AMD_CONFIG_PARAMS;
-
-
-/// Create Struct Interface.
-typedef struct {
-  IN       AMD_CONFIG_PARAMS   StdHeader;          ///< Standard configuration header
-  IN       AGESA_STRUCT_NAME   AgesaFunctionName;  ///< The service to init
-  IN       ALLOCATION_METHOD   AllocationMethod;   ///< How to handle buffer allocation
-  IN OUT   UINT32              NewStructSize;      ///< The size of the allocated data, in for ByHost, else out only.
-  IN OUT   VOID                *NewStructPtr;      ///< The struct for the service.
-                                                   ///< The struct to init for ByHost allocation,
-                                                   ///< the initialized struct on return.
-} AMD_INTERFACE_PARAMS;
-
-#define FUNC_0    0   // bit-placed for PCI address creation
-#define FUNC_1    1
-#define FUNC_2    2
-#define FUNC_3    3
-#define FUNC_4    4
-#define FUNC_5    5
-#define FUNC_6    6
-#define FUNC_7    7
-
-/// AGESA Binary module header structure
-typedef struct {
-  IN  UINT32  Signature;                          ///< Binary Signature
-  IN  CHAR8   CreatorID[8];                       ///< 8 characters ID
-  IN  CHAR8   Version[12];                        ///< 12 characters version
-  IN  UINT32  ModuleInfoOffset;                   ///< Offset of module
-  IN  UINT32  EntryPointAddress;                  ///< Entry address
-  IN  UINT32  ImageBase;                          ///< Image base
-  IN  UINT32  RelocTableOffset;                   ///< Relocate Table offset
-  IN  UINT32  ImageSize;                          ///< Size
-  IN  UINT16  Checksum;                           ///< Checksum
-  IN  UINT8   ImageType;                          ///< Type
-  IN  UINT8   V_Reserved;                         ///< Reserved
-} AMD_IMAGE_HEADER;
-/// AGESA Binary module header structure
-typedef struct _AMD_MODULE_HEADER {
-  IN  UINT32          ModuleHeaderSignature;      ///< Module signature
-  IN  CHAR8           ModuleIdentifier[8];        ///< 8 characters ID
-  IN  CHAR8           ModuleVersion[12];          ///< 12 characters version
-  IN  VOID            *ModuleDispatcher;          ///< A pointer point to dispatcher
-  IN  struct _AMD_MODULE_HEADER  *NextBlock;      ///< Next module header link
-} AMD_MODULE_HEADER;
-
-// AMD_CODE_HEADER Signatures.
-#define AGESA_CODE_SIGNATURE  {'!', '!', '!', 'A', 'G', 'E', 'S', 'A'}
-#define CIMXNB_CODE_SIGNATURE {'!', '!', 'C', 'I', 'M', 'X', 'N', 'B'}
-#define CIMXSB_CODE_SIGNATURE {'!', '!', 'C', 'I', 'M', 'X', 'S', 'B'}
-
-/// AGESA_CODE_SIGNATURE
-typedef struct {
-  IN  CHAR8   Signature[8];                       ///< code header Signature
-  IN  CHAR8   ComponentName[16];                  ///< 16 character name of the code module
-  IN  CHAR8   Version[12];                        ///< 12 character version string
-  IN  CHAR8   TerminatorNull;                     ///< null terminated string
-  IN  CHAR8   VerReserved[7];                     ///< reserved space
-} AMD_CODE_HEADER;
-
-/// Extended PCI address format
-typedef struct {
-  IN OUT  UINT32      Register:12;                ///< Register offset
-  IN OUT  UINT32      Function:3;                 ///< Function number
-  IN OUT  UINT32      Device:5;                   ///< Device number
-  IN OUT  UINT32      Bus:8;                      ///< Bus number
-  IN OUT  UINT32      Segment:4;                  ///< Segment
-} EXT_PCI_ADDR;
-
-/// Union type for PCI address
-typedef union _PCI_ADDR {
-  IN  UINT32          AddressValue;               ///< Formal address
-  IN  EXT_PCI_ADDR    Address;                    ///< Extended address
-} PCI_ADDR;
-
-//   SBDFO - Segment Bus Device Function Offset
-//   31:28   Segment (4-bits)
-//   27:20   Bus     (8-bits)
-//   19:15   Device  (5-bits)
-//   14:12   Function(3-bits)
-//   11:00   Offset  (12-bits)
-
-#define MAKE_SBDFO(Seg, Bus, Dev, Fun, Off) ((((UINT32) (Seg)) << 28) | (((UINT32) (Bus)) << 20) | \
-                   (((UINT32)(Dev)) << 15) | (((UINT32)(Fun)) << 12) | ((UINT32)(Off)))
-#define ILLEGAL_SBDFO 0xFFFFFFFFul
-
-/// CPUID data received registers format
-typedef struct {
-  OUT UINT32          EAX_Reg;                    ///< CPUID instruction result in EAX
-  OUT UINT32          EBX_Reg;                    ///< CPUID instruction result in EBX
-  OUT UINT32          ECX_Reg;                    ///< CPUID instruction result in ECX
-  OUT UINT32          EDX_Reg;                    ///< CPUID instruction result in EDX
-} CPUID_DATA;
-
-// Topology Services definitions and macros
-#define TOPOLOGY_LIST_TERMINAL             0xFF             ///< End of list.
-
-
-#ifndef BIT0
-  #define BIT0        0x0000000000000001ull
-#endif
-#ifndef BIT1
-  #define BIT1        0x0000000000000002ull
-#endif
-#ifndef BIT2
-  #define BIT2        0x0000000000000004ull
-#endif
-#ifndef BIT3
-  #define BIT3        0x0000000000000008ull
-#endif
-#ifndef BIT4
-  #define BIT4        0x0000000000000010ull
-#endif
-#ifndef BIT5
-  #define BIT5        0x0000000000000020ull
-#endif
-#ifndef BIT6
-  #define BIT6        0x0000000000000040ull
-#endif
-#ifndef BIT7
-  #define BIT7        0x0000000000000080ull
-#endif
-#ifndef BIT8
-  #define BIT8        0x0000000000000100ull
-#endif
-#ifndef BIT9
-  #define BIT9        0x0000000000000200ull
-#endif
-#ifndef BIT10
-  #define BIT10       0x0000000000000400ull
-#endif
-#ifndef BIT11
-  #define BIT11       0x0000000000000800ull
-#endif
-#ifndef BIT12
-  #define BIT12       0x0000000000001000ull
-#endif
-#ifndef BIT13
-  #define BIT13       0x0000000000002000ull
-#endif
-#ifndef BIT14
-  #define BIT14       0x0000000000004000ull
-#endif
-#ifndef BIT15
-  #define BIT15       0x0000000000008000ull
-#endif
-#ifndef BIT16
-  #define BIT16       0x0000000000010000ull
-#endif
-#ifndef BIT17
-  #define BIT17       0x0000000000020000ull
-#endif
-#ifndef BIT18
-  #define BIT18       0x0000000000040000ull
-#endif
-#ifndef BIT19
-  #define BIT19       0x0000000000080000ull
-#endif
-#ifndef BIT20
-  #define BIT20       0x0000000000100000ull
-#endif
-#ifndef BIT21
-  #define BIT21       0x0000000000200000ull
-#endif
-#ifndef BIT22
-  #define BIT22       0x0000000000400000ull
-#endif
-#ifndef BIT23
-  #define BIT23       0x0000000000800000ull
-#endif
-#ifndef BIT24
-  #define BIT24       0x0000000001000000ull
-#endif
-#ifndef BIT25
-  #define BIT25       0x0000000002000000ull
-#endif
-#ifndef BIT26
-  #define BIT26       0x0000000004000000ull
-#endif
-#ifndef BIT27
-  #define BIT27       0x0000000008000000ull
-#endif
-#ifndef BIT28
-  #define BIT28       0x0000000010000000ull
-#endif
-#ifndef BIT29
-  #define BIT29       0x0000000020000000ull
-#endif
-#ifndef BIT30
-  #define BIT30       0x0000000040000000ull
-#endif
-#ifndef BIT31
-  #define BIT31       0x0000000080000000ull
-#endif
-#ifndef BIT32
-  #define BIT32       0x0000000100000000ull
-#endif
-#ifndef BIT33
-  #define BIT33       0x0000000200000000ull
-#endif
-#ifndef BIT34
-  #define BIT34       0x0000000400000000ull
-#endif
-#ifndef BIT35
-  #define BIT35       0x0000000800000000ull
-#endif
-#ifndef BIT36
-  #define BIT36       0x0000001000000000ull
-#endif
-#ifndef BIT37
-  #define BIT37       0x0000002000000000ull
-#endif
-#ifndef BIT38
-  #define BIT38       0x0000004000000000ull
-#endif
-#ifndef BIT39
-  #define BIT39       0x0000008000000000ull
-#endif
-#ifndef BIT40
-  #define BIT40       0x0000010000000000ull
-#endif
-#ifndef BIT41
-  #define BIT41       0x0000020000000000ull
-#endif
-#ifndef BIT42
-  #define BIT42       0x0000040000000000ull
-#endif
-#ifndef BIT43
-  #define BIT43       0x0000080000000000ull
-#endif
-#ifndef BIT44
-  #define BIT44       0x0000100000000000ull
-#endif
-#ifndef BIT45
-  #define BIT45       0x0000200000000000ull
-#endif
-#ifndef BIT46
-  #define BIT46       0x0000400000000000ull
-#endif
-#ifndef BIT47
-  #define BIT47       0x0000800000000000ull
-#endif
-#ifndef BIT48
-  #define BIT48       0x0001000000000000ull
-#endif
-#ifndef BIT49
-  #define BIT49       0x0002000000000000ull
-#endif
-#ifndef BIT50
-  #define BIT50       0x0004000000000000ull
-#endif
-#ifndef BIT51
-  #define BIT51       0x0008000000000000ull
-#endif
-#ifndef BIT52
-  #define BIT52       0x0010000000000000ull
-#endif
-#ifndef BIT53
-  #define BIT53       0x0020000000000000ull
-#endif
-#ifndef BIT54
-  #define BIT54       0x0040000000000000ull
-#endif
-#ifndef BIT55
-  #define BIT55       0x0080000000000000ull
-#endif
-#ifndef BIT56
-  #define BIT56       0x0100000000000000ull
-#endif
-#ifndef BIT57
-  #define BIT57       0x0200000000000000ull
-#endif
-#ifndef BIT58
-  #define BIT58       0x0400000000000000ull
-#endif
-#ifndef BIT59
-  #define BIT59       0x0800000000000000ull
-#endif
-#ifndef BIT60
-  #define BIT60       0x1000000000000000ull
-#endif
-#ifndef BIT61
-  #define BIT61       0x2000000000000000ull
-#endif
-#ifndef BIT62
-  #define BIT62       0x4000000000000000ull
-#endif
-#ifndef BIT63
-  #define BIT63       0x8000000000000000ull
-#endif
-
-#endif // _AMD_H_

pi/amd/00660F01/Dispatcher.h

diff --git a/pi/amd/00660F01/Dispatcher.h b/pi/amd/00660F01/Dispatcher.h
deleted file mode 100644
index 777f05c..0000000
--- a/pi/amd/00660F01/Dispatcher.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Pushhigh Interface
- *
- * Contains interface to Pushhigh entry
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Legacy
- * @e \$Revision: 281175 $   @e \$Date: 2013-12-18 15:53:00 +0800 (Wed, 18 Dec 2013) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _DISPATCHER_H_
-#define _DISPATCHER_H_
-
-// AGESA function prototypes
-AGESA_STATUS CALLCONV AmdAgesaDispatcher ( IN OUT VOID *ConfigPtr );
-AGESA_STATUS CALLCONV AmdAgesaCallout ( IN UINT32 Func, IN UINT32 Data, IN OUT VOID *ConfigPtr );
-
-#endif // _DISPATCHER_H_

pi/amd/00660F01/FP4/AGESA.bin

diff --git a/pi/amd/00660F01/FP4/AGESA.bin b/pi/amd/00660F01/FP4/AGESA.bin
index 6ad468e..ff7badd 100755
--- a/pi/amd/00660F01/FP4/AGESA.bin
+++ b/pi/amd/00660F01/FP4/AGESA.bin
Binary files differ

pi/amd/00660F01/FP4/AGESA_Release_Notes.txt

diff --git a/pi/amd/00660F01/FP4/AGESA_Release_Notes.txt b/pi/amd/00660F01/FP4/AGESA_Release_Notes.txt
index 5a04239..191323a 100644
--- a/pi/amd/00660F01/FP4/AGESA_Release_Notes.txt
+++ b/pi/amd/00660F01/FP4/AGESA_Release_Notes.txt
@@ -4,6 +4,43 @@
 
 
 =============================================================================
+AGESA PI Version:  1.1.0.1                 Test Board: Bettong Alfa, Beta
+Binary PI version: 1.5                     Binary PI Build Date: Aug.  5 2015
+=============================================================================
+1. Update CarrizoPI to Version 1.1.0.1
+
+=============================================================================
+AGESA PI Version:  1.1.0.0                 Test Board: Bettong Alfa, Beta
+Binary PI version: 1.4                     Binary PI Build Date: Jul. 10 2015
+=============================================================================
+1. Update CarrizoPI to Version 1.1.0.0
+2. CarrizoPI 1.1.0.0 support DDR4
+
+=============================================================================
+AGESA PI Version:  1.0.0.7                 Test Board: Bettong Alfa
+Binary PI version: 1.3                     Binary PI Build Date: Jun. 26 2015
+=============================================================================
+1. Add NB PState support
+   1) Add two macros in buildOpts.c
+      BLDCFG_PLATFORM_CPB_MODE and BLDCFG_NB_PSTATES_SUPPORTED
+   2) Add GnbSmuServiceRequestV8
+      This function is commented out before. This is necessary for NB PState,
+      so add it back.
+2. Add FchSetSpi back
+3. Skip CF9 warm reset in FchInitResetHwAcpiP
+   Bug found (18Jun15) with ZE880PAAY4382 OPN, 50% hang rate in early POST
+   due to "unnecessary reset" too close to power-on (<90ms).
+   Resolution: "Remove unnecessary reset to fix the hang"
+
+=============================================================================
+AGESA PI Version:  1.0.0.7                 Test Board: Bettong Alfa
+Binary PI version: 1.2                     Binary PI Build Date: May 29 2015
+=============================================================================
+1. Update header files.
+     Update header files according commit d82006ea
+2. The AGESA.bin is the same as Binary PI version 1.1
+
+=============================================================================
 AGESA PI Version:  1.0.0.7                 Test Board: Bettong Alfa
 Binary PI version: 1.1                     Binary PI Build Date: May 29 2015
 =============================================================================

pi/amd/00660F01/Include/Filecode.h

diff --git a/pi/amd/00660F01/Include/Filecode.h b/pi/amd/00660F01/Include/Filecode.h
deleted file mode 100644
index 0e01812..0000000
--- a/pi/amd/00660F01/Include/Filecode.h
+++ /dev/null
@@ -1,648 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Collectively assign unique filecodes for assert and debug to each source file.
- *
- * Publish values for decorated filenames, which can be used for
- * ASSERT and debug support using a preprocessor define like:
- * @n <tt> \#define FILECODE MY_C_FILENAME_FILECODE </tt> @n
- * This file serves as a reference for debugging to associate the code and filename.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Include
- * @e \$Revision: 309899 $   @e \$Date: 2014-12-23 02:21:13 -0600 (Tue, 23 Dec 2014) $
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _FILECODE_H_
-#define _FILECODE_H_
-
-#define UNASSIGNED_FILE_FILECODE                                         (0xFFFF)
-
-/// For debug use in any Platform's options C file.
-/// Can be reused for platforms and image builds, since only one options file can be built.
-#define PLATFORM_SPECIFIC_OPTIONS_FILECODE                               (0xBBBB)
-
-
-#define PROC_GNB_COMMON_GNBLIBFEATURES_FILECODE                          (0xA001)
-#define PROC_GNB_GNBINITATEARLY_FILECODE                                 (0xA017)
-#define PROC_GNB_GNBINITATENV_FILECODE                                   (0xA020)
-#define PROC_GNB_GNBINITATLATE_FILECODE                                  (0xA021)
-#define PROC_GNB_GNBINITATMID_FILECODE                                   (0xA022)
-#define PROC_GNB_GNBINITATPOST_FILECODE                                  (0xA023)
-#define PROC_GNB_GNBINITATRESET_FILECODE                                 (0xA024)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIB_FILECODE                    (0xA025)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBCPUACC_FILECODE              (0xA026)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBHEAP_FILECODE                (0xA027)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBIOACC_FILECODE               (0xA028)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBMEMACC_FILECODE              (0xA029)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBPCI_FILECODE                 (0xA02A)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBPCIACC_FILECODE              (0xA030)
-#define PROC_GNB_MODULES_GNBGFXINITLIBV1_GFXCARDINFO_FILECODE            (0xA031)
-#define PROC_GNB_MODULES_GNBGFXINITLIBV1_GFXENUMCONNECTORS_FILECODE      (0xA032)
-#define PROC_GNB_MODULES_GNBGFXINITLIBV1_GNBGFXINITLIBV1_FILECODE        (0xA033)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_PCIECONFIGDATA_FILECODE           (0xA036)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_PCIECONFIGLIB_FILECODE            (0xA037)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_PCIEINPUTPARSER_FILECODE          (0xA038)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_PCIEMAPTOPOLOGY_FILECODE          (0xA039)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEASPMBLACKLIST_FILECODE     (0xA03B)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEASPMEXITLATENCY_FILECODE   (0xA03C)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPHYSERVICES_FILECODE       (0xA03D)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPIFSERVICES_FILECODE       (0xA03E)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPORTREGACC_FILECODE        (0xA03F)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPORTSERVICES_FILECODE      (0xA041)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPOWERMGMT_FILECODE         (0xA043)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIESILICONSERVICES_FILECODE   (0xA045)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIETIMER_FILECODE             (0xA046)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIETOPOLOGYSERVICES_FILECODE  (0xA047)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEUTILITYLIB_FILECODE        (0xA048)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEWRAPPERREGACC_FILECODE     (0xA049)
-#define PROC_GNB_MODULES_GNBPCIECOMMCLKCFG_PCIECOMMCLKCFG_FILECODE       (0xA04C)
-
-#define PROC_GNB_MODULES_GNBGFXCONFIG_GFXCONFIGENV_FILECODE              (0xA08E)
-#define PROC_GNB_MODULES_GNBGFXCONFIG_GFXCONFIGPOST_FILECODE             (0xA08F)
-#define PROC_GNB_MODULES_GNBTABLE_GNBTABLE_FILECODE                      (0xA090)
-#define PROC_GNB_MODULES_GNBGFXCONFIG_GFXCONFIGLIB_FILECODE              (0xA093)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV4_PCIEWRAPPERSERVICESV4_FILECODE (0xA0A6)
-#define PROC_GNB_MODULES_GNBIOMMUIVRS_GNBIOMMUIVRS_FILECODE              (0xA0A7)
-#define PROC_GNB_MODULES_GNBIVRSLIB_GNBIVRSLIB_FILECODE                  (0xA0A8)
-#define PROC_GNB_MODULES_GNBNBINITLIBV4_GNBNBINITLIBV4_FILECODE          (0xA0A9)
-#define PROC_GNB_MODULES_GNBFAMTRANSLATION_GNBPCIETRANSLATION_FILECODE   (0xA0AA)
-
-#define PROC_GNB_MODULES_GNBSBLIB_GNBSBPCIE_FILECODE                     (0xA0BA)
-#define PROC_GNB_MODULES_GNBSBLIB_GNBSBLIB_FILECODE                      (0xA0BB)
-#define PROC_GNB_MODULES_GNBSBIOMMULIB_GNBSBIOMMULIB_FILECODE            (0xA0BC)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBTIMERLIB_FILECODE               (0xA0BD)
-#define PROC_GNB_MODULES_GNBSSOCKETLIB_GNBSSOCKETLIB_FILECODE            (0xA0BF)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_GNBHANDLELIB_FILECODE             (0xA0C0)
-#define PROC_GNB_MODULES_GNBPCIEASPM_PCIEASPM_FILECODE                   (0xA0C2)
-
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEASPMEXITLATENCYV5_FILECODE (0xA0C5)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEPIFSERVICESV5_FILECODE     (0xA0C6)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEPORTSERVICESV5_FILECODE    (0xA0C7)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEPOWERMGMTV5_FILECODE       (0xA0C8)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIESILICONSERVICESV5_FILECODE (0xA0C9)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEWRAPPERSERVICESV5_FILECODE (0xA0CA)
-#define PROC_GNB_MODULES_GNBNBINITLIBV5_GNBNBINITLIBV5_FILECODE          (0xA0CB)
-
-#define PROC_GNB_MODULES_GNBFAMTRANSLATION_GNBTRANSLATION_FILECODE       (0xA0DB)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV4_PCIEPOWERMGMTV4_FILECODE       (0xA0DC)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV4_PCIEPORTSERVICESV4_FILECODE    (0xA0DD)
-
-#define PROC_GNB_MODULES_GNBGFXCONFIG_GFXCONFIGMID_FILECODE              (0xA0E0)
-
-#define PROC_GNB_MODULES_GNBIOAPIC_GNBIOAPIC_FILECODE                    (0xA0EE)
-
-#define PROC_GNB_MODULES_GNBPCIEMAXPAYLOAD_PCIEMAXPAYLOAD_FILECODE       (0xA0F4)
-#define PROC_GNB_MODULES_GNBPCIECLKPM_PCIECLKPM_FILECODE                 (0xA0F5)
-
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIETOPOLOGYSERVICESV5_FILECODE (0xA100)
-#define PROC_GNB_MODULES_GNBPCIETRAININGV2_PCIETRAININGV2_FILECODE        (0xA101)
-#define PROC_GNB_MODULES_GNBPCIETRAININGV2_PCIEWORKAROUNDSV2_FILECODE     (0xA102)
-
-#define PROC_GNB_MODULES_GNBINITCZ_ALIBCZ_FILECODE                       (0xA202)
-#define PROC_GNB_MODULES_GNBINITCZ_GFXENVINITCZ_FILECODE                 (0xA203)
-#define PROC_GNB_MODULES_GNBINITCZ_GFXGMCINITCZ_FILECODE                 (0xA204)
-#define PROC_GNB_MODULES_GNBINITCZ_GFXINTEGRATEDINFOTABLECZ_FILECODE     (0xA205)
-#define PROC_GNB_MODULES_GNBINITCZ_GFXLIBCZ_FILECODE                     (0xA206)
-#define PROC_GNB_MODULES_GNBINITCZ_GFXMIDINITCZ_FILECODE                 (0xA207)
-#define PROC_GNB_MODULES_GNBINITCZ_GFXPOSTINITCZ_FILECODE                (0xA208)
-#define PROC_GNB_MODULES_GNBINITCZ_GNBEARLYINITCZ_FILECODE               (0xA209)
-#define PROC_GNB_MODULES_GNBINITCZ_GNBENVINITCZ_FILECODE                 (0xA20A)
-#define PROC_GNB_MODULES_GNBINITCZ_GNBFUSETABLECZ_FILECODE               (0xA20B)
-#define PROC_GNB_MODULES_GNBINITCZ_GNBIOMMUIVRSCZ_FILECODE               (0xA20C)
-#define PROC_GNB_MODULES_GNBINITCZ_GNBMIDINITCZ_FILECODE                 (0xA20D)
-#define PROC_GNB_MODULES_GNBINITCZ_GNBPOSTINITCZ_FILECODE                (0xA20E)
-#define PROC_GNB_MODULES_GNBINITCZ_GNBREGISTERACCCZ_FILECODE             (0xA20F)
-#define PROC_GNB_MODULES_GNBINITCZ_GNBURATOKENMAPCZ_FILECODE             (0xA211)
-#define PROC_GNB_MODULES_GNBINITCZ_PCIECOMPLEXDATACZ_FILECODE            (0xA212)
-#define PROC_GNB_MODULES_GNBINITCZ_PCIECONFIGCZ_FILECODE                 (0xA213)
-#define PROC_GNB_MODULES_GNBINITCZ_PCIEEARLYINITCZ_FILECODE              (0xA214)
-#define PROC_GNB_MODULES_GNBINITCZ_PCIEENVINITCZ_FILECODE                (0xA215)
-#define PROC_GNB_MODULES_GNBINITCZ_PCIELIBCZ_FILECODE                    (0xA216)
-#define PROC_GNB_MODULES_GNBINITCZ_PCIEMIDINITCZ_FILECODE                (0xA217)
-#define PROC_GNB_MODULES_GNBINITCZ_PCIEPOSTINITCZ_FILECODE               (0xA218)
-#define PROC_GNB_MODULES_GNBINITCZ_PCIEPOWERGATECZ_FILECODE              (0xA219)
-#define PROC_GNB_MODULES_GNBINITCZ_GNBURACZ_FILECODE                     (0xA21A)
-#define PROC_GNB_MODULES_GNBSMULIBV8_GNBSMUINITLIBV8_FILECODE            (0xA21B)
-#define PROC_GNB_MODULES_GNBINITCZ_PCIEARIINITCZ_FILECODE                (0xA21C)
-#define PROC_GNB_MODULES_GNBINITCZ_GNBBOOTTIMECALCZ_FILECODE             (0xA21D)
-#define PROC_GNB_MODULES_GNBINITCZ_GNBPSPCZ_FILECODE                     (0xA21E)
-#define PROC_GNB_MODULES_GNBINITCZ_GNBSMUINITCZ_FILECODE                 (0xA21F)
-
-#define PROC_RECOVERY_GNB_GNBRECOVERY_FILECODE                           (0xAE01)
-#define PROC_RECOVERY_GNB_NBINITRECOVERY_FILECODE                        (0xAE02)
-#define PROC_GNB_GNBINITATRTB_FILECODE                                   (0xAE03)
-#define PROC_GNB_MODULES_GNBSVIEW_GNBSVIEW_FILECODE                      (0xAE04)
-
-#define PROC_GNB_MODULES_GNBIOMMUSCRATCH_GNBIOMMUSCRATCH_FILECODE        (0xAE18)
-
-#define PROC_GNB_MODULES_GNBPCIEALIBV2_PCIEALIBV2_FILECODE               (0xAE33)
-#define PROC_GNB_MODULES_GNBURALIBV1_GNBURALIBV1_FILECODE                (0xAE3A)
-#define PROC_GNB_MODULES_GNBGFXINTTABLEV5_GFXLIBV5_FILECODE              (0xAE41)
-#define PROC_GNB_MODULES_GNBGFXINTTABLEV5_GFXINTEGRATEDINFOTABLEV5_FILECODE (0xAE42)
-#define PROC_GNB_MODULES_GNBGFXINTTABLEV5_GFXPWRPLAYTABLEV5_FILECODE     (0xAE43)
-#define PROC_GNB_MODULES_GNBAZALIALIB_GNBAZALIALIB_FILECODE              (0xAE44)
-
-// FCH
-#define PROC_FCH_COMMON_ACPILIB_FILECODE                                 (0xB010)
-#define PROC_FCH_COMMON_FCHLIB_FILECODE                                  (0xB011)
-#define PROC_FCH_COMMON_FCHCOMMON_FILECODE                               (0xB012)
-#define PROC_FCH_COMMON_FCHCOMMONSMM_FILECODE                            (0xB013)
-#define PROC_FCH_COMMON_MEMLIB_FILECODE                                  (0xB014)
-#define PROC_FCH_COMMON_PCILIB_FILECODE                                  (0xB015)
-#define PROC_FCH_COMMON_FCHPELIB_FILECODE                                (0xB016)
-
-#define UEFI_SMM_MEMSMMLIB_MEMSMMLIB_FILECODE                             (0xB2C1)
-#define UEFI_SMM_MEMSMMLIB_CZ_DRAMMAPCZ_FILECODE                          (0xB2C3)
-#define PROC_FCH_KERN_KERNAZALIA_KERNAZALIARESET_FILECODE                           (0xB400)
-#define PROC_FCH_KERN_KERNAZALIA_KERNAZALIAENV_FILECODE                             (0xB401)
-#define PROC_FCH_KERN_KERNAZALIA_KERNAZALIAMID_FILECODE                             (0xB402)
-#define PROC_FCH_KERN_KERNAZALIA_KERNAZALIALATE_FILECODE                            (0xB403)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPIRESET_FILECODE                           (0xB410)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPIENV_FILECODE                             (0xB411)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPIMID_FILECODE                             (0xB412)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPILATE_FILECODE                            (0xB413)
-#define PROC_FCH_KERN_KERNHWACPI_KERNSSSERVICE_FILECODE                             (0xB414)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPIENVSERVICE_FILECODE                      (0xB415)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPIMIDSERVICE_FILECODE                      (0xB416)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPILATESERVICE_FILECODE                     (0xB417)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMRESET_FILECODE                                 (0xB420)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMENV_FILECODE                                   (0xB421)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMMID_FILECODE                                   (0xB422)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMLATE_FILECODE                                  (0xB423)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMENVSERVICE_FILECODE                            (0xB424)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMMIDSERVICE_FILECODE                            (0xB425)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMLATESERVICE_FILECODE                           (0xB426)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNFCHINITRESET_FILECODE                       (0xB427)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNFCHINITENV_FILECODE                         (0xB428)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNFCHINITMID_FILECODE                         (0xB429)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNFCHINITLATE_FILECODE                        (0xB42A)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNFCHINITS3_FILECODE                          (0xB42B)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNINITRESETDEF_FILECODE                       (0xB42C)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNINITENVDEF_FILECODE                         (0xB42D)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNFCHTASKLAUNCHER_FILECODE                    (0xB42E)
-#define PROC_FCH_KERN_KERNIMC_KERNIMCRESET_FILECODE                                 (0xB430)
-#define PROC_FCH_KERN_KERNIMC_KERNIMCENV_FILECODE                                   (0xB431)
-#define PROC_FCH_KERN_KERNIMC_KERNIMCMID_FILECODE                                   (0xB432)
-#define PROC_FCH_KERN_KERNIMC_KERNIMCLATE_FILECODE                                  (0xB433)
-#define PROC_FCH_KERN_KERNIMC_KERNFCHECRESET_FILECODE                               (0xB434)
-#define PROC_FCH_KERN_KERNIMC_KERNFCHECENV_FILECODE                                 (0xB435)
-#define PROC_FCH_KERN_KERNIMC_KERNFCHECMID_FILECODE                                 (0xB436)
-#define PROC_FCH_KERN_KERNIMC_KERNFCHECLATE_FILECODE                                (0xB437)
-#define PROC_FCH_KERN_KERNIMC_KERNIMCLIB_FILECODE                                   (0xB438)
-#define PROC_FCH_KERN_KERNIMC_KERNIMCSERVICE_FILECODE                               (0xB439)
-#define PROC_FCH_KERN_KERNIR_KERNIRENV_FILECODE                                     (0xB43A)
-#define PROC_FCH_KERN_KERNIR_KERNIRMID_FILECODE                                     (0xB43B)
-#define PROC_FCH_KERN_KERNIR_KERNIRLATE_FILECODE                                    (0xB43C)
-#define PROC_FCH_KERN_KERNPCIE_KERNABRESET_FILECODE                                 (0xB440)
-#define PROC_FCH_KERN_KERNPCIE_KERNABENV_FILECODE                                   (0xB441)
-#define PROC_FCH_KERN_KERNPCIE_KERNABMID_FILECODE                                   (0xB442)
-#define PROC_FCH_KERN_KERNPCIE_KERNABLATE_FILECODE                                  (0xB443)
-#define PROC_FCH_KERN_KERNPCIE_KERNABENVSERVICE_FILECODE                            (0xB44C)
-#define PROC_FCH_KERN_KERNPCIE_KERNABRESETSERVICE_FILECODE                          (0xB44D)
-#define PROC_FCH_KERN_KERNPCIE_KERNABSERVICE_FILECODE                               (0xB44E)
-#define PROC_FCH_KERN_KERNSATA_KERNSATARESET_FILECODE                               (0xB460)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAENV_FILECODE                                 (0xB461)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAMID_FILECODE                                 (0xB462)
-#define PROC_FCH_KERN_KERNSATA_KERNSATALATE_FILECODE                                (0xB463)
-#define PROC_FCH_KERN_KERNSATA_KERNSATARESETSERVICE_FILECODE                        (0xB464)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAENVSERVICE_FILECODE                          (0xB465)
-#define PROC_FCH_KERN_KERNSATA_KERNSATASERVICE_FILECODE                             (0xB466)
-#define PROC_FCH_KERN_KERNSATA_KERNSATALIB_FILECODE                                 (0xB467)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAENVLIB_FILECODE                              (0xB468)
-#define PROC_FCH_KERN_KERNSATA_KERNAHCILIB_FILECODE                                 (0xB469)
-#define PROC_FCH_KERN_KERNSATA_KERNAHCIENV_FILECODE                                 (0xB46A)
-#define PROC_FCH_KERN_KERNSATA_KERNAHCIMID_FILECODE                                 (0xB46B)
-#define PROC_FCH_KERN_KERNSATA_KERNAHCILATE_FILECODE                                (0xB46C)
-#define PROC_FCH_KERN_KERNSATA_KERNRAIDLIB_FILECODE                                 (0xB46D)
-#define PROC_FCH_KERN_KERNSATA_KERNRAIDENV_FILECODE                                 (0xB46E)
-#define PROC_FCH_KERN_KERNSATA_KERNRAIDMID_FILECODE                                 (0xB46F)
-#define PROC_FCH_KERN_KERNSATA_KERNRAIDLATE_FILECODE                                (0xB470)
-#define PROC_FCH_KERN_KERNSATA_KERNIDE2AHCILIB_FILECODE                             (0xB471)
-#define PROC_FCH_KERN_KERNSATA_KERNIDE2AHCIENV_FILECODE                             (0xB472)
-#define PROC_FCH_KERN_KERNSATA_KERNIDE2AHCIMID_FILECODE                             (0xB473)
-#define PROC_FCH_KERN_KERNSATA_KERNIDE2AHCILATE_FILECODE                            (0xB474)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAIDELIB_FILECODE                              (0xB475)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAIDEENV_FILECODE                              (0xB476)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAIDEMID_FILECODE                              (0xB477)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAIDELATE_FILECODE                             (0xB478)
-#define PROC_FCH_KERN_KERNSD_KERNSDENV_FILECODE                                     (0xB481)
-#define PROC_FCH_KERN_KERNSD_KERNSDMID_FILECODE                                     (0xB482)
-#define PROC_FCH_KERN_KERNSD_KERNSDLATE_FILECODE                                    (0xB483)
-#define PROC_FCH_KERN_KERNSD_KERNSDRESETSERVICE_FILECODE                            (0xB484)
-#define PROC_FCH_KERN_KERNSD_KERNSDENVSERVICE_FILECODE                              (0xB485)
-#define PROC_FCH_KERN_KERNSD_KERNSDSERVICE_FILECODE                                 (0xB486)
-#define PROC_FCH_KERN_KERNSPI_KERNSPIRESET_FILECODE                                 (0xB490)
-#define PROC_FCH_KERN_KERNSPI_KERNSPIENV_FILECODE                                   (0xB491)
-#define PROC_FCH_KERN_KERNSPI_KERNSPIMID_FILECODE                                   (0xB492)
-#define PROC_FCH_KERN_KERNSPI_KERNSPILATE_FILECODE                                  (0xB493)
-#define PROC_FCH_KERN_KERNSPI_KERNLPCRESET_FILECODE                                 (0xB494)
-#define PROC_FCH_KERN_KERNSPI_KERNLPCENV_FILECODE                                   (0xB495)
-#define PROC_FCH_KERN_KERNSPI_KERNLPCMID_FILECODE                                   (0xB496)
-#define PROC_FCH_KERN_KERNSPI_KERNLPCLATE_FILECODE                                  (0xB497)
-#define PROC_FCH_KERN_KERNSPI_KERNLPCRESETSERVICE_FILECODE                          (0xB498)
-#define PROC_FCH_KERN_KERNSPI_KERNLPCENVSERVICE_FILECODE                            (0xB499)
-#define PROC_FCH_KERN_KERNUSB_KERNUSBRESET_FILECODE                                 (0xB4A0)
-#define PROC_FCH_KERN_KERNUSB_KERNUSBENV_FILECODE                                   (0xB4A1)
-#define PROC_FCH_KERN_KERNUSB_KERNUSBMID_FILECODE                                   (0xB4A2)
-#define PROC_FCH_KERN_KERNUSB_KERNUSBLATE_FILECODE                                  (0xB4A3)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCIRESET_FILECODE                                (0xB4A4)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCIENV_FILECODE                                  (0xB4A5)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCIMID_FILECODE                                  (0xB4A6)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCILATE_FILECODE                                 (0xB4A7)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCIMIDSERVICE_FILECODE                           (0xB4A8)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCIENVSERVICE_FILECODE                           (0xB4A9)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCILATESERVICE_FILECODE                          (0xB4AA)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIRESET_FILECODE                                (0xB4B2)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIENV_FILECODE                                  (0xB4B3)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIMID_FILECODE                                  (0xB4B4)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCILATE_FILECODE                                 (0xB4B5)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIRESETSERVICE_FILECODE                         (0xB4B6)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIENVSERVICE_FILECODE                           (0xB4B7)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIMIDSERVICE_FILECODE                           (0xB4B8)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCILATESERVICE_FILECODE                          (0xB4B9)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIRECOVERY_FILECODE                             (0xB4BA)
-#define UEFI_FCH_KERN_DXE_FCHACPICS_FCHACPICS_FILECODE                                  (0xB408)
-#define UEFI_FCH_KERN_DXE_FCHACPICS_FCHACPICSAML_FILECODE                               (0xB409)
-#define UEFI_FCH_KERN_DXE_FCHACPICS_FCHACPICSCONTROL_FILECODE                           (0xB40A)
-#define UEFI_FCH_KERN_DXE_FCHACPICS_FUNCTIONS_FCHD3COLD_FCHD3COLD_FILECODE              (0xB40B)
-#define UEFI_FCH_KERN_DXE_AMDFCHHWM_AMDFCHHWM_FILECODE                                  (0xB4C1)
-#define UEFI_FCH_KERN_DXE_AMDFCHWHEA_AMDFCHWHEA_FILECODE                                (0xB4C2)
-#define UEFI_FCH_KERN_DXE_AMDFCHWHEA_AMDFCHWHEAEINJ_FILECODE                            (0xB4C3)
-#define UEFI_FCH_KERN_DXE_AMDFCHWHEA_AMDFCHWHEAHEST_FILECODE                            (0xB4C4)
-#define UEFI_FCH_KERN_DXE_CF9RESET_CF9RESET_FILECODE                                    (0xB4C5)
-#define UEFI_FCH_KERN_DXE_CF9RESET_IA32_IA32CF9RESET_FILECODE                           (0xB4C6)
-#define UEFI_FCH_KERN_DXE_CF9RESET_X64_X64CF9RESET_FILECODE                             (0xB4C7)
-#define UEFI_FCH_KERN_DXE_FCHDXE_FCHDXE_FILECODE                                        (0xB4C8)
-#define UEFI_FCH_KERN_DXE_FCHDXE_USBOC_FILECODE                                         (0xB4C9)
-#define UEFI_FCH_KERN_DXE_FCHDXEAUX_DXEBOOTTIMER_FILECODE                               (0xB4CA)
-#define UEFI_FCH_KERN_DXE_FCHDXEAUX_DXEDISUSBPORT_FILECODE                              (0xB4CB)
-#define UEFI_FCH_KERN_DXE_FCHDXEAUX_DXEESATAPORT_FILECODE                               (0xB4CC)
-#define UEFI_FCH_KERN_DXE_FCHDXEAUX_DXEGPIO_FILECODE                                    (0xB4CD)
-#define UEFI_FCH_KERN_DXE_FCHDXEAUX_DXEGPIOREAD_FILECODE                                (0xB4CE)
-#define UEFI_FCH_KERN_DXE_FCHDXEAUX_FCHDXEAUX_FILECODE                                  (0xB4CF)
-#define UEFI_FCH_KERN_DXE_FCHDXELIB_FCHDXELIB_FILECODE                                  (0xB4D0)
-#define UEFI_FCH_KERN_DXE_FCHDXELPCCLKRUN_FCHDXELPCCLKRUN_FILECODE                      (0xB4D1)
-#define UEFI_FCH_KERN_DXE_FCHDXEMMIO_FCHDXEMMIO_FILECODE                                (0xB4D2)
-#define UEFI_FCH_KERN_DXE_LEGACYINTERRUPT_LEGACYINTERRUPT_FILECODE                      (0xB4D3)
-#define UEFI_FCH_KERN_DXE_SMBUS_SMBUSLIGHT_FILECODE                                     (0xB4D4)
-#define UEFI_FCH_KERN_DXE_SMMCONTROL_SMMCONTROL_FILECODE                                (0xB4D5)
-#define UEFI_FCH_KERN_PEI_FCHPEI_FCHEHCIRECOVERY_FILECODE                               (0xB4D6)
-#define UEFI_FCH_KERN_PEI_FCHPEI_FCHPEI_FILECODE                                        (0xB4D8)
-#define UEFI_FCH_KERN_PEI_FCHPEI_FCHRESET_FILECODE                                      (0xB4D9)
-#define UEFI_FCH_KERN_PEI_FCHPEI_FCHSATARECOVERY_FILECODE                               (0xB4DA)
-#define UEFI_FCH_KERN_PEI_FCHPEI_FCHSTALL_FILECODE                                      (0xB4DB)
-#define UEFI_FCH_KERN_PEI_FCHPEI_FCHXHCIRECOVERY_FILECODE                               (0xB4DC)
-#define UEFI_FCH_KERN_PEI_FCHPEIAUX_FCHPEIAUX_FILECODE                                  (0xB4DD)
-#define UEFI_FCH_KERN_PEI_FCHPEIAUX_PEIBOOTTIMER_FILECODE                               (0xB4DE)
-#define UEFI_FCH_KERN_PEI_FCHPEIAUX_PEIDISUSBPORT_FILECODE                              (0xB4DF)
-#define UEFI_FCH_KERN_PEI_FCHPEIAUX_PEIGPIO_FILECODE                                    (0xB4E0)
-#define UEFI_FCH_KERN_PEI_FCHPEIAUX_PEIGPIOREAD_FILECODE                                (0xB4E1)
-#define UEFI_FCH_KERN_PEI_FCHPEIAUX_PEIOSCOUTCLOCK_FILECODE                             (0xB4E2)
-#define UEFI_FCH_KERN_PEI_FCHPEILIB_FCHPEILIB_FILECODE                                  (0xB4E3)
-#define UEFI_FCH_KERN_PEI_FCHPEILIB_LIBAMDPEI_FILECODE                                  (0xB4E4)
-#define UEFI_FCH_KERN_PEI_SMBUS_SMBUS_FILECODE                                          (0xB4E5)
-#define UEFI_FCH_KERN_SMM_FCHSMM_FCHSMM_FILECODE                                        (0xB4E6)
-#define UEFI_FCH_KERN_SMM_FCHSMM_GPESMI_FILECODE                                        (0xB4E7)
-#define UEFI_FCH_KERN_SMM_FCHSMM_IOTRAPSMI_FILECODE                                     (0xB4E8)
-#define UEFI_FCH_KERN_SMM_FCHSMM_MISCSMI_FILECODE                                       (0xB4E9)
-#define UEFI_FCH_KERN_SMM_FCHSMM_PERIODICTIMERSMI_FILECODE                              (0xB4EA)
-#define UEFI_FCH_KERN_SMM_FCHSMM_POWERBUTTONSMI_FILECODE                                (0xB4EB)
-#define UEFI_FCH_KERN_SMM_FCHSMM_SWSMI_FILECODE                                         (0xB4EC)
-#define UEFI_FCH_KERN_SMM_FCHSMM_SXSMI_FILECODE                                         (0xB4ED)
-#define UEFI_FCH_KERN_SMM_FCHSMMCOMPLEMENT_IMCCONTROL_IMCCONTROL_FILECODE                                  (0xB4F0)
-#define UEFI_FCH_KERN_SMM_FCHSMMCOMPLEMENT_IMCCONTROL_IMCCONTROLLIB_FILECODE                               (0xB4F1)
-#define UEFI_FCH_KERN_SMM_FCHSMMLIB_FCHDXECOMMON_FILECODE                                                  (0xB4F5)
-#define UEFI_FCH_KERN_SMM_FCHSMMLIB_FCHSMMLIB_FILECODE                                                     (0xB4F6)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMDISPATCHER_FILECODE                                       (0xB4F7)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMGPEDISPATCHER_FCHSMMGPEDISPATCHER_FILECODE                (0xB4F8)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMIOTRAPDISPATCHER_FCHSMMIOTRAPDISPATCHER_FILECODE          (0xB4F9)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMMISCDISPATCHER_FCHSMMMISCDISPATCHER_FILECODE              (0xB4FA)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMPERIODICALDISPATCHER_FCHSMMPERIODICALDISPATCHER_FILECODE  (0xB4FB)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMPWRBTNDISPATCHER_FCHSMMPWRBTNDISPATCHER_FILECODE          (0xB4FC)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMSWDISPATCHER_FCHSMMSWDISPATCHER_FILECODE                  (0xB4FE)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMSXDISPATCHER_FCHSMMSXDISPATCHER_FILECODE                  (0xB4FF)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMUSBDISPATCHER_FCHSMMUSBDISPATCHER_FILECODE                (0xB4F2)
-
-
-#define LIB_AMDLIB_FILECODE                                              (0xC001)
-#define LEGACY_PROC_AGESACALLOUTS_FILECODE                               (0xC010)
-#define LEGACY_PROC_HOBTRANSFER_FILECODE                                 (0xC011)
-#define LEGACY_PROC_DISPATCHER_FILECODE                                  (0xC012)
-
-#define UEFI_DXE_AMDAGESADXEDRIVER_AMDAGESADXEDRIVER_FILECODE            (0xC120)
-
-#define UEFI_PEI_AMDINITPOSTPEIM_AMDINITPOSTPEIM_FILECODE                (0xC140)
-#define UEFI_PEI_AMDPROCESSORINITPEIM_AMDPROCESSORINITPEIM_FILECODE      (0xC141)
-#define UEFI_PEI_AMDRESETMANAGER_AMDRESETMANAGER_FILECODE                (0xC142)
-#define UEFI_PROC_COMMON_HOBTRANSFERUEFI_FILECODE                        (0xC160)
-#define UEFI_PROC_DXE_HOBTRANSFERUEFIDXE_FILECODE                        (0xC161)
-#define UEFI_PROC_PEI_HOBTRANSFERUEFIPEI_FILECODE                        (0xC162)
-
-#define PROC_COMMON_AMDINITEARLY_FILECODE                                (0xC020)
-#define PROC_COMMON_AMDINITENV_FILECODE                                  (0xC021)
-#define PROC_COMMON_AMDINITLATE_FILECODE                                 (0xC022)
-#define PROC_COMMON_AMDINITMID_FILECODE                                  (0xC023)
-#define PROC_COMMON_AMDINITPOST_FILECODE                                 (0xC024)
-#define PROC_COMMON_AMDINITRECOVERY_FILECODE                             (0xC025)
-#define PROC_COMMON_AMDINITRESET_FILECODE                                (0xC026)
-#define PROC_COMMON_AMDINITRESUME_FILECODE                               (0xC027)
-#define PROC_COMMON_AMDS3LATERESTORE_FILECODE                            (0xC028)
-#define PROC_COMMON_AMDINITRTB_FILECODE                                  (0xC029)
-#define PROC_COMMON_AMDLATERUNAPTASK_FILECODE                            (0xC02A)
-#define PROC_COMMON_AMDS3FINALRESTORE_FILECODE                           (0xC02B)
-
-#define PROC_COMMON_COMMONRETURNS_FILECODE                               (0xC0C0)
-#define PROC_COMMON_CREATESTRUCT_FILECODE                                (0xC0D0)
-#define PROC_COMMON_COMMONINITS_FILECODE                                 (0xC0F0)
-#define PROC_COMMON_S3RESTORESTATE_FILECODE                              (0xC0F8)
-#define PROC_COMMON_S3SAVESTATE_FILECODE                                 (0xC0F9)
-#define PROC_COMMON_S3INIT_FILECODE                                      (0xC0FA)
-
-#define PROC_CPU_CPUAPCOMM_FILECODE                                      (0xC401)
-#define PROC_CPU_CPUAPCOMMAPIC_FILECODE                                  (0xC402)
-#define PROC_CPU_CPUAPCOMMPCI_FILECODE                                   (0xC403)
-#define PROC_CPU_TABLE_FILECODE                                          (0xC404)
-#define PROC_CPU_CPUEARLYINIT_FILECODE                                   (0xC405)
-#define PROC_CPU_CPUEVENTLOG_FILECODE                                    (0xC406)
-#define PROC_CPU_CPUFAMILYTRANSLATION_FILECODE                           (0xC407)
-#define PROC_CPU_CPUGENERALSERVICES_FILECODE                             (0xC408)
-#define PROC_CPU_CPULATEINIT_FILECODE                                    (0xC40A)
-#define PROC_CPU_CPUMICROCODEPATCH_FILECODE                              (0xC40B)
-#define PROC_CPU_CPUWARMRESET_FILECODE                                   (0xC40C)
-#define PROC_CPU_HEAPMANAGER_FILECODE                                    (0xC40D)
-#define PROC_CPU_CPUBIST_FILECODE                                        (0xC40E)
-#define PROC_CPU_MMIOMAPMANAGER_FILECODE                                 (0xC40F)
-#define PROC_CPU_CPUINITEARLYTABLE_FILECODE                              (0xC410)
-#define PROC_CPU_CPURESETINIT_FILECODE                                   (0xC411)
-#define PROC_CPU_CPUPOSTINIT_FILECODE                                    (0xC420)
-#define PROC_CPU_CPUMIDINIT_FILECODE                                     (0xC421)
-#define PROC_CPU_CPUPOWERMGMT_FILECODE                                   (0xC430)
-#define PROC_CPU_S3_FILECODE                                             (0xC460)
-
-// Family 15h
-#define PROC_CPU_FAMILY_0X15_CPUCOMMONF15UTILITIES_FILECODE              (0xCB01)
-#define PROC_CPU_FAMILY_0X15_CPUF15BRANDID_FILECODE                      (0xCB02)
-#define PROC_CPU_FAMILY_0X15_CPUF15CACHEDEFAULTS_FILECODE                (0xCB03)
-#define PROC_CPU_FAMILY_0X15_CPUF15DMI_FILECODE                          (0xCB04)
-#define PROC_CPU_FAMILY_0X15_CPUF15UTILITIES_FILECODE                    (0xCB08)
-#define PROC_CPU_FAMILY_0X15_CPUF15WHEAINITDATATABLES_FILECODE           (0xCB09)
-#define PROC_CPU_FAMILY_0X15_CPUF15APM_FILECODE                          (0xCB0A)
-#define PROC_CPU_FAMILY_0X15_CPUF15CRAT_FILECODE                         (0xCB0B)
-#define PROC_CPU_FAMILY_0X15_CPUF15MMIOMAP_FILECODE                      (0xCB0C)
-#define PROC_CPU_FAMILY_0X15_CPUF15PREFETCHMODE_FILECODE                 (0xCB0D)
-
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZCOREAFTERRESET_FILECODE          (0xCB70)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZDMI_FILECODE                     (0xCB71)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZNBAFTERRESET_FILECODE            (0xCB72)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZPSTATE_FILECODE                  (0xCB73)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZLOGICALIDTABLES_FILECODE         (0xCB74)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZMICROCODEPATCHTABLES_FILECODE    (0xCB75)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZALLCORETABLES_FILECODE           (0xCB76)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZCOMPUTEUNITTABLES_FILECODE       (0xCB77)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZEQUIVALENCETABLE_FILECODE        (0xCB78)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZPRIMARYCORETABLES_FILECODE       (0xCB79)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZPOWERMGMTSYSTEMTABLES_FILECODE   (0xCB7A)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZUTILITIES_FILECODE               (0xCB7C)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZC6STATE_FILECODE                 (0xCB7D)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZCPB_FILECODE                     (0xCB7E)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZIOCSTATE_FILECODE                (0xCB7F)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZCACHEFLUSHONHALT_FILECODE        (0xCB80)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZHTC_FILECODE                     (0xCB81)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZINITEARLYTABLE_FILECODE          (0xCB82)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZEARLYSAMPLES_FILECODE            (0xCB83)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZPSI_FILECODE                     (0xCB85)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZWORKAROUNDTABLE_FILECODE         (0xCB87)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZCC6EXITCONTROL_FILECODE          (0xCB88)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZCONNECTEDSTANDBY_FILECODE        (0xCB89)
-#define PROC_CPU_FAMILY_0X15_CZ_CPUF15CZBTC_FILECODE                     (0xCB8A)
-
-#define PROC_CPU_FEATURE_CPUCACHEFLUSHONHALT_FILECODE                    (0xDC01)
-#define PROC_CPU_FEATURE_CPUCACHEINIT_FILECODE                           (0xDC02)
-#define PROC_CPU_FEATURE_CPUDMI_FILECODE                                 (0xDC10)
-#define PROC_CPU_FEATURE_CPUPSTATETABLES_FILECODE                        (0xDC43)
-#define PROC_CPU_FEATURE_CPUWHEA_FILECODE                                (0xDC70)
-#define PROC_CPU_FEATURE_CPUC6STATE_FILECODE                             (0xDC82)
-#define PROC_CPU_FEATURE_CPUCPB_FILECODE                                 (0xDC83)
-#define PROC_CPU_FEATURE_CPUIOCSTATE_FILECODE                            (0xDC85)
-#define PROC_CPU_FEATURE_CPUAPM_FILECODE                                 (0xDC86)
-#define PROC_CPU_FEATURE_CPUFEATURES_FILECODE                            (0xDC90)
-#define PROC_CPU_FEATURE_CPUCORELEVELING_FILECODE                        (0xDCB0)
-#define PROC_CPU_FEATURE_CPUPSI_FILECODE                                 (0xDCC0)
-#define PROC_CPU_FEATURE_CPUHTC_FILECODE                                 (0xDCC1)
-#define PROC_CPU_FEATURE_CPUCRAT_FILECODE                                (0xDCD0)
-#define PROC_CPU_FEATURE_CPUCDIT_FILECODE                                (0xDCD1)
-#define PROC_CPU_FEATURE_CPUPREFETCHMODE_FILECODE                        (0xDCD3)
-#define PROC_CPU_FEATURE_CPUCONNECTEDSTANDBY_FILECODE                    (0xDCD5)
-#define PROC_CPU_FEATURE_CPUCC6EXITCONTROL_FILECODE                      (0xDCD6)
-
-#define PROC_RECOVERY_CPU_CPURECOVERY_FILECODE                           (0xDE01)
-
-#define PROC_TOPOLOGY_TOPOMAIN_FILECODE                                  (0xE001)
-#define PROC_TOPOLOGY_TOPONB_FILECODE                                    (0xE002)
-#define PROC_TOPOLOGY_FAM15_TOPONBFAM15_FILECODE                         (0xE087)
-#define PROC_TOPOLOGY_FAM15_TOPONBUTILITIESFAM15_FILECODE                (0xE088)
-
-#define PROC_RECOVERY_TOPOLOGY_TOPOINITRECOVERY_FILECODE                 (0xE0FF)
-
-#define PROC_IDS_CONTROL_IDSCTRL_FILECODE                                (0xE801)
-#define PROC_IDS_LIBRARY_IDSLIB_FILECODE                                 (0xE802)
-#define PROC_IDS_DEBUG_IDSDEBUG_FILECODE                                 (0xE803)
-#define PROC_IDS_PERF_IDSPERF_FILECODE                                   (0xE804)
-#define PROC_IDS_FAMILY_0X15_IDSF15ALLSERVICE_FILECODE                   (0xE80C)
-
-#define PROC_IDS_LIBRARY_IDSREGACC_FILECODE                              (0xE810)
-#define PROC_IDS_DEBUG_IDSDPHDTOUT_FILECODE                              (0xE811)
-#define PROC_IDS_DEBUG_IDSDEBUGPRINT_FILECODE                            (0xE812)
-#define PROC_IDS_DEBUG_IDSDPSERIAL_FILECODE                              (0xE813)
-#define PROC_IDS_DEBUG_IDSDPREDIRECTIO_FILECODE                          (0xE814)
-#define PROC_IDS_DEBUG_IDSDPRAM_FILECODE                                 (0xE815)
-
-#define PROC_IDS_DEBUG_IDSIDTTABLE_FILECODE                              (0xE81E)
-#define PROC_IDS_CONTROL_IDSNVTOCMOS_FILECODE                            (0xE81F)
-#define PROC_IDS_FAMILY_0X15_CZ_IDSF15CZALLSERVICE_FILECODE              (0xE821)
-
-
-///0xE820 ~ 0xE840 is reserved for ids extend module
-
-#define PROC_MEM_ARDK_MA_FILECODE                                    (0xF001)
-
-#define PROC_MEM_FEAT_CHINTLV_MFCHI_FILECODE                         (0xF081)
-#define PROC_MEM_FEAT_CSINTLV_MFCSI_FILECODE                         (0xF082)
-#define PROC_MEM_FEAT_ECC_MFECC_FILECODE                             (0xF083)
-#define PROC_MEM_FEAT_ECC_MFEMP_FILECODE                             (0xF085)
-#define PROC_MEM_FEAT_EXCLUDIMM_MFDIMMEXCLUD_FILECODE                (0xF086)
-#define PROC_MEM_FEAT_IDENDIMM_MFIDENDIMM_FILECODE                   (0xF088)
-#define PROC_MEM_FEAT_INTLVRN_MFINTLVRN_FILECODE                     (0xF089)
-#define PROC_MEM_FEAT_LVDDR3_MFLVDDR3_FILECODE                       (0xF08A)
-#define PROC_MEM_FEAT_MEMCLR_MFMEMCLR_FILECODE                       (0xF08B)
-#define PROC_MEM_FEAT_NDINTLV_MFNDI_FILECODE                         (0xF08C)
-#define PROC_MEM_FEAT_ODTHERMAL_MFODTHERMAL_FILECODE                 (0xF08D)
-#define PROC_MEM_FEAT_OLSPARE_MFSPR_FILECODE                         (0xF08E)
-#define PROC_MEM_FEAT_PARTRN_MFSTANDARDTRAINING_FILECODE             (0xF091)
-#define PROC_MEM_FEAT_S3_MFS3_FILECODE                               (0xF092)
-#define PROC_MEM_FEAT_TABLE_MFTDS_FILECODE                           (0xF093)
-#define PROC_MEM_FEAT_CHINTLV_MFMCHI_FILECODE                        (0xF094)
-#define PROC_MEM_FEAT_CRAT_MFCRAT_FILECODE                           (0xF095)
-#define PROC_MEM_FEAT_AMP_MFAMP_FILECODE                             (0xF096)
-#define PROC_MEM_FEAT_DATAEYE_MF2DDATAEYE_FILECODE                   (0xF097)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFWRDAT2DTRAINING_FILECODE         (0xF098)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFRDWR2DEYERIMSEARCH_FILECODE      (0xF099)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFRDDQS2DTRAINING_FILECODE         (0xF09A)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFRDWR2DTRAINING_FILECODE          (0xF09B)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFRDWR2DPATTERNGENERATION_FILECODE (0xF09C)
-#define PROC_MEM_FEAT_AGGRESSOR_MFAGGRESSOR_FILECODE                    (0xF09F)
-#define PROC_MEM_FEAT_DLLPDBYPASS_MFDLLPDBYPASS_FILECODE                (0xF0A0)
-
-#define PROC_MEM_MAIN_MDEF_FILECODE                                  (0xF101)
-#define PROC_MEM_MAIN_MINIT_FILECODE                                 (0xF102)
-#define PROC_MEM_MAIN_MM_FILECODE                                    (0xF103)
-#define PROC_MEM_FEAT_DMI_MFDMI_FILECODE                             (0xF104)
-#define PROC_MEM_MAIN_MMECC_FILECODE                                 (0xF105)
-#define PROC_MEM_MAIN_MMEXCLUDEDIMM_FILECODE                         (0xF106)
-#define PROC_MEM_MAIN_MMNODEINTERLEAVE_FILECODE                      (0xF10B)
-#define PROC_MEM_MAIN_MMONLINESPARE_FILECODE                         (0xF10C)
-#define PROC_MEM_MAIN_MMPARALLELTRAINING_FILECODE                    (0xF10D)
-#define PROC_MEM_MAIN_MMSTANDARDTRAINING_FILECODE                    (0xF10E)
-#define PROC_MEM_MAIN_MUC_FILECODE                                   (0xF10F)
-#define PROC_MEM_MAIN_MMMEMCLR_FILECODE                              (0xF110)
-#define PROC_MEM_MAIN_MMFLOW_FILECODE                                (0xF112)
-#define PROC_MEM_MAIN_MERRHDL_FILECODE                               (0xF113)
-#define PROC_MEM_MAIN_MMLVDDR3_FILECODE                              (0xF115)
-#define PROC_MEM_MAIN_MMUMAALLOC_FILECODE                            (0xF116)
-#define PROC_MEM_MAIN_MMMEMRESTORE_FILECODE                          (0xF117)
-#define PROC_MEM_MAIN_MMCONDITIONALPSO_FILECODE                      (0xF118)
-#define PROC_MEM_MAIN_MMAGGRESSOR_FILECODE                           (0xF119)
-#define PROC_MEM_MAIN_CZ_MMFLOWD3CZ_FILECODE                         (0xF127)
-
-#define PROC_MEM_NB_MN_FILECODE                                      (0XF27C)
-#define PROC_MEM_NB_MNDCT_FILECODE                                   (0XF27D)
-#define PROC_MEM_NB_MNPHY_FILECODE                                   (0XF27E)
-#define PROC_MEM_NB_MNMCT_FILECODE                                   (0XF27F)
-#define PROC_MEM_NB_MNS3_FILECODE                                    (0XF280)
-#define PROC_MEM_NB_MNFLOW_FILECODE                                  (0XF281)
-#define PROC_MEM_NB_MNFEAT_FILECODE                                  (0XF282)
-#define PROC_MEM_NB_MNTRAIN3_FILECODE                                (0XF284)
-#define PROC_MEM_NB_MNREG_FILECODE                                   (0XF285)
-#define PROC_MEM_NB_MNPMU_FILECODE                                   (0xF2B7)
-#define PROC_MEM_NB_CZ_MNCZ_FILECODE                                 (0xF2D8)
-#define PROC_MEM_NB_CZ_MNDCTCZ_FILECODE                              (0xF2D9)
-#define PROC_MEM_NB_CZ_MNIDENDIMMCZ_FILECODE                         (0xF2DA)
-#define PROC_MEM_NB_CZ_MNMCTCZ_FILECODE                              (0xF2DB)
-#define PROC_MEM_NB_CZ_MNPHYCZ_FILECODE                              (0xF2DC)
-#define PROC_MEM_NB_CZ_MNPMUCZ_FILECODE                              (0xF2DD)
-#define PROC_MEM_NB_CZ_MNPMUSRAMMSGBLOCKCZ_FILECODE                  (0xF2DE)
-#define PROC_MEM_NB_CZ_MNPROTOCZ_FILECODE                            (0xF2DF)
-#define PROC_MEM_NB_CZ_MNREGCZ_FILECODE                              (0xF2E0)
-#define PROC_MEM_NB_CZ_MNS3CZ_FILECODE                               (0xF2E1)
-#define PROC_MEM_NB_CZ_MNPSPCZ_FILECODE                              (0XF2E3)
-
-
-#define PROC_MEM_PS_MP_FILECODE                                      (0XF401)
-#define PROC_MEM_PS_MPRTT_FILECODE                                   (0XF422)
-#define PROC_MEM_PS_MPMAXFREQ_FILECODE                               (0XF423)
-#define PROC_MEM_PS_MPODTPAT_FILECODE                                (0XF424)
-#define PROC_MEM_PS_MPSAO_FILECODE                                   (0XF425)
-#define PROC_MEM_PS_MPMR0_FILECODE                                   (0XF426)
-#define PROC_MEM_PS_MPRC2IBT_FILECODE                                (0XF427)
-#define PROC_MEM_PS_MPRC10OPSPD_FILECODE                             (0XF428)
-#define PROC_MEM_PS_MPLRIBT_FILECODE                                 (0XF429)
-#define PROC_MEM_PS_MPLRNPR_FILECODE                                 (0XF42A)
-#define PROC_MEM_PS_MPLRNLR_FILECODE                                 (0XF42B)
-#define PROC_MEM_PS_MPS2D_FILECODE                                   (0XF436)
-#define PROC_MEM_PS_MPSEEDS_FILECODE                                 (0XF437)
-#define PROC_MEM_PS_MPCADCFG_FILECODE                                (0XF43C)
-#define PROC_MEM_PS_MPDATACFG_FILECODE                               (0XF43D)
-#define PROC_MEM_PS_CZ_MPCZ3_FILECODE                                (0XF445)
-#define PROC_MEM_PS_CZ_MPSCZ3_FILECODE                               (0XF446)
-#define PROC_MEM_PS_CZ_MPUCZ3_FILECODE                               (0XF447)
-#define PROC_MEM_PS_CZ_FP4_MPSCZFP4_FILECODE                         (0XF44A)
-#define PROC_MEM_PS_CZ_FP4_MPUCZFP4_FILECODE                         (0XF44B)
-
-
-#define PROC_MEM_TECH_MT_FILECODE                                    (0XF501)
-#define PROC_MEM_TECH_MTHDI_FILECODE                                 (0XF502)
-#define PROC_MEM_TECH_MTTDIMBT_FILECODE                              (0XF504)
-#define PROC_MEM_TECH_MTTECC_FILECODE                                (0XF505)
-#define PROC_MEM_TECH_MTTHRC_FILECODE                                (0XF506)
-#define PROC_MEM_TECH_MTTML_FILECODE                                 (0XF507)
-#define PROC_MEM_TECH_MTTOPTSRC_FILECODE                             (0XF509)
-#define PROC_MEM_TECH_MTTSRC_FILECODE                                (0XF50B)
-#define PROC_MEM_TECH_MTTEDGEDETECT_FILECODE                         (0XF50C)
-#define PROC_MEM_TECH_DDR3_MT3_FILECODE                              (0XF581)
-#define PROC_MEM_TECH_DDR3_MTOT3_FILECODE                            (0XF583)
-#define PROC_MEM_TECH_DDR3_MTRCI3_FILECODE                           (0XF584)
-#define PROC_MEM_TECH_DDR3_MTSDI3_FILECODE                           (0XF585)
-#define PROC_MEM_TECH_DDR3_MTSPD3_FILECODE                           (0XF586)
-#define PROC_MEM_TECH_DDR3_MTTWL3_FILECODE                           (0XF587)
-#define PROC_MEM_TECH_DDR3_MTTECC3_FILECODE                          (0XF588)
-#define PROC_MEM_TECH_DDR3_MTLRDIMM3_FILECODE                        (0XF589)
-#define PROC_MEM_TECH_MTTHRCSEEDTRAIN_FILECODE                       (0XF58A)
-#define PROC_MEM_TECH_MTTRDDQS2DTRAINING_FILECODE                    (0XF58B)
-#define PROC_MEM_TECH_MTTRDDQS2DEYERIMSEARCH_FILECODE                (0XF58C)
-
-#define PROC_MEM_X86_MEMINITLIBX86_FILECODE                             (0xF590)
-#define PROC_MEM_A57_MEMINITLIBA57_FILECODE                             (0xF591)
-
-#define PROC_RECOVERY_MEM_MRDEF_FILECODE                             (0XF801)
-#define PROC_RECOVERY_MEM_MRINIT_FILECODE                            (0XF802)
-#define PROC_RECOVERY_MEM_MRM_FILECODE                               (0XF803)
-#define PROC_RECOVERY_MEM_MRUC_FILECODE                              (0XF804)
-#define PROC_RECOVERY_MEM_TECH_MRTTPOS_FILECODE                      (0XF8C1)
-#define PROC_RECOVERY_MEM_TECH_MRTTSRC_FILECODE                      (0XF8C2)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRT3_FILECODE                    (0XF8C3)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRTRCI3_FILECODE                 (0XF8C4)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRTSDI3_FILECODE                 (0XF8C5)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRTSPD3_FILECODE                 (0XF8C6)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRTTWL3_FILECODE                 (0XF8C7)
-#define PROC_RECOVERY_MEM_NB_MRN_FILECODE                            (0XF8C8)
-#define PROC_RECOVERY_MEM_NB_MRNDCT_FILECODE                         (0XF8C9)
-#define PROC_RECOVERY_MEM_NB_MRNMCT_FILECODE                         (0XF8CA)
-#define PROC_RECOVERY_MEM_NB_MRNTRAIN3_FILECODE                      (0XF8CB)
-#define PROC_RECOVERY_MEM_TECH_MRTTHRC_FILECODE                      (0XF8CC)
-#define PROC_RECOVERY_MEM_PS_MRP_FILECODE                            (0XF8E0)
-#define PROC_RECOVERY_MEM_PS_MRPRTT_FILECODE                         (0XF8E1)
-#define PROC_RECOVERY_MEM_PS_MRPODTPAT_FILECODE                      (0XF8E2)
-#define PROC_RECOVERY_MEM_PS_MRPSAO_FILECODE                         (0XF8E3)
-#define PROC_RECOVERY_MEM_PS_MRPMR0_FILECODE                         (0XF8E4)
-#define PROC_RECOVERY_MEM_PS_MRPRC2IBT_FILECODE                      (0XF8E5)
-#define PROC_RECOVERY_MEM_PS_MRPRC10OPSPD_FILECODE                   (0XF8E6)
-#define PROC_RECOVERY_MEM_PS_MRPLRIBT_FILECODE                       (0XF8E7)
-#define PROC_RECOVERY_MEM_PS_MRPLRNPR_FILECODE                       (0XF8E8)
-#define PROC_RECOVERY_MEM_PS_MRPLRNLR_FILECODE                       (0XF8E9)
-#define PROC_RECOVERY_MEM_TECH_MRTTHRCSEEDTRAIN_FILECODE             (0XF8FA)
-
-//Psp
-#define PROC_PSP_PSPBASELIB_PSPBASELIB_FILECODE                      (0xFA20)
-
-#endif // _FILECODE_H_

pi/amd/00660F01/Include/GeneralServices.h

diff --git a/pi/amd/00660F01/Include/GeneralServices.h b/pi/amd/00660F01/Include/GeneralServices.h
deleted file mode 100644
index aea946a..0000000
--- a/pi/amd/00660F01/Include/GeneralServices.h
+++ /dev/null
@@ -1,222 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * General Services
- *
- * Provides Services similar to the external General Services API, except
- * suited to use within AGESA components.  Socket, Core and PCI identification.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Common
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _GENERAL_SERVICES_H_
-#define _GENERAL_SERVICES_H_
-
-/*----------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *----------------------------------------------------------------------------------------
- */
-#define NUMBER_OF_EVENT_DATA_PARAMS 4
-
-/**
- * AMD Device id for MMIO check.
- */
-#define AMD_DEV_VEN_ID 0x1022
-#define AMD_DEV_VEN_ID_ADDRESS 0
-
-/*----------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *----------------------------------------------------------------------------------------
- */
-
-/**
- * An AGESA Event Log entry.
- */
-typedef struct {
-  AGESA_STATUS EventClass;   ///< The severity of the event, its associated AGESA_STATUS.
-  UINT32   EventInfo;        ///< Uniquely identifies the event.
-  UINT32   DataParam1;       ///< Event specific additional data
-  UINT32   DataParam2;       ///< Event specific additional data
-  UINT32   DataParam3;       ///< Event specific additional data
-  UINT32   DataParam4;       ///< Event specific additional data
-} AGESA_EVENT;
-
-/*----------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *----------------------------------------------------------------------------------------
- */
-
-/**
- * Get a specified Core's APIC ID.
- *
- * @param[in]    StdHeader    Header for library and services.
- * @param[in]    Socket       The Core's Socket.
- * @param[in]    Core         The Core id.
- * @param[out]   ApicAddress  The Core's APIC ID.
- * @param[out]   AgesaStatus  Aggregates AGESA_STATUS for external interface, Always Succeeds.
- *
- * @retval       TRUE         The core is present, APIC Id valid
- * @retval       FALSE        The core is not present, APIC Id not valid.
- */
-BOOLEAN
-GetApicId (
-  IN       AMD_CONFIG_PARAMS *StdHeader,
-  IN       UINT32            Socket,
-  IN       UINT32            Core,
-     OUT   UINT8             *ApicAddress,
-     OUT   AGESA_STATUS      *AgesaStatus
-);
-
-/**
- * Get Processor Module's PCI Config Space address.
- *
- * @param[in]    StdHeader    Header for library and services.
- * @param[in]    Socket       The Core's Socket.
- * @param[in]    Module       The Module in that Processor
- * @param[out]   PciAddress   The Processor's PCI Config Space address (Function 0, Register 0)
- * @param[out]   AgesaStatus  Aggregates AGESA_STATUS for external interface, Always Succeeds.
- *
- * @retval       TRUE         The core is present, PCI Address valid
- * @retval       FALSE        The core is not present, PCI Address not valid.
- */
-BOOLEAN
-GetPciAddress (
-  IN       AMD_CONFIG_PARAMS *StdHeader,
-  IN       UINT32            Socket,
-  IN       UINT32            Module,
-     OUT   PCI_ADDR          *PciAddress,
-     OUT   AGESA_STATUS      *AgesaStatus
-);
-
-/**
- * "Who am I" for the current running core.
- *
- * @param[in]    StdHeader    Header for library and services.
- * @param[out]   Socket       The current Core's Socket
- * @param[out]   Module       The current Core's Processor Module
- * @param[out]   Core         The current Core's core id.
- * @param[out]   AgesaStatus  Aggregates AGESA_STATUS for external interface, Always Succeeds.
- *
- */
-VOID
-IdentifyCore (
-  IN       AMD_CONFIG_PARAMS *StdHeader,
-     OUT   UINT32            *Socket,
-     OUT   UINT32            *Module,
-     OUT   UINT32            *Core,
-     OUT   AGESA_STATUS      *AgesaStatus
-);
-
-/*---------------------------------------------------------------------------------------*/
-/**
- *  Is this the BSP core?
- *
- *  @param[in,out]   StdHeader        Header for library and services
- *
- *  @retval          TRUE             Is BSP core
- *  @retval          FALSE            Is not BSP Core
- *
- */
-BOOLEAN
-IsBsp (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-/**
- * This function logs AGESA events into the event log.
- */
-VOID
-PutEventLog (
-  IN       AGESA_STATUS EventClass,
-  IN       UINT32 EventInfo,
-  IN       UINT32 DataParam1,
-  IN       UINT32 DataParam2,
-  IN       UINT32 DataParam3,
-  IN       UINT32 DataParam4,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-/**
- * This function gets event logs from the circular buffer.
- */
-AGESA_STATUS
-GetEventLog (
-     OUT   AGESA_EVENT *EventRecord,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-/**
- * This function gets event logs from the circular buffer without flushing the entry.
- */
-BOOLEAN
-PeekEventLog (
-     OUT   AGESA_EVENT *EventRecord,
-  IN       UINT16 Index,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * This routine programs the registers necessary to get the PCI MMIO mechanism
- * up and functioning.
- */
-VOID
-InitializePciMmio (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-/*---------------------------------------------------------------------------------------*/
-/**
- *
- * Is it SecureS3
- *
- * @param[in]    StdHeader        Header for library and services
- *
- * @retval       TRUE             It's SecureS3
- * @retval       FALSE            It's NOT SecureS3
- *
- */
-BOOLEAN
-IsSecureS3 (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-#endif  // _GENERAL_SERVICES_H_

pi/amd/00660F01/Include/Ids.h

diff --git a/pi/amd/00660F01/Include/Ids.h b/pi/amd/00660F01/Include/Ids.h
deleted file mode 100644
index cb10186..0000000
--- a/pi/amd/00660F01/Include/Ids.h
+++ /dev/null
@@ -1,1484 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD IDS Routines
- *
- * Contains AMD AGESA Integrated Debug Macros
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 309899 $   @e \$Date: 2014-12-23 02:21:13 -0600 (Tue, 23 Dec 2014) $
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-  /* Macros to aid debugging */
-  /* These definitions expand to zero (0) bytes of code when disabled */
-
-#ifndef _IDS_H_
-#define _IDS_H_
-
-#undef FALSE
-#undef TRUE
-#define FALSE 0
-#define TRUE  1
-// Proto type for optionsids.h
-typedef UINT32 IDS_STATUS;  ///< Status of IDS function.
-#define IDS_SUCCESS         ((IDS_STATUS) 0x00000000ul) ///< IDS Function is Successful.
-#define IDS_UNSUPPORTED     ((IDS_STATUS) 0xFFFFFFFFul) ///< IDS Function is not existed.
-
-#define IDS_STRINGIZE(a) #a ///< for define stringize macro
-#ifndef IDS_DEADLOOP
-  #define IDS_DEADLOOP()    { volatile UINTN __i; __i = 1; while (__i); }
-#endif
-/**
- *  IDS Option Hook Points
- *
- *  These are the values to indicate hook point in AGESA for IDS Options.
- *
- */
-typedef enum {                        //vv- for debug reference only
-  IDS_INIT_EARLY_BEFORE,              ///< 00 Option Hook Point before AGESA function AMD_INIT_EARLY.
-                                          ///<   IDS Object is initialized.
-                                          ///<   Override CPU Core Leveling Mode.
-                                          ///<   Set P-State in Post
-  IDS_INIT_EARLY_AFTER,               ///< 01 Option Hook Point after AGESA function AMD_INIT_EARLY.
-  IDS_INIT_LATE_BEFORE,               ///< 02 Option Hook Point before AGESA function AMD_INIT_LATE.
-                                          ///< It will be used to control the following tables.
-                                          ///<   ACPI P-State Table (_PSS, XPSS, _PCT, _PSD, _PPC)
-                                          ///<   ACPI WHEA Table
-                                          ///<   DMI Table
-  IDS_INIT_LATE_AFTER,                ///< 03 Option Hook Point after AGESA function AMD_INIT_LATE.
-  IDS_INIT_MID_BEFORE,                ///< 04 Option Hook Point before AGESA function AMD_INIT_MID.
-  IDS_INIT_MID_AFTER,                 ///< 05 Option Hook Point after AGESA function AMD_INIT_MID.
-  IDS_INIT_POST_BEFORE,               ///< 06 Option Hook Point before AGESA function AMD_INIT_POST.
-                                          ///<   Control Interleaving and DRAM memory hole
-                                          ///<   Override the setting of ECC Control
-                                          ///<   Override the setting of Online Spare Rank
-  IDS_INIT_POST_AFTER,                ///< 07 Option Hook Point after AGESA function AMD_INIT_POST.
-  IDS_INIT_RESET_BEFORE,              ///< 08 Option Hook Point before AGESA function AMD_INIT_RESET.
-  IDS_INIT_RESET_AFTER,               ///< 09 Option Hook Point after AGESA function AMD_INIT_RESET.
-  IDS_INIT_POST_MID,                  ///< 0a Option Hook Point after AGESA function AMD_INIT_POST.
-  IDS_BEFORE_S3_SAVE,                 ///< 0b override any settings before S3 save.
-  IDS_BEFORE_S3_RESTORE,              ///< 0c  override any settings before S3 restore
-  IDS_AFTER_S3_SAVE,                  ///< 0d Override any settings after S3 save
-  IDS_AFTER_S3_RESTORE,               ///< 0e Override any settings after S3 restore
-  IDS_BEFORE_DQS_TRAINING,            ///< 0f override any settings before DQS training
-  IDS_BEFORE_DRAM_INIT,               ///< 10 override any settings before Dram initialization
-  IDS_BEFORE_MEM_FREQ_CHG,            ///< 11 override settings before MemClk frequency change
-  IDS_BEFORE_WARM_RESET ,             ///< 12 Override PCI or MSR Registers Before Warm Reset
-  IDS_BEFORE_PCI_INIT,                ///< 13 Override PCI or MSR Registers Before PCI Init
-  IDS_BEFORE_AP_EARLY_HALT,           ///< 14 Option Hook Point before AP early halt
-  IDS_BEFORE_S3_RESUME,               ///< 15 Option Hook Point before s3 resume
-  IDS_AFTER_S3_RESUME,                ///< 16 Option Hook Point after s3 resume
-  IDS_BEFORE_PM_INIT,                 ///< 17 Option Hook Point Before Pm Init
-
-  IDS_INIT_RTB_BEFORE,                ///< 18 Option Hook Point before AGESA function AMD_INIT_RTB.
-  IDS_INIT_RTB_AFTER,                 ///< 19 Option Hook Point after AGESA function AMD_INIT_RTB.
-
-  IDS_MT_BASE = 0x20,                 ///< 0x20 ~ 0x38 24 time points reserved for MTTime
-
-  IDS_PLATFORM_RSVD1 = 0x38,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD2 = 0x39,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD3 = 0x3a,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD4 = 0x3b,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD5 = 0x3c,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD6 = 0x3d,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD7 = 0x3e,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD8 = 0x3f,          ///< from 0x38 to 0x3f will reserved for platform used
-
-  // All the above timing point is used by BVM, their value should never be changed
-  IDS_INIT_DRAM_TABLE,                ///< 40 Generate override table for Dram Timing
-                                          ///< Dram Controller, Drive Strength and DQS Timing
-  IDS_GET_DRAM_TABLE,                 ///< 41 Generate override table for Dram Timing
-  IDS_GANGING_MODE,                   ///< 42 override Memory Mode Unganged
-  IDS_POWERDOWN_MODE,                 ///< 43 override Power Down Mode
-  IDS_BURST_LENGTH32,                 ///< 44 override Burst Length32
-  IDS_ALL_MEMORY_CLOCK,               ///< 45 override All Memory Clks Enable
-  IDS_ECC,                            ///< 46 override ECC parameter
-  IDS_ECCSYMBOLSIZE,                  ///< 47 override ECC symbol size
-  IDS_CPU_Early_Override,             ///< 48 override CPU early parameter
-  IDS_CACHE_FLUSH_HLT,                ///< 49 override Cache Flush Hlt
-  IDS_CHANNEL_INTERLEAVE,             ///< 4a override Channel Interleave
-  IDS_MEM_ERROR_RECOVERY,             ///< 4b override memory error recovery
-  IDS_MEM_RETRAIN_TIMES,              ///< 4c override memory retrain times
-  IDS_MEM_SIZE_OVERLAY,               ///< 4d Override the syslimit
-  IDS_CHECK_NEGATIVE_WL,              ///< 4e Check for negative write leveling result
-  IDS_DLL_SHUT_DOWN,                  ///< 4f Check for Dll Shut Down
-  IDS_POR_MEM_FREQ,                   ///< 50 Entry to enable/disable MemClk frequency enforcement
-  IDS_PHY_DLL_STANDBY_CTRL,           ///< 51 Enable/Disable Phy DLL standby feature
-  IDS_PLATFORMCFG_OVERRIDE,           ///< 52 Hook for Override PlatformConfig structure
-  IDS_LOADCARD_ERROR_RECOVERY,        ///< 53 Special error handling for load card support
-  IDS_MEM_IGNORE_ERROR,               ///< 54 Ignore error and do not do fatal exit in memory
-  IDS_GNB_SMU_SERVICE_CONFIG,         ///< 55 Config GNB SMU service
-  IDS_GNB_ORBDYNAMIC_WAKE,            ///< 56 config GNB dynamic wake
-  IDS_GNB_PLATFORMCFG_OVERRIDE,       ///< 57 override ids gnb platform config
-  IDS_GNB_LCLK_DPM_EN,                ///< 58 override GNB LCLK DPM configuration
-  IDS_GNB_LCLK_DEEP_SLEEP,            ///< 59 override GNB LCLK DPM deep sleep
-  IDS_GNB_CLOCK_GATING,               ///< 5a Override GNB Clock gating config
-  IDS_NB_PSTATE_DIDVID,               ///< 5b Override NB P-state settings
-  IDS_CPB_CTRL,                       ///< 5c Config the Core peformance boost feature
-  IDS_HTC_CTRL,                       ///< 5d Hook for Hardware Thermal Control
-  IDS_CC6_WORKAROUND,                 ///< 5e Hook for skip CC6 work around
-  IDS_MEM_MR0,                        ///< 5f Hook for override Memory Mr0 register
-  IDS_TRAP_TABLE,                     ///< 60 Hook for add IDS register table to the loop
-  IDS_NBBUFFERALLOCATIONATEARLY,      ///< 61 Hook for override North bridge bufer allocation
-  IDS_BEFORE_S3_SPECIAL,              ///< 62 Hook to bypass S3 special functions
-  IDS_SET_PCI_REGISTER_ENTRY,         ///< 63 Hook to SetRegisterForPciEntry
-  IDS_ERRATUM463_WORKAROUND,          ///< 64 Hook to Erratum 463 workaround
-  IDS_BEFORE_MEMCLR,                  ///< 65 Hook before set Memclr bit
-  IDS_OVERRIDE_IO_CSTATE,             ///< 66 Hook for override io C-state setting
-  IDS_NBPSDIS_OVERRIDE,               ///< 67 Hook for override NB pstate disable setting
-  IDS_NBPS_REG_OVERRIDE,              ///< 68 Hook for override Memory NBps reg
-  IDS_MEM_PHY_POWER_SAVING,           ///< 69 Hook to bypass DRAM Phy power savings
-  IDS_CST_CREATE,                     ///< 6a Hook for create _CST
-  IDS_CST_SIZE,                       ///< 6b Hook for get _CST size
-  IDS_ENFORCE_VDDIO,                  ///< 6c Hook to override VDDIO
-  IDS_STRETCH_FREQUENCY_LIMIT,        ///< 6d Hook for enforcing memory stretch frequency limit
-  IDS_INIT_MEM_REG_TABLE,             ///< 6e Hook for init memory register table
-  IDS_SKIP_FUSED_MAX_RATE,            ///< 6f Hook to skip fused max rate cap
-  IDS_FCH_INIT_AT_RESET,              ///< 70 Hook for FCH reset parameter
-  IDS_FCH_INIT_AT_ENV,                ///< 71 Hook for FCH ENV parameter
-  IDS_ENFORCE_PLAT_TABLES,            ///< 72 Hook to enforce platform specific tables
-  IDS_NBPS_MIN_FREQ,                  ///< 73 Hook for override MIN nb ps freq
-  IDS_GNB_FORCE_CABLESAFE,            ///< 74 Hook for override Force Cable Safe
-  IDS_SKIP_PM_TRANSITION_STEP,        ///< 75 Hook for provide IDS ability to skip this PM step
-  IDS_GNB_PROPERTY,                   ///< 76 Hook for GNB Property
-  IDS_GNB_PCIE_POWER_GATING,          ///< 77 Hook for GNB PCIe Power Gating
-  IDS_MEM_DYN_DRAM_TERM,              ///< 78 Hook for Override Dynamic Dram Term
-  IDS_MEM_DRAM_TERM,                  ///< 79 Hook for Override Dram Term
-  IDS_GNB_ALTVDDNB,                   ///< 7a Hook for Override AltVddNB
-  IDS_UCODE,                          ///< 7b Enable or Disable microcode patching
-  IDS_FAM_REG_GMMX,                   ///< 7c GMMX register access
-  IDS_MEMORY_POWER_POLICY,            ///< 7d Memory power policy
-  IDS_GET_STRETCH_FREQUENCY_LIMIT,    ///< 7e Hook for enforcing memory stretch frequency limit
-  IDS_CPU_FEAT,                       ///< 7f Hook for runtime force cpu feature disable
-  IDS_AFTER_DCT_PHY_ACCESS,           ///< 80 Hook for DctAccessDone check
-  IDS_FORCE_PHY_TO_M0,                ///< 81 Hook to bypass M0 enforcement
-  IDS_GNB_PMM_SWTJOFFSET,             ///< 82 Hook to GNBSWTJOFFSET
-  IDS_LOCK_DRAM_CFG,                  ///< 83 Hook to BFLockDramCfg
-  IDS_BEFORE_GEN2_INIT,               ///< 84 Hook to Before Gen2 Init
-  IDS_BEFORE_GPP_TRAINING,            ///< 85 Hook to Before Gpp training
-  IDS_BEFORE_RECONFIGURATION,         ///< 86 Hook to Before Reconfiguration
-  IDS_BEFORE_GEN3_INIT,               ///< 87 Hook to Before Gen3 Init
-  IDS_BEFORE_POWER_GATING,            ///< 88 Hook to Before Power Gating
-  IDS_AFTER_EARLY_INIT_ONCORE,        ///< 89 Hook to after EarlyInit On Core
-  IDS_GNB_PCIE_PORT_REMAP,            ///< 8a Hook to change mapping of PCIe devices
-  IDS_ECC_CONTROL,                    ///< 8b Enable/Disable ECC feature
-  IDS_GNB_PCIE_PHY_ISOLATION,         ///< 8c Enable/Disable PCIE PHY ISOLATION
-  IDS_AFTER_RESTORING_PCI_REG,        ///< 8d Hook after restoring PCI register during S3 resume
-  IDS_MSR_ACCESS_OVERRIDE,            ///< 8e Hook to disable MSR access
-  IDS_REPORT_SMU_FW_VERSION,          ///< 8f Hook to report SMU firmware version
-  IDS_GNB_LOAD_SAMU_PATCH,            ///< 90 Hook to Load SAMU patch
-  IDS_DLLSTAGGERDLY_OVERRIDE,         ///< 91 Hook to skip Dll Stagger Delay
-  IDS_CSAMPLE_TIMER,                  ///< 92 Hook to override CSampleTimer
-  IDS_PIPE_THROTTLE,                  ///< 93 Hook to override PipeThrottle
-  IDS_GNB_PMM_NATIVEGEN1PLL,          ///< 94 Enable/Disable Native Gen1 PLL
-  IDS_BEFORE_PLAT_TABLES,             ///< 95 Hook before processing platform specific tables
-  IDS_GNB_PCIE_MASTERPLL_SELECTION,   ///< 96 Hook to override PCIe Master PLL selection
-  IDS_GNB_PCIE_PHYLANE_CONFIG,        ///< 97 Hook to override PCIe PhyLane configuration
-  IDS_DSM_LP_SELECTION,               ///< 98 Set Dsm low power mode
-  IDS_GNB_EQUAL_PRESET,               ///< 99 Set equalization preset
-  IDS_GNB_GEN1_LOOPBACK,              ///< 9a Override Gen 1 loopback mode
-  IDS_GNB_SMU_SERVICE_MASK,           ///< 9b Override SMU service enablement mask
-  IDS_BEFORE_HT_MEM_MAP,              ///< 9c Hook before mapping memory address space among DCTs
-  IDS_GNB_GEN3_SETTINGS_OVERRIDE,     ///< 9d Hook to override Gen3 Adapt PI Offset Bypass Enable
-  IDS_GNB_TARGET_TDP,                 ///< 9e Hook to override Target TDP
-  IDS_GNB_SMU_PORT80_PARAMS,          ///< 9f Hook to override gnb smu port80 values
-  IDS_CPU_OVERRIDE_REG_AFTER_AP_LAUNCH, ///< a0 Hook to override registers after AP lauch
-  IDS_AFTER_FEAT_MID_INIT,            ///< a1 Hook to override feature setting after cpuMidInit
-  IDS_MEM_MCLK_ABOVE_NCLK,            ///< a2 Hook to bypass system bandwidth for memory clock
-  IDS_ALL_MEMORY_CKE,                 ///< a3 override All Memory CKE
-  IDS_ALL_MEMORY_CS,                  ///< a4 override All Memory CS
-  IDS_NPST,                           ///< a5 cTDP NbPstate Selection Table
-  IDS_MEM_MRL_RETRAIN_TIMES,          ///< a6 override memory MRL retrain times
-  IDS_AFTER_DQS_TRAINING,             ///< a7 override any settings after DQS training
-  IDS_OVERRIDE_DIMM_MASK,             ///< a8 override DimmMask for S3 data blob creation
-  IDS_BYPASS_S3_REGISTERS,            ///< a9 bypass restoring certain registers
-  IDS_OPTION_END                      ///< AA End of IDS option
-} AGESA_IDS_OPTION;
-
-#include "OptionsIds.h"
-#include "Filecode.h"
-#include "IdsPerf.h"
-
-/* Initialize IDS controls */
-#ifndef IDSOPT_IDS_ENABLED
-  #define IDSOPT_IDS_ENABLED        FALSE
-#endif
-
-#ifndef IDSOPT_CONTROL_ENABLED
-  #define IDSOPT_CONTROL_ENABLED    FALSE
-#endif
-
-#ifndef IDSOPT_CONTROL_NV_TO_CMOS
-  #define IDSOPT_CONTROL_NV_TO_CMOS FALSE
-#endif
-
-#ifndef IDSOPT_TRACING_ENABLED
-  #define IDSOPT_TRACING_ENABLED    FALSE
-#endif
-
-#ifndef IDSOPT_TRACE_USER_OPTIONS
-  #define IDSOPT_TRACE_USER_OPTIONS TRUE
-#endif
-
-#ifndef IDSOPT_PERF_ANALYSIS
-  #define IDSOPT_PERF_ANALYSIS      FALSE
-#endif
-
-#ifndef IDSOPT_HEAP_CHECKING
-  #define IDSOPT_HEAP_CHECKING           FALSE
-#endif
-
-#ifndef IDSOPT_ASSERT_ENABLED
-  #define IDSOPT_ASSERT_ENABLED         FALSE
-#endif
-
-#ifndef IDSOPT_ERROR_TRAP_ENABLED
-  #define IDSOPT_ERROR_TRAP_ENABLED   FALSE
-#endif
-
-#ifndef IDSOPT_CAR_CORRUPTION_CHECK_ENABLED
-  #define IDSOPT_CAR_CORRUPTION_CHECK_ENABLED   FALSE
-#endif
-
-#ifndef IDSOPT_DEBUG_CODE_ENABLED
-  #define IDSOPT_DEBUG_CODE_ENABLED   FALSE
-#endif
-
-#ifndef IDSOPT_IDT_EXCEPTION_TRAP
-  #define IDSOPT_IDT_EXCEPTION_TRAP FALSE
-#endif
-
-#ifndef IDSOPT_C_OPTIMIZATION_DISABLED
-  #define IDSOPT_C_OPTIMIZATION_DISABLED   FALSE
-#endif
-
-#ifndef IDSOPT_TRACING_CONSOLE_HDTOUT
-  #define IDSOPT_TRACING_CONSOLE_HDTOUT   TRUE
-#endif
-
-#ifndef IDSOPT_TRACING_CONSOLE_SERIALPORT
-  #define IDSOPT_TRACING_CONSOLE_SERIALPORT   FALSE
-#endif
-
-#ifndef IDSOPT_TRACING_CONSOLE_REDIRECT_IO
-  #define IDSOPT_TRACING_CONSOLE_REDIRECT_IO  FALSE
-#endif
-
-#ifndef IDSOPT_TRACING_CONSOLE_RAM
-  #define IDSOPT_TRACING_CONSOLE_RAM  FALSE
-#endif
-
-#if IDSOPT_IDS_ENABLED == FALSE
-  #undef  IDSOPT_CONTROL_ENABLED
-  #undef  IDSOPT_TRACING_ENABLED
-  #undef  IDSOPT_PERF_ANALYSIS
-  #undef  IDSOPT_HEAP_CHECKING
-  #undef  IDSOPT_ASSERT_ENABLED
-  #undef  IDSOPT_ERROR_TRAP_ENABLED
-  #undef  IDSOPT_CAR_CORRUPTION_CHECK_ENABLED
-  #undef  IDSOPT_DEBUG_CODE_ENABLED
-  #undef  IDSOPT_TRACE_USER_OPTIONS
-  #undef  IDSOPT_TRACING_CONSOLE_HDTOUT
-  #undef  IDSOPT_TRACING_CONSOLE_SERIALPORT
-  #undef  IDSOPT_TRACING_CONSOLE_REDIRECT_IO
-  #undef  IDSOPT_TRACING_CONSOLE_RAM
-
-  #define IDSOPT_CONTROL_ENABLED    FALSE
-  #define IDSOPT_TRACING_ENABLED    FALSE
-  #define IDSOPT_PERF_ANALYSIS      FALSE
-  #define IDSOPT_HEAP_CHECKING      FALSE
-  #define IDSOPT_ASSERT_ENABLED     FALSE
-  #define IDSOPT_ERROR_TRAP_ENABLED FALSE
-  #define IDSOPT_CAR_CORRUPTION_CHECK_ENABLED FALSE
-  #define IDSOPT_DEBUG_CODE_ENABLED FALSE
-  #define IDSOPT_TRACE_USER_OPTIONS FALSE
-  #define IDSOPT_TRACING_CONSOLE_HDTOUT FALSE
-  #define IDSOPT_TRACING_CONSOLE_SERIALPORT FALSE
-  #define IDSOPT_TRACING_CONSOLE_REDIRECT_IO FALSE
-  #define IDSOPT_TRACING_CONSOLE_RAM FALSE
-#endif
-
-//Disable when master token Tracing is set to FALSE
-#if (IDSOPT_TRACING_ENABLED == FALSE) || (defined (IDSOPT_CUSTOMIZE_TRACING_SERVICE))
-  #undef  IDSOPT_TRACING_CONSOLE_HDTOUT
-  #define IDSOPT_TRACING_CONSOLE_HDTOUT FALSE
-
-  #undef  IDSOPT_TRACING_CONSOLE_SERIALPORT
-  #define IDSOPT_TRACING_CONSOLE_SERIALPORT FALSE
-
-  #undef IDSOPT_TRACING_CONSOLE_REDIRECT_IO
-  #define IDSOPT_TRACING_CONSOLE_REDIRECT_IO FALSE
-
-  #undef IDSOPT_TRACING_CONSOLE_RAM
-  #define IDSOPT_TRACING_CONSOLE_RAM FALSE
-#endif
-
-//Disable Tracing if all support HW layer set to FALSE
-#if ((IDSOPT_TRACING_CONSOLE_HDTOUT == FALSE) && (IDSOPT_TRACING_CONSOLE_SERIALPORT == FALSE) && (IDSOPT_TRACING_CONSOLE_REDIRECT_IO == FALSE) && (IDSOPT_TRACING_CONSOLE_RAM == FALSE))
-  #ifndef IDSOPT_CUSTOMIZE_TRACING_SERVICE
-    #undef  IDSOPT_TRACING_ENABLED
-    #define IDSOPT_TRACING_ENABLED FALSE
-  #endif
-#endif
-/**
- *  Make a Progress Report to the User.
- *
- *  This Macro is always enabled. The default action is to write the TestPoint value
- *  to an I/O port. The I/O port is 8 bits in size and the default address is 0x80.
- *  IBVs can change AGESA's default port by defining IDS_DEBUG_PORT to desired port
- *  in OptionsIds.h in their build tip.
- *
- *  @param[in]      TestPoint       The value for display indicating progress
- *  @param[in,out]  StdHeader       Pointer of AMD_CONFIG_PARAMS
- *
- **/
-
-#define AGESA_TESTPOINT(TestPoint, StdHeader) IdsAgesaTestPoint ((TestPoint), (StdHeader))
-
-#ifndef IDS_DEBUG_PORT
-  #define IDS_DEBUG_PORT  0x80
-#endif
-
-#if IDS_DEBUG_PORT > 0xFFFFul
-  #error "Invalid debug port defined.  IDS_DEBUG_PORT address must not be larger than 16 bits."
-#endif
-
-#ifndef IDS_DEBUG_PORT_SIZE_IN_BYTES
-  #define IDS_DEBUG_PORT_SIZE_IN_BYTES  4
-#endif
-
-#if IDS_DEBUG_PORT_SIZE_IN_BYTES == 1
-  #define IDS_DEBUG_PORT_ACCESSWIDTH  AccessWidth8
-  #ifndef IDS_DEBUG_TP_PREFIX
-    #define IDS_DEBUG_TP_PREFIX  0x00ul
-  #endif
-  #if IDS_DEBUG_TP_PREFIX != 0
-    #error "Invalid debug port prefix defined.  IDS_DEBUG_TP_PREFIX << 8 must not exceed IDS_DEBUG_PORT_SIZE_IN_BYTES."
-  #endif
-#else
-  #if IDS_DEBUG_PORT_SIZE_IN_BYTES == 2
-    #define IDS_DEBUG_PORT_ACCESSWIDTH  AccessWidth16
-    #ifndef IDS_DEBUG_TP_PREFIX
-      #define IDS_DEBUG_TP_PREFIX  0xA0ul
-    #endif
-    #if IDS_DEBUG_TP_PREFIX > 0xFFul
-      #error "Invalid debug port prefix defined.  IDS_DEBUG_TP_PREFIX << 8 must not exceed IDS_DEBUG_PORT_SIZE_IN_BYTES."
-    #endif
-  #else
-    #if IDS_DEBUG_PORT_SIZE_IN_BYTES == 4
-      #define IDS_DEBUG_PORT_ACCESSWIDTH  AccessWidth32
-      #ifndef IDS_DEBUG_TP_PREFIX
-        #define IDS_DEBUG_TP_PREFIX  0xA9E5A0ul
-      #endif
-      #if IDS_DEBUG_TP_PREFIX > 0xFFFFFFul
-        #error "Invalid debug port prefix defined.  IDS_DEBUG_TP_PREFIX << 8 must not exceed IDS_DEBUG_PORT_SIZE_IN_BYTES."
-      #endif
-    #else
-      #error "Invalid debug port size defined.  Acceptable values of IDS_DEBUG_PORT_SIZE_IN_BYTES are 1, 2, or 4."
-    #endif
-  #endif
-#endif
-
-#if (IDS_DEBUG_PORT & (IDS_DEBUG_PORT_SIZE_IN_BYTES - 1)) != 0
-  #error "IDS_DEBUG_PORT must be aligned on IDS_DEBUG_PORT_SIZE_IN_BYTES boundary."
-#endif
-
-/**
- * @def STOP_HERE
- *  (macro) - Causes program to halt. This is @b only for use during active debugging .
- *
- *  Causes the program to halt and display the file number of the source of the
- *  halt (displayed in decimal).
- *
- **/
-#if IDSOPT_IDS_ENABLED == TRUE
-  #ifdef STOP_CODE
-    #undef STOP_CODE
-  #endif
-  #define STOP_CODE (((UINT32)FILECODE)*0x10000ul + \
-                      ((__LINE__) % 10) + (((__LINE__ / 10) % 10)*0x10) + \
-                      (((__LINE__ / 100) % 10)*0x100) + (((__LINE__ / 1000) % 10)*0x1000))
-  #define STOP_HERE IdsErrorStop (STOP_CODE);
-#else
-  #define STOP_HERE  STOP_HERE_Needs_To_Be_Removed //"WARNING: Debug code needs to be removed for production builds."
-#endif
-
-/**
- * @def ASSERT
- *  Test an assertion that the given statement is True.
- *
- *  The statement is evaluated to a boolean value. If the statement is True,
- *  then no action is taken (no error). If the statement is False, a error stop
- *  is generated to halt the program. Used for testing for fatal errors that
- *  must be resolved before production. This is used to do parameter checks,
- *  bounds checking, range checks and 'sanity' checks.
- *
- * @param[in]   conditional    Assert that evaluating this conditional results in TRUE.
- *
- **/
-#ifndef ASSERT
-  #if IDSOPT_ASSERT_ENABLED == TRUE
-    #ifdef STOP_CODE
-      #undef STOP_CODE
-    #endif
-    #define STOP_CODE (((UINT32)FILECODE)*0x10000ul + \
-                        ((__LINE__) % 10) + (((__LINE__ / 10) % 10)*0x10) + \
-                        (((__LINE__ / 100) % 10)*0x100) + (((__LINE__ / 1000) % 10)*0x1000))
-
-    #define ASSERT(conditional) ((conditional) ? 0 : IdsAssert (STOP_CODE));
-  #else
-    #define ASSERT(conditional)
-  #endif
-#endif
-
-#if IDSOPT_CAR_CORRUPTION_CHECK_ENABLED == TRUE
-  #undef  IDSOPT_ERROR_TRAP_ENABLED
-  #define IDSOPT_ERROR_TRAP_ENABLED TRUE
-  #define IDS_CAR_CORRUPTION_CHECK(StdHeader)  IdsCarCorruptionCheck(StdHeader)
-#else
-  #define IDS_CAR_CORRUPTION_CHECK(StdHeader)
-#endif
-/**
- * @def DEBUG_CODE
- * Make the code active when IDSOPT_DEBUG_CODE_ENABLED enable
- *
- */
-#ifndef DEBUG_CODE
-  #if IDSOPT_DEBUG_CODE_ENABLED == TRUE
-    #define  DEBUG_CODE(Code) Code
-  #else
-    #define  DEBUG_CODE(Code)
-  #endif
-#endif
-
-/**
- * @def IDS_ERROR_TRAP
- * Trap AGESA Error events with stop code display.
- *
- * Works similarly to use of "ASSERT (FALSE);"
- *
- */
-#if IDSOPT_ERROR_TRAP_ENABLED == TRUE
-  #ifdef STOP_CODE
-    #undef STOP_CODE
-  #endif
-  #define STOP_CODE (((UINT32)FILECODE)*0x10000ul + \
-                      ((__LINE__) % 10) + (((__LINE__ / 10) % 10)*0x10) + \
-                      (((__LINE__ / 100) % 10)*0x100) + (((__LINE__ / 1000) % 10)*0x1000))
-
-  #define IDS_ERROR_TRAP  IdsErrorStop (STOP_CODE)
-#else
-  #define IDS_ERROR_TRAP
-#endif
-
-///give the extended Macro default value
-#ifndef __IDS_EXTENDED__
-  #define IDS_EXTENDED_HOOK(idsoption, dataptr, idsnvptr, stdheader) IDS_SUCCESS
-  #define IDS_TRACE_DEFAULT (0)
-  #define IDS_INITIAL_F15_CZ_PM_STEP
-  #define IDS_F15_CZ_PM_CUSTOM_STEP
-  #define IDS_EXTENDED_GET_DATA_EARLY(data, StdHeader)
-  #define IDS_EXTENDED_GET_DATA_LATE(data, StdHeader)
-  #define IDS_EXTENDED_HEAP_SIZE 0
-  #define IDS_EXT_INCLUDE_F15(file)
-  #define IDS_EXT_INCLUDE(file)
-  #define IDS_PAD_4K
-  #define IDS_EXTENDED_CODE(code)
-  #define SMU_FIRMWARE_PADS_1K
-#endif
-
-#ifndef IDS_NUM_NV_ITEM
-  #define IDS_NUM_NV_ITEM (IDS_NUM_EXT_NV_ITEM)
-#endif
-
-#define IDS_CMOS_INDEX_PORT 0x70
-#define IDS_CMOS_DATA_PORT 0x71
-#define IDS_CMOS_REGION_START 0x20
-#define IDS_CMOS_REGION_END 0x7F
-#define IDS_AP_GET_NV_FROM_CMOS(x) FALSE
-
-#if IDSOPT_CONTROL_ENABLED == TRUE
-  #define IDS_OPTION_HOOK(IdsOption, DataPtr, StdHeader) \
-          AmdIdsCtrlDispatcher ((IdsOption), (DataPtr), (StdHeader))
-
-  #define IDS_OPTION_CALLOUT(CallOutId, DataPtr, StdHeader) \
-          IdsOptionCallout ((CallOutId), (DataPtr), (StdHeader))
-  #if IDSOPT_CONTROL_NV_TO_CMOS == TRUE
-    #undef IDS_AP_GET_NV_FROM_CMOS
-    #define IDS_AP_GET_NV_FROM_CMOS(x) AmdIdsApGetNvFromCmos(x)
-    #ifdef IDS_OPT_CMOS_INDEX_PORT
-      #undef IDS_CMOS_INDEX_PORT
-      #define IDS_CMOS_INDEX_PORT IDS_OPT_CMOS_INDEX_PORT
-    #endif
-
-    #ifdef IDS_OPT_CMOS_DATA_PORT
-      #undef IDS_CMOS_DATA_PORT
-      #define IDS_CMOS_DATA_PORT IDS_OPT_CMOS_DATA_PORT
-    #endif
-
-    #ifdef IDS_OPT_CMOS_REGION_START
-      #undef IDS_CMOS_REGION_START
-      #define IDS_CMOS_REGION_START IDS_OPT_CMOS_REGION_START
-    #endif
-
-    #ifdef IDS_OPT_CMOS_REGION_END
-      #undef IDS_CMOS_REGION_END
-      #define IDS_CMOS_REGION_END IDS_OPT_CMOS_REGION_END
-    #endif
-  #endif
-#else
-  #define IDS_OPTION_HOOK(IdsOption, DataPtr, StdHeader)
-
-  #define IDS_OPTION_CALLOUT(CallOutId, DataPtr, StdHeader) AGESA_SUCCESS
-#endif
-
-/**
- *  Macro to add a *skip* hook for IDS options
- *
- *  The default minimal action is to do nothing and there is no any code to increase.
- *  For debug environments, IDS dispatcher function will be called to perform
- *  the detailed action and to skip AGESA code if necessary.
- *
- * @param[in]       IdsOption       IDS Option ID for this hook point
- * @param[in, out]  DataPtr         Data Pointer to override
- * @param[in, out]  StdHeader       Pointer of AMD_CONFIG_PARAMS
- *
- *
- **/
-
-#if IDSOPT_CONTROL_ENABLED == TRUE
-  #define IDS_SKIP_HOOK(IdsOption, DataPtr, StdHeader) \
-          if (AmdIdsCtrlDispatcher (IdsOption, DataPtr, StdHeader) == IDS_SUCCESS)
-#else
-  #define IDS_SKIP_HOOK(IdsOption, DataPtr, StdHeader)
-#endif
-
-/**
- *  Macro to add a heap manager routine
- *
- *  when memory is allocated the heap manager actually allocates two extra dwords of data,
- *  one dword buffer before the actual memory, and one dword afterwards.
- *  a complete heap walk and check to be performed at any time.
- *  it would ASSERT if the heap is corrupt
- *
- * @param[in]  StdHeader       Pointer of AMD_CONFIG_PARAMS
- *
- *
- **/
-
-// Heap debug feature
-#define SENTINEL_BEFORE_VALUE 0x64616548ul    // "Head"
-#define SENTINEL_AFTER_VALUE  0x6C696154ul    // "Tail"
-#if IDSOPT_IDS_ENABLED == TRUE
-  #if IDSOPT_HEAP_CHECKING == TRUE
-    #define SIZE_OF_SENTINEL  4
-    #define NUM_OF_SENTINEL   2             // Before ("Head") and After ("Tail")
-    #define SET_SENTINEL_BEFORE(NodePtr, AlignTo16Byte) (*(UINT32 *) ((UINT8 *) NodePtr + sizeof (BUFFER_NODE) + AlignTo16Byte) = SENTINEL_BEFORE_VALUE);
-    #define SET_SENTINEL_AFTER(NodePtr) (*(UINT32 *) ((UINT8 *) NodePtr + sizeof (BUFFER_NODE) + NodePtr->BufferSize - SIZE_OF_SENTINEL) = SENTINEL_AFTER_VALUE);
-    #define Heap_Check(stdheader) AmdHeapIntactCheck(stdheader)
-  #else
-    #define SIZE_OF_SENTINEL  0
-    #define NUM_OF_SENTINEL   0
-    #define SET_SENTINEL_BEFORE(NodePtr, AlignTo16Byte)
-    #define SET_SENTINEL_AFTER(NodePtr)
-    #define Heap_Check(stdheader)
-  #endif
-#else
-  #define SIZE_OF_SENTINEL    0
-  #define NUM_OF_SENTINEL     0
-  #define SET_SENTINEL_BEFORE(NodePtr, AlignTo16Byte)
-  #define SET_SENTINEL_AFTER(NodePtr)
-  #define Heap_Check(stdheader)
-#endif
-
-/**
- *  Macro to add IDT for debugging exception.
- *
- *  A debug feature. Adding a 'jmp $' into every exception handler.
- *  So debugger could use HDT to skip 'jmp $' and execute the iret,
- *  then they could find which instruction cause the exception.
- *
- * @param[in]       FunctionId      IDS Function ID for this hook point
- * @param[in, out]  DataPtr         Data Pointer to override
- * @param[in, out]  StdHeader       Pointer of AMD_CONFIG_PARAMS
- *
- *
- **/
-#if IDSOPT_IDS_ENABLED == TRUE
-  #if IDSOPT_IDT_EXCEPTION_TRAP == TRUE
-    #define IDS_EXCEPTION_TRAP(FunctionId, DataPtr, StdHeader) IdsExceptionTrap (FunctionId, DataPtr, StdHeader)
-  #else
-    #define IDS_EXCEPTION_TRAP(FunctionId, DataPtr, StdHeader)
-  #endif
-#else
-  #define IDS_EXCEPTION_TRAP(FunctionId, DataPtr, StdHeader)
-#endif
-
-
- //Note a is from 0 to 63
-#define DEBUG_PRINT_SHIFT(a)   ((UINT64)1 << a)
-//If you change the Bitmap definition below, please change the Hash in ParseFilter of hdtout2008.pl accordingly
-//Memory Masks
-#define MEM_SETREG                                  DEBUG_PRINT_SHIFT (0)
-#define MEM_GETREG                                  DEBUG_PRINT_SHIFT (1)
-#define MEM_FLOW                                    DEBUG_PRINT_SHIFT (2)
-#define MEM_STATUS                                  DEBUG_PRINT_SHIFT (3)
-#define MEM_UNDEF_BF                                DEBUG_PRINT_SHIFT (4)
-#define MEMORY_TRACE_RSV2                           DEBUG_PRINT_SHIFT (5)
-#define MEMORY_TRACE_RSV3                           DEBUG_PRINT_SHIFT (6)
-#define MEMORY_TRACE_RSV4                           DEBUG_PRINT_SHIFT (7)
-#define MEMORY_TRACE_RSV5                           DEBUG_PRINT_SHIFT (8)
-#define MEMORY_TRACE_RSV6                           DEBUG_PRINT_SHIFT (9)
-
-//CPU Masks
-#define CPU_TRACE                                   DEBUG_PRINT_SHIFT (10)
-#define CPU_TRACE_RSV1                              DEBUG_PRINT_SHIFT (11)
-#define CPU_TRACE_RSV2                              DEBUG_PRINT_SHIFT (12)
-#define CPU_TRACE_RSV3                              DEBUG_PRINT_SHIFT (13)
-#define CPU_TRACE_RSV4                              DEBUG_PRINT_SHIFT (14)
-#define CPU_TRACE_RSV5                              DEBUG_PRINT_SHIFT (15)
-#define CPU_TRACE_RSV6                              DEBUG_PRINT_SHIFT (16)
-#define CPU_TRACE_RSV7                              DEBUG_PRINT_SHIFT (17)
-#define CPU_TRACE_RSV8                              DEBUG_PRINT_SHIFT (18)
-#define CPU_TRACE_RSV9                              DEBUG_PRINT_SHIFT (19)
-
-//GNB Masks
-#define GNB_TRACE                                   DEBUG_PRINT_SHIFT (20)
-#define PCIE_MISC                                   DEBUG_PRINT_SHIFT (21)
-#define PCIE_PORTREG_TRACE                          DEBUG_PRINT_SHIFT (22)
-#define PCIE_HOSTREG_TRACE                          DEBUG_PRINT_SHIFT (23)
-#define GNB_TRACE_RSV2                              DEBUG_PRINT_SHIFT (24)
-#define NB_MISC                                     DEBUG_PRINT_SHIFT (25)
-#define GNB_TRACE_RSV3                              DEBUG_PRINT_SHIFT (26)
-#define GFX_MISC                                    DEBUG_PRINT_SHIFT (27)
-#define NB_SMUREG_TRACE                             DEBUG_PRINT_SHIFT (28)
-#define GNB_TRACE_RSV1                              DEBUG_PRINT_SHIFT (29)
-
-//Topology Masks
-#define TOPO_TRACE                                  DEBUG_PRINT_SHIFT (30)
-#define TOPO_TRACE_RSV1                             DEBUG_PRINT_SHIFT (31)
-#define TOPO_TRACE_RSV2                             DEBUG_PRINT_SHIFT (32)
-#define TOPO_TRACE_RSV3                             DEBUG_PRINT_SHIFT (33)
-#define TOPO_TRACE_RSV4                             DEBUG_PRINT_SHIFT (34)
-#define TOPO_TRACE_RSV5                             DEBUG_PRINT_SHIFT (35)
-#define TOPO_TRACE_RSV6                             DEBUG_PRINT_SHIFT (36)
-#define TOPO_TRACE_RSV7                             DEBUG_PRINT_SHIFT (37)
-#define TOPO_TRACE_RSV8                             DEBUG_PRINT_SHIFT (38)
-#define TOPO_TRACE_RSV9                             DEBUG_PRINT_SHIFT (39)
-
-//FCH Masks
-#define FCH_TRACE                                    DEBUG_PRINT_SHIFT (40)
-#define FCH_TRACE_RSV1                               DEBUG_PRINT_SHIFT (41)
-#define FCH_TRACE_RSV2                               DEBUG_PRINT_SHIFT (42)
-#define FCH_TRACE_RSV3                               DEBUG_PRINT_SHIFT (43)
-#define FCH_TRACE_RSV4                               DEBUG_PRINT_SHIFT (44)
-#define FCH_TRACE_RSV5                               DEBUG_PRINT_SHIFT (45)
-#define FCH_TRACE_RSV6                               DEBUG_PRINT_SHIFT (46)
-#define FCH_TRACE_RSV7                               DEBUG_PRINT_SHIFT (47)
-#define FCH_TRACE_RSV8                               DEBUG_PRINT_SHIFT (48)
-#define FCH_TRACE_RSV9                               DEBUG_PRINT_SHIFT (49)
-
-//Other Masks
-#define MAIN_FLOW                                    DEBUG_PRINT_SHIFT (50)
-#define EVENT_LOG                                    DEBUG_PRINT_SHIFT (51)
-#define PERFORMANCE_ANALYSE                          DEBUG_PRINT_SHIFT (52)
-
-//Ids Masks
-#define IDS_TRACE                                    DEBUG_PRINT_SHIFT (53)
-#define BVM_TRACE                                    DEBUG_PRINT_SHIFT (54)
-#define IDS_TRACE_RSV2                               DEBUG_PRINT_SHIFT (55)
-#define IDS_TRACE_RSV3                               DEBUG_PRINT_SHIFT (56)
-
-//S3
-#define S3_TRACE                                     DEBUG_PRINT_SHIFT (57)
-
-//Library function to read/write PCI/MSR registers
-#define LIB_PCI_RD                                   DEBUG_PRINT_SHIFT (58)
-#define LIB_PCI_WR                                   DEBUG_PRINT_SHIFT (59)
-
-//AGESA test points
-#define TEST_POINT                                   DEBUG_PRINT_SHIFT (60)
-
-//Reserved for platform log
-#define PLAT_RSV1                                    DEBUG_PRINT_SHIFT (61)
-#define PLAT_RSV2                                    DEBUG_PRINT_SHIFT (62)
-#define PLAT_RSV3                                    DEBUG_PRINT_SHIFT (63)
-
-#define GNB_TRACE_DEFAULT\
-      (\
-      GNB_TRACE | PCIE_MISC | NB_MISC | GFX_MISC \
-      )
-
-#define GNB_TRACE_REG\
-      (\
-      PCIE_PORTREG_TRACE | PCIE_HOSTREG_TRACE | \
-      NB_SMUREG_TRACE | GNB_TRACE_RSV1 \
-      )
-
-#define GNB_TRACE_ALL\
-      (\
-      GNB_TRACE_DEFAULT | GNB_TRACE_REG \
-      )
-
-#define CPU_TRACE_ALL\
-      (\
-      CPU_TRACE | CPU_TRACE_RSV1 | CPU_TRACE_RSV2 | CPU_TRACE_RSV3 | \
-      CPU_TRACE_RSV4 | CPU_TRACE_RSV5 | CPU_TRACE_RSV6 | CPU_TRACE_RSV7 | \
-      CPU_TRACE_RSV8 | CPU_TRACE_RSV9\
-      )
-
-#define MEMORY_TRACE_ALL\
-      (\
-      MEM_FLOW | MEM_GETREG | MEM_SETREG | MEM_STATUS | \
-      MEMORY_TRACE_RSV1 | MEMORY_TRACE_RSV2 | MEMORY_TRACE_RSV3 | MEMORY_TRACE_RSV4 | \
-      MEMORY_TRACE_RSV5 | MEMORY_TRACE_RSV6\
-      )
-
-#define TOPO_TRACE_ALL\
-      (\
-      TOPO_TRACE | TOPO_TRACE_RSV1 | TOPO_TRACE_RSV2 | TOPO_TRACE_RSV3 | \
-      TOPO_TRACE_RSV4 | TOPO_TRACE_RSV5 | TOPO_TRACE_RSV6 | TOPO_TRACE_RSV7 | \
-      TOPO_TRACE_RSV8 | TOPO_TRACE_RSV9\
-      )
-
-#define FCH_TRACE_ALL\
-      (\
-      FCH_TRACE | FCH_TRACE_RSV1 | FCH_TRACE_RSV2 | FCH_TRACE_RSV3 | \
-      FCH_TRACE_RSV4 | FCH_TRACE_RSV5 | FCH_TRACE_RSV6 | FCH_TRACE_RSV7 | \
-      FCH_TRACE_RSV8 | FCH_TRACE_RSV9\
-      )
-
-#define IDS_TRACE_ALL\
-      (\
-      IDS_TRACE | BVM_TRACE | IDS_TRACE_RSV2 | IDS_TRACE_RSV3\
-      )
-
-#define OTHER_TRACE_ALL\
-      (\
-      MAIN_FLOW | EVENT_LOG | PERFORMANCE_ANALYSE\
-      )
-
-
-#define TRACE_MASK_ALL (0xFFFFFFFFFFFFFFFFull)
-#ifndef IDS_DEBUG_PRINT_MASK
-  #define IDS_DEBUG_PRINT_MASK (GNB_TRACE_DEFAULT  | CPU_TRACE_ALL | MEM_FLOW | MEM_STATUS | TOPO_TRACE_ALL | FCH_TRACE_ALL | MAIN_FLOW | IDS_TRACE_DEFAULT | TEST_POINT | MEM_GETREG)
-#endif
-
-/// if no specific define INIT & EXIT will be NULL
-#define IDS_HDT_CONSOLE_INIT(x)
-#define IDS_HDT_CONSOLE_EXIT(x)
-
-/// AGESA tracing service
-#if IDSOPT_TRACING_ENABLED == TRUE
-  #ifdef VA_ARGS_SUPPORTED
-    #if IDSOPT_C_OPTIMIZATION_DISABLED == TRUE
-      #define IDS_HDT_CONSOLE(f, s, ...)        AmdIdsDebugPrint (f, s, __VA_ARGS__)
-    #else
-      #pragma warning(disable: 4127)
-      #define IDS_HDT_CONSOLE(f, s, ...)        if      (f == MEM_FLOW) AmdIdsDebugPrintMem (s, __VA_ARGS__); \
-                                                 else if (f == CPU_TRACE) AmdIdsDebugPrintCpu (s, __VA_ARGS__); \
-                                                  else if (f == TOPO_TRACE) AmdIdsDebugPrintTopology (s, __VA_ARGS__); \
-                                                  else if (f == GNB_TRACE) AmdIdsDebugPrintGnb (s, __VA_ARGS__); \
-                                                 else AmdIdsDebugPrint (f, s, __VA_ARGS__)
-    #endif
-  #else
-    #define IDS_HDT_CONSOLE    AmdIdsDebugPrint
-  #endif
-  #define CONSOLE            AmdIdsDebugPrintAll
-  #define IDS_HDT_CONSOLE_DEBUG_CODE(Code)  Code
-  #define IDS_TIMEOUT_CTL(t)                IdsMemTimeOut (t)
-#else
-  #define IDS_HDT_CONSOLE           1 ? (VOID) 0 : AmdIdsDebugPrint
-  #define IDS_HDT_CONSOLE_DEBUG_CODE(Code)
-  #define CONSOLE   CONSOLE_Needs_To_Be_Removed_For_Production_Build //"WARNING: CONSOLE needs to be removed for production builds."
-  #define IDS_TIMEOUT_CTL(t)
-#endif
-
-/// Macros for serial port tracing
-#ifdef IDSOPT_SERIAL_PORT
-  #define IDS_SERIAL_PORT IDSOPT_SERIAL_PORT
-#endif
-
-#ifndef IDS_SERIAL_PORT
-  #define IDS_SERIAL_PORT 0x3F8
-#endif
-
-// Macros for redirect IO tracing
-#ifdef IDSOPT_DEBUG_PRINT_IO_PORT
-  #define IDS_DEBUG_PRINT_IO_PORT IDSOPT_DEBUG_PRINT_IO_PORT
-#endif
-
-#ifndef IDS_DEBUG_PRINT_IO_PORT
-  #define IDS_DEBUG_PRINT_IO_PORT 0x80
-#endif
-
-#define IDS_DPRAM_BASE 0
-#define IDS_DPRAM_SIZE 0
-///Default policy, shift the old data when buffer full
-#define IDS_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL FALSE
-#if IDSOPT_TRACING_CONSOLE_RAM  == TRUE
-  #ifdef IDSOPT_DPRAM_BASE
-    #undef IDS_DPRAM_BASE
-    #define IDS_DPRAM_BASE  IDSOPT_DPRAM_BASE
-  #else
-    #error "Debug Print Ram Base not specified, please define IDSOPT_DPRAM_BASE in optionsids.h"
-  #endif
-
-  #ifdef IDSOPT_DPRAM_SIZE
-    #undef IDS_DPRAM_SIZE
-    #define IDS_DPRAM_SIZE  IDSOPT_DPRAM_SIZE
-  #else
-    #error "Debug Print Ram size not specified, please define IDSOPT_DPRAM_SIZE in optionsids.h"
-  #endif
-
-  #ifdef IDSOPT_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL
-    #define IDS_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL IDSOPT_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL
-  #endif
-#endif
-/**
- *  Macros to add HDT OUT
- *
- *  The default minimal action is to do nothing and there is no any code to increase.
- *  For debug environments, the debug information can be displayed in HDT or other
- *  devices.
- *
- **/
-#if IDSOPT_TRACING_CONSOLE_HDTOUT == TRUE
-  #undef IDS_HDT_CONSOLE_INIT
-  #undef IDS_HDT_CONSOLE_EXIT
-  #define IDS_HDT_CONSOLE_INIT(x)           AmdIdsHdtOutInit (x)
-  #define IDS_HDT_CONSOLE_EXIT(x)           AmdIdsHdtOutExit (x)
-  #define IDS_HDT_CONSOLE_S3_EXIT(x)        AmdIdsHdtOutS3Exit (x)
-  #define IDS_HDT_CONSOLE_S3_AP_EXIT(x)     AmdIdsHdtOutS3ApExit (x)
-
-  #define IDS_HDT_CONSOLE_FLUSH_BUFFER(x)   AmdIdsHdtOutBufferFlush (x)
-  #define IDS_HDT_CONSOLE_ASSERT(x)   AmdIdsDebugPrintAssert (x)
-  #define IDS_FUNCLIST_ADDR                 ScriptFuncList
-  #define IDS_FUNCLIST_EXTERN()             extern SCRIPT_FUNCTION ScriptFuncList[]
-#else
-  #define IDS_HDT_CONSOLE_S3_EXIT(x)
-  #define IDS_HDT_CONSOLE_S3_AP_EXIT(x)
-  #define IDS_HDT_CONSOLE_FLUSH_BUFFER(x)
-  #define IDS_HDT_CONSOLE_ASSERT(x)
-  #define IDS_FUNCLIST_ADDR                 NULL
-  #define IDS_FUNCLIST_EXTERN()
-#endif
-
-#if IDSOPT_TRACING_ENABLED == TRUE
-  #ifdef IDSOPT_CUSTOMIZE_TRACING_SERVICE
-    #undef  IDS_HDT_CONSOLE
-    #define IDS_HDT_CONSOLE        IDSOPT_CUSTOMIZE_TRACING_SERVICE
-  #endif
-  #ifdef IDSOPT_CUSTOMIZE_TRACING_SERVICE_INIT
-    #undef IDS_HDT_CONSOLE_INIT
-    #define IDS_HDT_CONSOLE_INIT(x)           IDSOPT_CUSTOMIZE_TRACING_SERVICE_INIT (x)
-  #endif
-  #ifdef IDSOPT_CUSTOMIZE_TRACING_SERVICE_EXIT
-    #undef IDS_HDT_CONSOLE_EXIT
-    #define IDS_HDT_CONSOLE_EXIT(x)           IDSOPT_CUSTOMIZE_TRACING_SERVICE_EXIT (x)
-  #endif
-#endif
-
-#define IDS_TRACE_SHOW_BLD_OPT_CFG  IDSOPT_TRACE_USER_OPTIONS
-
-#if IDSOPT_PERF_ANALYSIS == TRUE
-  #include "IdsPerf.h"
-  #ifdef STOP_CODE
-    #undef STOP_CODE
-  #endif
-  #define STOP_CODE (((UINT32)FILECODE)*0x10000ul + \
-                        ((__LINE__) % 10) + (((__LINE__ / 10) % 10)*0x10) + \
-                        (((__LINE__ / 100) % 10)*0x100) + (((__LINE__ / 1000) % 10)*0x1000))
-
-  #define IDS_PERF_TIMESTAMP(ID, StdHeader)  IdsPerfTimestamp (STOP_CODE, ID, (StdHeader))
-  #define IDS_PERF_ANALYSE(StdHeader)   IdsPerfAnalyseTimestamp (StdHeader)
-#else
-  #define IDS_PERF_TIMESTAMP(ID, StdHeader)
-  #define IDS_PERF_ANALYSE(StdHeader)
-#endif
-
-///For IDS feat use
-#define IDS_FAMILY_ALL  0xFFFFFFFFFFFFFFFFull
-#define IDS_BSP_ONLY    TRUE
-#define IDS_ALL_CORES   FALSE
-
-#define IDS_LATE_RUN_AP_TASK_ID     PROC_IDS_LIBRARY_IDSLIB_FILECODE
-
-#define IDS_CALLOUT_INIT      0x01                             ///< The function data of IDS callout function of initialization.
-
-#define IDS_CALLOUT_GNB_PPFUSE_OVERRIDE           0x83        ///< The function data of IDS callout function of GNB pp fuse table.
-#define IDS_CALLOUT_GNB_INTEGRATED_TABLE_CONFIG   0x84        ///< The function data of IDS callout function of GNB integrated table.
-#define IDS_CALLOUT_GNB_NB_POWERGATE_CONFIG       0x85        ///< The function data of IDS callout function of GNB NB power gate config.
-#define IDS_CALLOUT_GNB_PCIE_POWERGATE_CONFIG     0x86        ///< The function data of IDS callout function of GNB PCIE power gateconfig.
-#define IDS_CALLOUT_GNB_PCIE_PLATFORM_CONFIG      0x87        ///< The function data of IDS callout function of GNB pcie platform config.
-#define IDS_CALLOUT_GNB_PCIE_PHY_CONFIG           0x88        ///< The function data of IDS callout function of GNB pcie PHY config.
-#define IDS_CALLOUT_GNB_GMM_REGISTER_OVERRIDE     0x89        ///< The function data of IDS callout function of GNB GMM register override
-#define IDS_CALLOUT_FCH_INIT_RESET                0x8A        ///< The function data of IDS callout function of FchInitReset
-#define IDS_CALLOUT_FCH_INIT_ENV                  0x8B        ///< The function data of IDS callout function of FchInitEnv.
-#define IDS_CALLOUT_POWER_PLAN_INIT               0x8C        ///< The function data of IDS callout function of Override Power Plan Init
-#define IDS_CALLOUT_GET_PERF_BUFFER               0x8D        ///< The function data of IDS callout function of get platform performance buffer.
-#define IDS_CALLOUT_GNB_PACKAGE_POWER_CONFIG      0x8E        ///< The function data of IDS callout function of Bapm Package Power.
-#define IDS_CALLOUT_SMU_PORT80_LOGGING_BUFFER     0x8F        ///< The function data of IDS callout function of SMU port80 logging buffer.
-#define IDS_CALLOUT_GNB_BEFORE_EARLY_INIT         0x90        ///< The function data of IDS callout function of GNB before early init.
-#define IDS_CALLOUT_GNB_SMUBIOSTABLE_OVERRIDE     0x91        ///< The function data of IDS callout function of GNB smu bios table.
-#define IDS_CALLOUT_GNB_PCIE_AER_CONFIG           0x92        ///< The function data of IDS callout function of GNB PCIE AER config.
-#define IDS_CALLOUT_GNB_PCIE_EARLY_PORT_CONFIG    0x93        ///< The function data of IDS callout function of GNB pcie early port config.
-#define IDS_CALLOUT_GNB_BUILDOPTIONS_OVERRIDE     0x94        ///< The function data of IDS callout function of GNB build options override.
-#define IDS_CALLOUT_GNB_SMUFEATURES_MASK_OVERRIDE 0x95        ///< The function data of IDS callout function of GNB SMU Features MASK override.
-#define IDS_CALLOUT_GNB_BEFORE_TXPRESET_LOADING   0x96        ///< The function data of IDS callout function of GNB pcie Tx preset loading sequence.
-
-/// Function entry for HDT script to call
-typedef struct _SCRIPT_FUNCTION {
-  UINT32  FuncAddr;       ///< Function address in ROM
-  CHAR8   FuncName[40];   ///< Function name
-} SCRIPT_FUNCTION;
-
-/// Data Structure for Mem ECC parameter override
-typedef struct {
-  IN BOOLEAN CfgEccRedirection;                   ///< ECC Redirection
-  IN UINT16  CfgScrubDramRate;                    ///< Scrub Dram Rate
-  IN UINT16  CfgScrubL2Rate;                      ///< Scrub L2Rate
-  IN UINT16  CfgScrubL3Rate;                      ///< Scrub L3Rate
-  IN UINT16  CfgScrubIcRate;                      ///< Scrub Ic Rate
-  IN UINT16  CfgScrubDcRate;                      ///< Scrub Dc Rate
-  IN BOOLEAN CfgEccSyncFlood;                     ///< ECC Sync Flood
-} ECC_OVERRIDE_STRUCT;
-
-
-
-
-/**
- *  AGESA Test Points
- *
- *  These are the values displayed to the user to indicate progress through boot.
- *  These can be used in a debug environment to stop the debugger at a specific
- *  test point:
- *  For SimNow!, this command
- *      bi 81 w vb 49
- *  will stop the debugger on one of the TracePoints (49 is the TP value in this example).
- *
- */
-typedef enum {
-  StartProcessorTestPoints,           ///< 00 Entry used for range testing for @b Processor related TPs
-
-  // Memory test points
-  TpProcMemBeforeMemDataInit,         ///< 01 .. Memory structure initialization (Public interface)
-  TpProcMemBeforeSpdProcessing,       ///< 02 .. SPD Data processing  (Public interface)
-  TpProcMemAmdMemAuto,                ///< 03 .. Memory configuration  (Public interface)
-  TpProcMemDramInit,                  ///< 04 .. DRAM initialization
-  TpProcMemSPDChecking,               ///< 05 ..
-  TpProcMemModeChecking,              ///< 06 ..
-  TpProcMemSpeedTclConfig,            ///< 07 .. Speed and TCL configuration
-  TpProcMemSpdTiming,                 ///< 08 ..
-  TpProcMemDramMapping,               ///< 09 ..
-  TpProcMemPlatformSpecificConfig,    ///< 0A ..
-  TPProcMemPhyCompensation,           ///< 0B ..
-  TpProcMemStartDcts,                 ///< 0C ..
-  TpProcMemBeforeDramInit,            ///< 0D .. (Public interface)
-  TpProcMemPhyFenceTraining,          ///< 0E ..
-  TpProcMemSynchronizeDcts,           ///< 0F ..
-  TpProcMemSystemMemoryMapping,       ///< 10 ..
-  TpProcMemMtrrConfiguration,         ///< 11 ..
-  TpProcMemDramTraining,              ///< 12 ..
-  TpProcMemBeforeAnyTraining,         ///< 13 .. (Public interface)
-  TpProcMemWriteLevelizationTraining, ///< 14 ..
-  TpProcMemWlFirstPass,               ///< 15 .. Below 800Mhz first pass start
-  TpProcMemWlSecondPass,              ///< 16 .. Above 800Mhz second pass start
-  TpProcMemWlTrainTargetDimm,         ///< 17 .. Target DIMM configured
-  TpProcMemWlPrepDimms,               ///< 18 ..  Prepare DIMMS for WL
-  TpProcMemWlConfigDimms,             ///< 19 ..  Configure DIMMS for WL
-  TpProcMemReceiverEnableTraining,    ///< 1A ..
-  TpProcMemRcvrStartSweep,            ///< 1B .. Start sweep loop
-  TpProcMemRcvrSetDelay,              ///< 1C .. Set receiver Delay
-  TpProcMemRcvrWritePattern,          ///< 1D .. Write test pattern
-  TpProcMemRcvrReadPattern,           ///< 1E .. Read test pattern
-  TpProcMemRcvrTestPattern,           ///< 1F .. Compare test pattern
-  TpProcMemRcvrCalcLatency,           ///< 20 .. Calculate MaxRdLatency per channel
-  TpProcMemReceiveDqsTraining,        ///< 21 ..
-  TpProcMemRcvDqsSetDelay,            ///< 22 .. Set Write Data delay
-  TpProcMemRcvDqsWritePattern,        ///< 23 .. Write test pattern
-  TpProcMemRcvDqsStartSweep,          ///< 24 .. Start read sweep
-  TpProcMemRcvDqsSetRcvDelay,         ///< 25 .. Set Receive DQS delay
-  TpProcMemRcvDqsReadPattern,         ///< 26 .. Read Test pattern
-  TpProcMemRcvDqsTstPattern,          ///< 27 .. Compare Test pattern
-  TpProcMemRcvDqsResults,             ///< 28 .. Update results
-  TpProcMemRcvDqsFindWindow,          ///< 29 .. Start Find passing window
-  TpProcMemTransmitDqsTraining,       ///< 2A ..
-  TpProcMemTxDqStartSweep,            ///< 2B .. Start write sweep
-  TpProcMemTxDqSetDelay,              ///< 2C .. Set Transmit DQ delay
-  TpProcMemTxDqWritePattern,          ///< 2D .. Write test pattern
-  TpProcMemTxDqReadPattern,           ///< 2E .. Read Test pattern
-  TpProcMemTxDqTestPattern,           ///< 2F .. Compare Test pattern
-  TpProcMemTxDqResults,               ///< 30 .. Update results
-  TpProcMemTxDqFindWindow,            ///< 31 .. Start Find passing window
-  TpProcMemMaxRdLatencyTraining,      ///< 32 ..
-  TpProcMemMaxRdLatStartSweep,        ///< 33 .. Start sweep
-  TpProcMemMaxRdLatSetDelay,          ///< 34 .. Set delay
-  TpProcMemMaxRdLatWritePattern,      ///< 35 .. Write test pattern
-  TpProcMemMaxRdLatReadPattern,       ///< 36 .. Read Test pattern
-  TpProcMemMaxRdLatTestPattern,       ///< 37 .. Compare Test pattern
-  TpProcMemOnlineSpareInit,           ///< 38 .. Online Spare init
-  TpProcMemBankInterleaveInit,        ///< 39 .. Bank Interleave Init
-  TpProcMemNodeInterleaveInit,        ///< 3A .. Node Interleave Init
-  TpProcMemChannelInterleaveInit,     ///< 3B .. Channel Interleave Init
-  TpProcMemEccInitialization,         ///< 3C .. ECC initialization
-  TpProcMemPlatformSpecificInit,      ///< 3D .. Platform Specific Init
-  TpProcMemBeforeAgesaReadSpd,        ///< 3E .. Before callout for "AgesaReadSpd"
-  TpProcMemAfterAgesaReadSpd,         ///< 3F .. After callout for "AgesaReadSpd"
-  TpProcMemBeforeAgesaHookBeforeDramInit,    ///< 40 .. Before optional callout "AgesaHookBeforeDramInit"
-  TpProcMemAfterAgesaHookBeforeDramInit,     ///< 41 .. After optional callout "AgesaHookBeforeDramInit"
-  TpProcMemBeforeAgesaHookBeforeDQSTraining, ///< 42 .. Before optional callout "AgesaHookBeforeDQSTraining"
-  TpProcMemAfterAgesaHookBeforeDQSTraining,  ///< 43 .. After optional callout "AgesaHookBeforeDQSTraining"
-  TpProcMemBeforeAgesaHookBeforeExitSelfRef, ///< 44 .. Before optional callout "AgesaHookBeforeDramInit"
-  TpProcMemAfterAgesaHookBeforeExitSelfRef,  ///< 45 .. After optional callout "AgesaHookBeforeDramInit"
-  TpProcMemAfterMemDataInit,          ///< 46 .. After MemDataInit
-  TpProcMemInitializeMCT,             ///< 47 .. Before InitializeMCT
-  TpProcMemLvDdr3,                    ///< 48 .. Before LV DDR3
-  TpProcMemInitMCT,                   ///< 49 .. Before InitMCT
-  TpProcMemOtherTiming,               ///< 4A.. Before OtherTiming
-  TpProcMemUMAMemTyping,              ///< 4B .. Before UMAMemTyping
-  TpProcMemSetDqsEccTmgs,             ///< 4C .. Before SetDqsEccTmgs
-  TpProcMemMemClr,                    ///< 4D .. Before MemClr
-  TpProcMemOnDimmThermal,             ///< 4E .. Before On DIMM Thermal
-  TpProcMemDmi,                       ///< 4F .. Before DMI
-  TpProcMemEnd,                       ///< 50 .. End of memory code
-
-  // CPU test points
-  TpProcCpuEntryDmi,                  ///< 51 .. Entry point CreateDmiRecords
-  TpProcCpuEntryPstate,               ///< 52 .. Entry point GenerateSsdt
-  TpProcCpuEntryPstateLeveling,       ///< 53 .. Entry point PStateLeveling
-  TpProcCpuEntryPstateGather,         ///< 54 .. Entry point PStateGatherData
-  TpProcCpuEntryWhea,                 ///< 55 .. Entry point CreateAcpiWhea
-  TpProcS3Init,                       ///< 56    Entry point S3Init
-  TpProcCpuProcessRegisterTables = 0X58,     ///< 58 .. Register table processing
-  TpProcCpuSetBrandID,                ///< 59 .. Set brand ID
-  TpProcCpuLocalApicInit,             ///< 5A .. Initialize local APIC
-  TpProcCpuLoadUcode,                 ///< 5B .. Load microcode patch
-  TpProcCpuBeforePMFeatureInit,       ///< 5C .. BeforePM feature dispatch point
-  TpProcCpuPowerMgmtInit,             ///< 5D .. Power Management table processing
-  TpProcCpuEarlyFeatureInit,          ///< 5E .. Early feature dispatch point
-  TpProcCpuCoreLeveling,              ///< 5F .. Core Leveling
-  TpProcCpuApMtrrSync,                ///< 60 .. AP MTRR sync up
-  TpProcCpuPostFeatureInit,           ///< 61 .. POST feature dispatch point
-  TpProcCpuBeforeRelinquishAPsFeatureInit = 0x63, ///< 63 .. Before Relinquishing control of APs feature dispatch point
-  TpProcCpuBeforeAllocateWheaBuffer,  ///< 64 .. Before the WHEA init code calls out to allocate a buffer
-  TpProcCpuAfterAllocateWheaBuffer,   ///< 65 .. After the WHEA init code calls out to allocate a buffer
-  TpProcCpuBeforeAllocateSsdtBuffer = 0x6A,  ///< 6A .. Before the P-state init code calls out to allocate a buffer
-  TpProcCpuAfterAllocateSsdtBuffer,   ///< 6B .. After the P-state init code calls out to allocate a buffer
-  TpProcCpuEntryCrat,                 ///< 6C .. Entry point CreateAcpiCrat
-  TpProcCpuEntryCdit,                 ///< 6D .. Entry point CreateAcpiCdit
-  TpProcCpuEntryScs,                  ///< 6E .. Entry point InitializeScsFeature
-  TpProcCpuRunBtc,                    ///< 6F .. Start of Btc run
-  TpProcCpuEndBtc,                    ///< 70 .. End of Btc run
-
-  // Topology test points
-  TpProcTopologyEntry = 0x71,         ///< 71 .. Topology Init begin
-  TpProcTopologyDone = 0x7C,          ///< 7C .. Topology Init complete
-
-  // Extended memory test point
-  TpProcMemSendMRS2 = 0x80,           ///< 80 .. Sending MRS2
-  TpProcMemSendMRS3,                  ///< 81 .. Sedding MRS3
-  TpProcMemSendMRS1,                  ///< 82 .. Sending MRS1
-  TpProcMemSendMRS0,                  ///< 83 .. Sending MRS0
-  TpProcMemContinPatternGenRead,      ///< 84 .. Continuous Pattern Read
-  TpProcMemContinPatternGenWrite,     ///< 85 .. Continuous Pattern Write
-  TpProcMem2dRdDqsTraining,           ///< 86 .. Mem: 2d RdDqs Training begin
-  TpProcMemBefore2dTrainExtVrefChange,///< 87 .. Mem: Before optional callout to platform BIOS to change External Vref during 2d Training
-  TpProcMemAfter2dTrainExtVrefChange, ///< 88 .. Mem: After optional callout to platform BIOS to change External Vref during 2d Training
-  TpProcMemConfigureDCTForGeneral,    ///< 89 .. Configure DCT For General use begin
-  TpProcMemProcConfigureDCTForTraining,    ///< 8A .. Configure DCT For training begin
-  TpProcMemConfigureDCTNonExplicitSeq,///< 8B .. Configure DCT For Non-Explicit
-  TpProcMemSynchronizeChannels,       ///< 8C .. Configure to Sync channels
-  TpProcMemC6StorageAllocation,       ///< 8D .. Allocate C6 Storage
-
-  // Gnb Earlier init
-  TpGnbEarlierPcieConfigurationInit = 0x90,           ///< 90 .. GNB earlier PCIE configuration init
-  TpGnbEarlierInterface = 0x91,                       ///< 91 .. GNB earlier interface
-  // Gnb Early init
-  TpGnbEarlyInterface = 0x92,                         ///< 92 .. GNB early interface
-  TpGnbPcieConfigurationMap,                          ///< 93 .. GNB early PCIE configuration map
-  TpGnbPcieEarlyInterface,                            ///< 94 .. GNB early PCIE interface
-  //Gnb post init
-  TpGnbPciePostEarlyInterface = 0x95,                 ///< 95 .. GNB post early interface
-  TpGnbGfxConfigPostInterface,                        ///< 96 .. GNB post GFX config interface
-  TpGnbGfxPostInterface,                              ///< 97 .. GNB post GFX interface
-  // Gnb post after DRAM init
-  TpGnbPostInterface = 0x98,                          ///< 98 .. GNB post after DRAM interface
-  TpGnbPciePostInterface,                             ///< 99 .. GNB post after DRAM PCIE interface
-  // Gnb Env init
-  TpGnbEnvInterface,                                  ///< 9A .. GNB Env Nb interface
-  TpGnbPcieEnvInterface,                              ///< 9B .. GNB Env PCIE interface
-  TpGnbGfxConfigEnvInterface,                         ///< 9C .. GNB Env GFX Config interface
-  TpGnbGfxEnvInterface,                               ///< 9D .. GNB Env GFX interface
-  // Gnb Mid init
-  TpGnbGfxConfigMidInterface = 0x9E,                  ///< 9E .. GNB Mid GFX config interface
-  TpGnbGfxMidInterface,                               ///< 9F .. GNB Mid GFX interface
-  TpPcieMidInterface,                                 ///< A0 .. GNB Mid PCIE interface
-  TpGnbMidInterface,                                  ///< A1 .. GNB Mid interface
-  TpGnbSmuMidInterface,                               ///< A2 .. GNB Mid SMU feature
-  TpPciePowerGateFeature,                             ///< A3 .. GNB Mid pcie power gate feature
-  TpGnbPcieMaxPayloadInterface,                       ///< A4 .. GNB Mid pcie max payload interface
-  TpGnbPcieClkPmInterface,                            ///< A5 .. GNB Mid pcie clk pm port interface
-  TpGnbPcieAspmInterface,                             ///< A6 .. GNB Mid pcie ASPM interface
-  TpGnbNbIoapicInterface,                             ///< A7 .. GNB Mid IOAPIC interface
-  // Gnb Late init
-  TpGnbPcieAlibFeature = 0xA8,                        ///< A8 .. GNB Late pcie ALIB feature
-  TpGnbIommuIvrsTable,                                ///< A9 .. GNB Late pcie IOMMU
-  TpGnbBtcRun,                                        ///< AA .. GNB Late run BTC
-  // Gnb S3 Save
-  TpGnbGfxInitSview = 0xAE,                           ///< AD .. GNB S3SAVE GFX sview init
-  TpGnbAlibDispatchFeature = 0xAE,                    ///< AE .. GNB ALIB dispatch feature
-  EndGnbTestPoints = 0xAF,                            ///< AF End of TP range for GNB
-
-  StartFchTestPoints = 0xB0,          ///< B0 Entry used for range testing for @b FCH related TPs
-  TpFchInitResetDispatching,          ///< B1 .. FCH InitReset dispatch point
-  TpFchGppBeforePortTraining,         ///< B2 .. Before FCH GPP port training
-  TpFchGppGen1PortPolling,            ///< B3 .. FCH GPP port polling with GEN1 speed
-  TpFchGppGen2PortPolling,            ///< B4 .. FCH GPP port polling with GEN2 speed
-  TpFchGppAfterPortTraining,          ///< B5 .. After FCH GPP port training
-  TpFchInitEnvDispatching,            ///< B6 .. FCH InitEnv dispatch point
-  TpFchInitMidDispatching,            ///< B7 .. FCH InitMid dispatch point
-  TpFchInitLateDispatching,           ///< B8 .. FCH InitLate dispatch point
-  TpFchGppHotPlugging,                ///< B9 .. FCH GPP hot plug event
-  TpFchGppHotUnplugging,              ///< BA .. AFCH GPP hot unplug event
-  TpFchInitS3EarlyDispatching,        ///< BB .. FCH InitS3Early dispatch point
-  TpFchInitS3LateDispatching,         ///< BC .. FCH InitS3Late dispatch point
-  EndFchTestPoints,                   ///< BF End of TP range for FCH
-
-  // Interface test points
-  TpIfAmdInitResetEntry = 0xC0,       ///< C0 .. Entry to AmdInitReset
-  TpIfAmdInitResetExit,               ///< C1 .. Exiting from AmdInitReset
-  TpIfAmdInitRecoveryEntry,           ///< C2 .. Entry to AmdInitRecovery
-  TpIfAmdInitRecoveryExit,            ///< C3 .. Exiting from AmdInitRecovery
-  TpIfAmdInitEarlyEntry,              ///< C4 .. Entry to AmdInitEarly
-  TpIfAmdInitEarlyExit,               ///< C5 .. Exiting from AmdInitEarly
-  TpIfAmdInitPostEntry,               ///< C6 .. Entry to AmdInitPost
-  TpIfAmdInitPostExit,                ///< C7 .. Exiting from AmdInitPost
-  TpIfAmdInitEnvEntry,                ///< C8 .. Entry to AmdInitEnv
-  TpIfAmdInitEnvExit,                 ///< C9 .. Exiting from AmdInitEnv
-  TpIfAmdInitMidEntry,                ///< CA .. Entry to AmdInitMid
-  TpIfAmdInitMidExit,                 ///< CB .. Exiting from AmdInitMid
-  TpIfAmdInitLateEntry,               ///< CC .. Entry to AmdInitLate
-  TpIfAmdInitLateExit,                ///< CD .. Exiting from AmdInitLate
-  TpIfAmdInitRtbEntry,                ///< CE .. Entry to AmdInitRtb
-  TpIfAmdInitRtbExit,                 ///< CF .. Exiting from AmdInitRtb
-  TpIfAmdInitResumeEntry,             ///< D0 .. Entry to AmdInitResume
-  TpIfAmdInitResumeExit,              ///< D1 .. Exiting from AmdInitResume
-  TpIfAmdS3LateRestoreEntry,          ///< D2 .. Entry to AmdS3LateRestore
-  TpIfAmdS3LateRestoreExit,           ///< D3 .. Exiting from AmdS3LateRestore
-  TpIfAmdLateRunApTaskEntry,          ///< D4 .. Entry to AmdS3LateRestore
-  TpIfAmdLateRunApTaskExit,           ///< D5 .. Exiting from AmdS3LateRestore
-  TpIfAmdReadEventLogEntry,           ///< D6 .. Entry to AmdReadEventLog
-  TpIfAmdReadEventLogExit,            ///< D7 .. Exiting from AmdReadEventLog
-  TpIfAmdGetApicIdEntry,              ///< D8 .. Entry to AmdGetApicId
-  TpIfAmdGetApicIdExit,               ///< D9 .. Exiting from AmdGetApicId
-  TpIfAmdGetPciAddressEntry,          ///< DA .. Entry to AmdGetPciAddress
-  TpIfAmdGetPciAddressExit,           ///< DB .. Exiting from AmdGetPciAddress
-  TpIfAmdIdentifyCoreEntry,           ///< DC .. Entry to AmdIdentifyCore
-  TpIfAmdIdentifyCoreExit,            ///< DD .. Exiting from AmdIdentifyCore
-  TpIfBeforeRunApFromIds,             ///< DE .. After IDS calls out to run code on an AP
-  TpIfAfterRunApFromIds,              ///< DF .. After IDS calls out to run code on an AP
-  TpIfBeforeGetIdsData,               ///< E0 .. Before IDS calls out to get IDS data
-  TpIfAfterGetIdsData,                ///< E1 .. After IDS calls out to get IDS data
-  TpIfBeforeAllocateHeapBuffer,       ///< E2 .. Before the heap manager calls out to allocate a buffer
-  TpIfAfterAllocateHeapBuffer,        ///< E3 .. After the heap manager calls out to allocate a buffer
-  TpIfBeforeDeallocateHeapBuffer,     ///< E4 .. Before the heap manager calls out to deallocate a buffer
-  TpIfAfterDeallocateHeapBuffer,      ///< E5 .. After the heap manager calls out to deallocate a buffer
-  TpIfBeforeLocateHeapBuffer,         ///< E6 .. Before the heap manager calls out to locate a buffer
-  TpIfAfterLocateHeapBuffer,          ///< E7 .. After the heap manager calls out to locate a buffer
-  TpIfBeforeRunApFromAllAps,          ///< E8 .. Before the BSP calls out to run code on an AP
-  TpIfAfterRunApFromAllAps,           ///< E9 .. After the BSP calls out to run code on an AP
-  TpIfBeforeRunApFromAllCore0s,       ///< EA .. Before the BSP calls out to run code on an AP
-  TpIfAfterRunApFromAllCore0s,        ///< EB .. After the BSP calls out to run code on an AP
-  TpIfBeforeAllocateS3SaveBuffer,     ///< EC .. Before the S3 save code calls out to allocate a buffer
-  TpIfAfterAllocateS3SaveBuffer,      ///< ED .. After the S3 save code calls out to allocate a buffer
-  TpIfBeforeAllocateMemoryS3SaveBuffer,  ///< EE .. Before the memory S3 save code calls out to allocate a buffer
-  TpIfAfterAllocateMemoryS3SaveBuffer,   ///< EF .. After the memory S3 save code calls out to allocate a buffer
-  TpIfBeforeLocateS3PciBuffer,        ///< F0 .. Before the memory code calls out to locate a buffer
-  TpIfAfterLocateS3PciBuffer,         ///< F1 .. After the memory code calls out to locate a buffer
-  TpIfBeforeLocateS3CPciBuffer,       ///< F2 .. Before the memory code calls out to locate a buffer
-  TpIfAfterLocateS3CPciBuffer,        ///< F3 .. After the memory code calls out to locate a buffer
-  TpIfBeforeLocateS3MsrBuffer,        ///< F4 .. Before the memory code calls out to locate a buffer
-  TpIfAfterLocateS3MsrBuffer,         ///< F5 .. After the memory code calls out to locate a buffer
-  TpIfBeforeLocateS3CMsrBuffer,       ///< F6 .. Before the memory code calls out to locate a buffer
-  TpIfAfterLocateS3CMsrBuffer,        ///< F7 .. After the memory code calls out to locate a buffer
-  TpReadyToBoot,                      ///< F8 .. Ready to boot event
-  // PMU test points
-  TpProcMemPmuFailed,                 ///< F9 .. Failed PMU training.
-  TpIfAmdS3FinalRestoreEntry,         ///< FA .. Entry to AmdS3FinalRestore
-  TpIfAmdS3FinalRestoreExit,          ///< FB .. Exiting from AmdS3FinalRestore
-
-  EndAgesaTps = 0xFF,                 ///< Last defined AGESA TP
-} AGESA_TP;
-
-///Ids Feat description
-typedef enum {
-  IDS_FEAT_UCODE_UPDATE = 0x0000,   ///< Feat for Ucode Update
-  IDS_FEAT_TARGET_PSTATE,           ///< Feat for Target Pstate
-  IDS_FEAT_POSTPSTATE,              ///< Feat for Post Pstate
-  IDS_FEAT_ECC_CTRL,                ///< Feat for Ecc Control
-  IDS_FEAT_ECC_SYMBOL_SIZE,         ///< Feat for Ecc symbol size
-  IDS_FEAT_DCT_ALLMEMCLK,           ///< Feat for all memory clock
-  IDS_FEAT_DCT_ALLCKE,              ///< Feat for all CKE
-  IDS_FEAT_DCT_ALLCS,               ///< Feat for all CS
-  IDS_FEAT_DCT_GANGMODE,            ///< Feat for Dct gang mode
-  IDS_FEAT_DCT_BURSTLENGTH,         ///< Feat for dct burst length
-  IDS_FEAT_DCT_POWERDOWN,           ///< Feat for dct power down
-  IDS_FEAT_DCT_DLLSHUTDOWN,         ///< Feat for dct dll shut down
-  IDS_FEAT_HDTOUT,                  ///< Feat for hdt out
-  IDS_FEAT_GNB_PLATFORMCFG,         ///< Feat for override GNB platform config
-  IDS_FEAT_CPB_CTRL,                ///< Feat for Config the Core peformance boost feature
-  IDS_FEAT_HTC_CTRL,                ///< Feat for Hardware Thermal Control
-  IDS_FEAT_MEMORY_MAPPING,          ///< Feat for Memory Mapping
-  IDS_FEAT_NV_TO_CMOS,              ///< Feat for Save BSP Nv to CMOS
-  IDS_FEAT_COMMON,                  ///< Common Feat
-  IDS_FEAT_END = 0xFF               ///< End of Common feat
-} IDS_FEAT;
-
-///Ids IDT table function ID
-typedef enum {
-  IDS_IDT_REPLACE_IDTR_FOR_BSC = 0x0000,   ///< Function ID for saving IDTR for BSC
-  IDS_IDT_RESTORE_IDTR_FOR_BSC,            ///< Function ID for restoring IDTR for BSC
-  IDS_IDT_UPDATE_EXCEPTION_VECTOR_FOR_AP,  ///< Function ID for updating exception vector
-} IDS_IDT_FUNC_ID;
-
-typedef IDS_STATUS IDS_COMMON_FUNC (
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader,
-  IN       IDS_NV_ITEM *IdsNvPtr
-  );
-
-typedef IDS_COMMON_FUNC *PIDS_COMMON_FUNC;
-
-/// Data Structure of IDS Feature block
-typedef  struct _IDS_FAMILY_FEAT_STRUCT {
-  IDS_FEAT  IdsFeat;      ///< Ids Feat ID
-  BOOLEAN IsBsp;          ///< swith for Bsp check
-  AGESA_IDS_OPTION IdsOption;   ///< IDS option
-  UINT64 CpuFamily;       ///<
-  PIDS_COMMON_FUNC  pf_idsoption;   ///<pointer to function
-} IDS_FAMILY_FEAT_STRUCT;
-
-
-/// Data Structure of IDS option
-typedef  struct _IDS_OPTION_STRUCT {
-  AGESA_IDS_OPTION idsoption;       ///< IDS option
-  PIDS_COMMON_FUNC  pf_idsoption;   ///<pointer to function
-} IDS_OPTION_STRUCT;
-
-/// Data Structure of IDS option table
-typedef struct _IDS_OPTION_STRUCT_TBL {
-  UINT8 version;      ///<Version of IDS option table
-  UINT16 size;        ///<Size of IDS option table
-  CONST IDS_OPTION_STRUCT  *pIdsOptionStruct; ///<pointer to array of  structure
-} IDS_OPTION_STRUCT_TBL;
-
-#define IDS_NV_TO_CMOS_LEN_BYTE   1
-#define IDS_NV_TO_CMOS_LEN_WORD   2
-#define IDS_NV_TO_CMOS_LEN_END   0xFF
-#define IDS_NV_TO_CMOS_ID_END   0xFFFF
-
-/// Data struct of set/get NV to/from CMOS
-typedef struct _IDS_NV_TO_CMOS {
-  UINT8 Length;       ///< Length of NV
-  UINT16 IDS_NV_ID; ///< IDS id
-} IDS_NV_TO_CMOS;
-
-IDS_STATUS
-AmdIdsCtrlDispatcher (
-  IN       AGESA_IDS_OPTION IdsOption,
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-IdsOptionCallout (
-  IN       UINTN                CallOutId,
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsHdtOutInit (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsHdtOutExit (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsHdtOutS3Exit (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsHdtOutS3ApExit (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsDebugPrint (
-  IN       UINT64      Flag,
-  IN       CONST CHAR8 *Format,
-  IN       ...
-  );
-
-VOID
-AmdIdsDebugPrintTopology (
-  IN      CONST CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsDebugPrintCpu (
-  IN      CONST CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsDebugPrintMem (
-  IN      CONST CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsDebugPrintGnb (
-  IN      CONST CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsDebugPrintAll (
-  IN      CONST CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsHdtOutBufferFlush (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-IdsMemTimeOut (
-  IN OUT   VOID *DataPtr
-  );
-
-VOID
-IdsAgesaTestPoint (
-  IN      AGESA_TP TestPoint,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-/**
- *  IDS Backend Function for ASSERT
- *
- * Halt execution with stop code display.  Stop Code is displayed on port 80, with rotation so that
- * it is visible on 8, 16, or 32 bit display.  The stop code is alternated with 0xDEAD on the display,
- * to help distinguish the stop code from a post code loop.
- * Additional features may be available if using simulation.
- *
- * @param[in]     FileCode    File code(define in FILECODE.h) mix with assert Line num.
- *
- * @retval         TRUE     No error
-**/
-BOOLEAN
-IdsAssert (
-  IN      UINT32 FileCode
-  );
-
-/**
- * The engine code for ASSERT MACRO
- *
- * Halt execution with stop code display.  Stop Code is displayed on port 80, with rotation so that
- * it is visible on 8, 16, or 32 bit display.  The stop code is alternated with 0xDEAD on the display,
- * to help distinguish the stop code from a post code loop.
- * Additional features may be available if using simulation.
- *
- * @param[in]     FileCode    File code(define in FILECODE.h) mix with assert Line num.
- *
- */
-BOOLEAN
-IdsErrorStop (
-  IN      UINT32 FileCode
-  );
-
-VOID
-IdsDelay (
-  VOID
-);
-
-BOOLEAN
-AmdHeapIntactCheck (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-IdsCarCorruptionCheck (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-IDS_STATUS
-IdsExceptionTrap (
-  IN       IDS_IDT_FUNC_ID IdsIdtFuncId,
-  IN       VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-IdsPerfTimestamp (
-  IN       UINT32 LineInFile,
-  IN       UINT32 Description,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-IdsPerfAnalyseTimestamp (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-
-#if IDSOPT_IDS_ENABLED == FALSE
-  #undef IEM_SKIP_CODE
-  #undef IEM_INSERT_CODE
-#endif
-#ifndef IEM_SKIP_CODE
-  #define IEM_SKIP_CODE(L)
-#endif
-#ifndef IEM_INSERT_CODE
-  #define IEM_INSERT_CODE(L, Fn, Parm)
-#endif
-
-#endif // _IDS_H_

pi/amd/00660F01/Include/IdsPerf.h

diff --git a/pi/amd/00660F01/Include/IdsPerf.h b/pi/amd/00660F01/Include/IdsPerf.h
deleted file mode 100644
index 0ec8a49..0000000
--- a/pi/amd/00660F01/Include/IdsPerf.h
+++ /dev/null
@@ -1,145 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Integrated Debug Routines for performance analysis
- *
- * Contains AMD AGESA debug macros and functions for performance analysis
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _IDS_PERFORMANCE_DATA_POINT
-
-  #define _IDS_PERFORMANCE_DATA_POINT
-  #define IDS_PERF_VERSION 0x00010001ul  //version number 0.1.0.1
-/// Time points performance function used
-/// N O T E: NEVER change below defination, any new TP MUST be appended to the end of this enum
-  typedef enum {
-    TP_BEGINPROCAMDINITEARLY             = 0x100,  ///< BeginProcAmdInitEarly
-    TP_ENDPROCAMDINITEARLY               = 0x101,  ///< EndProcAmdInitEarly
-    TP_BEGINAMDTOPOINITIALIZE            = 0x102,  ///< BeginAmdTopoInitialize
-    TP_ENDAMDTOPOINITIALIZE              = 0x103,  ///< EndAmdTopoInitialize
-    TP_BEGINGNBINITATEARLIER             = 0x104,  ///< BeginGnbInitAtEarlier
-    TP_ENDGNBINITATEARLIER               = 0x105,  ///< EndGnbInitAtEarlier
-    TP_BEGINAMDCPUEARLY                  = 0x106,  ///< BeginAmdCpuEarly
-    TP_ENDAMDCPUEARLY                    = 0x107,  ///< EndAmdCpuEarly
-    TP_BEGINGNBINITATEARLY               = 0x108,  ///< BeginGnbInitAtEarly
-    TP_ENDGNBINITATEARLY                 = 0x109,  ///< EndGnbInitAtEarly
-    TP_BEGINPROCAMDINITENV               = 0x10A,  ///< BeginProcAmdInitEnv
-    TP_ENDPROCAMDINITENV                 = 0x10B,  ///< EndProcAmdInitEnv
-    TP_BEGININITENV                      = 0x10C,  ///< BeginInitEnv
-    TP_ENDINITENV                        = 0x10D,  ///< EndInitEnv
-    TP_BEGINGNBINITATENV                 = 0x10E,  ///< BeginGnbInitAtEnv
-    TP_ENDGNBINITATENV                   = 0x10F,  ///< EndGnbInitAtEnv
-    TP_BEGINPROCAMDINITLATE              = 0x110,  ///< BeginProcAmdInitLate
-    TP_ENDPROCAMDINITLATE                = 0x111,  ///< EndProcAmdInitLate
-    TP_BEGINCREATSYSTEMTABLE             = 0x112,  ///< BeginCreatSystemTable
-    TP_ENDCREATSYSTEMTABLE               = 0x113,  ///< EndCreatSystemTable
-    TP_BEGINDISPATCHCPUFEATURESLATE      = 0x114,  ///< BeginDispatchCpuFeaturesLate
-    TP_ENDDISPATCHCPUFEATURESLATE        = 0x115,  ///< EndDispatchCpuFeaturesLate
-    TP_BEGINAMDCPULATE                   = 0x116,  ///< BeginAmdCpuLate
-    TP_ENDAMDCPULATE                     = 0x117,  ///< EndAmdCpuLate
-    TP_BEGINGNBINITATLATE                = 0x118,  ///< BeginGnbInitAtLate
-    TP_ENDGNBINITATLATE                  = 0x119,  ///< EndGnbInitAtLate
-    TP_BEGINPROCAMDINITMID               = 0x11A,  ///< BeginProcAmdInitMid
-    TP_ENDPROCAMDINITMID                 = 0x11B,  ///< EndProcAmdInitMid
-    TP_BEGININITMID                      = 0x11E,  ///< BeginInitMid
-    TP_ENDINITMID                        = 0x11F,  ///< EndInitMid
-    TP_BEGINGNBINITATMID                 = 0x120,  ///< BeginGnbInitAtMid
-    TP_ENDGNBINITATMID                   = 0x121,  ///< EndGnbInitAtMid
-    TP_BEGINPROCAMDINITPOST              = 0x122,  ///< BeginProcAmdInitPost
-    TP_ENDPROCAMDINITPOST                = 0x123,  ///< EndProcAmdInitPost
-    TP_BEGINGNBINITATPOST                = 0x124,  ///< BeginGnbInitAtPost
-    TP_ENDGNBINITATPOST                  = 0x125,  ///< EndGnbInitAtPost
-    TP_BEGINAMDMEMAUTO                   = 0x126,  ///< BeginAmdMemAuto
-    TP_ENDAMDMEMAUTO                     = 0x127,  ///< EndAmdMemAuto
-    TP_BEGINAMDCPUPOST                   = 0x128,  ///< BeginAmdCpuPost
-    TP_ENDAMDCPUPOST                     = 0x129,  ///< EndAmdCpuPost
-    TP_BEGINGNBINITATPOSTAFTERDRAM       = 0x12A,  ///< BeginGnbInitAtPostAfterDram
-    TP_ENDGNBINITATPOSTAFTERDRAM         = 0x12B,  ///< EndGnbInitAtPostAfterDram
-    TP_BEGINPROCAMDINITRESET             = 0x12C,  ///< BeginProcAmdInitReset
-    TP_ENDPROCAMDINITRESET               = 0x12D,  ///< EndProcAmdInitReset
-    TP_BEGININITRESET                    = 0x12E,  ///< BeginInitReset
-    TP_ENDINITRESET                      = 0x12F,  ///< EndInitReset
-    TP_BEGINHTINITRESET                  = 0x130,  ///< BeginHtInitReset
-    TP_ENDHTINITRESET                    = 0x131,  ///< EndHtInitReset
-    TP_BEGINPROCAMDINITRESUME            = 0x132,  ///< BeginProcAmdInitResume
-    TP_ENDPROCAMDINITRESUME              = 0x133,  ///< EndProcAmdInitResume
-    TP_BEGINAMDMEMS3RESUME               = 0x134,  ///< BeginAmdMemS3Resume
-    TP_ENDAMDMEMS3RESUME                 = 0x135,  ///< EndAmdMemS3Resume
-    TP_BEGINDISPATCHCPUFEATURESS3RESUME  = 0x136,  ///< BeginDispatchCpuFeaturesS3Resume
-    TP_ENDDISPATCHCPUFEATURESS3RESUME    = 0x137,  ///< EndDispatchCpuFeaturesS3Resume
-    TP_BEGINSETCORESTSCFREQSEL           = 0x138,  ///< BeginSetCoresTscFreqSel
-    TP_ENDSETCORESTSCFREQSEL             = 0x139,  ///< EndSetCoresTscFreqSel
-    TP_BEGINMEMFMCTMEMCLR_INIT           = 0x13A,  ///< BeginMemFMctMemClr_Init
-    TP_ENDNMEMFMCTMEMCLR_INIT            = 0x13B,  ///< EndnMemFMctMemClr_Init
-    TP_BEGINMEMBEFOREMEMDATAINIT         = 0x13C,  ///< BeginMemBeforeMemDataInit
-    TP_ENDMEMBEFOREMEMDATAINIT           = 0x13D,  ///< EndMemBeforeMemDataInit
-    TP_BEGINPROCAMDMEMAUTO               = 0x13E,  ///< BeginProcAmdMemAuto
-    TP_ENDPROCAMDMEMAUTO                 = 0x13F,  ///< EndProcAmdMemAuto
-    TP_BEGINMEMMFLOWC32                  = 0x140,  ///< BeginMemMFlowC32
-    TP_ENDMEMMFLOWC32                    = 0x141,  ///< EndMemMFlowC32
-    TP_BEGINMEMINITIALIZEMCT             = 0x142,  ///< BeginMemInitializeMCT
-    TP_ENDMEMINITIALIZEMCT               = 0x143,  ///< EndMemInitializeMCT
-    TP_BEGINMEMSYSTEMMEMORYMAPPING       = 0x144,  ///< BeginMemSystemMemoryMapping
-    TP_ENDMEMSYSTEMMEMORYMAPPING         = 0x145,  ///< EndMemSystemMemoryMapping
-    TP_BEGINMEMDRAMTRAINING              = 0x146,  ///< BeginMemDramTraining
-    TP_ENDMEMDRAMTRAINING                = 0x147,  ///< EndMemDramTraining
-    TP_BEGINMEMOTHERTIMING               = 0x148,  ///< BeginMemOtherTiming
-    TP_ENDMEMOTHERTIMING                 = 0x149,  ///< EndMemOtherTiming
-    TP_BEGINMEMUMAMEMTYPING              = 0x14A,  ///< BeginMemUMAMemTyping
-    TP_ENDMEMUMAMEMTYPING                = 0x14B,  ///< EndMemUMAMemTyping
-    TP_BEGINMEMMEMCLR                    = 0x14C,  ///< BeginMemMemClr
-    TP_ENDMEMMEMCLR                      = 0x14D,  ///< EndMemMemClr
-    TP_BEGINMEMMFLOWTN                   = 0x14E,  ///< BeginMemMFlowTN
-    TP_ENDMEMMFLOWTN                     = 0x14F,  ///< EndMemMFlowTN
-    TP_BEGINAGESAHOOKBEFOREDRAMINIT      = 0x150,  ///< BeginAgesaHookBeforeDramInit
-    TP_ENDAGESAHOOKBEFOREDRAMINIT        = 0x151,  ///< EndAgesaHookBeforeDramInit
-    TP_BEGINPROCMEMDRAMTRAINING          = 0x152,  ///< BeginProcMemDramTraining
-    TP_ENDPROCMEMDRAMTRAINING            = 0x153,  ///< EndProcMemDramTraining
-    TP_BEGINGNBINITATRTB                 = 0x154,  ///< BeginGnbInitAtRtb
-    TP_ENDGNBINITATRTB                   = 0x155,  ///< EndGnbInitAtRtb
-    TP_BEGINGNBLOADSCSDATA               = 0x156,  ///< BeginGnbLoadScsData
-    TP_ENDGNBLOADSCSDATA                 = 0x157,  ///< EndGnbLoadScsData
-    TP_BEGINGNBPCIETRAINING              = 0x158,  ///< BeginGnbPcieTraining
-    TP_ENDGNBPCIETRAINING                = 0x159,  ///< EndGnbPcieTraining
-    TP_BEGINDISPATCHCPUFEATURESINITRTB   = 0x15A,  ///< BeginDispatchCpuFeaturesInitRtb
-    TP_ENDDISPATCHCPUFEATURESINITRTB     = 0x15B,  ///< EndDispatchCpuFeaturesInitRtb
-    TP_BEGINAMDCPUMID                    = 0x15C,  ///< BeginAmdCpuEarly
-    TP_ENDAMDCPUMID                      = 0x15D,  ///< EndAmdCpuEarly
-    TP_BEGINAMDGNBMIDLATE                = 0x15E,  ///< BeginAmdGnbMidLate
-    TP_ENDAMDAMDGNBMIDLATE               = 0x15F,  ///< EndAmdGnbMidLate
-    IDS_TP_END                                     ///< End of IDS TP list
-  } IDS_PERF_DATA;
-#endif

pi/amd/00660F01/Include/Options.h

diff --git a/pi/amd/00660F01/Include/Options.h b/pi/amd/00660F01/Include/Options.h
deleted file mode 100644
index 70c39f8..0000000
--- a/pi/amd/00660F01/Include/Options.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AGESA options structures
- *
- * Contains options control structures for the AGESA build options
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Core
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-
-#ifndef _OPTIONS_H_
-#define _OPTIONS_H_
-
-/**
- * Provide topology limits for loops and runtime, based on supported families.
- */
-typedef struct {
-  UINT32              PlatformNumberOfSockets;                  ///< The limit to the number of processors based on
-                                                                ///< supported families and other build options.
-  UINT32              PlatformNumberOfModules;                  ///< The limit to the number of modules in a processor, based
-                                                                ///< on supported families.
-} OPTIONS_CONFIG_TOPOLOGY;
-
-/**
- * Dispatch Table.
- *
- * The push high dispatcher uses this table to find what entries are currently in the build image.
- */
-typedef struct {
-  UINT32              FunctionId;                   ///< The function id specified.
-  IMAGE_ENTRY         EntryPoint;                   ///< The corresponding entry point to call.
-} DISPATCH_TABLE;
-
-
-#endif // _OPTIONS_H_

pi/amd/00660F01/Include/PlatformMemoryConfiguration.h

diff --git a/pi/amd/00660F01/Include/PlatformMemoryConfiguration.h b/pi/amd/00660F01/Include/PlatformMemoryConfiguration.h
deleted file mode 100644
index 38f7f05..0000000
--- a/pi/amd/00660F01/Include/PlatformMemoryConfiguration.h
+++ /dev/null
@@ -1,530 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Platform Specific Memory Configuration
- *
- * Contains Definitions and Macros for control of AGESA Memory code on a per platform basis
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  OPTION
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _PLATFORM_MEMORY_CONFIGURATION_H_
-#define _PLATFORM_MEMORY_CONFIGURATION_H_
-
-/*----------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *----------------------------------------------------------------------------------------
- */
-#ifndef PSO_ENTRY
-  #define PSO_ENTRY UINT8
-#endif
-
-/*----------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *----------------------------------------------------------------------------------------
- */
-/*----------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *----------------------------------------------------------------------------------------
- */
-/*----------------------------------------------------------------------------------------
- *                 PLATFORM SPECIFIC MEMORY DEFINITIONS
- *----------------------------------------------------------------------------------------
- */
-///
-///  Memory Speed and DIMM Population Masks
-///
-///<  DDR Speed Masks
-///<    Specifies the DDR Speed on a memory channel
-///
-#define ANY_SPEED 0xFFFFFFFFul
-#define DDR400  ((UINT32) 1 << (DDR400_FREQUENCY  / 66))
-#define DDR533  ((UINT32) 1 << (DDR533_FREQUENCY  / 66))
-#define DDR667  ((UINT32) 1 << (DDR667_FREQUENCY  / 66))
-#define DDR800  ((UINT32) 1 << (DDR800_FREQUENCY  / 66))
-#define DDR1066 ((UINT32) 1 << (DDR1066_FREQUENCY / 66))
-#define DDR1333 ((UINT32) 1 << (DDR1333_FREQUENCY / 66))
-#define DDR1600 ((UINT32) 1 << (DDR1600_FREQUENCY / 66))
-#define DDR1866 ((UINT32) 1 << (DDR1866_FREQUENCY / 66))
-#define DDR2133 ((UINT32) 1 << (DDR2133_FREQUENCY / 66))
-#define DDR2400 ((UINT32) 1 << (DDR2400_FREQUENCY / 66))
-///
-///<  DIMM POPULATION MASKS
-///<    Specifies the DIMM Population on a channel (can be added together to specify configuration).
-///<    ex. SR_DIMM0 + SR_DIMM1                       : Single Rank Dimm in slot 0 AND Slot 1
-///<        SR_DIMM0 + DR_DIMM0 + SR_DIMM1 +DR_DIMM1  : Single OR Dual rank in Slot 0 AND Single OR Dual rank in Slot 1
-///
-#define ANY_       0xFF       ///< Any dimm configuration the current channel
-#define SR_DIMM0   0x0001     ///< Single rank dimm in slot 0 on the current channel
-#define SR_DIMM1   0x0010     ///< Single rank dimm in slot 1 on the current channel
-#define SR_DIMM2   0x0100     ///< Single rank dimm in slot 2 on the current channel
-#define SR_DIMM3   0x1000     ///< Single rank dimm in slot 3 on the current channel
-#define DR_DIMM0   0x0002     ///< Dual rank dimm in slot 0 on the current channel
-#define DR_DIMM1   0x0020     ///< Dual rank dimm in slot 1 on the current channel
-#define DR_DIMM2   0x0200     ///< Dual rank dimm in slot 2 on the current channel
-#define DR_DIMM3   0x2000     ///< Dual rank dimm in slot 3 on the current channel
-#define QR_DIMM0   0x0004     ///< Quad rank dimm in slot 0 on the current channel
-#define QR_DIMM1   0x0040     ///< Quad rank dimm in slot 1 on the current channel
-#define QR_DIMM2   0x0400     ///< Quad rank dimm in slot 2 on the current channel
-#define QR_DIMM3   0x4000     ///< Quad rank dimm in slot 3 on the current channel
-#define LR_DIMM0   0x0001     ///< Lrdimm in slot 0 on the current channel
-#define LR_DIMM1   0x0010     ///< Lrdimm in slot 1 on the current channel
-#define LR_DIMM2   0x0100     ///< Lrdimm in slot 2 on the current channel
-#define LR_DIMM3   0x1000     ///< Lrdimm in slot 3 on the current channel
-#define ANY_DIMM0   0x000F    ///< Any Dimm combination in slot 0 on the current channel
-#define ANY_DIMM1   0x00F0    ///< Any Dimm combination in slot 1 on the current channel
-#define ANY_DIMM2   0x0F00    ///< Any Dimm combination in slot 2 on the current channel
-#define ANY_DIMM3   0xF000    ///< Any Dimm combination in slot 3 on the current channel
-///
-///<  CS POPULATION MASKS
-///<    Specifies the CS Population on a channel (can be added together to specify configuration).
-///<    ex. CS0 + CS1                       : CS0 and CS1 apply to the setting
-///
-#define CS_ANY_       0xFF       ///< Any CS configuration
-#define CS0_   0x01     ///< CS0 bit map mask
-#define CS1_   0x02     ///< CS1 bit map mask
-#define CS2_   0x04     ///< CS2 bit map mask
-#define CS3_   0x08     ///< CS3 bit map mask
-#define CS4_   0x10     ///< CS4 bit map mask
-#define CS5_   0x20     ///< CS5 bit map mask
-#define CS6_   0x40     ///< CS6 bit map mask
-#define CS7_   0x80     ///< CS7 bit map mask
-///
-///< Number of Dimms on the current channel
-///<   This is a mask used to indicate the number of dimms in a channel
-///<   They can be added to indicate multiple conditions (i.e 1 OR 2 Dimms)
-///
-#define ANY_NUM     0xFF      ///< Any number of Dimms
-#define NO_DIMM     0x00      ///< No Dimms present
-#define ONE_DIMM    0x01      ///< One dimm Poulated on the current channel
-#define TWO_DIMM    0x02      ///< Two dimms Poulated on the current channel
-#define THREE_DIMM  0x04      ///< Three dimms Poulated on the current channel
-#define FOUR_DIMM   0x08      ///< Four dimms Poulated on the current channel
-
-///
-///<  DIMM VOLTAGE MASKS
-///
-#define VOLT_ANY_   0xFF      ///< Any voltage configuration
-#define VOLT1_5_    0x01      ///< Voltage 1.5V bit map mask
-#define VOLT1_35_   0x02      ///< Voltage 1.35V bit map mask
-#define VOLT1_25_   0x04      ///< Voltage 1.25V bit map mask
-
-//
-// < Not applicable
-//
-#define NA_ 0                 ///< Not applicable
-
-/*----------------------------------------------------------------------------------------
- *
- * Platform Specific Override Definitions for Socket, Channel and Dimm
- * This indicates where a platform override will be applied.
- *
- *----------------------------------------------------------------------------------------
- */
-///
-///< SOCKET MASKS
-///<   Indicates associated processor sockets to apply override settings
-///
-#define ANY_SOCKET     0xFF    ///<  Apply to all sockets
-#define SOCKET0        0x01    ///<  Apply to socket 0
-#define SOCKET1        0x02    ///<  Apply to socket 1
-#define SOCKET2        0x04    ///<  Apply to socket 2
-#define SOCKET3        0x08    ///<  Apply to socket 3
-#define SOCKET4        0x10    ///<  Apply to socket 4
-#define SOCKET5        0x20    ///<  Apply to socket 5
-#define SOCKET6        0x40    ///<  Apply to socket 6
-#define SOCKET7        0x80    ///<  Apply to socket 7
-///
-///< CHANNEL MASKS
-///<   Indicates Memory channels where override should be applied
-///
-#define ANY_CHANNEL    0xFF    ///<  Apply to all Memory channels
-#define CHANNEL_A      0x01    ///<  Apply to Channel A
-#define CHANNEL_B      0x02    ///<  Apply to Channel B
-#define CHANNEL_C      0x04    ///<  Apply to Channel C
-#define CHANNEL_D      0x08    ///<  Apply to Channel D
-///
-/// DIMM MASKS
-///   Indicates Dimm Slots where override should be applied
-///
-#define ALL_DIMMS      0xFF    ///<  Apply to all dimm slots
-#define DIMM0          0x01    ///<  Apply to Dimm Slot 0
-#define DIMM1          0x02    ///<  Apply to Dimm Slot 1
-#define DIMM2          0x04    ///<  Apply to Dimm Slot 2
-#define DIMM3          0x08    ///<  Apply to Dimm Slot 3
-///
-/// REGISTER ACCESS MASKS
-///   Not supported as an at this time
-///
-#define ACCESS_NB0     0x0
-#define ACCESS_NB1     0x1
-#define ACCESS_NB2     0x2
-#define ACCESS_NB3     0x3
-#define ACCESS_NB4     0x4
-#define ACCESS_PHY     0x5
-#define ACCESS_DCT_XT  0x6
-///
-/// MOTHER BOARD DESIGN LAYERS MASKS
-///   Indicates the layer design of mother board
-///
-#define LAYERS_4     0x0
-#define LAYERS_6     0x1
-/*----------------------------------------------------------------------------------------
- *
- * Platform Specific Overriding Table Definitions
- *
- *----------------------------------------------------------------------------------------
- */
-
-#define PSO_END           0     ///< Table End
-#define PSO_CKE_TRI       1     ///< CKE Tristate Map
-#define PSO_ODT_TRI       2     ///< ODT Tristate Map
-#define PSO_CS_TRI        3     ///< CS Tristate Map
-#define PSO_MAX_DIMMS     4     ///< Max Dimms per channel
-#define PSO_CLK_SPEED     5     ///< Clock Speed
-#define PSO_DIMM_TYPE     6     ///< Dimm Type
-#define PSO_MEMCLK_DIS    7     ///< MEMCLK Disable Map
-#define PSO_MAX_CHNLS     8     ///< Max Channels per Socket
-#define PSO_BUS_SPEED     9     ///< Max Memory Bus Speed
-#define PSO_MAX_CHIPSELS 10     ///< Max Chipsel per Channel
-#define PSO_MEM_TECH     11     ///< Channel Memory Type
-#define PSO_WL_SEED      12     ///< DDR3 Write Levelization Seed delay
-#define PSO_RXEN_SEED    13     ///< Hardwared based RxEn seed
-#define PSO_NO_LRDIMM_CS67_ROUTING 14     ///< CS6 and CS7 are not Routed to all Memoy slots on a channel for LRDIMMs
-#define PSO_SOLDERED_DOWN_SODIMM_TYPE 15  ///< Soldered down SODIMM type
-#define PSO_LVDIMM_VOLT1_5_SUPPORT 16     ///< Force LvDimm voltage to 1.5V
-#define PSO_MIN_RD_WR_DATAEYE_WIDTH 17    ///< Min RD/WR dataeye width
-#define PSO_CPU_FAMILY_TO_OVERRIDE 18     ///< CPU family signature to tell following PSO macros are CPU family dependent
-#define PSO_MAX_SOLDERED_DOWN_DIMMS 19    ///< Max Soldered-down Dimms per channel
-#define PSO_MOTHER_BOARD_LAYERS 20        ///< Mother board layer design
-
-/*----------------------------------
- * CONDITIONAL PSO SPECIFIC ENTRIES
- *---------------------------------*/
-// Condition Types
-#define CONDITIONAL_PSO_MIN   100     ///< Start of Conditional Entry Types
-#define PSO_CONDITION_AND     100     ///< And Block - Start of Conditional block
-#define PSO_CONDITION_LOC     101     ///< Location - Specify Socket, Channel, Dimms to be affected
-#define PSO_CONDITION_SPD     102     ///< SPD - Specify a specific SPD value on a Dimm on the channel
-#define PSO_CONDITION_REG     103     //   Reserved
-#define PSO_CONDITION_MAX     103     ///< End Of Condition Entry Types
-// Action Types
-#define PSO_ACTION_MIN        120     ///< Start of Action Entry Types
-#define PSO_ACTION_ODT        120     ///< ODT values to override
-#define PSO_ACTION_ADDRTMG    121     ///< Address/Timing values to override
-#define PSO_ACTION_ODCCONTROL 122     ///< ODC Control values to override
-#define PSO_ACTION_SLEWRATE   123     ///< Slew Rate value to override
-#define PSO_ACTION_REG        124     //   Reserved
-#define PSO_ACTION_SPEEDLIMIT 125     ///< Memory Bus speed Limit based on configuration
-#define PSO_ACTION_MAX        125     ///< End of Action Entry Types
-#define CONDITIONAL_PSO_MAX   139     ///< End of Conditional Entry Types
-
-/*----------------------------------
- * TABLE DRIVEN PSO SPECIFIC ENTRIES
- *---------------------------------*/
-// Condition descriptor
-#define PSO_TBLDRV_CONFIG        200  ///< Configuration Descriptor
-
-// Overriding entry types
-#define PSO_TBLDRV_START         210  ///< Start of Table Driven Overriding Entry Types
-#define PSO_TBLDRV_SPEEDLIMIT    210  ///< Speed Limit
-#define PSO_TBLDRV_ODT_RTTNOM    211  ///< RttNom
-#define PSO_TBLDRV_ODT_RTTWR     212  ///< RttWr
-#define PSO_TBLDRV_ODTPATTERN    213  ///< Odt Patterns
-#define PSO_TBLDRV_ADDRTMG       214  ///< Address/Timing values
-#define PSO_TBLDRV_ODCCTRL       215  ///< ODC Control values
-#define PSO_TBLDRV_SLOWACCMODE   216  ///< Slow Access Mode
-#define PSO_TBLDRV_MR0_CL        217  ///< MR0[CL]
-#define PSO_TBLDRV_MR0_WR        218  ///< MR0[WR]
-#define PSO_TBLDRV_RC2_IBT       219  ///< RC2[IBT]
-#define PSO_TBLDRV_RC10_OPSPEED  220  ///< RC10[Opearting Speed]
-#define PSO_TBLDRV_LRDIMM_IBT    221  ///< LrDIMM IBT
-#define PSO_TBLDRV_2D_TRAINING   222  ///< 2D training
-#define PSO_TBLDRV_INVALID_TYPE  223  ///< Invalid Type
-#define PSO_TBLDRV_END           223  ///< End of Table Driven Overriding Entry Types
-
-/*----------------------------------------------------------------------------------------
- *                 CONDITIONAL OVERRIDE TABLE MACROS
- *----------------------------------------------------------------------------------------
- */
-#define CPU_FAMILY_TO_OVERRIDE(CpuFamilyRevision) \
-  PSO_CPU_FAMILY_TO_OVERRIDE, 4, \
-  ((CpuFamilyRevision) & 0x0FF), (((CpuFamilyRevision) >> 8)& 0x0FF), (((CpuFamilyRevision) >> 16)& 0x0FF), (((CpuFamilyRevision) >> 24)& 0x0FF)
-
-#define MEMCLK_DIS_MAP(SocketID, ChannelID, Bit0Map, Bit1Map, Bit2Map, Bit3Map, Bit4Map, Bit5Map, Bit6Map, Bit7Map) \
-  PSO_MEMCLK_DIS, 11, SocketID, ChannelID, ALL_DIMMS, Bit0Map, Bit1Map, Bit2Map, Bit3Map, Bit4Map, Bit5Map, Bit6Map \
-  , Bit7Map
-
-#define CKE_TRI_MAP(SocketID, ChannelID, Bit0Map, Bit1Map, Bit2Map, Bit3Map) \
-  PSO_CKE_TRI, 7, SocketID, ChannelID, ALL_DIMMS, Bit0Map, Bit1Map, Bit2Map, Bit3Map
-
-#define ODT_TRI_MAP(SocketID, ChannelID, Bit0Map, Bit1Map, Bit2Map, Bit3Map) \
-  PSO_ODT_TRI, 7, SocketID, ChannelID, ALL_DIMMS, Bit0Map, Bit1Map, Bit2Map, Bit3Map
-
-#define CS_TRI_MAP(SocketID, ChannelID, Bit0Map, Bit1Map, Bit2Map, Bit3Map, Bit4Map, Bit5Map, Bit6Map, Bit7Map) \
-  PSO_CS_TRI, 11, SocketID, ChannelID, ALL_DIMMS, Bit0Map, Bit1Map, Bit2Map, Bit3Map, Bit4Map, Bit5Map, Bit6Map, Bit7Map
-
-#define NUMBER_OF_DIMMS_SUPPORTED(SocketID, ChannelID, NumberOfDimmSlotsPerChannel) \
-  PSO_MAX_DIMMS, 4, SocketID, ChannelID, ALL_DIMMS, NumberOfDimmSlotsPerChannel
-
-#define NUMBER_OF_SOLDERED_DOWN_DIMMS_SUPPORTED(SocketID, ChannelID, NumberOfSolderedDownDimmsPerChannel) \
-  PSO_MAX_SOLDERED_DOWN_DIMMS, 4, SocketID, ChannelID, ALL_DIMMS, NumberOfSolderedDownDimmsPerChannel
-
-#define NUMBER_OF_CHIP_SELECTS_SUPPORTED(SocketID, ChannelID, NumberOfChipSelectsPerChannel) \
-  PSO_MAX_CHIPSELS, 4, SocketID, ChannelID, ALL_DIMMS, NumberOfChipSelectsPerChannel
-
-#define NUMBER_OF_CHANNELS_SUPPORTED(SocketID, NumberOfChannelsPerSocket) \
-  PSO_MAX_CHNLS, 4, SocketID, ANY_CHANNEL, ALL_DIMMS, NumberOfChannelsPerSocket
-
-#define OVERRIDE_DDR_BUS_SPEED(SocketID, ChannelID, TimingMode, BusSpeed) \
-  PSO_BUS_SPEED, 11, SocketID, ChannelID, ALL_DIMMS, TimingMode, (TimingMode >> 8), (TimingMode >> 16), (TimingMode >> 24), \
-  BusSpeed, (BusSpeed >> 8), (BusSpeed >> 16), (BusSpeed >> 24)
-
-#define DRAM_TECHNOLOGY(SocketID, MemTechType) \
-  PSO_MEM_TECH, 7, SocketID, ANY_CHANNEL, ALL_DIMMS, MemTechType, (MemTechType >> 8), (MemTechType >> 16), (MemTechType >> 24)
-
-#define WRITE_LEVELING_SEED(SocketID, ChannelID, DimmID, Byte0Seed, Byte1Seed, Byte2Seed, Byte3Seed, Byte4Seed, Byte5Seed, \
-  Byte6Seed, Byte7Seed, ByteEccSeed) \
-  PSO_WL_SEED, 12, SocketID, ChannelID, DimmID, Byte0Seed, Byte1Seed, Byte2Seed, Byte3Seed, Byte4Seed, Byte5Seed, \
-  Byte6Seed, Byte7Seed, ByteEccSeed
-
-#define HW_RXEN_SEED(SocketID, ChannelID, DimmID, Byte0Seed, Byte1Seed, Byte2Seed, Byte3Seed, Byte4Seed, Byte5Seed, \
-  Byte6Seed, Byte7Seed, ByteEccSeed) \
-  PSO_RXEN_SEED, 21, SocketID, ChannelID, DimmID, Byte0Seed, (Byte0Seed >> 8), Byte1Seed, (Byte1Seed >> 8), Byte2Seed, (Byte2Seed >> 8), \
-  Byte3Seed, (Byte3Seed >> 8), Byte4Seed, (Byte4Seed >> 8), Byte5Seed, (Byte5Seed >> 8), Byte6Seed, (Byte6Seed >> 8), \
-  Byte7Seed, (Byte7Seed >> 8), ByteEccSeed, (ByteEccSeed >> 8)
-
-#define NO_LRDIMM_CS67_ROUTING(SocketID, ChannelID) \
-  PSO_NO_LRDIMM_CS67_ROUTING, 4, SocketID, ChannelID, ALL_DIMMS, TRUE
-
-#define SOLDERED_DOWN_SODIMM_TYPE(SocketID, ChannelID) \
-  PSO_SOLDERED_DOWN_SODIMM_TYPE, 4, SocketID, ChannelID, ALL_DIMMS, TRUE
-
-#define LVDIMM_FORCE_VOLT1_5_FOR_D0 \
-  PSO_LVDIMM_VOLT1_5_SUPPORT, 4, ANY_SOCKET, ANY_CHANNEL, ALL_DIMMS, TRUE
-
-#define MIN_RD_WR_DATAEYE_WIDTH(SocketID, ChannelID, MinRdDataeyeWidth, MinWrDataeyeWidth) \
-  PSO_MIN_RD_WR_DATAEYE_WIDTH, 5, SocketID, ChannelID, ALL_DIMMS, MinRdDataeyeWidth, MinWrDataeyeWidth
-
-#define MOTHER_BOARD_LAYERS(Layers) \
-  PSO_MOTHER_BOARD_LAYERS, 4, ANY_SOCKET, ANY_CHANNEL, ALL_DIMMS, Layers
-
-#define MAX_NUMBER_PSO_TABLES 13
-/*----------------------------------------------------------------------------------------
- *                 CONDITIONAL OVERRIDE TABLE MACROS
- *----------------------------------------------------------------------------------------
- */
-#define CONDITION_AND \
-  PSO_CONDITION_AND, 0
-
-#define COND_LOC(SocketMsk, ChannelMsk, DimmMsk) \
-  PSO_CONDITION_LOC, 3, SocketMsk, ChannelMsk, DimmMsk
-
-#define COND_SPD(Byte, Mask, Value) \
-  PSO_CONDITION_SPD, 3, Byte, Mask, Value
-
-#define COND_REG(Access, Offset, Mask, Value) \
- PSO_CONDITION_REG, 11, Access, (Offset & 0x0FF), (Offset >> 8), \
-   ((Mask) & 0x0FF), (((Mask) >> 8) & 0x0FF), (((Mask) >> 16) & 0x0FF), (((Mask) >> 24) & 0x0FF), \
-   ((Value) & 0x0FF), (((Value) >> 8) & 0x0FF), (((Value) >> 16) & 0x0FF), (((Value) >> 24) & 0x0FF)
-
-#define ACTION_ODT(Frequency, Dimms, QrDimms, DramOdt, QrDramOdt, DramDynOdt) \
-  PSO_ACTION_ODT, 9, \
-  ((Frequency) & 0x0FF), (((Frequency) >> 8)& 0x0FF), (((Frequency) >> 16)& 0x0FF), ((Frequency >> 24)& 0x0FF), \
-  Dimms, QrDimms, DramOdt, QrDramOdt, DramDynOdt
-
-#define ACTION_ADDRTMG(Frequency, DimmConfig, AddrTmg) \
-  PSO_ACTION_ADDRTMG, 10, \
-  ((Frequency) & 0x0FF), (((Frequency) >> 8)& 0x0FF), (((Frequency) >> 16)& 0x0FF), (((Frequency) >> 24)& 0x0FF), \
-  ((DimmConfig) & 0x0FF), (((DimmConfig) >> 8) & 0x0FF), \
-  (AddrTmg & 0x0FF), ((AddrTmg >> 8)& 0x0FF), ((AddrTmg >> 16)& 0x0FF), ((AddrTmg >> 24)& 0x0FF)
-
-#define ACTION_ODCCTRL(Frequency, DimmConfig, OdcCtrl) \
-  PSO_ACTION_ODCCONTROL, 10, \
-  ((Frequency) & 0x0FF), (((Frequency) >> 8)& 0x0FF), (((Frequency) >> 16)& 0x0FF), (((Frequency) >> 24)& 0x0FF), \
-  ((DimmConfig) & 0x0FF), (((DimmConfig) >> 8) & 0x0FF), \
-  (OdcCtrl & 0x0FF), ((OdcCtrl >> 8)& 0x0FF), ((OdcCtrl >> 16)& 0x0FF), ((OdcCtrl >> 24)& 0x0FF)
-
-#define ACTION_SLEWRATE(Frequency, DimmConfig, SlewRate) \
-  PSO_ACTION_SLEWRATE, 10, \
-  ((Frequency) & 0x0FF), (((Frequency) >> 8)& 0x0FF), (((Frequency) >> 16)& 0x0FF), (((Frequency) >> 24)& 0x0FF), \
-  ((DimmConfig) & 0x0FF), (((DimmConfig) >> 8) & 0x0FF), \
-  (SlewRate & 0x0FF), ((SlewRate >> 8)& 0x0FF), ((SlewRate >> 16)& 0x0FF), ((SlewRate >> 24)& 0x0FF)
-
-#define ACTION_SPEEDLIMIT(DimmConfig, Dimms, SpeedLimit15, SpeedLimit135, SpeedLimit125) \
-  PSO_ACTION_SPEEDLIMIT, 9, \
-  ((DimmConfig) & 0x0FF), (((DimmConfig) >> 8) & 0x0FF), Dimms, \
-  (SpeedLimit15 & 0x0FF), ((SpeedLimit15 >> 8)& 0x0FF), \
-  (SpeedLimit135 & 0x0FF), ((SpeedLimit135 >> 8)& 0x0FF), \
-  (SpeedLimit125 & 0x0FF), ((SpeedLimit125 >> 8)& 0x0FF)
-
-
-#define MEMCLK_DIS_MAP_SIZE  13
-#define CKE_TRI_MAP_SIZE  9
-#define ODT_TRI_MAP_SIZE  9
-#define CS_TRI_MAP_SIZE 13
-#define NUMBER_OF_DIMMS_SUPPORTED_SIZE  6
-#define NUMBER_OF_SOLDERED_DOWN_DIMMS_SUPPORTED_SIZE  6
-#define NUMBER_OF_CHIP_SELECTS_SUPPORTED_SIZE  6
-#define NUMBER_OF_CHANNELS_SUPPORTED_SIZE  6
-#define OVERRIDE_DDR_BUS_SPEED_SIZE  13
-#define DRAM_TECHNOLOGY_SIZE  9
-#define SOLDERED_DOWN_SODIMM_TYPE_SIZE  6
-#define MEMORY_POWER_POLICY_OVERRIDE_SIZE  6
-#define MOTHER_BOARD_LAYERS_SIZE  6
-
-
-
-/*----------------------------------------------------------------------------------------
- *                 END OF CONDITIONAL OVERRIDE TABLE MACROS
- *----------------------------------------------------------------------------------------
- */
-/*----------------------------------------------------------------------------------------
- *                 TABLE DRIVEN OVERRIDE  MACROS
- *----------------------------------------------------------------------------------------
- */
-/// Configuration sub-descriptors
-typedef enum {
-  CONFIG_GENERAL,        ///< CONFIG_GENERAL
-  CONFIG_SPEEDLIMIT,     ///< CONFIG_SPEEDLIMIT
-  CONFIG_RC2IBT,         ///< CONFIG_RC2IBT
-  CONFIG_DONT_CARE,      ///< CONFIG_DONT_CARE
-} Config_Type;
-
-// ====================
-// Configuration Macros
-// ====================
-#define TBLDRV_CONFIG_TO_OVERRIDE(DimmPerCH, Frequency, DimmVolt, DimmConfig) \
-  PSO_TBLDRV_CONFIG, 9, \
-  CONFIG_GENERAL, \
-  DimmPerCH, DimmVolt, \
-  ((Frequency) & 0x0FF), (((Frequency) >> 8)& 0x0FF), (((Frequency) >> 16)& 0x0FF), (((Frequency) >> 24)& 0x0FF), \
-  ((DimmConfig) & 0x0FF), (((DimmConfig) >> 8) & 0x0FF)
-
-#define TBLDRV_SPEEDLIMIT_CONFIG_TO_OVERRIDE(DimmPerCH, Dimms, NumOfSR, NumOfDR, NumOfQR, NumOfLRDimm) \
-  PSO_TBLDRV_CONFIG, 7, \
-  CONFIG_SPEEDLIMIT, \
-  DimmPerCH, Dimms, NumOfSR, NumOfDR, NumOfQR, NumOfLRDimm
-
-#define TBLDRV_RC2IBT_CONFIG_TO_OVERRIDE(DimmPerCH, Frequency, DimmVolt, DimmConfig, NumOfReg) \
-  PSO_TBLDRV_CONFIG, 10, \
-  CONFIG_RC2IBT, \
-  DimmPerCH, DimmVolt, \
-  ((Frequency) & 0x0FF), (((Frequency) >> 8)& 0x0FF), (((Frequency) >> 16)& 0x0FF), (((Frequency) >> 24)& 0x0FF), \
-  ((DimmConfig) & 0x0FF), (((DimmConfig) >> 8) & 0x0FF), \
-  NumOfReg
-
-//==================
-// Overriding Macros
-//==================
-#define TBLDRV_CONFIG_ENTRY_SPEEDLIMIT(SpeedLimit1_5, SpeedLimit1_35, SpeedLimit1_25) \
-  PSO_TBLDRV_SPEEDLIMIT, 6, \
-  (SpeedLimit1_5 & 0x0FF), ((SpeedLimit1_5 >> 8)& 0x0FF), \
-  (SpeedLimit1_35 & 0x0FF), ((SpeedLimit1_35 >> 8)& 0x0FF), \
-  (SpeedLimit1_25 & 0x0FF), ((SpeedLimit1_25 >> 8)& 0x0FF)
-
-#define TBLDRV_CONFIG_ENTRY_ODT_RTTNOM(TgtCS, RttNom) \
-  PSO_TBLDRV_ODT_RTTNOM, 2, \
-  TgtCS, RttNom
-
-#define TBLDRV_CONFIG_ENTRY_ODT_RTTWR(TgtCS, RttWr) \
-  PSO_TBLDRV_ODT_RTTWR, 2, \
-  TgtCS, RttWr
-
-#define TBLDRV_CONFIG_ENTRY_ODTPATTERN(RdODTCSHigh, RdODTCSLow, WrODTCSHigh, WrODTCSLow) \
-  PSO_TBLDRV_ODTPATTERN, 16, \
-  ((RdODTCSHigh) & 0x0FF), (((RdODTCSHigh) >> 8)& 0x0FF), (((RdODTCSHigh) >> 16)& 0x0FF), (((RdODTCSHigh) >> 24)& 0x0FF), \
-  ((RdODTCSLow) & 0x0FF), (((RdODTCSLow) >> 8)& 0x0FF), (((RdODTCSLow) >> 16)& 0x0FF), (((RdODTCSLow) >> 24)& 0x0FF), \
-  ((WrODTCSHigh) & 0x0FF), (((WrODTCSHigh) >> 8)& 0x0FF), (((WrODTCSHigh) >> 16)& 0x0FF), (((WrODTCSHigh) >> 24)& 0x0FF), \
-  ((WrODTCSLow) & 0x0FF), (((WrODTCSLow) >> 8)& 0x0FF), (((WrODTCSLow) >> 16)& 0x0FF), (((WrODTCSLow) >> 24)& 0x0FF)
-
-#define TBLDRV_CONFIG_ENTRY_ADDRTMG(AddrTmg) \
-  PSO_TBLDRV_ADDRTMG, 4, \
-  ((AddrTmg) & 0x0FF), (((AddrTmg) >> 8)& 0x0FF), (((AddrTmg) >> 16)& 0x0FF), (((AddrTmg) >> 24)& 0x0FF)
-
-#define TBLDRV_CONFIG_ENTRY_ODCCTRL(OdcCtrl) \
-  PSO_TBLDRV_ODCCTRL, 4, \
-  ((OdcCtrl) & 0x0FF), (((OdcCtrl) >> 8)& 0x0FF), (((OdcCtrl) >> 16)& 0x0FF), (((OdcCtrl) >> 24)& 0x0FF)
-
-#define TBLDRV_CONFIG_ENTRY_SLOWACCMODE(SlowAccMode) \
-  PSO_TBLDRV_SLOWACCMODE, 1, \
-  SlowAccMode
-
-#define TBLDRV_CONFIG_ENTRY_RC2_IBT(TgtDimm, IBT) \
-  PSO_TBLDRV_RC2_IBT, 2, \
-  TgtDimm, IBT
-
-#define TBLDRV_OVERRIDE_MR0_CL(RegValOfTcl, MR0CL13, MR0CL0) \
-  PSO_TBLDRV_CONFIG, 1, \
-  CONFIG_DONT_CARE, \
-  PSO_TBLDRV_MR0_CL, 3, \
-  RegValOfTcl, MR0CL13, MR0CL0
-
-#define TBLDRV_OVERRIDE_MR0_WR(RegValOfTwr, MR0WR) \
-  PSO_TBLDRV_CONFIG, 1, \
-  CONFIG_DONT_CARE, \
-  PSO_TBLDRV_MR0_WR, 2, \
-  RegValOfTwr, MR0WR
-
-#define TBLDRV_OVERRIDE_RC10_OPSPEED(Frequency, MR10OPSPEED) \
-  PSO_TBLDRV_CONFIG, 1, \
-  CONFIG_DONT_CARE, \
-  PSO_TBLDRV_RC10_OPSPEED, 5, \
-  ((Frequency) & 0x0FF), (((Frequency) >> 8)& 0x0FF), (((Frequency) >> 16)& 0x0FF), (((Frequency) >> 24)& 0x0FF), \
-  MR10OPSPEED
-
-#define TBLDRV_CONFIG_ENTRY_LRDMM_IBT(F0RC8, F1RC0, F1RC1, F1RC2) \
-  PSO_TBLDRV_LRDIMM_IBT, 4, \
-  F0RC8, F1RC0, F1RC1, F1RC2
-
-#define TBLDRV_CONFIG_ENTRY_2D_TRAINING(Training2dMode) \
-  PSO_TBLDRV_2D_TRAINING, 1, \
-  Training2dMode
-
-//============================
-// Macros for removing entries
-//============================
-#define INVALID_CONFIG_FLAG   0x8000
-
-#define TBLDRV_INVALID_CONFIG \
-  PSO_TBLDRV_INVALID_TYPE, 0
-
-/*----------------------------------------------------------------------------------------
- *                 END OF TABLE DRIVEN OVERRIDE  MACROS
- *----------------------------------------------------------------------------------------
- */
-
-#endif  // _PLATFORM_MEMORY_CONFIGURATION_H_

pi/amd/00660F01/Include/Topology.h

diff --git a/pi/amd/00660F01/Include/Topology.h b/pi/amd/00660F01/Include/Topology.h
deleted file mode 100644
index 099142e..0000000
--- a/pi/amd/00660F01/Include/Topology.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Topology interface definitions.
- *
- * Contains AMD AGESA internal interface for topology related data which
- * is consumed by code other than Topology Services init.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Core
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _TOPOLOGY_H_
-#define _TOPOLOGY_H_
-
-// Defines for limiting data structure maximum allocation and limit checking.
-#define MAX_NODES 1
-#define MAX_SOCKETS MAX_NODES
-#define MAX_DIES 1
-
-/**
- * Socket and Module to Node Map Item.
- * Provide the Node Id and core id range for each module in each processor.
- */
-typedef struct {
-  UINT8 Node;                 ///< The module's Node id.
-  UINT8 LowCore;              ///< The lowest processor core id for this module.
-  UINT8 HighCore;             ///< The highest processor core id for this module.
-  UINT8 EnabledComputeUnits;  ///< The value of Enabled for this processor module.
-  UINT8 DualCoreComputeUnits; ///< The value of DualCore for this processor module.
-  UINT8 TripleCoreComputeUnits;///< The value of TripleCore for this processor module.
-  UINT8 QuadCoreComputeUnits; ///< The value of QuadCore for this processor module.
-} SOCKET_DIE_TO_NODE_ITEM;
-
-/**
- * Socket and Module to Node Map.
- * This type is a pointer to the actual map, it can be used for a struct item or
- * for typecasting a heap buffer pointer.
- */
-typedef SOCKET_DIE_TO_NODE_ITEM (*SOCKET_DIE_TO_NODE_MAP)[MAX_SOCKETS][MAX_DIES];
-
-/**
- * Node id to Socket Die Map Item.
- */
-typedef struct {
-  UINT8 Socket;             ///< socket of the processor containing the Node.
-  UINT8 Die;                ///< the module in the processor which is Node.
-} NODE_TO_SOCKET_DIE_ITEM;
-
-/**
- * Node id to Socket Die Map.
- */
-typedef NODE_TO_SOCKET_DIE_ITEM (*NODE_TO_SOCKET_DIE_MAP)[MAX_NODES];
-
-#endif  // _TOPOLOGY_H_

pi/amd/00660F01/Porting.h

diff --git a/pi/amd/00660F01/Porting.h b/pi/amd/00660F01/Porting.h
deleted file mode 100644
index f23f309..0000000
--- a/pi/amd/00660F01/Porting.h
+++ /dev/null
@@ -1,286 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Describes compiler dependencies - to support several compile time environments
- *
- * Contains compiler environment porting descriptions
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Includes
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- */
-/*****************************************************************************
- *
- * Copyright 2008 - 2015 ADVANCED MICRO DEVICES, INC.  All Rights Reserved.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _PORTING_H_
-#define _PORTING_H_
-
-#if defined (_MSC_VER)
-  #include <intrin.h>
-  void _disable (void);
-  void _enable (void);
-  #pragma warning(disable: 4103 4001 4733)
-  #pragma intrinsic (_disable, _enable)
-  #pragma warning(push)
-  // -----------------------------------------------------------------------
-  //   Define a code_seg MACRO
-  //
-  #define MAKE_AS_A_STRING(arg) #arg
-
-  #define CODE_GROUP(arg) __pragma (code_seg (MAKE_AS_A_STRING (.t##arg)))
-
-  #define RDATA_GROUP(arg) __pragma (const_seg (MAKE_AS_A_STRING (.d##arg)))
-  #define FUNC_ATTRIBUTE(arg) __declspec(arg)
-  //#include <intrin.h>  // MS has built-in functions
-
-  #if _MSC_VER < 900
-    // -----------------------------------------------------------------------
-    //    Assume MSVC 1.52C (16-bit)
-    //
-    //    NOTE: When using MSVC 1.52C use the following command line:
-    //
-    //       CL.EXE /G3 /AL /O1i /Fa <FILENAME.C>
-    //
-    //    This will produce 32-bit code in USE16 segment that is optimized for code
-    //    size.
-    typedef void          VOID;
-
-    // Create the universal 32, 16, and 8-bit data types
-    typedef unsigned long   UINTN;
-    typedef          long   INT32;
-    typedef unsigned long   UINT32;
-    typedef          int    INT16;
-    typedef unsigned int    UINT16;
-    typedef          char   INT8;
-    typedef unsigned char   UINT8;
-    typedef          char   CHAR8;
-    typedef unsigned short  CHAR16;
-
-    /// struct for 16-bit environment handling of 64-bit value
-    typedef struct _UINT64 {
-      IN OUT  UINT32 lo;      ///< lower 32-bits of 64-bit value
-      IN OUT  UINT32 hi;      ///< highest 32-bits of 64-bit value
-    } UINT64;
-
-    // Create the Boolean type
-    #define TRUE  1
-    #define FALSE 0
-    typedef unsigned char BOOLEAN;
-
-    #define CONST const
-    #define STATIC static
-    #define VOLATILE volatile
-    #define CALLCONV __pascal
-    #define ROMDATA __based( __segname( "_CODE" ) )
-    #define _16BYTE_ALIGN   __declspec(align(16))
-
-    // Force tight packing of structures
-    // Note: Entire AGESA (Project / Solution) will be using pragma pack 1
-    #pragma warning( disable : 4103 ) // Disable '#pragma pack' in .h warning
-    #pragma pack(1)
-
-    //   Disable WORD->BYTE automatic conversion warnings.  Example:
-    //   BYTE LocalByte;
-    //   void MyFunc(BYTE val);
-    //
-    //   MyFunc(LocalByte*2+1); // Warning, automatic conversion
-    //
-    //   The problem is any time math is performed on a BYTE, it is converted to a
-    //   WORD by MSVC 1.52c, and then when it is converted back to a BYTE, a warning
-    //   is generated.  Disable warning C4761
-    #pragma warning( disable : 4761 )
-
-  #else
-    // -----------------------------------------------------------------------
-    //   Assume a 32-bit MSVC++
-    //
-    // Disable the following warnings:
-    // 4100 - 'identifier' : unreferenced formal parameter
-    // 4276 - 'function' : no prototype provided; assumed no parameters
-    // 4214 - non standard extension used : bit field types other than int
-    // 4001 - nonstandard extension 'single line comment' was used
-    // 4142 - benign redefinition of type for following declaration
-    //      - typedef char    INT8
-    #if defined (_M_IX86)
-      #pragma warning (disable: 4100 4276 4214 4001 4142 4305 4306)
-
-      #ifndef VOID
-        typedef void VOID;
-      #endif
-    // Create the universal 32, 16, and 8-bit data types
-      #ifndef UINTN
-        typedef unsigned __w64 UINTN;
-      #endif
-      typedef          __int64 INT64;
-      typedef unsigned __int64 UINT64;
-      typedef          int   INT32;
-      typedef unsigned int   UINT32;
-      typedef          short INT16;
-      typedef unsigned short UINT16;
-      typedef          char  INT8;
-      typedef unsigned char  UINT8;
-      typedef          char  CHAR8;
-      typedef unsigned short CHAR16;
-
-    // Create the Boolean type
-      #ifndef TRUE
-        #define TRUE  1
-      #endif
-      #ifndef FALSE
-        #define FALSE 0
-      #endif
-      typedef unsigned char BOOLEAN;
-
-      // Force tight packing of structures
-      // Note: Entire AGESA (Project / Solution) will be using pragma pack 1
-      #pragma pack(1)
-
-      #define CONST const
-      #define STATIC static
-      #define VOLATILE volatile
-      #define CALLCONV
-      #define ROMDATA
-      #define _16BYTE_ALIGN __declspec(align(64))
-      // 64 bit of compiler
-    #else
-      #pragma warning (disable: 4100 4276 4214 4001 4142 4305 4306 4366)
-
-      #ifndef VOID
-        typedef void VOID;
-      #endif
-      // Create the universal 32, 16, and 8-bit data types
-      #ifndef UINTN
-        typedef unsigned __int64 UINTN;
-      #endif
-      typedef          __int64 INT64;
-      typedef unsigned __int64 UINT64;
-      typedef          int   INT32;
-      typedef unsigned int   UINT32;
-      typedef          short INT16;
-      typedef unsigned short UINT16;
-      typedef          char  INT8;
-      typedef unsigned char  UINT8;
-      typedef          char  CHAR8;
-      typedef unsigned short CHAR16;
-
-      // Create the Boolean type
-      #ifndef TRUE
-        #define TRUE  1
-      #endif
-      #ifndef FALSE
-        #define FALSE 0
-      #endif
-      typedef unsigned char BOOLEAN;
-
-      // Force tight packing of structures
-      // Note: Entire AGESA (Project / Solution) will be using pragma pack 1
-      #pragma pack(1)
-
-      #define CONST const
-      #define STATIC static
-      #define VOLATILE volatile
-      #define CALLCONV
-      #define ROMDATA
-    #endif
-  #endif
-  // -----------------------------------------------------------------------
-  // End of MS compiler versions
-
-#elif defined __GNUC__
-
-  #define IN
-  #define OUT
-  #define STATIC static
-  #define VOLATILE volatile
-  #define TRUE 1
-  #define FALSE 0
-//  #undef CONST
-  #define CONST const
-  #define ROMDATA
-  #define CALLCONV
-  #define _16BYTE_ALIGN __attribute__ ((aligned (16)))
-  #define _8BYTE_ALIGN __attribute__ ((aligned (8)))
-  #define _4BYTE_ALIGN __attribute__ ((aligned (4)))
-  #define _2BYTE_ALIGN __attribute__ ((aligned (2)))
-  #define _1BYTE_ALIGN __attribute__ ((aligned (1)))
-
-  typedef unsigned char  BOOLEAN;
-  typedef   signed char  INT8;
-  typedef   signed short INT16;
-  typedef   signed long  INT32;
-  typedef          char  CHAR8;
-  typedef unsigned char  UINT8;
-  typedef unsigned short UINT16;
-  typedef unsigned long  UINT32;
-  typedef unsigned long  UINTN;
-  typedef unsigned long  long UINT64;
-  typedef long  long INT64;
-  typedef void VOID;
-  //typedef unsigned long  size_t;
-
-  //#include <intrin.h>                   // MingW-w64 library header
-#pragma pack(1)
-
-#define CODE_GROUP(arg)
-#define RDATA_GROUP(arg)
-
-#define FUNC_ATTRIBUTE(arg) __attribute__((arg))
-#define MAKE_AS_A_STRING(arg) #arg
-#include <stddef.h>
-#include "gcc-intrin.h"
-
-#include <assert.h>
-#include <console/console.h>
-#include <console/loglevel.h>
-
-#ifndef NULL
-  #define NULL              (void *)0
-#endif
-
-#else
-  // -----------------------------------------------------------------------
-  // Unknown or unsupported compiler
-  //
-  #error "Unknown compiler in use"
-#endif
-
-// -----------------------------------------------------------------------
-// Common definitions for all compilers
-//
-
-//Support forward reference construct
-#define AGESA_FORWARD_DECLARATION(x) typedef struct _##x x
-
-// The following are use in conformance to the UEFI style guide
-#define IN
-#define OUT
-
-#endif // _PORTING_H_

pi/amd/00660F01/Proc/CPU/Family/cpuFamRegisters.h

diff --git a/pi/amd/00660F01/Proc/CPU/Family/cpuFamRegisters.h b/pi/amd/00660F01/Proc/CPU/Family/cpuFamRegisters.h
deleted file mode 100644
index c4be628..0000000
--- a/pi/amd/00660F01/Proc/CPU/Family/cpuFamRegisters.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Register Table Related Functions
- *
- * Contains the definition of the CPU CPUID MSRs and PCI registers with BKDG recommended values
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 309899 $   @e \$Date: 2014-12-23 02:21:13 -0600 (Tue, 23 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _CPU_FAM_REGISTERS_H_
-#define _CPU_FAM_REGISTERS_H_
-
-/*
- *--------------------------------------------------------------
- *
- *                      M O D U L E S    U S E D
- *
- *---------------------------------------------------------------
- */
-
-/*
- *--------------------------------------------------------------
- *
- *                      D E F I N I T I O N S  /  M A C R O S
- *
- *---------------------------------------------------------------
- */
-
-// This define should be equal to the total number of families
-// in the cpuFamily enum.
-#define MAX_CPU_FAMILIES    15
-#define MAX_CPU_REVISIONS   15    // Max Cpu Revisions Per Family
-
-// CPU_LOGICAL_ID.Family equates
-// Family 15h equates
-#define AMD_FAMILY_15_CZ  0x0004u
-#define AMD_FAMILY_CZ     (AMD_FAMILY_15_CZ)
-#define AMD_FAMILY_15     AMD_FAMILY_15_CZ
-
-// Family Unknown
-#define AMD_FAMILY_UNKNOWN 0x8000u
-
-
-// Family 15h CPU_LOGICAL_ID.Revision equates
-// -------------------------------------
-
-  // Family 15h CZ steppings
-#define AMD_F15_CZ_A0    0x0001u
-#define AMD_F15_CZ_A1    0x0002u
-  // Family 15h Unknown stepping
-#define AMD_F15_UNKNOWN  0x8000u
-#define AMD_F15_CZ_Ax    (AMD_F15_CZ_A0 | AMD_F15_CZ_A1)
-#define AMD_F15_CZ_ALL   (AMD_F15_CZ_Ax)
-
-#define AMD_F15_ALL      AMD_F15_CZ_ALL
-
-#endif      // _CPU_FAM_REGISTERS_H_
-

pi/amd/00660F01/Proc/CPU/Feature/cpuCacheInit.h

diff --git a/pi/amd/00660F01/Proc/CPU/Feature/cpuCacheInit.h b/pi/amd/00660F01/Proc/CPU/Feature/cpuCacheInit.h
deleted file mode 100644
index 3ee71cd..0000000
--- a/pi/amd/00660F01/Proc/CPU/Feature/cpuCacheInit.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Execution Cache Allocation functions.
- *
- * Contains code for doing Execution Cache Allocation for ROM space
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _CPU_CACHE_INIT_H_
-#define _CPU_CACHE_INIT_H_
-
-/*----------------------------------------------------------------------------
- *   Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
- *
- *----------------------------------------------------------------------------
- */
-
-/*-----------------------------------------------------------------------------
- *                         DEFINITIONS AND MACROS
- *
- *-----------------------------------------------------------------------------
- */
-#define BSP_STACK_SIZE_64K        65536
-#define BSP_STACK_SIZE_32K        32768
-
-#define CORE0_STACK_SIZE          16384
-#define CORE1_STACK_SIZE          4096
-
-#define AMD_MTRR_FIX4K_BASE     0x268
-#define AMD_MTRR_VARIABLE_BASE6 0x20C
-#define AMD_MTRR_VARIABLE_BASE7 0x20E
-
-#define WP_IO 0x0505050505050505ull
-
-#define AGESA_CACHE_SIZE_REDUCED              1
-#define AGESA_CACHE_REGIONS_ACROSS_1MB        2
-#define AGESA_CACHE_REGIONS_ACROSS_4GB        3
-#define AGESA_REGION_NOT_ALIGNED_ON_BOUNDARY  4
-#define AGESA_CACHE_START_ADDRESS_LESS_D0000  5
-#define AGESA_THREE_CACHE_REGIONS_ABOVE_1MB   6
-#define AGESA_DEALLOCATE_CACHE_REGIONS        7
-
-/*----------------------------------------------------------------------------
- *                         TYPEDEFS, STRUCTURES, ENUMS
- *
- *----------------------------------------------------------------------------
- */
-/// Cache-As-Ram Executable region allocation modes
-typedef enum {
-  LimitedByL2Size,                            ///< Execution space must be allocated from L2
-  InfiniteExe,                                ///< Family can support unlimited Execution space
-  MaxCarExeMode                               ///< Used as limit or bounds check
-} CAR_EXE_MODE;
-
-/// Cache Information
-typedef struct {
-  IN       UINT32  BspStackSize;              ///< Stack size of BSP
-  IN       UINT32  Core0StackSize;            ///< Stack size of primary cores
-  IN       UINT32  Core1StackSize;            ///< Stack size of all non primary cores
-  IN       UINT32  MemTrainingBufferSize;     ///< Memory training buffer size
-  IN       UINT32  SharedMemSize;             ///< Shared memory size
-  IN       UINT64  VariableMtrrMask;          ///< Mask to apply before variable MTRR writes
-  IN       UINT64  VariableMtrrHeapMask;      ///< Mask to apply before variable MTRR writes for use in heap init.
-  IN       UINT64  HeapBaseMask;              ///< Mask used for the heap MTRR settings
-  IN CAR_EXE_MODE  CarExeType;                ///< Indicates which algorithm to use when allocating EXE space
-} CACHE_INFO;
-
-/// Merged memory region overlap type
-typedef enum {
-  EmptySet,                                   ///< One of the regions is zero length
-  Disjoint,                                   ///< The two regions do not touch
-  Adjacent,                                   ///< one region is next to the other, no gap
-  CommonEnd,                                  ///< regions overlap with a common end point
-  Extending,                                  ///< the 2nd region is extending the size of the 1st
-  Contained,                                  ///< the 2nd region is wholely contained inside the 1st
-  CommonStartContained,                       ///< the 2nd region is contained in the 1st with a common start
-  Identity,                                   ///< the two regions are the same
-  CommonStartExtending,                       ///< the 2nd region has same start as 1st, but is larger size
-  NotCombinable                               ///< the combined regions do not follow the cache block rules
-} OVERLAP_TYPE;
-
-/// Result of merging two memory regions for cache coverage
-typedef struct {
-  IN OUT  UINT32        MergedStartAddr;      ///< Start address of the merged regions
-  IN OUT  UINT32        MergedSize;           ///< Size of the merged regions
-     OUT  UINT32        OverlapAmount;        ///< the size of the overlapping section
-     OUT  OVERLAP_TYPE  OverlapType;          ///< indicates how the two regions overlap
-} MERGED_CACHE_REGION;
-
-/*----------------------------------------------------------------------------
- *                           FUNCTIONS PROTOTYPE
- *
- *----------------------------------------------------------------------------
- */
-AGESA_STATUS
-AllocateExecutionCache (
-  IN AMD_CONFIG_PARAMS *StdHeader,
-  IN EXECUTION_CACHE_REGION *AmdExeAddrMapPtr
-  );
-
-#endif  // _CPU_CACHE_INIT_H_
-

pi/amd/00660F01/Proc/CPU/cpuEarlyInit.h

diff --git a/pi/amd/00660F01/Proc/CPU/cpuEarlyInit.h b/pi/amd/00660F01/Proc/CPU/cpuEarlyInit.h
deleted file mode 100644
index 7efbc52..0000000
--- a/pi/amd/00660F01/Proc/CPU/cpuEarlyInit.h
+++ /dev/null
@@ -1,213 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Reset API, and related functions and structures.
- *
- * Contains code that initialized the CPU after early reset.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _CPU_EARLY_INIT_H_
-#define _CPU_EARLY_INIT_H_
-
-
-/*---------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *---------------------------------------------------------------------------------------
- */
-AGESA_FORWARD_DECLARATION (CPU_CORE_LEVELING_FAMILY_SERVICES);
-
-/*---------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *---------------------------------------------------------------------------------------
- */
-//----------------------------------------------------------------------------
-//                         CPU BRAND ID TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-#define CPU_BRAND_ID_LENGTH     48            // Total number of characters supported
-#define LOW_NODE_DEVICEID       24
-#define NB_CAPABILITIES         0xE8          //Function 3 Registers
-//----------------------------------------------------------------------------
-//                         CPU MICROCODE PATCH TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/* All lengths are in bytes */
-#define MICROCODE_TRIADE_SIZE           28
-#define MICROCODE_HEADER_LENGTH         64
-
-/**
- * @page ucodeflag Microcode Patches Signature Guide
- *
- * We mark patches in the ROM with a signature so that they can be easily found
- *
- *   @anchor Microcode Patch Signature
- *   @li @e  Microcode Patch Signature @n
- *         Microcode patches are marked by adding a signature before patches in the ROM image to
- *         help identify where they are located.
- *         There're two kind of signatures. One is '$UCODE2K', it indicates there's a following patch with 2K size.
- *         The other is '$UCODE4K', it indicates there's a following patch with 4K size.
- *         If you want to know the patch level / equivalent ID, please consult the BKDG for patch header format.
- *
- *
- */
-/// Microcode patch flag for replacement
-typedef struct {
-  IN       UINT8   MicrocodePatchesFlag[8];  ///< a flag followed by microcode
-} MICROCODE_PATCHES_FLAG;
-
-#define UCODE_2K_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', '2', 'K'}};
-#define UCODE_4K_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', '4', 'K'}};
-#define UCODE_VS_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', 'V', 'S'}};
-
-/* Offsets in UCODE PATCH Header */
-/* Note: Header is 64 bytes      */
-#define DATE_CODE_OFFSET                0   // 4 bytes
-#define PATCH_ID                        4   // 4 bytes
-#define MICROCODE_PATH_DATA_ID          8   // 2 bytes
-#define MICROCODE_PATCH_DATA_LENGTH     10  // 1 byte
-#define MICROCODE_PATCH_DATA_CHECKSUM   12  // 4 bytes
-#define CHIPSET_1_DEVICE_ID             16  // 4 bytes
-#define CHIPSET_2_DEVICE_ID             20  // 4 bytes
-#define PROCESSOR_REV_ID                24  // 2 bytes
-#define CHIPSET_1_REV_ID                26  // 1 byte
-#define CHIPSET_2_REV_ID                27  // 1 byte
-
-/*---------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *---------------------------------------------------------------------------------------
- */
-//----------------------------------------------------------------------------
-//                         CPU BRAND ID TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// A structure representing BrandId[15:0] from
-/// CPUID Fn8000_0001_EBX
-typedef struct {
-  UINT8           String1:4;   ///< An index to a string value used to create the name string
-  UINT8           String2:4;   ///< An index to a string value used to create the name string
-  UINT8           Page:1;      ///< An index to the appropriate page for the String1, String2, and Model values
-  UINT8           Model:7;     ///< A field used to create the model number in the name string
-  UINT8           Socket:4;    ///< Specifies the package type
-  UINT8           Cores:4;     ///< Identifies how many physical cores are present
-} AMD_CPU_BRAND_DATA;
-
-/// A structure containing string1 and string2 values
-/// as well as information pertaining to their usage
-typedef struct {
-  IN       UINT8  Cores;              ///< Appropriate number of physical cores
-  IN       UINT8  Page;               ///< This string's page number
-  IN       UINT8  Index;              ///< String index
-  IN       UINT8  Socket;             ///< Package type information
-  IN       CONST CHAR8 *Stringstart;  ///< The literal string
-  IN       UINT8  Stringlength;       ///< Number of characters in the string
-} AMD_CPU_BRAND;
-
-/// An entire CPU brand table.
-typedef struct {
-  UINT8 NumberOfEntries;        ///< The number of entries in the table.
-  CONST AMD_CPU_BRAND  *Table;  ///< The table entries.
-} CPU_BRAND_TABLE;
-
-/**
- *  Set down core register
- *
- *  @CpuServiceInstances
- *
- * @param[in]      FamilySpecificServices  The current Family Specific Services.
- * @param[in]      Socket        Socket ID.
- * @param[in]      Module        Module ID in socket.
- * @param[in]      LeveledCores  Number of core.
- * @param[in]      CoreLevelMode Core level mode.
- * @param[in]      StdHeader     Header for library and services.
- *
- * @retval         TRUE          Down Core register is updated.
- * @retval         FALSE         Down Core register is not updated.
- */
-typedef BOOLEAN (F_CPU_SET_DOWN_CORE_REGISTER) (
-  IN       CPU_CORE_LEVELING_FAMILY_SERVICES  *FamilySpecificServices,
-  IN       UINT32 *Socket,
-  IN       UINT32 *Module,
-  IN       UINT32 *LeveledCores,
-  IN       CORE_LEVELING_TYPE CoreLevelMode,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-/// Reference to a method
-typedef F_CPU_SET_DOWN_CORE_REGISTER *PF_CPU_SET_DOWN_CORE_REGISTER;
-
-/**
- * Provide the interface to the Core Leveling Family Specific Services.
- *
- * Use the methods or data in this struct to adapt the feature code to a specific cpu family or model (or stepping!).
- * Each supported Family must provide an implementation for all methods in this interface, even if the
- * implementation is a CommonReturn().
- */
-struct _CPU_CORE_LEVELING_FAMILY_SERVICES {             // See Forward Declaration above
-  UINT16          Revision;                             ///< Interface version
-  // Public Methods.
-  PF_CPU_SET_DOWN_CORE_REGISTER SetDownCoreRegister;    ///< Method: Set down core register.
-};
-
-/*---------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *---------------------------------------------------------------------------------------
- */
-
-//                   These are   P U B L I C   functions, used by IBVs
-AGESA_STATUS
-AmdCpuEarly (
-  IN       AMD_CONFIG_PARAMS      *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig
-  );
-
-//                   These are   P U B L I C   functions, used by AGESA
-AGESA_STATUS
-PmInitializationAtEarly (
-  IN       AMD_CPU_EARLY_PARAMS *CpuEarlyParams,
-  IN       AMD_CONFIG_PARAMS    *StdHeader
-  );
-
-VOID
-AmdCpuEarlyInitializer (
-  IN       AMD_CONFIG_PARAMS      *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig,
-  IN OUT   AMD_CPU_EARLY_PARAMS   *CpuEarlyParamsPtr
-  );
-
-#endif  // _CPU_EARLY_INIT_H_
-

pi/amd/00660F01/Proc/CPU/cpuLateInit.h

diff --git a/pi/amd/00660F01/Proc/CPU/cpuLateInit.h b/pi/amd/00660F01/Proc/CPU/cpuLateInit.h
deleted file mode 100644
index 7cef71d..0000000
--- a/pi/amd/00660F01/Proc/CPU/cpuLateInit.h
+++ /dev/null
@@ -1,1045 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Late Init API functions Prototypes.
- *
- * Contains code for doing any late CPU initialization
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _CPU_LATE_INIT_H_
-#define _CPU_LATE_INIT_H_
-
-#include "Filecode.h"
-
-//  Forward declaration needed for multi-structure mutual references.
-AGESA_FORWARD_DECLARATION (PROC_FAMILY_TABLE);
-/*----------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-//----------------------------------------------------------------------------
-//                         DMI DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-#define AP_LATE_TASK_GET_TYPE4_TYPE7 (PROC_CPU_FEATURE_CPUDMI_FILECODE)
-// SMBIOS constant definition
-#define CENTRAL_PROCESSOR       0x03
-#define EXTERNAL_CLOCK_DFLT     200
-#define EXTERNAL_CLOCK_100MHZ   100
-#define P_FAMILY_UNKNOWN        0x02
-#define P_ENGINEERING_SAMPLE    0x00
-#define P_CHARACTERISTICS       0x4
-#define CACHE_CFG_L1            0x180
-#define CACHE_CFG_L2            0x181
-#define CACHE_CFG_L3            0x182
-#define SRAM_TYPE               0x10
-#define ERR_CORRECT_TYPE        0x06
-#define CACHE_TYPE              0x05
-#define DMI_ASSOCIATIVE_OTHER   0x01
-#define DMI_ASSOCIATIVE_UNKNOWN 0x02
-#define DMI_ASSOCIATIVE_DIRECT_MAPPED   0x03
-#define DMI_ASSOCIATIVE_2_WAY   0x04
-#define DMI_ASSOCIATIVE_4_WAY   0x05
-#define DMI_ASSOCIATIVE_FULLY   0x06
-#define DMI_ASSOCIATIVE_8_WAY   0x07
-#define DMI_ASSOCIATIVE_16_WAY  0x08
-#define DMI_ASSOCIATIVE_12_WAY  0x09
-#define DMI_ASSOCIATIVE_24_WAY  0x0A
-#define DMI_ASSOCIATIVE_32_WAY  0x0B
-#define DMI_ASSOCIATIVE_48_WAY  0x0C
-#define DMI_ASSOCIATIVE_64_WAY  0x0D
-#define DMI_ASSOCIATIVE_20_WAY  0x0E
-#define SOCKET_POPULATED        0x40
-#define CPU_STATUS_UNKNOWN      0x00
-#define CPU_STATUS_ENABLED      0x01
-
-// Processor Upgrade Definition
-#define P_UPGRADE_UNKNOWN       0x02
-#define P_UPGRADE_NONE          0x06
-
-//----------------------------------------------------------------------------
-//                         CDIT DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-#define AMD_ACPI_CDIT_NUM_DOMAINS_LENGTH   4 // Num domains is a 4-bytes unsigned integer
-
-
-//----------------------------------------------------------------------------
-//                         P-STATE DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-//-------------------------------------
-//          ERROR Codes
-//-------------------------------------
-#define     NO_ERROR                    0x0
-#define     USER_DISABLE_ERROR          0x01            // User disabled SSDT generation
-#define     CORES_MISSMATCH_PSS_ERROR   0x02            // No PSS match
-#define     PNOW_SUPPORT_ERROR          0x04            // One of the Cores do not support PNOW!
-#define     PWR_FREQ_MATCH_ERROR        0x08            // FREQ and PWR mismatch
-#define     NO_PSS_SIZE_ERROR           0x10            // Error in PSS Size
-#define     INVALID_PSTATE_ERROR        0x20            // Invalid Max or only 1 P-State available
-#define     NO_PSS_ENTRY                0x0FFFFul
-#define     INVALID_FREQ                0x0FFFFFFFFul
-
-//-------------------------
-// Default definitions
-// AMD BKDG default values
-//-------------------------
-#define DEFAULT_ISOCH_RELIEF_TIME       IRT_80uS
-#define DEFAULT_RAMP_VOLTAGE_OFFSET     RVO_50mV
-#define DEFAULT_MAX_VOLTAGE_STEP        MVS_25mV
-#define DEFAULT_PERF_PRESENT_CAP        0           // default for Desktop
-#define DEFAULT_VOLTAGE_STABLE_TIME     (100 / 20)  // 100uS
-#define DEFAULT_PLL_LOCK_TIME           2           // 2uS
-#define DEFAULT_TRANSITION_LATENCY      100         // 100uS
-#define DEFAULT_BUS_MASTER_LATENCY      9           // 9uS
-#define DEFAULT_CPU_SCOPE_NUMBER        "0UPC"
-
-// Defines for Common ACPI
-// -----------------------------
-#define     SCOPE_OPCODE            0x10
-#define     NAME_OPCODE             0x08
-#define     METHOD_OPCODE           0x14
-#define     PACKAGE_OPCODE          0x12
-#define     BUFFER_OPCODE           0x11
-#define     BYTE_PREFIX_OPCODE      0x0A
-#define     WORD_PREFIX_OPCODE      0x0B
-#define     DWORD_PREFIX_OPCODE     0x0C
-#define     RETURN_OPCODE           0xA4
-#define     ACPI_BUFFER             0x080A0B11ul
-
-// Generic Register Descriptor (GDR) Fields
-#define     GDR_ASI_SYSTEM_IO       0x01    // Address Space ID
-#define     GDR_ASZ_BYTE_ACCESS     0x01    // Address Size
-
-// Defines for ACPI Scope Table
-// ----------------------------
-#define     SCOPE_LENGTH    (SCOPE_STRUCT_SIZE + \
-                            PCT_STRUCT_SIZE + \
-                            PSS_HEADER_STRUCT_SIZE + \
-                            PSS_BODY_STRUCT_SIZE + \
-                            PPC_HEADER_BODY_STRUCT_SIZE)
-#define     SCOPE_VALUE1    0x5C
-#define     SCOPE_VALUE2    0x2E
-#define     SCOPE_NAME__    '_'
-#define     SCOPE_NAME_P    'P'
-#define     SCOPE_NAME_R    'R'
-#define     SCOPE_NAME_S    'S'
-#define     SCOPE_NAME_B    'B'
-#define     SCOPE_NAME_C    'C'
-#define     SCOPE_NAME_U    'U'
-#define     SCOPE_NAME_0    '0'
-#define     SCOPE_NAME_1    '1'
-#define     SCOPE_NAME_2    '2'
-#define     SCOPE_NAME_3    '3'
-#define     SCOPE_NAME_A    'A'
-
-#ifdef OEM_SCOPE_NAME
-  #if (OEM_SCOPE_NAME > 'Z') || (OEM_SCOPE_NAME < 'A')
-    #error "OEM_SCOPE_NAME: it should be only one char long AND a valid letter (A~Z)"
-  #endif
-  #define     SCOPE_NAME_VALUE    OEM_SCOPE_NAME
-#else
-  #define     SCOPE_NAME_VALUE    SCOPE_NAME_C
-#endif  // OEM_SCOPE_NAME
-
-#ifdef OEM_SCOPE_NAME1
-  #if (!(((OEM_SCOPE_NAME1 >= 'A') && (OEM_SCOPE_NAME1 <= 'Z')) || \
-         ((OEM_SCOPE_NAME1 >= '0') && (OEM_SCOPE_NAME1 <= '9')) || \
-         (OEM_SCOPE_NAME1 == '_')))
-    #error "OEM_SCOPE_NAME1: it should be only one char long AND a valid letter (0~9, A~F)"
-  #endif
-  #define     SCOPE_NAME_VALUE1   OEM_SCOPE_NAME1
-#else
-  #define     SCOPE_NAME_VALUE1   SCOPE_NAME_0
-#endif  // OEM_SCOPE_NAME
-
-// Defines for PCT Control and Status Table
-// ----------------------------------------
-#define     PCT_NAME__                  '_'
-#define     PCT_NAME_P                  'P'
-#define     PCT_NAME_C                  'C'
-#define     PCT_NAME_T                  'T'
-#define     PCT_VALUE1                  0x11022C12ul
-#define     PCT_VALUE2                  0x0A14
-#define     PCT_VALUE3                  0x11
-#define     GENERIC_REG_DESCRIPTION     0x82
-#define     PCT_LENGTH                  0x0C
-#define     PCT_ADDRESS_SPACE_ID        0x7F
-#define     PCT_REGISTER_BIT_WIDTH      0x40
-#define     PCT_REGISTER_BIT_OFFSET     0x00
-#define     PCT_RESERVED                0x00
-#define     PCT_CONTROL_REG_LO          0xC0010062ul
-#define     PCT_CONTROL_REG_HI          0x00
-#define     PCT_VALUE4                  0x14110079ul
-#define     PCT_VALUE5                  0x110A
-#define     PCT_STATUS_REG_LO           0x00
-#define     PCT_STATUS_REG_HI           0x00
-#define     PCT_VALUE6                  0x0079
-
-
-// Defines for PSS Header Table
-// ----------------------------
-#define     PSS_NAME__          '_'
-#define     PSS_NAME_X          'X'
-#define     PSS_NAME_P          'P'
-#define     PSS_NAME_S          'S'
-#define     PSS_LENGTH          (sizeof pssBodyStruct + 3)
-#define     NUM_OF_ITEMS_IN_PSS 0x00
-
-
-// Defines for PSS Header Table
-// ----------------------------
-#define     PSS_PKG_LENGTH              0x20  // PSS_BODY_STRUCT_SIZE - 1
-#define     PSS_NUM_OF_ELEMENTS         0x06
-#define     PSS_FREQUENCY               0x00
-#define     PSS_POWER                   0x00
-#define     PSS_TRANSITION_LATENCY      DEFAULT_TRANSITION_LATENCY
-#define     PSS_BUS_MASTER_LATENCY      DEFAULT_BUS_MASTER_LATENCY
-#define     PSS_CONTROL                 ((DEFAULT_ISOCH_RELIEF_TIME << 30) + \
-                                         (DEFAULT_RAMP_VOLTAGE_OFFSET << 28) + \
-                                         (DEFAULT_EXT_TYPE << 27) + \
-                                         (DEFAULT_PLL_LOCK_TIME << 20) + \
-                                         (DEFAULT_MAX_VOLTAGE_STEP << 18) + \
-                                         (DEFAULT_VOLTAGE_STABLE_TIME << 11) + \
-                                         (PSS_VID << 6) + PSS_FID)
-#define     PSS_STATUS                  (DEFAULT_EXTENDED_TYPE << 11) + (PSS_VID << 6) + (PSS_FID)
-
-// Defines for XPSS Header Table
-// ----------------------------
-#define     XPSS_PKG_LENGTH             0x47  // XPSS_BODY_STRUCT_SIZE - 1
-#define     XPSS_NUM_OF_ELEMENTS        0x08
-#define     XPSS_ACPI_BUFFER            0x080A0B11ul
-
-
-// Defines for PPC Header Table
-// ----------------------------
-#define     PPC_NAME__  '_'
-#define     PPC_NAME_P  'P'
-#define     PPC_NAME_C  'C'
-#define     PPC_NAME_V  'V'
-#define     PPC_METHOD_FLAGS  0x00;
-#define     PPC_VALUE1  0x0A;
-
-// Defines for PSD Header Table
-// ----------------------------
-#define     PSD_NAME__          '_'
-#define     PSD_NAME_P          'P'
-#define     PSD_NAME_S          'S'
-#define     PSD_NAME_D          'D'
-#define     PSD_HEADER_LENGTH   (PSD_BODY_STRUCT_SIZE + 2)
-#define     PSD_VALUE1          0x01
-
-
-// Defines for PSD Header Table
-// ----------------------------
-#define     PSD_PKG_LENGTH                   (PSD_BODY_STRUCT_SIZE - 1)
-#define     NUM_OF_ENTRIES                   0x05
-#define     PSD_NUM_OF_ENTRIES               0x05
-#define     PSD_REVISION                     0x00
-#define     PSD_DEPENDENCY_DOMAIN            0x00
-#define     PSD_COORDINATION_TYPE_HW_ALL     0xFE
-#define     PSD_COORDINATION_TYPE_SW_ANY     0xFD
-#define     PSD_COORDINATION_TYPE_SW_ALL     0xFC
-#define     PSD_NUM_OF_PROCESSORS            0x01
-#define     PSD_TWO_CORES_PER_COMPUTE_UNIT   0x02
-#define     PSD_THREE_CORES_PER_COMPUTE_UNIT 0x03
-#define     PSD_FOUR_CORES_PER_COMPUTE_UNIT  0x04
-
-
-#define     CUSTOM_PSTATE_FLAG      0x55
-#define     PSTATE_FLAG_1           0x55
-#define     TARGET_PSTATE_FLAG      0xAA
-#define     PSTATE_FLAG_2           0xAA
-
-/*----------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *----------------------------------------------------------------------------------------
- */
-//----------------------------------------------------------------------------
-//                         ACPI P-States AML TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-
-//--------------------------------------------
-//              AML code definition
-//                   (Scope)
-//---------------------------------------------
-/// SCOPE
-typedef struct _SCOPE {
-  UINT8   ScopeOpcode;                  ///< Opcode
-  UINT16  ScopeLength;                  ///< Scope Length
-  UINT8   ScopeValue1;                  ///< Value1
-  UINT8   ScopeValue2;                  ///< Value2
-  UINT8   ScopeNamePt1a__;              ///< Name Pointer
-  UINT8   ScopeNamePt1a_P;              ///< Name Pointer
-  UINT8   ScopeNamePt1a_R;              ///< Name Pointer
-  UINT8   ScopeNamePt1b__;              ///< Name Pointer
-  UINT8   ScopeNamePt2a_C;              ///< Name Pointer
-  UINT8   ScopeNamePt2a_P;              ///< Name Pointer
-  UINT8   ScopeNamePt2a_U;              ///< Name Pointer
-  UINT8   ScopeNamePt2a_0;              ///< Name Pointer
-} SCOPE;
-#define     SCOPE_STRUCT_SIZE   13      // 13 Bytes
-
-//--------------------------------------------
-//              AML code definition
-//             (PCT Header and Body)
-//---------------------------------------------
-
-///Performance Control Header
-typedef struct _PCT_HEADER_BODY {
-  UINT8   NameOpcode;                   ///< Opcode
-  UINT8   PctName_a__;                  ///< String "_"
-  UINT8   PctName_a_P;                  ///< String "P"
-  UINT8   PctName_a_C;                  ///< String "C"
-  UINT8   PctName_a_T;                  ///< String "T"
-  UINT32  Value1;                       ///< Value1
-  UINT16  Value2;                       ///< Value2
-  UINT8   Value3;                       ///< Value3
-  UINT8   GenericRegDescription1;       ///< Generic Reg Description
-  UINT16  Length1;                      ///< Length1
-  UINT8   AddressSpaceId1;              ///< PCT Address Space ID
-  UINT8   RegisterBitWidth1;            ///< PCT Register Bit Width
-  UINT8   RegisterBitOffset1;           ///< PCT Register Bit Offset
-  UINT8   Reserved1;                    ///< Reserved
-  UINT32  ControlRegAddressLo;          ///< Control Register Address Low
-  UINT32  ControlRegAddressHi;          ///< Control Register Address High
-  UINT32  Value4;                       ///< Value4
-  UINT16  Value5;                       ///< Value 5
-  UINT8   GenericRegDescription2;       ///< Generic Reg Description
-  UINT16  Length2;                      ///< Length2
-  UINT8   AddressSpaceId2;              ///< PCT Address Space ID
-  UINT8   RegisterBitWidth2;            ///< PCT Register Bit Width
-  UINT8   RegisterBitOffset2;           ///< PCT Register Bit Offset
-  UINT8   Reserved2;                    ///< Reserved
-  UINT32  StatusRegAddressLo;           ///< Control Register Address Low
-  UINT32  StatusRegAddressHi;           ///< Control Register Address High
-  UINT16  Value6;                       ///< Values
-} PCT_HEADER_BODY;
-#define     PCT_STRUCT_SIZE     50      // 50 Bytes
-
-
-//--------------------------------------------
-//              AML code definition
-//                 (PSS Header)
-//--------------------------------------------
-///Performance Supported States Header
-typedef struct  _PSS_HEADER {
-  UINT8   NameOpcode;                   ///< Opcode
-  UINT8   PssName_a__;                  ///< String "_"
-  UINT8   PssName_a_P;                  ///< String "P"
-  UINT8   PssName_a_S;                  ///< String "S"
-  UINT8   PssName_b_S;                  ///< String "S"
-  UINT8   PkgOpcode;                    ///< Package Opcode
-  UINT16  PssLength;                    ///< PSS Length
-  UINT8   NumOfItemsInPss;              ///< Number of Items in PSS
-} PSS_HEADER;
-#define     PSS_HEADER_STRUCT_SIZE  9   // 9 Bytes
-
-
-//--------------------------------------------
-//              AML code definition
-//                 (PSS Body)
-//--------------------------------------------
-///Performance Supported States Body
-typedef struct _PSS_BODY {
-  UINT8   PkgOpcode;                    ///< Package Opcode
-  UINT8   PkgLength;                    ///< Package Length
-  UINT8   NumOfElements;                ///< Number of Elements
-  UINT8   DwordPrefixOpcode1;           ///< Prefix Opcode1
-  UINT32  Frequency;                    ///< Frequency
-  UINT8   DwordPrefixOpcode2;           ///< Prefix Opcode2
-  UINT32  Power;                        ///< Power
-  UINT8   DwordPrefixOpcode3;           ///< Prefix Opcode3
-  UINT32  TransitionLatency;            ///< Transition Latency
-  UINT8   DwordPrefixOpcode4;           ///< Prefix Opcode4
-  UINT32  BusMasterLatency;             ///< Bus Master Latency
-  UINT8   DwordPrefixOpcode5;           ///< Prefix Opcode5
-  UINT32  Control;                      ///< Control
-  UINT8   DwordPrefixOpcode6;           ///< Prefix Opcode6
-  UINT32  Status;                       ///< Status
-} PSS_BODY;
-#define     PSS_BODY_STRUCT_SIZE    33  // 33 Bytes
-
-
-/*--------------------------------------------
- *              AML code definition
- *                 (XPSS Header)
- *--------------------------------------------
- */
-/// Extended PSS Header
-typedef struct  _XPSS_HEADER {
-  UINT8   NameOpcode;                   ///< 08h
-  UINT8   XpssName_a_X;                 ///< String "X"
-  UINT8   XpssName_a_P;                 ///< String "P"
-  UINT8   XpssName_a_S;                 ///< String "S"
-  UINT8   XpssName_b_S;                 ///< String "S"
-  UINT8   PkgOpcode;                    ///< 12h
-  UINT16  XpssLength;                   ///< XPSS Length
-  UINT8   NumOfItemsInXpss;             ///< Number of Items in XPSS
-} XPSS_HEADER;
-#define     XPSS_HEADER_STRUCT_SIZE  9  // 9 Bytes
-
-/*--------------------------------------------
- *              AML code definition
- *                 (XPSS Body)
- *--------------------------------------------
- */
-/// Extended PSS Body
-typedef struct  _XPSS_BODY {
-  UINT8   PkgOpcode;                    ///< 12h
-  UINT8   PkgLength;                    ///< Package Length
-  UINT8   XpssValueTbd;                 ///< XPSS Value
-  UINT8   NumOfElements;                ///< Number of Elements
-  UINT8   DwordPrefixOpcode1;           ///< Prefix Opcode1
-  UINT32  Frequency;                    ///< Frequency
-  UINT8   DwordPrefixOpcode2;           ///< Prefix Opcode2
-  UINT32  Power;                        ///< Power
-  UINT8   DwordPrefixOpcode3;           ///< Prefix Opcode3
-  UINT32  TransitionLatency;            ///< Transition Latency
-  UINT8   DwordPrefixOpcode4;           ///< Prefix Opcode4
-  UINT32  BusMasterLatency;             ///< Bus Master Latency
-  UINT32  ControlBuffer;                ///< Control Buffer
-  UINT32  ControlLo;                    ///< Control Low
-  UINT32  ControlHi;                    ///< Control High
-  UINT32  StatusBuffer;                 ///< Status Buffer
-  UINT32  StatusLo;                     ///< Status Low
-  UINT32  StatusHi;                     ///< Status High
-  UINT32  ControlMaskBuffer;            ///< Control Mask Buffer
-  UINT32  ControlMaskLo;                ///< Control Mask Low
-  UINT32  ControlMaskHi;                ///< Control Mask High
-  UINT32  StatusMaskBuffer;             ///< Status Mask Buffer
-  UINT32  StatusMaskLo;                 ///< Status Mask Low
-  UINT32  StatusMaskHi;                 ///< Status Mask High
-} XPSS_BODY;
-#define     XPSS_BODY_STRUCT_SIZE    72 // 72 Bytes
-
-/*--------------------------------------------
- *              AML code definition
- *             (PPC Header and Body)
- *--------------------------------------------
- */
-/// Performance Present Capabilities Header
-typedef struct _PPC_HEADER_BODY {
-  UINT8   NameOpcode;                   ///< Name Opcode
-  UINT8   PpcName_a_P;                  ///< String "P"
-  UINT8   PpcName_b_P;                  ///< String "P"
-  UINT8   PpcName_a_C;                  ///< String "C"
-  UINT8   PpcName_a_V;                  ///< String "V"
-  UINT8   Value1;                       ///< Value
-  UINT8   DefaultPerfPresentCap;        ///< Default Perf Present Cap
-  UINT8   MethodOpcode;                 ///< Method Opcode
-  UINT8   PpcLength;                    ///< Method Length
-  UINT8   PpcName_a__;                  ///< String "_"
-  UINT8   PpcName_c_P;                  ///< String "P"
-  UINT8   PpcName_d_P;                  ///< String "P"
-  UINT8   PpcName_b_C;                  ///< String "C"
-  UINT8   MethodFlags;                  ///< Method Flags
-  UINT8   ReturnOpcode;                 ///< Return Opcoce
-  UINT8   PpcName_e_P;                  ///< String "P"
-  UINT8   PpcName_f_P;                  ///< String "P"
-  UINT8   PpcName_c_C;                  ///< String "C"
-  UINT8   PpcName_b_V;                  ///< String "V"
-
-} PPC_HEADER_BODY;
-#define     PPC_HEADER_BODY_STRUCT_SIZE     19 // 19 Bytes
-#define     PPC_METHOD_LENGTH               11 // 11 Bytes
-
-
-/*--------------------------------------------
- *              AML code definition
- *                (PSD Header)
- *--------------------------------------------
- */
-/// P-State Dependency Header
-typedef struct  _PSD_HEADER {
-  UINT8   NameOpcode;                   ///< Name Opcode
-  UINT8   PsdName_a__;                  ///< String "_"
-  UINT8   PsdName_a_P;                  ///< String "P"
-  UINT8   PsdName_a_S;                  ///< String "S"
-  UINT8   PsdName_a_D;                  ///< String "D"
-  UINT8   PkgOpcode;                    ///< Package Opcode
-  UINT8   PsdLength;                    ///< PSD Length
-  UINT8   Value1;                       ///< Value
-} PSD_HEADER;
-#define     PSD_HEADER_STRUCT_SIZE  8   // 8 Bytes
-
-/*--------------------------------------------
- *              AML code definition
- *                 (PSD Body)
- *--------------------------------------------
- */
-/// P-State Dependency Body
-typedef struct _PSD_BODY {
-  UINT8   PkgOpcode;                    ///< Package Opcode
-  UINT8   PkgLength;                    ///< Package Length
-  UINT8   NumOfEntries;                 ///< Number of Entries
-  UINT8   BytePrefixOpcode1;            ///< Prefix Opcode1 in Byte
-  UINT8   PsdNumOfEntries;              ///< PSD Number of Entries
-  UINT8   BytePrefixOpcode2;            ///< Prefix Opcode2 in Byte
-  UINT8   PsdRevision;                  ///< PSD Revision
-  UINT8   DwordPrefixOpcode1;           ///< Prefix Opcode1 in DWord
-  UINT32  DependencyDomain;             ///< Dependency Domain
-  UINT8   DwordPrefixOpcode2;           ///< Prefix Opcode2 in DWord
-  UINT32  CoordinationType;             ///< (0xFC = SW_ALL, 0xFD = SW_ANY, 0xFE = HW_ALL)
-  UINT8   DwordPrefixOpcode3;           ///< Prefix Opcode3 in DWord
-  UINT32  NumOfProcessors;              ///< Number of Processors
-} PSD_BODY;
-#define     PSD_BODY_STRUCT_SIZE    22  // 22 Bytes
-
-//----------------------------------------------------------------------------
-//                         WHEA TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-
-/// HEST MCE TABLE
-typedef struct _AMD_HEST_MCE_TABLE {
-  UINT16 TblLength;               ///< Length, in bytes, of entire AMD_HEST_MCE structure.
-  UINT32 GlobCapInitDataLSD;      ///< Holds the value that the OS will program into
-  UINT32 GlobCapInitDataMSD;      ///< the machine check global capability register(MCG_CAP).
-  UINT32 GlobCtrlInitDataLSD;     ///< Holds the value that the OS will program into
-  UINT32 GlobCtrlInitDataMSD;     ///< the machine check global control register(MCG_CTL).
-  UINT8 NumHWBanks;               ///< The number of hardware error reporting banks.
-  UINT8 Rsvd[7];                  ///< reserve 7 bytes as spec's required
-} AMD_HEST_MCE_TABLE;
-
-/// HEST CMC TABLE
-typedef struct _AMD_HEST_CMC_TABLE {
-  UINT16 TblLength;               ///< Length, in bytes, of entire AMD_HEST_CMC structure.
-  UINT8 NumHWBanks;               ///< The number of hardware error reporting banks.
-  UINT8 Rsvd[3];                  ///< reserve 3 bytes as spec's required
-} AMD_HEST_CMC_TABLE;
-
-/// HEST BANK
-typedef struct _AMD_HEST_BANK {
-  UINT8 BankNum;                  ///< Zero-based index identifies the machine check error bank.
-  UINT8 ClrStatusOnInit;          ///< Indicates if the status information in this machine check bank
-                                  ///< is to be cleared during system initialization.
-  UINT8 StatusDataFormat;         ///< Indicates the format of the data in the status register
-  UINT8 ConfWriteEn;              ///< This field indicates whether configuration parameters may be
-                                  ///< modified by the OS. If the bit for the associated parameter is
-                                  ///< set, the parameter is writable by the OS.
-  UINT32 CtrlRegMSRAddr;          ///< Address of the hardware bank's control MSR. Ignored if zero.
-
-  UINT32 CtrlInitDataLSD;         ///< This is the value the OS will program into the machine check
-  UINT32 CtrlInitDataMSD;         ///< bank's control register
-  UINT32 StatRegMSRAddr;          ///< Address of the hardware bank's MCi_STAT MSR. Ignored if zero.
-  UINT32 AddrRegMSRAddr;          ///< Address of the hardware bank's MCi_ADDR MSR. Ignored if zero.
-  UINT32 MiscRegMSRAddr;          ///< Address of the hardware bank's MCi_MISC MSR. Ignored if zero.
-} AMD_HEST_BANK;
-
-/// Initial data of AMD_HEST_BANK
-typedef struct _AMD_HEST_BANK_INIT_DATA {
-  UINT32 CtrlInitDataLSD;         ///< Initial data of CtrlInitDataLSD
-  UINT32 CtrlInitDataMSD;         ///< Initial data of CtrlInitDataMSD
-  UINT32 CtrlRegMSRAddr;          ///< Initial data of CtrlRegMSRAddr
-  UINT32 StatRegMSRAddr;          ///< Initial data of StatRegMSRAddr
-  UINT32 AddrRegMSRAddr;          ///< Initial data of AddrRegMSRAddr
-  UINT32 MiscRegMSRAddr;          ///< Initial data of MiscRegMSRAddr
-} AMD_HEST_BANK_INIT_DATA;
-
-/// MSR179 Global Machine Check Capabilities data struct
-typedef struct _MSR_MCG_CAP_STRUCT {
-  UINT64 Count:8;                 ///< Indicates the number of
-                                  ///< error-reporting banks visible to each core
-  UINT64 McgCtlP:1;               ///< 1=The machine check control registers
-  UINT64 Rsvd:55;                 ///< reserved
-} MSR_MCG_CAP_STRUCT;
-
-/// Initial data of WHEA
-typedef struct _AMD_WHEA_INIT_DATA {
-  UINT32 GlobCapInitDataLSD;      ///< Holds the value that the OS will program into the machine
-  UINT32 GlobCapInitDataMSD;      ///< Check global capability register
-  UINT32 GlobCtrlInitDataLSD;     ///< Holds the value that the OS will grogram into the machine
-  UINT32 GlobCtrlInitDataMSD;     ///< Check global control register
-  UINT8  ClrStatusOnInit;         ///< Indicates if the status information in this machine check
-                                  ///< bank is to be cleared during system initialization
-  UINT8  StatusDataFormat;        ///< Indicates the format of the data in the status register
-  UINT8  ConfWriteEn;             ///< This field indicates whether configuration parameters may be
-                                  ///< modified by the OS. If the bit for the associated parameter is
-                                  ///< set, the parameter is writable by the OS.
-  UINT8  HestBankNum;             ///< Number of HEST Bank
-  AMD_HEST_BANK_INIT_DATA *HestBankInitData;  ///< Pointer to Initial data of HEST Bank
-} AMD_WHEA_INIT_DATA;
-
-//----------------------------------------------------------------------------
-//                         DMI TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// DMI brand information
-typedef struct {
-  UINT16 String1:4;                 ///< String1
-  UINT16 String2:4;                 ///< String2
-  UINT16 Model:7;                   ///< Model
-  UINT16 Pg:1;                      ///< Page
-} BRAND_ID;
-
-/// DMI cache information
-typedef struct {
-  UINT32 L1CacheSize;               ///< L1 cache size
-  UINT8  L1CacheAssoc;              ///< L1 cache associativity
-  UINT32 L2CacheSize;               ///< L2 cache size
-  UINT8  L2CacheAssoc;              ///< L2 cache associativity
-  UINT32 L3CacheSize;               ///< L3 cache size
-  UINT8  L3CacheAssoc;              ///< L3 cache associativity
-} CPU_CACHE_INFO;
-
-/// DMI processor information
-typedef struct {
-  UINT8  ExtendedFamily;            ///< Extended Family
-  UINT8  ExtendedModel;             ///< Extended Model
-  UINT8  BaseFamily;                ///< Base Family
-  UINT8  BaseModel;                 ///< Base Model
-  UINT8  Stepping;                  ///< Stepping
-  UINT8  PackageType;               ///< PackageType
-  BRAND_ID BrandId;                 ///< BrandId which contains information about String1, String2, Model and Page
-  UINT8  TotalCoreNumber;           ///< Number of total cores
-  UINT8  EnabledCoreNumber;         ///< Number of enabled cores
-  UINT8  ProcUpgrade;               ///< ProcUpdrade
-  CPU_CACHE_INFO CacheInfo;         ///< CPU cache info
-} CPU_TYPE_INFO;
-
-/// A structure containing processor name string and
-/// the value that should be provide to DMI type 4 processor family
-typedef struct {
-  IN       CONST CHAR8 *Stringstart;  ///< The literal string
-  IN       UINT8  T4ProcFamilySetting; ///< The value set to DMI type 4 processor family
-} CPU_T4_PROC_FAMILY;
-
-/// DMI ECC information
-typedef struct {
-  BOOLEAN EccCapable;               ///< ECC Capable
-} CPU_GET_MEM_INFO;
-
-/*  Transfer vectors for DMI family specific routines   */
-typedef VOID  OPTION_DMI_GET_CPU_INFO (
-  IN OUT   CPU_TYPE_INFO *CpuInfoPtr,
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef VOID  OPTION_DMI_GET_PROC_FAMILY (
-  IN OUT   UINT8 *T4ProcFamily,
-  IN       PROC_FAMILY_TABLE *CpuDmiProcFamilyTable,
-  IN       CPU_TYPE_INFO *CpuInfo,
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef UINT8 OPTION_DMI_GET_VOLTAGE (
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef UINT16  OPTION_DMI_GET_MAX_SPEED (
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef UINT16  OPTION_DMI_GET_EXT_CLOCK (
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef VOID  OPTION_DMI_GET_MEM_INFO (
-  IN OUT   CPU_GET_MEM_INFO  *CpuGetMemInfoPtr,
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-/// Brand table entry format
-typedef struct {
-  UINT8 PackageType;                ///< Package type
-  UINT8 PgOfBrandId;                ///< Page
-  UINT8 NumberOfCores;              ///< Number of cores
-  UINT8 String1ofBrandId;           ///< String1
-  UINT8 ValueSetToDmiTable;         ///< The value which will should be set to DMI table
-} DMI_BRAND_ENTRY;
-
-/// Family specific data table structure
-struct _PROC_FAMILY_TABLE {
-  UINT64                    ProcessorFamily;  ///< processor
-  OPTION_DMI_GET_CPU_INFO   *DmiGetCpuInfo;   ///< transfer vectors
-  OPTION_DMI_GET_PROC_FAMILY  *DmiGetT4ProcFamily;  ///< Get DMI type 4 processor family information
-  OPTION_DMI_GET_VOLTAGE    *DmiGetVoltage;   ///< vector for reading voltage
-  OPTION_DMI_GET_MAX_SPEED  *DmiGetMaxSpeed;  ///< vector for reading speed
-  OPTION_DMI_GET_EXT_CLOCK  *DmiGetExtClock;  ///< vector for reading external clock speed
-  OPTION_DMI_GET_MEM_INFO   *DmiGetMemInfo;   ///< Get memory information
-  UINT8                     LenBrandList;     ///< size of brand table
-  CONST DMI_BRAND_ENTRY     *DmiBrandList;    ///< translate brand info to DMI identifier
-};
-
-//----------------------------------------------------------------------------
-//                         TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// Format for Header
-typedef struct {
-  UINT8   Sign[4];                      ///< Signature
-  UINT32  TableLength;                  ///< Table Length
-  UINT8   Revision;                     ///< Revision
-  UINT8   Checksum;                     ///< Checksum
-  UINT8   OemId[6];                     ///< OEM ID
-  UINT8   OemTableId[8];                ///< OEM Tabled ID
-  UINT32  OemRev;                       ///< OEM Revision
-  UINT8   CreatorId[4];                 ///< Creator ID
-  UINT32  CreatorRev;                   ///< Creator Revision
-} ACPI_TABLE_HEADER;
-
-//----------------------------------------------------------------------------
-//                         CRAT TYPEDEFS, STRUCTURES, ENUMS
-//                         Component Resource Affinity Table
-//----------------------------------------------------------------------------
-/// Format for CRAT Header
-typedef struct {
-  UINT8   Sign[4];                      ///< CRAT, Signature for the Component Resource Affinity Table.
-  UINT32  Length;                       ///< Length, in bytes, of the entire CRAT
-  UINT8   Revision;                     ///< 0
-  UINT8   Checksum;                     ///< Entire table must sum to zero.
-  UINT8   OemId[6];                     ///< OEM ID
-  UINT8   OemTableId[8];                ///< OEM Tabled ID
-  UINT32  OemRev;                       ///< OEM Revision
-  UINT8   CreatorId[4];                 ///< Creator ID
-  UINT32  CreatorRev;                   ///< Creator Revision
-  UINT32  TotalEntries;                 ///< total number[n] of entries in the CRAT
-  UINT16  NumDomains;                   ///< Number of HSA proximity domains
-  UINT8   Reserved[6];                  ///< Reserved
-} CRAT_HEADER;
-
-/// Flags field of the CRAT HSA Processing Unit Affinity Structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 HotPluggable:1;             ///< Hot Pluggable
-  UINT32 CpuPresent:1;               ///< Cpu Present
-  UINT32 GpuPresent:1;               ///< Gpu Present
-  UINT32 IommuPresent:1;             ///< IOMMU Present
-  UINT32 :27;                        ///< Reserved
-} CRAT_HSA_PROCESSING_UNIT_FLAG;
-
-/// CRAT HSA Processing Unit Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 0 - CRAT HSA Processing Unit Structure
-  UINT8  Length;                     ///< 40
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_HSA_PROCESSING_UNIT_FLAG Flags; ///< Flags - HSA Processing Unit Affinity Structure
-  UINT32 ProximityDomain;            ///< Integer that represents the proximity domain to which the node belongs to
-  UINT32 ProcessorIdLow;             ///< Low value  of the logical processor included in this HSA proximity domain
-  UINT16 NumCPUCores;                ///< Indicates count of CCompute execution units present in this APU node.
-  UINT16 NumSIMDCores;               ///< Indicates maximum count of HCompute SIMD cores present in this node.
-  UINT16 MaxWavesSIMD;               ///< This identifies the max. number of launched waves per SIMD.
-  UINT16 IoCount;                    ///< Number of discoverable IO Interfaces connecting this node to other components.
-  UINT16 HSACapability;              ///< Must be 0
-  UINT16 LDSSizeInKB;                ///< Size of LDS memory per SIMD Wavefront
-  UINT8  WaveFrontSize;              ///< 64, may be 32 for some FSA based architectures
-  UINT8  NumBanks;                   ///< Number of Banks or "Shader Engines", typically 1 or 2
-  UINT16 uEngineIdentifier;          ///< Identifier (Rev) of the GPU uEngine or firmware
-  UINT8  NumArrays;                  ///< Number of SIMD Arrays per Engine
-  UINT8  NumCUPerArray;              ///< Number of Compute Units (CU) per SIMD Array
-  UINT8  NumSIMDPerCU;               ///< Number of SIMD representing a Compute Unit
-  UINT8  MaxSlotsScratchCU;          ///< Max. Number of temp. memory ("scratch") wave slots
-                                     ///< available to access, may be 0 if HW has no restrictions
-  UINT8  Reserved1[4];               ///< Reserved
-} CRAT_HSA_PROCESSING_UNIT;
-
-/// Flags field of the CRAT Memory Affinity Structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 HotPluggable:1;             ///< Hot Pluggable
-  UINT32 NonVolatile:1;              ///< If set, the memory region represents Non-Volatile memory
-  UINT32 :29;                        ///< Reserved
-} CRAT_MEMORY_FLAG;
-
-/// CRAT Memory Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 1 - CRAT Memory Affinity Structure
-  UINT8  Length;                     ///< 40
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_MEMORY_FLAG Flags;            ///< Flags - Memory Affinity Structure. Indicates whether the region of memory is enabled and can be hot plugged
-  UINT32 ProximityDomain;            ///< Integer that represents the proximity domain to which the node belongs to
-  UINT32 BaseAddressLow;             ///< Low 32Bits of the Base Address of the memory range
-  UINT32 BaseAddressHigh;            ///< High 32Bits of the Base Address of the memory range
-  UINT32 LengthLow;                  ///< Low 32Bits of the length of the memory range
-  UINT32 LengthHigh;                 ///< High 32Bits of the length of the memory range
-  UINT32 Width;                      ///< Memory width - Specifies the number of parallel bits of the memory interface
-  UINT8  Reserved1[8];               ///< Reserved
-} CRAT_MEMORY;
-
-/// Flags field of the CRAT Cache Affinity structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 DataCache:1;                ///< 1 if cache includes data
-  UINT32 InstructionCache:1;         ///< 1 if cache includes instructions
-  UINT32 CpuCache:1;                 ///< 1 if cache is part of CPU functionality
-  UINT32 SimdCache:1;                ///< 1 if cache is part of SIMD functionality
-  UINT32 :27;                        ///< Reserved
-} CRAT_CACHE_FLAG;
-
-/// CRAT Cache Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 2 - CRAT Cache Affinity Structure
-  UINT8  Length;                     ///< 64
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_CACHE_FLAG Flags;             ///< Flags - Cache Affinity Structure. Indicates whether the region of cache is enabled
-  UINT32 ProcessorIdLow;             ///< Low value of a logical processor which includes this component
-  UINT8  SiblingMap[32];             ///< Bitmask of  Processor Id sharing this component. 1 bit per logical processor
-  UINT32 CacheSize;                  ///< Cache size in KB
-  UINT8  CacheLevel;                 ///< Integer representing level: 1, 2, 3, 4, etc.
-  UINT8  LinesPerTag;                ///< Cache Lines per tag
-  UINT16 CacheLineSize;              ///< Cache line size in bytes
-  UINT8  Associativity;              ///< Cache associativity
-                                     ///< The associativity fields are encoded as follows:
-                                     ///< 00h: Reserved.
-                                     ///< 01h: Direct mapped.
-                                     ///< 02h-FEh: Associativity. (e.g., 04h = 4-way associative.)
-                                     ///< FFh: Fully associative
-  UINT8  CacheProperties;            ///< Cache Properties bits [2:0] represent Inclusive/Exclusive property encoded.
-                                     ///< 0: Cache is strictly exclusive to lower level caches.
-                                     ///< 1: Cache is mostly exclusive to lower level caches.
-                                     ///< 2: Cache is strictly inclusive to lower level caches.
-                                     ///< 3: Cache is mostly inclusive to lower level caches.
-                                     ///< 4: Cache is a "constant cache" (= explicit update)
-                                     ///< 5: Cache is a "specialty cache" (e.g. Texture cache)
-                                     ///< 6-7: Reserved
-                                     ///< CacheProperties bits [7:3] are reserved
-  UINT16 CacheLatency;               ///< Cost of time to access cache described in nanoseconds.
-  UINT8  Reserved1[8];               ///< Reserved
-} CRAT_CACHE;
-
-/// Flags field of the CRAT TLB Affinity structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 DataTLB:1;                  ///< 1 if TLB includes translation information for data.
-  UINT32 InstructionTLB:1;           ///< 1 if TLB includes translation information for instructions.
-  UINT32 CpuTLB:1;                   ///< 1 if TLB is part of CPU functionality
-  UINT32 SimdTLB:1;                  ///< 1 if TLB is part of SIMD functionality
-  UINT32 TLB4KBase256:1;             ///< 1 if value in table is factored by 256 to get number of 4K entries
-  UINT32 :1;                         ///< Reserved
-  UINT32 TLB2MBase256:1;             ///< 1 if value in table is factored by 256 to get number of 2M entries
-  UINT32 :1;                         ///< Reserved
-  UINT32 TLB1GBase256:1;             ///< 1 if value in table is factored by 256 to get number of 1G entries
-  UINT32 :22;                        ///< Reserved
-} CRAT_TLB_FLAG;
-
-/// CRAT TLB Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 3 - CRAT TLB  Affinity Structure
-  UINT8  Length;                     ///< 64
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_TLB_FLAG Flags;               ///< Flags - TLB Affinity Structure. Indicates whether the TLB is enabled and defined
-  UINT32 ProcessorIdLow;             ///< Low value of a logical processor which includes this component.
-  UINT8  SiblingMap[32];             ///< Bitmask of Processor Id sharing this component. 1 bit per logical processor
-  UINT32 TlbLevel;                   ///< Integer representing level: 1, 2, 3, 4, etc.
-  UINT8  DataTlbAssociativity2MB;    ///< Data TLB associativity for 2MB pages
-                                     ///< The associativity fields are encoded as follows:
-                                     ///< 00h: Reserved.
-                                     ///< 01h: Direct mapped.
-                                     ///< 02h-FEh: Associativity. (e.g., 04h = 4-way associative.)
-                                     ///< FFh: Fully associative.
-  UINT8  DataTlbSize2MB;             ///< Data TLB number of entries for 2MB.
-  UINT8  InstructionTlbAssociativity2MB;      ///< Instruction TLB associativity for 2MB pages
-                                     ///< The associativity fields are encoded as follows:
-                                     ///< 00h: Reserved.
-                                     ///< 01h: Direct mapped.
-                                     ///< 02h-FEh: Associativity. (e.g., 04h = 4-way associative.)
-                                     ///< FFh: Fully associative.
-  UINT8  InstructionTlbSize2MB;      ///< Instruction TLB number of entries for 2MB pages.
-  UINT8  DataTlbAssociativity4K;     ///< Data TLB Associativity for 4KB pages
-  UINT8  DataTlbSize4K;              ///< Data TLB number of entries for 4KB pages
-  UINT8  InstructionTlbAssociativity4K;       ///< Instruction TLB Associativity for 4KB pages
-  UINT8  InstructionTlbSize4K;       ///< Instruction TLB number of entries for 4KB pages
-  UINT8  DataTlbAssociativity1G;     ///< Data TLB Associativity for 1GB pages
-  UINT8  DataTlbSize1G;              ///< Data TLB number of entries for 1GB pages
-  UINT8  InstructionTlbAssociativity1G;       ///< Instruction TLB Associativity for 1GB pages
-  UINT8  InstructionTlbSize1G;       ///< Instruction TLB number of entries for 1GB pages
-  UINT8  Reserved1[4];               ///< Reserved
-} CRAT_TLB;
-
-/// Flags field of the CRAT FPU Affinity structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 :31;                        ///< Reserved
-} CRAT_FPU_FLAG;
-
-/// CRAT FPU Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 4 - CRAT FPU Affinity Structure
-  UINT8  Length;                     ///< 64
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_FPU_FLAG Flags;               ///< Flags - FPU Affinity Structure. Indicates whether the region of FPU affinity structure is enabled and defined
-  UINT32 ProcessorIdLow;             ///< Low value of a logical processor which includes this component.
-  UINT8  SiblingMap[32];             ///< Bitmask of  Processor Id sharing this component. 1 bit per logical processor
-  UINT32 FPUSize;                    ///< Product specific
-  UINT8  Reserved1[16];              ///< Reserved
-} CRAT_FPU;
-
-/// Flags field of the CRAT IO Affinity structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 Coherency:1;                ///< If set, IO interface supports coherent transactions (natively or through protocol extensions)
-  UINT32 :30;                        ///< Reserved
-} CRAT_IO_FLAG;
-
-/// CRAT IO Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 5 - CRAT IO Affinity Structure
-  UINT8  Length;                     ///< 64
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_IO_FLAG Flags;                ///< Flags - IO Affinity Structure. Indicates whether the region of IO affinity structure is enabled and defined.
-  UINT32 ProximityDomainFrom;        ///< Integer that represents the proximity domain to which the IO Interface belongs to
-  UINT32 ProximityDomainTo;          ///< Integer that represents the other proximity domain to which the IO Interface belongs to
-  UINT8  IoType;                     ///< IO Interface type. Values defined are
-                                     ///< 0: Undefined
-                                     ///< 1: Hypertransport
-                                     ///< 2: PCI Express
-                                     ///< 3: Other (e.g. internal)
-                                     ///< 4-255: Reserved
-  UINT8  VersionMajor;               ///< Major version of the Bus interface
-  UINT16 VersionMinor;               ///< Minor version of the Bus interface ((optional)
-  UINT32 MinimumLatency;             ///< Cost of time to transfer, described in nanoseconds.
-  UINT32 MaximumLatency;             ///< Cost of time to transfer, described in nanoseconds.
-  UINT32 MinimumBandwidth;           ///< Minimum interface Bandwidth in MB/s
-  UINT32 MaximumBandwidth;           ///< Maximum interface Bandwidth in MB/s
-  UINT32 RecommendedTransferSize;    ///< Recommended transfer size to reach maximum interface bandwidth in Bytes
-  UINT8  Reserved1[24];              ///< Reserved
-} CRAT_IO;
-
-#define CRAT_MAX_LENGTH    0x800ul   ///< Reserve 2K for CRAT
-#define LOW_NODE_DEVICEID       24
-/// CRAT entry type
-typedef enum {
-  CRAT_TYPE_HSA_PROC_UNIT = 0,       ///< 0 - CRAT HSA Processing Unit Structure
-  CRAT_TYPE_MEMORY,                  ///< 1 - CRAT Memory Affinity Structure
-  CRAT_TYPE_CACHE,                   ///< 2 - CRAT Cache Affinity Structure
-  CRAT_TYPE_TLB,                     ///< 3 - CRAT TLB  Affinity Structure
-  CRAT_TYPE_FPU,                     ///< 4 - CRAT FPU Affinity Structure
-  CRAT_TYPE_IO,                      ///< 5 - CRAT IO Affinity Structure
-} CRAT_ENTRY_TYPE;
-
-/*----------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *----------------------------------------------------------------------------------------
- */
-
-AGESA_STATUS
-AmdCpuLate (
-  IN       AMD_CONFIG_PARAMS   *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig
-  );
-
-AGESA_STATUS
-CreateAcpiWhea (
-  IN OUT   AMD_CONFIG_PARAMS    *StdHeader,
-  IN OUT   VOID                 **WheaMcePtr,
-  IN OUT   VOID                 **WheaCmcPtr
-  );
-
-AGESA_STATUS
-CreateDmiRecords (
-  IN       AMD_CONFIG_PARAMS    *StdHeader,
-  IN OUT   DMI_INFO             **DmiTable
-  );
-
-AGESA_STATUS
-GetType4Type7Info (
-  IN        AMD_CONFIG_PARAMS   *StdHeader,
-  IN        DMI_INFO            *DmiBufferPtr
-  );
-
-VOID
-DmiGetT4ProcFamilyFromBrandId (
-  IN OUT   UINT8 *T4ProcFamily,
-  IN       PROC_FAMILY_TABLE *CpuDmiProcFamilyTable,
-  IN       CPU_TYPE_INFO *CpuInfo,
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-VOID
-GetNameString (
-  IN OUT   CHAR8 *String,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-BOOLEAN
-IsSourceStrContainTargetStr (
-  IN OUT   CHAR8 *SourceStr,
-  IN OUT   CONST CHAR8 *TargetStr,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-CreateAcpiCrat (
-  IN OUT   AMD_CONFIG_PARAMS     *StdHeader,
-     OUT   VOID                  **CratPtr
-  );
-
-AGESA_STATUS
-CreateAcpiCdit (
-  IN OUT   AMD_CONFIG_PARAMS      *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig,
-     OUT   VOID                   **CditPtr
-  );
-
-VOID
-ChecksumAcpiTable (
-  IN OUT   ACPI_TABLE_HEADER *Table,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-RunLateApTaskOnAllAPs (
-  IN       AP_EXE_PARAMS     *ApParams,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-IdleAllAps (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-UINT32
-InterlockedIncrement (
-  IN      UINT32  *Value
-  );
-
-UINT32
-InterlockedDecrement (
-  IN      UINT32  *Value
-  );
-
-#endif // _CPU_LATE_INIT_H_

pi/amd/00660F01/Proc/CPU/cpuRegisters.h

diff --git a/pi/amd/00660F01/Proc/CPU/cpuRegisters.h b/pi/amd/00660F01/Proc/CPU/cpuRegisters.h
deleted file mode 100644
index e51a01f..0000000
--- a/pi/amd/00660F01/Proc/CPU/cpuRegisters.h
+++ /dev/null
@@ -1,502 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Register Table Related Functions
- *
- * Contains the definition of the CPU CPUID MSRs and PCI registers with BKDG recommended values
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 309899 $   @e \$Date: 2014-12-23 02:21:13 -0600 (Tue, 23 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _CPU_REGISTERS_H_
-#define _CPU_REGISTERS_H_
-
-#include "cpuFamRegisters.h"
-/*
- *--------------------------------------------------------------
- *
- *                      M O D U L E S    U S E D
- *
- *---------------------------------------------------------------
- */
-
-/*
- *--------------------------------------------------------------
- *
- *                      D E F I N I T I O N S  /  M A C R O S
- *
- *---------------------------------------------------------------
- */
-
-#undef BIT0
-#undef BIT1
-#undef BIT2
-#undef BIT3
-#undef BIT4
-#undef BIT5
-#undef BIT6
-#undef BIT7
-#undef BIT8
-#undef BIT9
-#undef BIT10
-#undef BIT10
-#undef BIT11
-#undef BIT12
-#undef BIT13
-#undef BIT14
-#undef BIT15
-#undef BIT16
-#undef BIT17
-#undef BIT18
-#undef BIT19
-#undef BIT20
-#undef BIT21
-#undef BIT22
-#undef BIT23
-#undef BIT24
-#undef BIT25
-#undef BIT26
-#undef BIT27
-#undef BIT28
-#undef BIT29
-#undef BIT30
-#undef BIT31
-#undef BIT32
-#undef BIT33
-#undef BIT34
-#undef BIT35
-#undef BIT36
-#undef BIT37
-#undef BIT38
-#undef BIT39
-#undef BIT40
-#undef BIT41
-#undef BIT42
-#undef BIT43
-#undef BIT44
-#undef BIT45
-#undef BIT46
-#undef BIT47
-#undef BIT48
-#undef BIT49
-#undef BIT40
-#undef BIT41
-#undef BIT42
-#undef BIT43
-#undef BIT44
-#undef BIT45
-#undef BIT46
-#undef BIT47
-#undef BIT48
-#undef BIT49
-#undef BIT50
-#undef BIT51
-#undef BIT52
-#undef BIT53
-#undef BIT54
-#undef BIT55
-#undef BIT56
-#undef BIT57
-#undef BIT58
-#undef BIT59
-#undef BIT60
-#undef BIT61
-#undef BIT62
-#undef BIT63
-
-#define BIT0        0x0000000000000001ull
-#define BIT1        0x0000000000000002ull
-#define BIT2        0x0000000000000004ull
-#define BIT3        0x0000000000000008ull
-#define BIT4        0x0000000000000010ull
-#define BIT5        0x0000000000000020ull
-#define BIT6        0x0000000000000040ull
-#define BIT7        0x0000000000000080ull
-#define BIT8        0x0000000000000100ull
-#define BIT9        0x0000000000000200ull
-#define BIT10       0x0000000000000400ull
-#define BIT11       0x0000000000000800ull
-#define BIT12       0x0000000000001000ull
-#define BIT13       0x0000000000002000ull
-#define BIT14       0x0000000000004000ull
-#define BIT15       0x0000000000008000ull
-#define BIT16       0x0000000000010000ull
-#define BIT17       0x0000000000020000ull
-#define BIT18       0x0000000000040000ull
-#define BIT19       0x0000000000080000ull
-#define BIT20       0x0000000000100000ull
-#define BIT21       0x0000000000200000ull
-#define BIT22       0x0000000000400000ull
-#define BIT23       0x0000000000800000ull
-#define BIT24       0x0000000001000000ull
-#define BIT25       0x0000000002000000ull
-#define BIT26       0x0000000004000000ull
-#define BIT27       0x0000000008000000ull
-#define BIT28       0x0000000010000000ull
-#define BIT29       0x0000000020000000ull
-#define BIT30       0x0000000040000000ull
-#define BIT31       0x0000000080000000ull
-#define BIT32       0x0000000100000000ull
-#define BIT33       0x0000000200000000ull
-#define BIT34       0x0000000400000000ull
-#define BIT35       0x0000000800000000ull
-#define BIT36       0x0000001000000000ull
-#define BIT37       0x0000002000000000ull
-#define BIT38       0x0000004000000000ull
-#define BIT39       0x0000008000000000ull
-#define BIT40       0x0000010000000000ull
-#define BIT41       0x0000020000000000ull
-#define BIT42       0x0000040000000000ull
-#define BIT43       0x0000080000000000ull
-#define BIT44       0x0000100000000000ull
-#define BIT45       0x0000200000000000ull
-#define BIT46       0x0000400000000000ull
-#define BIT47       0x0000800000000000ull
-#define BIT48       0x0001000000000000ull
-#define BIT49       0x0002000000000000ull
-#define BIT50       0x0004000000000000ull
-#define BIT51       0x0008000000000000ull
-#define BIT52       0x0010000000000000ull
-#define BIT53       0x0020000000000000ull
-#define BIT54       0x0040000000000000ull
-#define BIT55       0x0080000000000000ull
-#define BIT56       0x0100000000000000ull
-#define BIT57       0x0200000000000000ull
-#define BIT58       0x0400000000000000ull
-#define BIT59       0x0800000000000000ull
-#define BIT60       0x1000000000000000ull
-#define BIT61       0x2000000000000000ull
-#define BIT62       0x4000000000000000ull
-#define BIT63       0x8000000000000000ull
-
-/// CPUID related registers
-#define AMD_CPUID_FMF               0x80000001ul  // Family Model Features information
-#define AMD_CPUID_APICID_LPC_BID    0x00000001ul  // Local APIC ID, Logical Processor Count, Brand ID
-#define AMD_CPUID_L2L3Cache_L2TLB   0x80000006ul
-#define CPUID_ASSOCIATIVITY_DISABLED 0x00
-#define CPUID_ASSOCIATIVITY_1_WAY   0x01
-#define CPUID_ASSOCIATIVITY_2_WAY   0x02
-#define CPUID_ASSOCIATIVITY_4_WAY   0x04
-#define CPUID_ASSOCIATIVITY_8_WAY   0x06
-#define CPUID_ASSOCIATIVITY_16_WAY  0x08
-#define CPUID_ASSOCIATIVITY_32_WAY  0x0A
-#define CPUID_ASSOCIATIVITY_48_WAY  0x0B
-#define CPUID_ASSOCIATIVITY_64_WAY  0x0C
-#define CPUID_ASSOCIATIVITY_96_WAY  0x0D
-#define CPUID_ASSOCIATIVITY_128_WAY 0x0E
-#define CPUID_ASSOCIATIVITY_FULLY   0x0F
-#define AMD_CPUID_TLB_L1Cache       0x80000005ul
-#define AMD_CPUID_L1L2Tlb1GIdentifiers 0x80000019ul
-#define AMD_CPUID_APM               0x80000007ul
-#define LOCAL_APIC_ID               24
-#define LOGICAL_PROCESSOR_COUNT     16
-#define AMD_CPUID_ASIZE_PCCOUNT     0x80000008ul  // Address Size, Physical Core Count
-
-/// CPU Logical ID Transfer
-typedef struct {
-  UINT32         RawId;                         ///< RawID
-  UINT16         LogicalId;                     ///< LogicalID
-} CPU_LOGICAL_ID_XLAT;
-
-/// Logical CPU ID Table
-typedef struct {
-  IN       UINT32  Elements;                    ///< Number of Elements
-  IN       CPU_LOGICAL_ID_XLAT *LogicalIdTable; ///< CPU Logical ID Transfer table Pointer
-} LOGICAL_ID_TABLE;
-
-// MSRs
-// ------------------------
-#define MCG_CTL_P                   0x00000100ul              // bit 8  for MCG_CTL_P under MSRR
-#define MSR_MCG_CAP                 0x00000179ul
-#define DBG_CTL_MSR                 0x000001D9ul
-#define MSR_MC0_CTL                 0x00000400ul
-#define MSR_MC0_STATUS              0x00000401ul
-#define MSR_MC0_MISC                0x00000403ul
-#define MSR_MC1_MISC                0x00000407ul
-#define MSR_MC2_MISC                0x0000040Bul
-#define MSR_MC4_MISC0               0x00000413ul
-#define MSR_MC5_MISC                0x00000417ul
-#define MSR_MC4_MISC1               0xC0000408ul
-#define MSR_MC5_STATUS              0x00000415ul
-#define MSR_MC6_STATUS              0x00000419ul
-
-#define MSR_APIC_BAR                0x0000001Bul
-#define MSR_PATCH_LEVEL             0x0000008Bul
-
-#define CPUID_LONG_MODE_ADDR        0x80000008ul
-
-#define MSR_EXTENDED_FEATURE_EN     0xC0000080ul
-#define MSR_MC_MISC_LINK_THRESHOLD  0xC0000408ul
-#define MSR_MC_MISC_L3_THRESHOLD    0xC0000409ul
-#define MSR_PATCH_LOADER            0xC0010020ul
-
-/// Patch Loader Register
-typedef struct {
-  UINT64 PatchBase:32;                ///< Linear address of patch header address block
-  UINT64 SBZ:32;                      ///< Should be zero
-} PATCH_LOADER_MSR;
-
-#define AMD_MTRR_VARIABLE_BASE0     0x200
-#define AMD_MTRR_VARIABLE_BASE6     0x20C
-#define AMD_MTRR_FIX64k_00000       0x250
-#define AMD_MTRR_FIX16k_80000       0x258
-#define AMD_MTRR_FIX16k_A0000       0x259
-#define AMD_MTRR_FIX4k_C0000        0x268
-#define AMD_MTRR_FIX4k_C8000        0x269
-#define AMD_MTRR_FIX4k_D0000        0x26A
-#define AMD_MTRR_FIX4k_D8000        0x26B
-#define AMD_MTRR_FIX4k_E0000        0x26C
-#define AMD_MTRR_FIX4k_E8000        0x26D
-#define AMD_MTRR_FIX4k_F0000        0x26E
-#define AMD_MTRR_FIX4k_F8000        0x26F
-
-#define AMD_MTRR_FIX64K_WB_DRAM  0x1E1E1E1E1E1E1E1Eull
-#define AMD_MTRR_FIX64K_WT_DRAM  0x1C1C1C1C1C1C1C1Cull
-#define AMD_MTRR_FIX64K_UC_DRAM  0x1818181818181818ull
-#define AMD_MTRR_FIX16K_WB_DRAM  0x1E1E1E1E1E1E1E1Eull
-#define AMD_MTRR_FIX16K_WT_DRAM  0x1C1C1C1C1C1C1C1Cull
-#define AMD_MTRR_FIX16K_UC_DRAM  0x1818181818181818ull
-#define AMD_MTRR_FIX4K_WB_DRAM   0x1E1E1E1E1E1E1E1Eull
-#define AMD_MTRR_FIX4K_WT_DRAM   0x1C1C1C1C1C1C1C1Cull
-#define AMD_MTRR_FIX4K_UC_DRAM   0x1818181818181818ull
-
-
-#define MSR_SYS_CFG                 0xC0010010ul    // SYSCFG
-#define MSR_TOM                     0xC001001Aul    // TOP_MEM
-#define MSR_TOM2                    0xC001001Dul    // TOP_MEM2
-#define MSR_MC0_CTL_MASK            0xC0010044ul    // MC0 Control Mask
-#define MSR_MC1_CTL_MASK            0xC0010045ul    // MC1 Control Mask
-#define MSR_MC2_CTL_MASK            0xC0010046ul    // MC2 Control Mask
-#define MSR_MC4_CTL_MASK            0xC0010048ul    // MC4 Control Mask
-
-#define MSR_CPUID_FEATS             0xC0011004ul    // CPUID Features
-#define MSR_CPUID_EXT_FEATS         0xC0011005ul    // CPUID Extended Features
-#define MSR_HDT_CFG                 0xC001100Aul
-#define MSR_HWCR                    0xC0010015ul
-#define MSR_NB_CFG                  0xC001001Ful    // NB Config
-#define MSR_HTC                     0xC001003Eul
-#define CPU_WDT_CFG                 0xC0010074ul
-#define ENABLE_CF8_EXT_CFG          0x00004000ul    // [46]
-#define INIT_APIC_CPUID_LO          0x00400000ul    // [54]
-#define MSR_CU_SPMCTL               0xC0010281ul
-#define MSR_LS_CFG                  0xC0011020ul
-#define MSR_IC_CFG                  0xC0011021ul    // ICache Config - F15 Shared
-#define MSR_DC_CFG                  0xC0011022ul
-#define MSR_ME_CFG                  0xC0011029ul
-#define MSR_BU_CFG                  0xC0011023ul
-#define MSR_CU_CFG                  0xC0011023ul    // F15 Shared
-#define MSR_DE_CFG                  0xC0011029ul    // F15 Shared
-#define MSR_BU_CFG2                 0xC001102Aul
-#define MSR_CU_CFG2                 0xC001102Aul    // F15 Shared
-#define MSR_BU_CFG3                 0xC001102Bul
-#define MSR_CU_CFG3                 0xC001102Bul    // F15 Shared
-#define MSR_LS_CFG2                 0xC001102Dul
-#define MSR_CU_PFTCFG               0xC001102Ful
-#define MSR_IBS_OP_DATA3            0xC0011037ul
-#define MSR_C001_1070               0xC0011070ul    // F15 Shared
-#define MSR_CU_CBBCFG               0xC00110A1ul    // F15 CZ
-
-
-#define MSR_CPUID_NAME_STRING0      0xC0010030ul    // First CPUID namestring register
-#define MSR_CPUID_NAME_STRING1      0xC0010031ul
-#define MSR_CPUID_NAME_STRING2      0XC0010032ul
-#define MSR_CPUID_NAME_STRING3      0xC0010033ul
-#define MSR_CPUID_NAME_STRING4      0xC0010034ul
-#define MSR_CPUID_NAME_STRING5      0xC0010035ul    // Last CPUID namestring register
-#define MSR_MMIO_Cfg_Base           0xC0010058ul    // MMIO Configuration Base Address Register
-#define MSR_BIST                    0xC0010060ul    // BIST Results register
-#define MSR_OSVW_ID_Length          0xC0010140ul
-#define MSR_OSVW_Status             0xC0010141ul
-#define MSR_NB_PERF_CTL0            0xC0010240ul
-#define MSR_NB_PERF_CTR0            0xC0010241ul
-#define MSR_NB_PERF_CTL1            0xC0010242ul
-#define MSR_NB_PERF_CTR1            0xC0010243ul
-#define MSR_NB_PERF_CTL2            0xC0010244ul
-#define MSR_NB_PERF_CTR2            0xC0010245ul
-#define MSR_NB_PERF_CTL3            0xC0010246ul
-#define MSR_NB_PERF_CTR3            0xC0010247ul
-#define CU_SPMCTL                   0xC0010281ul    // Streaming Performance Monitor Control
-#define MSR_PERF_CONTROL3           0xC0010003ul    // Performance control register number 3
-#define MSR_PERF_COUNTER3           0xC0010007ul    // Performance counter register number 3
-#define PERF_RESERVE_BIT_MASK       0x030FFFDFFFFFull  // Mask of the Performance control Reserve bits
-#define PERF_CAR_CORRUPTION_EVENT   0x040040F0E2ul    // Configure the controller to capture the
-                                                    // CAR Corruption
-// FUNC_0 registers
-// ----------------
-#define LINK_INIT_CTRL              0x6C
-#define LINK_INIT_CTRL_REQ_DIS      0x02        // [1] = ReqDis
-#define LINK_INIT_COLD_RST_DET      BIT4
-#define LINK_INIT_BIOS_RST_DET_0    BIT5
-#define LINK_INIT_BIOS_RST_DET_1    BIT9
-#define LINK_INIT_BIOS_RST_DET_2    BIT10
-#define LINK_INIT_BIOS_RST_DET      BIT9 | BIT10
-#define EXTENDED_NODE_ID            0x160
-
-#define CORE_CTRL                   0x1DC
-#define CORE_CTRL_CORE1_EN          0x00000002ul
-#define CORE_CTRL_CORE2_EN          0x00000004ul
-#define CORE_CTRL_CORE3_EN          0x00000008ul
-#define CORE_CTRL_CORE4_EN          0x00000010ul
-#define CORE_CTRL_CORE5_EN          0x00000020ul
-#define CORE_CTRL_CORE6_EN          0x00000040ul
-#define CORE_CTRL_CORE7_EN          0x00000080ul
-#define CORE_CTRL_CORE8_EN          0x00000100ul
-#define CORE_CTRL_CORE9_EN          0x00000200ul
-
-// FUNC_3 registers
-// ----------------
-#define HARDWARE_THERMAL_CTRL_REG       0x64
-#define SOFTWARE_THERMAL_CTRL_REG       0x68
-
-#define ACPI_PSC_0_REG                  0x80    // ACPI Power State Control Registers
-#define ACPI_PSC_4_REG                  0x84
-
-#define NB_CFG_HIGH_REG                 0x8C
-#define POWER_CTRL_MISCELLANEOUS_REG    0xA0
-#define CLOCK_POWER_TIMING_CTRL2_REG    0xDC
-#define NORTH_BRIDGE_CAPABILITIES_REG   0xE8
-#define MULTI_NODE_CPU                  29
-#define CPUID_FMR                       0xFC    // Family / Model registers
-#define DOWNCORE_CTRL                   0x190   // Downcore Control Register
-
-#define LINK_TO_XCS_TOKEN_COUNT_REG_3X148 0x148
-#define REG_HT4_PHY_OFFSET_BASE_4X180    0x180
-#define REG_HT4_PHY_DATA_PORT_BASE_4X184 0x184
-
-// FUNC_4 registers
-// ----------------
-/* Native Die CPUID Register F4x160 */
-#define NATIVE_DIE_CPUID_REG 0x160
-#define NATIVE_DIE_CPUID_PCI_ADDR (MAKE_SBDFO (0, 0, 0x18, FUNC_4, NATIVE_DIE_CPUID_REG))
-
-/// Native Die CPUID PCI Register
-typedef struct {
-  UINT32 Stepping:4;                 ///< Stepping
-  UINT32 BaseModel:4;                ///< Base Model
-  UINT32 BaseFamily:4;               ///< Base Family
-  UINT32 :4;                         ///< Reserved
-  UINT32 ExtModel:4;                 ///< Extended Model
-  UINT32 ExtFamily:8;                ///< Extended Family
-  UINT32 :4;                         ///< Reserved
-} NATIVE_DIE_CPUID_REGISTER;
-
-// FUNC_5 registers
-// ----------------
-#define COMPUTE_UNIT_STATUS       0x80
-#define NORTH_BRIDGE_CAPABILITIES_2_REG  0x84
-
-
-// Misc. defines.
-#define PCI_DEV_BASE    24
-
-#define CPUID_STEPPING_MASK      0x0000000Ful
-#define CPUID_BASE_MODEL_MASK    0x000000F0ul
-#define CPUID_BASE_FAMILY_MASK   0x00000F00ul
-#define CPUID_EXT_MODEL_MASK     0x000F0000ul
-#define CPUID_EXT_FAMILY_MASK    0x0FF00000ul
-
-#define CZ_SOCKET_FP4       0
-#define SOCKET_IGNORE       0xF
-
-#define LAPIC_BASE_ADDR_MASK    0x0000FFFFFFFFF000ull
-#define APIC_EXT_BRDCST_MASK    0x000E0000ul
-#define APIC_ENABLE_BIT         0x00000800ul
-#ifndef LOCAL_APIC_ADDR
-#define LOCAL_APIC_ADDR         0xFEE00000ul
-#endif
-#define INT_CMD_REG_LO          0x300
-#define INT_CMD_REG_HI          0x310
-#define REMOTE_MSG_REG          0x380
-#define REMOTE_READ_REG         0xC0
-#define APIC_ID_REG             0x20
-#define APIC20_ApicId           24
-#define CMD_REG_TO_READ_DATA    0x338
-
-#define MAX_CORE_ID_SIZE 8
-#define MAX_CORE_ID_MASK ((1 << MAX_CORE_ID_SIZE) - 1)
-
-/*-------------------------
- * Default definitions
- *-------------------------
- */
-#define DOWNCORE_MASK_SINGLE    0xFFFFFFFEul
-#define DOWNCORE_MASK_DUAL      0xFFFFFFFCul
-#define DOWNCORE_MASK_TRI       0xFFFFFFF8ul
-#define DOWNCORE_MASK_FOUR      0xFFFFFFF0ul
-#define DOWNCORE_MASK_FIVE      0xFFFFFFE0ul
-#define DOWNCORE_MASK_SIX       0xFFFFFFC0ul
-#define DOWNCORE_MASK_SEVEN     0xFFFFFF80ul
-#define DOWNCORE_MASK_EIGHT     0xFFFFFF00ul
-#define DOWNCORE_MASK_TEN       0xFFFFFC00ul
-#define DOWNCORE_MASK_TWELVE    0xFFFFF000ul
-#define DOWNCORE_MASK_FOURTEEN  0xFFFFC000ul
-#define DOWNCORE_MASK_DUAL_COMPUTE_UNIT  0xFFFFFFFAul
-#define DOWNCORE_MASK_TRI_COMPUTE_UNIT   0xFFFFFFEAul
-#define DOWNCORE_MASK_FOUR_COMPUTE_UNIT  0xFFFFFFAAul
-#define DOWNCORE_MASK_FIVE_COMPUTE_UNIT  0xFFFFFEAAul
-#define DOWNCORE_MASK_SIX_COMPUTE_UNIT   0xFFFFFAAAul
-#define DOWNCORE_MASK_SEVEN_COMPUTE_UNIT 0xFFFFEAAAul
-#define DOWNCORE_MASK_EIGHT_COMPUTE_UNIT 0xFFFFAAAAul
-
-#define DELIVERY_STATUS             BIT13
-#define REMOTE_READ_STAT_MASK       0x00030000ul
-#define REMOTE_DELIVERY_PENDING     0x00010000ul
-#define REMOTE_DELIVERY_DONE        0x00020000ul
-
-/*
- * --------------------------------------------------------------------------------------
- *
- *             D E F I N E S    /   T Y P E D E F S   /  S T R U C T U R E S
- *
- * --------------------------------------------------------------------------------------
- */
-
-/// CpuEarly param type
-typedef struct {
-  IN       UINT8                  MemInitPState;        ///< Pstate value during memory initial
-  IN       PLATFORM_CONFIGURATION PlatformConfig;       ///< Runtime configurable user options
-} AMD_CPU_EARLY_PARAMS;
-
-/// CPUID
-typedef enum {
-  REG_EAX,                                    ///< EAX
-  REG_EBX,                                    ///< EBX
-  REG_ECX,                                    ///< ECX
-  REG_EDX                                     ///< EDX
-} CPUID_REG;
-
-#endif      // _CPU_REGISTERS_H_
-

pi/amd/00660F01/Proc/CPU/heapManager.h

diff --git a/pi/amd/00660F01/Proc/CPU/heapManager.h b/pi/amd/00660F01/Proc/CPU/heapManager.h
deleted file mode 100644
index 915144f..0000000
--- a/pi/amd/00660F01/Proc/CPU/heapManager.h
+++ /dev/null
@@ -1,241 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Heap Manager and Heap Allocation APIs, and related functions.
- *
- * Contains code that initialize, maintain, and allocate the heap space.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _HEAP_MANAGER_H_
-#define _HEAP_MANAGER_H_
-
-/*---------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *---------------------------------------------------------------------------------------
- */
-
-
-/*---------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *---------------------------------------------------------------------------------------
- */
-#define AMD_MTRR_VARIABLE_BASE0 0x200
-#define AMD_MTRR_VARIABLE_HEAP_BASE 0x20A
-#define AMD_MTRR_VARIABLE_HEAP_MASK (AMD_MTRR_VARIABLE_HEAP_BASE + 1)
-
-#define AMD_HEAP_START_ADDRESS  0x400000ul
-#define AMD_HEAP_REGION_END_ADDRESS 0xBFFFFFul
-#define AMD_HEAP_SIZE_PER_CORE  0x010000ul
-#define AMD_HEAP_INVALID_HEAP_OFFSET 0xFFFFFFFFul
-#define AMD_HEAP_MTRR_MASK ((0xFFFFFFFFFFFFF800ull & (((UINT64)AMD_HEAP_SIZE_PER_CORE ^ (-1)) + 1)) | 0x800)
-#define AMD_HEAP_SIZE_DWORD_PER_CORE  (AMD_HEAP_SIZE_PER_CORE / 4)
-
-#define AMD_TEMP_TOM            0x20000000ul  // Set TOM to 512 MB (temporary value)
-#define AMD_VAR_MTRR_ENABLE_BIT 0x100000ul    // bit 20
-
-#define AMD_HEAP_RAM_ADDRESS    0xB0000ul
-
-#define HEAP_SIGNATURE_VALID    0x50414548ul // Signature: 'HEAP'
-#define HEAP_SIGNATURE_INVALID  0x00000000ul // Signature cleared
-
-///Heap Manager Life cycle
-#define HEAP_DO_NOT_EXIST_YET        1
-#define HEAP_LOCAL_CACHE             2
-#define HEAP_TEMP_MEM                3
-#define HEAP_SYSTEM_MEM              4
-#define HEAP_DO_NOT_EXIST_ANYMORE    5
-#define HEAP_S3_RESUME               6
-#define HEAP_RUNTIME_SYSTEM_MEM      7
-
-///Heap callout
-#define HEAP_CALLOUT_BOOTTIME        0
-#define HEAP_CALLOUT_RUNTIME         1
-
-/*---------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *---------------------------------------------------------------------------------------
- */
-/// Allocate Heap Parameters
-typedef struct _ALLOCATE_HEAP_PARAMS {
-  UINT32  RequestedBufferSize;                    ///< Size of buffer.
-  UINT32  BufferHandle;                           ///< An unique ID of buffer.
-  UINT8   Persist;                                ///< A flag. If marked, to be stored and passed to AmdInitLate.
-  UINT8   *BufferPtr;                             ///< Pointer to buffer.
-} ALLOCATE_HEAP_PARAMS;
-
-/// Locate Heap Parameters
-typedef struct _LOCATE_HEAP_PTR {
-  UINT32  BufferHandle;                           ///< An unique ID of buffer.
-  UINT32 BufferSize;                              ///< Data buffer size.
-  UINT8   *BufferPtr;                             ///< Pointer to buffer.
-} LOCATE_HEAP_PTR;
-
-/// Heap Node Header
-typedef struct _BUFFER_NODE {
-  UINT32        BufferHandle;                     ///< An unique ID of buffer.
-  UINT32        BufferSize;                       ///< Size of buffer.
-  UINT8         Persist;                          ///< A flag. If marked, to be stored and passed to AmdInitLate.
-  UINT8         PadSize;                          ///< Size of pad.
-  UINT32        OffsetOfNextNode;                 ///< Offset of next node (relative to the base).
-} BUFFER_NODE;
-
-/// Heap Manager
-typedef struct _HEAP_MANAGER {
-  UINT32 Signature;                               ///< a signature to indicate if the heap is valid.
-  UINT32 UsedSize;                                ///< Used size of heap.
-  UINT32 FirstActiveBufferOffset;                 ///< Offset of the first active buffer.
-  UINT32 FirstFreeSpaceOffset;                    ///< Offset of the first free space.
-} HEAP_MANAGER;
-
-/// AGESA Buffer Handles (These are reserved)
-typedef enum {
-  AMD_INIT_RESET_HANDLE = 0x000A000,              ///< Assign 0x000A000 buffer handle to AmdInitReset routine.
-  AMD_INIT_EARLY_HANDLE,                          ///< Assign 0x000A001 buffer handle to AmdInitEarly routine.
-  AMD_INIT_POST_HANDLE,                           ///< Assign 0x000A002 buffer handle to AmdInitPost routine.
-  AMD_INIT_ENV_HANDLE,                            ///< Assign 0x000A003 buffer handle to AmdInitEnv routine.
-  AMD_INIT_MID_HANDLE,                            ///< Assign 0x000A004 buffer handle to AmdInitMid routine.
-  AMD_INIT_LATE_HANDLE,                           ///< Assign 0x000A005 buffer handle to AmdInitLate routine.
-  AMD_INIT_RESUME_HANDLE,                         ///< Assign 0x000A006 buffer handle to AmdInitResume routine.
-  AMD_LATE_RUN_AP_TASK_HANDLE,                    ///< Assign 0x000A007 buffer handle to AmdLateRunApTask routine.
-  AMD_INIT_RTB_HANDLE,                            ///< Assign 0x000A008 buffer handle to AmdInitRtb routine.
-  AMD_S3_LATE_RESTORE_HANDLE,                     ///< Assign 0x000A009 buffer handle to AmdS3LateRestore routine.
-  AMD_S3_SCRIPT_SAVE_TABLE_HANDLE,                ///< Assign 0x000A00A buffer handle to be used for S3 save table
-  AMD_S3_SCRIPT_TEMP_BUFFER_HANDLE,               ///< Assign 0x000A00B buffer handle to be used for S3 save table
-  AMD_CPU_AP_TASKING_HANDLE,                      ///< Assign 0x000A00C buffer handle to AP tasking input parameters.
-  AMD_REC_MEM_SOCKET_HANDLE,                      ///< Assign 0x000A00D buffer handle to save socket with memory in memory recovery mode.
-  AMD_MEM_AUTO_HANDLE,                            ///< Assign 0x000A00E buffer handle to AmdMemAuto routine.
-  AMD_MEM_SPD_HANDLE,                             ///< Assign 0x000A00F buffer handle to AmdMemSpd routine.
-  AMD_MEM_DATA_HANDLE,                            ///< Assign 0x000A010 buffer handle to MemData
-  AMD_MEM_TRAIN_BUFFER_HANDLE,                    ///< Assign 0x000A011 buffer handle to allocate buffer for training
-  AMD_MEM_S3_DATA_HANDLE,                         ///< Assign 0x000A012 buffer handle to special case register for S3
-  AMD_MEM_S3_NB_HANDLE,                           ///< Assign 0x000A013 buffer handle to NB block for S3
-  AMD_MEM_S3_MR0_DATA_HANDLE,                     ///< Assign 0x000A014 buffer handle to MR0 data block for S3
-  AMD_UMA_INFO_HANDLE,                            ///< Assign 0x000A015 buffer handle to be used for Uma information
-  AMD_DMI_MEM_DEV_INFO_HANDLE,                    ///< Assign 0x000A016 buffer handle to DMI Type16 17 19 20 information
-  EVENT_LOG_BUFFER_HANDLE,                        ///< Assign 0x000A017 buffer handle to Event Log
-  IDS_CONTROL_HANDLE,                             ///< Assign 0x000A018 buffer handle to AmdIds routine.
-  IDS_HDT_OUT_BUFFER_HANDLE,                      ///< Assign 0x000A019 buffer handle to be used for HDTOUT support.
-  IDS_CHECK_POINT_PERF_HANDLE,                    ///< Assign 0x000A01A buffer handle to Performance analysis
-  AMD_PCIE_COMPLEX_DATA_HANDLE,                   ///< Assign 0x000A01B buffer handle to be used for PCIe support
-  AMD_MEM_SYS_DATA_HANDLE,                        ///< Assign 0x000A01C buffer handle to be used for memory data structure
-  AMD_GNB_SMU_CONFIG_HANDLE,                      ///< Assign 0x000A01D buffer handle to be used for GNB SMU configuration
-  AMD_PP_FUSE_TABLE_HANDLE,                       ///< Assign 0x000A01E buffer handle to be used for TT fuse table
-  AMD_GFX_PLATFORM_CONFIG_HANDLE,                 ///< Assign 0x000A01F buffer handle to be used for Gfx platform configuration
-  AMD_GNB_TEMP_DATA_HANDLE,                       ///< Assign 0x000A020 buffer handle for GNB general purpose data block
-  AMD_MEM_2D_RDQS_HANDLE,                         ///< Assign 0x000A021 buffer handle for 2D training
-  AMD_MEM_2D_RD_WR_HANDLE,                        ///< Assign 0x000A022 buffer handle for 2D Read/Write training
-  AMD_GNB_IOMMU_SCRATCH_MEM_HANDLE,               ///< Assign 0x000A023 buffer handle to be used for GNB IOMMU scratch memory
-  AMD_MEM_S3_SAVE_HANDLE,                         ///< Assign 0x000A024 buffer handle for memory data saved right after memory init
-  AMD_MEM_2D_RDQS_RIM_HANDLE,                     ///< Assign 0x000A025 buffer handle for 2D training Eye RIM Search
-  AMD_MEM_2D_RD_WR_RIM_HANDLE,                    ///< Assign 0x000A026 buffer handle for 2D Read/Write training Eye RIM Search
-  AMD_CPU_NB_PSTATE_FIXUP_HANDLE,                 ///< Assign 0x000A027 buffer handle for an NB P-state workaround
-  AMD_MEM_CRAT_INFO_BUFFER_HANDLE,                ///< Assign 0x000A028 buffer handle for CRAT Memory affinity component structure
-  AMD_SKIP_MEM_S3_SAVE,                           ///< Assign 0x000A029 buffer handle for the flag to skip memory S3 save
-  AMD_IS_FEATURE_ENABLED,                         ///< Assign 0x000A02A buffer handle for keeping the result of IsFeatureEnabled
-  AMD_MEM_DATAEYE_WORK_AREA_HANDLE,               ///< Assign 0x000A02B buffer handle for Composite Data Eye Compression Work Area
-  AMD_GNB_SAMU_PATCH_HANDLE,                      ///< Assign 0x000A02C buffer handle for Samu patch buffer
-  AMD_GNB_SAMU_BOOT_CONTROL_HANDLE,               ///< Assign 0x000A02D buffer handle for Samu boot control buffer
-  AMD_GNB_ACP_ENGINE_HANDLE,                      ///< Assign 0x000A02E buffer handle for GNB ACP engine buffer
-  AMD_MEM_PMU_SRAM_MSG_BLOCK_HANDLE,              ///< Assign 0x000A02F buffer handle for PMU SRAM Message Block buffer
-  AMD_MEM_DRAM_CAD_BUS_CONFIG_HANDLE,             ///< Assign 0x000A030 buffer handle for DRAM CAD Bus Configuration
-  AMD_GNB_SMU_TABLE_HANDLE,                       ///< Assign 0x000A031 buffer handle for GNB SMU table buffer
-  AMD_GNB_CRAT_HSA_TABLE_HANDLE,                  ///< Assign 0x000A032 buffer handle for GNB CRAT HSA unit table
-  AMD_GNB_BUILD_OPTIONS_HANDLE,                   ///< Assign 0x000A033 buffer handle for GNB build options
-  AMD_S3_FINAL_RESTORE_HANDLE,                    ///< Assign 0x000A034 buffer handle to AmdS3FinalRestore routine.
-  AMD_GNB_PCIE_AER_CONFIG_HANDLE,                 ///< Assign 0x000A035 buffer handle for GNB PCIE AER configuration.
-  AMD_BTC_SCRATCH_HANDLE,                         ///< Assign 0x000A036 buffer handle for boot time calibration workloads
-  AMD_BTC_XMM_SAVE_HANDLE,                        ///< Assign 0x000A037 buffer handle for boot time calibration xmm register save
-  AMD_S3_SAVE_HANDLE,                             ///< Assign 0x000A038 buffer handle to memory context data
-  AMD_MEM_DDR_MAX_RATE_HANDLE,                    ///< Assign 0x000A039 buffer handle to memory DDR max rate
-  AMD_GNB_TDP_HANDLE,                             ///< Assign 0x000A03A buffer handle to GNB TDP
-  AMD_MEM_MISC_HANDLES_START = 0x1000000,         ///< Reserve 0x1000000 to 0x1FFFFFF buffer handle
-  AMD_MEM_MISC_HANDLES_END = 0x1FFFFFF,           ///< miscellaneous memory init tasks' buffers.
-  AMD_HEAP_IN_MAIN_MEMORY_HANDLE = 0x8000000,     ///< Assign 0x8000000 to AMD_HEAP_IN_MAIN_MEMORY_HANDLE.
-  SOCKET_DIE_MAP_HANDLE = 0x534F4B54,             ///< 'sokt'
-  NODE_ID_MAP_HANDLE = 0x4E4F4445,                ///< 'node'
-  HOP_COUNT_TABLE_HANDLE = 0x484F5053,            ///< 'hops'
-  AMD_FCH_RESET_DATA_BLOCK_HANDLE = 0x46434852,   ///< 'FCHR' Buffer handle for FCH private data block at InitReset
-  AMD_FCH_DATA_BLOCK_HANDLE = 0x46434845,         ///< 'FCHE' Buffer handle for FCH private data block at InitEnv
-  IDS_TRAP_TABLE_HANDLE = 0x49524547,             ///< 'IREG' Handle for IDS register table
-  IDS_SAVE_IDTR_HANDLE = 0x49445452,              ///< 'IDTR'
-  IDS_BSC_IDT_HANDLE = 0x42534349,                ///< 'BSCI' BSC Idt table
-  IDS_NV_TO_CMOS_HANDLE = 0x534D4349,             ///< 'ICMS' Handle for IDS CMOS save
-  IDS_GRA_HANDLE = 0x41524749,                    ///< 'IGRA' Handle for IDS GRA save
-  IDS_EXTEND_HANDLE = 0x54584549,                 ///< 'IEXT' Handle for IDS extend module
-  IDS_TEMP_DATA_HANDLE = 0x504D5459,              ///< 'ITMP' Handle for IDS temp data
-} AGESA_BUFFER_HANDLE;
-
-
-/*---------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *---------------------------------------------------------------------------------------
- */
-
-AGESA_STATUS
-HeapManagerInit (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-HeapAllocateBuffer (
-  IN OUT   ALLOCATE_HEAP_PARAMS *AllocateHeapParams,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-HeapDeallocateBuffer (
-  IN       UINT32 BufferHandle,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-HeapLocateBuffer (
-  IN OUT   LOCATE_HEAP_PTR *LocateHeap,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-UINT64
-HeapGetBaseAddress (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-EventLogInitialization (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-#endif // _HEAP_MANAGER_H_

pi/amd/00660F01/Proc/Common/AmdFch.h

diff --git a/pi/amd/00660F01/Proc/Common/AmdFch.h b/pi/amd/00660F01/Proc/Common/AmdFch.h
deleted file mode 100644
index f75f881..0000000
--- a/pi/amd/00660F01/Proc/Common/AmdFch.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD FCH Component
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _AMD_FCH_H_
-#define _AMD_FCH_H_
-
-typedef AGESA_STATUS FCH_INIT (IN VOID *DataPtr);
-typedef VOID FCH_TASK_ENTRY (IN VOID *FchCfg);
-
-
-/// FCH API build options
-typedef struct {
-  FCH_INIT        *InitReset;                   ///< InitReset
-  FCH_INIT        *InitResetConstructor;        ///< InitResetConstructor
-  FCH_INIT        *InitEnv;                     ///< InitEnv
-  FCH_INIT        *InitEnvConstructor;          ///< InitEnvConstructor
-  FCH_INIT        *InitMid;                     ///< InitMid
-  FCH_INIT        *InitMidConstructor;          ///< InitMidConstructor
-  FCH_INIT        *InitLate;                    ///< InitLate
-  FCH_INIT        *InitLateConstructor;         ///< InitLateConstructor
-} BLDOPT_FCH_FUNCTION;
-
-#endif

pi/amd/00660F01/Proc/Fch/Common/AcpiLib.h

diff --git a/pi/amd/00660F01/Proc/Fch/Common/AcpiLib.h b/pi/amd/00660F01/Proc/Fch/Common/AcpiLib.h
deleted file mode 100644
index 6f87842..0000000
--- a/pi/amd/00660F01/Proc/Fch/Common/AcpiLib.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH ACPI lib
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _FCH_ACPILIB_H_
-#define _FCH_ACPILIB_H_
-///
-/// RSDP - ACPI 2.0 table RSDP
-///
-typedef struct _RSDP_HEADER {
-  UINT64               Signature;                      ///< RSDP signature "RSD PTR"
-  UINT8                CheckSum;                       ///< checksum of the first 20 bytes
-  UINT8                OEMID[6];                       ///< OEM ID
-  UINT8                Revision;                       ///< 0 for APCI 1.0, 2 for ACPI 2.0
-  UINT32               RsdtAddress;                    ///< physical address of RSDT
-  UINT32               Length;                         ///< total length of RSDP (including extended part)
-  UINT64               XsdtAddress;                    ///< physical address of XSDT
-  UINT8                ExtendedCheckSum;               ///< chechsum of whole table
-  UINT8                Reserved[3];                    ///< Reserved
-} RSDP_HEADER;
-
-///
-/// DESCRIPTION_HEADER - ACPI common table header
-///
-typedef struct _DESCRIPTION_HEADER {
-  UINT32               Signature;                      ///< ACPI signature (4 ASCII characters)
-  UINT32               Length;                         ///< Length of table, in bytes, including header
-  UINT8                Revision;                       ///< ACPI Specification minor version #
-  UINT8                CheckSum;                       ///< To make sum of entire table == 0
-  UINT8                OemId[6];                       ///< OEM identification
-  UINT8                OemTableId[8];                  ///< OEM table identification
-  UINT32               OemRevision;                    ///< OEM revision number
-  UINT32               CreatorId;                      ///< ASL compiler vendor ID
-  UINT32               CreatorRevision;                ///< ASL compiler revision number
-} DESCRIPTION_HEADER;
-
-///
-/// _AcpiRegWrite - ACPI MMIO register R/W structure
-///
-typedef struct _ACPI_REG_WRITE {
-  UINT8        MmioBase;               /// MmioBase: Index of Fch block (For instance GPIO_BASE:0x01 SMI_BASE:0x02)
-  UINT8        MmioReg;                /// MmioReg      : Register index
-  UINT8        DataAndMask;            /// DataANDMask  : AND Register Data
-  UINT8        DataOrMask;             /// DataOrMask   : Or Register Data
-} ACPI_REG_WRITE;
-
-VOID*     AcpiLocateTable (IN UINT32 Signature);
-VOID      AcpiSetTableCheckSum (IN VOID *TablePtr);
-UINT8     AcpiGetTableCheckSum (IN VOID *TablePtr);
-UINT8     GetByteSum (IN VOID *DataPtr, IN UINT32 Length);
-
-#endif

pi/amd/00660F01/Proc/Fch/Common/FchBiosRamUsage.h

diff --git a/pi/amd/00660F01/Proc/Fch/Common/FchBiosRamUsage.h b/pi/amd/00660F01/Proc/Fch/Common/FchBiosRamUsage.h
deleted file mode 100644
index a694d11..0000000
--- a/pi/amd/00660F01/Proc/Fch/Common/FchBiosRamUsage.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH BIOS Ram usage
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _FCH_BIOS_RAM_USAGE_H_
-#define _FCH_BIOS_RAM_USAGE_H_
-
-#define RESTORE_MEMORY_CONTROLLER_START       0
-#define XHCI_REGISTER_BAR00                   0xD0
-#define XHCI_REGISTER_BAR01                   0xD1
-#define XHCI_REGISTER_BAR02                   0xD2
-#define XHCI_REGISTER_BAR03                   0xD3
-#define XHCI_REGISTER_04H                     0xD4
-#define XHCI_REGISTER_0CH                     0xD5
-#define XHCI_REGISTER_3CH                     0xD6
-#define XHCI1_REGISTER_BAR00                  0xE0
-#define XHCI1_REGISTER_BAR01                  0xE1
-#define XHCI1_REGISTER_BAR02                  0xE2
-#define XHCI1_REGISTER_BAR03                  0xE3
-#define XHCI1_REGISTER_04H                    0xE4
-#define XHCI1_REGISTER_0CH                    0xE5
-#define XHCI1_REGISTER_3CH                    0xE6
-#define RTC_WORKAROUND_DATA_START             0xF0
-#define BOOT_TIME_FLAG_SEC                    0xF8
-#define BOOT_TIME_FLAG_INT19                  0xFC
-
-#endif
-

pi/amd/00660F01/Proc/Fch/Common/FchCommonCfg.h

diff --git a/pi/amd/00660F01/Proc/Fch/Common/FchCommonCfg.h b/pi/amd/00660F01/Proc/Fch/Common/FchCommonCfg.h
deleted file mode 100644
index 0e7341c..0000000
--- a/pi/amd/00660F01/Proc/Fch/Common/FchCommonCfg.h
+++ /dev/null
@@ -1,1359 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH Function Support Definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 311507 $   @e \$Date: 2015-01-22 06:57:51 +0800 (Thu, 22 Jan 2015) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _FCH_COMMON_CFG_H_
-#define _FCH_COMMON_CFG_H_
-
-#pragma pack (push, 1)
-
-//-----------------------------------------------------------------------------
-//                     FCH DEFINITIONS AND MACROS
-//-----------------------------------------------------------------------------
-
-//
-// FCH Component Data Structure Definitions
-//
-
-/// PCI_ADDRESS - PCI access structure
-#define PCI_ADDRESS(bus, dev, func, reg) \
-                   (UINT32) ( (((UINT32)bus) << 24) + (((UINT32)dev) << 19) + (((UINT32)func) << 16) + ((UINT32)reg) )
-
-#define CPUID_FMF        0x80000001ul  // Family Model Features information
-///
-///  - Byte Register R/W structure
-///
-typedef struct _REG8_MASK {
-  UINT8                 RegIndex;                       /// RegIndex - Reserved
-  UINT8                 AndMask;                        /// AndMask - Reserved
-  UINT8                 OrMask;                         /// OrMask - Reserved
-} REG8_MASK;
-
-
-///
-/// PCIE Reset Block
-///
-typedef enum {
-  NbBlock,                                              ///< Reset for NB PCIE
-  FchBlock                                              ///< Reset for FCH GPP
-} RESET_BLOCK;
-
-///
-/// PCIE Reset Operation
-///
-typedef enum {
-  DeassertReset,                                        ///< DeassertRese - Deassert reset
-  AssertReset                                           ///< AssertReset - Assert reset
-} RESET_OP;
-
-
-///
-/// Fch Run Time Parameters
-///
-typedef struct {
-  UINT32                PcieMmioBase;                              ///< PcieMmioBase
-  UINT32                FchDeviceEnableMap;                        ///< FchDeviceEnableMap
-  UINT32                FchDeviceD3ColdMap;                        ///< FchDeviceD3ColdMap
-  UINT16                XHCI_PMx04_XhciFwRomAddr_Rom;              ///< XHCI_PMx04_XhciFwRomAddr_Rom
-  UINT32                XHCI_PMx08_xHCI_Firmware_Addr_1_Rom;       ///< XHCI_PMx08_xHCI_Firmware_Addr_1_Ram
-  UINT16                XHCI_PMx04_XhciFwRomAddr_Ram;              ///< XHCI_PMx04_XhciFwRomAddr_Rom
-  UINT32                XHCI_PMx08_xHCI_Firmware_Addr_1_Ram;       ///< XHCI_PMx08_xHCI_Firmware_Addr_1_Ram
-  UINT8                 SataDevSlpPort0S5Pin;                      ///< SataDevSlpPort0S5Pin - Reserved
-  UINT8                 SataDevSlpPort1S5Pin;                      ///< SataDevSlpPort1S5Pin - Reserved
-  UINT16                Dummy16;                                   ///< Dummy16 - Reserved
-  UINT32                SdMmioBase;                                ///< Sd Mmio Base - Reserved
-  UINT32                EhciMmioBase;                              ///< Ehci Mmio Base - Reserved
-  UINT32                XhciMmioBase;                              ///< Xhci Mmio Base - Reserved
-  UINT32                SataMmioBase;                              ///< Sata Mmio Base - Reserved
-} FCH_RUNTIME;
-
-///
-/// SD structure
-///
-typedef struct {
-  SD_MODE               SdConfig;                       ///< SD Mode configuration
-                                                        ///   @li <b>00</b> - Disabled
-                                                        ///   @li <b>00</b> - AMDA
-                                                        ///   @li <b>01</b> - DMA
-                                                        ///   @li <b>10</b> - PIO
-                                                        ///
-  UINT8                 SdSpeed;                        ///< SD Speed
-                                                        ///   @li <b>0</b> - Low speed
-                                                        ///   @li <b>1</b> - High speed
-                                                        ///
-  UINT8                 SdBitWidth;                     ///< SD Bit Width
-                                                        ///   @li <b>0</b> - 32BIT clear 23
-                                                        ///   @li <b>1</b> - 64BIT, set 23,default
-                                                        ///
-  UINT32                SdSsid;                         ///< SD Subsystem ID
-  SD_CLOCK_CONTROL      SdClockControl;                 ///< SD Clock Control
-  BOOLEAN               SdClockMultiplier;              ///< SD Clock Multiplier enable/disable
-  UINT8                 SdReTuningMode;                 ///< SD Re-tuning modes select
-                                                        ///    @li <b>0</b> - mode 1
-                                                        ///    @li <b>1</b> - mode 2
-                                                        ///    @li <b>2</b> - mode 3
-  UINT8                 SdHostControllerVersion;        ///< SD controller Version
-                                                        ///    @li <b>1</b> - SD 2.0
-                                                        ///    @li <b>2</b> - SD 3.0
-  UINT8                 SdrCapabilities;                ///< SDR Capability mode select
-                                                        ///    @li <b>00</b> - SDR25/15
-                                                        ///    @li <b>01</b> - SDR50
-                                                        ///    @li <b>11</b> - SDR104
-  UINT8                 SdSlotType;                     ///< SDR Slot Type select
-                                                        ///    @li <b>00</b> - Removable Card Slot
-                                                        ///    @li <b>01</b> - Embedded Slot for One Device
-                                                        ///    @li <b>10</b> - Shared Bus Slot
-  BOOLEAN               SdForce18;                      ///< SD Force18
-  UINT8                 SdDbgConfig;                       ///< SD Mode configuration
-                                                        ///   @li <b>00</b> - Disabled
-                                                        ///   @li <b>00</b> - AMDA
-                                                        ///   @li <b>01</b> - DMA
-                                                        ///   @li <b>10</b> - PIO
-                                                        ///
-} FCH_SD;
-
-///
-/// CODEC_ENTRY - Fch HD Audio OEM Codec structure
-///
-typedef struct _CODEC_ENTRY {
-  UINT8                 Nid;                            /// Nid - Reserved
-  UINT32                Byte40;                         /// Byte40 - Reserved
-} CODEC_ENTRY;
-
-///
-/// CODEC_TBL_LIST - Fch HD Audio Codec table list
-///
-typedef struct _CODEC_TBL_LIST {
-  UINT32                CodecId;                        /// CodecID - Codec ID
-  CODEC_ENTRY*          CodecTablePtr;                  /// CodecTablePtr - Codec table pointer
-} CODEC_TBL_LIST;
-
-///
-/// AZALIA_PIN - HID Azalia or GPIO define structure.
-///
-typedef struct _AZALIA_PIN {
-  UINT8                 AzaliaSdin0;                    ///< AzaliaSdin0
-                                                        ///   @par
-                                                        ///   @li <b>00</b> - GPIO PIN
-                                                        ///   @li <b>10</b> - As a Azalia SDIN pin
-
-  UINT8                 AzaliaSdin1;                    ///< AzaliaSdin1
-                                                        ///   @par
-                                                        /// SDIN1 is define at BIT2 & BIT3
-                                                        ///   @li <b>00</b> - GPIO PIN
-                                                        ///   @li <b>10</b> - As a Azalia SDIN pin
-
-  UINT8                 AzaliaSdin2;                    ///< AzaliaSdin2
-                                                        ///   @par
-                                                        /// SDIN2 is define at BIT4 & BIT5
-                                                        ///   @li <b>00</b> - GPIO PIN
-                                                        ///   @li <b>10</b> - As a Azalia SDIN pin
-
-  UINT8                 AzaliaSdin3;                    ///< AzaliaSdin3
-                                                        ///   @par
-                                                        /// SDIN3 is define at BIT6 & BIT7
-                                                        ///   @li <b>00</b> - GPIO PIN
-                                                        ///   @li <b>10</b> - As a Azalia SDIN pin
-} AZALIA_PIN;
-
-///
-/// Azalia structure
-///
-typedef struct {
-  HDA_CONFIG            AzaliaEnable;                   ///< AzaliaEnable       - Azalia function configuration
-  BOOLEAN               AzaliaMsiEnable;                ///< AzaliaMsiEnable    - Azalia MSI capability
-  UINT32                AzaliaSsid;                     ///< AzaliaSsid         - Azalia Subsystem ID
-  UINT8                 AzaliaPinCfg;                   ///< AzaliaPinCfg       - Azalia Controller SDIN pin Configuration
-                                                        ///  @par
-                                                        ///  @li <b>0</b>       - disable
-                                                        ///  @li <b>1</b>       - enable
-
-  UINT8                 AzaliaFrontPanel;               ///< AzaliaFrontPanel   - Azalia Controller Front Panel Configuration
-                                                        ///   @par
-                                                        /// Support Front Panel configuration
-                                                        ///   @li <b>0</b>      - Auto
-                                                        ///   @li <b>1</b>      - disable
-                                                        ///   @li <b>2</b>      - enable
-
-  UINT8                 FrontPanelDetected;             ///< FrontPanelDetected - Force Azalia Controller Front Panel Configuration
-                                                        ///  @par
-                                                        /// Force Front Panel configuration
-                                                        ///  @li <b>0</b>       - Not Detected
-                                                        ///  @li <b>1</b>       - Detected
-
-  UINT8                 AzaliaSnoop;                    ///< AzaliaSnoop        - Azalia Controller Snoop feature Configuration
-                                                        ///   @par
-                                                        /// Azalia Controller Snoop feature Configuration
-                                                        ///   @li <b>0</b>      - disable
-                                                        ///   @li <b>1</b>      - enable
-
-  UINT8                 AzaliaDummy;                    /// AzaliaDummy         - Reserved */
-
-  AZALIA_PIN            AzaliaConfig;                   /// AzaliaConfig        - Azaliz Pin Configuration
-
-///
-/// AZOEMTBL - Azalia Controller OEM Codec Table Pointer
-///
-  CODEC_TBL_LIST        *AzaliaOemCodecTablePtr;        /// AzaliaOemCodecTablePtr - Oem Azalia Codec Table Pointer
-
-///
-/// AZOEMFPTBL - Azalia Controller Front Panel OEM Table Pointer
-///
-  VOID                  *AzaliaOemFpCodecTablePtr;      /// AzaliaOemFpCodecTablePtr - Oem Front Panel Codec Table Pointer
-} FCH_AZALIA;
-
-///
-/// _SPI_DEVICE_PROFILE Spi Device Profile structure
-///
-typedef struct _SPI_DEVICE_PROFILE {
-  UINT32                JEDEC_ID;                       /// JEDEC ID
-  UINT32                RomSize;                        /// ROM Size
-  UINT32                SectorSize;                     /// Sector Size
-  UINT16                MaxNormalSpeed;                 /// Max Normal Speed
-  UINT16                MaxFastSpeed;                   /// Max Fast Speed
-  UINT16                MaxDualSpeed;                   /// Max Dual Speed
-  UINT16                MaxQuadSpeed;                   /// Max Quad Speed
-  UINT8                 QeReadRegister;                 /// QE Read Register
-  UINT8                 QeWriteRegister;                /// QE Write Register
-  UINT8                 QeOperateSize;                  /// QE Operate Size 1byte/2bytes
-  UINT16                QeLocation;                     // QE Location in the register
-} SPI_DEVICE_PROFILE;
-
-///
-/// _SPI_CONTROLLER_PROFILE Spi Device Profile structure
-///
-typedef struct _SPI_CONTROLLER_PROFILE {
-//  UINT32                SPI_CONTROLLER_ID;                       /// SPI Controller ID
-  UINT16                FifoSize;                       /// FIFO Size
-  UINT16                MaxNormalSpeed;                 /// Max Normal Speed
-  UINT16                MaxFastSpeed;                   /// Max Fast Speed
-  UINT16                MaxDualSpeed;                   /// Max Dual Speed
-  UINT16                MaxQuadSpeed;                   /// Max Quad Speed
-} SPI_CONTROLLER_PROFILE;
-
-///
-/// SPI structure
-///
-typedef struct {
-  BOOLEAN               LpcMsiEnable;                   ///< LPC MSI capability
-  UINT32                LpcSsid;                        ///< LPC Subsystem ID
-  UINT32                RomBaseAddress;                 ///< SpiRomBaseAddress
-                                                        ///   @par
-                                                        ///   SPI ROM BASE Address
-                                                        ///
-  UINT8                 SpiSpeed;                       ///< SpiSpeed - Spi Frequency
-                                                        ///  @par
-                                                        ///  SPI Speed [1.0] - the clock speed for non-fast read command
-                                                        ///   @li <b>00</b> - 66Mhz
-                                                        ///   @li <b>01</b> - 33Mhz
-                                                        ///   @li <b>10</b> - 22Mhz
-                                                        ///   @li <b>11</b> - 16.5Mhz
-                                                        ///
-  UINT8                 SpiFastSpeed;                   ///< FastSpeed  - Spi Fast Speed feature
-                                                        ///  SPIFastSpeed [1.0] - the clock speed for Fast Speed Feature
-                                                        ///   @li <b>00</b> - 66Mhz
-                                                        ///   @li <b>01</b> - 33Mhz
-                                                        ///   @li <b>10</b> - 22Mhz
-                                                        ///   @li <b>11</b> - 16.5Mhz
-                                                        ///
-  UINT8                 WriteSpeed;                     ///< WriteSpeed - Spi Write Speed
-                                                        /// @par
-                                                        ///  WriteSpeed [1.0] - the clock speed for Spi write command
-                                                        ///   @li <b>00</b> - 66Mhz
-                                                        ///   @li <b>01</b> - 33Mhz
-                                                        ///   @li <b>10</b> - 22Mhz
-                                                        ///   @li <b>11</b> - 16.5Mhz
-                                                        ///
-  UINT8                 SpiMode;                        ///< SpiMode    - Spi Mode Setting
-                                                        /// @par
-                                                        ///  @li <b>101</b> - Qual-io 1-4-4
-                                                        ///  @li <b>100</b> - Dual-io 1-2-2
-                                                        ///  @li <b>011</b> - Qual-io 1-1-4
-                                                        ///  @li <b>010</b> - Dual-io 1-1-2
-                                                        ///  @li <b>111</b> - FastRead
-                                                        ///  @li <b>110</b> - Normal
-                                                        ///
-  UINT8                 AutoMode;                       ///< AutoMode   - Spi Auto Mode
-                                                        /// @par
-                                                        ///  SPI Auto Mode
-                                                        ///  @li <b>0</b> - Disabled
-                                                        ///  @li <b>1</b> - Enabled
-                                                        ///
-  UINT8                 SpiBurstWrite;                  ///< SpiBurstWrite - Spi Burst Write Mode
-                                                        /// @par
-                                                        ///  SPI Burst Write
-                                                        ///  @li <b>0</b> - Disabled
-                                                        ///  @li <b>1</b> - Enabled
-  BOOLEAN               LpcClk0;                        ///< Lclk0En - LPCCLK0
-                                                        /// @par
-                                                        ///  LPC Clock 0 mode
-                                                        ///  @li <b>0</b> - forced to stop
-                                                        ///  @li <b>1</b> - functioning with CLKRUN protocol
-  BOOLEAN               LpcClk1;                        ///< Lclk1En - LPCCLK1
-                                                        /// @par
-                                                        ///  LPC Clock 1 mode
-                                                        ///  @li <b>0</b> - forced to stop
-                                                        ///  @li <b>1</b> - functioning with CLKRUN protocol
-//  UINT32                SPI100_RX_Timing_Config_Register_38;                 ///< SPI100_RX_Timing_Config_Register_38
-//  UINT16                SPI100_RX_Timing_Config_Register_3C;                 ///< SPI100_RX_Timing_Config_Register_3C
-//  UINT8                 SpiProtectEn0_1d_34;                  ///
-  UINT8                 SPI100_Enable;                  ///< Spi 100 Enable
-  SPI_DEVICE_PROFILE    SpiDeviceProfile;               ///< Spi Device Profile
-} FCH_SPI;
-
-
-///
-/// IDE structure
-///
-typedef struct {
-  BOOLEAN               IdeEnable;                      ///< IDE function switch
-  BOOLEAN               IdeMsiEnable;                   ///< IDE MSI capability
-  UINT32                IdeSsid;                        ///< IDE controller Subsystem ID
-} FCH_IDE;
-
-///
-/// IR Structure
-///
-typedef struct {
-  IR_CONFIG             IrConfig;                       ///< IrConfig
-  UINT8                 IrPinControl;                   ///< IrPinControl
-} FCH_IR;
-
-
-///
-/// PCI Bridge Structure
-///
-typedef struct {
-  BOOLEAN               PcibMsiEnable;                  ///< PCI-PCI Bridge MSI capability
-  UINT32                PcibSsid;                       ///< PCI-PCI Bridge Subsystem ID
-  UINT8                 PciClks;                        ///< 33MHz PCICLK0/1/2/3 Enable, bits [0:3] used
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  UINT16                PcibClkStopOverride;            ///< PCIB_CLK_Stop Override
-  BOOLEAN               PcibClockRun;                   ///< Enable the auto clkrun functionality
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-} FCH_PCIB;
-
-
-///
-/// - SATA Phy setting structure
-///
-typedef struct _SATA_PHY_SETTING {
-  UINT16                PhyCoreControlWord;             /// PhyCoreControlWord - Reserved
-  UINT32                PhyFineTuneDword;               /// PhyFineTuneDword - Reserved
-} SATA_PHY_SETTING;
-
-///
-/// SATA main setting structure
-///
-typedef struct _SATA_ST {
-  UINT8                 SataModeReg;                    ///< SataModeReg - Sata Controller Mode
-  BOOLEAN               SataEnable;                     ///< SataEnable - Sata Controller Function
-                                                        ///   @par
-                                                        /// Sata Controller
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  UINT8                 Sata6AhciCap;                   ///< Sata6AhciCap - Reserved */
-  BOOLEAN               SataSetMaxGen2;                 ///< SataSetMaxGen2 - Set Sata Max Gen2 mode
-                                                        ///   @par
-                                                        /// Sata Controller Set to Max Gen2 mode
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  BOOLEAN               IdeEnable;                      ///< IdeEnable - Hidden IDE
-                                                        ///  @par
-                                                        /// Sata IDE Controller Combined Mode
-                                                        ///   Enable -  SATA controller has control over Port0 through Port3,
-                                                        ///     IDE controller has control over Port4 and Port7.
-                                                        ///   Disable - SATA controller has full control of all 8 Ports
-                                                        ///     when operating in non-IDE mode.
-                                                        ///  @li <b>0</b> - enable
-                                                        ///  @li <b>1</b> - disable
-                                                        ///
-  UINT8                 SataClkMode;                    /// SataClkMode - Reserved
-} SATA_ST;
-
-///
-/// SATA_PORT_ST - SATA PORT structure
-///
-typedef struct _SATA_PORT_ST {
-  UINT8                 SataPortReg;                    ///< SATA Port bit map - bits[0:7] for ports 0 ~ 7
-                                                        ///  @li <b>0</b> - disable
-                                                        ///  @li <b>1</b> - enable
-                                                        ///
-  BOOLEAN               Port0;                          ///< PORT0 - 0:disable, 1:enable
-  BOOLEAN               Port1;                          ///< PORT1 - 0:disable, 1:enable
-  BOOLEAN               Port2;                          ///< PORT2 - 0:disable, 1:enable
-  BOOLEAN               Port3;                          ///< PORT3 - 0:disable, 1:enable
-  BOOLEAN               Port4;                          ///< PORT4 - 0:disable, 1:enable
-  BOOLEAN               Port5;                          ///< PORT5 - 0:disable, 1:enable
-  BOOLEAN               Port6;                          ///< PORT6 - 0:disable, 1:enable
-  BOOLEAN               Port7;                          ///< PORT7 - 0:disable, 1:enable
-} SATA_PORT_ST;
-
-///
-///< _SATA_PORT_MD - Force Each PORT to GEN1/GEN2 mode
-///
-typedef struct _SATA_PORT_MD {
-  UINT16                SataPortMode;                   ///< SATA Port GEN1/GEN2 mode bit map - bits [0:15] for ports 0 ~ 7
-  UINT8                 Port0;                          ///< PORT0 - set BIT0 to GEN1, BIT1 - PORT0 set to GEN2
-  UINT8                 Port1;                          ///< PORT1 - set BIT2 to GEN1, BIT3 - PORT1 set to GEN2
-  UINT8                 Port2;                          ///< PORT2 - set BIT4 to GEN1, BIT5 - PORT2 set to GEN2
-  UINT8                 Port3;                          ///< PORT3 - set BIT6 to GEN1, BIT7 - PORT3 set to GEN2
-  UINT8                 Port4;                          ///< PORT4 - set BIT8 to GEN1, BIT9 - PORT4 set to GEN2
-  UINT8                 Port5;                          ///< PORT5 - set BIT10 to GEN1, BIT11 - PORT5 set to GEN2
-  UINT8                 Port6;                          ///< PORT6 - set BIT12 to GEN1, BIT13 - PORT6 set to GEN2
-  UINT8                 Port7;                          ///< PORT7 - set BIT14 to GEN1, BIT15 - PORT7 set to GEN2
-} SATA_PORT_MD;
-///
-/// SATA structure
-///
-typedef struct {
-  BOOLEAN               SataMsiEnable;                  ///< SATA MSI capability
-  UINT32                SataIdeSsid;                    ///< SATA IDE mode SSID
-  UINT32                SataRaidSsid;                   ///< SATA RAID mode SSID
-  UINT32                SataRaid5Ssid;                  ///< SATA RAID 5 mode SSID
-  UINT32                SataAhciSsid;                   ///< SATA AHCI mode SSID
-
-  SATA_ST               SataMode;                       /// SataMode - Reserved
-  SATA_CLASS            SataClass;                      ///< SataClass - SATA Controller mode [2:0]
-  UINT8                 SataIdeMode;                    ///< SataIdeMode - Sata IDE Controller mode
-                                                        ///  @par
-                                                        ///   @li <b>0</b> - Legacy IDE mode
-                                                        ///   @li <b>1</b> - Native IDE mode
-                                                        ///
-  UINT8                 SataDisUnusedIdePChannel;       ///< SataDisUnusedIdePChannel-Disable Unused IDE Primary Channel
-                                                        ///  @par
-                                                        ///   @li <b>0</b> - Channel Enable
-                                                        ///   @li <b>1</b> - Channel Disable
-                                                        ///
-  UINT8                 SataDisUnusedIdeSChannel;       ///< SataDisUnusedIdeSChannel - Disable Unused IDE Secondary Channel
-                                                        ///   @par
-                                                        ///    @li <b>0</b> - Channel Enable
-                                                        ///    @li <b>1</b> - Channel Disable
-                                                        ///
-  UINT8                 IdeDisUnusedIdePChannel;        ///< IdeDisUnusedIdePChannel-Disable Unused IDE Primary Channel
-                                                        ///   @par
-                                                        ///    @li <b>0</b> - Channel Enable
-                                                        ///    @li <b>1</b> - Channel Disable
-                                                        ///
-  UINT8                 IdeDisUnusedIdeSChannel;        ///< IdeDisUnusedIdeSChannel-Disable Unused IDE Secondary Channel
-                                                        ///   @par
-                                                        ///    @li <b>0</b> - Channel Enable
-                                                        ///    @li <b>1</b> - Channel Disable
-                                                        ///
-  UINT8                 SataOptionReserved;             /// SataOptionReserved - Reserved
-
-  SATA_PORT_ST          SataEspPort;                    ///<  SataEspPort - SATA port is external accessible on a signal only connector (eSATA:)
-
-  SATA_PORT_ST          SataPortPower;                  ///<  SataPortPower - Port Power configuration
-
-  SATA_PORT_MD          SataPortMd;                     ///<  SataPortMd - Port Mode
-
-  UINT8                 SataAggrLinkPmCap;              /// SataAggrLinkPmCap - 0:OFF   1:ON
-  UINT8                 SataPortMultCap;                /// SataPortMultCap - 0:OFF   1:ON
-  UINT8                 SataClkAutoOff;                 /// SataClkAutoOff - AutoClockOff 0:Disabled, 1:Enabled
-  UINT8                 SataPscCap;                     /// SataPscCap 1:Enable PSC, 0:Disable PSC capability
-  UINT8                 BiosOsHandOff;                  /// BiosOsHandOff - Reserved
-  UINT8                 SataFisBasedSwitching;          /// SataFisBasedSwitching - Reserved
-  UINT8                 SataCccSupport;                 /// SataCccSupport - Reserved
-  UINT8                 SataSscCap;                     /// SataSscCap - 1:Enable, 0:Disable SSC capability
-  UINT8                 SataMsiCapability;              /// SataMsiCapability 0:Hidden 1:Visible
-  UINT8                 SataForceRaid;                  /// SataForceRaid   0:No function 1:Force RAID
-  UINT8                 SataInternal100Spread;          /// SataInternal100Spread - Reserved
-  UINT8                 SataDebugDummy;                 /// SataDebugDummy - Reserved
-  UINT8                 SataTargetSupport8Device;       /// SataTargetSupport8Device - Reserved
-  UINT8                 SataDisableGenericMode;         /// SataDisableGenericMode - Reserved
-  BOOLEAN               SataAhciEnclosureManagement;    /// SataAhciEnclosureManagement - Reserved
-  UINT8                 SataSgpio0;                     /// SataSgpio0 - Reserved
-  UINT8                 SataSgpio1;                     /// SataSgpio1 - Reserved
-  UINT8                 SataPhyPllShutDown;             /// SataPhyPllShutDown - Reserved
-  BOOLEAN               SataHotRemovalEnh;              /// SataHotRemovalEnh - Reserved
-
-  SATA_PORT_ST          SataHotRemovalEnhPort;          ///<  SataHotRemovalEnhPort - Hot Remove
-
-  BOOLEAN               SataOobDetectionEnh;            /// SataOobDetectionEnh - TRUE
-  BOOLEAN               SataPowerSavingEnh;             /// SataPowerSavingEnh - TRUE
-  UINT8                 SataMemoryPowerSaving;          /// SataMemoryPowerSaving - 0-3 Default [3]
-  BOOLEAN               SataRasSupport;                 /// SataRasSupport - Support RAS function TRUE: Enable FALSE: Disable
-  BOOLEAN               SataAhciDisPrefetchFunction;    /// SataAhciDisPrefetchFunction - Disable AHCI Prefetch Function Support
-  BOOLEAN               SataDevSlpPort0;                /// SataDevSlpPort0 - Reserved
-  BOOLEAN               SataDevSlpPort1;                /// SataDevSlpPort1 - Reserved
-//  UINT8                 SataDevSlpPort0S5Pin;           /// SataDevSlpPort0S5Pin - Reserved
-//  UINT8                 SataDevSlpPort1S5Pin;           /// SataDevSlpPort1S5Pin - Reserved
-  UINT8                 SataDbgTX_DRV_STR ;           /// TX_DRV_STR - Reserved
-  UINT8                 SataDbgTX_DE_EMPH_STR ;           /// TX_DE_EMPH_STR - Reserved
-  UINT32                TempMmio;                       /// TempMmio - Reserved
-} FCH_SATA;
-
-
-//
-// IMC Message Register Software Interface
-//
-#define CPU_MISC_BUS_DEV_FUN          ((0x18 << 3) + 3)
-
-#define MSG_SYS_TO_IMC                0x80
-#define Fun_80                        0x80
-#define Fun_81                        0x81
-#define Fun_82                        0x82
-#define Fun_83                        0x83
-#define Fun_84                        0x84
-#define Fun_85                        0x85
-#define Fun_86                        0x86
-#define Fun_87                        0x87
-#define Fun_88                        0x88
-#define Fun_89                        0x89
-#define Fun_90                        0x90
-#define MSG_IMC_TO_SYS                0x81
-#define MSG_REG0                      0x82
-#define MSG_REG1                      0x83
-#define MSG_REG2                      0x84
-#define MSG_REG3                      0x85
-#define MSG_REG4                      0x86
-#define MSG_REG5                      0x87
-#define MSG_REG6                      0x88
-#define MSG_REG7                      0x89
-#define MSG_REG8                      0x8A
-#define MSG_REG9                      0x8B
-#define MSG_REGA                      0x8C
-#define MSG_REGB                      0x8D
-#define MSG_REGC                      0x8E
-#define MSG_REGD                      0x8F
-
-#define DISABLED                      0
-#define ENABLED                       1
-
-
-
-///
-/// EC structure
-///
-typedef struct _FCH_EC {
-  UINT8                 MsgFun81Zone0MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun81Zone0MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun81Zone0MsgReg2;           ///<Thermal zone control byte 1
-  UINT8                 MsgFun81Zone0MsgReg3;           ///<Thermal zone control byte 2
-  UINT8                 MsgFun81Zone0MsgReg4;           ///<Bit[3:0] - Thermal diode offset adjustment in degrees Celsius.
-  UINT8                 MsgFun81Zone0MsgReg5;           ///<Hysteresis information
-  UINT8                 MsgFun81Zone0MsgReg6;           ///<SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032
-  UINT8                 MsgFun81Zone0MsgReg7;           ///<Bit[1:0]: 0 - 2,  SMBUS bus number where the SMBUS based temperature sensor is located.
-  UINT8                 MsgFun81Zone0MsgReg8;           ///<Fan PWM stepping rate in unit of PWM level percentage
-  UINT8                 MsgFun81Zone0MsgReg9;           ///<Fan PWM ramping rate in 5ms unit
-//
-// EC LDN9 function 81 zone 1
-//
-  UINT8                 MsgFun81Zone1MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun81Zone1MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun81Zone1MsgReg2;           ///<Thermal zone control byte 1
-  UINT8                 MsgFun81Zone1MsgReg3;           ///<Thermal zone control byte 2
-  UINT8                 MsgFun81Zone1MsgReg4;           ///<Bit[3:0] - Thermal diode offset adjustment in degrees Celsius.
-  UINT8                 MsgFun81Zone1MsgReg5;           ///<Hysteresis information
-  UINT8                 MsgFun81Zone1MsgReg6;           ///<SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032
-  UINT8                 MsgFun81Zone1MsgReg7;           ///<Bit[1:0]: 0 - 2,  SMBUS bus number where the SMBUS based temperature sensor is located.
-  UINT8                 MsgFun81Zone1MsgReg8;           ///<Fan PWM stepping rate in unit of PWM level percentage
-  UINT8                 MsgFun81Zone1MsgReg9;           ///<Fan PWM ramping rate in 5ms unit
-//
-//EC LDN9 function 81 zone 2
-//
-  UINT8                 MsgFun81Zone2MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun81Zone2MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun81Zone2MsgReg2;           ///<Thermal zone control byte 1
-  UINT8                 MsgFun81Zone2MsgReg3;           ///<Thermal zone control byte 2
-  UINT8                 MsgFun81Zone2MsgReg4;           ///<Bit[3:0] - Thermal diode offset adjustment in degrees Celsius.
-  UINT8                 MsgFun81Zone2MsgReg5;           ///<Hysteresis information
-  UINT8                 MsgFun81Zone2MsgReg6;           ///<SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032
-  UINT8                 MsgFun81Zone2MsgReg7;           ///<Bit[1:0]: 0 - 2,  SMBUS bus number where the SMBUS based temperature sensor is located.
-  UINT8                 MsgFun81Zone2MsgReg8;           ///<Fan PWM stepping rate in unit of PWM level percentage
-  UINT8                 MsgFun81Zone2MsgReg9;           ///<Fan PWM ramping rate in 5ms unit
-//
-//EC LDN9 function 81 zone 3
-//
-  UINT8                 MsgFun81Zone3MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun81Zone3MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun81Zone3MsgReg2;           ///<Thermal zone control byte 1
-  UINT8                 MsgFun81Zone3MsgReg3;           ///<Thermal zone control byte 2
-  UINT8                 MsgFun81Zone3MsgReg4;           ///<Bit[3:0] - Thermal diode offset adjustment in degrees Celsius.
-  UINT8                 MsgFun81Zone3MsgReg5;           ///<Hysteresis information
-  UINT8                 MsgFun81Zone3MsgReg6;           ///<SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032
-  UINT8                 MsgFun81Zone3MsgReg7;           ///<Bit[1:0]: 0 - 2,  SMBUS bus number where the SMBUS based temperature sensor is located.
-  UINT8                 MsgFun81Zone3MsgReg8;           ///<Fan PWM stepping rate in unit of PWM level percentage
-  UINT8                 MsgFun81Zone3MsgReg9;           ///<Fan PWM ramping rate in 5ms unit
-//
-//EC LDN9 function 83 zone 0
-//
-  UINT8                 MsgFun83Zone0MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun83Zone0MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun83Zone0MsgReg2;           ///<_AC0
-  UINT8                 MsgFun83Zone0MsgReg3;           ///<_AC1
-  UINT8                 MsgFun83Zone0MsgReg4;           ///<_AC2
-  UINT8                 MsgFun83Zone0MsgReg5;           ///<_AC3
-  UINT8                 MsgFun83Zone0MsgReg6;           ///<_AC4
-  UINT8                 MsgFun83Zone0MsgReg7;           ///<_AC5
-  UINT8                 MsgFun83Zone0MsgReg8;           ///<_AC6
-  UINT8                 MsgFun83Zone0MsgReg9;           ///<_AC7
-  UINT8                 MsgFun83Zone0MsgRegA;           ///<_CRT
-  UINT8                 MsgFun83Zone0MsgRegB;           ///<_PSV
-//
-//EC LDN9 function 83 zone 1
-//
-  UINT8                 MsgFun83Zone1MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun83Zone1MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun83Zone1MsgReg2;           ///<_AC0
-  UINT8                 MsgFun83Zone1MsgReg3;           ///<_AC1
-  UINT8                 MsgFun83Zone1MsgReg4;           ///<_AC2
-  UINT8                 MsgFun83Zone1MsgReg5;           ///<_AC3
-  UINT8                 MsgFun83Zone1MsgReg6;           ///<_AC4
-  UINT8                 MsgFun83Zone1MsgReg7;           ///<_AC5
-  UINT8                 MsgFun83Zone1MsgReg8;           ///<_AC6
-  UINT8                 MsgFun83Zone1MsgReg9;           ///<_AC7
-  UINT8                 MsgFun83Zone1MsgRegA;           ///<_CRT
-  UINT8                 MsgFun83Zone1MsgRegB;           ///<_PSV
-//
-//EC LDN9 function 83 zone 2
-//
-  UINT8                 MsgFun83Zone2MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun83Zone2MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun83Zone2MsgReg2;           ///<_AC0
-  UINT8                 MsgFun83Zone2MsgReg3;           ///<_AC1
-  UINT8                 MsgFun83Zone2MsgReg4;           ///<_AC2
-  UINT8                 MsgFun83Zone2MsgReg5;           ///<_AC3
-  UINT8                 MsgFun83Zone2MsgReg6;           ///<_AC4
-  UINT8                 MsgFun83Zone2MsgReg7;           ///<_AC5
-  UINT8                 MsgFun83Zone2MsgReg8;           ///<_AC6
-  UINT8                 MsgFun83Zone2MsgReg9;           ///<_AC7
-  UINT8                 MsgFun83Zone2MsgRegA;           ///<_CRT
-  UINT8                 MsgFun83Zone2MsgRegB;           ///<_PSV
-//
-//EC LDN9 function 83 zone 3
-//
-  UINT8                 MsgFun83Zone3MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun83Zone3MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun83Zone3MsgReg2;           ///<_AC0
-  UINT8                 MsgFun83Zone3MsgReg3;           ///<_AC1
-  UINT8                 MsgFun83Zone3MsgReg4;           ///<_AC2
-  UINT8                 MsgFun83Zone3MsgReg5;           ///<_AC3
-  UINT8                 MsgFun83Zone3MsgReg6;           ///<_AC4
-  UINT8                 MsgFun83Zone3MsgReg7;           ///<_AC5
-  UINT8                 MsgFun83Zone3MsgReg8;           ///<_AC6
-  UINT8                 MsgFun83Zone3MsgReg9;           ///<_AC7
-  UINT8                 MsgFun83Zone3MsgRegA;           ///<_CRT
-  UINT8                 MsgFun83Zone3MsgRegB;           ///<_PSV
-//
-//EC LDN9 function 85 zone 0
-//
-  UINT8                 MsgFun85Zone0MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun85Zone0MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun85Zone0MsgReg2;           ///<AL0 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg3;           ///<AL1 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg4;           ///<AL2 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg5;           ///<AL3 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg6;           ///<AL4 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg7;           ///<AL5 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg8;           ///<AL6 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg9;           ///<AL7 PWM level in percentage (0 - 100%)
-//
-//EC LDN9 function 85 zone 1
-//
-  UINT8                 MsgFun85Zone1MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun85Zone1MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun85Zone1MsgReg2;           ///<AL0 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg3;           ///<AL1 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg4;           ///<AL2 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg5;           ///<AL3 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg6;           ///<AL4 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg7;           ///<AL5 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg8;           ///<AL6 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg9;           ///<AL7 PWM level in percentage (0 - 100%)
-//
-//EC LDN9 function 85 zone 2
-//
-  UINT8                 MsgFun85Zone2MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun85Zone2MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun85Zone2MsgReg2;           ///<AL0 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg3;           ///<AL1 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg4;           ///<AL2 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg5;           ///<AL3 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg6;           ///<AL4 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg7;           ///<AL5 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg8;           ///<AL6 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg9;           ///<AL7 PWM level in percentage (0 - 100%)
-//
-//EC LDN9 function 85 zone 3
-//
-  UINT8                 MsgFun85Zone3MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun85Zone3MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun85Zone3MsgReg2;           ///<AL0 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg3;           ///<AL1 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg4;           ///<AL2 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg5;           ///<AL3 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg6;           ///<AL4 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg7;           ///<AL5 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg8;           ///<AL6 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg9;           ///<AL7 PWM level in percentage (0 - 100%)
-//
-//EC LDN9 function 89 TEMPIN channel 0
-//
-  UINT8                 MsgFun89Zone0MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun89Zone0MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun89Zone0MsgReg2;           ///<At DWORD bit 0-7
-  UINT8                 MsgFun89Zone0MsgReg3;           ///<At DWORD bit 15-8
-  UINT8                 MsgFun89Zone0MsgReg4;           ///<At DWORD bit 23-16
-  UINT8                 MsgFun89Zone0MsgReg5;           ///<At DWORD bit 31-24
-  UINT8                 MsgFun89Zone0MsgReg6;           ///<Ct DWORD bit 0-7
-  UINT8                 MsgFun89Zone0MsgReg7;           ///<Ct DWORD bit 15-8
-  UINT8                 MsgFun89Zone0MsgReg8;           ///<Ct DWORD bit 23-16
-  UINT8                 MsgFun89Zone0MsgReg9;           ///<Ct DWORD bit 31-24
-  UINT8                 MsgFun89Zone0MsgRegA;           ///<Mode bit 0-7
-//
-//EC LDN9 function 89 TEMPIN channel 1
-//
-  UINT8                 MsgFun89Zone1MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun89Zone1MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun89Zone1MsgReg2;           ///<At DWORD bit 0-7
-  UINT8                 MsgFun89Zone1MsgReg3;           ///<At DWORD bit 15-8
-  UINT8                 MsgFun89Zone1MsgReg4;           ///<At DWORD bit 23-16
-  UINT8                 MsgFun89Zone1MsgReg5;           ///<At DWORD bit 31-24
-  UINT8                 MsgFun89Zone1MsgReg6;           ///<Ct DWORD bit 0-7
-  UINT8                 MsgFun89Zone1MsgReg7;           ///<Ct DWORD bit 15-8
-  UINT8                 MsgFun89Zone1MsgReg8;           ///<Ct DWORD bit 23-16
-  UINT8                 MsgFun89Zone1MsgReg9;           ///<Ct DWORD bit 31-24
-  UINT8                 MsgFun89Zone1MsgRegA;           ///<Mode bit 0-7
-//
-//EC LDN9 function 89 TEMPIN channel 2
-//
-  UINT8                 MsgFun89Zone2MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun89Zone2MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun89Zone2MsgReg2;           ///<At DWORD bit 0-7
-  UINT8                 MsgFun89Zone2MsgReg3;           ///<At DWORD bit 15-8
-  UINT8                 MsgFun89Zone2MsgReg4;           ///<At DWORD bit 23-16
-  UINT8                 MsgFun89Zone2MsgReg5;           ///<At DWORD bit 31-24
-  UINT8                 MsgFun89Zone2MsgReg6;           ///<Ct DWORD bit 0-7
-  UINT8                 MsgFun89Zone2MsgReg7;           ///<Ct DWORD bit 15-8
-  UINT8                 MsgFun89Zone2MsgReg8;           ///<Ct DWORD bit 23-16
-  UINT8                 MsgFun89Zone2MsgReg9;           ///<Ct DWORD bit 31-24
-  UINT8                 MsgFun89Zone2MsgRegA;           ///<Mode bit 0-7
-//
-//EC LDN9 function 89 TEMPIN channel 3
-//
-  UINT8                 MsgFun89Zone3MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun89Zone3MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun89Zone3MsgReg2;           ///<At DWORD bit 0-7
-  UINT8                 MsgFun89Zone3MsgReg3;           ///<At DWORD bit 15-8
-  UINT8                 MsgFun89Zone3MsgReg4;           ///<At DWORD bit 23-16
-  UINT8                 MsgFun89Zone3MsgReg5;           ///<At DWORD bit 31-24
-  UINT8                 MsgFun89Zone3MsgReg6;           ///<Ct DWORD bit 0-7
-  UINT8                 MsgFun89Zone3MsgReg7;           ///<Ct DWORD bit 15-8
-  UINT8                 MsgFun89Zone3MsgReg8;           ///<Ct DWORD bit 23-16
-  UINT8                 MsgFun89Zone3MsgReg9;           ///<Ct DWORD bit 31-24
-  UINT8                 MsgFun89Zone3MsgRegA;           ///<Mode bit 0-7
-//
-// FLAG for Fun83/85/89 support
-//
-  UINT16                IMCFUNSupportBitMap;            ///< Bit0=81FunZone0 support(1=On;0=Off); bit1-3=81FunZone1-Zone3;Bit4-7=83FunZone0-Zone3;Bit8-11=85FunZone0-Zone3;Bit11-15=89FunZone0-Zone3;
-} FCH_EC;
-
-///
-/// IMC structure
-///
-typedef struct _FCH_IMC {
-  UINT8                 ImcEnable;                      ///< ImcEnable - IMC Enable
-  UINT8                 ImcEnabled;                     ///< ImcEnabled - IMC Enable
-  UINT8                 ImcSureBootTimer;               ///< ImcSureBootTimer - IMc SureBootTimer function
-  FCH_EC                EcStruct;                       ///< EC structure
-  UINT8                 ImcEnableOverWrite;             ///< OverWrite IMC with the EC structure
-                                                        ///   @li <b>00</b> - by default strapping
-                                                        ///   @li <b>01</b> - enable
-                                                        ///   @li <b>10</b> - disable
-                                                        ///
-} FCH_IMC;
-
-
-///
-/// Hpet structure
-///
-typedef struct {
-  BOOLEAN               HpetEnable;                     ///< HPET function switch
-
-  BOOLEAN               HpetMsiDis;                     ///< HpetMsiDis - South Bridge HPET MSI Configuration
-                                                        ///   @par
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT32                HpetBase;                       ///< HpetBase
-                                                        ///   @par
-                                                        ///  HPET Base address
-} FCH_HPET;
-
-
-///
-/// GCPU related parameters
-///
-typedef struct {
-  UINT8                 AcDcMsg;                        ///< Send a message to CPU to indicate the power mode (AC vs battery)
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 TimerTickTrack;                 ///< Send a message to CPU to indicate the latest periodic timer interval
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 ClockInterruptTag;              ///< Mark the periodic timer interrupt
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 OhciTrafficHanding;             ///< Cause CPU to break out from C state when USB OHCI has pending traffic
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 EhciTrafficHanding;             ///< Cause CPU to break out from C state when USB EHCI has pending traffic
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 GcpuMsgCMultiCore;              ///< Track of CPU C state by monitoring each core's C state message
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 GcpuMsgCStage;                  ///< Enable the FCH C state coordination logic
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-} FCH_GCPU;
-
-
-///
-/// Timer
-///
-typedef struct {
-  BOOLEAN               Enable;                         ///< Whether to register timer SMI in POST
-  BOOLEAN               StartNow;                       ///< Whether to start the SMI immediately during registration
-  UINT16                CycleDuration;                  ///< [14:0] - Actual cycle duration = CycleDuration + 1
-} TIMER_SMI;
-
-///
-/// CS support
-///
-typedef struct {
-  BOOLEAN               FchCsD3Cold;                    ///< FCH Cs D3 Cold function
-  BOOLEAN               FchCsHwReduced;                 ///< FCH Cs hardware reduced ACPI flag
-  BOOLEAN               FchCsPwrBtn;                    ///< FCH Cs Power Button function
-  BOOLEAN               FchCsAcDc;                      ///< FCH Cs AcDc function
-  BOOLEAN               AsfNfcEnable;                   ///< FCH Cs NFC function
-  UINT8                 AsfNfcInterruptPin;             ///<    NFC Interrupt pin define
-  UINT8                 AsfNfcRegPuPin;                 ///<    NFC RegPu pin define
-  UINT8                 AsfNfcWakePin;                  ///<    NFC Wake Pin define
-  UINT8                 PowerButtonGpe;                 ///<    GPE# used by Power Button device
-  UINT8                 AcDcTimerGpe;                   ///<    GPE# used by Timer device
-} FCH_CS;
-
-
-///
-/// MISC structure
-///
-typedef struct {
-  BOOLEAN               NativePcieSupport;              /// PCIe NativePcieSupport - Debug function. 1:Enabled, 0:Disabled
-  BOOLEAN               S3Resume;                       /// S3Resume - Flag of ACPI S3 Resume.
-  BOOLEAN               RebootRequired;                 /// RebootRequired - Flag of Reboot system is required.
-  UINT8                 FchVariant;                     /// FchVariant - FCH Variant value.
-  UINT8                 Cg2Pll;                         ///< CG2 PLL - 0:disable, 1:enable
-  TIMER_SMI             LongTimer;                      ///< Long Timer SMI
-  TIMER_SMI             ShortTimer;                     ///< Short Timer SMI
-  UINT32                FchCpuId;                       ///< Saving CpuId for FCH Module.
-  BOOLEAN               NoneSioKbcSupport;              ///< NoneSioKbcSupport - No KBC/SIO controller ( Turn on Inchip KBC emulation function )
-  FCH_CS                FchCsSupport;                   ///< FCH Cs function structure
-} FCH_MISC;
-
-
-///
-/// SMBus structure
-///
-typedef struct {
-  UINT32                SmbusSsid;                      ///< SMBUS controller Subsystem ID
-} FCH_SMBUS;
-
-
-///
-/// Acpi structure
-///
-typedef struct {
-  UINT16                Smbus0BaseAddress;              ///< Smbus0BaseAddress
-                                                        ///   @par
-                                                        ///  Smbus BASE Address
-                                                        ///
-  UINT16                Smbus1BaseAddress;              ///< Smbus1BaseAddress
-                                                        ///   @par
-                                                        ///  Smbus1 (ASF) BASE Address
-                                                        ///
-  UINT16                SioPmeBaseAddress;              ///< SioPmeBaseAddress
-                                                        ///   @par
-                                                        ///  SIO PME BASE Address
-                                                        ///
-  UINT32                WatchDogTimerBase;              ///< WatchDogTimerBase
-                                                        ///   @par
-                                                        ///  Watch Dog Timer Address
-                                                        ///
-  UINT16                AcpiPm1EvtBlkAddr;              ///< AcpiPm1EvtBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI PM1 event block Address
-                                                        ///
-  UINT16                AcpiPm1CntBlkAddr;              ///< AcpiPm1CntBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI PM1 Control block Address
-                                                        ///
-  UINT16                AcpiPmTmrBlkAddr;               ///< AcpiPmTmrBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI PM timer block Address
-                                                        ///
-  UINT16                CpuControlBlkAddr;              ///< CpuControlBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI CPU control block Address
-                                                        ///
-  UINT16                AcpiGpe0BlkAddr;                ///< AcpiGpe0BlkAddr
-                                                        ///   @par
-                                                        ///  ACPI GPE0 block Address
-                                                        ///
-  UINT16                SmiCmdPortAddr;                 ///< SmiCmdPortAddr
-                                                        ///   @par
-                                                        ///  SMI command port Address
-                                                        ///
-  UINT16                AcpiPmaCntBlkAddr;              ///< AcpiPmaCntBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI PMA Control block Address
-                                                        ///
-  BOOLEAN               AnyHt200MhzLink;                ///< AnyHt200MhzLink
-                                                        ///   @par
-                                                        ///  HT Link Speed on 200MHz option for each CPU specific LDTSTP# (Force enable)
-                                                        ///
-  BOOLEAN               SpreadSpectrum;                 ///< SpreadSpectrum
-                                                        ///  @par
-                                                        ///  Spread Spectrum function
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  POWER_FAIL            PwrFailShadow;                  ///< PwrFailShadow = PM_Reg: 5Bh [3:0]
-                                                        ///  @par
-                                                        ///   @li  <b>00</b> - Always off
-                                                        ///   @li  <b>01</b> - Always on
-                                                        ///   @li  <b>11</b> - Use previous
-                                                        ///
-  UINT8                 StressResetMode;                ///< StressResetMode 01-10
-                                                        ///   @li  <b>00</b> - Disabed
-                                                        ///   @li  <b>01</b> - Io Write 0x64 with 0xfe
-                                                        ///   @li  <b>10</b> - Io Write 0xcf9 with 0x06
-                                                        ///   @li  <b>11</b> - Io Write 0xcf9 with 0x0e
-                                                        ///
-  BOOLEAN               MtC1eEnable;                    /// MtC1eEnable - Enable MtC1e
-  VOID*                 OemProgrammingTablePtr;         /// Pointer of ACPI OEM table
-  UINT8                 SpreadSpectrumOptions;          /// SpreadSpectrumOptions - Spread Spectrum Option
-  BOOLEAN               PwrDownDisp2ClkPcieR;           /// Power down DISP2_CLK and PCIE_RCLK_Output for power savings
-} FCH_ACPI;
-
-
-///
-/// HWM temp parameter structure
-///
-typedef struct _FCH_HWM_TEMP_PAR {
-  UINT16                At;                             ///< At
-  UINT16                Ct;                             ///< Ct
-  UINT8                 Mode;                           ///< Mode BIT0:HiRatio BIT1:HiCurrent
-} FCH_HWM_TEMP_PAR;
-
-///
-/// HWM Current structure
-///
-typedef struct _FCH_HWM_CUR {
-  UINT16                FanSpeed[5];                    ///< FanSpeed    - fan Speed
-  UINT16                Temperature[5];                 ///< Temperature - temperature
-  UINT16                Voltage[8];                     ///< Voltage     - voltage
-} FCH_HWM_CUR;
-
-///
-/// HWM fan control structure
-///
-typedef struct _FCH_HWM_FAN_CTR {
-  UINT8                 InputControlReg00;              /// Fan Input Control register, PM2 offset [0:4]0
-  UINT8                 ControlReg01;                   /// Fan control register, PM2 offset [0:4]1
-  UINT8                 FreqReg02;                      /// Fan frequency register, PM2 offset [0:4]2
-  UINT8                 LowDutyReg03;                   /// Low Duty register, PM2 offset [0:4]3
-  UINT8                 MedDutyReg04;                   /// Med Duty register, PM2 offset [0:4]4
-  UINT8                 MultiplierReg05;                /// Multiplier register, PM2 offset [0:4]5
-  UINT16                LowTempReg06;                   /// Low Temp register, PM2 offset [0:4]6
-  UINT16                MedTempReg08;                   /// Med Temp register, PM2 offset [0:4]8
-  UINT16                HighTempReg0A;                  /// High Temp register, PM2 offset [0:4]A
-  UINT8                 LinearRangeReg0C;               /// Linear Range register, PM2 offset [0:4]C
-  UINT8                 LinearHoldCountReg0D;           /// Linear Hold Count register, PM2 offset [0:4]D
-} FCH_HWM_FAN_CTR;
-
-///
-/// Hwm structure
-///
-typedef struct _FCH_HWM {
-  UINT8                 HwMonitorEnable;                ///< HwMonitorEnable
-  UINT32                HwmControl;                     ///< hwmControl
-                                                        ///   @par
-                                                        ///  HWM control configuration
-                                                        ///   @li <b>0</b> - HWM is Enabled
-                                                        ///   @li <b>1</b> - IMC is Enabled
-                                                        ///
-  UINT8                 FanSampleFreqDiv;               ///< Sampling rate of Fan Speed
-                                                        ///   @li <b>00</b> - Base(22.5KHz)
-                                                        ///   @li <b>01</b> - Base(22.5KHz)/2
-                                                        ///   @li <b>10</b> - Base(22.5KHz)/4
-                                                        ///   @li <b>11</b> - Base(22.5KHz)/8
-                                                        ///
-  UINT8                 HwmFchtsiAutoPoll;              ///< TSI Auto Polling
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  UINT8                 HwmFchtsiAutoPollStarted;       ///< HwmSbtsiAutoPollStarted
-  UINT8                 FanLinearEnhanceEn;             ///< FanLinearEnhanceEn
-  UINT8                 FanLinearHoldFix;               ///< FanLinearHoldFix
-  UINT8                 FanLinearRangeOutLimit;         ///< FanLinearRangeOutLimit
-  UINT16                HwmCalibrationFactor;           /// Calibration Factor
-  FCH_HWM_CUR           HwmCurrent;                     /// HWM Current structure
-  FCH_HWM_CUR           HwmCurrentRaw;                  /// HWM Current Raw structure
-  FCH_HWM_TEMP_PAR      HwmTempPar[5];                  /// HWM Temp parameter structure
-  FCH_HWM_FAN_CTR       HwmFanControl[5];               /// HWM Fan Control structure
-  FCH_HWM_FAN_CTR       HwmFanControlCooked[5];               /// HWM Fan Control structure
-} FCH_HWM;
-
-
-///
-/// Gec structure
-///
-typedef struct {
-  BOOLEAN               GecEnable;                      ///< GecEnable - GEC function switch
-  UINT8                 GecPhyStatus;                   /// GEC PHY Status
-  UINT8                 GecPowerPolicy;                 /// GEC Power Policy
-                                                        ///   @li <b>00</b> - GEC is powered down in S3 and S5
-                                                        ///   @li <b>01</b> - GEC is powered down only in S5
-                                                        ///   @li <b>10</b> - GEC is powered down only in S3
-                                                        ///   @li <b>11</b> - GEC is never powered down
-                                                        ///
-  UINT8                 GecDebugBus;                    /// GEC Debug Bus
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  UINT32                GecShadowRomBase;               ///< GecShadowRomBase
-                                                        ///   @par
-                                                        ///  GEC (NIC) SHADOWROM BASE Address
-                                                        ///
-  VOID                  *PtrDynamicGecRomAddress;       /// Pointer of Dynamic GEC ROM Address
-} FCH_GEC;
-
-
-///
-/// _ABTblEntry - AB link register table R/W structure
-///
-typedef struct _AB_TBL_ENTRY {
-  UINT8                 RegType;                        /// RegType  : AB Register Type (ABCFG, AXCFG and so on)
-  UINT32                RegIndex;                       /// RegIndex : AB Register Index
-  UINT32                RegMask;                        /// RegMask  : AB Register Mask
-  UINT32                RegData;                        /// RegData  : AB Register Data
-} AB_TBL_ENTRY;
-
-///
-/// AB structure
-///
-typedef struct {
-  BOOLEAN               AbMsiEnable;                    ///< ABlink MSI capability
-  UINT8                 ALinkClkGateOff;                /// Alink Clock Gate-Off function - 0:disable, 1:enable *KR
-  UINT8                 BLinkClkGateOff;                /// Blink Clock Gate-Off function - 0:disable, 1:enable *KR
-  UINT8                 GppClockRequest0;               /// GPP Clock Request.
-  UINT8                 GppClockRequest1;               /// GPP Clock Request.
-  UINT8                 GppClockRequest2;               /// GPP Clock Request.
-  UINT8                 GppClockRequest3;               /// GPP Clock Request.
-  UINT8                 GfxClockRequest;                /// GPP Clock Request.
-  UINT8                 AbClockGating;                  /// AB Clock Gating - 0:disable, 1:enable *KR *CZ
-  UINT8                 GppClockGating;                 /// GPP Clock Gating - 0:disable, 1:enable
-  UINT8                 UmiL1TimerOverride;             /// UMI L1 inactivity timer overwrite value
-  UINT8                 UmiLinkWidth;                   /// UMI Link Width
-  UINT8                 UmiDynamicSpeedChange;          /// UMI Dynamic Speed Change - 0:disable, 1:enable
-  UINT8                 PcieRefClockOverClocking;       /// PCIe Ref Clock OverClocking value
-  UINT8                 UmiGppTxDriverStrength;         /// UMI GPP TX Driver Strength
-  BOOLEAN               NbSbGen2;                       /// UMI link Gen2 - 0:Gen1, 1:Gen2
-  UINT8                 PcieOrderRule;                  /// PCIe Order Rule - 0:disable, 1:enable *KR AB Posted Pass Non-Posted
-  UINT8                 SlowSpeedAbLinkClock;           /// Slow Speed AB Link Clock - 0:disable, 1:enable *KR
-  BOOLEAN               ResetCpuOnSyncFlood;            /// Reset Cpu On Sync Flood - 0:disable, 1:enable *KR
-  BOOLEAN               AbDmaMemoryWrtie3264B;          /// AB DMA Memory Write 32/64 BYTE Support *KR only
-  BOOLEAN               AbMemoryPowerSaving;            /// AB Memory Power Saving *KR *CZ
-  BOOLEAN               SbgDmaMemoryWrtie3264ByteCount; /// SBG DMA Memory Write 32/64 BYTE Count Support *KR only
-  BOOLEAN               SbgMemoryPowerSaving;           /// SBG Memory Power Saving *KR *CZ
-  BOOLEAN               SbgClockGating;                 /// SBG Clock Gate *CZ
-  BOOLEAN               XdmaDmaWrite16ByteMode;         /// XDMA DMA Write 16 byte mode *CZ
-  BOOLEAN               XdmaMemoryPowerSaving;          /// XDMA memory power saving *CZ
-  UINT8                 XdmaPendingNprThreshold;        /// XDMA PENDING NPR THRESHOLD *CZ
-  BOOLEAN               XdmaDncplOrderDis;              /// XDMA DNCPL ORDER DIS *CZ
-} FCH_AB;
-
-
-/**
- * PCIE_CAP_ID - PCIe Cap ID
- *
- */
-#define  PCIE_CAP_ID    0x10
-
-///
-/// FCH_GPP_PORT_CONFIG - Fch GPP port config structure
-///
-typedef struct {
-  BOOLEAN               PortPresent;                    ///< Port connection
-                                                        ///  @par
-                                                        ///  @li <b>0</b> - Port doesn't have slot. No need to train the link
-                                                        ///  @li <b>1</b> - Port connection defined and needs to be trained
-                                                        ///
-  BOOLEAN               PortDetected;                   ///< Link training status
-                                                        ///  @par
-                                                        ///  @li <b>0</b> - EP not detected
-                                                        ///  @li <b>1</b> - EP detected
-                                                        ///
-  BOOLEAN               PortIsGen2;                     ///< Port link speed configuration
-                                                        ///  @par
-                                                        ///  @li <b>00</b> - Auto
-                                                        ///  @li <b>01</b> - Forced GEN1
-                                                        ///  @li <b>10</b> - Forced GEN2
-                                                        ///  @li <b>11</b> - Reserved
-                                                        ///
-  BOOLEAN               PortHotPlug;                    ///< Support hot plug?
-                                                        ///  @par
-                                                        ///  @li <b>0</b> - No support
-                                                        ///  @li <b>1</b> - support
-                                                        ///
-  UINT8                 PortMisc;                       ///  PortMisc - Reserved
-} FCH_GPP_PORT_CONFIG;
-
-///
-/// GPP structure
-///
-typedef struct {
-  FCH_GPP_PORT_CONFIG   PortCfg[4];                     /// GPP port configuration structure
-  GPP_LINKMODE          GppLinkConfig;                  ///< GppLinkConfig - PCIE_GPP_Enable[3:0]
-                                                        ///  @li  <b>0000</b> - Port ABCD -> 4:0:0:0
-                                                        ///  @li  <b>0010</b> - Port ABCD -> 2:2:0:0
-                                                        ///  @li  <b>0011</b> - Port ABCD -> 2:1:1:0
-                                                        ///  @li  <b>0100</b> - Port ABCD -> 1:1:1:1
-                                                        ///
-  BOOLEAN               GppFunctionEnable;              ///< GPP Function - 0:disable, 1:enable
-  BOOLEAN               GppToggleReset;                 ///< Toggle GPP core reset
-  UINT8                 GppHotPlugGeventNum;            ///< Hotplug GEVENT # - valid value 0-31
-  UINT8                 GppFoundGfxDev;                 ///< Gpp Found Gfx Device
-                                                        ///  @li   <b>0</b> - Not found
-                                                        ///  @li   <b>1</b> - Found
-                                                        ///
-  BOOLEAN               GppGen2;                        ///< GPP Gen2 - 0:disable, 1:enable
-  UINT8                 GppGen2Strap;                   ///< GPP Gen2 Strap - 0:disable, 1:enable, FCH itself uses this
-  BOOLEAN               GppMemWrImprove;                ///< GPP Memory Write Improve - 0:disable, 1:enable
-  BOOLEAN               GppUnhidePorts;                 ///< GPP Unhide Ports - 0:disable, 1:enable
-  UINT8                 GppPortAspm;                    ///< GppPortAspm - ASPM state for all GPP ports
-                                                        ///  @li   <b>01</b> - Disabled
-                                                        ///  @li   <b>01</b> - L0s
-                                                        ///  @li   <b>10</b> - L1
-                                                        ///  @li   <b>11</b> - L0s + L1
-                                                        ///
-  BOOLEAN               GppLaneReversal;                ///< GPP Lane Reversal - 0:disable, 1:enable
-  BOOLEAN               GppPhyPllPowerDown;             ///< GPP PHY PLL Power Down - 0:disable, 1:enable
-  BOOLEAN               GppDynamicPowerSaving;          ///< GPP Dynamic Power Saving - 0:disable, 1:enable
-  BOOLEAN               PcieAer;                        ///< PcieAer - Advanced Error Report: 0/1-disable/enable
-  BOOLEAN               PcieRas;                        ///< PCIe RAS - 0:disable, 1:enable
-  BOOLEAN               PcieCompliance;                 ///< PCIe Compliance - 0:disable, 1:enable
-  BOOLEAN               PcieSoftwareDownGrade;          ///< PCIe Software Down Grade
-  BOOLEAN               UmiPhyPllPowerDown;             ///< UMI PHY PLL Power Down - 0:disable, 1:enable
-  BOOLEAN               SerialDebugBusEnable;           ///< Serial Debug Bus Enable
-  UINT8                 GppHardwareDownGrade;           ///< GppHardwareDownGrade - Gpp HW Down Grade function 0:Disable, 1-4: portA-D
-  UINT8                 GppL1ImmediateAck;              ///< GppL1ImmediateAck - Gpp L1 Immediate ACK 0: enable, 1: disable
-  BOOLEAN               NewGppAlgorithm;                ///< NewGppAlgorithm - New GPP procedure
-  UINT8                 HotPlugPortsStatus;             ///< HotPlugPortsStatus - Save Hot-Plug Ports Status
-  UINT8                 FailPortsStatus;                ///< FailPortsStatus - Save Failure Ports Status
-  UINT8                 GppPortMinPollingTime;          ///< GppPortMinPollingTime - Min. Polling time for Gpp Port Training
-  BOOLEAN               IsCapsuleMode;                  ///< IsCapsuleMode - Support Capsule Mode in FCH
-} FCH_GPP;
-
-
-///
-/// FCH USB3 Debug Sturcture
-///
-typedef struct {
-  BOOLEAN               ServiceIntervalEnable;      ///< Service Interval Enable
-  BOOLEAN               BandwidthExpandEnable;      ///< Bandwidth Expand Enable
-  BOOLEAN               AoacEnable;                 ///< Aoac Enable
-  BOOLEAN               HwLpmEnable;                ///< HwLpm Enable
-  BOOLEAN               DbcEnable;                  ///< DBC Enable
-  BOOLEAN               MiscPlusEnable;             ///< Misc Plus Enable
-  BOOLEAN               EcoFixEnable;               ///< Eco Fix Enable
-  BOOLEAN               SsifEnable;                 ///< SSIF Enable
-  BOOLEAN               U2ifEnable;                 ///< U2IF Enable
-  BOOLEAN               FseEnable;                  ///< FSE Enable
-  BOOLEAN               XhcPmeEnable;               ///< Xhc Pme Enable
-} USB3_DEBUG;
-
-///
-/// FCH IoMux Sturcture
-///
-typedef struct {
-  UINT8         CbsDbgFchSmbusI2c2Egpio;                          ///< SMBUS/I2C_2/EGPIO_113_114
-  UINT8         CbsDbgFchAsfI2c3Egpio;                            ///< ASF/I2C_3/EGPIO_019_020
-} FCH_IOMUX;
-
-///
-/// FCH USB sturcture
-///
-typedef struct {
-  BOOLEAN               Ohci1Enable;                    ///< OHCI1 controller enable
-  BOOLEAN               Ohci2Enable;                    ///< OHCI2 controller enable
-  BOOLEAN               Ohci3Enable;                    ///< OHCI3 controller enable
-  BOOLEAN               Ohci4Enable;                    ///< OHCI4 controller enable
-  BOOLEAN               Ehci1Enable;                    ///< EHCI1 controller enable
-  BOOLEAN               Ehci2Enable;                    ///< EHCI2 controller enable
-  BOOLEAN               Ehci3Enable;                    ///< EHCI3 controller enable
-  BOOLEAN               Xhci0Enable;                    ///< XHCI0 controller enable
-  BOOLEAN               Xhci1Enable;                    ///< XHCI1 controller enable
-  BOOLEAN               UsbMsiEnable;                   ///< USB MSI capability
-  UINT32                OhciSsid;                       ///< OHCI SSID
-  UINT32                Ohci4Ssid;                      ///< OHCI 4 SSID
-  UINT32                EhciSsid;                       ///< EHCI SSID
-  UINT32                XhciSsid;                       ///< XHCI SSID
-  BOOLEAN               UsbPhyPowerDown;                ///< USB PHY Power Down - 0:disable, 1:enable
-  UINT32                UserDefineXhciRomAddr;          ///< XHCI ROM address define by platform BIOS
-  UINT8                 Ehci1Phy[5];                    ///< EHCI1 USB PHY Driving Strength value table
-  UINT8                 Ehci2Phy[5];                    ///< EHCI2 USB PHY Driving Strength value table
-  UINT8                 Ehci3Phy[4];                    ///< EHCI3 USB PHY Driving Strength value table
-  UINT8                 Xhci20Phy[4];                   ///< XHCI USB 2.0 PHY Driving Strength value table
-  UINT8                 Ehci1DebugPortSel;              ///< DebugPortSel for Ehci1 Hub
-                                                        ///  @li   <b>000</b> - Disable
-                                                        ///  @li   <b>001</b> - HubDownStreamPort0
-                                                        ///  @li   <b>010</b> - HubDownStreamPort1
-                                                        ///  @li   <b>011</b> - HubDownStreamPort2
-                                                        ///  @li   <b>100</b> - HubDownStreamPort3
-  UINT8                 Ehci2DebugPortSel;              ///< DebugPortSel for Ehci2 Hub
-                                                        ///  @li   <b>000</b> - Disable
-                                                        ///  @li   <b>001</b> - HubDownStreamPort0
-                                                        ///  @li   <b>010</b> - HubDownStreamPort1
-                                                        ///  @li   <b>011</b> - HubDownStreamPort2
-                                                        ///  @li   <b>100</b> - HubDownStreamPort3
-  UINT8                 Ehci3DebugPortSel;              ///< DebugPortSel for Ehci3 Hub
-                                                        ///  @li   <b>000</b> - Disable
-                                                        ///  @li   <b>001</b> - HubDownStreamPort0
-                                                        ///  @li   <b>010</b> - HubDownStreamPort1
-                                                        ///  @li   <b>011</b> - HubDownStreamPort2
-                                                        ///  @li   <b>100</b> - HubDownStreamPort3
-  UINT8                 Ehci1NPort;                     ///< N_Port for Ehci1, 2 to 4
-  UINT8                 Ehci2NPort;                     ///< N_Port for Ehci2, 2 to 4
-  USB3_DEBUG            Usb3Debug;                      ///< Usb3 Debug Options
-  BOOLEAN               EhciSimpleDebugPort;            ///< Ehci Simple Debug Port
-  BOOLEAN               UsbBatteryChargeEnable;         ///< USB Battery Charge Enable
-  BOOLEAN               ReduceUSB3PortToLastTwo;        ///< Reduce USB3.0 ports to last 2
-  UINT8                 USB30PortInit;                  ///< USB 3.0 Port Init
-} FCH_USB;
-
-
-/// Private: FCH_DATA_BLOCK_RESET
-typedef struct _FCH_RESET_DATA_BLOCK {
-  AMD_CONFIG_PARAMS     *StdHeader;                     ///< Header structure
-  FCH_RESET_INTERFACE   FchReset;                       ///< Reset interface
-
-  UINT8                 FastSpeed;                      ///< SPI FastSpeed: 1-66MHz, 2-33MHz, 3-22MHz, 4-16.5MHz, 5-100Mhz
-  UINT8                 WriteSpeed;                     ///< SPI Write Speed: 1-66MHz, 2-33MHz, 3-22MHz, 4-16.5MHz, 5-100Mhz
-  UINT8                 Mode;                           ///< SPI Mode
-                                                        ///  @li   <b>101</b> - Qual-io 1-4-4
-                                                        ///  @li   <b>100</b> - Dual-io 1-2-2
-                                                        ///  @li   <b>011</b> - Qual-io 1-1-4
-                                                        ///  @li   <b>010</b> - Dual-io 1-1-2
-                                                        ///  @li   <b>111</b> - FastRead
-                                                        ///  @li   <b>110</b> - Normal
-                                                        ///
-  UINT8                 AutoMode;                       ///< SPI Auto Mode - 0:disable, 1:enable
-  UINT8                 BurstWrite;                     ///< SPI Burst Write - 0:disable, 1:enable
-  BOOLEAN               Sata6AhciCap;                   ///< SATA 6 AHCI Capability - TRUE:enable, FALSE:disable
-  UINT8                 Cg2Pll;                         ///< CG2 PLL - 0:disable, 1:enable
-  BOOLEAN               EcKbd;                          ///< EC KBD - 0:disable, 1:enable
-  BOOLEAN               LegacyFree;                     ///< Legacy Free - 0:disable, 1:enable
-  BOOLEAN               SataSetMaxGen2;                 ///< SATA enable maximum GEN2
-  UINT8                 SataClkMode;                    ///< SATA reference clock selector and divider
-  UINT8                 SataModeReg;                    ///< Output: SATAConfig PMIO:0xDA
-  BOOLEAN               SataInternal100Spread;          ///< SATA internal 100MHz spread ON/OFF
-  UINT8                 SpiSpeed;                       ///< SPI NormSpeed: 1-66MHz, 2-33MHz, 3-22MHz, 4-16.5MHz, 5-100Mhz
-//  UINT32                SPI100_RX_Timing_Config_Register_38;                 ///< SPI100_RX_Timing_Config_Register_38
-//  UINT16                SPI100_RX_Timing_Config_Register_3C;                 ///< SPI100_RX_Timing_Config_Register_3C
-//  UINT8                 SpiProtectEn0_1d_34;                  ///
-  UINT8                 SPI100_Enable;                  ///
-  BOOLEAN               EcChannel0;                     ///< Enable EC channel 0
-  FCH_GPP               Gpp;                            ///< GPP subsystem
-  FCH_SPI               Spi;                            ///< SPI subsystem
-  BOOLEAN               QeEnabled;                      /// Quad Mode Enabled
-  BOOLEAN               FchOscout1ClkContinous;         ///< FCH OSCOUT1_CLK Continous
-  UINT8                 LpcClockDriveStrength;          ///< Lpc Clock Drive Strength
-  VOID*                 EarlyOemGpioTable;              /// Pointer of Early OEM GPIO table
-//  VOID*                 OemSpiDeviceTable;              /// Pointer of OEM Spi Device table
-} FCH_RESET_DATA_BLOCK;
-
-
-/// Private: FCH_DATA_BLOCK
-typedef struct _FCH_DATA_BLOCK {
-  AMD_CONFIG_PARAMS     *StdHeader;                     ///< Header structure
-  FCH_RUNTIME           FchRunTime;                     ///< FCH Run Time Parameters
-
-  FCH_ACPI              HwAcpi;                         ///< ACPI structure
-  FCH_AB                Ab;                             ///< AB structure
-  FCH_GPP               Gpp;                            ///< GPP structure
-  FCH_USB               Usb;                            ///< USB structure
-  FCH_SATA              Sata;                           ///< SATA structure
-  FCH_SMBUS             Smbus;                          ///< SMBus structure
-  FCH_IDE               Ide;                            ///< IDE structure
-  FCH_AZALIA            Azalia;                         ///< Azalia structure
-  FCH_SPI               Spi;                            ///< SPI structure
-  FCH_PCIB              Pcib;                           ///< PCIB structure
-  FCH_GEC               Gec;                            ///< GEC structure
-  FCH_SD                Sd;                             ///< SD structure
-  FCH_HWM               Hwm;                            ///< Hardware Moniter structure
-  FCH_IR                Ir;                             ///< IR structure
-  FCH_HPET              Hpet;                           ///< HPET structure
-  FCH_GCPU              Gcpu;                           ///< GCPU structure
-  FCH_IMC               Imc;                            ///< IMC structure
-  FCH_MISC              Misc;                           ///< MISC structure
-  FCH_IOMUX             IoMux;                          ///< MISC structure
-  VOID*                 PostOemGpioTable;              /// Pointer of Post OEM GPIO table
-} FCH_DATA_BLOCK;
-
-#pragma pack (pop)
-
-#endif

pi/amd/00660F01/Proc/Fch/Common/FchDef.h

diff --git a/pi/amd/00660F01/Proc/Fch/Common/FchDef.h b/pi/amd/00660F01/Proc/Fch/Common/FchDef.h
deleted file mode 100644
index d0063a4..0000000
--- a/pi/amd/00660F01/Proc/Fch/Common/FchDef.h
+++ /dev/null
@@ -1,421 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH routine definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _FCH_DEF_H_
-#define _FCH_DEF_H_
-
-
-UINT32        ReadAlink (IN UINT32 Index, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WriteAlink (IN UINT32 Index, IN UINT32 Data, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          RwAlink (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ReadMem (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *ValuePtr);
-VOID          WriteMem (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *ValuePtr);
-VOID          RwMem (IN UINT32 Address, IN UINT8 OpFlag, IN UINT32 Mask, IN UINT32 Data);
-VOID          ReadPci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WritePci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          RwPci (IN UINT32 Address, IN UINT8 OpFlag, IN UINT32 Mask, IN UINT32  Data, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ProgramPciByteTable (IN REG8_MASK* pPciByteTable, IN UINT16 dwTableSize, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ProgramFchAcpiMmioTbl (IN ACPI_REG_WRITE  *pAcpiTbl, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ProgramFchSciMapTbl (IN SCI_MAP_CONTROL  *pSciMapTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock);
-VOID          ProgramFchGpioTbl (IN GPIO_CONTROL  *pGpioTbl);
-VOID          ProgramFchSataPhyTbl (IN SATA_PHY_CONTROL  *pSataPhyTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock);
-VOID          GetChipSysMode (IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-BOOLEAN       IsImcEnabled (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ReadPmio (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WritePmio (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          RwPmio (IN UINT8 Address, IN UINT8 OpFlag, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ReadPmio2 (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WritePmio2 (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          RwPmio2 (IN UINT8 Address, IN UINT8  OpFlag, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ReadBiosram (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WriteBiosram (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          GetFchAcpiMmioBase (OUT UINT32 *AcpiMmioBase, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          GetFchAcpiPmBase (OUT  UINT16 *AcpiPmBase, IN AMD_CONFIG_PARAMS *StdHeader);
-UINT8         ReadFchSleepType (IN AMD_CONFIG_PARAMS *StdHeader);
-UINT8         ReadFchChipsetRevision (IN AMD_CONFIG_PARAMS *StdHeader);
-
-///
-/// Fch Ab Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetAb (IN VOID* FchDataPtr);
-VOID  FchProgramAbPowerOnReset (IN VOID* FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvAb (IN VOID* FchDataPtr);
-VOID  FchInitEnvAbSpecial (IN VOID* FchDataPtr);
-VOID  FchInitMidAb (IN VOID* FchDataPtr);
-VOID  FchInitLateAb (IN VOID* FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID  FchInitEnvAbLinkInit (IN VOID* FchDataPtr);
-BOOLEAN IsUmiOneLaneGen1Mode (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchAbLateProgram (IN VOID* FchDataPtr);
-
-///
-/// Fch Pcie Routines
-///
-///
-///  Dxe Phase
-///
-VOID  ProgramPcieNativeMode (IN VOID* FchDataPtr);
-
-///
-/// Fch Gpp Routines
-///
-
-///
-///  Common Gpp Routines
-///
-VOID  FchGppDynamicPowerSaving (IN FCH_GPP *FchGpp, IN AMD_CONFIG_PARAMS *StdHeader);
-
-///
-/// Fch Azalia Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetAzalia    (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvAzalia      (IN VOID  *FchDataPtr);
-VOID  FchInitMidAzalia      (IN VOID  *FchDataPtr);
-VOID  FchInitLateAzalia     (IN VOID  *FchDataPtr);
-
-
-///
-/// Fch HwAcpi Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetHwAcpiP    (IN VOID  *FchDataPtr);
-VOID  FchInitResetHwAcpi     (IN VOID  *FchDataPtr);
-VOID  ProgramFchHwAcpiResetP (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvHwAcpiP                      (IN VOID  *FchDataPtr);
-VOID  FchInitEnvHwAcpi                       (IN VOID  *FchDataPtr);
-VOID  ProgramEnvPFchAcpiMmio                 (IN VOID *FchDataPtr);
-VOID  ProgramFchEnvHwAcpiPciReg              (IN VOID *FchDataPtr);
-VOID  ProgramSpecificFchInitEnvAcpiMmio      (IN VOID *FchDataPtr);
-VOID  ProgramFchEnvSpreadSpectrum            (IN VOID *FchDataPtr);
-VOID  FchInitMidHwAcpi      (IN VOID  *FchDataPtr);
-VOID  FchInitLateHwAcpi     (IN VOID  *FchDataPtr);
-
-///
-///  Other Public Routines
-///
-VOID HpetInit               (IN VOID  *FchDataPtr);
-VOID MtC1eEnable            (IN VOID  *FchDataPtr);
-VOID GcpuRelatedSetting     (IN VOID  *FchDataPtr);
-VOID StressResetModeLate    (IN VOID  *FchDataPtr);
-
-///
-/// Fch Hwm Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetHwm (IN VOID* FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvHwm (IN VOID* FchDataPtr);
-VOID  FchInitMidHwm (IN VOID* FchDataPtr);
-VOID  FchInitLateHwm (IN VOID* FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID  HwmInitRegister (IN VOID* FchDataPtr);
-VOID  FchECfancontrolservice (IN VOID* FchDataPtr);
-
-
-///
-/// Fch Imc Routines
-///
-///  Pei Phase
-///
-VOID    FchInitResetImc    (IN VOID  *FchDataPtr);
-VOID    FchInitResetEc     (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID    FchInitEnvImc      (IN VOID  *FchDataPtr);
-VOID    FchInitMidImc      (IN VOID  *FchDataPtr);
-VOID    FchInitLateImc     (IN VOID  *FchDataPtr);
-VOID    FchInitEnvEc       (IN VOID  *FchDataPtr);
-VOID    FchInitMidEc       (IN VOID  *FchDataPtr);
-VOID    FchInitLateEc      (IN VOID  *FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID    EnterEcConfig (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    ExitEcConfig (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    ReadEc8    (IN UINT8 Address, IN UINT8* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    WriteEc8   (IN UINT8 Address, IN UINT8* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    RwEc8      (IN UINT8 Address, IN UINT8 AndMask, IN UINT8 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    WriteECmsg (IN UINT8 Address, IN UINT8 OpFlag, IN VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    ReadECmsg  (IN UINT8 Address, IN UINT8 OpFlag, OUT VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    WaitForEcLDN9MailboxCmdAck (IN AMD_CONFIG_PARAMS *StdHeader);
-
-VOID    ImcSleep                   (IN VOID  *FchDataPtr);
-VOID    ImcDisarmSurebootTimer     (IN VOID  *FchDataPtr);
-VOID    ImcDisableSurebootTimer    (IN VOID  *FchDataPtr);
-VOID    ImcWakeup                  (IN VOID  *FchDataPtr);
-VOID    ImcIdle                    (IN VOID  *FchDataPtr);
-BOOLEAN ValidateImcFirmware        (IN VOID  *FchDataPtr);
-VOID    SoftwareToggleImcStrapping (IN VOID  *FchDataPtr);
-VOID    ImcCrashReset              (IN VOID  *FchDataPtr);
-VOID    SoftwareDisableImc         (IN VOID  *FchDataPtr);
-
-
-///
-/// Fch Ir Routines
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvIr (IN VOID* FchDataPtr);
-VOID  FchInitMidIr (IN VOID* FchDataPtr);
-VOID  FchInitLateIr (IN VOID* FchDataPtr);
-
-///
-/// Fch SATA Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetSata          (IN VOID  *FchDataPtr);
-VOID  FchInitResetSataProgram   (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitMidSata                   (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSata                   (IN VOID  *FchDataPtr);
-VOID  FchInitEnvProgramSataPciRegs     (IN VOID  *FchDataPtr);
-VOID  FchInitMidProgramSataRegs        (IN VOID  *FchDataPtr);
-VOID  FchInitLateProgramSataRegs       (IN VOID  *FchDataPtr);
-
-VOID  FchInitLateSata           (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataIde         (IN VOID  *FchDataPtr);
-VOID  FchInitMidSataIde         (IN VOID  *FchDataPtr);
-VOID  FchInitLateSataIde        (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataAhci        (IN VOID  *FchDataPtr);
-VOID  FchInitMidSataAhci        (IN VOID  *FchDataPtr);
-VOID  FchInitLateSataAhci       (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataRaid        (IN VOID  *FchDataPtr);
-VOID  FchInitMidSataRaid        (IN VOID  *FchDataPtr);
-VOID  FchInitLateSataRaid       (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataIde2Ahci    (IN VOID  *FchDataPtr);
-VOID  FchInitMidSataIde2Ahci    (IN VOID  *FchDataPtr);
-VOID  FchInitLateSataIde2Ahci   (IN VOID  *FchDataPtr);
-
-VOID SataAhciSetDeviceNumMsi     (IN VOID  *FchDataPtr);
-VOID SataRaidSetDeviceNumMsi     (IN VOID  *FchDataPtr);
-VOID SataIde2AhciSetDeviceNumMsi (IN VOID  *FchDataPtr);
-VOID  SataSetIrqIntResource (IN VOID  *FchDataPtr, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  SataBar5setting (IN VOID *FchDataPtr, IN UINT32 *Bar5Ptr);
-VOID  SataEnableWriteAccess (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  SataDisableWriteAccess (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  SataSetDeviceNumMsi (IN VOID  *FchDataPtr);
-VOID  FchSataSetDeviceNumMsi (IN VOID  *FchDataPtr);
-VOID  ShutdownUnconnectedSataPortClock (IN VOID *FchDataPtr, IN UINT32 Bar5);
-VOID  FchShutdownUnconnectedSataPortClock (IN VOID *FchDataPtr, IN UINT32 Bar5);
-VOID  SataDriveDetection (IN VOID *FchDataPtr, IN UINT32 *Bar5Ptr);
-VOID  FchSataDriveDetection (IN VOID *FchDataPtr, IN UINT32 *Bar5Ptr);
-VOID  SataBar5RegSet (IN  VOID  *FchDataPtr);
-VOID  SataSetPortGenMode (IN  VOID  *FchDataPtr);
-VOID  FchSataSetPortGenMode (IN  VOID  *FchDataPtr);
-VOID  FchProgramSataPhy (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataRaidProgram  (IN VOID  *FchDataPtr);
-
-///
-/// FCH USB Controller Public Function
-///
-///  Pei Phase
-///
-VOID  FchInitResetUsb            (IN VOID  *FchDataPtr);
-VOID  FchInitResetEhci           (IN VOID  *FchDataPtr);
-VOID  FchInitResetXhci           (IN VOID  *FchDataPtr);
-VOID  FchInitResetXhciProgram    (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvUsb              (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsb              (IN VOID  *FchDataPtr);
-VOID  FchInitLateUsb             (IN VOID  *FchDataPtr);
-VOID  FchInitEnvUsbEhci          (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbEhci          (IN VOID  *FchDataPtr);
-VOID  FchInitLateUsbEhci         (IN VOID  *FchDataPtr);
-VOID  FchEhciDebugPortService    (IN VOID  *FchDataPtr);
-VOID  FchInitEnvUsbXhci          (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbXhci          (IN VOID  *FchDataPtr);
-VOID  FchInitLateUsbXhci         (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbEhci1         (IN FCH_DATA_BLOCK  *FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID  FchSetUsbEnableReg         (IN FCH_DATA_BLOCK *FchDataPtr);
-VOID  FchEhciInitAfterPciInit    (IN UINT32 Value, IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchXhciInitBeforePciInit   (IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchXhciInitIndirectReg     (IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchInitLateUsbXhciProgram  (IN VOID  *FchDataPtr);
-VOID  FchXhciPowerSavingProgram  (IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchXhciUsbPhyCalibrated    (IN FCH_DATA_BLOCK* FchDataPtr);
-UINT8 FchUsbCommonPhyCalibration (IN FCH_DATA_BLOCK* FchDataPtr);
-
-///
-/// Fch Sd Routines
-///
-VOID  FchInitEnvSd  (IN VOID  *FchDataPtr);
-VOID  FchInitMidSd  (IN VOID  *FchDataPtr);
-VOID  FchInitLateSd (IN VOID  *FchDataPtr);
-
-///
-///  Other Public Routines
-///
-
-VOID FchInitEnvSdProgram (IN VOID  *FchDataPtr);
-
-///
-/// Fch Spi Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetSpi        (IN VOID  *FchDataPtr);
-VOID  FchInitResetLpc        (IN VOID  *FchDataPtr);
-VOID  FchInitResetLpcProgram (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvSpi          (IN VOID  *FchDataPtr);
-VOID  FchInitMidSpi          (IN VOID  *FchDataPtr);
-VOID  FchInitLateSpi         (IN VOID  *FchDataPtr);
-VOID  FchInitEnvLpc          (IN VOID  *FchDataPtr);
-VOID  FchInitMidLpc          (IN VOID  *FchDataPtr);
-VOID  FchInitLateLpc         (IN VOID  *FchDataPtr);
-VOID  FchInitEnvLpcProgram   (IN VOID  *FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID  FchSpiUnlock       (IN VOID  *FchDataPtr);
-VOID  FchSpiLock         (IN VOID  *FchDataPtr);
-
-/*--------------------------- Documentation Pages ---------------------------*/
-VOID  FchStall (IN UINT32 uSec, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  CimFchStall (IN UINT32 uSec, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchPciReset (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  OutPort80 (IN UINT32 pcode, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  OutPort1080 (IN UINT32 pcode, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  GetEfuseStatus (IN VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  TurnOffCG2 (OUT VOID);
-VOID  BackUpCG2 (OUT VOID);
-VOID  FchCopyMem (IN VOID* pDest, IN VOID* pSource, IN UINTN Length);
-VOID* GetRomSigPtr (IN UINTN* RomSigPtr, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  RwXhciIndReg (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  RwXhci0IndReg (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  RwXhci1IndReg (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  ReadXhci0Phy (IN UINT32 Port, IN UINT32 Address, IN UINT32 *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  ReadXhci1Phy (IN UINT32 Port, IN UINT32 Address, IN UINT32 *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  AcLossControl (IN UINT8 AcLossControlValue);
-VOID  FchVgaInit (OUT VOID);
-VOID  RecordFchConfigPtr (IN UINT32 FchConfigPtr);
-VOID  ValidateFchVariant (IN VOID  *FchDataPtr);
-VOID  RecordSmiStatus (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  ClearAllSmiStatus (IN AMD_CONFIG_PARAMS *StdHeader);
-BOOLEAN  IsExternalClockMode (IN VOID  *FchDataPtr);
-VOID  SbSleepTrapControl (IN BOOLEAN SleepTrap);
-
-AGESA_STATUS
-FchSpiTransfer (
-  IN       UINT8    PrefixCode,
-  IN       UINT8    Opcode,
-  IN  OUT  UINT8    *DataPtr,
-  IN       UINT8    *AddressPtr,
-  IN       UINT8    Length,
-  IN       BOOLEAN  WriteFlag,
-  IN       BOOLEAN  AddressFlag,
-  IN       BOOLEAN  DataFlag,
-  IN       BOOLEAN  FinishedFlag
-  );
-
-BOOLEAN
-FchConfigureSpiDeviceDummyCycle (
-  IN       UINT32     DeviceID,
-  IN       UINT8      SpiMode
-  );
-
-UINT32
-FchReadSpiId (
-  IN       BOOLEAN    Flag
-  );
-
-BOOLEAN
-FchPlatformSpiQe (
-  IN       VOID     *FchDataPtr
-  );
-
-FCH_DATA_BLOCK*
-FchInitLoadDataBlock (
-  IN       FCH_INTERFACE        *FchInterface,
-  IN       AMD_CONFIG_PARAMS    *StdHeader
-  );
-
-FCH_DATA_BLOCK*
-FchInitEnvCreatePrivateData (
-  IN       AMD_ENV_PARAMS        *EnvParams
-  );
-
-FCH_RESET_DATA_BLOCK*
-FchInitResetLoadPrivateDefault (
-  IN       AMD_RESET_PARAMS      *ResetParams
-  );
-
-VOID
-RetrieveDataBlockFromInitReset (
-  IN       FCH_DATA_BLOCK       *FchParams
-  );
-
-
-#endif
-

pi/amd/00660F01/Proc/Fch/Common/FchLib.c

diff --git a/pi/amd/00660F01/Proc/Fch/Common/FchLib.c b/pi/amd/00660F01/Proc/Fch/Common/FchLib.c
deleted file mode 100644
index dfdab59..0000000
--- a/pi/amd/00660F01/Proc/Fch/Common/FchLib.c
+++ /dev/null
@@ -1,672 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH IO access common routine
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#include "FchPlatform.h"
-#define FILECODE PROC_FCH_COMMON_FCHLIB_FILECODE
-
-/**< FchStall - Reserved  */
-VOID
-FchStall (
-  IN       UINT32              uSec,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT16 timerAddr;
-  UINT32 startTime;
-  UINT32 elapsedTime;
-
-  LibAmdMemRead (AccessWidth16, (UINT64) (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG64), &timerAddr, StdHeader);
-  if ( timerAddr == 0 ) {
-    uSec = uSec / 2;
-    while ( uSec != 0 ) {
-      LibAmdIoRead (AccessWidth8, FCHOEM_IO_DELAY_PORT, (UINT8 *) (&startTime), StdHeader);
-      uSec--;
-    }
-  } else {
-    LibAmdIoRead (AccessWidth32, timerAddr, &startTime, StdHeader);
-    for ( ;; ) {
-      LibAmdIoRead (AccessWidth32, timerAddr, &elapsedTime, StdHeader);
-      if ( elapsedTime < startTime ) {
-        elapsedTime = elapsedTime + FCH_MAX_TIMER - startTime;
-      } else {
-        elapsedTime = elapsedTime - startTime;
-      }
-      if ( (elapsedTime * FCHOEM_ELAPSED_TIME_UNIT / FCHOEM_ELAPSED_TIME_DIVIDER) > uSec ) {
-        break;
-      }
-    }
-  }
-}
-
-/**< cimFchStall - Reserved  */
-VOID
-CimFchStall (
-  IN       UINT32              uSec,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT16 timerAddr;
-  UINT32 startTime;
-  UINT32 elapsedTime;
-
-  LibAmdMemRead (AccessWidth16, (UINT64) (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG64), &timerAddr, StdHeader);
-  if ( timerAddr == 0 ) {
-    uSec = uSec / 2;
-    while ( uSec != 0 ) {
-      LibAmdIoRead (AccessWidth8, FCHOEM_IO_DELAY_PORT, (UINT8*)&elapsedTime, StdHeader);
-      uSec--;
-    }
-  } else {
-    LibAmdIoRead (AccessWidth32, timerAddr, &startTime, StdHeader);
-    for ( ;; ) {
-      LibAmdIoRead (AccessWidth32, timerAddr, &elapsedTime, StdHeader);
-      if ( elapsedTime < startTime ) {
-        elapsedTime = elapsedTime + FCH_MAX_TIMER - startTime;
-      } else {
-        elapsedTime = elapsedTime - startTime;
-      }
-      if ( (elapsedTime * FCHOEM_ELAPSED_TIME_UNIT / FCHOEM_ELAPSED_TIME_DIVIDER) > uSec ) {
-        break;
-      }
-    }
-  }
-}
-
-/**< FchReset - Reserved  */
-VOID
-FchPciReset (
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT8   PciRstValue;
-
-  PciRstValue = 0x06;
-  LibAmdIoWrite (AccessWidth8, FCH_PCIRST_BASE_IO, &PciRstValue, StdHeader);
-}
-
-/**< outPort80 - Reserved  */
-VOID
-OutPort80 (
-  IN       UINT32              pcode,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  LibAmdIoWrite (AccessWidth8, FCHOEM_OUTPUT_DEBUG_PORT, &pcode, StdHeader);
-  return;
-}
-
-/**< outPort1080 - Reserved  */
-VOID
-OutPort1080 (
-  IN       UINT32              pcode,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  LibAmdIoWrite (AccessWidth32, 0x1080, &pcode, StdHeader);
-  return;
-}
-
-/**< FchCopyMem - Reserved  */
-VOID
-FchCopyMem (
-  IN      VOID*   pDest,
-  IN      VOID*   pSource,
-  IN      UINTN   Length
-  )
-{
-  UINTN  i;
-  UINT8  *Ptr;
-  UINT8  *Source;
-  Ptr = (UINT8*)pDest;
-  Source = (UINT8*)pSource;
-  for (i = 0; i < Length; i++) {
-    *Ptr = *Source;
-    Source++;
-    Ptr++;
-  }
-}
-
-/** GetRomSigPtr - Reserved **/
-VOID*
-GetRomSigPtr (
-  IN      UINTN               *RomSigPtr,
-  IN      AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT32   RomPtr;
-  UINT32   RomSig;
-  UINT16   MswAddr;
-
-  *RomSigPtr = 0;
-  MswAddr = 0xFF00;
-  do {
-    RomPtr = (MswAddr << 16) + FCH_ROMSIG_BASE_IO;
-    LibAmdMemRead (AccessWidth32, (UINT64) RomPtr, &RomSig, StdHeader);
-    if (RomSig == FCH_ROMSIG_SIGNATURE) {
-      *RomSigPtr = RomPtr;
-      break;
-    }
-    MswAddr >>= 1;
-    MswAddr |= BIT15;
-  } while (MswAddr != 0xFFF8);
-  return RomSigPtr;
-}
-
-/** RwXhciIndReg - Reserved **/
-VOID
-RwXhciIndReg (
-  IN       UINT32              Index,
-  IN       UINT32              AndMask,
-  IN       UINT32              OrMask,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT32    RevReg;
-  PCI_ADDR  PciAddress;
-
-  PciAddress.AddressValue = (USB_XHCI_BUS_DEV_FUN << 12) + 0x48;
-  LibAmdPciWrite (AccessWidth32, PciAddress, &Index, StdHeader);
-  PciAddress.AddressValue = (USB_XHCI_BUS_DEV_FUN << 12) + 0x4C;
-  RevReg = ~AndMask;
-  LibAmdPciRMW (AccessWidth32, PciAddress, &OrMask, &RevReg, StdHeader);
-
-  PciAddress.AddressValue = (USB_XHCI1_BUS_DEV_FUN << 12) + 0x48;
-  LibAmdPciWrite (AccessWidth32, PciAddress, &Index, StdHeader);
-  PciAddress.AddressValue = (USB_XHCI1_BUS_DEV_FUN << 12) + 0x4C;
-  RevReg = ~AndMask;
-  LibAmdPciRMW (AccessWidth32, PciAddress, &OrMask, &RevReg, StdHeader);
-}
-
-/** RwXhci0IndReg - Reserved **/
-VOID
-RwXhci0IndReg (
-  IN       UINT32              Index,
-  IN       UINT32              AndMask,
-  IN       UINT32              OrMask,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT32    RevReg;
-  PCI_ADDR  PciAddress;
-
-  PciAddress.AddressValue = (USB_XHCI_BUS_DEV_FUN << 12) + 0x48;
-  LibAmdPciWrite (AccessWidth32, PciAddress, &Index, StdHeader);
-  PciAddress.AddressValue = (USB_XHCI_BUS_DEV_FUN << 12) + 0x4C;
-  RevReg = ~AndMask;
-  LibAmdPciRMW (AccessWidth32, PciAddress, &OrMask, &RevReg, StdHeader);
-}
-
-/** RwXhci1IndReg - Reserved **/
-VOID
-RwXhci1IndReg (
-  IN       UINT32              Index,
-  IN       UINT32              AndMask,
-  IN       UINT32              OrMask,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT32    RevReg;
-  PCI_ADDR  PciAddress;
-
-  PciAddress.AddressValue = (USB_XHCI1_BUS_DEV_FUN << 12) + 0x48;
-  LibAmdPciWrite (AccessWidth32, PciAddress, &Index, StdHeader);
-  PciAddress.AddressValue = (USB_XHCI1_BUS_DEV_FUN << 12) + 0x4C;
-  RevReg = ~AndMask;
-  LibAmdPciRMW (AccessWidth32, PciAddress, &OrMask, &RevReg, StdHeader);
-}
-
-/** ReadXhci0Phy - Reserved **/
-VOID
-ReadXhci0Phy (
-  IN       UINT32              Port,
-  IN       UINT32              Address,
-  IN       UINT32              *Value,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT32    RegIndex;
-  UINT32    RegValue;
-  PCI_ADDR  PciAddress;
-
-  RwXhci0IndReg ( FCH_XHCI_IND60_REG00, 0xFFFFC000, (Port << 13) + BIT12 + Address, StdHeader);
-
-  RegIndex = FCH_XHCI_IND60_REG04;
-  PciAddress.AddressValue = (USB_XHCI_BUS_DEV_FUN << 12) + 0x48;
-  LibAmdPciWrite (AccessWidth32, PciAddress, &RegIndex, StdHeader);
-  PciAddress.AddressValue = (USB_XHCI_BUS_DEV_FUN << 12) + 0x4C;
-  LibAmdPciRead (AccessWidth32, PciAddress, &RegValue, StdHeader);
-
-  (*Value) = ( RegValue >> (Port * 8)) & 0x000000FF;
-}
-
-/** ReadXhci1Phy - Reserved **/
-VOID
-ReadXhci1Phy (
-  IN       UINT32              Port,
-  IN       UINT32              Address,
-  IN       UINT32              *Value,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT32    RegIndex;
-  UINT32    RegValue;
-  PCI_ADDR  PciAddress;
-
-  RwXhci1IndReg ( FCH_XHCI_IND60_REG00, 0xFFFFC000, (Port << 13) + BIT12 + Address, StdHeader);
-
-  RegIndex = FCH_XHCI_IND60_REG04;
-  PciAddress.AddressValue = (USB_XHCI1_BUS_DEV_FUN << 12) + 0x48;
-  LibAmdPciWrite (AccessWidth32, PciAddress, &RegIndex, StdHeader);
-  PciAddress.AddressValue = (USB_XHCI1_BUS_DEV_FUN << 12) + 0x4C;
-  LibAmdPciRead (AccessWidth32, PciAddress, &RegValue, StdHeader);
-
-  (*Value) = ( RegValue >> (Port * 8)) & 0x000000FF;
-}
-
-/** AcLossControl - Reserved **/
-VOID
-AcLossControl (
-  IN       UINT8 AcLossControlValue
-  )
-{
-  AcLossControlValue &= 0x03;
-  AcLossControlValue |= BIT2;
-  RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG5B, AccessWidth8, 0xF0, AcLossControlValue);
-}
-
-/** RecordFchConfigPtr - Reserved **/
-VOID
-RecordFchConfigPtr (
-  IN       UINT32 FchConfigPtr
-  )
-{
-  RwMem (ACPI_MMIO_BASE + CMOS_RAM_BASE + 0x08, AccessWidth8, 0, (UINT8) ((FchConfigPtr >> 0) & 0xFF) );
-  RwMem (ACPI_MMIO_BASE + CMOS_RAM_BASE + 0x09, AccessWidth8, 0, (UINT8) ((FchConfigPtr >> 8) & 0xFF) );
-  RwMem (ACPI_MMIO_BASE + CMOS_RAM_BASE + 0x0A, AccessWidth8, 0, (UINT8) ((FchConfigPtr >> 16) & 0xFF) );
-  RwMem (ACPI_MMIO_BASE + CMOS_RAM_BASE + 0x0B, AccessWidth8, 0, (UINT8) ((FchConfigPtr >> 24) & 0xFF) );
-}
-
-/** ReadAlink - Reserved **/
-UINT32
-ReadAlink (
-  IN       UINT32              Index,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT32 Data;
-  LibAmdIoWrite (AccessWidth32, ALINK_ACCESS_INDEX, &Index, StdHeader);
-  LibAmdIoRead (AccessWidth32, ALINK_ACCESS_DATA, &Data, StdHeader);
-  //Clear Index
-  Index = 0;
-  LibAmdIoWrite (AccessWidth32, ALINK_ACCESS_INDEX, &Index, StdHeader);
-  return Data;
-}
-
-/** WriteAlink - Reserved **/
-VOID
-WriteAlink (
-  IN       UINT32              Index,
-  IN       UINT32              Data,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  LibAmdIoWrite (AccessWidth32, ALINK_ACCESS_INDEX, &Index, StdHeader);
-  LibAmdIoWrite (AccessWidth32, ALINK_ACCESS_DATA, &Data, StdHeader);
-  //Clear Index
-  Index = 0;
-  LibAmdIoWrite (AccessWidth32, ALINK_ACCESS_INDEX, &Index, StdHeader);
-}
-
-/** RwAlink - Reserved **/
-VOID
-RwAlink (
-  IN       UINT32              Index,
-  IN       UINT32              AndMask,
-  IN       UINT32              OrMask,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT32 AccessType;
-
-  AccessType = Index & 0xE0000000;
-  if (AccessType == (AXINDC << 29)) {
-    WriteAlink ((FCH_AX_INDXC_REG30 | AccessType), Index & 0x1FFFFFFF, StdHeader);
-    Index = FCH_AX_DATAC_REG34 | AccessType;
-  } else if (AccessType == (AXINDP << 29)) {
-    WriteAlink ((FCH_AX_INDXP_REG38 | AccessType), Index & 0x1FFFFFFF, StdHeader);
-    Index = FCH_AX_DATAP_REG3C | AccessType;
-  }
-  WriteAlink (Index, (ReadAlink (Index, StdHeader) & AndMask) | OrMask, StdHeader);
-}
-
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Read PMIO
- *
- *
- *
- * @param[in] Address  - PMIO Offset value
- * @param[in] OpFlag   - Access sizes
- * @param[in] Value    - Read Data Buffer
- * @param[in] StdHeader
- *
- */
-VOID
-ReadPmio (
-  IN       UINT8               Address,
-  IN       UINT8               OpFlag,
-  IN       VOID                *Value,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT8    i;
-
-  OpFlag = OpFlag & 0x7f;
-  OpFlag = 1 << (OpFlag - 1);
-  for (i = 0; i < OpFlag; i++) {
-    LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGCD6, &Address, StdHeader);
-    Address++;
-    LibAmdIoRead (AccessWidth8, FCH_IOMAP_REGCD7, (UINT8 *)Value + i, StdHeader);
-  }
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Write PMIO
- *
- *
- *
- * @param[in] Address  - PMIO Offset value
- * @param[in] OpFlag   - Access sizes
- * @param[in] Value    - Write Data Buffer
- * @param[in] StdHeader
- *
- */
-VOID
-WritePmio (
-  IN       UINT8               Address,
-  IN       UINT8               OpFlag,
-  IN       VOID                *Value,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT8    i;
-
-  OpFlag = OpFlag & 0x7f;
-  OpFlag = 1 << (OpFlag - 1);
-  for (i = 0; i < OpFlag; i++) {
-    LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGCD6, &Address, StdHeader);
-    Address++;
-    LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGCD7, (UINT8 *)Value + i, StdHeader);
-  }
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * RwPmio - Read/Write PMIO
- *
- *
- *
- * @param[in] Address    - PMIO Offset value
- * @param[in] OpFlag     - Access sizes
- * @param[in] AndMask    - Data And Mask 32 bits
- * @param[in] OrMask     - Data OR Mask 32 bits
- * @param[in] StdHeader
- *
- */
-VOID
-RwPmio (
-  IN       UINT8               Address,
-  IN       UINT8               OpFlag,
-  IN       UINT32              AndMask,
-  IN       UINT32              OrMask,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT32 Result;
-
-  ReadPmio (Address, OpFlag, &Result, StdHeader);
-  Result = (Result & AndMask) | OrMask;
-  WritePmio (Address, OpFlag, &Result, StdHeader);
-}
-
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Read PMIO2
- *
- *
- *
- * @param[in] Address  - PMIO2 Offset value
- * @param[in] OpFlag   - Access sizes
- * @param[in] Value    - Read Data Buffer
- * @param[in] StdHeader
- *
- */
-VOID
-ReadPmio2 (
-  IN       UINT8               Address,
-  IN       UINT8               OpFlag,
-  IN       VOID                *Value,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT8 i;
-
-  OpFlag = OpFlag & 0x7f;
-  OpFlag = 1 << (OpFlag - 1);
-  for ( i = 0; i < OpFlag; i++ ) {
-    LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGCD0, &Address, StdHeader);
-    Address++;
-    LibAmdIoRead (AccessWidth8, FCH_IOMAP_REGCD1, (UINT8 *) Value + i, StdHeader);
-  }
-}
-
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Write PMIO 2
- *
- *
- *
- * @param[in] Address  - PMIO2 Offset value
- * @param[in] OpFlag   - Access sizes
- * @param[in] Value    - Write Data Buffer
- * @param[in] StdHeader
- *
- */
-VOID
-WritePmio2 (
-  IN       UINT8               Address,
-  IN       UINT8               OpFlag,
-  IN       VOID                *Value,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT8 i;
-
-  OpFlag = OpFlag & 0x7f;
-  OpFlag = 1 << (OpFlag - 1);
-
-  for ( i = 0; i < OpFlag; i++ ) {
-    LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGCD0, &Address, StdHeader);
-    Address++;
-    LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGCD1, (UINT8 *) Value + i, StdHeader);
-  }
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * RwPmio2 - Read/Write PMIO2
- *
- *
- *
- * @param[in] Address    - PMIO2 Offset value
- * @param[in] OpFlag     - Access sizes
- * @param[in] AndMask    - Data And Mask 32 bits
- * @param[in] OrMask     - Data OR Mask 32 bits
- * @param[in] StdHeader
- *
- */
-VOID
-RwPmio2 (
-  IN       UINT8 Address,
-  IN       UINT8  OpFlag,
-  IN       UINT32 AndMask,
-  IN       UINT32 OrMask,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT32 Result;
-
-  ReadPmio2 (Address, OpFlag, &Result, StdHeader);
-  Result = (Result & AndMask) | OrMask;
-  WritePmio2 (Address, OpFlag, &Result, StdHeader);
-}
-
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Read BIOSRAM
- *
- *
- *
- * @param[in] Address  - BIOSRAM Offset value
- * @param[in] OpFlag   - Access sizes
- * @param[in] Value    - Read Data Buffer
- * @param[in] StdHeader
- *
- */
-VOID
-ReadBiosram (
-  IN       UINT8               Address,
-  IN       UINT8               OpFlag,
-  IN       VOID                *Value,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT8    i;
-
-  OpFlag = OpFlag & 0x7f;
-  OpFlag = 1 << (OpFlag - 1);
-  for (i = 0; i < OpFlag; i++) {
-    LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGCD4, &Address, StdHeader);
-    Address++;
-    LibAmdIoRead (AccessWidth8, FCH_IOMAP_REGCD5, (UINT8 *)Value + i, StdHeader);
-  }
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Write BIOSRAM
- *
- *
- *
- * @param[in] Address  - BIOSRAM Offset value
- * @param[in] OpFlag   - Access sizes
- * @param[in] Value    - Write Data Buffer
- * @param[in] StdHeader
- *
- */
-VOID
-WriteBiosram (
-  IN       UINT8               Address,
-  IN       UINT8               OpFlag,
-  IN       VOID                *Value,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT8    i;
-
-  OpFlag = OpFlag & 0x7f;
-  OpFlag = 1 << (OpFlag - 1);
-  for (i = 0; i < OpFlag; i++) {
-    LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGCD4, &Address, StdHeader);
-    Address++;
-    LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGCD5, (UINT8 *)Value + i, StdHeader);
-  }
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Record SMI Status
- *
- *
- * @param[in] StdHeader
- *
- */
-VOID
-RecordSmiStatus (
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINTN   Index;
-  UINT8   SwSmiValue;
-
-  ACPIMMIO8 (0xfed80320) |= 0x01;
-  for ( Index = 0; Index < 20; Index++ ) {
-    ACPIMMIO8 (0xfed10020 + Index) = ACPIMMIO8 (0xfed80280 + Index);
-  }
-  LibAmdIoRead (AccessWidth8, 0xB0, &SwSmiValue, StdHeader);
-  ACPIMMIO8 (0xfed10040) = SwSmiValue;
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Clear All SMI Status
- *
- *
- * @param[in] StdHeader
- *
- */
-VOID
-ClearAllSmiStatus (
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINTN   Index;
-
-  for ( Index = 0; Index < 20; Index++ ) {
-    ACPIMMIO8 (0xfed80280 + Index) |= 0;
-  }
-}

pi/amd/00660F01/Proc/Fch/Common/FchPeLib.c

diff --git a/pi/amd/00660F01/Proc/Fch/Common/FchPeLib.c b/pi/amd/00660F01/Proc/Fch/Common/FchPeLib.c
deleted file mode 100644
index 171ea0f..0000000
--- a/pi/amd/00660F01/Proc/Fch/Common/FchPeLib.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH IO access common routine
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#include "FchPlatform.h"
-#define FILECODE PROC_FCH_COMMON_FCHPELIB_FILECODE
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * ProgramPciByteTable - Program PCI register by table (8 bits data)
- *
- *
- *
- * @param[in] pPciByteTable    - Table data pointer
- * @param[in] dwTableSize      - Table length
- * @param[in] StdHeader
- *
- */
-VOID
-ProgramPciByteTable (
-  IN       REG8_MASK           *pPciByteTable,
-  IN       UINT16              dwTableSize,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT8     i;
-  UINT8     dbBusNo;
-  UINT8     dbDevFnNo;
-  UINT8     Or8;
-  UINT8     Mask8;
-  PCI_ADDR  PciAddress;
-
-  dbBusNo = pPciByteTable->RegIndex;
-  dbDevFnNo = pPciByteTable->AndMask;
-  pPciByteTable++;
-
-  for ( i = 1; i < dwTableSize; i++ ) {
-    if ( (pPciByteTable->RegIndex == 0xFF) && (pPciByteTable->AndMask == 0xFF) && (pPciByteTable->OrMask == 0xFF) ) {
-      pPciByteTable++;
-      dbBusNo = pPciByteTable->RegIndex;
-      dbDevFnNo = pPciByteTable->AndMask;
-      pPciByteTable++;
-      i++;
-    } else {
-      PciAddress.AddressValue = (dbBusNo << 20) + (dbDevFnNo << 12) + pPciByteTable->RegIndex;
-      Or8 = pPciByteTable->OrMask;
-      Mask8 = ~pPciByteTable->AndMask;
-      LibAmdPciRMW (AccessWidth8, PciAddress, &Or8, &Mask8, StdHeader);
-      pPciByteTable++;
-    }
-  }
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * ProgramFchAcpiMmioTbl - Program FCH ACPI MMIO register by table (8 bits data)
- *
- *
- *
- * @param[in] pAcpiTbl   - Table data pointer
- * @param[in] StdHeader
- *
- */
-VOID
-ProgramFchAcpiMmioTbl (
-  IN       ACPI_REG_WRITE      *pAcpiTbl,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT8   i;
-  UINT8   Or8;
-  UINT8   Mask8;
-  UINT32  ddtempVar;
-
-  if (pAcpiTbl != NULL) {
-    if ((pAcpiTbl->MmioReg == 0) && (pAcpiTbl->MmioBase == 0) && (pAcpiTbl->DataAndMask == 0xB0) && (pAcpiTbl->DataOrMask == 0xAC)) {
-      // Signature Checking
-      pAcpiTbl++;
-      for ( i = 1; pAcpiTbl->MmioBase < 0x1D; i++ ) {
-        ddtempVar = ACPI_MMIO_BASE | (pAcpiTbl->MmioBase) << 8 | pAcpiTbl->MmioReg;
-        Or8 = pAcpiTbl->DataOrMask;
-        Mask8 = ~pAcpiTbl->DataAndMask;
-        LibAmdMemRMW (AccessWidth8, (UINT64) ddtempVar, &Or8, &Mask8, StdHeader);
-        pAcpiTbl++;
-      }
-    }
-  }
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * ProgramFchSciMapTbl - Program FCH SCI Map table (8 bits data)
- *
- *
- *
- * @param[in] pSciMapTbl   - Table data pointer
- * @param[in] FchResetDataBlock
- *
- */
-VOID
-ProgramFchSciMapTbl (
-  IN       SCI_MAP_CONTROL  *pSciMapTbl,
-  IN       FCH_RESET_DATA_BLOCK *FchResetDataBlock
-  )
-{
-  AMD_CONFIG_PARAMS   *StdHeader;
-
-  UINT32  ddtempVar;
-  StdHeader = FchResetDataBlock->StdHeader;
-
-  if (pSciMapTbl != NULL) {
-    while (pSciMapTbl->InputPin != 0xFF) {
-      if ((pSciMapTbl->InputPin >= 0x40) && (pSciMapTbl->InputPin < 0x80) && (pSciMapTbl->GpeMap < 0x20)) {
-        ddtempVar = ACPI_MMIO_BASE | SMI_BASE | pSciMapTbl->InputPin;
-        if (((pSciMapTbl->InputPin == FCH_SMI_xHC0Pme) && (FchResetDataBlock->FchReset.Xhci0Enable == 0)) || \
-           ((pSciMapTbl->InputPin == FCH_SMI_xHC1Pme) && (FchResetDataBlock->FchReset.Xhci1Enable == 0))) {
-        } else {
-          LibAmdMemWrite (AccessWidth8, (UINT64) ddtempVar, &pSciMapTbl->GpeMap, StdHeader);
-        }
-      } else {
-        //Assert Warning "SCI map is invalid"
-      }
-      pSciMapTbl++;
-    }
-  }
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * ProgramFchGpioTbl - Program FCH Gpio table (8 bits data)
- *
- *
- *
- * @param[in] pGpioTbl   - Table data pointer
- *
- */
-VOID
-ProgramFchGpioTbl (
-  IN       GPIO_CONTROL  *pGpioTbl
-  )
-{
-  if (pGpioTbl != NULL) {
-    while (pGpioTbl->GpioPin != 0xFF) {
-      ACPIMMIO8 (ACPI_MMIO_BASE | IOMUX_BASE | pGpioTbl->GpioPin) = (UINT8) (pGpioTbl->PinFunction);
-      ACPIMMIO8 (ACPI_MMIO_BASE + GPIO_BANK0_BASE + ((UINT32)pGpioTbl->GpioPin << 2) + 2) = (UINT8) (pGpioTbl->CfgByte);
-      pGpioTbl++;
-    }
-  }
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * ProgramSataPhyTbl - Program FCH Sata Phy table (8 bits data)
- *
- *
- *
- * @param[in] pSataPhyTbl   - Table data pointer
- * @param[in] FchResetDataBlock
- *
- */
-VOID
-ProgramFchSataPhyTbl (
-  IN       SATA_PHY_CONTROL  *pSataPhyTbl,
-  IN       FCH_RESET_DATA_BLOCK *FchResetDataBlock
-  )
-{
-  if (pSataPhyTbl != NULL) {
-    while (pSataPhyTbl->PhyData != 0xFFFFFFFF) {
-      //to be implemented
-      pSataPhyTbl++;
-    }
-  }
-}
-
-/**
- * GetChipSysMode - Get Chip status
- *
- *
- * @param[in] Value - Return Chip strap status
- *   StrapStatus [15.0] - Hudson-2 chip Strap Status
- *    @li <b>0001</b> - Not USED FWH
- *    @li <b>0002</b> - Not USED LPC ROM
- *    @li <b>0004</b> - EC enabled
- *    @li <b>0008</b> - Reserved
- *    @li <b>0010</b> - Internal Clock mode
- * @param[in] StdHeader
- *
- */
-VOID
-GetChipSysMode (
-  IN       VOID                *Value,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  LibAmdMemRead (AccessWidth8, (UINT64) (ACPI_MMIO_BASE + MISC_BASE + FCH_MISC_REG80), Value, StdHeader);
-}
-
-/**
- * IsImcEnabled - Is IMC Enabled
- * @retval  TRUE for IMC Enabled; FALSE for IMC Disabled
- */
-BOOLEAN
-IsImcEnabled (
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT8   dbSysConfig;
-  GetChipSysMode (&dbSysConfig, StdHeader);
-  if (dbSysConfig & ChipSysEcEnable) {
-    return TRUE;
-  } else {
-    return FALSE;
-  }
-}
-
-
-/**
- * GetEfuseStatue - Get Efuse status
- *
- *
- * @param[in] Value - Return Chip strap status
- * @param[in] StdHeader
- *
- */
-VOID
-GetEfuseStatus (
-  IN       VOID                *Value,
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  )
-{
-  UINT8    Or8;
-  UINT8    Mask8;
-
-  Or8 = BIT5;
-  Mask8 = BIT5;
-  LibAmdMemRMW (AccessWidth8, (UINT64) (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGC8), &Or8, &Mask8, StdHeader);
-  LibAmdMemWrite (AccessWidth8, (UINT64) (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGD8), Value, StdHeader);
-  LibAmdMemRead (AccessWidth8, (UINT64) (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGD8 + 1), Value, StdHeader);
-  Or8 = 0;
-  Mask8 = BIT5;
-  LibAmdMemRMW (AccessWidth8, (UINT64) (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGC8), &Or8, &Mask8, StdHeader);
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * SbSleepTrapControl - SB Sleep Trap Control
- *
- *
- *
- * @param[in] SleepTrap    - Whether sleep trap is enabled
- *
- */
-VOID
-SbSleepTrapControl (
-  IN        BOOLEAN          SleepTrap
-  )
-{
-  if (SleepTrap) {
-    ACPIMMIO32 (ACPI_MMIO_BASE + SMI_BASE + FCH_SMI_REGB0) &= ~(BIT2 + BIT3);
-    ACPIMMIO32 (ACPI_MMIO_BASE + SMI_BASE + FCH_SMI_REGB0) |= BIT2;
-
-    ACPIMMIO8 (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGBE) &= ~ (BIT5);
-    ACPIMMIO8 (ACPI_MMIO_BASE + PMIO_BASE + 0xB) &= ~ (BIT0 + BIT1);
-    ACPIMMIO8 (ACPI_MMIO_BASE + PMIO_BASE + 0xB) |= BIT1;
-  } else {
-    ACPIMMIO8 (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGBE) |= BIT5;
-    ACPIMMIO8 (ACPI_MMIO_BASE + PMIO_BASE + 0xB) &= ~ (BIT0 + BIT1);
-    ACPIMMIO8 (ACPI_MMIO_BASE + PMIO_BASE + 0xB) |= BIT0;
-
-    ACPIMMIO32 (ACPI_MMIO_BASE + SMI_BASE + FCH_SMI_REGB0) &= ~(BIT2 + BIT3);
-  }
-}

pi/amd/00660F01/Proc/Fch/Common/MemLib.c

diff --git a/pi/amd/00660F01/Proc/Fch/Common/MemLib.c b/pi/amd/00660F01/Proc/Fch/Common/MemLib.c
deleted file mode 100644
index 656f768..0000000
--- a/pi/amd/00660F01/Proc/Fch/Common/MemLib.c
+++ /dev/null
@@ -1,144 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH memory access lib
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#include "FchPlatform.h"
-#include "Ids.h"
-#define FILECODE PROC_FCH_COMMON_MEMLIB_FILECODE
-
-
-/**
- * ReadMem - Read FCH BAR Memory
- *
- * @param[in] Address    - Memory BAR address
- * @param[in] OpFlag     - Access width
- * @param[in] *ValuePtr  - In/Out value pointer
- *
- */
-VOID
-ReadMem (
-  IN  UINT32     Address,
-  IN  UINT8      OpFlag,
-  IN  VOID       *ValuePtr
-  )
-{
-  OpFlag = OpFlag & 0x7f;
-
-  switch ( OpFlag ) {
-  case AccessWidth8:
-    *((UINT8*)ValuePtr) = *((volatile UINT8*) ((UINTN)Address));
-    break;
-
-  case AccessWidth16:
-    *((UINT16*)ValuePtr) = *((volatile UINT16*) ((UINTN)Address));
-    break;
-
-  case AccessWidth32:
-    *((UINT32*)ValuePtr) = *((volatile UINT32*) ((UINTN)Address));
-    break;
-
-  default:
-    ASSERT (FALSE);
-    break;
-  }
-}
-
-/**
- * WriteMem - Write FCH BAR Memory
- *
- * @param[in] Address    - Memory BAR address
- * @param[in] OpFlag     - Access width
- * @param[in] *ValuePtr  - In/Out Value pointer
- *
- */
-VOID
-WriteMem (
-  IN  UINT32     Address,
-  IN  UINT8      OpFlag,
-  IN  VOID       *ValuePtr
-  )
-{
-  OpFlag = OpFlag & 0x7f;
-
-  switch ( OpFlag ) {
-  case AccessWidth8 :
-    *((volatile UINT8*) ((UINTN)Address)) = *((UINT8*)ValuePtr);
-    break;
-
-  case AccessWidth16:
-    *((volatile UINT16*) ((UINTN)Address)) = *((UINT16*)ValuePtr);
-    break;
-
-  case AccessWidth32:
-    *((volatile UINT32*) ((UINTN)Address)) = *((UINT32*)ValuePtr);
-    break;
-
-  default:
-    ASSERT (FALSE);
-    break;
-  }
-}
-
-/**
- * RwMem - Read & Write FCH BAR Memory
- *
- * @param[in] Address    - Memory BAR address
- * @param[in] OpFlag     - Access width
- * @param[in] Mask       - Mask Value of data
- * @param[in] Data       - Write data
- *
- */
-VOID
-RwMem (
-  IN  UINT32     Address,
-  IN  UINT8      OpFlag,
-  IN  UINT32     Mask,
-  IN  UINT32     Data
-  )
-{
-  UINT32 Result;
-
-  ReadMem (Address, OpFlag, &Result);
-  Result = (Result & Mask) | Data;
-  WriteMem (Address, OpFlag, &Result);
-  ReadMem (Address, OpFlag, &Result);
-}
-

pi/amd/00660F01/Proc/Fch/Common/PciLib.c

diff --git a/pi/amd/00660F01/Proc/Fch/Common/PciLib.c b/pi/amd/00660F01/Proc/Fch/Common/PciLib.c
deleted file mode 100644
index ed8bb81..0000000
--- a/pi/amd/00660F01/Proc/Fch/Common/PciLib.c
+++ /dev/null
@@ -1,93 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH PCI access lib
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#include "FchPlatform.h"
-#define FILECODE PROC_FCH_COMMON_PCILIB_FILECODE
-
-VOID
-ReadPci (
-  IN       UINT32                  Address,
-  IN       UINT8                   OpFlag,
-  IN       VOID*                   Value,
-  IN       AMD_CONFIG_PARAMS       *StdHeader
-  )
-{
-  PCI_ADDR  PciAddress;
-
-  PciAddress.AddressValue = ((Address >> 4) & ~0xFFF) + (Address & 0xFFF);
-  LibAmdPciRead ((ACCESS_WIDTH) OpFlag, PciAddress, Value, StdHeader);
-}
-
-
-VOID
-WritePci (
-  IN       UINT32                  Address,
-  IN       UINT8                   OpFlag,
-  IN       VOID                    *Value,
-  IN       AMD_CONFIG_PARAMS       *StdHeader
-  )
-{
-  PCI_ADDR  PciAddress;
-
-  PciAddress.AddressValue = ((Address >> 4) & ~0xFFF) + (Address & 0xFFF);
-  LibAmdPciWrite ((ACCESS_WIDTH) OpFlag, PciAddress, Value, StdHeader);
-}
-
-
-VOID
-RwPci (
-  IN       UINT32                  Address,
-  IN       UINT8                   OpFlag,
-  IN       UINT32                  Mask,
-  IN       UINT32                  Data,
-  IN       AMD_CONFIG_PARAMS       *StdHeader
-  )
-{
-  PCI_ADDR  PciAddress;
-  UINT32    rMask;
-
-  PciAddress.AddressValue = ((Address >> 4) & ~0xFFF) + (Address & 0xFFF);
-  rMask = ~Mask;
-  LibAmdPciRMW ((ACCESS_WIDTH) OpFlag, PciAddress, &Data, &rMask, StdHeader);
-}
-
-

pi/amd/00660F01/Proc/Fch/Fch.h

diff --git a/pi/amd/00660F01/Proc/Fch/Fch.h b/pi/amd/00660F01/Proc/Fch/Fch.h
deleted file mode 100644
index 7576cad..0000000
--- a/pi/amd/00660F01/Proc/Fch/Fch.h
+++ /dev/null
@@ -1,2603 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH registers definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 314274 $   @e \$Date: 2015-03-08 03:53:49 -0500 (Sun, 08 Mar 2015) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#define FCH_REVISION       "0.0.5.0"
-#define FCH_ID             "FCH_A05"
-#define FCH_VERSION        0x0000
-
-/**
- * @page fchinitguide FCH implement phase in AGESA
- *
- * FCH provides below access to supported FCH service functions
- * and data.
- *   - @subpage fchreset "FCH_INIT_RESET"
- *   - @subpage fchenv "FCH_INIT_ENV"
- *   - @subpage fchmid "FCH_INIT_MID"
- *   - @subpage fchlate "FCH_INIT_LATE"
- *   - @subpage fchs3early "FCH_INIT_S3_EARLY_RESTORE"
- *   - @subpage fchs3late "FCH_INIT_S3_LATE_RESTORE"
- *   - @subpage fchsmm "FCH_SMM_SERVICE"
- *   - @subpage fchsmmacpion "FCH_SMM_ACPION"
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchreset FCH_INIT_RESET
- *  @section FCH_INIT_RESET Interface Call
- *  @par
- *     Initialize structure referenced by FCH_RESET_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_RESET_CallIn Call Prototype
- *  @par
- *     AGESA_STATUS FchInitReset (IN AMD_RESET_PARAMS *ResetParams);
- *  @subsection FCH_INIT_RESET_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_RESET_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSmbus0BaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSmbus1BaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSioPmeBaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgWatchDogTimerBase  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgGecShadowRomBase   </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSpiRomBaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiPm1EvtBlkAddr  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiPm1CntBlkAddr  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiPmTmrBlkAddr   </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgCpuControlBlkAddr  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiGpe0BlkAddr    </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSmiCmdPortAddr     </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiPmaCntBlkAddr  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_RESET_INTERFACE::SataEnable      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_RESET_INTERFACE::IdeEnable       </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchenv FCH_INIT_ENV
- *  @section FCH_INIT_ENV Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_ENV_CallIn Call Prototype
- *  @par
- *     AGESA_STATUS FchInitEnv (IN AMD_ENV_PARAMS *EnvParams);
- *  @subsection FCH_INIT_ENV_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_ENV_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SdConfig              </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::AzaliaController      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::IrConfig              </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataIdeMode           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci1Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci2Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci3Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci4Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchmid FCH_INIT_MID
- *  @section FCH_INIT_MID Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_MID_CallIn Call Prototype
- *  @par
- *     AGESA_STATUS FchInitMid (IN AMD_MID_PARAMS *MidParams);
- *  @subsection FCH_INIT_MID_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_MID_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::AzaliaController      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::IdeEnable             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchlate FCH_INIT_LATE
- *  @section FCH_INIT_LATE Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_LATE_CallIn Call Prototype
- *  @par
- *     AGESA_STATUS FchInitLate (IN FCH_DATA_BLOCK *LateParams);
- *  @subsection FCH_INIT_LATE_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_LATE_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSpiRomBaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchs3early FCH_INIT_S3_EARLY_RESTORE
- *  @section FCH_INIT_S3_EARLY_RESTORE Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_S3_EARLY_RESTORE_CallIn Call Prototype
- *  @par
- *     VOID FchInitS3EarlyRestore (IN FCH_DATA_BLOCK *FchDataPtr);
- *  @subsection FCH_INIT_S3_EARLY_RESTORE_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_S3_EARLY_RESTORE_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SdConfig              </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::AzaliaController      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::IrConfig              </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataIdeMode           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci1Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci2Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci3Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci4Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchs3late FCH_INIT_S3_LATE_RESTORE
- *  @section FCH_INIT_S3_LATE_RESTORE Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_S3_LATE_RESTORE_CallIn Call Prototype
- *  @par
- *     VOID FchInitS3LateRestore (IN FCH_DATA_BLOCK *FchDataPtr);
- *  @subsection FCH_INIT_S3_LATE_RESTORE_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_S3_LATE_RESTORE_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::AzaliaController      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::IdeEnable             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSpiRomBaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchsmm FCH_SMM_SERVICE
- *  @section FCH_SMM_SERVICE Interface Call
- *  Initialize structure referenced by FCHCFG to default recommended value.
- *  @subsection FCH_SMM_SERVICE_CallIn Call Prototype
- *  @par
- *     FchSmmService ((FCHCFG*)pConfig)     (Followed PH Interface)
- *  @subsection FCH_SMM_SERVICE_CallID Service ID
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_SMM_SERVICE  --> 0x00010060 </TD></TR>
- *  </TABLE>
- *  @subsection FCH_SMM_SERVICE_CallOut Prepare for Callout
- *  @par
- *    Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_SMM_SERVICE_Config Prepare for Configuration Data.
- *  @par
- *     Not necessary on current implementation
- *
- */
-#define FCH_SMM_SERVICE              0x00010060ul
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchsmmacpion FCH_SMM_ACPION
- *  @section FCH_SMM_ACPION Interface Call
- *  Initialize structure referenced by FCHCFG to default recommended value.
- *  @subsection FCH_SMM_ACPION_CallIn Call Prototype
- *  @par
- *     FchSmmAcpiOn ((FCHCFG*)pConfig)     (Followed PH Interface)
- *  @subsection FCH_SMM_ACPION_CallID Service ID
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_SMM_ACPION  --> 0x00010061 </TD></TR>
- *  </TABLE>
- *  @subsection FCH_SMM_ACPION_CallOut Prepare for Callout
- *  @par
- *    Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_SMM_ACPION_Config Prepare for Configuration Data.
- *  @par
- *     Not necessary on current implementation
- *
- */
-#define FCH_SMM_ACPION               0x00010061ul
-
-#ifndef OEM_CALLBACK_BASE
-  #define OEM_CALLBACK_BASE         0x00010100ul
-#endif
-
-//0x00 - 0x0F callback functions are reserved for bootblock
-#define SATA_PHY_PROGRAMMING        OEM_CALLBACK_BASE + 0x10
-#define PULL_UP_PULL_DOWN_SETTINGS  OEM_CALLBACK_BASE + 0x20
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page CB_SBGPP_RESET_ASSERT_Page CB_SBGPP_RESET_ASSERT
- *  @section CB_SBGPP_RESET_ASSERT Interface Call
- *  Initialize structure referenced by FCHCFG to default recommended value.
- *  @subsection CB_SBGPP_RESET_ASSERT_CallID Service ID
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> CB_SBGPP_RESET_ASSERT  --> 0x00010130 </TD></TR>
- *  </TABLE>
- *  @subsection CB_SBGPP_RESET_ASSERT_Config Prepare for Configuration Data.
- *  @par
- *     Not necessary on current implementation
- *
- */
-#define CB_SBGPP_RESET_ASSERT       OEM_CALLBACK_BASE + 0x30
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page CB_SBGPP_RESET_DEASSERT_Page CB_SBGPP_RESET_DEASSERT
- *  @section CB_SBGPP_RESET_DEASSERT  Interface Call
- *  Initialize structure referenced by FCHCFG to default recommended value.
- *  @subsection CB_SBGPP_RESET_DEASSERT _CallID Service ID
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> CB_SBGPP_RESET_DEASSERT   --> 0x00010131 </TD></TR>
- *  </TABLE>
- *  @subsection CB_SBGPP_RESET_DEASSERT _Config Prepare for Configuration Data.
- *  @par
- *     Not necessary on current implementation
- *
- */
-#define CB_SBGPP_RESET_DEASSERT     OEM_CALLBACK_BASE + 0x31
-
-#define CFG_ADDR_PORT               0xCF8
-#define CFG_DATA_PORT               0xCFC
-
-#define ALINK_ACCESS_INDEX          0x0CD8
-#define ALINK_ACCESS_DATA           ALINK_ACCESS_INDEX + 4
-
-/*------------------------------------------------------------------
-; I/O Base Address - Should be set by host BIOS
-;------------------------------------------------------------------ */
-#define DELAY_PORT                  0x0E0
-
-#define FCH_8259_CONTROL_REG_MASTER 0x20
-#define FCH_8259_MASK_REG_MASTER    0x21
-
-/*------------------------------------------------------------------
-; DEBUG_PORT = 8-bit I/O Port Address for POST Code Display
-;------------------------------------------------------------------ */
-// ASIC VendorID and DeviceIDs
-#define ATI_VID                      0x1002
-#define AMD_FCH_VID                  0x1022
-#define FCH_DEVICE_ID                0x780B
-#define FCH_SATA_VID                 AMD_FCH_VID      // Dev 17 Func 0
-#define FCH_SATA_DID                 0x7800
-#define FCH_SATA_AHCI_DID            0x7801
-#define FCH_SATA_RAID_DID            0x7802
-#define FCH_SATA_RAID5_DID           0x7803
-#define FCH_SATA_AMDAHCI_DID         0x7804
-#define FCH_SATA_RAID_DOTHILL_DID    0x7805
-#define FCH_SATA_RAID5_DOTHILL_DID   0x780A
-#define FCH_USB_OHCI_VID             AMD_FCH_VID      // Dev 18 Func 0, Dev 19 Func 0
-#define FCH_USB_OHCI_DID             0x7807
-#define FCH_USB_EHCI_VID             AMD_FCH_VID      // Dev 18 Func 2, Dev 19 Func 2
-#define FCH_USB_EHCI_DID             0x7808
-#define FCH_USB_XHCI_VID             AMD_FCH_VID      // Dev 10 Func 0, Dev 10 Func 1
-#define FCH_USB_XHCI_DID             0x7812
-#define FCH_USB_XHCI_DID_BOLTON      0x7814
-#define FCH_USB_XHCI_DID_KABINI      0x7814
-#define FCH_SMBUS_VID                AMD_FCH_VID      // Dev 20 Func 0
-#define FCH_SMBUS_DID                0x780B
-#define FCH_IDE_VID                  AMD_FCH_VID      // Dev 20 Func 1
-#define FCH_IDE_DID                  0x780C
-#define FCH_AZALIA_VID               AMD_FCH_VID      // Dev 20 Func 2
-#define FCH_AZALIA_DID               0x157a
-#define FCH_LPC_VID                  AMD_FCH_VID      // Dev 20 Func 3
-#define FCH_LPC_DID                  0x780E
-#define FCH_PCIB_VID                 AMD_FCH_VID      // Dev 20 Func 4
-#define FCH_PCIB_DID                 0x780F
-#define FCH_USB_OHCIF_VID            AMD_FCH_VID      // dev 20 Func 5
-#define FCH_USB_OHCIF_DID            0x7809
-#define FCH_NIC_VID                  0x14E4          // Dev 20 Func 6
-#define FCH_NIC_DID                  0x1699
-#define FCH_SD_VID                   AMD_FCH_VID      // Dev 20 Func 7
-#define FCH_SD_DID                   0x7806
-
-//FCH Variant
-#define FCH_Variant_EFUSE_LOCATION        0x1E        // EFUSE bit 240-247
-
-#define FCH_M2                            0x01
-#define FCH_M3                            0x03
-#define FCH_M3T                           0x07
-#define FCH_D2                            0x0F
-#define FCH_D3                            0x1F
-#define FCH_D4                            0x3F
-#define FCH_BOLTON                        0x15
-#define FCH_YANGTZE                       0x39
-#define FCH_YANGTZEA1                     0x3A
-#define FCH_AVALONA0                      0x41
-#define FCH_AVALONA1                      0x42
-//Misc
-#define R_FCH_ACPI_PM1_STATUS              0x00
-#define R_FCH_ACPI_PM1_ENABLE              0x02
-#define R_FCH_ACPI_PM_CONTROL              0x04
-#define R_FCH_ACPI_EVENT_STATUS            0x20
-#define R_FCH_ACPI_EVENT_ENABLE            0x24
-#define R_FCH_PM_ACPI_PMA_CNT_BLK_LO       0x2C
-
-// ACPI Sleep Type
-#define ACPI_SLPTYP_S0                     0
-#define ACPI_SLPTYP_S1                     1
-#define ACPI_SLPTYP_S3                     3
-#define ACPI_SLPTYP_S4                     4
-#define ACPI_SLPTYP_S5                     5
-
-//#define SATA_BUS_DEV_FUN_FPGA            0x228
-#define SATA_BUS_DEV_FUN            ((0x11 << 3) + 0)
-#define FCH_SATA1_BUS        0
-#define FCH_SATA1_DEV        17
-#define FCH_SATA1_FUNC       0
-
-#define FC_BUS_DEV_FUN              ((0x11 << 3) + 1)
-#define FCH_XHCI_BUS        0
-#define FCH_XHCI_DEV        16
-#define FCH_XHCI_FUNC       0
-#define USB_XHCI_BUS_DEV_FUN        ((FCH_XHCI_DEV << 3) + FCH_XHCI_FUNC)
-#define FCH_XHCI1_BUS        0
-#define FCH_XHCI1_DEV        16
-#define FCH_XHCI1_FUNC       1
-#define USB_XHCI1_BUS_DEV_FUN       ((FCH_XHCI1_DEV << 3) + FCH_XHCI1_FUNC)
-#define USB1_OHCI_BUS_DEV_FUN       ((0x12 << 3) + 0)    // PORT 0-4
-#define FCH_OHCI1_BUS        0
-#define FCH_OHCI1_DEV        18
-#define FCH_OHCI1_FUNC       0
-#define USB2_OHCI_BUS_DEV_FUN       ((0x13 << 3) + 0)    // PORT 5-9
-#define FCH_OHCI2_BUS        0
-#define FCH_OHCI2_DEV        19
-#define FCH_OHCI2_FUNC       0
-#define USB3_OHCI_BUS_DEV_FUN       ((0x16 << 3) + 0)    // PORT 10-13
-#define FCH_OHCI3_BUS        0
-#define FCH_OHCI3_DEV        22
-#define FCH_OHCI3_FUNC       0
-#define USB1_EHCI_BUS_DEV_FUN       ((0x12 << 3) + 2)    // PORT 0-4
-#define FCH_EHCI1_BUS        0
-#define FCH_EHCI1_DEV        18
-#define FCH_EHCI1_FUNC       2
-#define USB2_EHCI_BUS_DEV_FUN       ((0x13 << 3) + 2)    // PORT 5-9
-#define FCH_EHCI2_BUS        0
-#define FCH_EHCI2_DEV        19
-#define FCH_EHCI2_FUNC       2
-#define USB3_EHCI_BUS_DEV_FUN       ((0x16 << 3) + 2)  // PORT 10-13
-#define FCH_EHCI3_BUS        0
-#define FCH_EHCI3_DEV        22
-#define FCH_EHCI3_FUNC       2
-#define SMBUS_BUS_DEV_FUN           ((0x14 << 3) + 0)
-#define FCH_ISA_BUS          0
-#define FCH_ISA_DEV          20
-#define FCH_ISA_FUNC         0
-#define IDE_BUS_DEV_FUN             ((0x14 << 3) + 1)
-#define FCH_IDE_BUS          0
-#define FCH_IDE_DEV          20
-#define FCH_IDE_FUNC         1
-#define AZALIA_BUS_DEV_FUN          ((0x9 << 3) + 2)
-#define FCH_AZALIA_BUS       0
-#define FCH_AZALIA_DEV       9
-#define FCH_AZALIA_FUNC      2
-#define LPC_BUS_DEV_FUN             ((0x14 << 3) + 3)
-#define FCH_LPC_BUS          0
-#define FCH_LPC_DEV          20
-#define FCH_LPC_FUNC         3
-#define PCIB_BUS_DEV_FUN            ((0x14 << 3) + 4)    // P2P in SB700
-#define FCH_PCI_BUS          0
-#define FCH_PCI_DEV          20
-#define FCH_PCI_FUNC         4
-#define USB4_OHCI_BUS_DEV_FUN       ((0x14 << 3) + 5)    // PORT FL0 - FL1
-#define FCH_OHCI4_BUS        0
-#define FCH_OHCI4_DEV        20
-#define FCH_OHCI4_FUNC       5
-//Gigabyte Ethernet Controller
-#define GEC_BUS_DEV_FUN             ((0x14 << 3) + 6)
-#define FCH_GBEC_BUS         0
-#define FCH_GBEC_DEV         20
-#define FCH_GBEC_FUNC        6
-
-#define SD_BUS_DEV_FUN            ((0x14 << 3) + 7)      // SD Controller
-#define SD_PCI_BUS          0
-#define SD_PCI_DEV          20
-#define SD_PCI_FUNC         7
-
-
-#define FCH_GPP_BUS          0
-#define FCH_GPP_DEV          21
-#define FCH_GPP_FUNC         0
-#define GPP0_BUS_DEV_FUN            ((0x15 << 3) + 0)    // GPP P2P bridge PORT0
-#define GPP1_BUS_DEV_FUN            ((0x15 << 3) + 1)    // GPP P2P bridge PORT1
-#define GPP2_BUS_DEV_FUN            ((0x15 << 3) + 2)    // GPP P2P bridge PORT2
-#define GPP3_BUS_DEV_FUN            ((0x15 << 3) + 3)    // GPP P2P bridge PORT3
-
-#define ACPI_MMIO_BASE  0xFED80000ul
-#define FCH_CFG_BASE     0x000   // DWORD
-#define GPIO_BASE       0x100   // BYTE
-#define SMI_BASE        0x200   // DWORD
-#define PMIO_BASE       0x300   // DWORD
-#define PMIO2_BASE      0x400   // BYTE
-#define BIOS_RAM_BASE   0x500   // BYTE
-#define CMOS_RAM_BASE   0x600   // BYTE
-#define CMOS_BASE       0x700   // BYTE
-#define ASF_BASE        0x900   // DWORD
-#define SMBUS_BASE      0xA00   // DWORD
-#define WATCHDOG_BASE   0xB00   //
-#define HPET_BASE       0xC00   // DWORD
-#define IOMUX_BASE      0xD00   // BYTE
-#define MISC_BASE       0xE00
-#define SERIAL_DEBUG_BASE  0x1000
-#define GFX_DAC_BASE       0x1400
-#define GPIO_BANK0_BASE    0x1500   // DWORD
-//#define GPIO_BANK1_BASE    0x1600   // DWORD
-//#define GPIO_BANK2_BASE    0x1700   // DWORD
-#define CEC_BASE           0x1800
-#define XHCI_BASE          0x1C00
-#define ACDC_BASE          0x1D00
-#define AOAC_BASE          0x1E00
-
-
-// Chip type definition
-#define CHIPTYPE_HUDSON2         (1 << 0)
-#define CHIPTYPE_YUBA            (1 << 1)
-
-//
-// ROM SIG type definition
-//
-#define NUM_OF_ROMSIG_FILED      0x04
-#define XHCI_FILED_NUM           0x03
-#define ROMSIG_CFG_MASK          0x07
-#define XHCI_BOOT_RAM_OFFSET     0x8000
-#define INSTRUCTION_RAM_SIG      0x55AA
-#define ROMSIG_SIG               0x55AA55AAul
-
-// RegSpace field (AB_INDEX[31:29]
-#define AXINDC         0               // AXINDC
-#define AXINDP         2               // AXINDP
-#define ABCFG          6               // ABCFG
-#define AXCFG          4               // AXCFG
-#define RCINDXC        1               // PCIEIND
-#define RCINDXP        3               // PCIEIND_P
-
-#define GPP_DEV_NUM    21              //
-#define MAX_GPP_PORTS  4
-
-#define PCIE_FORCE_GEN1_EFUSE_LOCATION     0x14    // EFUSE bit 160
-//
-// ABCFG Registers
-//
-#define FCH_ABCFG_REG00     0x00  // VENDOR ID
-#define FCH_ABCFG_REG08     0x08  // REVISION ID
-#define FCH_ABCFG_REG40     0x40  // BL_EVENTCNT0LO
-#define FCH_ABCFG_REG44     0x44  // BL_EVENTCNT1LO
-#define FCH_ABCFG_REG48     0x48  // BL_EVENTCNTSEL
-#define FCH_ABCFG_REG4A     0x4A  // BL_EVENTCNT0HI
-#define FCH_ABCFG_REG4B     0x4B  // BL_EVENTCNT1HI
-#define FCH_ABCFG_REG4C     0x4C  // BL_EVENTCNTCTL
-#define FCH_ABCFG_REG50     0x50  // MISCCTL_50
-#define FCH_ABCFG_REG54     0x54  // MISCCTL_54
-#define FCH_ABCFG_REG58     0x58  // BL RAB CONTROL
-
-#define FCH_ABCFG_REG60     0x60  // LINKWIDTH_CTL
-#define FCH_ABCFG_REG64     0x64  // LINKWIDTH_UP_INTERVAL
-#define FCH_ABCFG_REG68     0x68  // LINKWIDTH_DN_INVERVAL
-#define FCH_ABCFG_REG6C     0x6C  // LINKWIDTH_UPSTREAM_DWORDS
-#define FCH_ABCFG_REG70     0x70  // LINKWIDTH_DOWNSTREAM_DWORDS
-#define FCH_ABCFG_REG74     0x74  // LINKWIDTH_THRESHOLD_INCREASE
-#define FCH_ABCFG_REG78     0x78  // LINKWIDTH_THRESHOLD_DECREASE
-
-#define FCH_ABCFG_REG80     0x80  // BL DMA PREFETCH CONTROL
-#define FCH_ABCFG_REG88     0x88  //
-#define FCH_ABCFG_REG8C     0x8C  //
-#define FCH_ABCFG_REG90     0x90  // BIF CONTROL 0
-#define FCH_ABCFG_REG94     0x94  // MSI CONTROL
-#define FCH_ABCFG_REG98     0x98  // BIF CONTROL 1
-#define FCH_ABCFG_REG9C     0x9C  // MISCCTL_9C
-#define FCH_ABCFG_REGA0     0xA0  // BIF PHY CONTROL ENABLE
-#define FCH_ABCFG_REGA4     0xA4  // BIF PHY CONTROL A4
-#define FCH_ABCFG_REGA8     0xA8  // BIF PHY CONTROL A8
-#define FCH_ABCFG_REGB0     0xB0  // HYPERFLASH-PCIE PORT MAPPING
-#define FCH_ABCFG_REGB8     0xB8  //
-#define FCH_ABCFG_REGB4     0xB4  //
-#define FCH_ABCFG_REGBC     0xBC  //
-#define FCH_ABCFG_REGC0     0xC0  // PCIE_GPP_ENABLE
-#define FCH_ABCFG_REGC4     0xC4  // PCIE_P2P_INT_MAP
-#define FCH_ABCFG_REGD0     0xD0  // MCTP_VDM_TX_FIFO_DATA
-#define FCH_ABCFG_REGD4     0xD4  // MCTP_VMD_TX_CONTROL
-#define FCH_ABCFG_REGE0     0xE0  // MCTP_VDM_RX_FIFO_DATA
-#define FCH_ABCFG_REGE4     0xE4  // MCTP_VDM_RX_FIFO_STATUS
-#define FCH_ABCFG_REGEC     0xEC  // MCTP_VDM_CONTROL
-#define FCH_ABCFG_REGF0     0xF0  // GPP_UPSTREAM_CONTROL
-#define FCH_ABCFG_REGF4     0xF4  // GPP_SYSTEM_ERROR_CONTROL
-#define FCH_ABCFG_REGFC     0xFC  // FCH_TRAP_CONTROL
-#define FCH_ABCFG_REG100    0x100 // FCH_TRAP0_ADDRL
-#define FCH_ABCFG_REG104    0x104 // FCH_TRAP0_ADDRH
-#define FCH_ABCFG_REG108    0x108 // FCH_TRAP0_CMD
-#define FCH_ABCFG_REG10C    0x10C // FCH_TRAP1_DATA
-#define FCH_ABCFG_REG110    0x110 // FCH_TRAP1_ADDRL
-#define FCH_ABCFG_REG114    0x114 // FCH_TRAP1_ADDRH
-#define FCH_ABCFG_REG118    0x118 // FCH_TRAP1_CMD
-#define FCH_ABCFG_REG11C    0x11C // FCH_TRAP1_DATA
-#define FCH_ABCFG_REG120    0x120 // FCH_TRAP2_ADDRL
-#define FCH_ABCFG_REG124    0x124 // FCH_TRAP2_ADDRH
-#define FCH_ABCFG_REG128    0x128 // FCH_TRAP2_CMD
-#define FCH_ABCFG_REG12C    0x12C // FCH_TRAP2_DATA
-#define FCH_ABCFG_REG130    0x130 // FCH_TRAP3_ADDRL
-#define FCH_ABCFG_REG134    0x134 // FCH_TRAP3_ADDRH
-#define FCH_ABCFG_REG138    0x138 // FCH_TRAP3_CMD
-#define FCH_ABCFG_REG13C    0x13C // FCH_TRAP3_DATA
-#define FCH_ABCFG_REG180    0x180 // FCH_DMA_TRAFFIC_CONTROL
-#define FCH_ABCFG_REG184    0x184 // FCH_AXI_DMA_MEMORY_POWER_SAVING
-#define FCH_ABCFG_REG208    0x208 // SBG_MISC
-#define FCH_ABCFG_REG300    0x300 // MCTP_VDM_RX_SMI_CONTROL
-#define FCH_ABCFG_REG310    0x310 // BIF_GPP_STRAP_SYSTEM_0
-#define FCH_ABCFG_REG314    0x314 // BIF_GPP_STRAP_SYSTEM_1
-#define FCH_ABCFG_REG31C    0x31C // BIF_GPP_STRAP_LINK_CONTROL_0
-#define FCH_ABCFG_REG320    0x320 // BIF_GPP_STRAP_LINK_CONTROL_LANE_A
-#define FCH_ABCFG_REG324    0x324 // BIF_GPP_STRAP_LINK_CONTROL_LANE_B
-#define FCH_ABCFG_REG328    0x328 // BIF_GPP_STRAP_LINK_CONTROL_LANE_C
-#define FCH_ABCFG_REG32C    0x32C // BIF_GPP_STRAP_LINK_CONTROL_LANE_D
-#define FCH_ABCFG_REG330    0x330 // BIF_GPP_STRAP_BIF_0
-#define FCH_ABCFG_REG334    0x334 // BIF_GPP_STRAP_BIF_1
-#define FCH_ABCFG_REG338    0x338 // BIF_GPP_STRAP_BIF_2
-#define FCH_ABCFG_REG340    0x340 // BIF_GPP_STRAP_BIF_LANE_A
-#define FCH_ABCFG_REG344    0x344 // BIF_GPP_STRAP_BIF_LANE_B
-#define FCH_ABCFG_REG348    0x348 // BIF_GPP_STRAP_BIF_LANE_C
-#define FCH_ABCFG_REG34C    0x34C // BIF_GPP_STRAP_BIF_LANE_D
-#define FCH_ABCFG_REG350    0x350 // BIF_GPP_STRAP_PHY_LOGICAL _0
-#define FCH_ABCFG_REG354    0x354 // BIF_GPP_STRAP_PHY_LOGICAL _1
-#define FCH_ABCFG_REG404    0x404 // GPP0_SHADOW_COMMAND
-#define FCH_ABCFG_REG418    0x418 // GPP0_SHADOW_BUS_NUMBER
-#define FCH_ABCFG_REG41C    0x41C // GPP0_SHADOW_IO_LIMIT_BASE
-#define FCH_ABCFG_REG420    0x420 // GPP0_SHADOW_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG424    0x424 // GPP0_SHADOW_PREF_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG428    0x428 // GPP0_SHADOW_PREF_MEM_BASE_UPPER
-#define FCH_ABCFG_REG42C    0x42C // GPP0_SHADOW_PREF_MEM_LIMIT_UPPER
-#define FCH_ABCFG_REG430    0x430 // GPP0_SHADOW_IO_LIMIT_BASE_UPPER
-#define FCH_ABCFG_REG43C    0x43C // GPP0_SHADOW_BRIDGE_CONTROL
-#define FCH_ABCFG_REG444    0x444 // GPP1_SHADOW_COMMAND
-#define FCH_ABCFG_REG458    0x458 // GPP1_SHADOW_BUS_NUMBER
-#define FCH_ABCFG_REG45C    0x45C // GPP1_SHADOW_IO_LIMIT_BASE
-#define FCH_ABCFG_REG460    0x460 // GPP1_SHADOW_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG464    0x464 // GPP1_SHADOW_PREF_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG468    0x468 // GPP1_SHADOW_PREF_MEM_BASE_UPPER
-#define FCH_ABCFG_REG46C    0x46C // GPP1_SHADOW_PREF_MEM_LIMIT_UPPER
-#define FCH_ABCFG_REG470    0x470 // GPP1_SHADOW_IO_LIMIT_BASE_UPPER
-#define FCH_ABCFG_REG47C    0x47C // GPP1_SHADOW_BRIDGE_CONTROL
-#define FCH_ABCFG_REG484    0x484 // GPP2_SHADOW_COMMAND
-#define FCH_ABCFG_REG498    0x498 // GPP2_SHADOW_BUS_NUMBER
-#define FCH_ABCFG_REG49C    0x49C // GPP2_SHADOW_IO_LIMIT_BASE
-#define FCH_ABCFG_REG4A0    0x4A0 // GPP2_SHADOW_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG4A4    0x4A4 // GPP2_SHADOW_PREF_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG4A8    0x4A8 // GPP2_SHADOW_PREF_MEM_BASE_UPPER
-#define FCH_ABCFG_REG4AC    0x4AC // GPP2_SHADOW_PREF_MEM_LIMIT_UPPER
-#define FCH_ABCFG_REG4B0    0x4B0 // GPP2_SHADOW_IO_LIMIT_BASE_UPPER
-#define FCH_ABCFG_REG4BC    0x4BC // GPP2_SHADOW_BRIDGE_CONTROL
-#define FCH_ABCFG_REG4C4    0x4C4 // GPP3_SHADOW_COMMAND
-#define FCH_ABCFG_REG4D8    0x4D8 // GPP3_SHADOW_BUS_NUMBER
-#define FCH_ABCFG_REG4DC    0x4DC // GPP3_SHADOW_IO_LIMIT_BASE
-#define FCH_ABCFG_REG4E0    0x4E0 // GPP3_SHADOW_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG4E4    0x4E4 // GPP3_SHADOW_PREF_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG4E8    0x4E8 // GPP3_SHADOW_PREF_MEM_BASE_UPPER
-#define FCH_ABCFG_REG4EC    0x4EC // GPP3_SHADOW_PREF_MEM_LIMIT_UPPER
-#define FCH_ABCFG_REG4F0    0x4F0 // GPP3_SHADOW_IO_LIMIT_BASE_UPPER
-#define FCH_ABCFG_REG4FC    0x4FC // GPP3_SHADOW_BRIDGE_CONTROL
-#define FCH_ABCFG_REG10040  0x10040ul  // AL_EVENTCNT0LO
-#define FCH_ABCFG_REG10044  0x10044ul  // AL_EVENTCNT1LO
-#define FCH_ABCFG_REG10048  0x10048ul  // AL_EVENTCNTSEL
-#define FCH_ABCFG_REG1004A  0x1004Aul  // AL_EVENTCNT0HI
-#define FCH_ABCFG_REG1004B  0x1004Bul  // AL_EVENTCNT1HI
-#define FCH_ABCFG_REG1004C  0x1004Cul  // AL_EVENTCNTCTL
-#define FCH_ABCFG_REG10050  0x10050ul  // MISCCTL_10050
-#define FCH_ABCFG_REG10054  0x10054ul  // AL_ARB_CTL
-#define FCH_ABCFG_REG10056  0x10056ul  // AL_CLK_CTL
-#define FCH_ABCFG_REG10058  0x10058ul  // AL RAB CONTROL
-#define FCH_ABCFG_REG1005C  0x1005Cul  // AL MLT CONTROL
-#define FCH_ABCFG_REG10060  0x10060ul  // AL DMA PREFETCH ENABLE
-#define FCH_ABCFG_REG10064  0x10064ul  // AL DMA PREFETCH FLUSH CONTROL
-#define FCH_ABCFG_REG10068  0x10068ul  // AL PREFETCH LIMIT
-#define FCH_ABCFG_REG1006C  0x1006Cul  // AL DMA PREFETCH CONTROL
-#define FCH_ABCFG_REG10070  0x10070ul  // MISCCTL_10070
-#define FCH_ABCFG_REG10080  0x10080ul  // CLKMUXSTATUS
-#define FCH_ABCFG_REG10090  0x10090ul  // BIF CONTROL 0
-#define FCH_ABCFG_REG1009C  0x1009Cul  // MISCCTL_1009C
-
-//
-// RCINDX_P Registers
-//
-#define FCH_RCINDXP_REG01   0x01 | RCINDXP << 29 // PCIEP_SCRATCH
-#define FCH_RCINDXP_REG02   0x02 | RCINDXP << 29 //
-#define FCH_RCINDXP_REG10   0x10 | RCINDXP << 29 //
-#define FCH_RCINDXP_REG20   0x20 | RCINDXP << 29 // PCIE_TX_CNTL
-#define FCH_RCINDXP_REG21   0x21 | RCINDXP << 29 // PCIE_TX_REQUESTER_ID
-#define FCH_RCINDXP_REG50   0x50 | RCINDXP << 29 // PCIE_P_PORT_LANE_STATUS
-#define FCH_RCINDXP_REG6A   0x6A | RCINDXP << 29 //
-#define FCH_RCINDXP_REG70   0x70 | RCINDXP << 29 // PCIE_RX_CNTL
-#define FCH_RCINDXP_REGA0   0xA0 | RCINDXP << 29 // PCIE_LC_CNTL
-#define FCH_RCINDXP_REGA1   0xA1 | RCINDXP << 29 // PCIE_LC_TRAINING_CNTL
-#define FCH_RCINDXP_REGA2   0xA2 | RCINDXP << 29 //
-#define FCH_RCINDXP_REGA4   0xA4 | RCINDXP << 29 //
-#define FCH_RCINDXP_REGA5   0xA5 | RCINDXP << 29 // PCIE_LC_STATE0
-#define FCH_RCINDXP_REGC0   0xC0 | RCINDXP << 29 //
-
-//
-// RCINDX_C Registers
-//
-#define FCH_RCINDXC_REG02   0x02 | RCINDXC << 29  // PCIE_HW_DEBUG
-#define FCH_RCINDXC_REG10   0x10 | RCINDXC << 29  // PCIE_CNTL
-#define FCH_RCINDXC_REG40   0x40 | RCINDXC << 29  // PCIE_P_CNTL
-#define FCH_RCINDXC_REG65   0x65 | RCINDXC << 29  // PCIE_P_PAD_FORCE_DIS
-#define FCH_RCINDXC_REGC0   0xC0 | RCINDXC << 29  // PCIE_STRAP_MISC
-#define FCH_RCINDXC_REGC1   0xC1 | RCINDXC << 29  // PCIE_STRAP_MISC2
-
-
-//
-// AXINDC Registers
-//
-#define FCH_AX_INDXC_REG02  0x02 // PCIEP_HW_DEBUG
-#define FCH_AX_INDXC_REG10  0x10
-#define FCH_AX_INDXC_REG30  0x30
-#define FCH_AX_DATAC_REG34  0x34
-#define FCH_AX_INDXP_REG38  0x38
-#define FCH_AX_DATAP_REG3C  0x3C
-#define FCH_AX_INDXC_REG40  0x40 | AXINDC << 29
-#define FCH_AX_INDXC_REGA4  0xA4 | AXINDC << 29
-
-#define FCH_AX_INDXP_REG02  0x02 | AXINDP << 29
-#define FCH_AX_INDXP_REGA0  0xA0 | AXINDP << 29
-#define FCH_AX_INDXP_REGA4  0xA4 | AXINDP << 29
-#define FCH_AX_INDXP_REGB1  0xB1 | AXINDP << 29
-
-#define FCH_AX_CFG_REG68  0x68 | AXCFG << 29
-#define FCH_AX_CFG_REG88  0x88 | AXCFG << 29
-
-#define FCH_AB_REG04         0x04
-#define FCH_AB_REG40         0x40
-
-//Sata Port Configuration
-#define SIX_PORTS       0
-#define FOUR_PORTS      1
-
-#define SATA_EFUSE_LOCATION     0x10    // EFUSE bit 133
-#define SATA_DH_EFUSE_LOCATION  0x11    // EFUSE bit 138
-#define SATA_FIS_BASE_EFUSE_LOC 0x15    // EFUSE bit 169
-#define SATA_EFUSE_BIT          0x20    //
-#define SATA_DH_EFUSE_BIT       0x04    //
-#define FCH_SATA_REG00           0x000   // Vendor ID - R- 16 bits
-#define FCH_SATA_REG02           0x002   // Device ID - RW -16 bits
-#define FCH_SATA_REG04           0x004   // PCI Command - RW - 16 bits
-#define FCH_SATA_REG06           0x006   // PCI Status - RW - 16 bits
-#define FCH_SATA_REG08           0x008   // Revision ID/PCI Class Code - R - 32 bits - Offset: 08
-#define FCH_SATA_REG0C           0x00C   // Cache Line Size - R/W - 8bits
-#define FCH_SATA_REG0D           0x00D   // Latency Timer - RW - 8 bits
-#define FCH_SATA_REG0E           0x00E   // Header Type - R - 8 bits
-#define FCH_SATA_REG0F           0x00F   // BIST - R - 8 bits
-#define FCH_SATA_REG10           0x010   // Base Address Register 0 - RW - 32 bits
-#define FCH_SATA_REG14           0x014   // Base Address Register 1 - RW- 32 bits
-#define FCH_SATA_REG18           0x018   // Base Address Register 2 - RW - 32 bits
-#define FCH_SATA_REG1C           0x01C   // Base Address Register 3 - RW - 32 bits
-#define FCH_SATA_REG20           0x020   // Base Address Register 4 - RW - 32 bits
-#define FCH_SATA_REG24           0x024   // Base Address Register 5 - RW - 32 bits
-#define FCH_SATA_REG2C           0x02C   // Subsystem Vendor ID - R - 16 bits
-#define FCH_SATA_REG2D           0x02D   // Subsystem ID - R - 16 bits
-#define FCH_SATA_REG30           0x030   // Expansion ROM Base Address - 32 bits
-#define FCH_SATA_REG34           0x034   // Capabilities Pointer - R - 32 bits
-#define FCH_SATA_REG3C           0x03C   // Interrupt Line - RW - 8 bits
-#define FCH_SATA_REG3D           0x03D   // Interrupt Pin - R - 8 bits
-#define FCH_SATA_REG3E           0x03E   // Min Grant - R - 8 bits
-#define FCH_SATA_REG3F           0x03F   // Max Latency - R - 8 bits
-#define FCH_SATA_REG40           0x040   // Configuration - RW - 32 bits
-#define FCH_SATA_REG44           0x044   // Software Data Register - RW - 32 bits
-#define FCH_SATA_REG48           0x048
-#define FCH_SATA_REG4C           0x04C
-#define FCH_SATA_REG50           0x050   // Message Capability - R - 16 bits
-#define FCH_SATA_REG52           0x052   // Message Control - R/W - 16 bits
-#define FCH_SATA_REG54           0x054   // Message Address - R/W - 32 bits
-#define FCH_SATA_REG58           0x058   // Message Data - R/W - 16 bits
-#define FCH_SATA_REG5C           0x05C   // RAMBIST Control Register - R/W - 8 bits
-#define FCH_SATA_REG5D           0x05D   // RAMBIST Status0 Register - R - 8 bits
-#define FCH_SATA_REG5E           0x05E   // RAMBIST Status1 Register - R - 8 bits
-#define FCH_SATA_REG60           0x060   // Power Management Capabilities - R - 32 bits
-#define FCH_SATA_REG64           0x064   // Power Management Control + Status - RW - 32 bits
-#define FCH_SATA_REG68           0x068   // MSI Program - R/W - 8 bits
-#define FCH_SATA_REG69           0x069   // PCI Burst Timer - R/W - 8 bits
-#define FCH_SATA_REG70           0x070   // PCI Bus Master - IDE0 - RW - 32 bits
-#define FCH_SATA_REG74           0x074   // PRD Table Address - IDE0 - RW - 32 bits
-#define FCH_SATA_REG78           0x078   // PCI Bus Master - IDE1 - RW - 32 bits
-#define FCH_SATA_REG7C           0x07C   // PRD Table Address - IDE1 - RW - 32 bits
-#define FCH_SATA_REG80           0x080   // Data Transfer Mode - IDE0 - RW - 32 bits
-#define FCH_SATA_REG84           0x084   // Data Transfer Mode - IDE1 - RW - 32 bits
-#define FCH_SATA_REG86           0x086   // PY Global Control
-#define FCH_SATA_REG87           0x087
-#define FCH_SATA_REG88           0x088   // PHY Port0 Control - Port0 PY fine tune (0:23)
-#define FCH_SATA_REG8A           0x08A
-#define FCH_SATA_REG8C           0x08C   // PHY Port1 Control - Port0 PY fine tune (0:23)
-#define FCH_SATA_REG8E           0x08E
-#define FCH_SATA_REG90           0x090   // PHY Port2 Control - Port0 PY fine tune (0:23)
-#define FCH_SATA_REG92           0x092
-#define FCH_SATA_REG94           0x094   // PHY Port3 Control - Port0 PY fine tune (0:23)
-#define FCH_SATA_REG96           0x096
-#define FCH_SATA_REG98           0x098   // EEPROM Memory Address - Command + Status - RW - 32 bits
-#define FCH_SATA_REG9C           0x09C   // EEPROM Memory Data - RW - 32 bits
-#define FCH_SATA_REGA0           0x0A0   //
-#define FCH_SATA_REGA4           0x0A4   //
-#define FCH_SATA_REGA5           0x0A5   //;
-#define FCH_SATA_REGA8           0x0A8   //
-#define FCH_SATA_REGAD           0x0AD   //;
-#define FCH_SATA_REGB0           0x0B0   // IDE1 Task File Configuration + Status - RW - 32 bits
-#define FCH_SATA_REGB5           0x0B5   //;
-#define FCH_SATA_REGBD           0x0BD   //;
-#define FCH_SATA_REGC0           0x0C0   // BA5 Indirect Address - RW - 32 bits
-#define FCH_SATA_REGC4           0x0C4   // BA5 Indirect Access - RW - 32 bits
-
-#define FCH_SATA_BAR5_REG00      0x000   // PCI Bus Master - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG04      0x004   // PRD Table Address - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG08      0x008   // PCI Bus Master - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG0C      0x00C   // PRD Table Address - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG10      0x010   // PCI Bus Master2 - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG1C      0x01C
-#define FCH_SATA_BAR5_REG18      0x018   // PCI Bus Master2 - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG20      0x020   // PRD Address - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG24      0x024   // PCI Bus Master Byte Count - IDE0- RW - 32 bits
-#define FCH_SATA_BAR5_REG28      0x028   // PRD Address - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG2C      0x02C   // PCI Bus Master Byte Count - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG40      0x040   // FIFO Valid Byte Count and Control - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG44      0x044   // FIFO Valid Byte Count and Control - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG48      0x048   // System Configuration Status - Command - RW - 32 bits
-#define FCH_SATA_BAR5_REG4C      0x04C   // System Software Data Register - RW - 32 bits
-#define FCH_SATA_BAR5_REG50      0x050   // FLAS Memory Address - Command + Status - RW - 32 bits
-#define FCH_SATA_BAR5_REG54      0x054   // FLAS Memory Data - RW - 32 bits
-#define FCH_SATA_BAR5_REG58      0x058   // EEPROM Memory Address - Command + Status - RW - 32 bits
-#define FCH_SATA_BAR5_REG5C      0x05C   // EEPROM Memory Data - RW - 32 bits
-#define FCH_SATA_BAR5_REG60      0x060   // FIFO Port - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG68      0x068   // FIFO Pointers1- IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG6C      0x06C   // FIFO Pointers2- IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG70      0x070   // FIFO Port - IDE1- RW - 32 bits
-#define FCH_SATA_BAR5_REG78      0x078   // FIFO Pointers1- IDE1- RW - 32 bits
-#define FCH_SATA_BAR5_REG7C      0x07C   // FIFO Pointers2- IDE1- RW - 32 bits
-#define FCH_SATA_BAR5_REG80      0x080   // IDE0 Task File Register 0- RW - 32 bits
-#define FCH_SATA_BAR5_REG84      0x084   // IDE0 Task File Register 1- RW - 32 bits
-#define FCH_SATA_BAR5_REG88      0x088   // IDE0 Task File Register 2- RW - 32 bits
-#define FCH_SATA_BAR5_REG8C      0x08C   // IDE0 Read Data - RW - 32 bits
-#define FCH_SATA_BAR5_REG90      0x090   // IDE0 Task File Register 0 - Command Buffering - RW - 32 bits
-#define FCH_SATA_BAR5_REG94      0x094   // IDE0 Task File Register 1 - Command Buffering - RW - 32 bits
-#define FCH_SATA_BAR5_REG9C      0x09C   // IDE0 Virtual DMA/PIO Read Byte Count - RW - 32 bits
-#define FCH_SATA_BAR5_REGA0      0x0A0   // IDE0 Task File Configuration + Status - RW - 32 bits
-#define FCH_SATA_BAR5_REGB4      0x0B4   // Data Transfer Mode -IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REGC0      0x0C0   // IDE1 Task File Register 0 - RW - 32 bits
-#define FCH_SATA_BAR5_REGC4      0x0C4   // IDE1 Task File Register 1 - RW - 32 bits
-#define FCH_SATA_BAR5_REGC8      0x0C8   // IDE1 Task File Register 2 - RW - 32 bits
-#define FCH_SATA_BAR5_REGCC      0x0CC   //  Read/Write Data - RW - 32 bits
-#define FCH_SATA_BAR5_REGD0      0x0D0   // IDE1 Task File Register 0 - Command Buffering - RW - 32 bits
-#define FCH_SATA_BAR5_REGD4      0x0D4   // IDE1 Task File Register 1 - Command Buffering - RW - 32 bits
-#define FCH_SATA_BAR5_REGDC      0x0DC   // IDE1 Virtual DMA/PIO Read Byte Count - RW - 32 bits
-#define FCH_SATA_BAR5_REGE0      0x0E0   // IDE1 Task File Configuration + Status - RW - 32 bits
-#define FCH_SATA_BAR5_REGF4      0x0F4   // Data Transfer Mode - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REGF8      0x0F8   // PORT Configuration
-#define FCH_SATA_BAR5_REGFC      0x0FC
-#define FCH_SATA_BAR5_REG100     0x0100  // Serial ATA SControl - RW - 32 bits - [Offset: 100h (channel 1) / 180
-#define FCH_SATA_BAR5_REG104     0x0104  // Serial ATA Sstatus - RW - 32 bits - [Offset: 104h (channel 1) / 184h (cannel
-#define FCH_SATA_BAR5_REG108     0x0108  // Serial ATA Serror - RW - 32 bits - [Offset: 108h (channel 1) / 188h (cannel
-#define FCH_SATA_BAR5_REG10C     0x010C  // Serial ATA Sdevice - RW - 32 bits - [Offset: 10Ch (channel 1) / 18Ch (cannel
-#define FCH_SATA_BAR5_REG144     0x0144  // Serial ATA PY Configuration - RW - 32 bits
-#define FCH_SATA_BAR5_REG148     0x0148  // SIEN - RW - 32 bits - [Offset: 148 (channel 1) / 1C8 (cannel 2)]
-#define FCH_SATA_BAR5_REG14C     0x014C  // SFISCfg - RW - 32 bits - [Offset: 14C (channel 1) / 1CC (cannel 2)]
-#define FCH_SATA_BAR5_REG120     0x0120  //
-#define FCH_SATA_BAR5_REG128     0x0128  // Port Serial ATA Status
-#define FCH_SATA_BAR5_REG12C     0x012C  // Port Serial ATA Control
-#define FCH_SATA_BAR5_REG130     0x0130
-#define FCH_SATA_BAR5_REG1B0     0x01B0
-#define FCH_SATA_BAR5_REG230     0x0230
-#define FCH_SATA_BAR5_REG2B0     0x02B0
-#define FCH_SATA_BAR5_REG330     0x0330
-#define FCH_SATA_BAR5_REG3B0     0x03B0
-#define FCH_SATA_BAR5_REG430     0x0430
-#define FCH_SATA_BAR5_REG4B0     0x04B0
-
-
-// USB ports
-#define NUM_USB1_PORTS           5
-#define NUM_USB2_PORTS           5
-#define NUM_USB3_PORTS           4
-#define NUM_USB4_PORTS           2
-#define NUM_XHC0_PORTS           2
-#define NUM_XHC1_PORTS           2
-
-
-//
-//  USB OHCI Device 0x7807
-//  Device 18 (0x11)/Device 19 (0x12)/Device 22 (0x16) Func 0
-//  Device 20 (0x14) Func 5 (FL) 0x7809
-//
-#define FCH_OHCI_REG00           0x00        // Device/Vendor ID - R (0x43971002ul)
-#define FCH_OHCI_REG04           0x04        // Command - RW
-#define FCH_OHCI_REG06           0x06        // Status - R
-#define FCH_OHCI_REG08           0x08        // Revision ID/Class Code - R
-#define FCH_OHCI_REG0C           0x0C        // Miscellaneous - RW
-#define FCH_OHCI_REG10           0x10        // Bar_OCI - RW
-#define FCH_OHCI_REG2C           0x2C        // Subsystem Vendor ID/ Subsystem ID - RW
-#define FCH_OHCI_REG34           0x34        // Capability Pointer - R
-#define FCH_OHCI_REG3C           0x3C        // Interrupt Line - RW
-#define FCH_OHCI_REG3D           0x3D        // Interrupt Line - RW
-#define FCH_OHCI_REG40           0x40        // Config Timers - RW
-#define FCH_OHCI_REG42           0x42        // Port Disable Control - RW (800)
-#define FCH_OHCI_REG46           0x46        // USB PHY Battery Charger - RW (800)
-#define FCH_OHCI_REG48           0x48        // Port Force Reset - RW (800)
-#define FCH_OHCI_REG4C           0x4C        // MSI - RW   (800)
-#define FCH_OHCI_REG50           0x50        // Misc Control - RW
-#define FCH_OHCI_REG51           0x51
-#define FCH_OHCI_REG52           0x52
-#define FCH_OHCI_REG58           0x58        // Over Current Control - RW
-#define FCH_OHCI_REG5C           0x5C        // Over Current Control - RW
-#define FCH_OHCI_REG60           0x60        // Serial Bus Release Number - RW
-#define FCH_OHCI_REG68           0x68        // Over Current PME Enable - RW
-#define FCH_OHCI_REG74           0x74        // Target Timeout Control - RW
-#define FCH_OHCI_REG80           0x80        //
-#define FCH_OHCI_REGD0           0x0D0       // MSI Control - RW
-#define FCH_OHCI_REGD4           0x0D4       // MSI Address - RW
-#define FCH_OHCI_REGD8           0x0D8       // MSI Data - RW
-#define FCH_OHCI_REGE4           0x0E4       // HT MSI Support
-#define FCH_OHCI_REGF0           0x0F0       // Function Level Reset Capability
-#define FCH_OHCI_REGF4           0x0F4       // Function Level Reset Control
-
-#define FCH_OHCI_BAR_REG00       0x00        // cRevision - R
-#define FCH_OHCI_BAR_REG04       0x04        // cControl
-#define FCH_OHCI_BAR_REG08       0x08        // cCommandStatus
-#define FCH_OHCI_BAR_REG0C       0x0C        // cInterruptStatus  RW
-#define FCH_OHCI_BAR_REG10       0x10        // cInterruptEnable
-#define FCH_OHCI_BAR_REG14       0x14        // cInterruptDisable
-#define FCH_OHCI_BAR_REG18       0x18        // HcCCA
-#define FCH_OHCI_BAR_REG1C       0x1C        // cPeriodCurrentED
-#define FCH_OHCI_BAR_REG20       0x20        // HcControleadED
-#define FCH_OHCI_BAR_REG24       0x24        // cControlCurrentED  RW
-#define FCH_OHCI_BAR_REG28       0x28        // HcBulkeadED
-#define FCH_OHCI_BAR_REG2C       0x2C        // cBulkCurrentED- RW
-#define FCH_OHCI_BAR_REG30       0x30        // HcDoneead
-#define FCH_OHCI_BAR_REG34       0x34        // cFmInterval
-#define FCH_OHCI_BAR_REG38       0x38        // cFmRemaining
-#define FCH_OHCI_BAR_REG3C       0x3C        // cFmNumber
-#define FCH_OHCI_BAR_REG40       0x40        // cPeriodicStart
-#define FCH_OHCI_BAR_REG44       0x44        // HcLSThresold
-#define FCH_OHCI_BAR_REG48       0x48        // HcRDescriptorA
-#define FCH_OHCI_BAR_REG4C       0x4C        // HcRDescriptorB
-#define FCH_OHCI_BAR_REG50       0x50        // HcRStatus
-#define FCH_OHCI_BAR_REG54       0x54        // HcRhPortStatus (800)
-#define FCH_OHCI_BAR_REG58       0x58        // HcRhPortStatus NPD (800)
-#define FCH_OHCI_BAR_REGF0       0xF0        // OHCI Loop Back feature Support (800)
-
-#define FCH_OHCI_PORTSC_CCS      0x1         // HcRhPortStatus
-#define FCH_OHCI_PORTSC_PES      0x2         // HcRhPortStatus
-#define FCH_OHCI_PORTSC_PSS      0x4         // HcRhPortStatus
-#define FCH_OHCI_PORTSC_PPS      0x100       // HcRhPortStatus
-#define FCH_OHCI_PORTSC_LSDA     0x200       // HcRhPortStatus
-#define FCH_OHCI_PORTSC_PRS      0x10        // HcRhPortStatus
-
-//
-//  USB EHCI Device 0x7808
-//  Device 18 (0x11)/Device 19 (0x12)/Device 22 (0x16) Func 2
-//
-#define FCH_EHCI_REG00           0x00        // DEVICE/VENDOR ID - R
-#define FCH_EHCI_REG04           0x04        // Command - RW
-#define FCH_EHCI_REG06           0x06        // Status - R
-#define FCH_EHCI_REG08           0x08        // Revision ID/Class Code - R
-#define FCH_EHCI_REG0C           0x0C        // Miscellaneous - RW
-#define FCH_EHCI_REG10           0x10        // BAR - RW
-#define FCH_EHCI_REG2C           0x2C        // Subsystem ID/Subsystem Vendor ID - RW
-#define FCH_EHCI_REG34           0x34        // Capability Pointer - R
-#define FCH_EHCI_REG3C           0x3C        // Interrupt Line - RW
-#define FCH_EHCI_REG3D           0x3D        // Interrupt Line - RW
-#define FCH_EHCI_REG40           0x40        // Config Timers - RW
-#define FCH_EHCI_REG4C           0x4C        // MSI - RW
-#define FCH_EHCI_REG50           0x50        // EHCI Misc Control - RW
-#define FCH_EHCI_REG54           0x54        // EHCI Misc Control - RW
-#define FCH_EHCI_REG60           0x60        // SBRN - R
-#define FCH_EHCI_REG61           0x61        // FLADJ - RW
-#define FCH_EHCI_REG62           0x62        // PORTWAKECAP - RW
-#define FCH_EHCI_REG64           0x64        // Misc Control 2 - RW
-#define FCH_EHCI_REG70           0x70        // Over Current Control - RW
-#define FCH_EHCI_REG74           0x74        // EHCI Misc Control2 - RW
-#define FCH_EHCI_REG84           0x84        // HUB Configure 1 - RW
-#define FCH_EHCI_REG88           0x88        // - RW
-#define FCH_EHCI_REG90           0x90        // HUB Configure 4 - RW
-#define FCH_EHCI_REGA0           0xA0        //
-#define FCH_EHCI_REGA4           0xA4        //
-#define FCH_EHCI_REGC0           0x0C0       // PME control - RW (800)
-#define FCH_EHCI_REGC4           0x0C4       // PME Data /Status - RW (800)
-#define FCH_EHCI_REGD0           0x0D0       // MSI Control - RW
-#define FCH_EHCI_REGD4           0x0D4       // MSI Address - RW
-#define FCH_EHCI_REGD8           0x0D8       // MSI Data - RW
-#define FCH_EHCI_REGE4           0x0E4       // EHCI Debug Port Support - RW (800)
-#define FCH_EHCI_REGF0           0x0F0       // Function Level Reset Capability - R (800)
-#define FCH_EHCI_REGF4           0x0F4       // Function Level Reset Capability - R (800)
-
-#define FCH_EHCI_BAR_REG00       0x00        // CAPLENGT - R
-#define FCH_EHCI_BAR_REG02       0x002       // CIVERSION- R
-#define FCH_EHCI_BAR_REG04       0x004       // CSPARAMS - R
-#define FCH_EHCI_BAR_REG08       0x008       // CCPARAMS - R
-#define FCH_EHCI_BAR_REG0C       0x00C       // CSP-PORTROUTE - R
-
-#define FCH_EHCI_BAR_REG20       0x020       // USBCMD - RW - 32 bits
-#define FCH_EHCI_BAR_REG24       0x024       // USBSTS - RW - 32 bits
-#define FCH_EHCI_BAR_REG28       0x028       // USBINTR -RW - 32 bits
-#define FCH_EHCI_BAR_REG2C       0x02C       // FRINDEX -RW - 32 bits
-#define FCH_EHCI_BAR_REG30       0x030       // CTRLDSSEGMENT -RW - 32 bits
-#define FCH_EHCI_BAR_REG34       0x034       // PERIODICLISTBASE -RW - 32 bits
-#define FCH_EHCI_BAR_REG38       0x038       // ASYNCLISTADDR -RW - 32 bits
-#define FCH_EHCI_BAR_REG60       0x060       // CONFIGFLAG -RW - 32 bits
-#define FCH_EHCI_BAR_REG64       0x064       // PORTSC (1-N_PORTS) -RW - 32 bits
-#define FCH_EHCI_BAR_REGA0       0x0A0       // DebugPort MISC Control - RW - 32 bits (800)
-#define FCH_EHCI_BAR_REGA4       0x0A4       // Packet Buffer Threshold Values - RW - 32 bits
-#define FCH_EHCI_BAR_REGA8       0x0A8       // USB PHY Status 0 - R
-#define FCH_EHCI_BAR_REGAC       0x0AC       // USB PHY Status 1 - R
-#define FCH_EHCI_BAR_REGB0       0x0B0       // USB PHY Status 2 - R
-#define FCH_EHCI_BAR_REGB4       0x0B4       // UTMI Control - RW (800)
-#define FCH_EHCI_BAR_REGB8       0x0B8       // Loopback Test
-#define FCH_EHCI_BAR_REGBC       0x0BC       // EHCI MISC Control
-#define FCH_EHCI_BAR_REGC0       0x0C0       // USB PHY Calibration
-#define FCH_EHCI_BAR_REGC4       0x0C4       // USB Common PHY Control
-#define FCH_EHCI_BAR_REGC8       0x0C8       // EHCI Debug Purpose
-#define FCH_EHCI_BAR_REGCC       0x0CC       // Ehci Spare 1 (800) **
-#define FCH_EHCI_BAR_REGD0       0x0D0
-#define FCH_EHCI_BAR_REGD4       0x0D4
-#define FCH_EHCI_BAR_REGDC       0x0DC
-#define FCH_EHCI_BAR_REG100      0x100       // USB debug port
-
-//
-//  USB XHCI Device 0x7812/0x7814
-//  Device 16 (0x10) Func 0/1
-//
-#define FCH_XHCI_REG00           0x00        // DEVICE/VENDOR ID - R
-#define FCH_XHCI_REG04           0x04        // Command - RW
-#define FCH_XHCI_REG10           0x10        // Bar0
-#define FCH_XHCI_REG2C           0x2C        // Sub System ID
-#define FCH_XHCI_REG40           0x40        // Index0
-#define FCH_XHCI_REG44           0x44        // Data0
-#define FCH_XHCI_REG48           0x48        // Index1
-#define FCH_XHCI_REG4C           0x4C        // Data0
-#define FCH_XHCI_REG54           0x54        // PME Control/Status
-#define XHCI_EFUSE_LOCATION      0x18        // EFUSE bit 192, 193
-
-#define FCH_XHCI_BAR_REG420      0x420       // Port Status and Control
-#define FCH_XHCI_PORTSC_CCS      0x1         // Port Status and Control
-#define FCH_XHCI_PORTSC_PED      0x2         // Port Status and Control
-#define FCH_XHCI_PORTSC_PLS      0x1E0       // Port Status and Control
-#define FCH_XHCI_PORTSC_SPEED    0x3C00      // Port Status and Control
-#define FCH_XHCI_PORTSC_PR       0x10        // Port Status and Control
-
-//
-//  FCH CFG device  0x780B
-//  Device 20 (0x14) Func 0
-//
-#define FCH_CFG_REG00            0x000       // VendorID - R
-#define FCH_CFG_REG02            0x002       // DeviceID - R
-#define FCH_CFG_REG04            0x004       // Command- RW
-#define FCH_CFG_REG05            0x005       // Command- RW
-#define FCH_CFG_REG06            0x006       // STATUS- RW
-#define FCH_CFG_REG08            0x008       // Revision ID/Class Code- R
-#define FCH_CFG_REG0A            0x00A       //
-#define FCH_CFG_REG0B            0x00B       //
-#define FCH_CFG_REG0C            0x00C       // Cache Line Size- R
-#define FCH_CFG_REG0D            0x00D       // Latency Timer- R
-#define FCH_CFG_REG0E            0x00E       // Header Type- R
-#define FCH_CFG_REG0F            0x00F       // BIST- R
-#define FCH_CFG_REG10            0x010       // Base Address 0- R
-#define FCH_CFG_REG11            0x011       //;
-#define FCH_CFG_REG12            0x012       //;
-#define FCH_CFG_REG13            0x013       //;
-#define FCH_CFG_REG14            0x014       // Base Address 1- R
-#define FCH_CFG_REG18            0x018       // Base Address 2- R
-#define FCH_CFG_REG1C            0x01C       // Base Address 3- R
-#define FCH_CFG_REG20            0x020       // Base Address 4- R
-#define FCH_CFG_REG24            0x024       // Base Address 5- R
-#define FCH_CFG_REG28            0x028       // Cardbus CIS Pointer- R
-#define FCH_CFG_REG2C            0x02C       // Subsystem Vendor ID- W
-#define FCH_CFG_REG2E            0x02E       // Subsystem ID- W
-#define FCH_CFG_REG30            0x030       // Expansion ROM Base Address - R
-#define FCH_CFG_REG34            0x034       // Capability Pointer - R  (800) default changed as 0x00
-#define FCH_CFG_REG3C            0x03C       // Interrupt Line - R
-#define FCH_CFG_REG3D            0x03D       // Interrupt Pin - R
-#define FCH_CFG_REG3E            0x03E       // Min_Gnt - R
-#define FCH_CFG_REG3F            0x03F       // Max_Lat - R
-#define FCH_CFG_REG90            0x090       // Smbus Base Address - R
-#define FCH_CFG_REG9C            0x09C       // SBResourceMMIO_BASE
-
-//
-//  FCH SATA IDE device
-//  Device 20 (0x14) Func 1
-//
-
-#define FCH_IDE_REG00            0x00        // Vendor ID
-#define FCH_IDE_REG02            0x02        // Device ID
-#define FCH_IDE_REG04            0x04        // Command
-#define FCH_IDE_REG06            0x06        // Status
-#define FCH_IDE_REG08            0x08        // Revision ID/Class Code
-#define FCH_IDE_REG09            0x09        // Class Code
-#define FCH_IDE_REG2C            0x2C        // Subsystem ID and Subsystem Vendor ID
-#define FCH_IDE_REG40            0x40        // Configuration - RW - 32 bits
-#define FCH_IDE_REG34            0x34
-#define FCH_IDE_REG62            0x62        // IDE Internal Control
-#define FCH_IDE_REG63            0x63        // IDE Internal Control
-//
-//  FCH AZALIA device  0x780D
-//  Device 20 (0x14) Func 2
-//
-#define ATI_AZALIA_ExtBlk_Addr          0x0F8
-#define ATI_AZALIA_ExtBlk_DATA          0x0FC
-
-#define FCH_AZ_REG00             0x00        // Vendor ID - R
-#define FCH_AZ_REG02             0x02        // Device ID - R/W
-#define FCH_AZ_REG04             0x04        // PCI Command
-#define FCH_AZ_REG06             0x06        // PCI Status - R/W
-#define FCH_AZ_REG08             0x08        // Revision ID
-#define FCH_AZ_REG09             0x09        // Programming Interface
-#define FCH_AZ_REG0A             0x0A        // Sub Class Code
-#define FCH_AZ_REG0B             0x0B        // Base Class Code
-#define FCH_AZ_REG0C             0x0C        // Cache Line Size - R/W
-#define FCH_AZ_REG0D             0x0D        // Latency Timer
-#define FCH_AZ_REG0E             0x0E        // Header Type
-#define FCH_AZ_REG0F             0x0F        // BIST
-#define FCH_AZ_REG10             0x10        // Lower Base Address Register
-#define FCH_AZ_REG14             0x14        // Upper Base Address Register
-#define FCH_AZ_REG2C             0x2C        // Subsystem Vendor ID
-#define FCH_AZ_REG2D             0x2D        // Subsystem ID
-#define FCH_AZ_REG34             0x34        // Capabilities Pointer
-#define FCH_AZ_REG3C             0x3C        // Interrupt Line
-#define FCH_AZ_REG3D             0x3D        // Interrupt Pin
-#define FCH_AZ_REG3E             0x3E        // Minimum Grant
-#define FCH_AZ_REG3F             0x3F        // Maximum Latency
-#define FCH_AZ_REG40             0x40        // Misc Control 1
-#define FCH_AZ_REG42             0x42        // Misc Control 2 Register
-#define FCH_AZ_REG43             0x43        // Misc Control 3 Register
-#define FCH_AZ_REG44             0x44        // Interrupt Pin Control Register
-#define FCH_AZ_REG46             0x46        // Debug Control Register
-#define FCH_AZ_REG4C             0x4C
-#define FCH_AZ_REG50             0x50        // Power Management Capability ID
-#define FCH_AZ_REG52             0x52        // Power Management Capabilities
-#define FCH_AZ_REG54             0x54        // Power Management Control/Status
-#define FCH_AZ_REG60             0x60        // MSI Capability ID
-#define FCH_AZ_REG62             0x62        // MSI Message Control
-#define FCH_AZ_REG64             0x64        // MSI Message Lower Address
-#define FCH_AZ_REG68             0x68        // MSI Message Upper Address
-#define FCH_AZ_REG6C             0x6C        // MSI Message Data
-
-#define FCH_AZ_BAR_REG00         0x00        // Global Capabilities - R
-#define FCH_AZ_BAR_REG02         0x02        // Minor Version - R
-#define FCH_AZ_BAR_REG03         0x03        // Major Version - R
-#define FCH_AZ_BAR_REG04         0x04        // Output Payload Capability - R
-#define FCH_AZ_BAR_REG06         0x06        // Input Payload Capability - R
-#define FCH_AZ_BAR_REG08         0x08        // Global Control - R/W
-#define FCH_AZ_BAR_REG0C         0x0C        // Wake Enable - R/W
-#define FCH_AZ_BAR_REG0E         0x0E        // State Change Status - R/W
-#define FCH_AZ_BAR_REG10         0x10        // Global Status - R/W
-#define FCH_AZ_BAR_REG18         0x18        // Output Stream Payload Capability - R
-#define FCH_AZ_BAR_REG1A         0x1A        // Input Stream Payload Capability - R
-#define FCH_AZ_BAR_REG20         0x20        // Interrupt Control - R/W
-#define FCH_AZ_BAR_REG24         0x24        // Interrupt Status - R/W
-#define FCH_AZ_BAR_REG30         0x30        // Wall Clock Counter - R
-#define FCH_AZ_BAR_REG38         0x38        // Stream Synchronization - R/W
-#define FCH_AZ_BAR_REG40         0x40        // CORB Lower Base Address - R/W
-#define FCH_AZ_BAR_REG44         0x44        // CORB Upper Base Address - RW
-#define FCH_AZ_BAR_REG48         0x48        // CORB Write Pointer - R/W
-#define FCH_AZ_BAR_REG4A         0x4A        // CORB Read Pointer - R/W
-#define FCH_AZ_BAR_REG4C         0x4C        // CORB Control - R/W
-#define FCH_AZ_BAR_REG4D         0x4D        // CORB Status - R/W
-#define FCH_AZ_BAR_REG4E         0x4E        // CORB Size - R/W
-#define FCH_AZ_BAR_REG50         0x50        // RIRB Lower Base Address - RW
-#define FCH_AZ_BAR_REG54         0x54        // RIRB Upper Address - RW
-#define FCH_AZ_BAR_REG58         0x58        // RIRB Write Pointer - RW
-#define FCH_AZ_BAR_REG5A         0x5A        // RIRB Response Interrupt Count - R/W
-#define FCH_AZ_BAR_REG5C         0x5C        // RIRB Control - R/W
-#define FCH_AZ_BAR_REG5D         0x5D        // RIRB Status - R/W
-#define FCH_AZ_BAR_REG5E         0x5E        // RIRB Size - R/W
-#define FCH_AZ_BAR_REG60         0x60        // Immediate Command Output Interface - R/W
-#define FCH_AZ_BAR_REG64         0x64        // Immediate Command Input Interface - R/W
-#define FCH_AZ_BAR_REG68         0x68        // Immediate Command Input Interface - R/W
-#define FCH_AZ_BAR_REG70         0x70        // DMA Position Lower Base Address - R/W
-#define FCH_AZ_BAR_REG74         0x74        // DMA Position Upper Base Address - R/W
-#define FCH_AZ_BAR_REG2030       0x2030      // Wall Clock Counter Alias - R
-
-//
-//  FCH LPC Device  0x780E
-//  Device 20 (0x14) Func 3
-//
-#define FCH_LPC_REG00            0x00        // VID- R
-#define FCH_LPC_REG02            0x02        // DID- R
-#define FCH_LPC_REG04            0x04        // CMD- RW
-#define FCH_LPC_REG06            0x06        // STATUS- RW
-#define FCH_LPC_REG08            0x08        // Revision  ID/Class Code - R
-#define FCH_LPC_REG0C            0x0C        // Cache Line Size - R
-#define FCH_LPC_REG0D            0x0D        // Latency Timer - R
-#define FCH_LPC_REG0E            0x0E        // Header Type - R
-#define FCH_LPC_REG0F            0x0F        // BIST- R
-#define FCH_LPC_REG10            0x10        // Base Address Reg 0- RW*
-#define FCH_LPC_REG2C            0x2C        // Subsystem ID & Subsystem Vendor ID - Wo/Ro
-#define FCH_LPC_REG34            0x34        // Capabilities Pointer - Ro
-#define FCH_LPC_REG40            0x40        // PCI Control - RW
-#define FCH_LPC_REG44            0x44        // IO Port Decode Enable Register 1- RW
-#define FCH_LPC_REG45            0x45        // IO Port Decode Enable Register 2- RW
-#define FCH_LPC_REG46            0x46        // IO Port Decode Enable Register 3- RW
-#define FCH_LPC_REG47            0x47        // IO Port Decode Enable Register 4- RW
-#define FCH_LPC_REG48            0x48        // IO/Mem Port Decode Enable Register 5- RW
-#define FCH_LPC_REG49            0x49        // LPC Sync Timeout Count - RW
-#define FCH_LPC_REG4A            0x4A        // IO/Mem Port Decode Enable Register 6- RW
-#define FCH_LPC_REG4C            0x4C        // Memory Range Register - RW
-#define FCH_LPC_REG50            0x50        // Rom Protect 0 - RW
-#define FCH_LPC_REG54            0x54        // Rom Protect 1 - RW
-#define FCH_LPC_REG58            0x58        // Rom Protect 2 - RW
-#define FCH_LPC_REG5C            0x5C        // Rom Protect 3 - RW
-#define FCH_LPC_REG60            0x60        // PCI Memory Start Address of LPC Target Cycles -
-#define FCH_LPC_REG62            0x62        // PCI Memory End Address of LPC Target Cycles -
-#define FCH_LPC_REG64            0x64        // PCI IO base Address of Wide Generic Port - RW
-#define FCH_LPC_REG65            0x65
-#define FCH_LPC_REG66            0x66
-#define FCH_LPC_REG67            0x67
-#define FCH_LPC_REG68            0x68        // LPC ROM Address Range 1 (Start Address) - RW
-#define FCH_LPC_REG69            0x69
-#define FCH_LPC_REG6A            0x6A        // LPC ROM Address Range 1 (End Address) - RW
-#define FCH_LPC_REG6B            0x6B
-#define FCH_LPC_REG6C            0x6C        // LPC ROM Address Range 2 (Start Address)- RW
-#define FCH_LPC_REG6D            0x6D
-#define FCH_LPC_REG6E            0x6E        // LPC ROM Address Range 2 (End Address) - RW
-#define FCH_LPC_REG6F            0x6F
-#define FCH_LPC_REG70            0x70        // Firmware ub Select - RW*
-#define FCH_LPC_REG71            0x71
-#define FCH_LPC_REG72            0x72
-#define FCH_LPC_REG73            0x73
-#define FCH_LPC_REG74            0x74        // Alternative Wide IO Range Enable- W/R
-#define FCH_LPC_REG78            0x78        // Miscellaneous Control Bits- W/R
-#define FCH_LPC_REG79            0x79        // Miscellaneous Control Bits- W/R
-#define FCH_LPC_REG7C            0x7C        // TPM (trusted plant form module) reg- W/R
-#define FCH_LPC_REG9C            0x9C
-#define FCH_LPC_REG80            0x80        // MSI Capability Register- R
-#define FCH_LPC_REGA0            0x0A0       // SPI base address
-#define FCH_LPC_REGA1            0x0A1       // SPI base address
-#define FCH_LPC_REGA2            0x0A2       // SPI base address
-#define FCH_LPC_REGA3            0x0A3       // SPI base address
-#define FCH_LPC_REGA4            0x0A4
-#define FCH_LPC_REGB8            0x0B8
-#define FCH_LPC_REGBA            0x0BA       // EcControl
-#define FCH_LPC_REGBB            0x0BB       // HostControl
-#define FCH_LPC_REGC8            0x0C8
-#define FCH_LPC_REGCC            0x0CC       // AutoRomCfg
-#define FCH_LPC_REGD0            0x0D0
-#define FCH_LPC_REGD3            0x0D3
-#define FCH_LPC_REGD4            0x0D4
-
-//
-//  FCH PCIB  0x780F
-//  Device 20 (0x14) Func 4
-//
-#define FCH_PCIB_REG04            0x04       // Command
-#define FCH_PCIB_REG0D            0x0D       // Primary Master Latency Timer
-#define FCH_PCIB_REG1B            0x1B       // Secondary Latency Timer
-#define FCH_PCIB_REG1C            0x1C       // IO Base
-#define FCH_PCIB_REG1D            0x1D       // IO Limit
-#define FCH_PCIB_REG40            0x40       // CPCTRL
-#define FCH_PCIB_REG42            0x42       // CLKCTRL
-#define FCH_PCIB_REG48            0x48       //
-#define FCH_PCIB_REG4A            0x4A       // PCICLK Enable Bits
-#define FCH_PCIB_REG4B            0x4B       // Misc Control
-#define FCH_PCIB_REG4C            0x4C       // AutoClockRun Control
-#define FCH_PCIB_REG50            0x50       // Dual Address Cycle Enable and PCIB_CLK_Stop Override
-#define FCH_PCIB_REG65            0x65       // Misc Control
-#define FCH_PCIB_REG66            0x66       // Misc Control
-//
-//  FCH GEC 0x14E4 0x1699
-//  Device 20 (0x14) Func 6
-//
-#define FCH_GEC_REG10             0x10       // GEC BAR
-
-//
-//  FCH SD
-//  Device 20 (0x14) Func 7
-//
-#define SD_PCI_REG10              0x10
-#define SD_PCI_REG2C              0x2C
-#define SD_PCI_REGA4              0xA4
-#define SD_PCI_REGA8              0xA8
-#define SD_PCI_REGAC              0xAC
-#define SD_PCI_REGB0              0xB0
-#define SD_PCI_REGB8              0xB8
-#define SD_PCI_REGBC              0xBC
-#define SD_PCI_REGD0              0xD0
-#define SD_PCI_REGF0              0xF0
-#define SD_PCI_REGF4              0xF4
-#define SD_PCI_REGF8              0xF8
-#define SD_PCI_REGFC              0xFC
-#define FCH_SD_BAR_REG28          0x28       // SDHC_CTRL1
-#define SD_CARD_PRESENT           BIT0
-#define FCH_SD_BAR_REG2C          0x2C       // SDHC_CTRL2
-#define FCH_SD_FREQUENCY_SLT      BIT2
-#define FCH_SD_BAR_REG3C          0x3C       // SDHC_HOST_CTRL2
-#define FCH_SD_1_8V               BIT3
-
-//
-//  FCH MMIO Base (SMI)
-//    offset : 0x200
-//
-#define FCH_SMI_REG00            0x00         // EventStatus
-#define FCH_SMI_REG04            0x04         // EventEnable
-#define FCH_SMI_REG08            0x08         // SciTrig
-#define FCH_SMI_REG0C            0x0C         // SciLevl
-#define FCH_SMI_REG10            0x10         // SmiSciStatus
-#define FCH_SMI_REG14            0x14         // SmiSciEn
-#define FCH_SMI_REG18            0x18         // ForceSciEn
-#define FCH_SMI_REG1C            0x1C         // SciRwData
-#define FCH_SMI_REG3C            0x3C         // DataErrorStatus
-#define FCH_SMI_REG20            0x20         // SciS0En
-#define FCH_SMI_Gevent0          0x40         // SciMap0
-#define FCH_SMI_Gevent1          0x41         // SciMap1
-#define FCH_SMI_Gevent2          0x42         // SciMap2
-#define FCH_SMI_Gevent3          0x43         // SciMap3
-#define FCH_SMI_Gevent4          0x44         // SciMap4
-#define FCH_SMI_Gevent5          0x45         // SciMap5
-#define FCH_SMI_Gevent6          0x46         // SciMap6
-#define FCH_SMI_Gevent7          0x47         // SciMap7
-#define FCH_SMI_Gevent8          0x48         // SciMap8
-#define FCH_SMI_Gevent9          0x49         // SciMap9
-#define FCH_SMI_Gevent10         0x4A         // SciMap10
-#define FCH_SMI_Gevent11         0x4B         // SciMap11
-#define FCH_SMI_Gevent12         0x4C         // SciMap12
-#define FCH_SMI_Gevent13         0x4D         // SciMap13
-#define FCH_SMI_Gevent14         0x4E         // SciMap14
-#define FCH_SMI_Gevent15         0x4F         // SciMap15
-#define FCH_SMI_Gevent16         0x50         // SciMap16
-#define FCH_SMI_Gevent17         0x51         // SciMap17
-#define FCH_SMI_Gevent18         0x52         // SciMap18
-#define FCH_SMI_Gevent19         0x53         // SciMap19
-#define FCH_SMI_Gevent20         0x54         // SciMap20
-#define FCH_SMI_Gevent21         0x55         // SciMap21
-#define FCH_SMI_Gevent22         0x56         // SciMap22
-#define FCH_SMI_Gevent23         0x57         // SciMap23
-#define FCH_SMI_Usbwakup0        0x58         // SciMap24
-#define FCH_SMI_Usbwakup1        0x59         // SciMap25
-#define FCH_SMI_Usbwakup2        0x5A         // SciMap26
-#define FCH_SMI_Usbwakup3        0x5B         // SciMap27
-#define FCH_SMI_SBGppPme0        0x5C         // SciMap28
-#define FCH_SMI_SBGppPme1        0x5D         // SciMap29
-#define FCH_SMI_SBGppPme2        0x5E         // SciMap30
-#define FCH_SMI_SBGppPme3        0x5F         // SciMap31
-#define FCH_SMI_SBGppHp0         0x60         // SciMap32
-#define FCH_SMI_SBGppHp1         0x61         // SciMap33
-#define FCH_SMI_SBGppHp2         0x62         // SciMap34
-#define FCH_SMI_SBGppHp3         0x63         // SciMap35
-#define FCH_SMI_AzaliaPme        0x64         // SciMap36
-#define FCH_SMI_SataGevent0      0x65         // SciMap37
-#define FCH_SMI_SataGevent1      0x66         // SciMap38
-#define FCH_SMI_GecPme           0x67         // SciMap39
-#define FCH_SMI_IMCGevent0       0x68         // SciMap40
-#define FCH_SMI_IMCGevent1       0x69         // SciMap41
-#define FCH_SMI_CIRPme           0x6A         // SciMap42
-#define FCH_SMI_WakePinGevent    0x6B         // SciMap43
-#define FCH_SMI_FanThGevent      0x6C         // SciMap44    //FanThermalGevent
-#define FCH_SMI_ASFMasterIntr    0x6D         // SciMap45
-#define FCH_SMI_ASFSlaveIntr     0x6E         // SciMap46
-#define FCH_SMI_SMBUS0           0x6F         // SciMap47
-#define FCH_SMI_TWARN            0x70         // SciMap48
-#define FCH_SMI_TMI              0x71         // SciMap49    // TrafficMonitorIntr
-#define FCH_SMI_iLLB             0x72         // SciMap50
-#define FCH_SMI_PowerButton      0x73         // SciMap51
-#define FCH_SMI_ProcHot          0x74         // SciMap52
-#define FCH_SMI_APUHwAssertion   0x75         // SciMap53
-#define FCH_SMI_APUSciAssertion  0x76         // SciMap54
-#define FCH_SMI_RAS              0x77         // SciMap55
-#define FCH_SMI_xHC0Pme          0x78         // SciMap56
-#define FCH_SMI_xHC1Pme          0x79         // SciMap57
-#define FCH_SMI_AcDcWake         0x7A         // SciMap58
-
-// Empty from 0x72-0x7F
-//#Define FCH_SMI_REG7C            0x7F         // SciMap63  ***
-
-#define FCH_SMI_REG80            0x80         //  SmiStatus0
-#define FCH_SMI_REG84            0x84         // SmiStatus1
-#define FCH_SMI_REG88            0x88         // SmiStatus2
-#define FCH_SMI_REG8C            0x8C         // SmiStatus3
-#define FCH_SMI_REG90            0x90         // SmiStatus4
-#define FCH_SMI_REG94            0x94         // SmiPointer
-#define FCH_SMI_REG96            0x96         // SmiTimer
-#define FCH_SMI_REG98            0x98         // SmiTrig
-#define FCH_SMI_REG9C            0x9C         // SmiTrig
-#define FCH_SMI_REGA0            0xA0
-#define FCH_SMI_REGA1            0xA1
-#define FCH_SMI_REGA2            0xA2
-#define FCH_SMI_REGA3            0xA3
-#define FCH_SMI_REGA4            0xA4
-#define FCH_SMI_REGA5            0xA5
-#define FCH_SMI_REGA6            0xA6
-#define FCH_SMI_REGA7            0xA7
-#define FCH_SMI_REGA8            0xA8
-#define FCH_SMI_REGA9            0xA9
-#define FCH_SMI_REGAA            0xAA
-#define FCH_SMI_REGAB            0xAB
-#define FCH_SMI_REGAC            0xAC
-#define FCH_SMI_REGAD            0xAD
-#define FCH_SMI_REGAE            0xAE
-#define FCH_SMI_REGAF            0xAF
-#define FCH_SMI_REGB0            0xB0
-#define FCH_SMI_REGB1            0xB1
-#define FCH_SMI_REGB2            0xB2
-#define FCH_SMI_REGB3            0xB3
-#define FCH_SMI_REGB4            0xB4
-#define FCH_SMI_REGB5            0xB5
-#define FCH_SMI_REGB6            0xB6
-#define FCH_SMI_REGB7            0xB7
-#define FCH_SMI_REGB8            0xB8
-#define FCH_SMI_REGB9            0xB9
-#define FCH_SMI_REGBA            0xBA
-#define FCH_SMI_REGBB            0xBB
-#define FCH_SMI_REGBC            0xBC
-#define FCH_SMI_REGBD            0xBD
-#define FCH_SMI_REGBE            0xBE
-#define FCH_SMI_REGBF            0xBF
-#define FCH_SMI_REGC0            0xC0
-#define FCH_SMI_REGC1            0xC1
-#define FCH_SMI_REGC2            0xC2
-#define FCH_SMI_REGC3            0xC3
-#define FCH_SMI_REGC4            0xC4
-#define FCH_SMI_REGC5            0xC5
-#define FCH_SMI_REGC6            0xC6
-#define FCH_SMI_REGC7            0xC7
-#define FCH_SMI_REGC8            0xC8
-#define FCH_SMI_REGCA            0xCA         //  IoTrapping1
-#define FCH_SMI_REGCC            0xCC         //  IoTrapping2
-#define FCH_SMI_REGCE            0xCE         //  IoTrapping3
-#define FCH_SMI_TRAPPING_WRITE   0x01
-#define FCH_SMI_REGD0            0xD0         //  MemTrapping0
-#define FCH_SMI_REGD4            0xD4         //  MemRdOvrData0
-#define FCH_SMI_REGD8            0xD8         //  MemTrapping1
-#define FCH_SMI_REGDC            0xDC         //  MemRdOvrData1
-#define FCH_SMI_REGE0            0xE0         //  MemTrapping2
-#define FCH_SMI_REGE4            0xE4         //  MemRdOvrData2
-#define FCH_SMI_REGE8            0xE8         //  MemTrapping3
-#define FCH_SMI_REGEC            0xEC         //  MemRdOvrData3
-#define FCH_SMI_REGF0            0xF0         //  CfgTrapping0
-#define FCH_SMI_REGF4            0xF4         //  CfgTrapping1
-#define FCH_SMI_REGF8            0xF8         //  CfgTrapping2
-#define FCH_SMI_REGFC            0xFC         //  CfgTrapping3
-
-//
-//  FCH MMIO Base (PMIO)
-//    offset : 0x300
-//
-#define FCH_PMIOA_REG00          0x00        // ISA Decode
-#define FCH_PMIOA_REG04          0x04        // ISA Control
-#define FCH_PMIOA_REG08          0x08        // PCI Control
-#define FCH_PMIOA_REG0C          0x0C        // StpClkSmaf
-#define FCH_PMIOA_REG10          0x10        // RetryDetect
-#define FCH_PMIOA_REG14          0x14        // StuckDetect
-#define FCH_PMIOA_REG20          0x20        // BiosRamEn
-#define FCH_PMIOA_REG24          0x24        //  AcpiMmioEn
-#define FCH_PMIOA_REG28          0x28         // AsfEn
-#define FCH_PMIOA_REG2C          0x2C         // Smbus0En
-#define FCH_PMIOA_REG2E          0x2E         // Smbus0Sel
-#define FCH_PMIOA_REG34          0x34         // IoApicEn
-#define FCH_PMIOA_REG3C          0x3C         // SmartVoltEn
-#define FCH_PMIOA_REG40          0x40         // SmartVolt2En
-#define FCH_PMIOA_REG44          0x44         // BootTimerEn
-#define FCH_PMIOA_REG48          0x48         // WatchDogTimerEn
-#define FCH_PMIOA_REG4C          0x4C         // WatchDogTimerConfig
-#define FCH_PMIOA_REG50          0x50         // HPETEn
-#define FCH_PMIOA_REG54          0x54         // SerialIrqConfig
-#define FCH_PMIOA_REG56          0x56         // RtcControl
-#define FCH_PMIOA_REG58          0x58         // VRT_T1
-#define FCH_PMIOA_REG59          0x59         // VRT_T2
-#define FCH_PMIOA_REG5A          0x5A         // IntruderControl
-#define FCH_PMIOA_REG5B          0x5B         // RtcShadow
-#define FCH_PMIOA_REG5C          0x5C
-#define FCH_PMIOA_REG5D          0x5D
-#define FCH_PMIOA_REG5E          0x5E         // RtcExtIndex
-#define FCH_PMIOA_REG5F          0x5F         // RtcExtData
-#define FCH_PMIOA_REG60          0x60         // AcpiPm1EvtBlk
-#define FCH_PMIOA_REG62          0x62         // AcpiPm1CntBlk
-#define FCH_PMIOA_REG64          0x64         // AcpiPmTmrBlk
-#define FCH_PMIOA_REG66          0x66         // P_CNTBlk
-#define FCH_PMIOA_REG68          0x68         // AcpiGpe0Blk
-#define FCH_PMIOA_REG6A          0x6A         // AcpiSmiCmd
-#define FCH_PMIOA_REG6C          0x6C         // AcpiPm2CntBlk
-#define FCH_PMIOA_REG6E          0x6E         // AcpiPmaCntBlk
-#define FCH_PMIOA_REG74          0x74         // AcpiConfig
-#define FCH_PMIOA_REG78          0x78         // WakeIoAddr
-#define FCH_PMIOA_REG7A          0x7A         // HaltCountEn
-#define FCH_PMIOA_REG7C          0x7C         // C1eWrPortAdr
-#define FCH_PMIOA_REG7E          0x7E         // CStateEn
-#define FCH_PMIOA_REG7F          0x7F         // CStateEn
-#define FCH_PMIOA_REG80          0x80         // BreakEvent
-#define FCH_PMIOA_REG84          0x84         // AutoArbEn
-#define FCH_PMIOA_REG88          0x88         // CStateControl
-#define FCH_PMIOA_REG89          0x89         //
-#define FCH_PMIOA_REG8C          0x8C         // StpClkHoldTime
-#define FCH_PMIOA_REG8E          0x8E         // PopUpEndTime
-#define FCH_PMIOA_REG90          0x90         // C4Control
-#define FCH_PMIOA_REG94          0x94         // CStateTiming0
-#define FCH_PMIOA_REG96          0x96         //
-#define FCH_PMIOA_REG97          0x97         //
-#define FCH_PMIOA_REG98          0x98         // CStateTiming1
-#define FCH_PMIOA_REG99          0x99         //
-#define FCH_PMIOA_REG9B          0x9B         //
-#define FCH_PMIOA_REG9C          0x9C         // C2Count
-#define FCH_PMIOA_REG9D          0x9D         // C3Count
-#define FCH_PMIOA_REG9E          0x9E         // C4Count
-#define FCH_PMIOA_REGA0          0xA0         // MessageCState
-#define FCH_PMIOA_REGA4          0xA4         //
-#define FCH_PMIOA_REGA8          0xA8         // TrafficMonitorIdleTime
-#define FCH_PMIOA_REGAA          0xAA         // TrafficMonitorIntTime
-#define FCH_PMIOA_REGAC          0xAC         // TrafficMonitorTrafficCount
-#define FCH_PMIOA_REGAE          0xAE         // TrafficMonitorIntrCount
-#define FCH_PMIOA_REGB0          0xB0         // TrafficMonitorTimeTick
-#define FCH_PMIOA_REGB4          0xB4         // FidVidControl
-#define FCH_PMIOA_REGB6          0xB6         // TPRESET1
-#define FCH_PMIOA_REGB7          0xB7         // Tpreset1b
-#define FCH_PMIOA_REGB8          0xB8         // TPRESET2
-#define FCH_PMIOA_REGB9          0xB9         // Test0
-#define FCH_PMIOA_REGBA          0xBA         // S_StateControl
-#define FCH_PMIOA_REGBB          0xBB         //
-#define FCH_PMIOA_REGBC          0xBC         // ThrottlingControl
-#define FCH_PMIOA_REGBE          0xBE         // ResetControl
-#define FCH_PMIOA_REGBF          0xBF         // ResetControl
-#define FCH_PMIOA_REGC0          0xC0         // S5Status
-#define FCH_PMIOA_REGC2          0xC2         // ResetStatus
-#define FCH_PMIOA_REGC4          0xC4         // ResetCommand
-#define FCH_PMIOA_REGC5          0xC5         // CF9Shadow
-#define FCH_PMIOA_REGC6          0xC6         // HTControl
-#define FCH_PMIOA_REGC8          0xC8         // Misc
-#define FCH_PMIOA_REGCC          0xCC         // IoDrvSth
-#define FCH_PMIOA_REGD0          0xD0         // CLKRunEn
-#define FCH_PMIOA_REGD2          0xD2         // PmioDebug
-#define FCH_PMIOA_REGD3          0xD3         // SD
-#define FCH_PMIOA_REGD6          0xD6         // IMCGating
-#define FCH_PMIOA_REGD7          0xD7         //
-#define FCH_PMIOA_REGD8          0xD8         // MiscIndex
-#define FCH_PMIOA_REGD9          0xD9         // MiscData
-#define FCH_PMIOA_REGDA          0xDA         // SataConfig
-#define FCH_PMIOA_REGDC          0xDC         // HyperFlashConfig
-#define FCH_PMIOA_REGDE          0xDE         // ABConfig
-#define FCH_PMIOA_REGE0          0xE0         // ABRegBar
-#define FCH_PMIOA_REGE4          0xE4
-#define FCH_PMIOA_REGE6          0xE6         // FcEn
-#define FCH_PMIOA_REGE7          0xE7
-#define FCH_PMIOA_REGE8          0xE8
-#define FCH_PMIOA_REGEA          0xEA         // PcibConfig
-#define FCH_PMIOA_REGEB          0xEB         // AzEn
-#define FCH_PMIOA_REGEC          0xEC         // LpcGating
-#define FCH_PMIOA_REGED          0xED         // UsbGating
-#define FCH_PMIOA_REGEE          0xEE         // UsbCntrl
-#define FCH_PMIOA_REGEF          0xEF         // UsbEnable
-#define FCH_PMIOA_REGF0          0xF0         // UsbControl
-#define FCH_PMIOA_REGF2          0xF2         // UsbControl2
-#define FCH_PMIOA_REGF3          0xF3         // UsbDebug
-#define FCH_PMIOA_REGF4          0xF4         // UsbDebug
-#define FCH_PMIOA_REGF6          0xF6         // GecEn
-#define FCH_PMIOA_REGF8          0xF8         // GecConfig
-#define FCH_PMIOA_REGFC          0xFC         // TraceMemoryEn
-
-#define FCH_PMx00_DecodeEn               0xFED80300ul   //
-#define FCH_PMxC0_ResetStatus            0xFED803C0ul   //
-#define FCH_PMxC0_ResetStatus_Mask       0x3fff0000ul   //
-#define FCH_PMxC4_ResetCommand           0xFED803C4ul   //
-#define FCH_PMxDC_SataConfig2            0xFED803DCul   //
-
-//
-//  FCH MMIO Base (PMIO2)
-//    offset : 0x400
-//
-#define FCH_PMIO2_REG00          0x00        // Fan0InputControl
-#define FCH_PMIO2_REG01          0x01        // Fan0Control
-#define FCH_PMIO2_REG02          0x02        // Fan0Freq
-#define FCH_PMIO2_REG03          0x03        // LowDuty0
-#define FCH_PMIO2_REG04          0x04        // MidDuty0
-
-#define FCH_PMIO2_REG10          0x00        // Fan1InputControl
-#define FCH_PMIO2_REG11          0x01        // Fan1Control
-#define FCH_PMIO2_REG12          0x02        // Fan1Freq
-#define FCH_PMIO2_REG13          0x03        // LowDuty1
-#define FCH_PMIO2_REG14          0x04        // MidDuty1
-
-#define FCH_PMIO2_REG63          0x63        // SampleFreqDiv
-#define FCH_PMIO2_REG69          0x69        // Fan0 Speed
-#define FCH_PMIO2_REG95          0x95        // Temperature
-#define FCH_PMIO2_REGB8          0xB8        // Voltage
-#define FCH_PMIO2_REGEA          0xEA        // Hwm_Calibration
-
-#define FCH_PMIO2_REG92          0x92        //
-#define FCH_PMIO2_REGF8          0xF8        // VoltageSamleSel
-#define FCH_PMIO2_REGF9          0xF9        // TempSampleSel
-
-#define FCH_PMIO2_REG          0xFC         // TraceMemoryEn
-
-
-//
-//  FCH MMIO Base (GPIO/IoMux)
-//    offset : 0x100/0xD00
-//
-/*
-GPIO from 0 ~ 67, (GEVENT 0-23) 128 ~ 150, 160 ~ 226.
-*/
-#define FCH_GPIO_REG00           0x00
-#define FCH_GPIO_REG06           0x06
-#define FCH_GPIO_REG09           0x09
-#define FCH_GPIO_REG10           0x0A
-#define FCH_GPIO_REG17           0x11
-#define FCH_GPIO_REG21           0x15
-#define FCH_GPIO_REG28           0x1C
-#define FCH_GPIO_REG32           0x20
-#define FCH_GPIO_REG33           0x21
-#define FCH_GPIO_REG34           0x22
-#define FCH_GPIO_REG35           0x23
-#define FCH_GPIO_REG36           0x24
-#define FCH_GPIO_REG37           0x25
-#define FCH_GPIO_REG38           0x26
-#define FCH_GPIO_REG39           0x27
-#define FCH_GPIO_REG40           0x28
-#define FCH_GPIO_REG41           0x29
-#define FCH_GPIO_REG42           0x2A
-#define FCH_GPIO_REG43           0x2B
-#define FCH_GPIO_REG44           0x2C
-#define FCH_GPIO_REG45           0x2D
-#define FCH_GPIO_REG46           0x2E
-#define FCH_GPIO_REG47           0x2F
-#define FCH_GPIO_REG48           0x30
-#define FCH_GPIO_REG49           0x31
-#define FCH_GPIO_REG50           0x32
-#define FCH_GPIO_REG51           0x33
-#define FCH_GPIO_REG52           0x34
-#define FCH_GPIO_REG53           0x35
-#define FCH_GPIO_REG54           0x36
-#define FCH_GPIO_REG55           0x37
-#define FCH_GPIO_REG56           0x38
-#define FCH_GPIO_REG57           0x39
-#define FCH_GPIO_REG58           0x3A
-#define FCH_GPIO_REG59           0x3B
-#define FCH_GPIO_REG60           0x3C
-#define FCH_GPIO_REG61           0x3D
-#define FCH_GPIO_REG62           0x3E
-#define FCH_GPIO_REG63           0x3F
-#define FCH_GPIO_REG64           0x40
-#define FCH_GPIO_REG65           0x41
-#define FCH_GPIO_REG66           0x42
-#define FCH_GPIO_REG67           0x43
-#define FCH_GPIO_REG68           0x44
-#define FCH_GPIO_REG69           0x45
-#define FCH_GPIO_REG70           0x46
-#define FCH_GPIO_REG71           0x47
-#define FCH_GPIO_REG72           0x48
-#define FCH_GPIO_REG73           0x49
-#define FCH_GPIO_REG74           0x4A
-#define FCH_GPIO_REG75           0x4B
-#define FCH_GPIO_REG76           0x4C
-#define FCH_GPIO_REG77           0x4D
-#define FCH_GPIO_REG78           0x4E
-#define FCH_GPIO_REG79           0x4F
-#define FCH_GPIO_REG80           0x50
-
-#define FCH_GEVENT_REG00         0x60
-#define FCH_GEVENT_REG01         0x61
-#define FCH_GEVENT_REG02         0x62
-#define FCH_GEVENT_REG03         0x63
-#define FCH_GEVENT_REG04         0x64
-#define FCH_GEVENT_REG05         0x65
-#define FCH_GEVENT_REG06         0x66
-#define FCH_GEVENT_REG07         0x67
-#define FCH_GEVENT_REG08         0x68
-#define FCH_GEVENT_REG09         0x69
-#define FCH_GEVENT_REG10         0x6A
-#define FCH_GEVENT_REG11         0x6B
-#define FCH_GEVENT_REG12         0x6C
-#define FCH_GEVENT_REG13         0x6D
-#define FCH_GEVENT_REG14         0x6E
-#define FCH_GEVENT_REG15         0x6F
-#define FCH_GEVENT_REG16         0x70
-#define FCH_GEVENT_REG17         0x71
-#define FCH_GEVENT_REG18         0x72
-#define FCH_GEVENT_REG19         0x73
-#define FCH_GEVENT_REG20         0x74
-#define FCH_GEVENT_REG21         0x75
-#define FCH_GEVENT_REG22         0x76
-#define FCH_GEVENT_REG23         0x77
-// S5-DOMAIN GPIO
-#define FCH_GPIO_REG160          0xA0
-#define FCH_GPIO_REG161          0xA1
-#define FCH_GPIO_REG162          0xA2
-#define FCH_GPIO_REG163          0xA3
-#define FCH_GPIO_REG164          0xA4
-#define FCH_GPIO_REG165          0xA5
-#define FCH_GPIO_REG166          0xA6
-#define FCH_GPIO_REG167          0xA7
-#define FCH_GPIO_REG168          0xA8
-#define FCH_GPIO_REG169          0xA9
-#define FCH_GPIO_REG170          0xAA
-#define FCH_GPIO_REG171          0xAB
-#define FCH_GPIO_REG172          0xAC
-#define FCH_GPIO_REG173          0xAD
-#define FCH_GPIO_REG174          0xAE
-#define FCH_GPIO_REG175          0xAF
-#define FCH_GPIO_REG176          0xB0
-#define FCH_GPIO_REG177          0xB1
-#define FCH_GPIO_REG178          0xB2
-#define FCH_GPIO_REG179          0xB3
-#define FCH_GPIO_REG180          0xB4
-#define FCH_GPIO_REG181          0xB5
-#define FCH_GPIO_REG182          0xB6
-#define FCH_GPIO_REG183          0xB7
-#define FCH_GPIO_REG184          0xB8
-#define FCH_GPIO_REG185          0xB9
-#define FCH_GPIO_REG186          0xBA
-#define FCH_GPIO_REG187          0xBB
-#define FCH_GPIO_REG188          0xBC
-#define FCH_GPIO_REG189          0xBD
-#define FCH_GPIO_REG190          0xBE
-#define FCH_GPIO_REG191          0xBF
-#define FCH_GPIO_REG192          0xC0
-#define FCH_GPIO_REG193          0xC1
-#define FCH_GPIO_REG194          0xC2
-#define FCH_GPIO_REG195          0xC3
-#define FCH_GPIO_REG196          0xC4
-#define FCH_GPIO_REG197          0xC5
-#define FCH_GPIO_REG198          0xC6
-#define FCH_GPIO_REG199          0xC7
-#define FCH_GPIO_REG200          0xC8
-#define FCH_GPIO_REG201          0xC9
-#define FCH_GPIO_REG202          0xCA
-#define FCH_GPIO_REG203          0xCB
-#define FCH_GPIO_REG204          0xCC
-#define FCH_GPIO_REG205          0xCD
-#define FCH_GPIO_REG206          0xCE
-#define FCH_GPIO_REG207          0xCF
-#define FCH_GPIO_REG208          0xD0
-#define FCH_GPIO_REG209          0xD1
-#define FCH_GPIO_REG210          0xD2
-#define FCH_GPIO_REG211          0xD3
-#define FCH_GPIO_REG212          0xD4
-#define FCH_GPIO_REG213          0xD5
-#define FCH_GPIO_REG214          0xD6
-#define FCH_GPIO_REG215          0xD7
-#define FCH_GPIO_REG216          0xD8
-#define FCH_GPIO_REG217          0xD9
-#define FCH_GPIO_REG218          0xDA
-#define FCH_GPIO_REG219          0xDB
-#define FCH_GPIO_REG220          0xDC
-#define FCH_GPIO_REG221          0xDD
-#define FCH_GPIO_REG222          0xDE
-#define FCH_GPIO_REG223          0xDF
-#define FCH_GPIO_REG224          0xF0
-#define FCH_GPIO_REG225          0xF1
-#define FCH_GPIO_REG226          0xF2
-#define FCH_GPIO_REG227          0xF3
-#define FCH_GPIO_REG228          0xF4
-
-#define FCH_IOMUXx0D_IR_TX0_USB_OC5_L_AGPIO13        0xFED80D0Dul   //
-#define FCH_IOMUXx0E_IR_TX1_USB_OC6_L_AGPIO14        0xFED80D0Eul   //
-#define FCH_IOMUXx13_SCL1_I2C3_SCL_EGPIO19           0xFED80D13ul   //
-#define FCH_IOMUXx14_SDA1_I2C3_SDA_EGPIO20           0xFED80D14ul   //
-#define FCH_IOMUX_55_FANOUT0_AGPIO85                 0xFED80D55ul   // FANOUT0_AGPIO85
-#define FCH_IOMUXx66_SD0_PWR_CTRL_AGPIO102           0xFED80D66ul   //
-#define FCH_IOMUXx71_SCL0_I2C2_SCL_EGPIO113          0xFED80D71ul   //
-#define FCH_IOMUXx72_SDA0_I2C2_SDA_EGPIO114          0xFED80D72ul   //
-#define FCH_IOMUXx89_UART0_RTS_L_EGPIO137          0xFED80D89ul   //
-#define FCH_IOMUXx8A_UART0_TXD_EGPIO138          0xFED80D8Aul   //
-#define FCH_IOMUXx8E_UART1_RTS_L_EGPIO142          0xFED80D8Eul   //
-#define FCH_IOMUXx8F_UART1_TXD_EGPIO143          0xFED80D8Ful   //
-
-//
-//  FCH MMIO Base (GPIO BANK0)
-//    offset : 0x1500
-//
-#define FCH_GPIO_PULL_UP_ENABLE      BIT4
-#define FCH_GPIO_PULL_DOWN_ENABLE    BIT5
-#define FCH_GPIO_OUTPUT_VALUE        BIT6
-#define FCH_GPIO_OUTPUT_ENABLE       (1 << 7)
-
-#define FCH_GPIO_068_AZ_SDIN0_GPIO26      0x68
-#define FCH_GPIO_06C_AZ_SDIN1_GPIO27      0x6C
-#define FCH_GPIO_070_AZ_SDIN2_GPIO28      0x70
-#define FCH_GPIO_074_AZ_SDIN3_GPIO29      0x74
-
-#define FCH_GPIO_10C_GPIO55_AGPI067       0x10C
-#define FCH_GPIO_118_GPIO59_AGPI070       0x118
-
-//
-//  FCH MMIO Base (IoMux)
-//    offset : 0xD00
-//
-#define FCH_IOMUX_1A_AZ_SDIN0_EGPIO26          0x1A
-#define FCH_IOMUX_1B_AZ_SDIN1_EGPIO27          0x1B
-#define FCH_IOMUX_1C_AZ_SDIN2_EGPIO28          0x1C
-#define FCH_IOMUX_1D_AZ_SDIN3_EGPIO29          0x1D
-
-//
-//  FCH MMIO Base (SMBUS)
-//    offset : 0xA00
-//
-#define FCH_SMBUS_REG12           0x12        //   I2CbusConfig
-
-//
-//  FCH MMIO Base (MISC)
-//    offset : 0xE00
-//
-#define FCH_MISC_REG00           0x00        //  ClkCntrl0
-/*
-FCH_MISC_REG00                   EQU     000h
-  ClkCntrl0                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG04           0x04        //  ClkCntrl1
-/*
-FCH_MISC_REG04                   EQU     004h
-  ClkCntrl1                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG08           0x08        //  ClkCntrl2
-/*
-FCH_MISC_REG08                   EQU     008h
-  ClkCntrl2                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG0C           0x0C        //  ClkCntrl3
-/*
-FCH_MISC_REG0C                   EQU     00Ch
-  ClkCntrl3                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG10           0x10        //  ClkCntrl4
-/*
-FCH_MISC_REG10                   EQU     010h
-  ClkCntrl4                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG14           0x14        //   ClkCntrl5
-/*
-FCH_MISC_REG14                   EQU     014h
-  ClkCntrl5                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG18           0x18        //   ClkCntrl6
-/*
-FCH_MISC_REG18                   EQU     018h
-  ClkCntrl6                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG1C           0x1C
-#define FCH_MISC_REG20           0x20
-#define FCH_MISC_REG30           0x30         // OscFreqCounter
-/*
-FCH_MISC_REG30                   EQU     030h
-  OscCounter                  EQU     0FFFFFFFFh                  ; The 32bit register shows the number of OSC clock per second.
-*/
-#define FCH_MISC_REG34           0x34         //  HpetClkPeriod
-/*
-FCH_MISC_REG34                   EQU     034h
-  HpetClkPeriod               EQU     0FFFFFFFFh                  ; default - 0x429B17Eh (14.31818M).
-*/
-#define FCH_MISC_REG28           0x28         //  ClkDrvSth2
-#define FCH_MISC_REG2C           0x2C
-#define FCH_MISC_REG40           0x40         //  MiscCntrl      for clock only
-#define FCH_MISC_REG41           0x41         //  MiscCntr2
-#define FCH_MISC_REG42           0x42         //  MiscCntr3
-#define FCH_MISC_REG44           0x44         //  ValueOnPort80
-#define FCH_MISC_REG50           0x50         //
-#define FCH_MISCx50_JTAG_CONTROL_ECO           0xFED80E50ul   //
-#define FCH_MISCx68_MEMORY_POWER_SAVING_CONTROL           0xFED80E68ul   //
-
-#define FCH_MISC_REG6C           0x6C         //  EcoBit2
-/*
-FCH_MISC_REG40                   EQU     040h
-*/
-
-#define FCH_MISC_REG80           0x80        /**< FCH_MISC_REG80
-                                   *   @par
-                                   *   StrapStatus [15.0] - FCH chip Strap Status
-                                   *    @li <b>0001</b> - Not USED FWH
-                                   *    @li <b>0002</b> - Not USED LPC ROM
-                                   *    @li <b>0004</b> - EC enabled
-                                   *    @li <b>0008</b> - Reserved
-                                   *    @li <b>0010</b> - Internal Clock mode
-                                   */
-#define FCH_MISC_REGB6           0xB6         //
-
-#define  ChipSysNotUseFWHRom    0x0001                            // EcPwm3 pad
-#define  ChipSysNotUseLpcRom    0x0002                            // Inverted version from EcPwm2 pad (default - 1)
-                                                                  // Note: Both EcPwm3 and EcPwm2 straps pins are used to select boot ROM type.
-#define  ChipSysEcEnable        0x0004                            // Enable Embedded Controller (EC)
-#define  ChipSysBootFailTmrEn   0x0008                            // Enable Watchdog function
-#define  ChipSysIntClkGen       0x0010                            // Select 25Mhz crystal clock or 100Mhz PCI-E clock **
-
-#define FCH_MISC_REG84           0x84         //  StrapOverride
-/*
-FCH_MISC_REG84                   EQU     084h
-  Override FWHDisableStrap    EQU     BIT0                        ; Override FWHDiableStrap value from external pin.
-  Override UseLpcRomStrap     EQU     BIT1                        ; Override UseLpcRomStrap value from external pin.
-  Override EcEnableStrap      EQU     BIT2                        ; Override EcEnableStrap value from external pin.
-  Override BootFailTmrEnStrap EQU     BIT3                        ; Override BootFailTmrEnStrap value from external pin.
-  Override DefaultModeStrap   EQU     BIT5                        ; Override DefaultModeStrap value from external pin.
-  Override I2CRomStrap        EQU     BIT7                        ; Override I2CRomStrap value from external pin.
-  Override ILAAutorunEnBStrap EQU     BIT8                        ; Override ILAAutorunEnBStrap value from external pin.
-  Override FcPllBypStrap      EQU     BIT9                        ; Override FcPllBypStrap value from external pin.
-  Override PciPllBypStrap     EQU     BIT10                       ; Override PciPllBypStrap value from external pin.
-  Override ShortResetStrap    EQU     BIT11                       ; Override ShortResetStrap value from external pin.
-  Override FastBif2ClkStrap   EQU     BIT13                       ; Override FastBif2ClkStrap value from external pin
-  PciRomBootStrap             EQU     BIT15                       ; Override PCI Rom Boot Strap value from external pin
-  BlinkSlowModestrap          EQU     BIT16                       ; Override Blink Slow mode (100Mhz) from external pin
-  ClkGenStrap                 EQU     BIT17                       ; Override CLKGEN from external pin.
-  BIF_GEN2_COMPL_Strap        EQU     BIT18                       ; Override BIF_ GEN2_COMPLIANCE strap from external pin.
-  StrapOverrideEn             EQU     BIT31                       ; Enable override strapping feature.
-*/
-#define FCH_MISC_REGC0           0xC0        //  CPU_Pstate0
-/*
-FCH_MISC_REGC0                   EQU     0C0h
-  Core0_PState                EQU     BIT0+BIT1+BIT2              ; 000: P0  001: P1  010: P2 011: P3 100: P4 101: P5 110: P6 111: P7
-  Core1_PState                EQU     BIT4+BIT5+BIT6
-  Core2_PState                EQU     BIT8+BIT9+BIT10
-  Core3_PState                EQU     BIT12+BIT13+BIT14
-  Core4_PState                EQU     BIT16++BIT17+BIT18
-  Core5_PState                EQU     BIT20+BIT21+BIT22
-  Core6_PState                EQU     BIT24+BIT25+BIT26
-  Core7_PState                EQU     BIT28+BIT29+BIT30
-*/
-#define FCH_MISC_REGC4           0xC4         //  CPU_Pstate1
-/*
-FCH_MISC_REGC4                   EQU     0C4h
-  Core8_PState                EQU     BIT0+BIT1+BIT2              ; 000: P0  001: P1  010: P2 011: P3 100: P4 101: P5 110: P6 111: P7
-  Core9_PState                EQU     BIT4+BIT5+BIT6
-  Core10_PState               EQU     BIT8+BIT9+BIT10
-  Core11_PState               EQU     BIT12+BIT13+BIT14
-  Core12_PState               EQU     BIT16++BIT17+BIT18
-  Core13_PState               EQU     BIT20+BIT21+BIT22
-  Core14_PState               EQU     BIT24+BIT25+BIT26
-  Core15_PState               EQU     BIT28+BIT29+BIT30
-*/
-#define FCH_MISC_REGD0           0xD0         //  CPU_Cstate0
-/*
-FCH_MISC_REGD0                   EQU     0D0h
-  Core0_CState                EQU     BIT0+BIT1+BIT2              ; 000: C0  001: C1  010: C2 011: C3 100: C4 101: C5 110: C6 111: C7
-  Core1_CState                EQU     BIT4+BIT5+BIT6
-  Core2_CState                EQU     BIT8+BIT9+BIT10
-  Core3_CState                EQU     BIT12+BIT13+BIT14
-  Core4_CState                EQU     BIT16++BIT17+BIT18
-  Core5_CState                EQU     BIT20+BIT21+BIT22
-  Core6_CState                EQU     BIT24+BIT25+BIT26
-  Core7_CState                EQU     BIT28+BIT29+BIT30
-*/
-#define FCH_MISC_REGD4           0xD4         //  CPU_Cstate1
-/*
-FCH_MISC_REGD4                   EQU     0D4h
-  Core8_CState                EQU     BIT0+BIT1+BIT2              ; 000: C0  001: C1  010: C2 011: C3 100: C4 101: C5 110: C6 111: C7
-  Core9_CState                EQU     BIT4+BIT5+BIT6
-  Core10_CState               EQU     BIT8+BIT9+BIT10
-  Core11_CState               EQU     BIT12+BIT13+BIT14
-  Core12_CState               EQU     BIT16++BIT17+BIT18
-  Core13_CState               EQU     BIT20+BIT21+BIT22
-  Core14_CState               EQU     BIT24+BIT25+BIT26
-  Core15_CState               EQU     BIT28+BIT29+BIT30
-*/
-#define FCH_MISC_REGF0           0xF0         //  SataPortSts
-/*
-FCH_MISC_REGF0                   EQU     0F0h
-  Port0Sts                    EQU     BIT0                        ; The selected status of Port 0.
-  Port1Sts                    EQU     BIT1                        ; The selected status of Port 1
-  Port2Sts                    EQU     BIT2                        ; The selected status of Port 2.
-  Port3Sts                    EQU     BIT3                        ; The selected status of Port 3
-  Port4Sts                    EQU     BIT4                        ; The selected status of Port 4.
-  Port5Sts                    EQU     BIT5                        ; The selected status of Port 5
-  SataPortSel                 EQU     BIT24+BIT25                 ; 00  - Select "led" for Port 0 to 5
-                                  ; 01 - Select "delete" for Port 0 to 5
-                                  ; 10 - Select "err" for Port 0 to 5
-                                  ; 11 - Select "led" for Port 0 to 5
-*/
-
-//
-//  FCH MMIO Base (SERIAL_DEBUG_BASE)
-//    offset : 0x1000
-//
-#define FCH_SDB_REG00            0x00        //
-#define FCH_SDB_REG74            0x74
-
-#define FCH_RTC_REG00            0x00        // Seconds - RW
-#define FCH_RTC_REG01            0x01        // Seconds Alarm - RW
-#define FCH_RTC_REG02            0x02        // Minutes - RW
-#define FCH_RTC_REG03            0x03        // Minutes Alarm - RW
-#define FCH_RTC_REG04            0x04        // ours - RW
-#define FCH_RTC_REG05            0x05        // ours Alarm- RW
-#define FCH_RTC_REG06            0x06        // Day of Week - RW
-#define FCH_RTC_REG07            0x07        // Date of Mont - RW
-#define FCH_RTC_REG08            0x08        // Mont - RW
-#define FCH_RTC_REG09            0x09        // Year - RW
-#define FCH_RTC_REG0A            0x0A        // Register A - RW
-#define FCH_RTC_REG0B            0x0B        // Register B - RW
-#define FCH_RTC_REG0C            0x0C        // Register C - R
-#define FCH_RTC_REG0D            0x0D        // DateAlarm - RW
-#define FCH_RTC_REG32            0x32        // AltCentury - RW
-#define FCH_RTC_REG48            0x48        // Century - RW
-#define FCH_RTC_REG50            0x50        // Extended RAM Address Port - RW
-#define FCH_RTC_REG53            0x53        // Extended RAM Data Port - RW
-#define FCH_RTC_REG7E            0x7E        // RTC Time Clear - RW
-#define FCH_RTC_REG7F            0x7F        // RTC RAM Enable - RW
-
-#define FCH_ECMOS_REG00           0x00        // scratch - reg
-//;BIT0=0   AsicDebug is enabled
-//;BIT1=0   SLT S3 runs
-#define FCH_ECMOS_REG01          0x01
-#define FCH_ECMOS_REG02          0x02
-#define FCH_ECMOS_REG03          0x03
-#define FCH_ECMOS_REG04          0x04
-#define FCH_ECMOS_REG05          0x05
-#define FCH_ECMOS_REG06          0x06
-#define FCH_ECMOS_REG07          0x07
-#define FCH_ECMOS_REG08          0x08        // save 32BIT Physical address of Config structure
-#define FCH_ECMOS_REG09          0x09
-#define FCH_ECMOS_REG0A          0x0A
-#define FCH_ECMOS_REG0B          0x0B
-
-#define FCH_ECMOS_REG0C          0x0C        //;save MODULE_ID
-#define FCH_ECMOS_REG0D          0x0D        //;Reserve for NB
-
-//
-//  FCH SMI Base (FCH_SMI_BASE)
-//    offset : 0x0200
-//
-#define FCH_SMIx0C_Level          0xFED8020Cul         // Level
-#define FCH_SMIx58_EHCI_WAKE          0xFED80258ul         // EHCI WAKE
-#define FCH_SMIx78_XHCI_WAKE          0xFED80278ul         // XHCI WAKE
-
-#define FCH_SMIx88_SmiStatus2          0xFED80288ul         // SmiStatus2
-#define FCH_SMIx88_SmiStatus2_UsbSmiEvent76         ( 1 << 12 )
-
-//
-//  FCH PMIO Base (FCH_PMIO_BASE)
-//    offset : 0x0300
-//
-#define FCH_PMIOx10_Power_Reset_Config          0xFED80310ul         //Power Reset Config
-#define FCH_PMIOx10_Power_Reset_Config_ToggleAllPwrGoodOnCf9   (1 << 1)
-
-#define FCH_PMIOx74_AcpiConfig          0xFED80374ul         // AcpiConfig
-#define FCH_PMIOx74_AcpiConfig_PwnBtnEn          (1 << 8)
-#define FCH_PMIOx74_AcpiConfig_AcpiReducedHwEn   (1 << 9)
-
-#define FCH_PMIOxC0_S5ResetStatus          0xFED803C0ul         // S5ResetStatus
-#define FCH_PMIOxC0_S5ResetStatus_ThermalTrip        (1 << 0)
-#define FCH_PMIOxC0_S5ResetStatus_FourSecondPwrBtn   (1 << 1)
-#define FCH_PMIOxC0_S5ResetStatus_S_Status        (0x3ff | (1 << 20))
-#define FCH_PMIOxC0_S5ResetStatus_All_Status        0x3FFF03FFul
-
-#define FCH_PMxC8_Misc          0xFED803C8ul         // Misc
-#define FCH_PMxC8_Misc_UseAcpiStraps          (1 << 4)
-
-#define FCH_PMxE8_SDFlashCntrl          0xFED803E8ul         // SDFlashCntrl
-#define FCH_PMxE8_SDFlashCntrl_SdCd2Acpi (1 << 5)
-//
-//  FCH MISC Base (FCH_MISC_BASE)
-//    offset : 0x0E00
-//
-#define FCH_MISCx28_ClkDrvStr2          0xFED80E28ul         // ClkDrvStr2
-
-#define FCH_MISCx40_MiscClkCntl1          0xFED80E40ul         // MiscClkCntl1
-#define FCH_MISCx40_MiscClkCntl1_CG1PLL_FBDIV_Test          (1 << 26)
-
-#define FCH_MISCx50_JTAG_Control_ECO_bits          0xFED80E50ul         // JTAG_Control_ECO_bits
-#define FCH_MISCx50_JTAG_Control_ECO_bits_BIT12   (1 << 12)
-#define FCH_MISCx50_JTAG_Control_ECO_bits_BIT16   (1 << 16)
-
-//  FCH GPIO
-//    offset : 0x1500
-//
-#define FCH_GPIOx018_AGPIO6_LDT_RST_L             0xFED81518ul        //
-#define FCH_GPIOx10C_DEVSLP0_EGPIO67             0xFED8160Cul        //
-
-//  FCH XHC PM (FCH_XHC_PM)
-//    offset : 0x1C00
-//
-#define FCH_XHC_PMx00_Configure0             0xFED81C00ul        //
-#define FCH_XHC_PMx00_Configure0_XHC_SMIB_EN BIT21
-#define FCH_XHC_PMx10_Xhc_Memory_Configure             0xFED81C10ul        //
-#define FCH_XHC_PMx18_Usb20_Link_Status             0xFED81C18ul        //
-#define FCH_XHC_PMx20_Usb20_Wake_Control             0xFED81C20ul        //
-#define FCH_XHC_PMx24_Misc0             0xFED81C24ul        //
-#define FCH_XHC_PMx28_Misc1             0xFED81C28ul        //
-#define FCH_XHC_PMx2C_Misc2             0xFED81C2Cul        //
-#define FCH_XHC_PMx30_Xhci10_Enable             0xFED81C30ul        //
-#define FCH_XHC_PMx60_xHC_Battery_Charger_Enable             0xFED81C60ul        //
-
-
-
-
-//  FCH AOAC Base (FCH_AOAC_BASE)
-//    offset : 0x1E00
-//
-#define FCH_AOACx40_D3_CONTROL             0xFED81E40ul        //
-#define FCH_AOACx41_D3_STATUS              0xFED81E40ul        //
-#define FCH_AOACx5E_SATA_D3_CONTROL             0xFED81E5Eul        //
-#define FCH_AOACx6E_USB3_D3_CONTROL             0xFED81E6Eul        //
-#define FCH_AOACx70_SD_D3_CONTROL             0xFED81E70ul        //
-#define FCH_AOACx7A_IMC_D3_CONTROL             0xFED81E7Aul        //
-#define FCH_AOACx88Shadow_Register_SRAM_Addr            0xFED81E88ul        //
-#define FCH_AOACx8CShadow_Register_SRAM_Data            0xFED81E8Cul        //
-#define FCH_AOACx94S013_CONTROL            0xFED81E94ul        //
-#define FCH_AOACx94S013_CONTROL_ARBITER_DIS            (1 << 14)
-#define FCH_AOACx94S013_CONTROL_INTERRUPT_DIS          (1 << 15)
-#define FCH_AOACx9C_Shadow_Timer_Control            0xFED81E9Cul        //
-#define FCH_AOACx9C_Shadow_Timer_Control_ShadowHpetEn            (1 << 0)        //
-#define FCH_AOACx9C_Shadow_Timer_Control_ShadowAcpiTimerEn            (1 << 1)        //
-
-#define FCH_AOACxA0_PwrGood_Control            0xFED81EA0ul        //
-
-#define FCH_AOAC_REG00           0x00         // PerfMonControl
-#define FCH_AOAC_REG04           0x04         // PerfMonTimeLimit
-#define FCH_AOAC_REG08           0x08         // PerfMonWeight[3:0]
-#define FCH_AOAC_REG0C           0x0C         // PerfMonWeight[7:4]
-#define FCH_AOAC_REG10           0x10         // PerfMonTrafficCnt[1:0]
-#define FCH_AOAC_REG14           0x14         // PerfMonTrafficCnt[3:2]
-#define FCH_AOAC_REG18           0x18         // PerfMonTrafficCnt[5:4]
-#define FCH_AOAC_REG1C           0x1C         // PerfMonTrafficCnt[7:6]
-#define FCH_AOAC_REG20           0x20         // PerfMonTrafficCntAll
-#define FCH_AOAC_REG24           0x24         // PerfMonIntrCnt
-#define FCH_AOAC_REG28           0x28         //
-#define FCH_AOAC_REG2C           0x2C         //
-#define FCH_AOAC_REG30           0x30         // Alternative HPET Timer
-#define FCH_AOAC_REG34           0x34         // Alternative HPET Timer (HIGH 32BITS)
-#define FCH_AOAC_REG38           0x38         // Alternative HPET Alarm
-#define FCH_AOAC_REG3C           0x3C         // Alternative HPET Alarm (HIGH 32BITS)
-/*
-FCH_AOAC_REG4X-7x Control field
-*/
-#define AOAC_TARGET_DEVICE_STATE  (BIT0 + BIT1) // TargetedDeviceState -
-                                                //   00 - D0 un-initialized
-                                                //   01 - D0 initialized
-                                                //   10 - D1/D2/D3hot
-                                                //   11 - D3cold
-                                                //
-#define AOAC_DEVICE_STATE         BIT2          // DeviceState
-                                                //   0 - Device power is removed
-                                                //   1 - Device power is applied
-#define AOAC_PWR_ON_DEV           BIT3          // PwrOnDev -
-                                                //  If IsSwControl==0, software can write this bit to trigger a HW
-                                                //     controlled power-down or reset sequence to the device.
-                                                //   0 - Power down the device.
-                                                //   1 - Power up the device.
-                                                //
-#define AOAC_SW_PWR_ON_RSTB       BIT4          // SwPwrOnRstB -
-                                                //
-                                                //   0 - PwrRstB is asserted to the device if IsSwControl==1.
-                                                //   1 - 1=PwrRstB is de-asserted to the device if IsSwControl==1.
-                                                //
-#define AOAC_SW_REF_CLK_OK        BIT5          // SwRefClkOk -
-                                                //
-                                                //   0 - 0=RefClkOk is de-asserted to the device if IsSwControl==1.
-                                                //   1 - RefClkOk is asserted to the device if IsSwControl==1.
-                                                //
-#define AOAC_SW_RST_B             BIT6          // SwRstB -
-                                                //   0 - RstB is asserted to the device if IsSwControl==1.
-                                                //   1 - RstB is deasserted to the device if IsSwControl==1.
-                                                //
-#define AOAC_IS_SW_CONTROL        BIT7          // IsSwControl
-                                                //      To avoid glitch on the reset signals, software must set bit IsSwControl first before programming bit
-                                                //      SwPwrOnRstB, SwRefClkOk and SwRstB.
-                                                //   0 - Hardware controls control signals (PwrRstB, RefClkOk, RstB) to the device.
-                                                //   1 - Software controls control signals (PwrRstB, RefClkOk, RstB) to the device.
-                                                //
-/*
-FCH_AOAC_REG4X-7x State field
-*/
-#define A0AC_PWR_RST_STATE        BIT0
-#define AOAC_RST_CLK_OK_STATE     BIT1
-#define AOAC_RST_B_STATE          BIT2
-#define AOAC_DEV_OFF_GATING_STATE BIT3
-#define AOAC_D3COLD               BIT4
-#define AOAC_CLK_OK_STATE         BIT5
-#define AOAC_STAT0                BIT6
-#define AOAC_STAT1                BIT7
-#define FCH_AOAC_REG40           0x40         // ClkGen Control
-#define FCH_AOAC_REG41           0x41         // ClkGen State
-#define FCH_AOAC_REG42           0x42         // AB Control
-#define FCH_AOAC_REG43           0x43         // AB State
-#define FCH_AOAC_REG44           0x44         // ACPI S0 Control
-#define FCH_AOAC_REG45           0x45         // ACPI S0 State
-#define FCH_AOAC_REG46           0x46         // ACPI S5 Control
-#define FCH_AOAC_REG47           0x47         // ACPI S5 State
-#define FCH_AOAC_REG48           0x48         // LPC Control
-#define FCH_AOAC_REG49           0x49         // LPC State
-#define FCH_AOAC_REG4A           0x4A         // I_2_C 0 Control
-#define FCH_AOAC_REG4B           0x4B         // I_2_C 0 State
-#define FCH_AOAC_REG4C           0x4C         // I_2_C 1 Control
-#define FCH_AOAC_REG4D           0x4D         // I_2_C 1 State
-#define FCH_AOAC_REG4E           0x4E         // I_2_C 2 Control
-#define FCH_AOAC_REG4F           0x4F         // I_2_C 2 State
-#define FCH_AOAC_REG50           0x50         // I_2_C 3 Control
-#define FCH_AOAC_REG51           0x51         // I_2_C 3 State
-
-#define FCH_AOAC_REG56           0x56         // UART0 Control
-#define FCH_AOAC_REG57           0x57         // UART0 State
-#define FCH_AOAC_REG58           0x58         // UART1 Control
-#define FCH_AOAC_REG59           0x59         // UART1 State
-
-#define FCH_AOAC_REG5E           0x5E         // SATA Control
-#define FCH_AOAC_REG5F           0x5F         // SATA State
-
-#define FCH_AOAC_REG62           0x62         // AMBA Control
-#define FCH_AOAC_REG63           0x63         // AMBA State
-#define FCH_AOAC_REG64           0x64         // USB2 Control
-#define FCH_AOAC_REG65           0x65         // USB2 State
-
-#define FCH_AOAC_REG6E           0x6E         // USB3 Control
-#define FCH_AOAC_REG6F           0x6F         // USB3 State
-#define FCH_AOAC_REG70           0x70         // SD Control
-#define FCH_AOAC_REG71           0x71         // SD State
-
-#define FCH_AOAC_REG76           0x76         // eSPI Control
-#define FCH_AOAC_REG77           0x77         // eSPI State
-
-#define FCH_AOAC_REG7A           0x7A         // IMC Control
-#define FCH_AOAC_REG7B           0x7B         // IMC State
-#define FCH_AOAC_REG7C           0x7C         // NB Control
-#define FCH_AOAC_REG7D           0x7D         // NB State
-#define FCH_AOAC_REG7E           0x7E         // APU Control
-#define FCH_AOAC_REG7F           0x7F         // APU State
-#define FCH_AOAC_REG80           0x80         //
-#define FCH_AOAC_REG84           0x84         //
-#define FCH_AOAC_REG88           0x88         //
-#define FCH_AOAC_REG8C           0x8C         //
-#define FCH_AOAC_REG90           0x90         //
-#define FCH_AOAC_REG94           0x94         //
-#define FCH_AOAC_REG98           0x98         //
-#define FCH_AOAC_REG9C           0x9C         //
-#define FCH_AOAC_REGA0           0xA0         //
-#define FCH_AOAC_REGA4           0xA4         //
-#define FCH_AOAC_REGA8           0xA8         //
-#define FCH_AOAC_REGAC           0xAC         //
-#define FCH_AOAC_REGB0           0xB0         //
-#define FCH_AOAC_REGB4           0xB4         //
-#define FCH_AOAC_REGB8           0xB8         //
-#define FCH_AOAC_REGBC           0xBC         //
-#define FCH_AOAC_REGC0           0xC0         //
-#define FCH_AOAC_REGC4           0xC4         //
-#define FCH_AOAC_REGC8           0xC8         //
-#define FCH_AOAC_REGCC           0xCC         //
-#define FCH_AOAC_REGD0           0xD0         //
-#define FCH_AOAC_REGD4           0xD4         //
-#define FCH_AOAC_REGD8           0xD8         //
-#define FCH_AOAC_REGDC           0xDC         //
-#define FCH_AOAC_REGE0           0xE0         //
-#define FCH_AOAC_REGE4           0xE4         //
-#define FCH_AOAC_REGE8           0xE8         //
-#define FCH_AOAC_REGEC           0xEC         //
-#define FCH_AOAC_REGF0           0xF0         //
-#define FCH_AOAC_REGF4           0xF4         //
-#define FCH_AOAC_REGF8           0xF8         //
-#define FCH_AOAC_REGFC           0xFC         //
-#define FCH_AOACx98S013_DEBUG            0xFED81E98ul        //
-#define FCH_AOACx98S013_DEBUG_BYPASS_SHDW_TMR           (1 << 8)
-#define FCH_AOACx98S013_DEBUG_BYPASS_SHDW_REG           (1 << 9)
-//Set S0I3_BypassShdwTmr in AOAC offset 0x98 bit 8 to 0
-//Set S0I3_BypassShdwReg in AOAC offset 0x98 bit 9 to 1
-
-#define FCH_AOACx9CS013_TIMER_CONTROL            0xFED81E9Cul        //
-#define FCH_AOACx9CS013_TIMER_CONTROL_SHADOW_HPET_EN            (1 << 0)
-#define FCH_AOACx9CS013_TIMER_CONTROL_EARLY_COUNT_UNIT          (1 << 2)
-#define FCH_AOACx9CS013_TIMER_CONTROL_EARLY_COUNT_MASK          (0xff << 8)
-#define FCH_AOACx9CS013_TIMER_CONTROL_EARLY_COUNT_VALUE         (0x23 << 8)
-//Set ShadowHPETEn in AOAC offset 0x9C bit 0 to 1
-//Set EarlyCountUnit in AOAC offset 0x9C bit 2 to 1
-//Program EarlyCount in AOAC offset 0x9C bit[15:8]. (please set 0x23 for now)
-
-
-#define FCH_AL2AHBx10_CONTROL            0xFEDC0010ul        //
-#define FCH_AL2AHBx10_CONTROL_CLOCK_GATE_EN            (1 << 1)
-
-#define FCH_AL2AHBx30_HCLK_CONTROL            0xFEDC0030ul        //
-#define FCH_AL2AHBx30_HCLK_CONTROL_CLOCK_GATE_EN            (1 << 1)
-
-#define FCH_IOMAP_REG00          0x000   // Dma_C 0
-#define FCH_IOMAP_REG02          0x002   // Dma_C 1
-#define FCH_IOMAP_REG04          0x004   // Dma_C 2
-#define FCH_IOMAP_REG06          0x006   // Dma_C 3
-#define FCH_IOMAP_REG08          0x008   // Dma_Status
-#define FCH_IOMAP_REG09          0x009   // Dma_WriteRest
-#define FCH_IOMAP_REG0A          0x00A   // Dma_WriteMask
-#define FCH_IOMAP_REG0B          0x00B   // Dma_WriteMode
-#define FCH_IOMAP_REG0C          0x00C   // Dma_Clear
-#define FCH_IOMAP_REG0D          0x00D   // Dma_MasterClr
-#define FCH_IOMAP_REG0E          0x00E   // Dma_ClrMask
-#define FCH_IOMAP_REG0F          0x00F   // Dma_AllMask
-#define FCH_IOMAP_REG20          0x020   // IntrCntrlReg1
-#define FCH_IOMAP_REG21          0x021   // IntrCntrlReg2
-#define FCH_IOMAP_REG40          0x040   // TimerC0
-#define FCH_IOMAP_REG41          0x041   // TimerC1
-#define FCH_IOMAP_REG42          0x042   // TimerC2
-#define FCH_IOMAP_REG43          0x043   // Tmr1CntrlWord
-#define FCH_IOMAP_REG61          0x061   // Nmi_Status
-#define FCH_IOMAP_REG70          0x070   // Nmi_Enable
-#define FCH_IOMAP_REG71          0x071   // RtcDataPort
-#define FCH_IOMAP_REG72          0x072   // AlternatRtcAddrPort
-#define FCH_IOMAP_REG73          0x073   // AlternatRtcDataPort
-#define FCH_IOMAP_REG80          0x080   // Dma_Page_Reserved0
-#define FCH_IOMAP_REG81          0x081   // Dma_PageC2
-#define FCH_IOMAP_REG82          0x082   // Dma_PageC3
-#define FCH_IOMAP_REG83          0x083   // Dma_PageC1
-#define FCH_IOMAP_REG84          0x084   // Dma_Page_Reserved1
-#define FCH_IOMAP_REG85          0x085   // Dma_Page_Reserved2
-#define FCH_IOMAP_REG86          0x086   // Dma_Page_Reserved3
-#define FCH_IOMAP_REG87          0x087   // Dma_PageC0
-#define FCH_IOMAP_REG88          0x088   // Dma_Page_Reserved4
-#define FCH_IOMAP_REG89          0x089   // Dma_PageC6
-#define FCH_IOMAP_REG8A          0x08A   // Dma_PageC7
-#define FCH_IOMAP_REG8B          0x08B   // Dma_PageC5
-#define FCH_IOMAP_REG8C          0x08C   // Dma_Page_Reserved5
-#define FCH_IOMAP_REG8D          0x08D   // Dma_Page_Reserved6
-#define FCH_IOMAP_REG8E          0x08E   // Dma_Page_Reserved7
-#define FCH_IOMAP_REG8F          0x08F   // Dma_Refres
-#define FCH_IOMAP_REG92          0x092   // FastInit
-#define FCH_IOMAP_REGA0          0x0A0   // IntrCntrl2Reg1
-#define FCH_IOMAP_REGA1          0x0A1   // IntrCntrl2Reg2
-#define FCH_IOMAP_REGC0          0x0C0   // Dma2_C4Addr
-#define FCH_IOMAP_REGC2          0x0C2   // Dma2_C4Cnt
-#define FCH_IOMAP_REGC4          0x0C4   // Dma2_C5Addr
-#define FCH_IOMAP_REGC6          0x0C6   // Dma2_C5Cnt
-#define FCH_IOMAP_REGC8          0x0C8   // Dma2_C6Addr
-#define FCH_IOMAP_REGCA          0x0CA   // Dma2_C6Cnt
-#define FCH_IOMAP_REGCC          0x0CC   // Dma2_C7Addr
-#define FCH_IOMAP_REGCE          0x0CE   // Dma2_C7Cnt
-#define FCH_IOMAP_REGD0          0x0D0   // Dma_Status
-#define FCH_IOMAP_REGD2          0x0D2   // Dma_WriteRest
-#define FCH_IOMAP_REGD4          0x0D4   // Dma_WriteMask
-#define FCH_IOMAP_REGD6          0x0D6   // Dma_WriteMode
-#define FCH_IOMAP_REGD8          0x0D8   // Dma_Clear
-#define FCH_IOMAP_REGDA          0x0DA   // Dma_Clear
-#define FCH_IOMAP_REGDC          0x0DC   // Dma_ClrMask
-#define FCH_IOMAP_REGDE          0x0DE   // Dma_ClrMask
-#define FCH_IOMAP_REGED          0x0ED   // DUMMY IO PORT
-#define FCH_IOMAP_REGF0          0x0F0   // NCP_Error
-#define FCH_IOMAP_REG40B         0x040B  // DMA1_Extend
-#define FCH_IOMAP_REG4D0         0x04D0  // IntrEdgeControl
-#define FCH_IOMAP_REG4D6         0x04D6  // DMA2_Extend
-#define FCH_IOMAP_REGC00         0x0C00  // Pci_Intr_Index
-#define FCH_IOMAP_REGC01         0x0C01  // Pci_Intr_Data
-#define FCH_IOMAP_REGC14         0x0C14  // Pci_Error
-#define FCH_IOMAP_REGC50         0x0C50  // CMIndex
-#define FCH_IOMAP_REGC51         0x0C51  // CMData
-#define FCH_IOMAP_REGC52         0x0C52  // GpmPort
-#define FCH_IOMAP_REGC6F         0x0C6F  // Isa_Misc
-#define FCH_IOMAP_REGCD0         0x0CD0  // PMio2_Index
-#define FCH_IOMAP_REGCD1         0x0CD1  // PMio2_Data
-#define FCH_IOMAP_REGCD4         0x0CD4  // BIOSRAM_Index
-#define FCH_IOMAP_REGCD5         0x0CD5  // BIOSRAM_Data
-#define FCH_IOMAP_REGCD6         0x0CD6  // PM_Index
-#define FCH_IOMAP_REGCD7         0x0CD7  // PM_Data
-#define FCH_IOMAP_REGCF9         0x0CF9          // CF9Rst reg
-
-#define FCH_IRQ_INTA             0x00    // INTA#
-#define FCH_IRQ_INTB             0x01    // INTB#
-#define FCH_IRQ_INTC             0x02    // INTC#
-#define FCH_IRQ_INTD             0x03    // INTD#
-#define FCH_IRQ_INTE             0x04    // INTE#
-#define FCH_IRQ_INTF             0x05    // INTF#
-#define FCH_IRQ_INTG             0x06    // INTG#
-#define FCH_IRQ_INTH             0x07    // INTH#
-#define FCH_IRQ_SCI              0x10    // SCI
-#define FCH_IRQ_SMBUS0           0x11    // SMBUS0
-#define FCH_IRQ_ASF              0x12    // ASF
-#define FCH_IRQ_HDAUDIO          0x13    // HD Audio
-#define FCH_IRQ_FC               0x14    // FC
-#define FCH_IRQ_GEC              0x15    // GEC
-#define FCH_IRQ_SD               0x17    // SD
-#define FCH_IRQ_IMCINT0          0x20    // IMC INT0
-#define FCH_IRQ_IMCINT1          0x21    // IMC INT1
-#define FCH_IRQ_IMCINT2          0x22    // IMC INT2
-#define FCH_IRQ_IMCINT3          0x23    // IMC INT3
-#define FCH_IRQ_IMCINT4          0x24    // IMC INT4
-#define FCH_IRQ_IMCINT5          0x25    // IMC INT5
-#define FCH_IRQ_USB18INTA        0x30    // Dev 18 (USB) INTA#
-#define FCH_IRQ_USB18INTB        0x31    // Dev 18 (USB) INTB#
-#define FCH_IRQ_USB19INTA        0x32    // Dev 19 (USB) INTA#
-#define FCH_IRQ_USB19INTB        0x33    // Dev 19 (USB) INTB#
-#define FCH_IRQ_USB22INTA        0x34    // Dev 22 (USB) INTA#
-#define FCH_IRQ_USB22INTB        0x35    // Dev 22 (USB) INTB#
-#define FCH_IRQ_USB20INTC        0x36    // Dev 20 (USB) INTC#
-#define FCH_IRQ_IDE              0x40    // IDE pci interrupt
-#define FCH_IRQ_SATA             0x41    // SATA pci interrupt
-#define FCH_IRQ_GPPINT0          0x50    // Gpp Int0
-#define FCH_IRQ_GPPINT1          0x51    // Gpp Int1
-#define FCH_IRQ_GPPINT2          0x52    // Gpp Int2
-#define FCH_IRQ_GPPINT3          0x53    // Gpp Int3
-#define FCH_IRQ_GPIO             0x62    // GPIO Controller
-#define FCH_IRQ_I2C0             0x70    // I2C0 Controller
-#define FCH_IRQ_I2C1             0x71    // I2C1 Controller
-#define FCH_IRQ_I2C2             0x72    // I2C2 Controller
-#define FCH_IRQ_I2C3             0x73    // I2C3 Controller
-#define FCH_IRQ_UART0            0x74    // UART0 Controller
-#define FCH_IRQ_UART1            0x75    // UART1 Controller
-#define FCH_IRQ_IOAPIC           0x80    // Select IRQ routing to IoApic mode
-#define FCH_IRQ_PIC              0x00    // Select IRQ routing to PIC mode
-
-#define FCH_IRQ_INTERNAL_SHARE   0x07    // Fch Internal Shared IRQ
-#define FCH_IRQ_GPIO_IRQ         FCH_IRQ_INTERNAL_SHARE
-#define FCH_IRQ_I2C0_IRQ         3
-#define FCH_IRQ_I2C1_IRQ         15
-#define FCH_IRQ_I2C2_IRQ         6
-#define FCH_IRQ_I2C3_IRQ         14
-#define FCH_IRQ_UART0_IRQ        10
-#define FCH_IRQ_UART1_IRQ        11
-
-
-#define FCH_SPI_MMIO_REG00       0x00        //SPI_
-#define FCH_SPI_OPCODE           0x000000FFl  //
-#define FCH_SPI_TX_COUNT         0x00000F00l  //
-#define FCH_SPI_RX_COUNT         0x0000F000l  //
-#define FCH_SPI_EXEC_OPCODE      0x00010000l  //
-#define FCH_SPI_FIFO_PTR_CRL     0x00100000l  //
-#define FCH_SPI_FIFO_PTR_INC     0x00200000l  //
-#define FCH_SPI_BUSY             0x80000000l  //
-#define FCH_SPI_MMIO_REG0C       0x0C        //SPI_Cntrl1 Register
-#define FCH_SPI_PARAMETER        0x000000FFl  //
-#define FCH_SPI_FIFO_PTR         0x00000700l  //
-#define FCH_SPI_BYTE_PROGRAM     0xFF000000l  //
-#define FCH_SPI_MMIO_REG1C       0x1C        //
-#define FCH_SPI_RETRY_TIMES      0x3         //
-
-#define FCH_SPI_MMIO_REG1D       0x1D        //
-#define FCH_SPI_MMIO_REG1E       0x1E        //
-#define FCH_SPI_MMIO_REG1F       0x1F        //
-#define FCH_SPI_MMIO_REG4E       0x4E        //
-
-#define FCH_SPI_MMIO_REG1F_X05_TX_BYTE_COUNT   0x05        //
-#define FCH_SPI_MMIO_REG1F_X06_RX_BYTE_COUNT   0x06        //
-
-#define FCH_SPI_MMIO_REG20       0x20        //
-#define FCH_SPI_MMIO_REG22       0x22        //
-#define FCH_SPI_MMIO_REG2C       0x2C        //
-#define FCH_SPI_MMIO_REG38       0x38        //
-#define FCH_SPI_MMIO_REG3C       0x3C        //
-
-#define FCH_SPI_MMIO_REG45_CMDCODE           0x45        //
-#define FCH_SPI_MMIO_REG47_CMDTRIGGER        0x47        //
-#define FCH_SPI_MMIO_REG48_TXBYTECOUNT       0x48        //
-#define FCH_SPI_MMIO_REG4B_RXBYTECOUNT       0x4B        //
-#define FCH_SPI_MMIO_REG4C_SPISTATUS         0x4C        //
-#define FCH_SPI_MMIO_REG80_FIFO              0x80        //
-
-#define FCH_SPI_MODE_FAST        0x7        //
-#define FCH_SPI_MODE_NORMAL      0x6        //
-#define FCH_SPI_MODE_QUAL_144    0x5        //
-#define FCH_SPI_MODE_QUAL_122    0x4        //
-#define FCH_SPI_MODE_QUAL_114    0x3        //
-#define FCH_SPI_MODE_QUAL_112    0x2        //
-
-#define FCH_SPI_DEVICE_MODE_DIS  0x7        //
-#define FCH_SPI_DEVICE_MODE_144  0x4        //
-#define FCH_SPI_DEVICE_MODE_114  0x3        //
-#define FCH_SPI_DEVICE_MODE_122  0x2        //
-#define FCH_SPI_DEVICE_MODE_112  0x1        //
-#define FCH_SPI_DEVICE_MODE_FAST 0x0        //
-
-#define FCH_SPI_SPEED_16M        0x4        //
-#define FCH_SPI_SPEED_22M        0x3        //
-#define FCH_SPI_SPEED_33M        0x2        //
-#define FCH_SPI_SPEED_66M        0x1        //
-#define FCH_SPI_SPEED_100M       0x5        //
-
-#define AMD_NB_REG78            0x78
-#define AMD_NB_SCRATCH          AMD_NB_REG78
-#define MailBoxPort             0x3E
-
-#define MAX_LT_POLLINGS         0x4000
-#define SMI_TIMER_ENABLE        BIT15
-
-#define ACPIMMIO32(x) (*(volatile UINT32*)(UINTN)(x))
-#define ACPIMMIO16(x) (*(volatile UINT16*)(UINTN)(x))
-#define ACPIMMIO8(x)  (*(volatile UINT8*)(UINTN)(x))
-
-#define U3PLL_LOCK                   BIT7
-#define U3PLL_RESET                  BIT8
-#define U3PHY_RESET                  BIT9
-#define U3CORE_RESET                 BIT10
-#define XHC0_FUNC_RESET              BIT11
-#define XHC1_FUNC_RESET              BIT12
-
-#define XHCI_ACPI_MMIO_AMD_REG00     0x00
-#define XHCI_ACPI_MMIO_AMD_REG04     0x04
-#define XHCI_ACPI_MMIO_AMD_REG08     0x08
-#define XHCI_ACPI_MMIO_AMD_REG10     0x10
-#define XHCI_ACPI_MMIO_AMD_REG14     0x14
-#define XHCI_ACPI_MMIO_AMD_REG20     0x20
-#define XHCI_ACPI_MMIO_AMD_REG24     0x24
-#define XHCI_ACPI_MMIO_AMD_REG28     0x28
-#define XHCI_ACPI_MMIO_AMD_REG30     0x30
-#define XHCI_ACPI_MMIO_AMD_REG40     0x40
-#define XHCI_ACPI_MMIO_AMD_REG48     0x48 // USB3.0_Ind_REG Index
-#define XHCI_ACPI_MMIO_AMD_REG4C     0x4C // USB2.0_Ind_REG Data
-#define XHCI_ACPI_MMIO_AMD_REG8C     0x8C
-#define XHCI_ACPI_MMIO_AMD_REG90     0x90 // adaptation timer settings
-#define XHCI_ACPI_MMIO_AMD_REG98     0x98
-#define XHCI_ACPI_MMIO_AMD_REGA0     0xA0 // BAR 0
-#define XHCI_ACPI_MMIO_AMD_REGA4     0xA4 // BAR 1
-#define XHCI_ACPI_MMIO_AMD_REGA8     0xA8 // BAR 2
-#define XHCI_ACPI_MMIO_AMD_REGB0     0xB0 // SPI_Valid_Base.
-#define XHCI_ACPI_MMIO_AMD_REGC0     0xC0 // Firmware starting offset for coping
-#define XHCI_ACPI_MMIO_AMD_REGB4     0xB4
-#define XHCI_ACPI_MMIO_AMD_REGD0     0xD0
-
-#define FCH_XHCI_REG48                0x48 // XHCI IND_REG Index registers
-#define FCH_XHCI_REG4C                0x4C // XHCI IND_REG Data registers
-
-#define FCH_XHCI_IND60_BASE           0x40000000ul //
-
-#define FCH_XHCI_IND60_REG00           FCH_XHCI_IND60_BASE + 0x00 //
-#define FCH_XHCI_IND60_REG04           FCH_XHCI_IND60_BASE + 0x04 //
-#define FCH_XHCI_IND60_REG08           FCH_XHCI_IND60_BASE + 0x08 //
-#define FCH_XHCI_IND60_REG0C           FCH_XHCI_IND60_BASE + 0x0C //
-#define FCH_XHCI_IND60_REG18           FCH_XHCI_IND60_BASE + 0x18 //
-#define FCH_XHCI_IND60_REG48           FCH_XHCI_IND60_BASE + 0x48 //
-#define FCH_XHCI_IND60_REG50           FCH_XHCI_IND60_BASE + 0x50 //
-#define FCH_XHCI_IND60_REG54           FCH_XHCI_IND60_BASE + 0x54 //
-#define FCH_XHCI_IND60_REG58           FCH_XHCI_IND60_BASE + 0x58 //
-#define FCH_XHCI_IND60_REG5C           FCH_XHCI_IND60_BASE + 0x5C //
-#define FCH_XHCI_IND60_REG68           FCH_XHCI_IND60_BASE + 0x68 //
-#define FCH_XHCI_IND60_REG6C           FCH_XHCI_IND60_BASE + 0x6C //
-
-#define FCH_XHCI_IND_REG00            0x00  //
-#define FCH_XHCI_IND_REG04            0x04  //
-#define FCH_XHCI_IND_REG48            0x48  //
-#define FCH_XHCI_IND_REG54            0x54  //
-#define FCH_XHCI_IND_REG88            0x88  //
-#define FCH_XHCI_IND_REG94            0x94  // adaptation mode settings
-#define FCH_XHCI_IND_REG98            0x98  // CR phase and frequency filter settings
-#define FCH_XHCI_IND_REGC8            0xC8  //
-#define FCH_XHCI_IND_REGD4            0xD4  // adaptation mode settings
-#define FCH_XHCI_IND_REGD8            0xD8  // CR phase and frequency filter settings
-#define FCH_XHCI_IND_REG100           0x100 //
-#define FCH_XHCI_IND_REG120           0x120 //
-#define FCH_XHCI_IND_REG128           0x128 //
-#define FCH_XHCI_IND_REG200           0x200 //
-#define FCH_XHCI_IND_REG240           0x240 //
-#define FCH_XHCI_IND_REG280           0x280 //
-#define FCH_XHCI_IND_REG2C0           0x2C0 //
-#define MAX_XHCI_PORTS                0x04
-
-//SMBUS
-#define FCH_SMB_IOREG00               0x00        // SMBusStatus
-#define FCH_SMB_IOREG01               0x01        // SMBusSlaveStatus
-#define FCH_SMB_IOREG02               0x02        // SMBusControl
-#define FCH_SMB_IOREG03               0x03        // SMBusHostCmd
-#define FCH_SMB_IOREG04               0x04        // SMBusAddress
-#define FCH_SMB_IOREG05               0x05        // SMBusData0
-#define FCH_SMB_IOREG06               0x06        // SMBusData1
-#define FCH_SMB_IOREG07               0x07        // SMBusBlockData
-#define FCH_SMB_IOREG08               0x08        // SMBusSlaveControl
-#define FCH_SMB_IOREG14               0x14        // SMBusAutoPoll
-#define FCH_SMB_IOREG16               0x16        // SMBusPausePoll
-#define FCH_SMB_IOREG17               0x17        // SMBusHostCmd2
-
-#define FCH_SMB_CMD_QUICK             0x00 << 2   // Quick Read or Write
-#define FCH_SMB_CMD_BYTE              0x01 << 2   // Byte Read or Write
-#define FCH_SMB_CMD_BYTE_DATA         0x02 << 2   // Byte Data Read or Write
-#define FCH_SMB_CMD_WORD_DATA         0x03 << 2   // Word Data Read or Write
-#define FCH_SMB_CMD_BLOCK             0x05 << 2   // Block Read or Write
-
-#define FCH_SMB_ALL_HOST_STATUS       0x1f        // HostBusy+SMBInterrupt+DeviceErr+BusCollision+Failed
-#define FCH_SMB_CMD_BYTE_DATA_START   0x48        // Byte Data Read or Write
-#define FCH_SMB_CMD_START             BIT6
-#define FCH_SMB_READ_ENABLE           BIT0
-#define FCH_SMB_AUTO_POLL_EN          BIT0
-#define FCH_SMB_POLL2BYTE             BIT7
-
-#define SBTSI_ADDR                    0x98
-#define SBTSI_REG01                   0x01
-#define SBTSI_REG09                   0x09
-#define SBTSI_REG10                   0x10
-#define SBTSI_READORDER               BIT5
-
-#define FCH_EC_ENTER_CONFIG           0X5A
-#define FCH_EC_EXIT_CONFIG            0XA5
-#define FCH_EC_REG07                  0X07
-#define FCH_EC_REG30                  0X30
-#define FCH_EC_REG60                  0X60
-#define FCH_EC_REG61                  0X61
-
-#define FCH_IMC_ROMSIG                0x55aa55aaul
-
-#define SPI_HEAD_LENGTH 0x0E
-#define SPI_BAR0_VLD  0x01
-#define SPI_BASE0     (0x00 << 7)
-#define SPI_BAR1_VLD  (0x01 << 8)
-#define SPI_BASE1     (SPI_HEAD_LENGTH << 10)
-#define SPI_BAR2_VLD  (0x01 << 16)
-#define SPI_BASE2(x)  ((SPI_HEAD_LENGTH + ACPIMMIO16(x)) << 18)
-
-#define FW_TO_SIGADDR_OFFSET  0x0C
-#define BCD_ADDR_OFFSET       0x02
-#define BCD_SIZE_OFFSET       0x04
-#define FW_ADDR_OFFSET        0x06
-#define FW_SIZE_OFFSET        0x08
-#define ACD_ADDR_OFFSET       0x0A
-#define ACD_SIZE_OFFSET       0x0C
-#define XHC_BOOT_RAM_SIZE     0x8000
-
-#define PKT_DATA_REG       ACPI_MMIO_BASE + GFX_DAC_BASE + 0x00
-#define PKT_LEN_REG        ACPI_MMIO_BASE + GFX_DAC_BASE + 0x14
-#define PKT_CTRL_REG       ACPI_MMIO_BASE + GFX_DAC_BASE + 0x15
-#define EFUS_DAC_ADJUSTMENT_CONTROL    0x850A8ul
-#define BGADJ                             0x1F
-#define DACADJ                            0x1B
-#define EFUS_DAC_ADJUSTMENT_CONTROL_DATA  (BGADJ + (DACADJ << 8) + BIT16 )
-
-#define KABINI_OSC_OUT_CLOCK_SEL_48MHz  0x02
-#define KABINI_OSC_OUT_CLOCK_SEL_25MHz  0x01
-
-#define KERN_OSC_OUT_CLOCK_SEL_48MHz  0x02
-#define KERN_OSC_OUT_CLOCK_SEL_25MHz  0x01
-
-#define RTC_WORKAROUND_SECOND           0x00
-#define RTC_VALID_SECOND_VALUE          0x59
-#define RTC_SECOND_RESET_VALUE          0x30
-#define RTC_SECOND_LOWER_NIBBLE         0x0F
-#define RTC_VALID_SECOND_VALUE_LN       0x09
-
-#ifndef FCH_DEADLOOP
-  #define FCH_DEADLOOP()    { volatile UINTN __i; __i = 1; while (__i); }
-#endif
-
-#define OHCI_ARB_REGQ_VLD_EN            BIT2
-
-#define HCEx40_Control  0xFED80040ul
-#define HCEx44_Input    0xFED80044ul
-#define HCEx48_Output   0xFED80048ul
-#define HCEx4C_Status   0xFED8004Cul
-#define HCEx50_IntrEn   0xFED80050ul
-#define EmulationSmiEn  BIT4
-
-#define FCH_PMx08_PciControl           0xFED80308ul        // PCI Control
-#define FCH_PMx08_PciControl_ShutDownOption  BIT20
-
-#define FCH_PMxD2_PmioDebug           0xFED803D2ul        // Pmio Debug
-#define FCH_PMxD6_Imc_Gating           0xFED803D6ul        // IMC Gating
-#define FCH_PMxEC_LpcGating           0xFED803ECul        // LPC Gating
-

pi/amd/00660F01/Proc/Fch/FchPlatform.h

diff --git a/pi/amd/00660F01/Proc/Fch/FchPlatform.h b/pi/amd/00660F01/Proc/Fch/FchPlatform.h
deleted file mode 100644
index ca2a8d8..0000000
--- a/pi/amd/00660F01/Proc/Fch/FchPlatform.h
+++ /dev/null
@@ -1,117 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH platform definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef  _FCH_PLATFORM_H_
-#define  _FCH_PLATFORM_H_
-
-#define MAX_SATA_PORTS 8
-
-#include "AGESA.h"
-
-#ifndef FCHOEM_ACPI_RESTORE_SWSMI
-  #define FCHOEM_BEFORE_PCI_RESTORE_SWSMI    0xD3
-  #define FCHOEM_AFTER_PCI_RESTORE_SWSMI     0xD4
-  #define FCHOEM_ENABLE_ACPI_SWSMI           0xA0
-  #define FCHOEM_DISABLE_ACPI_SWSMI          0xA1
-  #define FCHOEM_START_TIMER_SMI             0xBC
-  #define FCHOEM_STOP_TIMER_SMI              0xBD
-#endif
-
-#ifndef FCHOEM_SPI_UNLOCK_SWSMI
-  #define FCHOEM_SPI_UNLOCK_SWSMI            0xAA
-#endif
-#ifndef FCHOEM_SPI_LOCK_SWSMI
-  #define FCHOEM_SPI_LOCK_SWSMI              0xAB
-#endif
-
-#ifndef FCHOEM_ACPI_TABLE_RANGE_LOW
-  #define FCHOEM_ACPI_TABLE_RANGE_LOW        0xE0000ul
-#endif
-
-#ifndef FCHOEM_ACPI_TABLE_RANGE_HIGH
-  #define FCHOEM_ACPI_TABLE_RANGE_HIGH       0xFFFF0ul
-#endif
-
-#ifndef FCHOEM_ACPI_BYTE_CHECHSUM
-  #define FCHOEM_ACPI_BYTE_CHECHSUM          0x100
-#endif
-
-#ifndef FCHOEM_IO_DELAY_PORT
-  #define FCHOEM_IO_DELAY_PORT               0x80
-#endif
-
-#ifndef FCHOEM_OUTPUT_DEBUG_PORT
-  #define FCHOEM_OUTPUT_DEBUG_PORT           0x80
-#endif
-
-#define FCH_PCIRST_BASE_IO                   0xCF9
-#define FCH_PCI_RESET_COMMAND06              0x06
-#define FCH_PCI_RESET_COMMAND0E              0x0E
-#define FCH_KBDRST_BASE_IO                   0x64
-#define FCH_KBC_RESET_COMMAND                0xFE
-#define FCH_ROMSIG_BASE_IO                   0x20000l
-#define FCH_ROMSIG_SIGNATURE                 0x55AA55AAul
-#define FCH_MAX_TIMER                        0xFFFFFFFFul
-#define FCH_GEC_INTERNAL_REG                 0x6804
-#define FCH_HPET_REG_MASK                    0xFFFFF800ul
-#define FCH_FAKE_USB_BAR_ADDRESS             0x58830000ul
-
-
-#ifndef FCHOEM_ELAPSED_TIME_UNIT
-  #define FCHOEM_ELAPSED_TIME_UNIT           28
-#endif
-
-#ifndef FCHOEM_ELAPSED_TIME_DIVIDER
-  #define FCHOEM_ELAPSED_TIME_DIVIDER        100
-#endif
-
-#include "Fch.h"
-#include "amdlib.h"
-#include "FchCommonCfg.h"
-#include "AcpiLib.h"
-#include "FchDef.h"
-#include "FchBiosRamUsage.h"
-#include "AmdFch.h"
-
-extern BUILD_OPT_CFG    UserOptions;
-
-#endif // _FCH_PLATFORM_H_

pi/amd/00660F01/Proc/Fch/Kern/KernFch.h

diff --git a/pi/amd/00660F01/Proc/Fch/Kern/KernFch.h b/pi/amd/00660F01/Proc/Fch/Kern/KernFch.h
deleted file mode 100644
index a20ec19..0000000
--- a/pi/amd/00660F01/Proc/Fch/Kern/KernFch.h
+++ /dev/null
@@ -1,200 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH registers definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#define KERN_FCH_SATA_DID                 0x7900
-#define KERN_FCH_SATA_AHCI_DID            0x7901
-#define KERN_FCH_SATA_AMDAHCI_DID         0x7904
-
-#define KERN_FCH_USB_XHCI_DID             0x7914      // Dev 0x10 Func 0
-#define KERN_FCH_USB_EHCI_DID             0x7908      // Dev 0x12 Func 0
-#define KERN_FCH_SMBUS_DID                0x790B      // Dev 0x14 Func 0
-#define KERN_FCH_LPC_DID                  0x790E      // Dev 0x14 Func 3
-#define KERN_FCH_SD_DID                   0x7906      // Dev 0x14 Func 7
-
-#define KERN_EHCI1_BUS_DEV_FUN            ((0x12 << 3) + 0)
-#define KERN_EHCI1_BUS        0
-#define KERN_EHCI1_DEV        18
-#define KERN_EHCI1_FUNC       0
-#define KERN_EHCI2_BUS_DEV_FUN            ((0x13 << 3) + 0)
-#define KERN_EHCI2_BUS        0
-#define KERN_EHCI2_DEV        19
-#define KERN_EHCI2_FUNC       0
-#define KERN_EHCI3_BUS_DEV_FUN            ((0x16 << 3) + 0)
-#define KERN_EHCI3_BUS        0
-#define KERN_EHCI3_DEV        22
-#define KERN_EHCI3_FUNC       0
-
-// Specific FCH register for Kern
-#define FCH_EHCI_REG64                    0x64
-#define FCH_EHCI_REGA4                    0xA4
-
-// HD Audio/Azalia
-#define KERN_EVENT_HD_AUDIO_MSI_ENABLE                 0x02010100ul   // HD Audio/Azalia MSI enable.
-#define KERN_EVENT_HD_AUDIO_DISABLE                    0x02010101ul   // HD Audio/Azalia Disable.
-#define KERN_EVENT_HD_AUDIO_CONFIG_CODEC               0x02010102ul   // HD Audio/Azalia Configure CODEC.
-#define KERN_EVENT_HD_AUDIO_CONFIG_CODEC_BUSY          0x02010103ul   // HD Audio/Azalia Configure CODEC Reset.
-#define KERN_ERROR_HD_AUDIO_RESET                      0x02030100ul   // HD Audio/Azalia Reset Failure.
-#define KERN_ERROR_HD_AUDIO_CODEC                      0x02030101ul   // HD Audio/Azalia Codec Not Found.
-// HW ACPI
-#define KERN_EVENT_HWACPI_PROG_ACPI_PMTBL              0x02010200ul   // FCH program ACPI PM Controller Base Address.
-#define KERN_EVENT_HWACPI_PROG_ACPI_MMIO_IN_RESET      0x02010201ul   // FCH program ACPIMMIO registers in RESET.
-#define KERN_EVENT_HWACPI_PROG_SCI_MAP                 0x02010202ul   // FCH program SCI map by OEM table (ACPIMMIO 0xFED803xx).
-#define KERN_EVENT_HWACPI_PROG_GPIO_MAP                0x02010203ul   // FCH program GPIO setting by OEM table (ACPIMMIO 0xFED801xx).
-#define KERN_EVENT_HWACPI_PROG_SATA_PHY                0x02010204ul   // FCH program SATA PHY by OEM table.
-#define KERN_EVENT_RTC_DAYLIGHT_SAVING_TIME            0x02010205ul   // FCH RTC DayLight Saving Workaround.
-#define KERN_EVENT_RTC_CLEAR_BANK_SELECTION            0x02010206ul   // FCH RTC clear BankSelection 0x0A Bit4 prevent error.
-#define KERN_EVENT_RTC_WA                              0x02010207ul   // FCH RTC workaround is set.
-#define KERN_EVENT_KBD_CONNECTED_THRU_USB              0x02010208ul   // FCH IRQ1/IRQ12 connected to USB controller.
-#define KERN_EVENT_LEGACY_FREE_SET                     0x02010209ul   // FCH None Legacy IO setting.
-#define KERN_EVENT_ENABLED_ASF_REMOTE_CTRL             0x0201020Aul   // FCH Enable ASF remote control function.
-#define KERN_EVENT_PCIEXP_WAKESTATUS_WA                0x0201020Bul   // FCH PciExp Wake Status Workaround.
-#define KERN_EVENT_HWACPI_PROG_OEM_MMIOTBL_IN_RESET    0x0201020Cul   // FCH program OEM/Platform BIOS ACPIMMIO registers.
-#define KERN_EVENT_HWACPI_PROG_MMIOTBL                 0x02010200ul   // FCH program ACPIMMIO registers. (1st.)
-#define KERN_EVENT_HWACPI_NO_SIOKBC_ENABLE             0x02010201ul   // FCH No SIO/KBC function is enabled.
-#define KERN_EVENT_HWACPI_NO_SIOKBC_DISABLE            0x02010202ul   // FCH No SIO/KBC function is disabled.
-#define KERN_EVENT_HWACPI_PROG_SPECIFIC_MMIOTBL        0x02010203ul   // FCH program Specific ACPIMMIO registers. (2nd.)
-#define KERN_EVENT_HWACPI_PROG_OEM_MMIOTBL             0x02010204ul   // FCH program OEM/Platform BIOS ACPIMMIO registers (3rd.)
-#define KERN_EVENT_HWACPI_SPREAD_SPECTRUM              0x02010205ul   // FCH Enable Spread Spectrum function.
-#define KERN_EVENT_HWACPI_INT_CLK_SET                  0x02010206ul   // FCH Set Intermal Clock Display as 48Mhz.
-#define KERN_EVENT_HPET_TIMER_TICK_INTERVAL_WA_SET     0x02010207ul   // FCH HPET timer tick interval workaround is set.
-#define KERN_EVENT_C1E_ENABLE                          0x02010208ul   // FCH C1e Enabled.
-#define KERN_EVENT_NATIVEPCIE_MODE_SET                 0x02010208ul   // FCH Native PCIe mode is set.
-#define KERN_ERROR_HPET_TBL_NOT_FOUND                  0x02030200ul   // FCH HPET Table does not found.
-// HWM
-#define KERN_EVENT_IMC_DISABLE                         0x02010300ul   // FCH HWM/IMC is disabled.
-#define KERN_EVENT_IMC_ENABLE                          0x02010301ul   // FCH HWM/IMC is enabled.
-// IMC
-#define KERN_EVENT_IMC_SW_TOGGLE_EVENT                 0x02010302ul   // FCH IMC Software Toggle Strapping. (IMC statement change)
-#define KERN_EVENT_EC_ENABLE                           0x02020303ul   // FCH EC enabled.
-#define KERN_EVENT_EC_KBD_ENABLE                       0x02010304ul   // FCH IMC EC KBD enabled.
-#define KERN_EVENT_EC_CHANNEL0_ENABLE                  0x02010305ul   // FCH IMC EC channel0 function enabled.
-#define KERN_EVENT_IMC_INTO_SLEEP_MODE                 0x02010306ul   // FCH IMC goes into sleep mode.
-#define KERN_EVENT_IMC_CRASH_RESET                     0x02010307ul   // FCH IMC Crash Reset to prevent repeating the reset forever.
-#define KERN_EVENT_IMC_SW_DISABLE_IMC                  0x02010308ul   // FCH Software disable IMC thru mailbox command.
-#define KERN_EVENT_IMC_DISABLE_SUREBOOT_TIMMER         0x02010309ul   // FCH Disable SureBoot Timmer.
-#define KERN_EVENT_IMC_WAKEUP                          0x0201030Aul   // FCH IMC wakeup command.
-#define KERN_EVENT_IMC_IDLE                            0x0201030Bul   // FCH IMC idle command.
-#define KERN_EVENT_EC_DISABLE                          0x0201030Cul   // FCH EC disable by jumper setting or board config.
-#define KERN_ERROR_IMC_FW_VALIDATE_FAILED              0x02030300ul   // FCH IMC firmware validation failure.
-// PCIE/AB
-#define KERN_EVENT_AB_SLOW_SPEED_ABLINK_CLOCK          0x02010400ul   // FCH Set Low Speed AB link clock.
-#define KERN_EVENT_AB_RESET_CPU_ON_SYNC_FLOOD          0x02010401ul   // FCH set AB reset CPU on sync flood enabled.
-#define KERN_EVENT_AB_CLOCK_GATING_ENABLE              0x02010402ul   // FCH set AB Clock Gating function enabled.
-#define KERN_EVENT_AB_CLOCK_GATING_DISABLE             0x02010403ul   // FCH set AB clock Gating function disabled.
-#define KERN_EVENT_AB_DMA_MEMORY_W3264B_ENABLE         0x02010404ul   // FCH set AB DMA MEMORY Write 32/64B enabled.
-#define KERN_EVENT_AB_DMA_MEMORY_W3264B_DISABLED       0x02010405ul   // FCH set AB DMA MEMORY Write 32/64B disabled.
-#define KERN_EVENT_AB_MEMORY_POWERSAVING_ENABLED       0x02010406ul   // FCH Set AB Memory Power Saving enabled.
-#define KERN_EVENT_AB_MEMORY_POWERSAVING_DISABLED      0x02010407ul   // FCH Set AB Memory Power Saving disabled.
-#define KERN_EVENT_AB_ALINK_CLK_GATEOFF_ENABLED        0x02010408ul   // FHC set ALink clock Gate-off enabled.
-#define KERN_EVENT_AB_ALINK_CLK_GATEOFF_DISABLED       0x02010409ul   // FHC set ALink clock Gate-off disabled.
-#define KERN_EVENT_AB_BLINK_CLK_GATEOFF_ENABLED        0x0201040Aul   // FHC set BLink clock Gate-off enabled.
-#define KERN_EVENT_AB_BLINK_CLK_GATEOFF_DISABLED       0x0201040Bul   // FHC set BLink clock Gate-off disabled.
-// SATA
-#define KERN_EVENT_SATA_ENABLE                         0x02010500ul   // FCH set SATA controller enabled.
-#define KERN_EVENT_SATA_MAX_GEN2_MODE_ENABLE           0x02010501ul   // FCH set SATA support only Max. GEN2 mode.
-#define KERN_EVENT_SATA_SET_CLK_SOURCE_ORG_EXT         0x02010502ul   // FCH set SATA clock source as external 48Mhz.
-#define KERN_EVENT_SATA_SET_CLK_SOURCE_ORG_INT         0x02010502ul   // FCH set SATA clock source as internal 48Mhz.
-#define KERN_EVENT_SATA_SET_CLK_SOURCE_100_INT         0x02010503ul   // FCH set SATA clock source as internal 100Mhz.
-#define KERN_EVENT_SATA_STABLE_MEM_SHUTDOWN_ENABLE     0x02010504ul   // FCH set SATA stable memory sutdown enable * Misc.
-#define KERN_EVENT_SATA_PROG_SATA_PORT_PHY             0x02010505ul   // FCH programming SATA port's PHY.
-#define KERN_EVENT_SATA_READ_SQUELCH_FROM_EFUSE        0x02010506ul   // FCH programming SATA squelch value from eFuse.
-#define KERN_EVENT_SATA_DISABLE                        0x02010507ul   // FCH set SATA controller disabled.
-#define KERN_EVENT_SATA_AHCI_MODE                      0x02010508ul   // FCH set SATA as AHCI mode.
-#define KERN_EVENT_SATA_IDE_2_AHCI_MODE                0x02010509ul   // FCH set SATA as IDE_2_AHCI mode.
-#define KERN_EVENT_SATA_IDE_MODE                       0x0201050Aul   // FCH set SATA as IDE mode.
-#define KERN_EVENT_SATA_RAID_MODE                      0x0201050Bul   // FCH set SATA as RAID mode.
-#define KERN_EVENT_SATA_MSI_CAP_ENABLE                 0x0201050Cul   // FCH set SATA MSI Capability Enabled.
-#define KERN_EVENT_SATA_SUPPORT_8_DEVICE               0x0201050Dul   // FCH set SATA support 8 device mode.
-#define KERN_EVENT_SATA_DISABLED_GENERIC_MODE          0x0201050Eul   // FCH set SATA disable generic mode.
-#define KERN_EVENT_SATA_PHY_PLL_SHUTDOWN               0x0201050Ful   // FCH set SATA PHY PLL shutdown.
-#define KERN_EVENT_SATA_OOB_DETECTION_ENH              0x02010510ul   // FCH set SATA OOB Detection Enhance Mode.
-#define KERN_EVENT_SATA_MEM_POWER_SAVING               0x02010511ul   // FCH set SATA memory power saving.
-#define KERN_EVENT_SATA_DEV_SLP_PORT0                  0x02010512ul   // FCH set SATA Deep Sleep Mode on Port0.
-#define KERN_EVENT_SATA_DEV_SLP_PORT1                  0x02010513ul   // FCH set SATA Deep Sleep Mode on Port1.
-#define KERN_EVENT_SATA_AHCI_DIS_PREFETCH              0x02010514ul   // FCH set SATA AHCI disable Prefetch.
-#define KERN_EVENT_SATA_PORT_MULT_CAP                  0x02010515ul   // FCH set SATA Port Mult Capability Enabled.
-#define KERN_EVENT_SATA_FIS_BASE_SWITCHING             0x02010516ul   // FCH set SATA support FIS-based switching.
-#define KERN_EVENT_SATA_AGGR_LINK_PM_CAP               0x02010517ul   // FCH set SATA aggressive link power management.
-#define KERN_EVENT_SATA_PSC_CAP                        0x02010518ul   // FCH set SATA support partial state.
-#define KERN_EVENT_SATA_SSC_CAP                        0x02010519ul   // FCH set SATA support Slumber mode.
-#define KERN_EVENT_SATA_CCC_CAP                        0x0201051Aul   // FCH set SATA support command completion coalescing.
-#define KERN_EVENT_SATA_AHCI_ENCLOSURE_MANAGEMENT      0x0201051Bul   // FCH set SATA support Enclosure Management.
-#define KERN_EVENT_SATA_ESP_PORT_ENABLE                0x0201051Cul   // FCH set SATA ESP ports (one of ESP ports are set).
-#define KERN_EVENT_SATA_BIOS_OS_HANDOFF                0x0201051Dul   // FCH set SATA HBA supports the BIOS/OS handoff mechanism.
-#define KERN_EVENT_SATA_DRIVE_DETECTION                0x0201051Eul   // FCH SATA is excuting SATA drive detection.
-#define KERN_EVENT_SATA_CLK_AUTO_OFF                   0x0201051Ful   // FCH set SATA Auto Clock off function.
-#define KERN_EVENT_SATA_PORT_GEN_MODE                  0x02010520ul   // FCH set SATA port GEN mode.
-#define KERN_EVENT_SATA_HOT_REMOVAL_ENH                0x02010521ul   // FCH set SATA hot removal enhance mode.
-// SD
-#define KERN_EVENT_SD_ENABLE                           0x02010600ul   // FCH set SD controller to enable.
-#define KERN_EVENT_SD_AS_DMA_MODE                      0x02010601ul   // FCH set SD as DMA mode.
-#define KERN_EVENT_SD_AS_PIO_MODE                      0x02010602ul   // FCH set SD as PIO mode.
-#define KERN_EVENT_SD_AS_2_0_MODE                      0x02010603ul   // FCH set SD as 2.0 mode.
-#define KERN_EVENT_SD_AS_3_0_MODE                      0x02010604ul   // FCH set SD as 3.0 mode.
-#define KERN_EVENT_SD_CLOCK_MULTIPLIER                 0x02010605ul   // FCH set SD clock multiplier.
-#define KERN_EVENT_SD_DISABLE                          0x02010606ul   // FCH set SD controller to disable.
-// LPC/SPI
-#define KERN_EVENT_LPC_CLK0_DISABLE                    0x02010700ul   // FCH set LPC0 clock disabled.
-#define KERN_EVENT_LPC_CLK1_DISABLE                    0x02010701ul   // FCH set LPC1 clock disabled.
-#define KERN_EVENT_LPC_LEGACY_FREE_MODE                0x02010702ul   // FCH set LPC as legacy free mode.
-#define KERN_EVENT_SPI_QUAL_MODE                       0x02010703ul   // FCH SPI Qual Mode is enabled (by user selection).
-#define KERN_EVENT_SPI_SPEED                           0x02010704ul   // FCH SPI speed is set by user selection.
-#define KERN_EVENT_SPI_FAST_SPEED                      0x02010705ul   // FCH SPI fast speed is set.
-#define KERN_EVENT_SPI_QUALIFY_QUAL_MODE               0x02010706ul   // FCH SPI Qual Mode is validated.
-// USB
-#define KERN_ERROR_USB_ROMSIG_NOT_FOUND                0x02030800ul   // FCH ROMSIG not found.
-#define KERN_ERROR_USB_XHCI_FW_FOUND                   0x02030801ul   // FCH XHCI firmware does not exist.
-#define KERN_EVENT_USB_EHCI1_ENABLE                    0x02010800ul   // FCH set EHCI1 enable.
-#define KERN_EVENT_USB_EHCI2_ENABLE                    0x02010801ul   // FCH set EHCI2 enable.
-#define KERN_EVENT_USB_EHCI3_ENABLE                    0x02010802ul   // FCH set EHCI3 enable.
-#define KERN_EVENT_USB_XHCI_DISABLE                    0x02010803ul   // FCH set XHCI disable.
-#define KERN_EVENT_USB_PHY_POWER_DOWN                  0x02010804ul   // FCH set USB PHY powerdown enable.
-#define KERN_EVENT_USB_PHY_CALIBRATED                  0x02010805ul   // FCH set USB PHY calibrated.
-#define KERN_EVENT_USB_PORT_PHY_SETTING                0x02010806ul   // FCH set USB Port PHY setting.
-#define KERN_EVENT_USB_PORT_PHY_CLK_GATING             0x02010807ul   // FCH set USB Port PHY Clock Gating.
-#define KERN_EVENT_USB_XHCI_USED_PREDEFINE_ADDRESS     0x02010808ul   // FCH XHCI ROM location is used user-define address.
-#define KERN_EVENT_USB_XHCI_BOOTRAM_PRELOAD            0x02010809ul   // FCH XHCI preload its BOOTRAM.
-#define KERN_EVENT_USB_XHCI_INSTRUCTRAM_PRELOAD        0x0201080Aul   // FCH XHCI preload its InstructionRAM.
-#define KERN_EVENT_USB_XHCI_ROM_PREINIT_COMPLETED      0x0201080Bul   // FCH XHCI preinit completed.
-#define KERN_EVENT_USB_XHCI0_ENABLE                    0x0201080Cul   // FCH set XHCI0 enable.
-#define KERN_EVENT_USB_XHCI1_ENABLE                    0x0201080Dul   // FCH set XHCI1 enable.

pi/amd/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.c

diff --git a/pi/amd/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.c b/pi/amd/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.c
deleted file mode 100644
index 20a359a..0000000
--- a/pi/amd/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.c
+++ /dev/null
@@ -1,464 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * PSP Base Library
- *
- * Contains interface to the PSP library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  PSP
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-
-/*----------------------------------------------------------------------------------------
- *                             M O D U L E S    U S E D
- *----------------------------------------------------------------------------------------
- */
-#include "AGESA.h"
-#include "Filecode.h"
-#include "PspBaseLib.h"
-
-#define FILECODE PROC_PSP_PSPBASELIB_PSPBASELIB_FILECODE
-#define PSP_BAR1_TMP_BASE 0xFEA00000ul
-
-#define GET_PCI_BUS(Reg) (((UINT32) Reg >> 16) & 0xFF)
-#define GET_PCI_DEV(Reg) (((UINT32) Reg >> 11) & 0x1F)
-#define GET_PCI_FUNC(Reg) (((UINT32) Reg >> 8) & 0x7)
-#define GET_PCI_OFFSET(Reg) ((UINT32)Reg & 0xFF)
-
-#define PCI_CONFIG_SMU_INDIRECT_INDEX   0xB8          ///<  Gnb Offset index for SMU mbox
-#define PCI_CONFIG_SMU_INDIRECT_DATA    0xBC          ///<  Gnb Offset data for SMU mbox
-
-#define SMU_CC_PSP_FUSES_STATUS         0xC0018000ul  ///< offset in GNB to find PSP fusing
-#define SMU_CC_PSP_FUSES_SECURE         BIT0          ///< BIT0
-#define SMU_CC_PSP_FUSES_FRA_ENABLE     BIT1          ///< BIT1
-#define SMU_CC_PSP_FUSES_PROTO          BIT2          ///< BIT2
-#define PLATFORM_SECURE_BOOT_EN         BIT4          ///< BIT4
-
-
-#define PSP_BLANK_PART                  0   ///< Blank part
-#define PSP_PROTO_PART                  SMU_CC_PSP_FUSES_PROTO    ///< Proto Part
-#define PSP_NON_SECURE_PART             (SMU_CC_PSP_FUSES_PROTO + SMU_CC_PSP_FUSES_PCPU_DIS)    ///< Non Secure Part
-#define PSP_SECURE_PART                 (SMU_CC_PSP_FUSES_PROTO + SMU_CC_PSP_FUSES_SECURE)      ///< Secure Part
-#define PSP_FRA_MODE                    (SMU_CC_PSP_FUSES_FRA_ENABLE + SMU_CC_PSP_FUSES_PROTO + SMU_CC_PSP_FUSES_SECURE)  ///< FRA Part
-
-/*----------------------------------------------------------------------------------------
- *                   D E F I N I T I O N S    A N D    M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- *                  T Y P E D E F S     A N D     S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- *           P R O T O T Y P E S     O F     L O C A L     F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-
-UINT32
-PspLibPciReadConfig (
-  IN  UINT32 Register
-  )
-{
-  UINT32 Value;
-  PCI_ADDR PciAddr;
-
-  Value = 0;
-  PciAddr.AddressValue = MAKE_SBDFO (0, GET_PCI_BUS (Register), GET_PCI_DEV (Register), GET_PCI_FUNC (Register), GET_PCI_OFFSET (Register));
-
-  LibAmdPciRead (AccessWidth32, PciAddr, &Value, NULL);
-
-  return Value;
-}
-
-VOID
-PspLibPciWriteConfig (
-  IN  UINT32 Register,
-  IN  UINT32 Value
-  )
-{
-  PCI_ADDR PciAddr;
-  PciAddr.AddressValue = MAKE_SBDFO (0, GET_PCI_BUS (Register), GET_PCI_DEV (Register), GET_PCI_FUNC (Register), GET_PCI_OFFSET (Register));
-
-  LibAmdPciWrite (AccessWidth32, PciAddr, &Value, NULL);
-
-}
-
-UINT32
-PspLibPciReadPspConfig (
-  IN UINT16 Offset
-  )
-{
-  return (PspLibPciReadConfig  ((UINT32) (PSP_PCI_BDA  + Offset)));
-}
-
-VOID
-PspLibPciWritePspConfig (
-  IN UINT16 Offset,
-  IN  UINT32 Value
-  )
-{
-  PspLibPciWriteConfig  ((UINT32) (PSP_PCI_BDA  + Offset), Value);
-}
-
-BOOLEAN
-GetPspDirBase (
-  IN OUT   UINT32     *Address
-  )
-{
-  UINTN                     i;
-  FIRMWARE_ENTRY_TABLE      *FirmwareTableBase;
-  CONST UINT32 RomSigAddrTable[] =
-  {
-    0xFFFA0000, //  --> 512KB base
-    0xFFF20000, //  --> 1MB base
-    0xFFE20000, //  --> 2MB base
-    0xFFC20000, //  --> 4MB base
-    0xFF820000, //  --> 8MB base
-    0xFF020000  //  --> 16MB base
-  };
-
-  for (i = 0; i < sizeof (RomSigAddrTable) / sizeof (UINT32); i++) {
-    FirmwareTableBase  = (FIRMWARE_ENTRY_TABLE *) (UINTN) RomSigAddrTable[i];
-    // Search flash for unique signature 0x55AA55AA
-    if (FirmwareTableBase->Signature  == FIRMWARE_TABLE_SIGNATURE) {
-      *Address = FirmwareTableBase->PspDirBase;
-      return TRUE;
-    }
-  }
-
-  return (FALSE);
-}
-
-BOOLEAN
-PSPEntryInfo (
-  IN       PSP_DIRECTORY_ENTRY_TYPE    EntryType,
-  IN OUT   UINT64                      *EntryAddress,
-  IN       UINT32                      *EntrySize
-  )
-{
-  PSP_DIRECTORY         *PspDir;
-  UINTN                 i;
-
-  if (GetPspDirBase ((UINT32 *)&PspDir ) != TRUE) {
-    return FALSE;
-  }
-
-  for (i = 0; i < PspDir->Header.TotalEntries; i++) {
-    if (PspDir->PspEntry[i].Type == EntryType) {
-      *EntryAddress = PspDir->PspEntry[i].Location;
-      *EntrySize = PspDir->PspEntry[i].Size;
-      return (TRUE);
-    }
-  }
-
-  return (FALSE);
-}
-
-/**
-  Check if PSP device is present
-
-  @retval BOOLEAN  0: PSP Disabled, 1: PSP Enabled
-
-**/
-BOOLEAN
-CheckPspDevicePresent (
-  VOID
-  )
-{
-  UINT32 SecureFuseReg;
-  PspLibPciWriteConfig ( (UINT32)PCI_CONFIG_SMU_INDIRECT_INDEX, (UINT32)SMU_CC_PSP_FUSES_STATUS);
-  SecureFuseReg = PspLibPciReadConfig ( (UINT32)PCI_CONFIG_SMU_INDIRECT_DATA);
-
-  if (SecureFuseReg &= SMU_CC_PSP_FUSES_PROTO) {
-    return (TRUE);
-  }
-  return (FALSE);
-}
-
-/**
-  Check PSP Platform Seucre Enable State
-  HVB & Secure S3 (Resume vector set to Dram, & core content will restore by uCode)
-  will be applied if Psp Plaform Secure is enabled
-
-  @retval BOOLEAN  0: PSP Platform Secure Disabled, 1: PSP Platform Secure  Enabled
-
-**/
-BOOLEAN
-CheckPspPlatformSecureEnable (
-  VOID
-  )
-{
-  UINT32 SecureFuseReg;
-  PspLibPciWriteConfig ( (UINT32)PCI_CONFIG_SMU_INDIRECT_INDEX, (UINT32)SMU_CC_PSP_FUSES_STATUS);
-  SecureFuseReg = PspLibPciReadConfig ( (UINT32)PCI_CONFIG_SMU_INDIRECT_DATA);
-
-  if (SecureFuseReg &= PLATFORM_SECURE_BOOT_EN) {
-    return (TRUE);
-  }
-  return (FALSE);
-}
-
-/**
-  Check PSP Recovery Flag
-  Target will set Recovery flag if some PSP entry point by PSP directory has been corrupted.
-
-  @retval BOOLEAN  0: Recovery Flag is cleared, 1: Recovery Flag has been set
-
-**/
-BOOLEAN
-CheckPspRecoveryFlag (
-  VOID
-  )
-{
-  MBOX_STATUS *MboxStatus;
-
-  //Init PSP MMIO
-  PspBarInitEarly ();
-
-  GetPspMboxStatus (&MboxStatus);
-
-  return (BOOLEAN) (MboxStatus->Recovery);
-}
-
-/**
-  Return the PspMbox MMIO location
-
-
-  @retval BOOLEAN  FALSE: ERROR, TRUE: SUCCEED
-
-**/
-BOOLEAN
-GetPspMboxStatus (
-  IN OUT   MBOX_STATUS **MboxStatus
-  )
-{
-  UINT32 PspMmio;
-
-  if (GetPspBar1Addr (&PspMmio) == FALSE) {
-    return (FALSE);
-  }
-
-  *MboxStatus = (MBOX_STATUS *)( (UINTN)PspMmio + PSP_MAILBOX_BASE + PSP_MAILBOX_STATUS_OFFSET);   // PSPMbox base is at offset CP2MSG_28 ie. offset 28*4 = 0x70
-
-  return (TRUE);
-}
-
-BOOLEAN
-PspBarInitEarly (void)
-{
-  UINT32 PspMmioSize;
-  UINT32 Value32;
-
-  if (PspLibPciReadPspConfig  (PSP_PCI_DEVID_REG) == 0xffffffff) {
-    return (FALSE);
-  }
-
-  //Check if PSP BAR has been assigned, if not do the PSP BAR initialation
-  if (PspLibPciReadPspConfig (PSP_PCI_BAR1_REG) == 0) {
-    /// Get PSP BAR1 Size
-    PspLibPciWritePspConfig (PSP_PCI_BAR1_REG, 0xFFFFFFFF);
-    PspMmioSize = PspLibPciReadPspConfig (PSP_PCI_BAR1_REG);
-    PspMmioSize = ~PspMmioSize + 1;
-    /// Assign BAR1 Temporary Address
-    PspLibPciWritePspConfig (PSP_PCI_BAR1_REG, PSP_BAR1_TMP_BASE);
-    PspLibPciWritePspConfig ( PSP_PCI_CMD_REG, 0x06);
-
-    /// Enable GNB redirection to this space @todo use equate & also find proper fix
-    PspLibPciWriteConfig ( ( (0x18 << 11) + (1 << 8) + 0xBC), ((PSP_BAR1_TMP_BASE + PspMmioSize -1) >> 8) & ~0xFF);
-    PspLibPciWriteConfig ( ( (0x18 << 11) + (1 << 8) + 0xB8), (PSP_BAR1_TMP_BASE >> 8) | 3);
-    /// Enable MsixBarEn, Bar1En, Bar3En
-    PspLibPciWritePspConfig ( PSP_PCI_EXTRAPCIHDR_REG, 0x34);
-    /// Capability chain update
-    Value32 = PspLibPciReadPspConfig (PSP_PCI_MIRRORCTRL1_REG);
-    Value32 &= ~D8F0x44_PmNxtPtrW_MASK;
-    Value32 |= 0xA4;
-    PspLibPciWritePspConfig (PSP_PCI_MIRRORCTRL1_REG, Value32);
-  }
-
-  return (TRUE);
-}
-
-/**
-  Return the PspMMIO MMIO location
-
-  @param[in] PspMmio Pointer to Psp MMIO address
-
-  @retval BOOLEAN  0: Error, 1 Success
-**/
-BOOLEAN
-GetPspBar1Addr (
-  IN OUT   UINT32 *PspMmio
-  )
-{
-  if (CheckPspDevicePresent () == FALSE) {
-    return (FALSE);
-  }
-
-  *PspMmio = PspLibPciReadPspConfig  (PSP_PCI_BAR1_REG);
-
-  if ((*PspMmio) == 0xffffffff) {
-    return (FALSE);
-  }
-
-  return (TRUE);
-}
-
-/**
-  Return the PspMMIO MMIO location
-
-  @param[in] PspMmio Pointer to Psp MMIO address
-
-  @retval BOOLEAN  0: Error, 1 Success
-**/
-BOOLEAN
-GetPspBar3Addr (
-  IN OUT   UINT32 *PspMmio
-  )
-{
-  if (CheckPspDevicePresent () == FALSE) {
-    return (FALSE);
-  }
-
-  *PspMmio = PspLibPciReadPspConfig  (PSP_PCI_BAR3_REG);
-
-  if ((*PspMmio) == 0xffffffff) {
-    return (FALSE);
-  }
-
-  return (TRUE);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the access width mask for the processor
- *
- *
- * @param[in]     AccessWidth     Access width
- * @retval        Width in number of bytes
- */
-
-
-UINT8
-PspLibAccessWidth (
-  IN       ACCESS_WIDTH AccessWidth
-  )
-{
-  UINT8 Width;
-
-  switch (AccessWidth) {
-  case AccessWidth8:
-  case AccessS3SaveWidth8:
-    Width = 1;
-    break;
-  case AccessWidth16:
-  case AccessS3SaveWidth16:
-    Width = 2;
-    break;
-  case AccessWidth32:
-  case AccessS3SaveWidth32:
-    Width = 4;
-    break;
-  case AccessWidth64:
-  case AccessS3SaveWidth64:
-    Width = 8;
-    break;
-  default:
-    Width = 0;
-  }
-  return Width;
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Read GNB indirect registers
- *
- *
- *
- * @param[in] Address         PCI address of indirect register
- * @param[in] IndirectAddress Offset of indirect register
- * @param[in] Width           Width
- * @param[out] Value           Pointer to value
- */
-VOID
-PspLibPciIndirectRead (
-  IN       PCI_ADDR     Address,
-  IN       UINT32       IndirectAddress,
-  IN       ACCESS_WIDTH Width,
-     OUT   VOID         *Value
-  )
-{
-  UINT32  IndexOffset;
-
-  IndexOffset = PspLibAccessWidth (Width);
-  LibAmdPciWrite (Width, Address, &IndirectAddress, NULL);
-  Address.AddressValue += IndexOffset;
-  LibAmdPciRead (Width, Address, Value, NULL);
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
- * Write GNB indirect registers
- *
- *
- *
- * @param[in] Address         PCI address of indirect register
- * @param[in] IndirectAddress Offset of indirect register
- * @param[in] Width           Width
- * @param[in] Value           Pointer to value
- */
-VOID
-PspLibPciIndirectWrite (
-  IN      PCI_ADDR      Address,
-  IN      UINT32        IndirectAddress,
-  IN      ACCESS_WIDTH  Width,
-  IN      VOID          *Value
-  )
-{
-  UINT32  IndexOffset;
-
-  IndexOffset = PspLibAccessWidth (Width);
-  LibAmdPciWrite (Width, Address, &IndirectAddress, NULL);
-  Address.AddressValue += IndexOffset;
-  LibAmdPciWrite (Width, Address, Value, NULL);
-}
-
-

pi/amd/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.h

diff --git a/pi/amd/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.h b/pi/amd/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.h
deleted file mode 100644
index c18e191..0000000
--- a/pi/amd/00660F01/Proc/Psp/PspBaseLib/PspBaseLib.h
+++ /dev/null
@@ -1,187 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * PSP Base Library
- *
- * Contains interface to the PSP library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  PSP
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- *
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _PSP_BASE_LIB_H_
-#define _PSP_BASE_LIB_H_
-
-#include "AMD.h"
-#include "amdlib.h"
-#include "PspDirectory.h"
-
-#define PSP_PCI_SEG        0x00    ///< PSP Seg address
-#define PSP_PCI_BUS        0x00    ///< PSP Bus address
-#define PSP_PCI_DEV        0x08    ///< PSP Device address
-#define PSP_PCI_FN         0x00    ///< PSP Fn address
-#define PSP_PCI_BDA        ((PSP_PCI_DEV << 11) + (PSP_PCI_FN << 8))
-#define GET_PSP_PCI_ADDR (Offset)    MAKE_SBDFO (PSP_PCI_SEG, PSP_PCI_BUS, PSP_PCI_DEV, PSP_PCI_FN, Offset)
-
-#define PSP_PCI_DEVID_REG           0x00    ///< DevId
-#define PSP_PCI_CMD_REG             0x04    ///< CmdReg
-#define PSP_PCI_BAR1_REG            0x18    ///< Pci Bar1
-#define PSP_PCI_BAR3_REG            0x20    ///< Pci Bar3
-#define PSP_PCI_MIRRORCTRL1_REG     0x44    ///< PSP Mirror Reg Ctrl 1
-#define PSP_PCI_EXTRAPCIHDR_REG     0x48    ///< Extra PCI Header Ctr
-#define PSP_PCI_HTMSICAP_REG        0x5C    ///<  HT MSI Capability
-
-#define D8F0x44_PmNxtPtrW_MASK                                  0xff
-
-#define PSP_MAILBOX_BASE            0x70    ///< Mailbox base offset on PCIe BAR
-#define PSP_MAILBOX_STATUS_OFFSET   0x4     ///< Staus Offset
-
-//======================================================================================
-//
-// Define Mailbox Status field
-//
-//======================================================================================
-//
-/// MBox Status MMIO space
-///
-typedef struct {
-  UINT32 MboxInitialized:1;   ///< Target will set this to 1 to indicate it is initialized  (for ex. PSP/TPM ready)
-  UINT32 Error:1;             ///< Target in adddtion to Done bit will also set this bit to indicate success/error on last command
-  UINT32 Terminated:1;        ///< Target will set this bit if it aborted the command due to abort request
-  UINT32 Halt:1;              ///< Target will set this error if there is critical error that require reset etc
-  UINT32 Recovery:1;          ///< Target will set this error if some PSP entry point by PSP directory has been corrupted.
-  UINT32 Reserved:27;          ///< Reserved
-} MBOX_STATUS;
-
-//
-// Above defined as bitmap
-#define MBOX_STATUS_INITIALIZED       0x00000001ul    ///< Mailbox Status: Initialized
-#define MBOX_STATUS_ERROR             0x00000002ul    ///< Mailbox Status: Error
-#define MBOX_STATUS_ABORT             0x00000004ul    ///< Mailbox Status: Abort
-#define MBOX_STATUS_HALT              0x00000008ul    ///< Mailbox Status: Halt
-#define MBOX_STATUS_RECOVERY          0x00000010ul    ///< Mailbox Status: Recovery required
-
-
-
-UINT32
-PspLibPciReadConfig (
-  IN  UINT32 Register
-  );
-
-VOID
-PspLibPciWriteConfig (
-  IN  UINT32 Register,
-  IN  UINT32 Value
-  );
-
-UINT32
-PspLibPciReadPspConfig (
-  IN UINT16 Offset
-  );
-
-VOID
-PspLibPciWritePspConfig (
-  IN UINT16 Offset,
-  IN  UINT32 Value
-  );
-
-BOOLEAN
-GetPspDirBase (
-  IN OUT   UINT32     *Address
-);
-
-BOOLEAN
-PSPEntryInfo (
-  IN      PSP_DIRECTORY_ENTRY_TYPE    EntryType,
-  IN OUT  UINT64                      *EntryAddress,
-  IN      UINT32                      *EntrySize
-  );
-
-BOOLEAN
-CheckPspDevicePresent (
-  VOID
-  );
-
-BOOLEAN
-CheckPspPlatformSecureEnable (
-  VOID
-  );
-
-BOOLEAN
-CheckPspRecoveryFlag (
-  VOID
-  );
-
-BOOLEAN
-GetPspBar1Addr (
-  IN OUT   UINT32 *PspMmio
-  );
-
-BOOLEAN
-GetPspBar3Addr (
-  IN OUT   UINT32 *PspMmio
-  );
-
-
-BOOLEAN
-GetPspMboxStatus (
-  IN OUT   MBOX_STATUS **MboxStatus
-  );
-
-
-BOOLEAN
-PspBarInitEarly (void);
-
-VOID
-PspLibPciIndirectRead (
-  IN       PCI_ADDR     Address,
-  IN       UINT32       IndirectAddress,
-  IN       ACCESS_WIDTH Width,
-     OUT   VOID         *Value
-  );
-
-VOID
-PspLibPciIndirectWrite (
-  IN      PCI_ADDR      Address,
-  IN      UINT32        IndirectAddress,
-  IN      ACCESS_WIDTH  Width,
-  IN      VOID          *Value
-  );
-
-UINT8
-PspLibAccessWidth (
-  IN       ACCESS_WIDTH AccessWidth
-  );
-#endif // _AMD_LIB_H_

pi/amd/00660F01/Proc/Psp/PspBaseLib/PspDirectory.h

diff --git a/pi/amd/00660F01/Proc/Psp/PspBaseLib/PspDirectory.h b/pi/amd/00660F01/Proc/Psp/PspBaseLib/PspDirectory.h
deleted file mode 100644
index 193cc65..0000000
--- a/pi/amd/00660F01/Proc/Psp/PspBaseLib/PspDirectory.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * PSP directory related functions Prototype definition
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  PSP
- * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _PSP_DIRECTORY_H_
-#define _PSP_DIRECTORY_H_
-
-
-#define FIRMWARE_TABLE_SIGNATURE  0x55AA55AAul
-/// Define the structure OEM signature table
-typedef struct _FIRMWARE_ENTRY_TABLE {
-  UINT32  Signature;    ///< Signature should be 0x55AA55AAul
-  UINT32  ImcRomBase;   ///< Base Address for Imc Firmware
-  UINT32  GecRomBase;   ///< Base Address for Gmc Firmware
-  UINT32  XHCRomBase;   ///< Base Address for XHCI Firmware
-  UINT32  PspDirBase;   ///< Base Address for PSP directory
-} FIRMWARE_ENTRY_TABLE;
-
-/// Define structure for PSP directory
-typedef struct {
-  UINT32  PspCookie;      ///< "$PSP"
-  UINT32  Checksum;       ///< 32 bit CRC of header items below and the entire table
-  UINT32  TotalEntries;   ///< Number of PSP Entries
-  UINT32  Reserved;       ///< Unused
-} PSP_DIRECTORY_HEADER;
-
-
-/// define various enum type for PSP entry type
-enum _PSP_DIRECTORY_ENTRY_TYPE {
-  AMD_PUBLIC_KEY                  = 0,    ///< PSP entry pointer to AMD public key
-  PSP_FW_BOOT_LOADER              = 1,    ///< PSP entry points to PSP boot loader in SPI space
-  PSP_FW_TRUSTED_OS               = 2,    ///< PSP entry points to PSP Firmware region in SPI space
-  PSP_FW_RECOVERY_BOOT_LOADER     = 3,    ///< PSP entry point to PSP recovery region.
-  PSP_NV_DATA                     = 4,    ///< PSP entry points to PSP data region in SPI space
-  BIOS_PUBLIC_KEY                 = 5,    ///< PSP entry points to BIOS public key stored in SPI space
-  BIOS_RTM_FIRMWARE               = 6,    ///< PSP entry points to BIOS RTM code (PEI volume) in SPI space
-  BIOS_RTM_SIGNATURE              = 7,    ///< PSP entry points to signed BIOS RTM hash stored  in SPI space
-  SMU_OFFCHIP_FW                  = 8     ///< PSP entry points to SMU image
-};
-typedef UINT32 PSP_DIRECTORY_ENTRY_TYPE;
-
-/// Structure for PSP Entry
-typedef struct {
-  PSP_DIRECTORY_ENTRY_TYPE    Type;       ///< Type of PSP entry; 32 bit long
-  UINT32                      Size;       ///< Size of PSP Entry in bytes
-  UINT64                      Location;   ///< Location of PSP Entry (byte offset from start of SPI-ROM)
-} PSP_DIRECTORY_ENTRY;
-
-/// Structure for PSP directory
-typedef struct {
-  PSP_DIRECTORY_HEADER  Header;           ///< PSP directory header
-  PSP_DIRECTORY_ENTRY   PspEntry[1];      ///< Array of PSP entries each pointing to a binary in SPI flash
-                                          ///< The actual size of this array comes from the
-                                          ///< header (PSP_DIRECTORY.Header.TotalEntries)
-} PSP_DIRECTORY;
-
-#endif //_PSP_DIRECTORY_H_

pi/amd/00660F01/binaryPI/AGESA.c

diff --git a/pi/amd/00660F01/binaryPI/AGESA.c b/pi/amd/00660F01/binaryPI/AGESA.c
deleted file mode 100644
index 2d05ae0..0000000
--- a/pi/amd/00660F01/binaryPI/AGESA.c
+++ /dev/null
@@ -1,739 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Agesa structures and definitions
- *
- * Contains AMD AGESA core interface
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Include
- * @e \$Revision: 85818 $   @e \$Date: 2013-01-11 17:04:21 -0600 (Fri, 11 Jan 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-// TODO This list needs to be pruned of anything that is not API
-#include "AGESA.h"
-#include "FieldAccessors.h"
-#include "AcpiLib.h"
-#include "FchCommonCfg.h"
-#include "Fch.h"
-#include "FchDef.h"
-#include "amdlib.h"
-#include "cbfs.h"
-#include <console/console.h>
-#include <console/loglevel.h>
-
-// TODO Add a kconfig option to name the AGESA ROM file in CBFS
-#define CONFIG_CBFS_AGESA_NAME "AGESA"
-
-// TODO These need to be replaced with calls to CreateStruct()
-AGESA_STATUS
-HeapAllocateBuffer (
-  IN OUT   VOID *AllocateHeapParams,
-  IN OUT   VOID *StdHeader
-  );
-
-AGESA_STATUS
-HeapDeallocateBuffer (
-  IN       UINT32 BufferHandle,
-  IN       VOID *StdHeader
-  );
-
-CONST UINT32 ImageSignature = IMAGE_SIGNATURE;
-CONST UINT32 ModuleSignature = MODULE_SIGNATURE;
-CHAR8 ModuleIdentifier[] = AGESA_ID;
-
-/************************************************************************
- *
- *  AGESA Basic Level interface structure definition and function prototypes
- *
- ***********************************************************************/
-
-static
-CONST VOID *
-LocateModule (
-  IN       CHAR8 name[8]
-  )
-{
-	struct cbfs_media media;
-	struct cbfs_file* file;
-	void* agesa;
-	const AMD_IMAGE_HEADER* image;
-	const AMD_MODULE_HEADER* module;
-	size_t file_size;
-
-	if (init_default_cbfs_media(&media)) return NULL;
-	file = cbfs_get_file(&media, (const char*)CONFIG_CBFS_AGESA_NAME);
-	if (!file) return NULL;
-	agesa = cbfs_get_file_content(&media, (const char*)CONFIG_CBFS_AGESA_NAME, ntohl(file->type), &file_size);
-	if (!agesa) return NULL;
-
-	image =  LibAmdLocateImage(agesa, agesa + ntohl(file->len) - 1, 4096, name);
-	module = (AMD_MODULE_HEADER*)image->ModuleInfoOffset;
-
-	return module;
-}
-
-/**********************************************************************
- * Interface call:  AmdCreateStruct
- **********************************************************************/
-AGESA_STATUS
-AmdCreateStruct (
-  IN OUT   AMD_INTERFACE_PARAMS *InterfaceParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	InterfaceParams->StdHeader.Func = AMD_CREATE_STRUCT;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(InterfaceParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdReleaseStruct
- **********************************************************************/
-AGESA_STATUS
-AmdReleaseStruct (
-  IN OUT   AMD_INTERFACE_PARAMS *InterfaceParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	InterfaceParams->StdHeader.Func = AMD_RELEASE_STRUCT;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(InterfaceParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitReset
- **********************************************************************/
-AGESA_STATUS
-AmdInitReset (
-  IN OUT   AMD_RESET_PARAMS     *ResetParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	ResetParams->StdHeader.Func = AMD_INIT_RESET;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(ResetParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitEarly
- **********************************************************************/
-AGESA_STATUS
-AmdInitEarly (
-  IN OUT   AMD_EARLY_PARAMS     *EarlyParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	EarlyParams->StdHeader.Func = AMD_INIT_EARLY;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(EarlyParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitPost
- **********************************************************************/
-AGESA_STATUS
-AmdInitPost (
-  IN OUT   AMD_POST_PARAMS      *PostParams         ///< Amd Cpu init param
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	PostParams->StdHeader.Func = AMD_INIT_POST;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(PostParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitEnv
- **********************************************************************/
-AGESA_STATUS
-AmdInitEnv (
-  IN OUT   AMD_ENV_PARAMS       *EnvParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	EnvParams->StdHeader.Func = AMD_INIT_ENV;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(EnvParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitMid
- **********************************************************************/
-AGESA_STATUS
-AmdInitMid (
-  IN OUT   AMD_MID_PARAMS       *MidParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	MidParams->StdHeader.Func = AMD_INIT_MID;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(MidParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitLate
- **********************************************************************/
-AGESA_STATUS
-AmdInitLate (
-  IN OUT   AMD_LATE_PARAMS      *LateParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	LateParams->StdHeader.Func = AMD_INIT_LATE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(LateParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitRecovery
- **********************************************************************/
-AGESA_STATUS
-AmdInitRecovery (
-  IN OUT   AMD_RECOVERY_PARAMS    *RecoveryParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	RecoveryParams->StdHeader.Func = AMD_INIT_RECOVERY;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(RecoveryParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitResume
- **********************************************************************/
-AGESA_STATUS
-AmdInitResume (
-  IN       AMD_RESUME_PARAMS    *ResumeParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	ResumeParams->StdHeader.Func = AMD_INIT_RESUME;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(ResumeParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdS3LateRestore
- **********************************************************************/
-AGESA_STATUS
-AmdS3LateRestore (
-  IN OUT   AMD_S3LATE_PARAMS    *S3LateParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	S3LateParams->StdHeader.Func = AMD_S3LATE_RESTORE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(S3LateParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitRtb
- **********************************************************************/
-AGESA_STATUS
-AmdInitRtb (
-  IN OUT   AMD_RTB_PARAMS *AmdInitRtbParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	AmdInitRtbParams->StdHeader.Func = AMD_INIT_RTB;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdInitRtbParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdS3Save
- **********************************************************************/
-/*
-AGESA_STATUS
-AmdS3Save (
-  IN OUT   AMD_S3SAVE_PARAMS    *AmdS3SaveParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	AmdS3SaveParams->StdHeader.Func = AMD_S3_SAVE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdS3SaveParams);
-}
-*/
-/**********************************************************************
- * Interface call:  AmdLateRunApTask
- **********************************************************************/
-AGESA_STATUS
-AmdLateRunApTask (
-  IN       AP_EXE_PARAMS  *AmdApExeParams
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	AmdApExeParams->StdHeader.Func = AMD_LATE_RUN_AP_TASK;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdApExeParams);
-}
-
-/**********************************************************************
- * Interface service call:  AmdGetApicId
- **********************************************************************/
-AGESA_STATUS
-AmdGetApicId (
-  IN OUT AMD_APIC_PARAMS *AmdParamApic
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	AmdParamApic->StdHeader.Func = AMD_GET_APIC_ID;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdParamApic);
-}
-
-/**********************************************************************
- * Interface service call:  AmdGetPciAddress
- **********************************************************************/
-AGESA_STATUS
-AmdGetPciAddress (
-  IN OUT   AMD_GET_PCI_PARAMS *AmdParamGetPci
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	AmdParamGetPci->StdHeader.Func = AMD_GET_PCI_ADDRESS;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdParamGetPci);
-}
-
-/**********************************************************************
- * Interface service call:  AmdIdentifyCore
- **********************************************************************/
-AGESA_STATUS
-AmdIdentifyCore (
-  IN OUT  AMD_IDENTIFY_PARAMS *AmdParamIdentify
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	AmdParamIdentify->StdHeader.Func = AMD_IDENTIFY_CORE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdParamIdentify);
-}
-
-/**********************************************************************
- * Interface service call:  AmdReadEventLog
- **********************************************************************/
-AGESA_STATUS
-AmdReadEventLog (
-  IN       EVENT_PARAMS *Event
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	Event->StdHeader.Func = AMD_READ_EVENT_LOG;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(Event);
-}
-
-/**********************************************************************
- * Interface service call:  AmdIdentifyDimm
- **********************************************************************/
-AGESA_STATUS
-AmdIdentifyDimm (
-  IN OUT   AMD_IDENTIFY_DIMM *AmdDimmIdentify
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	AmdDimmIdentify->StdHeader.Func = AMD_IDENTIFY_DIMMS;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdDimmIdentify);
-}
-
-AGESA_STATUS
-AmdIdsRunApTaskLate (
-  IN       AP_EXE_PARAMS  *AmdApExeParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	AmdApExeParams->StdHeader.Func = -1;
-	return AGESA_UNSUPPORTED;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdApExeParams);
-}
-
-/**********************************************************************
- * Interface service call:  AmdGet2DDataEye
- **********************************************************************/
-AGESA_STATUS
-AmdGet2DDataEye (
-  IN OUT   AMD_GET_DATAEYE *AmdGetDataEye
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	AmdGetDataEye->StdHeader.Func = AMD_GET_2D_DATA_EYE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdGetDataEye);
-}
-
-/**********************************************************************
- * FCH Functions
- **********************************************************************/
-
-VOID FchInitS3LateRestore (IN FCH_DATA_BLOCK *FchDataPtr);
-VOID FchInitS3EarlyRestore (IN FCH_DATA_BLOCK *FchDataPtr);
-
-VOID
-FchInitS3EarlyRestore (
-  IN      FCH_DATA_BLOCK     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	FchDataPtr->StdHeader->Func = FCH_INIT_S3_EARLY_RESTORE;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-VOID
-FchInitS3LateRestore (
-  IN      FCH_DATA_BLOCK     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	FchDataPtr->StdHeader->Func = FCH_INIT_S3_LATE_RESTORE;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-#if 0
-/**
- * WaitForEcLDN9MailboxCmdAck
- *
- *
- * @param[in] StdHeader
- *
- */
-VOID
-WaitForEcLDN9MailboxCmdAck (
-  IN AMD_CONFIG_PARAMS  *StdHeader
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(StdHeader);
-}
-
-/**
- * ImcSleep - IMC Sleep.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcSleep (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * SoftwareDisableImc - Software disable IMC strap
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-SoftwareDisableImc (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * ImcEnableSurebootTimer - IMC Enable Sureboot Timer.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
-VOID
-ImcEnableSurebootTimer (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-*/
-
-/**
- * ImcDisableSurebootTimer - IMC Disable Sureboot Timer.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcDisableSurebootTimer (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * ImcWakeup - IMC Wakeup.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcWakeup (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * ImcIdle - IMC Idle.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcIdle (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-#endif
-
-// TODO This has to be removed
-AGESA_STATUS
-HeapAllocateBuffer (
-  IN OUT   VOID *AllocateHeapParams,
-  IN OUT   VOID *StdHeader
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-
-	AMD_INTERFACE_PARAMS InterfaceParams = {};
-
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-
-	InterfaceParams.StdHeader = *(AMD_CONFIG_PARAMS*)StdHeader;
-	InterfaceParams.StdHeader.Func = AMD_HEAP_ALLOCATE_BUFFER;
-
-	InterfaceParams.AllocationMethod = PreMemHeap;
-	InterfaceParams.NewStructPtr = AllocateHeapParams;
-
-	return Dispatcher(&InterfaceParams);
-}
-
-// TODO This has to be removed
-AGESA_STATUS
-HeapDeallocateBuffer (
-  IN       UINT32 BufferHandle,
-  IN       VOID *StdHeader
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-
-	AMD_INTERFACE_PARAMS InterfaceParams = {};
-
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-
-	InterfaceParams.StdHeader = *(AMD_CONFIG_PARAMS*)StdHeader;
-	InterfaceParams.StdHeader.Func = AMD_HEAP_DEALLOCATE_BUFFER;
-
-	InterfaceParams.NewStructPtr = &BufferHandle;
-
-	return Dispatcher(&InterfaceParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdSetValue
- **********************************************************************/
-AGESA_STATUS
-AmdSetValue (
-  IN       CONST AGESA_FIELD_NAME name,
-  IN OUT   VOID* value,
-  IN       UINT32 size
-  )
-{
-	AGESA_STATUS status = AGESA_UNSUPPORTED;
-
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-
-	AMD_ACCESSOR_PARAMS AccessorParams = {};
-
-	if (!module) return status;
-	Dispatcher = module->ModuleDispatcher;
-
-	AccessorParams.StdHeader.AltImageBasePtr = 0;
-	AccessorParams.StdHeader.CalloutPtr = NULL;
-	AccessorParams.StdHeader.Func = AMD_SET_VALUE;
-	AccessorParams.StdHeader.ImageBasePtr = 0;
-
-	AccessorParams.AllocationMethod = ByHost;
-	AccessorParams.FieldName = name;
-	AccessorParams.FieldValue = value;
-	AccessorParams.FieldSize = size;
-
-	status = Dispatcher(&AccessorParams);
-	return status;
-}
-
-/**********************************************************************
- * Interface call:  AmdGetValue
- **********************************************************************/
-AGESA_STATUS
-AmdGetValue (
-  IN       CONST AGESA_FIELD_NAME name,
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  )
-{
-	AGESA_STATUS status = AGESA_UNSUPPORTED;
-
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = LocateModule(ModuleIdentifier);
-
-	AMD_ACCESSOR_PARAMS AccessorParams = {};
-
-	if (!module) return status;
-	Dispatcher = module->ModuleDispatcher;
-
-	AccessorParams.StdHeader.AltImageBasePtr = 0;
-	AccessorParams.StdHeader.CalloutPtr = NULL;
-	AccessorParams.StdHeader.Func = AMD_GET_VALUE;
-	AccessorParams.StdHeader.ImageBasePtr = 0;
-
-	AccessorParams.AllocationMethod = ByHost;
-	AccessorParams.FieldName = name;
-	AccessorParams.FieldValue = *value;
-	AccessorParams.FieldSize = size;
-
-	status = Dispatcher(&AccessorParams);
-
-	*value = AccessorParams.FieldValue;
-	size = AccessorParams.FieldSize;
-
-	return status;
-}

pi/amd/00660F01/binaryPI/FieldAccessors.h

diff --git a/pi/amd/00660F01/binaryPI/FieldAccessors.h b/pi/amd/00660F01/binaryPI/FieldAccessors.h
deleted file mode 100644
index 2d860c5..0000000
--- a/pi/amd/00660F01/binaryPI/FieldAccessors.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/*****************************************************************************
- *
- * Copyright (c) 2013 - 2014, Sage Electronic Engineering, LLC
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _FIELDACCESSORS_H_
-#define _FIELDACCESSORS_H_
-
-/// AGESA value name
-typedef enum {
-	AMD_GLOBAL_USER_OPTIONS    = 0x00020000,
-	AMD_GLOBAL_NUM_SOCKETS     = 0x00020001,
-	AMD_GLOBAL_NUM_MODULES     = 0x00020002,
-} AGESA_FIELD_NAME;
-
-typedef AGESA_STATUS (*SETTER_ENTRY) (
-  IN OUT   VOID* value,
-  IN       UINT32 size
-  );
-
-typedef AGESA_STATUS (*GETTER_ENTRY) (
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-/// Accessor Interface.
-typedef struct {
-  IN       AMD_CONFIG_PARAMS   StdHeader;          ///< Standard configuration header
-  IN       AGESA_FIELD_NAME    FieldName;          ///< The service to init
-  IN       ALLOCATION_METHOD   AllocationMethod;   ///< For pointers, how to allocate space for copied data
-  IN OUT   VOID                *Struct;            ///< The struct for the service.
-  IN OUT   UINT32              FieldSize;          ///< The size of the data value.
-  IN OUT   VOID                *FieldValue;        ///< The value retrieved or set into the target structure.
-} AMD_ACCESSOR_PARAMS;
-
-/**********************************************************************
- * Interface call:  AmdSetValue
- **********************************************************************/
-AGESA_STATUS
-AmdSetValueDispatch (
-  IN OUT   AMD_ACCESSOR_PARAMS *AccessorParams
-  );
-
-AGESA_STATUS
-AmdSetValue (
-  IN       CONST AGESA_FIELD_NAME name,
-  IN OUT   VOID* value,
-  IN       UINT32 size
-  );
-
-/**********************************************************************
- * Interface call:  AmdGetValue
- **********************************************************************/
-AGESA_STATUS
-AmdGetValueDispatch (
-  IN OUT   AMD_ACCESSOR_PARAMS *AccessorParams
-  );
-
-AGESA_STATUS
-AmdGetValue (
-  IN       CONST AGESA_FIELD_NAME name,
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-/**
- * Dispatch Table.
- *
- * The push high dispatcher uses this table to find what entries are currently in the build image.
- */
-typedef struct {
-  UINT32              FunctionId;
-  SETTER_ENTRY        SetValueEntryPoint;
-  GETTER_ENTRY        GetValueEntryPoint;
-} ACCESSOR_DISPATCH_TABLE;
-
-AGESA_STATUS
-GetUserOptions(
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-AGESA_STATUS
-GetNumSockets(
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-AGESA_STATUS
-GetNumModules(
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-#endif /* _FIELDACCESSORS_H_ */

pi/amd/00660F01/binaryPI/OptionsIds.h

diff --git a/pi/amd/00660F01/binaryPI/OptionsIds.h b/pi/amd/00660F01/binaryPI/OptionsIds.h
deleted file mode 100644
index bd39fce..0000000
--- a/pi/amd/00660F01/binaryPI/OptionsIds.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * IDS Option File
- *
- * This file is used to switch on/off IDS features.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Core
- * @e \$Revision: 192403 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
- */
- /*****************************************************************************
- *
- * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#include "Ids.h"
-
-#ifndef _OPTION_IDS_H_
-#define _OPTION_IDS_H_
-
-/**
- *
- *  This file generates the defaults tables for the Integrated Debug Support
- * Module. The documented build options are imported from a user controlled
- * file for processing. The build options for the Integrated Debug Support
- * Module are listed below:
- *
- *    IDSOPT_IDS_ENABLED
- *    IDSOPT_ERROR_TRAP_ENABLED
- *    IDSOPT_CONTROL_ENABLED
- *
- *      Warning: When you enable the IDSOPT_CONTROL_NV_TO_CMOS feature.
- *      please make the cmos region defined by IDS_OPT_CMOS_REGION_START &
- *      IDS_OPT_CMOS_REGION_END can be touched between IDS HOOK point
- *      IDS_CPU_Early_Override and IDS_BEFORE_AP_EARLY_HALT of BSP
- *
- *      IDSOPT_CONTROL_NV_TO_CMOS
- *        IDS_OPT_CMOS_INDEX_PORT
- *        IDS_OPT_CMOS_DATA_PORT
- *        IDS_OPT_CMOS_REGION_START
- *        IDS_OPT_CMOS_REGION_END
- *
- *    IDSOPT_TRACING_ENABLED
- *      IDSOPT_TRACING_CONSOLE_HDTOUT
- *      IDSOPT_TRACING_CONSOLE_SERIALPORT
- *        IDSOPT_SERIAL_PORT (default 0x3F8)
- *      IDSOPT_TRACING_CONSOLE_REDIRECT_IO
- *        IDSOPT_DEBUG_PRINT_IO_PORT (default 0x80)
- *      IDSOPT_TRACING_CONSOLE_RAM
- *        IDSOPT_DPRAM_BASE
- *        IDSOPT_DPRAM_SIZE
- *        IDSOPT_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL (default FALSE)
- *      IDSOPT_CUSTOMIZE_TRACING_SERVICE
- *      IDSOPT_CUSTOMIZE_TRACING_SERVICE_INIT
- *      IDSOPT_CUSTOMIZE_TRACING_SERVICE_EXIT
- *
- *    IDSOPT_TRACE_BLD_CFG
- *    IDSOPT_PERF_ANALYSIS
- *    IDSOPT_ASSERT_ENABLED
- *    IDS_DEBUG_PORT
- *    IDSOPT_CAR_CORRUPTION_CHECK_ENABLED
- *    IDSOPT_DEBUG_CODE_ENABLED
- *    IDSOPT_IDT_EXCEPTION_TRAP
- *    IDSOPT_C_OPTIMIZATION_DISABLED
- *
- **/
-
-
-
-//#include "Ids.h"
-
-#define IDSOPT_ERROR_TRAP_ENABLED             FALSE
-
-#ifdef DEBUG
-#define IDSOPT_IDS_ENABLED                    TRUE
-//#define IDSOPT_CONTROL_ENABLED                FALSE
-#define IDSOPT_TRACING_ENABLED                TRUE
-#define IDSOPT_TRACING_CONSOLE_SERIALPORT     TRUE
-#ifdef IDS_DEBUG_PRINT_MASK
-#undef IDS_DEBUG_PRINT_MASK
-#endif
-#define IDS_DEBUG_PRINT_MASK                  (GNB_TRACE_ALL | GFX_MISC | CPU_TRACE_ALL | MEM_STATUS | TOPO_TRACE_ALL | FCH_TRACE_ALL | MAIN_FLOW | IDS_TRACE_DEFAULT | TEST_POINT)
-#define IDSOPT_SERIAL_PORT                    0x3F8
-#define IDSOPT_HEAP_CHECKING                  TRUE
-#define IDSOPT_TRACE_BLD_CFG                  TRUE
-#define IDSOPT_CAR_CORRUPTION_CHECK_ENABLED   FALSE
-#define IDSOPT_DEBUG_CODE_ENABLED             TRUE
-#define IDSOPT_C_OPTIMIZATION_DISABLED        TRUE
-#else
-#define IDSOPT_IDS_ENABLED                    FALSE
-//#define IDSOPT_ERROR_TRAP_ENABLED             FALSE
-//#define IDSOPT_CONTROL_ENABLED                FALSE
-#define IDSOPT_TRACING_ENABLED                FALSE
-#define IDSOPT_TRACING_CONSOLE_SERIALPORT     TRUE
-#define IDS_DEBUG_PRINT_MASK                  (0)
-#endif
-
-#endif

pi/amd/00660F01/binaryPI/gcc-intrin.h

diff --git a/pi/amd/00660F01/binaryPI/gcc-intrin.h b/pi/amd/00660F01/binaryPI/gcc-intrin.h
deleted file mode 100644
index 08a0232..0000000
--- a/pi/amd/00660F01/binaryPI/gcc-intrin.h
+++ /dev/null
@@ -1,805 +0,0 @@
-/*
-  Compatibility <intrin_x86.h> header for GCC -- GCC equivalents of intrinsic
-  Microsoft Visual C++ functions. Originally developed for the ReactOS
-  (<http://www.reactos.org/>) and TinyKrnl (<http://www.tinykrnl.org/>)
-  projects.
-
-  Copyright (c) 2006 KJK::Hyperion <hackbunny@reactos.com>
-                2014 Sage Electronic Engineering, LLC
-
-  Permission is hereby granted, free of charge, to any person obtaining a
-  copy of this software and associated documentation files (the "Software"),
-  to deal in the Software without restriction, including without limitation
-  the rights to use, copy, modify, merge, publish, distribute, sublicense,
-  and/or sell copies of the Software, and to permit persons to whom the
-  Software is furnished to do so, subject to the following conditions:
-
-  The above copyright notice and this permission notice shall be included in
-  all copies or substantial portions of the Software.
-
-  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-  DEALINGS IN THE SOFTWARE.
-*/
-
-#if defined (__GNUC__)
-
-/* I/O intrin functions.  */
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned char __inbyte(unsigned short Port)
-{
-  unsigned char value;
-
-  __asm__ __volatile__ (
-    "in  %%dx, %%al"
-    : "=a" (value)
-    : "d" (Port)
-    );
-
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned short __inword(unsigned short Port)
-{
-  unsigned short value;
-
-  __asm__ __volatile__ (
-    "in  %%dx, %%ax"
-    : "=a" (value)
-    : "d" (Port)
-    );
-
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __indword(unsigned short Port)
-{
-  unsigned long value;
-
-  __asm__ __volatile__ (
-    "in  %%dx, %%eax"
-    : "=a" (value)
-    : "d" (Port)
-    );
-  return value;
-
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __outbyte(unsigned short Port,unsigned char Data)
-{
-  __asm__ __volatile__ (
-    "out  %%al, %%dx"
-    :
-    : "a" (Data), "d" (Port)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __outword(unsigned short Port,unsigned short Data)
-{
-  __asm__ __volatile__ (
-    "out  %%ax, %%dx"
-    :
-    : "a" (Data), "d" (Port)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __outdword(unsigned short Port,unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "out  %%eax, %%dx"
-    :
-    : "a" (Data), "d" (Port)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __inbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "cld ; rep ; insb "
-    : "=D" (Buffer), "=c" (Count)
-    : "d"(Port), "0"(Buffer), "1" (Count)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __inwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "cld ; rep ; insw "
-    : "=D" (Buffer), "=c" (Count)
-    : "d"(Port), "0"(Buffer), "1" (Count)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __indwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "cld ; rep ; insl "
-    : "=D" (Buffer), "=c" (Count)
-    : "d"(Port), "0"(Buffer), "1" (Count)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __outbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "cld ; rep ; outsb "
-    : "=S" (Buffer), "=c" (Count)
-    : "d"(Port), "0"(Buffer), "1" (Count)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __outwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "cld ; rep ; outsw "
-    : "=S" (Buffer), "=c" (Count)
-    : "d"(Port), "0"(Buffer), "1" (Count)
-  );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __outdwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-   "cld ; rep ; outsl "
-   : "=S" (Buffer), "=c" (Count)
-   : "d"(Port), "0"(Buffer), "1" (Count)
-   );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readdr0(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr0, %[value]"
-    : [value] "=a" (value)
-    );
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readdr1(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr1, %[value]"
-    : [value] "=a" (value)
-    );
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readdr2(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr2, %[value]"
-    : [value] "=a" (value)
-    );
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readdr3(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr3, %[value]"
-    : [value] "=a" (value)
-    );
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readdr7(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr7, %[value]"
-    : [value] "=a" (value)
-    );
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readdr(unsigned long reg)
-{
-  switch (reg){
-    case 0:
-      return __readdr0 ();
-      break;
-
-    case 1:
-      return __readdr1 ();
-      break;
-
-    case 2:
-      return __readdr2 ();
-      break;
-
-    case 3:
-      return __readdr3 ();
-      break;
-
-    case 7:
-      return __readdr7 ();
-      break;
-
-    default:
-      return -1;
-  }
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writedr0(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %%eax, %%dr0"
-    :
-    : "a" (Data)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writedr1(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %%eax, %%dr1"
-    :
-    : "a" (Data)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writedr2(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %%eax, %%dr2"
-    :
-    : "a" (Data)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writedr3(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %%eax, %%dr3"
-    :
-    : "a" (Data)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writedr7(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %%eax, %%dr7"
-    :
-    : "a" (Data)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writedr(unsigned long reg, unsigned long Data)
-{
-  switch (reg){
-    case 0:
-      __writedr0 (Data);
-      break;
-
-    case 1:
-      __writedr1 (Data);
-      break;
-
-    case 2:
-      __writedr2 (Data);
-      break;
-
-    case 3:
-      __writedr3 (Data);
-      break;
-
-    case 7:
-      __writedr7 (Data);
-      break;
-
-    default:
-      ;
-  }
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readcr0(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr0, %[value]"
-    : [value] "=a" (value));
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readcr2(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr2, %[value]"
-    : [value] "=a" (value));
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readcr3(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr3, %[value]"
-    : [value] "=a" (value));
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readcr4(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr4, %[value]"
-    : [value] "=a" (value));
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readcr8(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr8, %[value]"
-    : [value] "=a" (value));
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readcr(unsigned long reg)
-{
-  switch (reg){
-    case 0:
-      return __readcr0 ();
-      break;
-
-    case 2:
-      return __readcr2 ();
-      break;
-
-    case 3:
-      return __readcr3 ();
-      break;
-
-    case 4:
-      return __readcr4 ();
-      break;
-
-    case 8:
-      return __readcr8 ();
-      break;
-
-    default:
-      return -1;
-  }
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writecr0(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %%eax, %%cr0"
-    :
-    : "a" (Data)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writecr2(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %%eax, %%cr2"
-    :
-    : "a" (Data)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writecr3(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %%eax, %%cr3"
-    :
-    : "a" (Data)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writecr4(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %%eax, %%cr4"
-    :
-    : "a" (Data)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writecr8(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %%eax, %%cr8"
-    :
-    : "a" (Data)
-    );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writecr(unsigned long reg, unsigned long Data)
-{
-  switch (reg){
-    case 0:
-      __writecr0 (Data);
-      break;
-
-    case 2:
-      __writecr2 (Data);
-      break;
-
-    case 3:
-      __writecr3 (Data);
-      break;
-
-    case 4:
-      __writecr4 (Data);
-      break;
-
-    case 8:
-      __writecr8 (Data);
-      break;
-
-    default:
-      ;
-  }
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-UINT64 __readmsr(UINT32 msr)
-{
-  UINT64 retval;
-  __asm__ __volatile__(
-       "rdmsr\n\t"
-       : "=A" (retval)
-       : "c" (msr)
-       );
-   return retval;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writemsr (UINT32 msr, UINT64 Value)
-{
-  __asm__ __volatile__ (
-     "wrmsr\n\t"
-     :
-     : "c" (msr), "A" (Value)
-     );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-UINT64 __rdtsc(void)
-{
-  UINT64 retval;
-  __asm__ __volatile__ (
-     "rdtsc"
-     : "=A" (retval));
-  return retval;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __cpuid(int CPUInfo[], const int InfoType)
-{
-   __asm__ __volatile__(
-     "cpuid"
-     :"=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3])
-     : "a" (InfoType)
-     );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void _disable(void)
-{
-  __asm__ __volatile__ ("cli");
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void _enable(void)
-{
-  __asm__ __volatile__ ("sti");
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __halt(void)
-{
-  __asm__ __volatile__ ("hlt");
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __debugbreak(void)
-{
-  __asm__ __volatile__ ("int3");
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __wbinvd(void)
-{
-  __asm__ __volatile__ ("wbinvd");
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __lidt(void *Source)
-{
-  __asm__ __volatile__("lidt %0" : : "m"(*(short*)Source));
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writefsbyte(const unsigned long Offset, const unsigned char Data)
-{
-  __asm__("movb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writefsword(const unsigned long Offset, const unsigned short Data)
-{
-  __asm__("movw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __writefsdword(const unsigned long Offset, const unsigned long Data)
-{
-  __asm__("movl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned char __readfsbyte(const unsigned long Offset)
-{
-  unsigned char value;
-  __asm__("movb %%fs:%a[Offset], %b[value]" : [value] "=q" (value) : [Offset] "irm" (Offset));
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned short __readfsword(const unsigned long Offset)
-{
-  unsigned short value;
-  __asm__("movw %%fs:%a[Offset], %w[value]" : [value] "=q" (value) : [Offset] "irm" (Offset));
-  return value;
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-unsigned long __readfsdword(const unsigned long Offset)
-{
-  unsigned long value;
-  __asm__("movl %%fs:%a[Offset], %k[value]" : [value] "=q" (value) : [Offset] "irm" (Offset));
-  return value;
-}
-
-#ifdef __SSE3__
-typedef long long __v2di __attribute__ ((__vector_size__ (16)));
-typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void _mm_stream_si128_fs2 (void *__A, __m128i __B)
-{
-  __asm__(".byte 0x64"); // fs prefix
-  __builtin_ia32_movntdq ((__v2di *)__A, (__v2di)__B);
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void _mm_stream_si128_fs (void *__A, void *__B)
-{
-  __m128i data;
-  data = (__m128i) __builtin_ia32_lddqu ((char const *)__B);
-  _mm_stream_si128_fs2 (__A, data);
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void _mm_clflush_fs (void *__A)
-{
-  __asm__(".byte 0x64"); // fs prefix
-  __builtin_ia32_clflush (__A);
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void _mm_mfence (void)
-{
-  __builtin_ia32_mfence ();
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void _mm_sfence (void)
-{
-  __builtin_ia32_sfence ();
-}
-#endif
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __stosb(unsigned char *dest, unsigned char data, size_t count)
-{
-   __asm__ __volatile__ (
-    "cld ; rep ; stosb "
-    : "=D" (dest), "=c" (count)
-    : "a"(data), "0"(dest), "1" (count)
-  );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void __movsb(unsigned char *dest, unsigned char *data, size_t count)
-{
-   __asm__ __volatile__ (
-    "cld ; rep ; movsb "
-    : "=D" (dest), "=S"(data), "=c" (count)
-    : "S"(data), "0"(dest), "1" (count)
-  );
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void debug_point ( unsigned short Port,  unsigned long Data )
-{
-   __outdword (Port, Data);
-   __asm__ __volatile__ (".word 0xfeeb");
-
-}
-
-static
-__attribute__((optimize("Os")))
-__inline__ __attribute__((always_inline))
-void delay_point ( unsigned short Port, unsigned long Data, unsigned long delayTime )
-{
-  UINTN  Index;
-  Index = 0;
-  __outdword (Port, Data);
-  while (Index < delayTime * 600000) {
-    __outdword (0xE0, 0);
-    Index ++;
-  }
-}
-#endif // defined (__GNUC__)

pi/amd/00660F01/binaryPI/gcccar.inc

diff --git a/pi/amd/00660F01/binaryPI/gcccar.inc b/pi/amd/00660F01/binaryPI/gcccar.inc
deleted file mode 100644
index 0ba87dd..0000000
--- a/pi/amd/00660F01/binaryPI/gcccar.inc
+++ /dev/null
@@ -1,1335 +0,0 @@
-/*
- * Copyright (c) 2012, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/******************************************************************************
-* AMD Generic Encapsulated Software Architecture
-*
-* $Workfile:: GccCar.inc    $Revision:: 32932   $
-*
-* Description: GccCar.inc - AGESA cache-as-RAM setup Include File for GCC complier
-*
-******************************************************************************/
-
-.altmacro
-
-BSP_STACK_BASE_ADDR     =       0x30000         /* Base address for primary cores stack   */
-BSP_STACK_SIZE          =       0x10000         /* 64KB for BSP core                      */
-BSP_STACK_SIZE_64K      =       0x10000        /*64KB for BSP core */
-BSP_STACK_SIZE_32K      =       0x8000         /*32KB for BSP core*/
-
-CORE0_STACK_BASE_ADDR   =       0x80000         /* Base address for primary cores stack   */
-CORE0_STACK_SIZE        =       0x4000          /* 16KB for primary cores                 */
-CORE1_STACK_BASE_ADDR   =       0x40000         /* Base address for AP cores              */
-CORE1_STACK_SIZE        =       0x1000          /* 4KB for each AP cores                  */
-
-APIC_BASE_ADDRESS       =       0x0000001B
-  APIC_BSC              =       8               /* Boot Strap Core  */
-
-APIC_MSG_REG            = 0x380        # Location of BSC message
-    APIC_MSG            = 0x00DE00AD   # Message data
-APIC_CMD_LO_REG         = 0x300        # APIC command low
-APIC_CMD_HI_REG         = 0x310        # APIC command high
-    CMD_REG_TO_READ_DATA = 0x00000338  # APIC command for remote read of APIC_MSG_REG
-    REMOTE_READ_STS       = 0x00030000 # Remote read status mask
-    REMOTE_DELIVERY_PEND  = 0x00010000 # Remote read is pending
-    REMOTE_DELIVERY_DONE  = 0x00020000 # Remote read is complete
-    DELIVERY_STS_BIT    = 12          #Delivery status valid bit
-APIC_ID_REG             = 0x0020       # Local APIC ID offset
-    APIC20_APICID       = 24
-APIC_REMOTE_READ_REG    = 0x00C0       # Remote read offset
-
-# Flags can only run from bits 31 to 24.  Bits 23:0 are in use.
-AMD_CU_NEED_TO_WAIT     = 31
-AMD_CU_SEND_INVD_MSG    = 30
-AMD_CU_RESTORE_ES       = 29
-
-AMD_MTRR_VARIABLE_BASE0  =      0x0200
-AMD_MTRR_VARIABLE_BASE6  =      0x020C
-AMD_MTRR_VARIABLE_BASE7 = 0x020E
-    VMTRR_VALID             =     11
-    MTRR_TYPE_WB            =     0x06
-    MTRR_TYPE_WP            =     0x05
-    MTRR_TYPE_WT            =     0x04
-    MTRR_TYPE_UC            =     0x00
-AMD_MTRR_VARIABLE_MASK7 = 0x020F
-AMD_MTRR_FIX64k_00000    =      0x0250
-AMD_MTRR_FIX16k_80000    =      0x0258
-AMD_MTRR_FIX16k_A0000    =      0x0259
-AMD_MTRR_FIX4k_C0000     =      0x0268
-AMD_MTRR_FIX4k_C8000     =      0x0269
-AMD_MTRR_FIX4k_D0000     =      0x026A
-AMD_MTRR_FIX4k_D8000     =      0x026B
-AMD_MTRR_FIX4k_E0000     =      0x026C
-AMD_MTRR_FIX4k_E8000     =      0x026D
-AMD_MTRR_FIX4k_F0000     =      0x026E
-AMD_MTRR_FIX4k_F8000     =      0x026F
-
-/* Reproduced from AGESA.h */
-AMD_AP_MTRR_FIX64k_00000  =  0x00000250
-AMD_AP_MTRR_FIX16k_80000  =  0x00000258
-AMD_AP_MTRR_FIX16k_A0000  =  0x00000259
-AMD_AP_MTRR_FIX4k_C0000   =  0x00000268
-AMD_AP_MTRR_FIX4k_C8000   =  0x00000269
-AMD_AP_MTRR_FIX4k_D0000   =  0x0000026A
-AMD_AP_MTRR_FIX4k_D8000   =  0x0000026B
-AMD_AP_MTRR_FIX4k_E0000   =  0x0000026C
-AMD_AP_MTRR_FIX4k_E8000   =  0x0000026D
-AMD_AP_MTRR_FIX4k_F0000   =  0x0000026E
-AMD_AP_MTRR_FIX4k_F8000   =  0x0000026F
-CPU_LIST_TERMINAL         =  0xFFFFFFFF
-
-AMD_MTRR_DEFTYPE         =      0x02FF
-    WB_DRAM_TYPE         =      0x1E             /* MemType - memory type */
-    MTRR_DEF_TYPE_EN     =      11               /* MtrrDefTypeEn - variable and fixed MTRRs default enabled */
-    MTRR_DEF_TYPE_FIX_EN =      10               /* MtrrDefTypeEn - fixed MTRRs default enabled */
-
-HWCR                     =      0x0C0010015      /* Hardware Configuration                                                                                                                                       */
-    INVD_WBINVD          =      0x04             /* INVD to WBINVD conversion */
-
-IORR_BASE                =      0x0C0010016      /* IO Range Regusters Base/Mask, 2 pairs */
-                                                 /*  uses 16h - 19h                                                                                                                                                             */
-TOP_MEM                  =      0x0C001001A      /* Top of Memory                                                                                                                                                                                */
-TOP_MEM2                 =      0x0C001001D      /* Top of Memory2                                                                                                                                                                       */
-
-LS_CFG3                  =      0x0C001101C  /* Load-Store Configuration 3 */
-    DIS_SS_F15CZ            = 7         /* Disable Streaming Store functionality*/
-    DC_DIS_SPEC_TLB_RLD_F15CZ   = 20    /* Disable speculative TLB reloads*/
-    DC_DIS_HW_PF_F15CZ      = 23        /* Hardware prefetches bit*/
-
-
-LS_CFG                   =      0x0C0011020      /* Load-Store Configuration                                                                                                                             */
-    DIS_SS               =     28                /* Family 10h,12h,15h:Disable Streng Store functionality */
-    DIS_STREAM_ST        =     28                /* Family 14h:DisStreamSt - Disable Streaming Store functionality */
-
-IC_CFG                   =      0x0C0011021      /* Instruction Cache Config Register  */
-    IC_DIS_SPEC_TLB_RLD  =      9                /*   Disable speculative TLB reloads  */
-    DIS_IND              =      14               /*   Family 10-14h:Disable Indirect Branch Predictor */
-    DIS_I_CACHE          =      14               /*   Family 15h:DisICache - Disable Indirect Branch Predictor */
-
-DC_CFG                   =      0x0C0011022      /* Data Cache Configuration                                                                                                                                   */
-    DC_DIS_SPEC_TLB_RLD      =  4                /*   Disable speculative TLB reloads */
-    DIS_CLR_WBTOL2_SMC_HIT   =  8                /*   self modifying code check buffer bit */
-    DIS_HW_PF                =  13               /*   Hardware prefetches bit                                                                                                                                    */
-
-CU_CFG                  = 0x0C0011023  /* Family 15h: Combined Unit Configuration */
-    L2_WAY_LOCK_EN          = 23      /*   L2WayLock - L2 way lock enable */
-    L2_FIRST_LOCKED_WAY     = 19      /*   L2FirstLockedWay - first L2 way lockedh */
-    L2_FIRST_LOCKED_WAY_OR_MASK  = 0x000780000
-
-DE_CFG                   =      0x0C0011029      /* Decode Configuration */
-    CL_FLUSH_SERIALIZE   =      23               /*   Family 12h,15h: CL Flush Serialization */
-
-BU_CFG2                  =      0x0C001102A      /* Family 10h: Bus Unit Configuration 2 */
-CU_CFG2                  =      0x0C001102A      /* Family 15h: Combined Unit Configuration 2 */
-    F10_CL_LINES_TO_NB_DIS  =   15               /*   ClLinesToNbDis - allows WP code to be cached in L2 */
-    IC_DIS_SPEC_TLB_WR      =   35               /*   IcDisSpecTlbWr - ITLB speculative writes */
-
-CU_CFG3                  =      0x0C001102B      /* Combined Unit Configuration 3 */
-    COMBINE_CR0_CD       =      49               /*   Combine CR0.CD for both cores of a compute unit */
-
-CR0_PE                  = 0           # Protection Enable
-CR0_NW                  = 29          # Not Write-through
-CR0_CD                  = 30          # Cache Disable
-CR0_PG                  = 31          # Paging Enable
-
-/* CPUID Functions */
-
-CPUID_MODEL              =      1
-AMD_CPUID_FMF            =      0x80000001       /* Family Model Features information */
-AMD_CPUID_L2Cache        =      0X80000006       /* L2/L3 cache info */
-AMD_CPUID_APIC           =      0x80000008       /* Long Mode and APIC info., core count */
-    APIC_ID_CORE_ID_SIZE      = 12               /* ApicIdCoreIdSize bit position */
-
-NB_CFG                   =      0x0C001001F      /* Northbridge Configuration Register */
-    INIT_APIC_ID_CPU_ID_LO    = 54               /*  InitApicIdCpuIdLo - is core# in high or low half of APIC ID? */
-    ENABLE_CF8_EXT_CFG        = 46               /*  EnableCf8ExtCfg - enable CF8 extended configuration cycles */
-
-MTRR_SYS_CFG             =      0x0C0010010      /* System Configuration Register */
-  CHX_TO_DIRTY_DIS       =      16               /*   ChxToDirtyDis    Change to dirty disable  */
-  SYS_UC_LOCK_EN         =      17               /*   SysUcLockEn      System lock command enable */
-  MTRR_FIX_DRAM_EN       =      18               /*   MtrrFixDramEn    MTRR fixed RdDram and WrDram attributes enable */
-  MTRR_FIX_DRAM_MOD_EN   =      19               /*   MtrrFixDramModEn MTRR fixed RdDram and WrDram modification enable */
-  MTRR_VAR_DRAM_EN       =      20               /*   MtrrVarDramEn    MTRR variable DRAM enable */
-  MTRR_TOM2_EN           =      21               /*   MtrrTom2En       MTRR top of memory 2 enable */
-
-PERF_CONTROL3            =      0x0C0010003      /* Performance event control three */
-    PERF_CONTROL3_RESERVE_L  =  0x00200000       /* Preserve the reserved bits */
-    PERF_CONTROL3_RESERVE_H  =  0x0FCF0          /* Preserve the reserved bits */
-    CONFIG_EVENT_L           =  0x0F0E2          /* All cores with level detection */
-    CONFIG_EVENT_H           =  4                /* Increment count by number of event */
-                                                 /* occured in clock cycle */
-    EVENT_ENABLE             =  22               /* Enable the event */
-PERF_COUNTER3            =      0x0C0010007      /* Performance event counter three */
-
-FUNC_3			=	3
-MCA_NB_CFG		=	0x44		 /* MCA NB Configuration */
-CPU_ERR_DIS             =       6                /* CPU error response disable */
-PRODUCT_INFO_REG1	=	0x1FC			/* Product Information Register 1 */
-
-# Local use flags, in upper most byte if ESI
-FLAG_UNKNOWN_FAMILY     = 24          # Signals that the family# of the installed processor is not recognized
-FLAG_STACK_REENTRY      = 25          # Signals that the environment has made a re-entry (2nd) call to set up the stack
-FLAG_IS_PRIMARY         = 26          # Signals that this core is the primary within the comoute unit
-FLAG_CORE_NOT_IDENTIFIED     = 27          # Signals that the cores/compute units of the installed processor is not recognized
-FLAG_FORCE_32K_STACK     = 28         # Signals that to force 32KB stack size for BSP core
-CR0_MASK    = ((1 << CR0_CD) | (1 << CR0_NW))
-MSR_MASK    = ((1 << MTRR_DEF_TYPE_EN)+(1 << MTRR_DEF_TYPE_FIX_EN))
-
-/****************************************************************************
- *
- *                      CPU MACROS - PUBLIC
- *
- ****************************************************************************/
-.macro   _WRMSR
-        .byte 0x0f, 0x30
-.endm
-
-.macro  _RDMSR
-        .byte   0x0F, 0x32
-.endm
-
-.macro AMD_CPUID arg0
-  .ifb \arg0
-    mov   $0x1, %eax
-    .byte 0x0F, 0x0A2                     /* Execute instruction */
-    bswap %eax
-    xchg  %ah, %al                        /* Ext model in al now */
-    rol   $0x08, %eax                     /* Ext model in ah, model in al */
-    and   $0x0FFCF, ax                    /* Keep 23:16, 7:6, 3:0 */
-  .else
-    mov   \arg0, %eax
-    .byte 0x0F, 0x0A2
-  .endif
-.endm
-
-.macro MAKE_EXT_PCI_ADDR  Seg, Bus, Dev, Func, Offset
-	mov $(1 << 31 | (Seg) << 28 | (((Offset) & (0x0F00)) >> 8) << 24 | (Bus) << 16 | (Dev) << 11 | (Func) << 8) | ((Offset) & (0xFC)), %eax
-.endm
-/****************************************************************************
-*
-* AMD_ENABLE_STACK_FAMILY_HOOK Macro - Stackless
-*
-*   Set any family specific controls needed to enable the use of
-*   cache as general storage before main memory is available.
-*
-* Inputs:
-*       none
-* Outputs:
-*       none
- ****************************************************************************/
-.macro  AMD_ENABLE_STACK_FAMILY_HOOK
-
-//    AMD_ENABLE_STACK_FAMILY_HOOK_F10
-//    AMD_ENABLE_STACK_FAMILY_HOOK_F12
-//    AMD_ENABLE_STACK_FAMILY_HOOK_F14
-    AMD_ENABLE_STACK_FAMILY_HOOK_F15
-.endm
-
-/****************************************************************************
-*
-* AMD_DISABLE_STACK_FAMILY_HOOK Macro - Stackless
-*
-*   Return any family specific controls to their 'standard'
-*   settings for using cache with main memory.
-*
-* Inputs:
-*       none
-* Outputs:
-*       none
- ****************************************************************************/
-.macro  AMD_DISABLE_STACK_FAMILY_HOOK
-
-    //AMD_DISABLE_STACK_FAMILY_HOOK_F10
-    //AMD_DISABLE_STACK_FAMILY_HOOK_F12
-    //AMD_DISABLE_STACK_FAMILY_HOOK_F14
-    AMD_DISABLE_STACK_FAMILY_HOOK_F15
-
-.endm
-
-/****************************************************************************
-*
-* GET_NODE_ID_CORE_ID Macro - Stackless
-*
-*   Read family specific values to determine the node and core
-*   numbers for the core executing this code.
-*
-* Inputs:
-*     none
-* Outputs:
-*     SI[7:0] = Core# (0..N, relative to node)
-*     SI[15:8]= Node# (0..N)
-*     SI[23:16]= reserved
-*     SI[24]=   flag: 1=Family Unrecognized
-*     SI[25]=   flag: 1=Interface re-entry call
-*     SI[26]=   flag: 1=Core is primary of compute unit
-*     SI[31:27]= reserved, =0
-****************************************************************************/
-.macro  GET_NODE_ID_CORE_ID
-    LOCAL  node_core_exit
-
-    mov     $-1, %si
-    //GET_NODE_ID_CORE_ID_F10
-    //GET_NODE_ID_CORE_ID_F12
-    //GET_NODE_ID_CORE_ID_F14
-    GET_NODE_ID_CORE_ID_F15
-    /*
-     * Check for unrecognized Family
-     */
-    cmp     $-1, %si                      # Has family (node/core) already been discovered?
-    jnz     node_core_exit              # Br if yes
-
-   mov     $((1 << FLAG_UNKNOWN_FAMILY)+(1 << FLAG_IS_PRIMARY)), %esi # No, Set error code, Only let BSP continue
-
-    mov     $APIC_BASE_ADDRESS, %ecx      # MSR:0000_001B
-    _RDMSR
-    bt      $APIC_BSC, %eax               # Is this the BSC?
-    jc      node_core_exit              # Br if yes
-    hlt                                 # Kill APs
-node_core_exit:
-
-.endm
-
-
-/*****************************************************************************
-**                      Family 15h MACROS
-*****************************************************************************/
-/*****************************************************************************
-*
-* AMD_ENABLE_STACK_FAMILY_HOOK_F15 Macro - Stackless
-*
-*   Set any family specific controls needed to enable the use of
-*   cache as general storage before main memory is available.
-*
-* Inputs:
-*       ESI - node#, core#, flags from GET_NODE_ID_CORE_ID
-* Outputs:
-*       none
-*
-* Family 15h requirements (BKDG #42301 section 2.3.3):
-*   * Paging must be disabled.
-*   * MSRC001_0015[INVD_WBINVD]=0
-*   * MSRC001_1020[DisSS]=1
-*   * MSRC001_1021[DIS_SPEC_TLB_RLD]=1
-*   * MSRC001_1022[DIS_SPEC_TLB_RLD]=1
-*   * MSRC001_1022[DisHwPf]=1
-*   * No INVD or WBINVD, no exceptions, page faults or interrupts
-*****************************************************************************/
-.macro  AMD_ENABLE_STACK_FAMILY_HOOK_F15
-    LOCAL   fam15_enable_stack_hook_exit
-
-    AMD_CPUID   $CPUID_MODEL
-    mov     %eax, %ebx                # Save revision info to EBX
-    shr     $20, %eax                 # AL = cpu extended family
-    cmp     $0x06, %al                     # Is this family 15h?
-    jnz     fam15_enable_stack_hook_exit # Br if no
-
-    bt      $FLAG_STACK_REENTRY , %esi                 # Check if stack has already been set
-    jc      fam15_skipClearingBit4
-    mov     $HWCR, %ecx                   # MSR C001_0015
-    _RDMSR
-    btr     $INVD_WBINVD, %eax            # disable INVD -> WBINVD conversion
-    _WRMSR
-
-fam15_skipClearingBit4:
-	#cz
-      mov     $LS_CFG3, %ecx             # MSR:C001_101C
-      _RDMSR
-      bts     $DIS_SS_F15CZ, %eax        # Turn on Streaming store functionality disabled bit
-      _WRMSR
-
-      mov     $IC_CFG, %ecx             # MSR:C001_1021
-      _RDMSR
-      bts     $IC_DIS_SPEC_TLB_RLD, %eax  # Turn on Disable speculative IC-TLB reloads bit
-      _WRMSR
-
-      mov     $LS_CFG3, %ecx            # MSR:C001_101C
-      _RDMSR
-      bts     $DC_DIS_SPEC_TLB_RLD_F15CZ, %eax  # Turn on Disable speculative DC-TLB reloads bit
-      bts     $DC_DIS_HW_PF_F15CZ, %eax
-      _WRMSR
-    # Do CZ enable stack special
-
-    mov     $CU_CFG, %ecx   #MSR:C001_1023
-    _RDMSR
-    bt      $L2_WAY_LOCK_EN, %eax
-    #.if (!carry?)
-    jc      dofamily15w
-    bts     $L2_WAY_LOCK_EN, %eax
-    or     $L2_FIRST_LOCKED_WAY_OR_MASK, %eax
-    _WRMSR
-    #.endif
-
-dofamily15w:  # Do Standard Family 15 work
-
-    mov     $CU_CFG3, %ecx                # MSR:C001_102B
-    _RDMSR
-    btr     $(COMBINE_CR0_CD - 32), %edx         # Clear CombineCr0Cd bit
-    _WRMSR
-
-fam15_enable_stack_hook_exit:
-.endm
-
-/*****************************************************************************
-*
-* AMD_DISABLE_STACK_FAMILY_HOOK_F15 Macro - Stackless
-*
-*   Return any family specific controls to their 'standard'
-*   settings for using cache with main memory.
-*
-* Inputs:
-*       ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
-* Outputs:
-*       none
-*
-* Family 15h requirements:
-*   * INVD or WBINVD
-*   * MSRC001_0015[INVD_WBINVD]=1
-*   * MSRC001_1020[DisSS]=0
-*   * MSRC001_1021[DIS_SPEC_TLB_RLD]=0
-*   * MSRC001_1022[DIS_SPEC_TLB_RLD]=0
-*   * MSRC001_1022[DIS_HW_PF]=0
-*****************************************************************************/
-.macro  AMD_DISABLE_STACK_FAMILY_HOOK_F15
-    LOCAL   fam15_disable_stack_hook_exit
-    LOCAL   fam15_disable_stack_remote_read_exit
-
-    AMD_CPUID   $CPUID_MODEL
-    mov     %eax, %ebx                    # Save revision info to EBX
-    shr     $20, %eax                     # AL = cpu extended family
-    cmp     $0x06, %al                     # Is this family 15h?
-    jnz     fam15_disable_stack_hook_exit # Br if no
-
-    mov     %ebx, %edi                    # Save revision info to EDI
-    AMD_CPUID  $AMD_CPUID_APIC
-    mov     %cl,  %al                     # AL = number of cores - 1
-    shr     $APIC_ID_CORE_ID_SIZE, %cx    # CL = ApicIdCoreIdSize
-    mov     $1,   %bx
-    shl     %cl,  %bl                     # BL = theoretical number of cores on socket
-    dec     %bx                           # BL = core number on socket mask
-    mov     %bl,  %ah                     # AH = core number on socket mask
-    mov     %edi, %ebx                    # Restore revision info to EBX
-    mov     %ax,  %di                     # DI[15:8] = core number mask, DI[7:0] = number of cores - 1
-
-    and     $0x0F00FF, %ebx
-    mov     %ebx,  %eax
-    shr     $8,    %eax
-    or      %ax,   %bx                    # Save Extended Model, Model and Stepping to BX
-	                                  # [11:8] = Extended Model, [7:4] = Model, [3:0] = Stepping (bx=0000000000010100, ok)
-
-    mov     $APIC_BASE_ADDRESS, %ecx
-    _RDMSR                                # dx=0 ax=fee00800
-    mov     %bx,  %dx                     # Save Extended Model, Model and Stepping to DX
-    shl     $16,  %edx                    #EDX[31:16] = Extended Model, Model and Stepping
-    mov     %eax ,%ebx                    # EBX = LAPIC base
-    xor     %ecx ,%ecx                    # Zero out CU flags
-    bts     $AMD_CU_NEED_TO_WAIT,  %ecx  # Default to waiting
-    bts     $AMD_CU_SEND_INVD_MSG, %ecx  # Default to signaling
-    mov     %cr0, %eax
-    bt      $CR0_PE, %ax                  # Are we in protected mode?
-    # .if (!carry?)
-    jc      1f
-    bts     $AMD_CU_RESTORE_ES, %ecx  # Indicate ES restore is required
-    mov     %es,   %cx    # Save ES segment register to CX
-    xor     %ax,   %ax
-    mov     %ax,   %es    # Set ES to big real mode selector for 4GB access
-    # .endif
-
-1:
-    and     $0x0F000, %bx                  # EBX = LAPIC base, offset 0
-    or      $APIC_ID_REG, %bl		#
-    mov     %es:(%ebx), %eax               # EAX[31:24] = APIC ID
-    shr     $APIC20_APICID, %eax          # AL = APIC ID
-    mov     %al, %ah                      # AH = APIC ID
-    mov     %di, %dx                      # DH = core mask
-    and     %dh, %ah                      # AH = core number #  ax=111 dx=01000F03
-
-//1:	jmp 1b
-    # .if (zero?)
-    jnz      1f
-    #  Core 0 of a socket
-        btr     $AMD_CU_SEND_INVD_MSG, %ecx  # No need to signal after INVD
-        #.if (dl != 0)
-	cmp     $0,  %dl
-        jz      2f
-        # This socket has multiple cores
-        and     $0xf000, %bx            # EBX = LAPIC base, offset 0
-        or      $APIC_MSG_REG, %bx
-        mov     $APIC_MSG,  %edi
-	mov     %edi,  %es:(%ebx)      # Signal for non core 0s to complete CAR breakdown
-        jmp     1f
-        #.else
-2:      btr     $AMD_CU_NEED_TO_WAIT, %ecx   # No need to wait on a single core CPU
-	#.endif
-    # .endif
-1:
-
-    bt      $AMD_CU_NEED_TO_WAIT, %ecx  #cx = c0000000
-    #.if (carry?)
-    jnc    1f
-        #.if (ah == dl)
-        cmp  %dl,  %ah
-        jnz  2f
-        # This is the highest numbered core on this socket -- wait on core 0
-            not  %dh                       # Flip the mask to determine local core 0's APID ID
-            and   %dh, %al                 # AL = target APIC ID  # ax=310
-        jmp   3f
-2:      #.else
-        # All other cores (including core 0) wait on the next highest core.
-        # In this way, cores will halt in a cascading fashion down to 0.
-            inc    %al
-        #.endif
-3:
-        shl     $APIC20_APICID, %eax
-        and     $0x0F000, %bx
-        or      $APIC_CMD_HI_REG, %bx
-        mov     %eax, %es:(%ebx)          # Set target APIC ID
-
-        # Use bits 23:16 as a timeout for unresponsive cores
-        ror     $8,  %ecx
-        mov     $0xFF, %ch
-        stc
-
-        #.while (carry?)
-5:	jnc     4f
-            and     $0xF000, %bx         #EBX = LAPIC base, offset 0
-            or      $APIC_CMD_LO_REG, %bx # bx = 00000000FEE00300
-            mov     $CMD_REG_TO_READ_DATA, %eax
-            mov     %eax, %es:(%ebx)     #Fire remove read IPI
-            inc     %ch                  #Pre increment the timeout
-            stc
-            #.while (carry?)
-7:          jnc     6f
-                dec     %ch                   #Check the timeout
-                jz      fam15_disable_stack_remote_read_exit
-                mov     %es:(%ebx), %eax      # ax = 0000000000020338
-                bt      $DELIVERY_STS_BIT, %eax
-            jmp     7b
-6:          #.endw
-            stc
-            #.while (carry?)
-7:          jnc     6f
-                mov     %es:(%ebx), %eax
-                and     $REMOTE_READ_STS, %eax
-                #.if (eax == REMOTE_DELIVERY_PEND)
-                    cmp     $REMOTE_DELIVERY_PEND, %eax
-                    jnz      8f
-                    dec     %ch               # Check the timeout
-                    jz      fam15_disable_stack_hook_exit # Branch if there is an unreponsive core
-                    stc
-                jmp     9f
-8:              #.else
-                    clc
-9:              #.endif
-            jmp     7b
-6:          #.endw
-            #.if (eax == REMOTE_DELIVERY_DONE)
-            cmp     $REMOTE_DELIVERY_DONE, %eax
-            jnz     6f
-                and     $0x0F000, %bx        #EBX = LAPIC base, offset 0
-                or      $APIC_REMOTE_READ_REG, %bl
-                mov     %es:(%ebx), %eax
-                #.if (eax == APIC_MSG)
-                cmp     $APIC_MSG, %eax     # ax=00000000FFC5BBB2
-                jnz     8f
-                    clc
-                jmp     9f
-                #.else
-8:                  stc
-9:              #.endif
-            jmp     7f
-6:          #.else
-                dec     %ch
-                jz      fam15_disable_stack_remote_read_exit
-                stc
-7:          #.endif
-        jmp     5b
-4:      #.endw
-
-fam15_disable_stack_remote_read_exit:
-        rol   $8, %ecx                 # Restore ECX
-
-1:  #.endif
-#    jmp 1b
-    bt     $AMD_CU_RESTORE_ES,  %ecx
-    #.if (carry?)
-    jnc    1f
-        mov    %cx, %es
-1:
-    mov    %ecx,   %edi
-    shr    $16, %edx
-    //mov    %dx,  %bx
-
-    #Handshaking complete.  Continue tearing down CAR.
-
-#cz
-    mov     $LS_CFG3, %ecx                # MSR:C001_101C
-    _RDMSR
-    btr     $DIS_SS_F15CZ, %eax           # Turn on Streaming store functionality
-    _WRMSR
-
-    mov     $IC_CFG, %ecx                 # MSR:C001_1021
-    _RDMSR
-    btr     $IC_DIS_SPEC_TLB_RLD, %eax    # Turn on speculative TLB reloads
-    _WRMSR
-
-    mov     $LS_CFG3, %ecx                # MSR:C001_101C
-    _RDMSR
-    btr     $DC_DIS_SPEC_TLB_RLD_F15CZ, %eax  # Turn on speculative TLB reloads
-    btr     $DC_DIS_HW_PF_F15CZ, %eax         # Turn on hardware prefetches
-    _WRMSR
-
-#not cz
-//    mov     $LS_CFG, %ecx                 # MSR:C001_1020
-//    #.if (bx != 0)              ; Is this OR A0?
-//    cmp	   $0x0, %bx
-//    jz    0f
-//    _RDMSR
-//    btr     $DIS_SS, %eax                 # Turn on Streaming store functionality
-//    _WRMSR
-//    #.endif
-//0:                              # End workaround for errata 495 and 496
-//
-//    inc     %ecx  #IC_CFG                # MSR:C001_1021
-//    _RDMSR
-//    btr     $IC_DIS_SPEC_TLB_RLD, %eax    # Turn on speculative TLB reloads
-//    _WRMSR
-//
-//    inc     %ecx  #DC_CFG                # MSR:C001_1022
-//    _RDMSR
-//    btr     $DC_DIS_SPEC_TLB_RLD, %eax    # Turn on speculative TLB reloads
-//    #.if (bx != 0)              # Is this rev A0?
-//    cmp	$0, %bx
-//    jz	0f
-//    btr     $DIS_HW_PF, %eax              # Turn on hardware prefetches
-//    #.endif                              # End workaround for erratum 498
-//    0:
-//    _WRMSR
-# end of not cz
-    #--------------------------------------------------------------------------
-    # Begin critical sequence in which EAX, BX, ECX, and EDX must be preserved.
-    #--------------------------------------------------------------------------
-
-    mov     $HWCR, %ecx                    # MSR:C001_0015h
-    _RDMSR
-    btr     $INVD_WBINVD, %eax            # Disable INVD -> WBINVD conversion
-    _WRMSR
-    wbinvd      #bao                          # Clear the cache tag RAMs
-#    #.if (bh == 01h) || (bh == 03h)      ; Is this TN or KM?
-#    cmp   $01, %bh
-#    jz    4f
-#    cmp   $03, %bh
-#    jnz   1f
-#4:
-    mov   $CU_CFG, %ecx                 # MSR:C001_1023
-    _RDMSR
-    shr   $L2_FIRST_LOCKED_WAY, %eax
-    and   $0x1F,  %eax
-    #.if (eax == 01Fh)
-    cmp   $0x1F,  %eax                  #Check if way 15 of the L2 needs to be reserved
-    jnz   3f
-    _RDMSR
-    btr   $L2_WAY_LOCK_EN, %eax
-    _WRMSR
-3:  #.endif
-
-1:  #.endif
-    #Do Standard Family 15 work
-    mov     $HWCR, %ecx                    # MSR:C001_0015h
-    _RDMSR
-    bts     $INVD_WBINVD, %eax            # Turn on Conversion of INVD to WBINVD
-    _WRMSR
-    #.endif                              # end
-    0:
-//
-//    #--------------------------------------------------------------------------
-//    # End critical sequence in which EAX, BX, ECX, and EDX must be preserved.
-//    #--------------------------------------------------------------------------
-//
-    mov     $CU_CFG3, %ecx                # MSR:C001_102B
-    _RDMSR
-    bts     $(COMBINE_CR0_CD - 32), %edx         # Set CombineCr0Cd bit
-    _WRMSR
-
-    bt      $AMD_CU_SEND_INVD_MSG, %edi
-    #.if (carry?)
-    jnc     1f
-    # Non core zero needs to signal to core 0 to proceed
-    mov     $APIC_BASE_ADDRESS, %ecx
-    _RDMSR
-    mov     %eax, %ebx                # EBX = LAPIC base
-    and     $0x0F000, %bx              # EBX = LAPIC base, offset 0
-    or      $APIC_MSG_REG, %bx
-    mov     $APIC_MSG, %eax
-    mov     %eax, %es:(%ebx)           # Signal for core 0 to complete CAR breakdown
-
-1:  #.endif
-
-fam15_disable_stack_hook_exit:
-.endm
-
-/*****************************************************************************
-*
-* GET_NODE_ID_CORE_ID_F15 Macro - Stackless
-*
-*   Read family specific values to determine the node and core
-*   numbers for the core executing this code.
-*
-* Inputs:
-*     none
-* Outputs:
-*     SI = core#, node# & flags (see GET_NODE_ID_CORE_ID macro above)
-*****************************************************************************/
-.macro  GET_NODE_ID_CORE_ID_F15
-
-    LOCAL   node_core_f15_exit
-    LOCAL   node_core_f15_AP
-    LOCAL   node_core_f15_shared
-
-#define F15_L2Size	512
-#define F15_ShareCores  2
-#define F15_AllocMem    0
-#define F15_AllocExe    0
-#define F15_SzAddrBus   48
-#define F15_pad         0
-    cmp     $-1, %si                      # Has node/core already been discovered?
-    jnz     node_core_f15_exit          # Br if yes
-
-    AMD_CPUID   $CPUID_MODEL
-    shr     $12, %eax                     # AL = cpu extended family
-    cmp     $06, %ah                     # Is this family 15h?
-    jnz     node_core_f15_exit          # Br if no
-    shr     $4,  %al                     # AL = cpu extended model
-    shr     $16, %ebx                    # BH = LocalApicId
-    mov     %al, %bl                     # BL = cpu extended model
-
-    # LoadTableAddress(FAM15H_INFO_STRUCT)
-    # movd    mm5, eax                    # load pointer to Family Info Struc
-
-    xor     %esi, %esi                    # Assume BSC, clear local flags
-    mov     $APIC_BASE_ADDRESS, %ecx      # MSR:0000_001B
-    _RDMSR
-    bt      $APIC_BSC, %eax               # Is this the BSC?
-    jnc      node_core_f15_AP            # Br if no
-
-    # This is the BSP.
-    # Enable routing tables on BSP (just in case the HT init code has not yet enabled them)
-    mov     $0x8000C06C, %eax              # PCI address for D18F0x6C Link Initialization Control Register
-    mov     $0x0CF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    in      %dx, %eax
-    btr     $0, %eax                      # Set LinkInitializationControl[RouteTblDis] = 0
-    out     %eax, %dx
-    jmp     node_core_f15_shared        #
-
-node_core_f15_AP:
-//1:	jmp 1b   # not crash
-    mov     %bl, %al                        # AL = cpu extended model
-    shr     $8,  %bx                        # BL = CPUID Fn0000_0001_EBX[LocalApicId]
-//    cmp    $1,  %al                        # Is This TN?
-//    jz     4f
-//    cmp    $3,  %al
-//    jnz    node_core_f15_AP_not_TN
-    mov     %bx, %si
-    jmp     node_core_f15_shared
-    #
-    # This is an AP. Routing tables have been enabled by the HT Init process.
-    # Also, the MailBox register was set by the BSP during early init
-    #   The Mailbox register content is formatted as follows:
-    #         UINT32 Node:4;          // The node id of Core's node.
-    #         UINT32 Socket:4;        // The socket of this Core's node.
-    #         UINT32 Module:2;        // The internal module number for Core's node.
-    #         UINT32 ModuleType:2;    // Single Module = 0, Multi-module = 1.
-    #         UINT32 :20;             // Reserved
-    #
-#node_core_f15_AP_not_TN:
-#    mov     $0x0C0000408, %ecx             # Read the family 15h mailbox
-#    _RDMSR                              #      MC4_MISC1[63:32]
-#    mov     %dx, %si                      # SI = raw mailbox contents (will extract node# from this)
-#    shr     $24, %ebx                     # BL = CPUID Fn0000_0001_EBX[LocalApicId]
-#    mov     %bx, %di                      # DI = Initial APIC ID (will extract core# from this)
-#
-#    AMD_CPUID   $AMD_CPUID_APIC          #
-#    shr     $4, %ch                       # CH = ApicIdSize, #bits in APIC ID that show core#
-#    inc     %cl                          # CL = Number of enabled cores in the socket
-#    mov     %cx, %bx
-#
-#    mov     $NB_CFG, %ecx
-#    _RDMSR                              # EDX has InitApicIdCpuIdLo bit
-#
-#    mov     %bh, %cl                      # CL = APIC ID size
-#    mov     $1, %al                       # Convert APIC ID size to an AND mask
-#    shl     %cl, %al                      # AL = 2^APIC ID size
-#    dec     %al                          # AL = mask for relative core number
-#    xor     %ah, %ah                      # AX = mask for relative core number
-#    bt      $(INIT_APIC_ID_CPU_ID_LO-32), %edx # InitApicIdCpuIdLo == 1?
-#    #.if (!carry?)                       # Br if yes
-#    jc      0f
-#        mov     $8, %ch                   # Calculate core number shift count
-#        sub     %cl, %ch                  # CH = core shift count
-#        mov     %ch, %cl
-#        shr     %cl, %di                  # Right justify core number
-#    #.endif
-#    0:
-#    and     %ax, %di                      # DI = socket-relative core number
-#
-#    mov     %si, %cx                      # CX = raw mailbox value
-#    shr     $10, %cx                      # CL[1:0] = ModuleType or #nodes per socket (0-SCM, 1-MCM)
-#    and     $3, %cl                       # Isolate ModuleType
-#    xor     %bh, %bh                      # BX = Number of enabled cores in the socket
-#    shr     %cl, %bx                      # BX = Number of enabled cores per node
-#    xor     %dx, %dx                      # Clear upper word for div
-#    mov     %di, %ax                      # AX = socket-relative core number
-#    div     %bx                          # DX = node-relative core number
-#    movzx   %si, %eax                     # Prepare return value
-#    and     $0x000F, %ax                   # AX = node number
-#    shl     $8,%ax                       # [15:8]=node#
-#    mov     %dl, %al                      # [7:0]=core# (relative to node)
-#    mov     %eax, %esi                    # ESI = node-relative core number
-#
-      #
-      #   determine if this core shares MTRRs
-      #
-node_core_f15_shared:
-    mov     $0x8000C580, %eax              # Compute Unit Status
-    mov     %si, %bx
-    shl     $3, %bh                       # Move node# to PCI Dev# field
-    add     %bh, %ah                      # Adjust for node number
-    mov     $0x0CF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    in      %dx, %eax                     # [3:0]=Enabled# [19:16]=DualCore
-
-                                        # BL is MyCore#
-    mov     $0x08, %cx                     # Use CH as 'first of pair' core#
-    #.while (cl > 0)
-    jmp  0f
-    8:
-        bt      $0, %eax                  # Is pair enabled?
-        #.if (carry?)                    #
-        jnc     1f
-            mov     $0x01, %bh             #   flag core as primary
-            bt      $16, %eax             # Is there a 2nd in the pair?
-            #.if (carry?)                #
-            jnc 4f
-                #.break .if (ch == bl)   # Does 1st match MyCore#?
-                cmp     %bl, %ch
-                je      9f
-                inc     %ch
-                xor     %bh, %bh          #     flag core as NOT primary
-                #.break .if (ch == bl)   # Does 2nd match MyCore#?
-                cmp     %bl, %ch
-                je      9f
-                jmp     2f
-            #.else                       # No 2nd core
-            4:
-                #.break .if (ch == bl)   # Does 1st match MyCore#?
-                cmp     %bl, %ch
-                je      9f
-            #.endif
-            2:
-            inc     %ch
-        #.endif
-        1:
-        shr     $1, %eax
-        dec     %cl
-    #.endw
-    0:
-    #.if (cl == 0)
-    cmp $0x0, %cl
-    ja	8b
-    9:
-    or	%cl, %cl
-    jne 1f
-        #Error - core# didn't match Compute Unit Status content
-        bts     $FLAG_CORE_NOT_IDENTIFIED, %esi
-        bts     $FLAG_IS_PRIMARY, %esi    #   Set Is_Primary for unknowns
-    #.endif
-    1:
-    #.if (bh != 0)                       # Check state of primary for the matched core
-    or %bh, %bh
-    je 2f
-        bts     $FLAG_IS_PRIMARY, %esi    #   Set shared flag into return value
-    #.endif
-    2:
-
-node_core_f15_exit:
-
-.endm
-
-/*****************************************************************************
-* AMD_ENABLE_STACK:  Setup a stack
-*
-*   In:
-*       EBX  = Return address (preserved)
-*
-*   Out:
-*       SS:ESP - Our new private stack location
-*
-*       EAX = AGESA_STATUS
-*
-*       ECX = Stack size in bytes
-*
-*   Requirements:
-*       * This routine presently is limited to a max of 64 processor cores
-*   Preserved:
-*       ebx ebp
-*   Destroyed:
-*       eax, ecx, edx, edi, esi, ds, es, ss, esp
-*       mmx0, mmx1
-*
-*   Description:
-* Fixed MTRR address allocation to cores:
-* The BSP gets 64K of stack, Core0 of each node gets 16K of stack, all other cores get 4K.
-* There is a max of 1 BSP, 7 core0s and 56 other cores.
-* Although each core has it's own cache storage, they share the address space. Each core must
-* be assigned a private and unique address space for its stack. To support legacy systems,
-* the stack needs to be within the legacy address space (1st 1Meg). Room must also be reserved
-* for the other legacy elements (Interrupt vectors, BIOS ROM, video buffer, etc.)
-*
-* 80000h                                        40000h                                      00000h
-*     +----------+----------+----------+----------+----------+----------+----------+----------+
-* 64K |          |          |          |          |          |          |          |          |  64K  ea
-*  ea +----------+----------+----------+----------+----------+----------+----------+----------+
-*     |                             MTRR 0000_0250 MTRRfix64K_00000                           |
-*     +----------+----------+----------+----------+----------+----------+----------+----------+
-*     |  7 ,  6  |  5 ,  4  |  3 ,  2  |  1 ,  0  |     0    |          |          |          | <-node
-*     |7..1,7..1 |7..1,7..1 |7..1,7..1 |7..1,7..1 |     0    |          |          |          | <-core
-*     +----------+----------+----------+----------+----------+----------+----------+----------+
-*
-* C0000h                       B0000h                      A0000h                      90000h                      80000h
-*     +------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+
-*16K  |      |      |      |      |      |      |      |      |      |      |      |      |      |      |      |      |
-* ea  +------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+
-*     |              MTRR 0259 MTRRfix16K_A0000               |             MTRR 0258 MTRRfix16K_80000                |
-*     +------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+
-*     | > Dis|play B|uffer |   <  |      |      |      |      |   7  |  6   |  5   |  4   |  3   |  2   |  1   |      | <-node
-*     | >   T| e  m |p o r |a r y |  B u |f f e |r   A |r e a<|   0  |  0   |  0   |  0   |  0   |  0   |  0   |      | <-core
-*     +------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+
-*
-* E0000h                                            D0000h                                         C0000h
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-* 4K  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  4K  ea
-*  ea +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     |  026B MTRRfix4K_D8000 | 026A MTRRfix4K_D0000  | 0269 MTRRfix4K_C8000  | 0268 MTRRfix4K_C0000  |
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  | >| V| I| D| E| O|  |B |I |O |S |  |A |r |e |a<|
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*
-* 100000h                                           F0000h                                          E0000h
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  4K  ea
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     |  026F MTRRfix4K_F8000 | 026E MTRRfix4K_F0000  | 026D MTRRfix4K_E8000  | 026C MTRRfix4K_E0000  |
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     | >|MA|IN| B|IO|S |RA|NG|E |  |  |  |  |  |  |< | >|EX|TE|ND|ED| B|IO|S |ZO|NE|  |  |  |  |  |< |
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*****************************************************************************/
-.macro  AMD_ENABLE_STACK
-
-# These are local labels. Declared so linker doesn't cause 'redefined label' errors
-    LOCAL   SetupStack
-    LOCAL   Real16bMode
-    LOCAL   Protected32Mode
-    LOCAL   ClearTheStack
-
-#   Note that SS:ESP will be default stack.  Note that this stack
-#   routine will not be used after memory has been initialized.  Because
-#   of its limited lifetime, it will not conflict with typical PCI devices.
-    movd    %ebx, %mm0                    # Put return address in a safe place
-    movd    %ebp, %mm1                    # Save some other user registers
-
-    # get node id and core id of current executing core
-    GET_NODE_ID_CORE_ID                 # Sets ESI[23:16]=Shared core## SI[15,8]= Node## SI[7,0]= core# (relative to node)
-    # Note: ESI[31:24] are used for flags:  Unrecognized Family,  Is_Primary core,  Stack already established
-
-    # determine if stack is already enabled. We are using the DefType MSR for this determination.
-    # It is =0 after reset; CAR setup sets it to enable the MTRRs
-    mov     %cr0, %eax
-    test    $CR0_MASK, %eax              # Is cache disabled? (CD & NW bits)
-    jnz     SetupStack                  # Jump if yes
-    mov     $AMD_MTRR_DEFTYPE, %ecx       # MSR:0000_02FF
-    _RDMSR
-    test    $MSR_MASK, %eax                     # Are the default types enabled? (MTRR_DEF_TYPE_EN + MTRR_DEF_TYPE_FIX_EN)
-    jz      SetupStack                  # Jump if no
-    or      $FLAG_STACK_REENTRY, %esi             # Bit25, indicate stack has already been initialized
-
-SetupStack:
-    # Set node to map the first 16MB to node 0# 0000_0000 to 00FF_FFFF as DRAM
-    mov     %esi, %ebx                    # Get my Node/Core info
-    xor     %bl, %bl
-    shl     $3, %bh                       # Isolate my node#, match alignment for PCI Dev#
-    mov     $0x8000C144, %eax              # D18F1x44:DRAM Base/Limit# N is Base, N+4 is Limit
-    add     %bh, %ah
-    mov     %eax, %ebx                    # Save PCI address for Base/Limit pair
-
-    mov     $0x0CF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    xor     %eax, %eax                    # Least Significant bit is AD24 so 0 sets mask of 00FF_FFFF (16MB)
-    out     %eax, %dx                     # DRAM Limit = node0, no interleave
-
-    mov     %ebx, %eax
-    sub     $4, %eax                      # Now point to the Base register
-    mov     $0x0CF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    mov     $0x00000003, %eax              # Set the read and write enable bits
-    out     %eax, %dx                     # DRAM Base = 0x0000, R/W
-
-    AMD_ENABLE_STACK_FAMILY_HOOK
-
-    # Init CPU MSRs for our init routines
-    mov     $MTRR_SYS_CFG, %ecx           # SYS_CFG
-    _RDMSR
-    bts     $MTRR_FIX_DRAM_MOD_EN, %eax   # Turn on modification enable bit
-    _WRMSR
-
-    mov     %esi, %eax
-    bt      $FLAG_STACK_REENTRY, %eax     # Is this a 2nd entry?
-    #.if (!carry?)                       #   On a re-entry, do not clear MTRRs or reset TOM; just reset the stack SS:ESP
-    jc 0f
-        bt      $FLAG_IS_PRIMARY, %eax    #   Is this core the primary in a compute unit?
-        #.if (carry?)                    #     Families using shared groups do not need to clear the MTRRs since that is done at power-on reset
-            #  Note: Relying on MSRs to be cleared to 0's at reset for families w/shared cores
-            # Clear all variable and Fixed MTRRs for non-shared cores
-        jnc 0f
-        mov     $AMD_MTRR_VARIABLE_BASE0, %ecx
-        xor     %eax, %eax
-        xor     %edx, %edx
-        #.while (cl != 10h)                  # Variable MTRRphysBase[n] and MTRRphysMask[n]
-        jmp	1f
-        2:
-            _WRMSR
-            inc     %cl
-        #.endw
-        1:
-        cmp	$0x10, %cl
-        jne	2b
-        mov     $AMD_MTRR_FIX64k_00000, %cx   # MSR:0000_0250
-        _WRMSR
-        mov     $AMD_MTRR_FIX16k_80000, %cx   # MSR:0000_0258
-        _WRMSR
-        mov     $AMD_MTRR_FIX16k_A0000, %cx   # MSR:0000_0259
-        _WRMSR
-        mov     $AMD_MTRR_FIX4k_C0000, %cx    # Fixed 4Ks: MTRRfix4K_C0000 to MTRRfix4K_F8000
-        #.while (cl != 70h)
-        jmp 3f
-        4:
-            _WRMSR
-            inc     %cl
-        #.endw
-        3:
-        cmp $0x70, %cl
-        jne  4b
-        # Set TOP_MEM (C001_001A) for non-shared cores to 16M. This will be increased at heap init.
-        #  - not strictly needed since the FixedMTRRs take presedence.
-        mov     $(16 * 1024 * 1024), %eax
-        mov     $TOP_MEM, %ecx            # MSR:C001_001A
-        _WRMSR
-        #.endif                          #   End Is_Primary
-    #.endif                              # End Stack_ReEntry
-    0:
-    # Clear IORRs (C001_0016-19) and TOM2(C001_001D) for all cores
-    xor     %eax, %eax
-    xor     %edx, %edx
-    mov     $IORR_BASE, %ecx              # MSR:C001_0016 - 0019
-    #.while (cl != 1Ah)
-    jmp  1f
-    2:
-        _WRMSR
-        inc     %cl
-    #.endw
-    1:
-    cmp $0x1A, %cl
-    jne  2b
-    mov     $TOP_MEM2, %ecx               # MSR:C001_001D
-    _WRMSR
-
-    # setup MTTRs for stacks
-    #   A speculative read can be generated by a speculative fetch mis-aligned in a code zone
-    #    or due to a data zone being interpreted as code. When a speculative read occurs outside a
-    #    controlled region (intentionally used by software), it could cause an unwanted cache eviction.
-    #   To prevent speculative reads from causing an eviction, the unused cache ranges are set
-    #    to UC type. Only the actively used regions (stack, heap) are reflected in the MTRRs.
-    #    Note: some core stack regions will share an MTRR since the control granularity is much
-    #    larger than the allocated stack zone. The allocation algorithm must account for this 'extra'
-    #    space covered by the MTRR when parseling out cache space for the various uses. In some cases
-    #    this could reduce the amount of EXE cache available to a core. see cpuCacheInit.c
-    #
-    # Outcome of this block is that:   (Note the MTRR map at the top of the file)
-    #   ebp - start address of stack block
-    #   ebx - [31:16] - MTRR MSR address
-    #       - [15:8]  - slot# in MTRR register
-    #       - [7:0]   - block size in #4K blocks
-    # review: ESI[31:24]=Flags; SI[15,8]= Node#; SI[7,0]= core# (relative to node)
-    #
-
-    mov     %esi, %eax                      # Load Flags,node, core
-    #.if (al == 0)                       # Is a core 0?
-    or %al, %al
-    jne 1f
-        #.if (ah == 0)                   # Is Node 0? (BSP)
-        or %ah, %ah
-        jne 2f
-            # Is BSP, assign a 64K stack
-            mov     $((AMD_MTRR_FIX64k_00000 << 16) + (3 << 8) + (BSP_STACK_SIZE  / 0x1000)), %ebx
-            bt      $FLAG_FORCE_32K_STACK, %eax
-            jnc w64k_here            # Br if no
-            mov     $((AMD_MTRR_FIX64k_00000 << 16) + (3 << 8) + (BSP_STACK_SIZE_32K  / 0x1000)), %ebx
-w64k_here:
-            mov     $BSP_STACK_BASE_ADDR, %ebp
-            jmp     0f
-        #.else   # node 1 to 7, core0
-        2:
-            # Is a Core0 of secondary node, assign 16K stacks
-            mov     $AMD_MTRR_FIX16k_80000, %bx
-            shl     $16, %ebx             #
-            dec     %ah                  #index from 0
-            mov     %ah, %bh              # Node# is used as slot#
-            mov     $(CORE0_STACK_SIZE / 0x1000), %bl
-            mov     %ah, %al              # Base = (Node# * Size)#
-            mul     %bl                  #
-            movzx   %ax, %eax             #
-            shl     $12, %eax             # Expand back to full byte count (* 4K)
-            add     $CORE0_STACK_BASE_ADDR, %eax
-            mov     %eax, %ebp
-        #.endif
-        jmp 0f
-    #.else    #core 1 thru core 7
-    1:
-        # Is core 1-7 of any node, assign 4K stacks
-        mov     $8, %al                   # CoreIndex = ( (Node# * 8) ...
-        mul     %ah                      #
-        mov     %si, %bx                  #
-        add     %bl, %al                  #         ...  + Core#)#
-
-        mov     $AMD_MTRR_FIX64k_00000, %bx
-        shl     $16, %ebx                 #
-        mov     %al, %bh                  # Slot# = (CoreIndex / 16) + 4#
-        shr     $4, %bh                   #
-        add     $4, %bh                   #
-        mov     $(CORE1_STACK_SIZE / 0x1000), %bl
-
-        mul     %bl                      # Base = ( (CoreIndex * Size) ...
-        movzx   %ax, %eax                 #
-        shl     $12, %eax                 # Expand back to full byte count (* 4K)
-        add     $CORE1_STACK_BASE_ADDR, %eax #     ...   + Base_Addr)#
-        mov     %eax, %ebp
-    #.endif
-    0:
-
-    # Now set the MTRR. Add this to already existing settings (don't clear any MTRR)
-    mov     $WB_DRAM_TYPE, %edi           # Load Cache type in 1st slot
-    mov     %bh, %cl                      # ShiftCount =  ((slot#   ...
-    and     $0x03, %cl                     #   ...  % 4)             ...
-    shl     $0x03, %cl                       #   ...  * 8)#
-    shl     %cl, %edi                     # Cache type is now in correct position
-    ror     $16, %ebx                     # Get the MTRR address
-    movzx   %bx, %ecx                     #
-    rol     $16, %ebx                     # Put slot# & size back in BX
-    _RDMSR                              # Read-modify-write the MSR
-    #.if (bh < 4)                        # Is value in lower or upper half of MSR?
-    cmp $4, %bh
-    jae 1f
-        or      %edi, %eax                #
-        jmp     0f
-    #.else
-    1:                               #
-        or      %edi, %edx                #
-    #.endif                              #
-    0:
-    _WRMSR                              #
-
-    # Enable MTRR defaults as UC type
-    mov     $AMD_MTRR_DEFTYPE, %ecx       # MSR:0000_02FF
-    _RDMSR                              # Read-modify-write the MSR
-    bts     $MTRR_DEF_TYPE_EN, %eax       # MtrrDefTypeEn
-    bts     $MTRR_DEF_TYPE_FIX_EN, %eax   # MtrrDefTypeFixEn
-    _WRMSR
-
-    # Close the modification window on the Fixed MTRRs
-    mov     $MTRR_SYS_CFG, %ecx           # MSR:0C001_0010
-    _RDMSR
-    bts     $MTRR_FIX_DRAM_EN, %eax       # MtrrFixDramEn
-    bts     $MTRR_VAR_DRAM_EN, %eax       # variable MTRR enable bit
-    btr     $MTRR_FIX_DRAM_MOD_EN, %eax   # Turn off modification enable bit
-    _WRMSR
-
-    # Enable caching in CR0
-    mov     %cr0, %eax                    # Enable WT/WB cache
-    btr     $CR0_PG, %eax                     # Make sure paging is disabled
-    btr     $CR0_CD, %eax                     # Clear CR0 NW and CD
-    btr     $CR0_NW, %eax
-    mov     %eax, %cr0
-
-    # Use the Stack Base & size to calculate SS and ESP values
-    # review:
-    #       esi[31:24]=Flags; esi[15,8]= Node#; esi[7,0]= core# (relative to node)
-    #       ebp - start address of stack block
-    #       ebx - [31:16] - MTRR MSR address
-    #           - [15:8]  - slot# in MTRR register
-    #           - [7:0]   - block size in #4K blocks
-    #
-    mov     %ebp, %esp                    # Initialize the stack pointer
-    mov     %esp, %edi                    # Copy the stack start to edi
-    movzx   %bl, %bx
-    movzx   %bx, %ebx                     # Clear upper ebx, don't need MSR addr anymore
-    shl     $12, %ebx                     # Make size full byte count (* 4K)
-    add     %ebx, %esp                    # Set the Stack Pointer as full linear address
-    sub     $4, %esp
-    #
-    # review:
-    #       esi[31:24]=Flags; esi[15,8]= Node#; esi[7,0]= core# (relative to node)
-    #       edi - 32b start address of stack block
-    #       ebx - size of stack block
-    #       esp - 32b linear stack pointer
-    #
-
-    # Determine mode for SS base;
-    mov     %cr0, %ecx                    # Check for 32-bit protect mode
-    bt      $CR0_PE, %ecx                 #
-    #.if (!carry?)                       # PE=0 means real mode
-    jc      Protected32Mode
-    mov     %cs, %cx                      # PE=1
-    cmp     $0x0D000, %cx                  # Check for CS
-    jb      Protected32Mode             # If CS < D000, it is a selector instead of a segment
-            # alter SS:ESP for 16b Real Mode:
-Real16bMode:
-    mov     %edi, %eax
-    shr     $4, %eax                      # Create a Real Mode segment for ss, ds, es
-    mov     %ax, %ss
-    mov     %ax, %ds
-    mov     %ax, %es
-    shl     $4, %eax
-    sub     %eax, %edi                    # Adjust the clearing pointer for Seg:Offset mode
-    mov     %ebx, %esp                    # Make SP an offset from SS
-    sub     $4, %esp              #
-    #    .endif                          # endif
-    # #else
-    #   Default is to use Protected 32b Mode
-    #.endif
-    ;
-Protected32Mode:
-    #
-    # Clear The Stack
-    #   Now that we have set the location and the MTRRs, initialize the cache by
-    #   reading then writing to zero all of the stack area.
-    # review:
-    #       ss  - Stack base
-    #       esp - stack pointer
-    #       ebx - size of stack block
-    #       esi[31:24]=Flags; esi[15,8]= Node#; esi[7,0]= core# (relative to node)
-    #       edi -  address of start of stack block
-    #
-
-ClearTheStack:                          # Stack base is in SS, stack pointer is in ESP
-    shr     $2, %ebx                      # ebx = stack block size in dwords
-    mov     %bx, %cx                      #
-    # Check our flags - Don't clear an existing stack
-    #.if ( !(esi & 0FF000000h))          # Check our flags
-    test    $(1 << FLAG_STACK_REENTRY), %esi
-    jne 1f
-        cld
-        mov     %edi, %esi
-        rep     lodsl (%esi)    # Pre-load the range
-        xor     %eax, %eax
-        mov     %bx, %cx
-        mov     %edi, %esi                # Preserve base for push on stack
-        rep     stosl (%edi)    # Clear the range
-        movl     $0x0ABCDDCBA, (%esp) # Put marker in top stack dword
-        shl     $2, %ebx                  # Put stack size and base
-        push    %ebx                     #  in top of stack
-        push    %esi
-
-        mov     %ebx, %ecx                # Return size of stack in bytes
-        xor     %eax, %eax                # eax = 0 : no error return code
-        jmp     0f
-    #.else
-    1:
-        movzx   %cx, %ecx
-        shl     $2, %ecx                  # Return size of stack in bytes
-        mov     %esi, %eax
-        shr     $24, %eax                 # Keep the flags as part of the error report
-        or      $0x40000000, %eax          # eax = AGESA_WARNING (Stack has already been set up)
-    #.endif
-    0:
-
-    movd        %mm0, %ebx                # Restore return address
-    movd        %mm1, %ebp
-.endm
-
-/*****************************************************************************
-* AMD_DISABLE_STACK:  Destroy the stack inside the cache. This routine
-*                     should only be executed on the BSP
-*
-*   In:
-*       none
-*
-*   Out:
-*       EAX = AGESA_SUCCESS
-*
-*   Preserved:
-*       ebx
-*   Destroyed:
-*       eax, ecx, edx, esp
-*****************************************************************************/
-.macro  AMD_DISABLE_STACK
-
-    mov     %ebx, %esp                    # Save return address
-
-    # get node/core/flags of current executing core
-    GET_NODE_ID_CORE_ID                 # Sets ESI[15,8]= Node#; ESI[7,0]= core# (relative to node)
-#1:	 jmp 1b
-    # Turn on modification enable bit
-    mov     $MTRR_SYS_CFG, %ecx           # MSR:C001_0010
-    _RDMSR
-    bts     $MTRR_FIX_DRAM_MOD_EN, %eax   # Enable modifications
-    _WRMSR
-
-    # Set lower 640K MTRRs for Write-Back memory caching
-    mov     $AMD_MTRR_FIX64k_00000, %ecx
-    mov     $0x1E1E1E1E, %eax
-    mov     %eax, %edx
-    _WRMSR                              # 0 - 512K = WB Mem
-    mov     $AMD_MTRR_FIX16k_80000, %ecx
-    _WRMSR                              # 512K - 640K = WB Mem
-
-    # Turn off modification enable bit
-    mov     $MTRR_SYS_CFG, %ecx           # MSR:C001_0010
-    _RDMSR
-    btr     $MTRR_FIX_DRAM_MOD_EN, %eax   # Disable modification
-    _WRMSR
-
-    AMD_DISABLE_STACK_FAMILY_HOOK       # Re-Enable 'normal' cache operations
-
-    mov     %esp, %ebx
-    xor     %eax, %eax
-
-.endm
-

pi/amd/00730F01/AGESA.h

diff --git a/pi/amd/00730F01/AGESA.h b/pi/amd/00730F01/AGESA.h
deleted file mode 100644
index 8132c61..0000000
--- a/pi/amd/00730F01/AGESA.h
+++ /dev/null
@@ -1,3657 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Agesa structures and definitions
- *
- * Contains AMD AGESA core interface
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Include
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-
-#ifndef _AGESA_H_
-#define _AGESA_H_
-
-#include  "Porting.h"
-#include  "AMD.h"
-
-//
-//
-// AGESA Types and Definitions
-//
-//
-
-// AGESA BASIC CALLOUTS
-#define AGESA_MEM_RELEASE              0x00028000ul
-
-// AGESA ADVANCED CALLOUTS, Processor
-#define AGESA_CHECK_UMA                         0x00028100ul
-#define AGESA_DO_RESET                          0x00028101ul
-#define AGESA_ALLOCATE_BUFFER                   0x00028102ul
-#define AGESA_DEALLOCATE_BUFFER                 0x00028103ul
-#define AGESA_LOCATE_BUFFER                     0x00028104ul
-#define AGESA_RUNFUNC_ONAP                      0x00028105ul
-#define AGESA_PUBLISH_CS_RESTORATION_DATA       0x00028106ul
-
-// AGESA ADVANCED CALLOUTS, Memory
-#define AGESA_READ_SPD                 0x00028140ul
-#define AGESA_HOOKBEFORE_DRAM_INIT     0x00028141ul
-#define AGESA_HOOKBEFORE_DQS_TRAINING  0x00028142ul
-#define AGESA_READ_SPD_RECOVERY        0x00028143ul
-#define AGESA_HOOKBEFORE_EXIT_SELF_REF 0x00028144ul
-#define AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY     0x00028145ul
-#define AGESA_EXTERNAL_2D_TRAIN_VREF_CHANGE     0x00028146ul
-#define AGESA_EXTERNAL_VOLTAGE_ADJUST  0x00028147ul
-
-// AGESA IDS CALLOUTS
-#define AGESA_GET_IDS_INIT_DATA       0x00028200ul
-
-// AGESA GNB CALLOUTS
-#define AGESA_GNB_PCIE_SLOT_RESET      0x00028301ul
-#define AGESA_GNB_GFX_GET_VBIOS_IMAGE  0x00028302ul
-#define AGESA_GNB_PCIE_CLK_REQ         0x00028303ul
-
-// AGESA FCH CALLOUTS
-#define AGESA_FCH_OEM_CALLOUT          0x00028401ul
-
-//-----------------------------------------------------------------------------
-//                     FCH DEFINITIONS AND MACROS
-//
-//-----------------------------------------------------------------------------
-
-/// Configuration values for SdConfig
-typedef enum {
-  SdDisable = 0,                      ///< Disabled
-  SdAmda,                             ///< AMDA,  set 24,18,16,  default
-  SdDma,                              ///< DMA clear 24, 16, set 18
-  SdPio,                              ///< PIO clear 24,18,16
-  SdDump                              ///< SD DUMP, don't touch SD
-} SD_MODE;
-
-/// Configuration values for SdClockControl
-typedef enum {
-  Sd50MhzTraceCableLengthWithinSixInches = 4,           ///< 50Mhz, default
-  Sd40MhzTraceCableLengthSix2ElevenInches = 6,          ///< 40Mhz
-  Sd25MhzTraceCableLengthEleven2TwentyfourInches = 7,   ///< 25Mhz
-} SD_CLOCK_CONTROL;
-
-/// Configuration values for AzaliaController
-typedef enum {
-  AzAuto = 0,                         ///< Auto - Detect Azalia controller automatically
-  AzDisable,                          ///< Diable - Disable Azalia controller
-  AzEnable                            ///< Enable - Enable Azalia controller
-} HDA_CONFIG;
-
-/// Configuration values for IrConfig
-typedef enum {
-  IrDisable  = 0,                     ///< Disable
-  IrRxTx0    = 1,                     ///< Rx and Tx0
-  IrRxTx1    = 2,                     ///< Rx and Tx1
-  IrRxTx0Tx1 = 3                      ///< Rx and both Tx0,Tx1
-} IR_CONFIG;
-
-/// Configuration values for SataClass
-typedef enum {
-  SataNativeIde = 0,                  ///< Native IDE mode
-  SataRaid,                           ///< RAID mode
-  SataAhci,                           ///< AHCI mode
-  SataLegacyIde,                      ///< Legacy IDE mode
-  SataIde2Ahci,                       ///< IDE->AHCI mode
-  SataAhci7804,                       ///< AHCI mode as 7804 ID (AMD driver)
-  SataIde2Ahci7804                    ///< IDE->AHCI mode as 7804 ID (AMD driver)
-} SATA_CLASS;
-
-/// Configuration values for BLDCFG_FCH_GPP_LINK_CONFIG
-typedef enum {
-  PortA4       = 0,                   ///< 4:0:0:0
-  PortA2B2     = 2,                   ///< 2:2:0:0
-  PortA2B1C1   = 3,                   ///< 2:1:1:0
-  PortA1B1C1D1 = 4                    ///< 1:1:1:1
-} GPP_LINKMODE;
-
-/// Configuration values for FchPowerFail
-typedef enum {
-  AlwaysOff   = 0,                    ///< Always power off after power resumes
-  AlwaysOn    = 1,                    ///< Always power on after power resumes
-  UsePrevious = 3,                    ///< Resume to same setting when power fails
-} POWER_FAIL;
-
-
-/// Configuration values for SATA Link Speed
-typedef enum {
-  Gen1   = 1,                         ///< SATA port GEN1 speed
-  Gen2   = 2,                         ///< SATA port GEN2 speed
-  Gen3   = 3,                         ///< SATA port GEN3 speed
-} SATA_SPEED;
-
-
-/// Configuration values for GPIO function
-typedef enum {
-  Function0   = 0,                    ///< GPIO Function 1
-  Function1   = 1,                    ///< GPIO Function 1
-  Function2   = 2,                    ///< GPIO Function 2
-  Function3   = 3,                    ///< GPIO Function 3
-} GPIO_FUN;
-
-/// Configuration values for memory phy voltage (VDDR)
-typedef enum {
-  VOLT0_95,                           ///< VDDR 0.95V
-  VOLT1_05,                           ///< VDDR 1.05V
-  MAX_VDDR                            ///< Maxmum value for this enum definition
-} MEMORY_PHY_VOLTAGE;
-
-/// Configuration values for GPIO_CFG
-typedef enum {
-  OwnedByEc   = 1 << 0,               ///< This bit can only be written by EC
-  OwnedByHost = 1 << 1,               ///< This bit can only be written by host (BIOS)
-  Sticky      = 1 << 2,               ///< If set, [6:3] are sticky
-  PullUpB     = 1 << 3,               ///< 0: Pullup enable; 1: Pullup disabled
-  PullDown    = 1 << 4,               ///< 0: Pulldown disabled; 1: Pulldown enable
-  GpioOutEnB  = 1 << 5,               ///< 0: Output enable; 1: Output disable
-  GpioOut     = 1 << 6,               ///< Output state when GpioOutEnB is 0
-  GpioIn      = 1 << 7,               ///< This bit is read only - current pin state
-} CFG_BYTE;
-
-/// Configuration values for GPIO_CFG2
-typedef enum {
-  DrvStrengthSel_4mA = 0 << 1,               ///< 18:17 DrvStrengthSel.
-  DrvStrengthSel_8mA = 1 << 1,               ///< 18:17 DrvStrengthSel.
-  DrvStrengthSel_12mA = 2 << 1,               ///< 18:17 DrvStrengthSel.
-  DrvStrengthSel_16mA = 3 << 1,               ///< 18:17 DrvStrengthSel.
-  PullUpSel_8K     = 1 << 3,               ///< 19 PullUpSel. Read-write. 0=4 K pull-up is selected. 1=8 K pull-up is selected.
-  PullUpEnable    = 1 << 4,               ///< 20 PullUpEnable. Read-write. 0=Pull-up is disabled on the pin. 1=Pull-up is enabled on the pin.
-  PullDownEnable  = 1 << 5,               ///< 21 PullDownEnable. Read-write. 0=Pull-down is disabled on the pin. 1=Pull-down is enabled on thepin.
-  OutputValue     = 1 << 6,               ///< 22 OutputValue. Read-write. 0=low. 1=high.
-  OutputEnable      = 1 << 7,               ///< 23 OutputEnable. Read-write. 0=Output is disabled on the pin. 1=Output is enabled on the pin.
-} CFG2_BYTE;
-
-/// FCH GPIO CONTROL
-typedef struct {
-  IN         UINT8        GpioPin;               ///< Gpio Pin, valid range: 0-67, 128-150, 160-228
-  IN         GPIO_FUN     PinFunction;           ///< Multi-function selection
-  IN         CFG_BYTE     CfgByte;               ///< GPIO Register value
-} GPIO_CONTROL;
-
-///
-/// FCH SCI MAP CONTROL
-///
-typedef struct {
-  IN         UINT8        InputPin;              ///< Input Pin, valid range 0-63
-  IN         UINT8        GpeMap;                ///< Gpe Map, valid range 0-31
-} SCI_MAP_CONTROL;
-
-///
-/// FCH SATA PHY CONTROL
-///
-typedef struct {
-  IN         BOOLEAN      CommonPhy;             ///< Common PHY or not
-                                      ///<   @li <b>FALSE</b> - Only applied to specified port
-                                      ///<   @li <b>TRUE</b>  - Apply to all SATA ports
-  IN         SATA_SPEED   Gen;                   ///< SATA speed
-  IN         UINT8        Port;                  ///< Port number, valid range: 0-7
-  IN         UINT32       PhyData;               ///< SATA PHY data, valid range: 0-0xFFFFFFFF
-} SATA_PHY_CONTROL;
-
-///
-/// FCH Component Data Structure in InitReset stage
-///
-typedef struct {
-  IN       BOOLEAN      UmiGen2;             ///< Enable Gen2 data rate of UMI
-                                             ///<   @li <b>FALSE</b> - Disable Gen2
-                                             ///<   @li <b>TRUE</b>  - Enable Gen2
-
-  IN       BOOLEAN      SataEnable;          ///< SATA controller function
-                                             ///<   @li <b>FALSE</b> - SATA controller is disabled
-                                             ///<   @li <b>TRUE</b> - SATA controller is enabled
-
-  IN       BOOLEAN      IdeEnable;           ///< SATA IDE controller mode enabled/disabled
-                                             ///<   @li <b>FALSE</b> - IDE controller is disabled
-                                             ///<   @li <b>TRUE</b> - IDE controller is enabled
-
-  IN       BOOLEAN      GppEnable;           ///< Master switch of GPP function
-                                             ///<   @li <b>FALSE</b> - GPP disabled
-                                             ///<   @li <b>TRUE</b> - GPP enabled
-
-  IN       BOOLEAN      Xhci0Enable;         ///< XHCI0 controller function
-                                             ///<   @li <b>FALSE</b> - XHCI0 controller disabled
-                                             ///<   @li <b>TRUE</b> - XHCI0 controller enabled
-
-  IN       BOOLEAN      Xhci1Enable;         ///< XHCI1 controller function
-                                             ///<   @li <b>FALSE</b> - XHCI1 controller disabled
-                                             ///<   @li <b>TRUE</b> - XHCI1 controller enabled
-} FCH_RESET_INTERFACE;
-
-
-///
-/// FCH Component Data Structure from InitEnv stage
-///
-typedef struct {
-  IN       SD_MODE      SdConfig;            ///< Secure Digital (SD) controller mode
-  IN       HDA_CONFIG   AzaliaController;    ///< Azalia HD Audio Controller
-
-  IN       IR_CONFIG    IrConfig;            ///< Infrared (IR) Configuration
-  IN       BOOLEAN      UmiGen2;             ///< Enable Gen2 data rate of UMI
-                                             ///<   @li <b>FALSE</b> - Disable Gen2
-                                             ///<   @li <b>TRUE</b>  - Enable Gen2
-
-  IN       SATA_CLASS   SataClass;           ///< SATA controller mode
-  IN       BOOLEAN      SataEnable;          ///< SATA controller function
-                                             ///<   @li <b>FALSE</b> - SATA controller is disabled
-                                             ///<   @li <b>TRUE</b> - SATA controller is enabled
-
-  IN       BOOLEAN      IdeEnable;           ///< SATA IDE controller mode enabled/disabled
-                                             ///<   @li <b>FALSE</b> - IDE controller is disabled
-                                             ///<   @li <b>TRUE</b> - IDE controller is enabled
-
-  IN       BOOLEAN      SataIdeMode;         ///< Native mode of SATA IDE controller
-                                             ///<   @li <b>FALSE</b> - Legacy IDE mode
-                                             ///<   @li <b>TRUE</b> - Native IDE mode
-
-  IN       BOOLEAN      Ohci1Enable;         ///< OHCI controller #1 Function
-                                             ///<   @li <b>FALSE</b> - OHCI1 is disabled
-                                             ///<   @li <b>TRUE</b> - OHCI1 is enabled
-
-  IN       BOOLEAN      Ohci2Enable;         ///< OHCI controller #2 Function
-                                             ///<   @li <b>FALSE</b> - OHCI2 is disabled
-                                             ///<   @li <b>TRUE</b> - OHCI2 is enabled
-
-  IN       BOOLEAN      Ohci3Enable;         ///< OHCI controller #3 Function
-                                             ///<   @li <b>FALSE</b> - OHCI3 is disabled
-                                             ///<   @li <b>TRUE</b> - OHCI3 is enabled
-
-  IN       BOOLEAN      Ohci4Enable;         ///< OHCI controller #4 Function
-                                             ///<   @li <b>FALSE</b> - OHCI4 is disabled
-                                             ///<   @li <b>TRUE</b> - OHCI4 is enabled
-
-  IN       BOOLEAN      GppEnable;           ///< Master switch of GPP function
-                                             ///<   @li <b>FALSE</b> - GPP disabled
-                                             ///<   @li <b>TRUE</b> - GPP enabled
-
-  IN       POWER_FAIL   FchPowerFail;        ///< FCH power failure option
-} FCH_INTERFACE;
-
-
-/*----------------------------------------------------------------------------
- *   CPU Feature related info
- *----------------------------------------------------------------------------
- */
-/// Build Configuration values for BLDCFG_PLATFORM_CONNECTED_STANDBY_MODE
-typedef enum {
-  ConnectedStandbyAuto     = 0,     ///< Auto
-  ConnectedStandbyDisabled = 1,     ///< Disabled
-  MaxConnectedStandbyMode  = 2      ///< Not a valid value, used for verifying input
-} PLATFORM_CONNECTED_STANDBY_MODES;
-
-/// Build Configuration values for BLDCFG_PLATFORM_CSTATE_MODE
-typedef enum {
-  CStateModeDisabled = 0,           ///< Disabled
-  CStateModeC6       = 1,           ///< C6 State
-  MaxCStateMode      = 2            ///< Not a valid value, used for verifying input
-} PLATFORM_CSTATE_MODES;
-
-/// Build Configuration values for BLDCFG_PLATFORM_CPB_MODE
-typedef enum {
-  CpbModeAuto     = 0,           ///< Auto
-  CpbModeDisabled = 1,           ///< Disabled
-  MaxCpbMode      = 2            ///< Not a valid value, used for verifying input
-} PLATFORM_CPB_MODES;
-
-/// Build Configuration values for BLDCFG_LOW_POWER_PSTATE_FOR_PROCHOT_MODE
-typedef enum {
-  LOW_POWER_PSTATE_FOR_PROCHOT_AUTO      = 0,           ///< Auto
-  LOW_POWER_PSTATE_FOR_PROCHOT_DISABLE   = 1,           ///< Disabled
-  MAX_LOW_POWER_PSTATE_FOR_PROCHOT_MODE  = 2            ///< Not a valid value, used for verifying input
-} PLATFORM_LOW_POWER_PSTATE_MODES;
-
-/// Build Configuration values for BLDCFG_ACPI_PSTATES_PSD_POLICY
-#define PsdPolicyProcessorDefault  0       ///< PSD is dependent or independent per processor default
-#define PsdPolicyDependent         1       ///< PSD is forced dependent
-#define PsdPolicyIndependent       2       ///< PSD is forced independent
-#define PsdPolicyMax               3       ///< Not a valid value, used for verifying input
-
-/*----------------------------------------------------------------------------
- *   GNB PCIe configuration info
- *----------------------------------------------------------------------------
- */
-
-// Event definitions
-
-#define GNB_EVENT_INVALID_CONFIGURATION               0x20010000ul   // User configuration invalid
-#define GNB_EVENT_INVALID_PCIE_TOPOLOGY_CONFIGURATION 0x20010001ul   // Requested lane allocation for PCIe port can not be supported
-#define GNB_EVENT_INVALID_PCIE_PORT_CONFIGURATION     0x20010002ul   // Requested incorrect PCIe port device address
-#define GNB_EVENT_INVALID_DDI_LINK_CONFIGURATION      0x20010003ul   // Incorrect parameter in DDI link configuration
-#define GNB_EVENT_INVALID_LINK_WIDTH_CONFIGURATION    0x20010004ul   // Invalid with for PCIe port or DDI link
-#define GNB_EVENT_INVALID_LANES_CONFIGURATION         0x20010005ul   // Lane double subscribe lanes
-#define GNB_EVENT_INVALID_DDI_TOPOLOGY_CONFIGURATION  0x20010006ul   // Requested lane allocation for DDI link(s) can not be supported
-#define GNB_EVENT_LINK_TRAINING_FAIL                  0x20020000ul   // PCIe Link training fail
-#define GNB_EVENT_BROKEN_LANE_RECOVERY                0x20030000ul   // Broken lane workaround applied to recover link training
-#define GNB_EVENT_GEN2_SUPPORT_RECOVERY               0x20040000ul   // Scale back to GEN1 to recover link training
-
-
-#define DESCRIPTOR_TERMINATE_LIST           0x80000000ull
-#define DESCRIPTOR_IGNORE                   0x40000000ull
-
-/// PCIe link initialization
-typedef enum {
-  EndpointDetect = 0,                                     ///< Detect endpoint presence
-  EndpointNotPresent                                      ///< Endpoint not present (or connected). Used in case there is alternative way to determine
-                                                          ///< if device present on board or in slot. For example GPIO can be used to determine device presence.
-} PCIE_ENDPOINT_STATUS;
-
-
-/// PCIe port misc extended controls
-typedef struct  {
-  IN      UINT8                     LinkComplianceMode :1;  ///< Force port into compliance mode (device will not be trained, port output compliance pattern)
-  IN      UINT8                     LinkSafeMode       :2;  /**< Safe mode PCIe capability. (Parameter may limit PCIe speed requested through PCIe_PORT_DATA::LinkSpeedCapability)
-                                                             *  @li @b 0 - port can advertize muximum supported capability
-                                                             *  @li @b 1 - port limit advertized capability and speed to PCIe Gen1
-                                                             */
-  IN      UINT8                     SbLink             :1;  /**< PCIe link type
-                                                             *  @li @b 0 - General purpose port
-                                                             *  @li @b 1 - Port connected to SB
-                                                             */
-  IN      UINT8                     ClkPmSupport       :1;  /**< Clock Power Management Support
-                                                             *  @li @b 0 - Clock Power Management not configured
-                                                             *  @li @b 1 - Clock Power Management configured according to PCIe device capability
-                                                             */
-} PCIe_PORT_MISC_CONTROL;
-
-/// The IO APIC Interrupt Mapping Info
-typedef struct {
-  IN      UINT8                     GroupMap;               /**< Group mapping for slot or endpoint device (connected to PCIE port) interrupts .
-                                                             *  @li <b>0</b> - IGNORE THIS STRUCTURE AND USE RECOMMENDED SETTINGS
-                                                             *  @li <b>1</b> - mapped to Grp 0 (Interrupts 0..3   of IO APIC redirection table)
-                                                             *  @li <b>2</b> - mapped to Grp 1 (Interrupts 4..7   of IO APIC redirection table)
-                                                             *  @li ...
-                                                             *  @li <b>8</b> - mapped to Grp 7 (Interrupts 28..31 of IO APIC redirection table)
-                                                             */
-  IN      UINT8                     Swizzle;                /**< Swizzle interrupt in the Group.
-                                                             *  @li <b>0</b> - ABCD
-                                                             *  @li <b>1</b> - BCDA
-                                                             *  @li <b>2</b> - CDAB
-                                                             *  @li <b>3</b> - DABC
-                                                             */
-  IN      UINT8                     BridgeInt;              /**< IOAPIC redirection table entry for PCIE bridge interrupt
-                                                             *  @li <b>0</b>  - Entry 0  of IO APIC redirection table
-                                                             *  @li <b>1</b>  - Entry 1  of IO APIC redirection table
-                                                             *  @li ...
-                                                             *  @li <b>31</b> - Entry 31 of IO APIC redirection table
-                                                             */
-} APIC_DEVICE_INFO;
-
-/// Initial Offset Calibration Control
-typedef enum {
-  ADAPT_IOC_DISABLED = 0,                                     ///< Initial Offset Calibration Disabled
-  ADAPT_IOC_ENABLED                                           ///< Initial Offset Calibration Enabled
-} ADAPT_IOC_CONTROL;
-
-/// DFE Control values
-typedef enum {
-  ADAPT_DFE_CONTROL_DISABLED = 0,                             ///< DFE Disabled
-  ADAPD_DFE_CONTROL_1TAP_DFE = 4,                             ///< 1-tap DFE
-  ADAPD_DFE_CONTROL_1TAP_DFE_FBF,                             ///< 1-tap DFE with Future Bit Filtering
-  ADAPD_DFE_CONTROL_2TAP_DFE,                                ///< 2-tap DFE
-  ADAPD_DFE_CONTROL_2TAP_DFE_FBF                              ///< 2-tap DFE with Future Bit Filtering
-} ADAPT_DFE_CONTROL;
-
-/// LEQ Control values
-typedef enum {
-  ADAPT_LEQ_CONTROL_DISABLED = 0,                              ///< LEQ Disabled
-  ADAPT_LEQ_CONTROL_DC_GAIN  = 2,                              ///< DC Gain Adaptation
-  ADAPT_LEQ_CONTROL_DC_GAIN_POLE                               ///< DC Gain and Pole Adaptation
-} ADAPT_LEQ_CONTROL;
-
-/// Dynamic Offset Calibration Control
-typedef enum {
-  ADAPT_DOC_DISABLED = 0,                                      ///< Dynamic Offset Calibration Disabled
-  ADAPT_DOC_ENABLED                                            ///< Dynamic Offset Calibration Enabled
-} ADAPT_DOC_CONTROL;
-
-/// FOM Calculation Control
-typedef enum {
-  ADAPT_FOMC_DISABLED = 0,                                    ///< FOM Calculation Disabled
-  ADAPT_FOMC_ENABLED                                          ///< FOM Calculation Enabled
-} ADAPT_FOMC_CONTROL;
-
-/// PI Offset Calibration Control
-typedef enum {
-  ADAPT_PIOC_DISABLED = 0,                                    ///< PI Offset Calibration Disabled
-  ADAPT_PIOC_ENABLED                                          ///< PI Offset Calibration Enabled
-} ADAPT_PIOC_CONTROL;
-
-/// GEN3 RxAdaptMode Configuration Structure
-typedef struct {
-  IN      BOOLEAN                InitOffsetCancellation;     ///< Initial Offset Cancellation Enable
-  IN      UINT8                  DFEControl;                 ///< DFE Control
-  IN      UINT8                  LEQControl;                 ///< LEQ Control
-  IN      BOOLEAN                DynamicOffsetCalibration;   ///< Dynamic Offset Calibration Enable
-  IN      BOOLEAN                FOMCalculation;             ///< FOM Calculation Enable
-  IN      BOOLEAN                PIOffsetCalibration;        ///< PI Offset Calibratino Enable
-} RX_ADAPT_MODE;
-
-/// PCIe port configuration data
-typedef struct  {
-  IN       UINT8                   PortPresent;              ///< Enable PCIe port for initialization.
-  IN       UINT8                   ChannelType;              /**< Channel type.
-                                                               *  @li @b 0 - "lowLoss",
-                                                               *  @li @b 1 - "highLoss",
-                                                               *  @li @b 2 - "mob0db",
-                                                               *  @li @b 3 - "mob3db",
-                                                               *  @li @b 4 - "extnd6db"
-                                                               *  @li @b 5 - "extnd8db"
-                                                               */
-  IN       UINT8                   DeviceNumber;             /**< PCI Device number for port.
-                                                               *   @li @b 0 - Native port device number
-                                                               *   @li @b N - Port device number (See available configurations in BKDG
-                                                               */
-  IN       UINT8                   FunctionNumber;           ///< Reserved for future use
-  IN       UINT8                   LinkSpeedCapability;      /**< PCIe link speed/
-                                                               *  @li @b 0 - Maximum supported by silicon
-                                                               *  @li @b 1 - Gen1
-                                                               *  @li @b 2 - Gen2
-                                                               *  @li @b 3 - Gen3
-                                                               */
-  IN       UINT8                   LinkAspm;                 /**< ASPM control. (see AgesaPcieLinkAspm for additional option to control ASPM)
-                                                               *  @li @b 0 - Disabled
-                                                               *  @li @b 1 - L0s only
-                                                               *  @li @b 2 - L1 only
-                                                               *  @li @b 3 - L0s and L1
-                                                               */
-  IN       UINT8                   LinkHotplug;              /**< Hotplug control.
-                                                               *  @li @b 0 - Disabled
-                                                               *  @li @b 1 - Basic
-                                                               *  @li @b 2 - Server
-                                                               *  @li @b 3 - Enhanced
-                                                               */
-  IN       UINT8                   ResetId;                  /**< Arbitrary number greater than 0 assigned by platform firmware for GPIO
-                                                               *   identification which control reset for given port.
-                                                               *   Each port with unique GPIO should have unique ResetId assigned.
-                                                               *   All ports use same GPIO to control reset should have same ResetId assigned.
-                                                               *   see AgesaPcieSlotResetContol.
-                                                               */
-  IN       PCIe_PORT_MISC_CONTROL  MiscControls;             ///< Misc extended controls
-  IN       APIC_DEVICE_INFO        ApicDeviceInfo;           ///< IOAPIC device programming info
-  IN       PCIE_ENDPOINT_STATUS    EndpointStatus;           ///< PCIe endpoint (device connected to PCIe port) status
-  IN       RX_ADAPT_MODE           RxAdaptMode;              ///< Gen3 RxAdaptMode configuration
-} PCIe_PORT_DATA;
-
-/// DDI channel lane mapping
-typedef struct {                                          ///< Structure that discribe lane mapping
-  IN      UINT8              Lane0   :2;                  /**< Lane 0 mapping
-                                                           *  @li @b 0 - Map to lane 0
-                                                           *  @li @b 1 - Map to lane 1
-                                                           *  @li @b 2 - Map to lane 2
-                                                           *  @li @b 3 - Map to lane 3
-                                                           */
-  IN      UINT8              Lane1   :2;                  ///< Lane 1 mapping (see "Lane 0 mapping")
-  IN      UINT8              Lane2   :2;                  ///< Lane 2 mapping (see "Lane 0 mapping")
-  IN      UINT8              Lane3   :2;                  ///< Lane 3 mapping (see "Lane 0 mapping")
-} CHANNEL_MAPPING;                                        ///< Lane mapping
-
-/// Common Channel Mapping
-typedef union {
-  IN      UINT8                ChannelMappingValue;       ///< Raw lane mapping
-  IN      CHANNEL_MAPPING      ChannelMapping;            ///< Channel mapping
-} CONN_CHANNEL_MAPPING;
-
-/// DDI Configuration data
-typedef struct  {
-  IN       UINT8                ConnectorType;            /**< Display Connector Type
-                                                            *  @li @b 0 - DP
-                                                            *  @li @b 1 - eDP
-                                                            *  @li @b 2 - Single Link DVI-D
-                                                            *  @li @b 3 - Dual  Link DVI-D (see @ref DualLinkDviDescription "Example Dual Link DVI connector description")
-                                                            *  @li @b 4 - HDMI
-                                                            *  @li @b 5 - DP-to-VGA
-                                                            *  @li @b 6 - DP-to-LVDS
-                                                            *  @li @b 7 - Hudson-2 NutMeg DP-to-VGA
-                                                            *  @li @b 8 - Single Link DVI-I
-                                                            *  @li @b 9 - Native CRT (Family 0x14)
-                                                            *  @li @b 10 - Native LVDS (Family 0x14)
-                                                            *  @li @b 11 - Auto detect LCD panel connector type. VBIOS is able to auto detect the LVDS connector type: native LVDS, eDP or DP-to-LVDS
-                                                            *              The auto detection method only support panel with EDID.
-                                                            */
-  IN       UINT8                AuxIndex;                 /**< Indicates which AUX or DDC Line is used
-                                                            *  @li @b 0 - AUX1
-                                                            *  @li @b 1 - AUX2
-                                                            *  @li @b 2 - AUX3
-                                                            *  @li @b 3 - AUX4
-                                                            *  @li @b 4 - AUX5
-                                                            *  @li @b 5 - AUX6
-                                                            */
-  IN       UINT8                HdpIndex;                 /**< Indicates which HDP pin is used
-                                                            *  @li @b 0 - HDP1
-                                                            *  @li @b 1 - HDP2
-                                                            *  @li @b 2 - HDP3
-                                                            *  @li @b 3 - HDP4
-                                                            *  @li @b 4 - HDP5
-                                                            *  @li @b 5 - HDP6
-                                                            */
-  IN       CONN_CHANNEL_MAPPING Mapping[2];               /**< Set specific mapping of lanes to connector pins
-                                                            *  @li Mapping[0] define mapping for group of 4 lanes starting at PCIe_ENGINE_DATA.StartLane
-                                                            *  @li Mapping[1] define mapping for group of 4 lanes ending at PCIe_ENGINE_DATA.EndLane (only applicable for Dual DDI link)
-                                                            *  if Mapping[x] set to 0 than default mapping assumed
-                                                            */
-  IN       UINT8                LanePnInversionMask;      /**< Specifies whether to invert the state of P and N for each lane. Each bit represents a PCIe lane on the DDI port.
-                                                            *  @li 0 - Do not invert (default)
-                                                            *  @li 1 - Invert P and N on this lane
-                                                            */
-  IN       UINT8                Flags;                    /**< Capabilities flags
-                                                            *  @li Flags bit[0] DDI_DATA_FLAGS_DP1_1_ONLY Selects downgrade PHY link to DP1.1
-                                                            *  @li Flags bit[7:1] Reserved
-                                                            */
-} PCIe_DDI_DATA;
-
-/// Engine Configuration
-typedef struct {
-  IN       UINT8                EngineType;               /**< Engine type
-                                                           *  @li @b 0 -  Ignore engine configuration
-                                                           *  @li @b 1 -  PCIe port
-                                                           *  @li @b 2 -  DDI
-                                                           */
-  IN       UINT16               StartLane;                /**< Start Lane ID (in reversed configuration StartLane > EndLane)
-                                                           * Refer to lane descriptions and supported configurations in BKDG
-                                                           */
-  IN       UINT16               EndLane;                  /**< End lane ID (in reversed configuration StartLane > EndLane)
-                                                           * Refer to lane descriptions and supported configurations in BKDG
-                                                           */
-
-} PCIe_ENGINE_DATA;
-
-/// PCIe port descriptor
-typedef struct {
-  IN       UINT32               Flags;                    /**< Descriptor flags
-                                                           * @li @b Bit31 - last descriptor in complex
-                                                           */
-  IN       PCIe_ENGINE_DATA     EngineData;               ///< Engine data
-  IN       PCIe_PORT_DATA       Port;                     ///< PCIe port specific configuration info
-} PCIe_PORT_DESCRIPTOR;
-
-/// DDI descriptor
-typedef struct {
-  IN       UINT32               Flags;                    /**< Descriptor flags
-                                                           * @li @b Bit31 - last descriptor in complex
-                                                           */
-  IN       PCIe_ENGINE_DATA     EngineData;               ///< Engine data
-  IN       PCIe_DDI_DATA        Ddi;                      ///< DDI port specific configuration info
-} PCIe_DDI_DESCRIPTOR;
-
-/// PCIe Complex descriptor
-typedef struct {
-  IN       UINT32               Flags;                    /**< Descriptor flags
-                                                           * @li @b Bit31 - last descriptor in topology
-                                                           */
-  IN       UINT32               SocketId;                 ///< Socket Id
-  IN       const PCIe_PORT_DESCRIPTOR *PciePortList;      ///< Pointer to array of PCIe port descriptors or NULL (Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST).
-  IN       const PCIe_DDI_DESCRIPTOR  *DdiLinkList;       ///< Pointer to array DDI link descriptors (Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST).
-  IN       VOID                 *Reserved;                ///< Reserved for future use
-} PCIe_COMPLEX_DESCRIPTOR;
-
-/// Action to control PCIe slot reset
-typedef enum {
-  AssertSlotReset,                                        ///< Assert slot reset
-  DeassertSlotReset                                       ///< Deassert slot reset
-} PCIE_RESET_CONTROL;
-
-///Slot Reset Info
-typedef struct {
-  IN      AMD_CONFIG_PARAMS     StdHeader;                ///< Standard configuration header
-  IN      UINT8                 ResetId;                  ///< Slot reset ID as specified in PCIe_PORT_DESCRIPTOR
-  IN      UINT8                 ResetControl;             ///< Reset control as in PCIE_RESET_CONTROL
-} PCIe_SLOT_RESET_INFO;
-
-#define GFX_VBIOS_IMAGE_FLAG_SPECIAL_POST  0x1
-
-///VBIOS image info
-typedef struct {
-  IN      AMD_CONFIG_PARAMS     StdHeader;                ///< Standard configuration header
-  OUT     VOID                  *ImagePtr;                ///< Pointer to VBIOS image
-  IN      PCI_ADDR              GfxPciAddress;            ///< PCI address of integrated graphics controller
-  IN      UINT32                Flags;                    ///< BIT[0] - special repost requred
-} GFX_VBIOS_IMAGE_INFO;
-
-/// Engine descriptor type
-typedef enum {
-  PcieUnusedEngine = 0,                                   ///< Unused descriptor
-  PciePortEngine = 1,                                     ///< PCIe port
-  PcieDdiEngine = 2,                                      ///< DDI
-  MaxPcieEngine                                           ///< Max engine type for boundary check.
-} PCIE_ENGINE_TYPE;
-
-/// PCIe link capability/speed
-typedef enum  {
-  PcieGenMaxSupported,                                    ///< Maximum supported
-  PcieGen1 = 1,                                           ///< Gen1
-  PcieGen2,                                               ///< Gen2
-  PcieGen3,                                               ///< Gen3
-  MaxPcieGen                                              ///< Max Gen for boundary check
-} PCIE_LINK_SPEED_CAP;
-
-/// PCIe PSPP Power policy
-typedef enum  {
-  PsppDisabled,                                           ///< PSPP disabled
-  PsppPerformance = 1,                                    ///< Performance
-  PsppBalanceHigh,                                        ///< Balance-High
-  PsppBalanceLow,                                         ///< Balance-Low
-  PsppPowerSaving,                                        ///< Power Saving
-  MaxPspp                                                 ///< Max Pspp for boundary check
-} PCIE_PSPP_POLICY;
-
-/// DDI display connector type
-typedef enum {
-  ConnectorTypeDP,                                        ///< DP
-  ConnectorTypeEDP,                                       ///< eDP
-  ConnectorTypeSingleLinkDVI,                             ///< Single Link DVI-D
-  ConnectorTypeDualLinkDVI,                               ///< Dual  Link DVI-D
-  ConnectorTypeHDMI,                                      ///< HDMI
-  ConnectorTypeDpToVga,                                   ///< DP-to-VGA
-  ConnectorTypeDpToLvds,                                  ///< DP-to-LVDS
-  ConnectorTypeNutmegDpToVga,                             ///< Hudson-2 NutMeg DP-to-VGA
-  ConnectorTypeSingleLinkDviI,                            ///< Single Link DVI-I
-  ConnectorTypeCrt,                                       ///< CRT (VGA)
-  ConnectorTypeLvds,                                      ///< LVDS
-  ConnectorTypeEDPToLvds,                                 ///< 3rd party common eDP-to-LVDS translator chip without AMD SW init
-  ConnectorTypeEDPToLvdsSwInit,                           ///< 3rd party eDP-to-LVDS translator which requires AMD SW init
-  ConnectorTypeAutoDetect,                                ///< VBIOS auto detect connector type (native LVDS, eDP or DP-to-LVDS)
-  MaxConnectorType                                        ///< Not valid value, used to verify input
-} PCIE_CONNECTOR_TYPE;
-
-/// PCIe link channel type
-typedef enum {
-  ChannelTypeLowLoss,                                     ///< Low Loss
-  ChannelTypeHighLoss,                                    ///< High Loss
-  ChannelTypeMob0db,                                      ///< Mobile 0dB
-  ChannelTypeMob3db,                                      ///< Mobile 3dB
-  ChannelTypeExt6db,                                      ///< Extended 6dB
-  ChannelTypeExt8db,                                      ///< Extended 8dB
-  MaxChannelType                                          ///< Not valid value, used to verify input
-} PCIE_CHANNEL_TYPE;
-
-/// PCIe link ASPM
-typedef enum {
-  AspmDisabled,                                           ///< Disabled
-  AspmL0s,                                                ///< PCIe L0s link state
-  AspmL1,                                                 ///< PCIe L1 link state
-  AspmL0sL1,                                              ///< PCIe L0s & L1 link state
-  MaxAspm                                                 ///< Not valid value, used to verify input
-} PCIE_ASPM_TYPE;
-
-/// PCIe link hotplug support
-typedef enum {
-  HotplugDisabled,                                        ///< Hotplug disable
-  HotplugBasic,                                           ///< Basic Hotplug
-  HotplugServer,                                          ///< Server Hotplug
-  HotplugEnhanced,                                        ///< Enhanced
-  HotplugInboard,                                         ///< Inboard
-  MaxHotplug                                              ///< Not valid value, used to verify input
-} PCIE_HOTPLUG_TYPE;
-
-/// PCIe link initialization
-typedef enum {
-  PortDisabled,                                           ///< Disable
-  PortEnabled                                             ///< Enable
-} PCIE_PORT_ENABLE;
-
-/// PCIe ACS capability - Access Control Services
-typedef enum  {
-  PcieAcsDisabled,                                        ///< Disabled
-  PcieAcsEnabled,                                         ///< Enabled
-} PCIE_ACS_CAP;
-
-/// PCIe ClkPmSupport initialization
-typedef enum {
-  ClkPmSupportDisabled,                                   ///< Disable
-  ClkPmSupportEnabled                                     ///< Enable
-} CLKPM_SUPPORT_ENABLE;
-
-/// DDI Aux channel
-typedef enum {
-  Aux1,                                                   ///< Aux1
-  Aux2,                                                   ///< Aux2
-  Aux3,                                                   ///< Aux3
-  Aux4,                                                   ///< Aux4
-  Aux5,                                                   ///< Aux5
-  Aux6,                                                   ///< Aux6
-  MaxAux                                                  ///< Not valid value, used to verify input
-} PCIE_AUX_TYPE;
-
-/// DDI Hdp Index
-typedef enum {
-  Hdp1,                                                   ///< Hdp1
-  Hdp2,                                                   ///< Hdp2
-  Hdp3,                                                   ///< Hdp3
-  Hdp4,                                                   ///< Hdp4
-  Hdp5,                                                   ///< Hdp5
-  Hdp6,                                                   ///< Hdp6
-  MaxHdp                                                  ///< Not valid value, used to verify input
-} PCIE_HDP_TYPE;
-
-/// PCIe_DDI_DATA.Flags definitions
-#define DDI_DATA_FLAGS_DP1_1_ONLY   0x01                  ///< BIT[0] Selects downgrade PHY link to DP1.1
-#define EXT_DISPLAY_PATH_CAPS_DP_FIXED_VS_EN 0x02         ///< BIT[1] VBIOS will always output fixed voltage swing during DP link training
-/// DP receiver definitions with fixed voltage swing
-typedef enum {
-  DP_VS_0_4V_0DB,                                         ///< 0x00
-  DP_VS_0_6V_0DB,                                         ///< 0x01
-  DP_VS_0_8V_0DB,                                         ///< 0x02
-  DP_VS_1_2V_0DB,                                         ///< 0x03
-  DP_VS_0_4V_3_5DB = 0x8,                                 ///< 0x08
-  DP_VS_0_6V_3_5DB,                                       ///< 0x09
-  DP_VS_0_8V_3_5DB,                                       ///< 0x0a
-  DP_VS_0_4V_6DB = 0x10,                                  ///< 0x10
-  DP_VS_0_6V_6DB,                                         ///< 0x11
-  DP_VS_0_4V_9_5DB = 0x18                                 ///< 0x18
-} DP_FIXED_VOLT_SWING_TYPE;
-
-// Macro for statically initializing various structures
-#define  PCIE_ENGINE_DATA_INITIALIZER(mType, mStartLane, mEndLane) {mType, mStartLane, mEndLane}
-#define  PCIE_PORT_DATA_INITIALIZER(mPortPresent, mChannelType, mDevAddress, mHotplug, mMaxLinkSpeed, mMaxLinkCap, mAspm, mResetId) \
-{mPortPresent, mChannelType, mDevAddress, 0, mMaxLinkSpeed, mAspm, mHotplug, mResetId, {0, mMaxLinkCap, 0, 0}, {0, 0, 0}, EndpointDetect, \
-{ADAPT_IOC_ENABLED, ADAPT_DFE_CONTROL_DISABLED, ADAPT_LEQ_CONTROL_DC_GAIN_POLE, ADAPT_DOC_DISABLED, ADAPT_FOMC_ENABLED, ADAPT_PIOC_DISABLED}}
-#define  PCIE_PORT_DATA_INITIALIZER_V2(mPortPresent, mChannelType, mDevAddress, mDevFunction, mHotplug, mMaxLinkSpeed, mMaxLinkCap, mAspm, mResetId, mClkPmSupport) \
-{mPortPresent, mChannelType, mDevAddress, mDevFunction, mMaxLinkSpeed, mAspm, mHotplug, mResetId, {0, mMaxLinkCap, 0, mClkPmSupport}, {0, 0, 0}, EndpointDetect, \
-{ADAPT_IOC_ENABLED, ADAPT_DFE_CONTROL_DISABLED, ADAPT_LEQ_CONTROL_DC_GAIN_POLE, ADAPT_DOC_DISABLED, ADAPT_FOMC_ENABLED, ADAPT_PIOC_DISABLED}}
-#define  PCIE_PORT_DATA_INITIALIZER_GEN3(mPortPresent, mChannelType, mDevAddress, mDevFunction, mHotplug, mMaxLinkSpeed, mMaxLinkCap, mAspm, mResetId, mClkPmSupport, \
-mInitOffsetCancellation, mDFEControl, mLEQControl, mDynamicOffsetCalibration, mFOMCalculation, mPIOffsetCalibration) \
-{mPortPresent, mChannelType, mDevAddress, mDevFunction, mMaxLinkSpeed, mAspm, mHotplug, mResetId, {0, mMaxLinkCap, 0, mClkPmSupport}, {0, 0, 0}, EndpointDetect, \
-{mInitOffsetCancellation, mDFEControl, mLEQControl, mDynamicOffsetCalibration, mFOMCalculation, mPIOffsetCalibration}}
-#define  PCIE_DDI_DATA_INITIALIZER(mConnectorType, mAuxIndex, mHpdIndex ) \
-{mConnectorType, mAuxIndex, mHpdIndex, {{0}, {0}}, 0, 0}
-#define  PCIE_DDI_DATA_INITIALIZER_V1(mConnectorType, mAuxIndex, mHpdIndex, mMapping0, mMapping1, mPNInversion) \
-{mConnectorType, mAuxIndex, mHpdIndex, {mMapping0, mMapping1}, mPNInversion, 0}
-#define  PCIE_DDI_DATA_INITIALIZER_V2(mConnectorType, mAuxIndex, mHpdIndex, mMapping0, mMapping1, mPNInversion, mFlags) \
-{mConnectorType, mAuxIndex, mHpdIndex, {mMapping0, mMapping1}, mPNInversion, mFlags}
-
-///IOMMU requestor ID
-typedef struct {
-  IN       UINT16     Bus       :8;                                ///< Bus
-  IN       UINT16     Device    :5;                                ///< Device
-  IN       UINT16     Function  :3;                                ///< Function
-} IOMMU_REQUESTOR_ID;
-
-/// IVMD exclusion range descriptor
-typedef struct {
-  IN       UINT32               Flags;                    /**< Descriptor flags
-                                                           * @li @b Flags[31] - Terminate descriptor array.
-                                                           * @li @b Flags[30] - Ignore descriptor.
-                                                           */
-  IN       IOMMU_REQUESTOR_ID   RequestorIdStart;         ///< Requestor ID start
-  IN       IOMMU_REQUESTOR_ID   RequestorIdEnd;           ///< Requestor ID end (use same as start for single ID)
-  IN       UINT64               RangeBaseAddress;         ///< Phisical base address of exclusion range
-  IN       UINT64               RangeLength;              ///< Length of exclusion range in bytes
-} IOMMU_EXCLUSION_RANGE_DESCRIPTOR;
-
-/*----------------------------------------------------------------------------
- *   GNB configuration info
- *----------------------------------------------------------------------------
- */
-
-/// LVDS Misc Control Field
-typedef struct {
-  IN  UINT8     FpdiMode:1;          ///< This item configures LVDS 888bit panel mode
-                                     ///< @li FALSE = LVDS 888 panel in LDI mode
-                                     ///< @li TRUE =  LVDS 888 panel in FPDI mode
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_888_FPDI_MODE}
-  IN  UINT8     DlChSwap:1;          ///< This item configures LVDS panel lower and upper link mapping
-                                     ///< @li FALSE = Lower link and upper link not swap
-                                     ///< @li TRUE = Lower link and upper link are swapped
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_DL_CH_SWAP}
-  IN  UINT8     VsyncActiveLow:1;    ///< This item configures polarity of frame pulse encoded in lvds data stream
-                                     ///< @li FALSE = Active high Frame Pulse/Vsync
-                                     ///< @li TRUE = Active low Frame Pulse/Vsync
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_VSYNC_ACTIVE_LOW}
-  IN  UINT8     HsyncActiveLow:1;    ///< This item configures polarity of line pulse encoded in lvds data
-                                     ///< @li FALSE = Active high Line Pulse
-                                     ///< @li TRUE = Active low Line Pulse / Hsync
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_HSYNC_ACTIVE_LOW}
-  IN  UINT8     BLONActiveLow:1;     ///< This item configures polarity of signal sent to digital BLON output pin
-                                     ///< @li FALSE = Not inverted(active high)
-                                     ///< @li TRUE = Inverted (active low)
-                                     ///< @BldCfgItem{BLDCFG_LVDS_MISC_BLON_ACTIVE_LOW}
-  IN  UINT8     LvdsVoltOverwriteEn:1;  ///< This item configures polarity of DP-to-LVDS output voltage overwrite
-                                        ///< @li FALSE = DP-to-LVDS output voltage overwrite disable, use VBIOS default setting.
-                                        ///< @li TRUE = Use ucLVDSVolAdjust value to program register LVDS_CTRL_4
-                                        ///< @BldCfgItem{BLDCFG_LVDS_MISC_VOLT_OVERWRITE_ENABLE}
-  IN  UINT8     Reserved:2;          ///< Reserved
-} LVDS_MISC_CONTROL_FIELD;
-
-/// LVDS Misc Control
-typedef union _LVDS_MISC_CONTROL {
-  IN LVDS_MISC_CONTROL_FIELD Field;  ///< LVDS_MISC_CONTROL_FIELD
-  IN UINT8   Value;                  ///< LVDS Misc Control Value
-} LVDS_MISC_CONTROL;
-
-/// Display Misc Control Field
-typedef struct {
-  IN  UINT8     Reserved1:3;                  ///< Reserved
-  IN  UINT8     VbiosFastBootEn:1;            ///< This item configures VBIOS skip display device detection in every set mode if LCD panel is connect and LID is open.
-                                              ///< @li FALSE = VBIOS fast boot is disable.
-                                              ///< @li TRUE = VBIOS fast boot is enable.
-                                              ///< @BldCfgItem{BLDCFG_DISPLAY_MISC_VBIOS_FAST_BOOT_ENABLE}
-  IN  UINT8     Reserved2:4;                  ///< Reserved
-} DISPLAY_MISC_CONTROL_FIELD;
-
-/// LVDS Misc Control
-typedef union _DISPLAY_MISC_CONTROL {
-  IN DISPLAY_MISC_CONTROL_FIELD Field;  ///< DISPLAY_MISC_CONTROL_FIELD
-  IN UINT8   Value;                     ///< Display Misc Control Value
-} DISPLAY_MISC_CONTROL;
-
-/// POST Configuration settings for GNB.
-typedef struct {
-  IN UINT8       IgpuEnableDisablePolicy;   ///< This item defines the iGPU Enable/Disable policy
-                                            ///< @li 0 = Auto - use existing default -
-                                            ///< @li 1 = Disable iGPU if any PCIe/PCI graphics card present
-                                            ///< @BldCfgItem{BLDCFG_IGPU_ENABLE_DISABLE_POLICY}
-} GNB_POST_CONFIGURATION;
-
-/// iGPU Enable/Disable Policy values
-#define IGPU_DISABLE_AUTO        0        ///< Auto setting - disable iGPU if ANY PCI graphics or non-AMD PCIe graphics
-#define IGPU_DISABLE_ANY_PCIE    1        ///< Disable iGPU if any PCI or PCIE graphics card is present
-
-/// ENV Configuration settings for GNB.
-typedef struct {
-  IN  UINT8     Gnb3dStereoPinIndex;      ///< 3D Stereo Pin ID.
-                                          ///< @li 0 = Stereo 3D is disabled (default).
-                                          ///< @li 1 = Use processor pin HPD1.
-                                          ///< @li 2 = Use processor pin HPD2
-                                          ///< @li 3 = Use processor pin HPD3
-                                          ///< @li 4 = Use processor pin HPD4
-                                          ///< @li 5 = Use processor pin HPD5
-                                          ///< @li 6 = Use processor pin HPD6
-                                          ///< @BldCfgItem{BLDCFG_STEREO_3D_PINOUT}
-  IN  BOOLEAN    IommuSupport;            ///< IOMMU support.
-                                          ///< @li FALSE = Disabled. Disable and hide IOMMU device.
-                                          ///< @li TRUE  = Initialize IOMMU subsystem. Generate ACPI IVRS table.
-                                          ///< BldCfgItem{BLDCFG_IOMMU_SUPPORT}
-  IN  UINT16     LvdsSpreadSpectrum;      ///< Spread spectrum value in 0.01 %
-                                          ///< BldCfgItem{BLDCFG_GFX_LVDS_SPREAD_SPECTRUM}
-  IN  UINT16     LvdsSpreadSpectrumRate;  ///< Spread spectrum frequency used by SS hardware logic in unit of 10Hz, 0 - default frequency 40kHz
-                                          ///< BldCfgItem{BLDCFG_GFX_LVDS_SPREAD_SPECTRUM_RATE}
-  IN  UINT8      LvdsPowerOnSeqDigonToDe;    ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_DIGON_TO_DE}
-  IN  UINT8      LvdsPowerOnSeqDeToVaryBl;   ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_DE_TO_VARY_BL}
-  IN  UINT8      LvdsPowerOnSeqDeToDigon;    ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_DE_TO_DIGON}
-  IN  UINT8      LvdsPowerOnSeqVaryBlToDe;   ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWERS_ON_SEQ_VARY_BL_TO_DE}
-  IN  UINT8      LvdsPowerOnSeqOnToOffDelay; ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_ON_TO_OFF_DELAY}
-  IN  UINT8      LvdsPowerOnSeqVaryBlToBlon; ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_VARY_BL_TO_BLON}
-  IN  UINT8      LvdsPowerOnSeqBlonToVaryBl; ///< This item configures panel initialization timing.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_POWER_ON_SEQ_BLON_TO_VARY_BL}
-  IN  UINT16     LvdsMaxPixelClockFreq;      ///< This item configures the maximum pixel clock frequency supported.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_MAX_PIXEL_CLOCK_FREQ}
-  IN  UINT32     LcdBitDepthControlValue;    ///< This item configures the LCD bit depth control settings.
-                                             ///< @BldCfgItem{BLDCFG_LCD_BIT_DEPTH_CONTROL_VALUE}
-  IN  UINT8      Lvds24bbpPanelMode;         ///< This item configures the LVDS 24 BBP mode.
-                                             ///< @BldCfgItem{BLDCFG_LVDS_24BBP_PANEL_MODE}
-  IN  LVDS_MISC_CONTROL      LvdsMiscControl;///< This item configures LVDS swap/Hsync/Vsync/BLON
-  IN  UINT16     PcieRefClkSpreadSpectrum;   ///< Spread spectrum value in 0.01 %
-                                             ///< @BldCfgItem{BLDCFG_PCIE_REFCLK_SPREAD_SPECTRUM}
-  IN  BOOLEAN    GnbRemoteDisplaySupport;    ///< This item enables Wireless Display Support
-                                             ///< @li TRUE  = Enable Wireless Display Support
-                                             ///< @li FALSE = Disable Wireless Display Support
-                                             ///< @BldCfgItem{BLDCFG_REMOTE_DISPLAY_SUPPORT}
-  IN UINT8       LvdsMiscVoltAdjustment;     ///< Register LVDS_CTRL_4 to adjust LVDS output voltage
-                                             ///< @BldCfgItem{BLDCFG_LVDS_MISC_VOL_ADJUSTMENT}
-  IN DISPLAY_MISC_CONTROL DisplayMiscControl;///< This item configures display misc control
-  IN DP_FIXED_VOLT_SWING_TYPE DpFixedVoltSwingType;///< To indicate fixed voltage swing value
-                                                   ///< @BldCfgItem{BLDCFG_DP_FIXED_VOLT_SWING}
-  IN  UINT32    GpuFrequencyLimit;           ///< GNB GPU Max Frequency(NULL if platform configured)
-                                             ///< @BldCfgItem{BLDCFG_GPU_FREQUENCY_LIMIT}
-} GNB_ENV_CONFIGURATION;
-
-/// Configuration settings for GNB.
-typedef struct {
-  IN  UINT8     iGpuVgaMode;                 ///< VGA resources decoding configuration for iGPU
-                                             ///< @li 0 = iGPU decode all VGA resources (must be primary VGA adapter)
-                                             ///< @li 1 = iGPU will not decode any VGA resources (must be secondary graphics adapter)
-  IN  UINT8     PcieAcsCapability;           ///< Pcie ACS Capability support
-                                             ///< @li 0 = Disabled
-                                             ///< @li 1 = Enabled
-  IN  UINT64    GnbIoapicAddress;            ///< GNB IOAPIC Base Address(NULL if platform configured)
-                                             ///< @BldCfgItem{BLDCFG_GNB_IOAPIC_ADDRESS}
-  IN  UINT8     MaxNumAudioEndpoints;        ///< Max number of audio endpoints
-                                             ///< @BldCfgItem{BLDCFG_MAX_NUM_AUDIO_ENDPOINTS}
-} GNB_MID_CONFIGURATION;
-
-/// GNB configuration info
-typedef struct {
-  IN       const PCIe_COMPLEX_DESCRIPTOR  *PcieComplexList;  /**< Pointer to array of structures describe PCIe topology on each processor package or NULL.
-                                                        * Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST
-                                                        * Example of topology definition for single socket system:
-                                                        * @code
-                                                        *  PCIe_PORT_DESCRIPTOR PortList [] = {
-                                                        *    // Initialize Port descriptor (PCIe port, Lanes 8:15, PCI Device Number 2, ...)
-                                                        *    {
-                                                        *      0,   //Descriptor flags
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 8, 15),
-                                                        *      PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 2, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
-                                                        *    },
-                                                        *    // Initialize Port descriptor (PCIe port, Lanes 16:19, PCI Device Number 3, ...)
-                                                        *    {
-                                                        *      0,   //Descriptor flags
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 16, 19),
-                                                        *      PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 3, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
-                                                        *    },
-                                                        *    // Initialize Port descriptor (PCIe port, Lanes 4, PCI Device Number 4, ...)
-                                                        *    {
-                                                        *      DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate last element of array
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 4, 4),
-                                                        *      PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 4, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
-                                                        *    }
-                                                        *  };
-                                                        *  PCIe_PORT_DESCRIPTOR DdiList [] = {
-                                                        *    // Initialize Ddi descriptor (DDI interface Lanes 24:27, Display Port Connector, ...)
-                                                        *    {
-                                                        *      0,   //Descriptor flags
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1, 0)
-                                                        *    },
-                                                        *    // Initialize Ddi descriptor (DDI interface Lanes 28:31, HDMI, ...)
-                                                        *    {
-                                                        *      DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate last element of array
-                                                        *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 28, 31),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2, 0)
-                                                        *    }
-                                                        *  };
-                                                        * PCIe_COMPLEX_DESCRIPTOR PlatformTopology = {
-                                                        *   DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate complexes list
-                                                        *   0,  //Socket ID
-                                                        *   &PortList[0],
-                                                        *   &DdiList[0],
-                                                        * }
-                                                        * @endcode
-                                                        */
-  IN       UINT8                    PsppPolicy;         /**< PSPP (PCIe Speed Power Policy)
-                                                         *  @li @b 0 - Disabled
-                                                         *  @li @b 1 - Performance
-                                                         *  @li @b 2 - Balance-High
-                                                         *  @li @b 3 - Balance-Low
-                                                         *  @li @b 4 - Power Saving
-                                                         */
-
-} GNB_CONFIGURATION;
-
-/// Late Configuration settings for GNB.
-typedef struct {
-  IN        BOOLEAN                 DockedTdpHeadroom;  ///< Docked TDP headroom
-                                                        ///< @li TRUE  = Enable docked TDP headroom
-                                                        ///< @li FALSE = Disable docked TDP headroom
-                                                        ///< @BldCfgItem{BLDCFG_DOCKED_TDP_HEADROOM}
-  IN        UINT8                   GnbIoapicId;        ///< GNB IOAPIC ID, platform BIOS needs to pass correct id number, default is 0xFF.
-                                                        ///< If BLDCFG_GNB_IOAPIC_ADDRESS == NULL or BLDCFG_IOMMU_SUPPORT == NULL or GnbIoapicId == default(0xFF), AGESA will skip it anyway.
-                                                        ///< @li 0~n = IOAPIC ID number for IVRS which should be matched with MADT
-  IN        UINT8                   FchIoapicId;        ///< Fch IOAPIC ID, platform BIOS needs to pass correct id number, default is 0xFF.
-                                                        ///< If BLDCFG_IOMMU_SUPPORT == NULL or or FchIoapicId == default(0xFF), AGESA will skip it anyway.
-                                                        ///< @li 0~n = IOAPIC ID number for IVRS which should be matched with MADT
-
-} GNB_LATE_CONFIGURATION;
-
-//
-//  MEMORY-SPECIFIC DATA STRUCTURES
-//
-//
-//
-//
-// AGESA MAXIMIUM VALUES
-//
-//   These Max values are used to define array sizes and associated loop
-//   counts in the code.  They reflect the maximum values that AGESA
-//   currently supports and does not necessarily reflect the hardware
-//   capabilities of configuration.
-//
-
-#define MAX_SOCKETS_SUPPORTED   1   ///< Max number of sockets in system
-#define MAX_CHANNELS_PER_SOCKET 4   ///< Max Channels per sockets
-#define MAX_DIMMS_PER_CHANNEL   4   ///< Max DIMMs on a memory channel (independent of platform)
-#define NUMBER_OF_DELAY_TABLES  9   ///< Number of tables defined in CH_DEF_STRUCT.
-                                    ///< Eg: UINT16  *RcvEnDlys;
-                                    ///<     UINT8   *WrDqsDlys;
-                                    ///<     UINT8   *RdDqsDlys;
-                                    ///<     UINT8   *WrDatDlys;
-                                    ///<     UINT8   *RdDqsMinDlys;
-                                    ///<     UINT8   *RdDqsMaxDlys;
-                                    ///<     UINT8   *WrDatMinDlys;
-                                    ///<     UINT8   *WrDatMaxDlys;
-#define NUMBER_OF_FAILURE_MASK_TABLES 1 ///< Number of failure mask tables
-
-#define MAX_PLATFORM_TYPES     16   ///< Platform types per system
-
-#define MCT_TRNG_KEEPOUT_START  0x00004000ul    ///< base [39:8]
-#define MCT_TRNG_KEEPOUT_END    0x00007FFFul    ///< base [39:8]
-#define DATAEYE_VREF_RANGE     31   ///< Number of VREF steps in Data Eye Bitmap
-
-#define UMA_ATTRIBUTE_INTERLEAVE 0x80000000ul   ///< Uma Region is interleaved
-#define UMA_ATTRIBUTE_ON_DCT0    0x40000000ul   ///< UMA resides on memory that belongs to DCT0
-#define UMA_ATTRIBUTE_ON_DCT1    0x20000000ul   ///< UMA resides on memory that belongs to DCT1
-#define UMA_ATTRIBUTE_ON_DCT2    0x10000000ul   ///< UMA resides on memory that belongs to DCT2
-#define UMA_ATTRIBUTE_ON_DCT3    0x08000000ul   ///< UMA resides on memory that belongs to DCT3
-
-typedef UINT8 PSO_TABLE;            ///< Platform Configuration Table
-
-//        AGESA DEFINITIONS
-//
-//        Many of these are derived from the platform and hardware specific definitions
-
-/// EccSymbolSize override value
-#define ECCSYMBOLSIZE_USE_BKDG      0   ///< Use BKDG Recommended Value
-#define ECCSYMBOLSIZE_FORCE_X4      4   ///< Force to x4
-#define ECCSYMBOLSIZE_FORCE_X8      8   ///< Force to x8
-/// CPU Package Type
-#define PT_L1       0                 ///< L1 Package type
-#define PT_M2       1                 ///< AM Package type
-#define PT_S1       2                 ///< S1 Package type
-
-/// Build Configuration values for BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT & BLDCFG_MEMORY_CLOCK_SELECT
-#define DDR400_FREQUENCY  200     ///< DDR 400
-#define DDR533_FREQUENCY  266     ///< DDR 533
-#define DDR667_FREQUENCY  333     ///< DDR 667
-#define DDR800_FREQUENCY  400     ///< DDR 800
-#define DDR1066_FREQUENCY 533     ///< DDR 1066
-#define DDR1333_FREQUENCY 667     ///< DDR 1333
-#define DDR1600_FREQUENCY 800     ///< DDR 1600
-#define DDR1866_FREQUENCY 933     ///< DDR 1866
-#define DDR2100_FREQUENCY 1050    ///< DDR 2100
-#define DDR2133_FREQUENCY 1066    ///< DDR 2133
-#define DDR2400_FREQUENCY 1200    ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
-
-/// Build Configuration values for BLDCFG_TIMING_MODE_SELECT
-#define TIMING_MODE_AUTO     0  ///< Use best rate possible
-#define TIMING_MODE_LIMITED  1  ///< Set user top limit
-#define TIMING_MODE_SPECIFIC 2  ///< Set user specified speed
-
-/// Build Configuration values for BLDCFG_MEMORY_QUADRANK_TYPE
-#define QUADRANK_REGISTERED  0  ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED  1  ///< Quadrank unbuffered DIMM
-
-/// Build Configuration values for BLDCFG_POWER_DOWN_MODE
-#define POWER_DOWN_BY_CHANNEL      0  ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT  1  ///< Chip select power down mode
-#define POWER_DOWN_MODE_AUTO       2  ///< AGESA to select power down mode
-
-/// Build Configuration limit for BLDCFG_GNB_GPU_MAX_FREQUENCY
-#define UNSUPPORTED_GPU_FREQUENCY 901 ///< Highest limit of GPU frequency
-
-/// Structures use to pass system Logical CPU-ID
-typedef struct {
-  IN OUT   UINT64 Family;             ///< Indicates logical ID Family
-  IN OUT   UINT64 Revision;           ///< Indicates logical ID Family
-} CPU_LOGICAL_ID;
-
-/// Structures use to report AMP status
-typedef struct {
-  OUT   BOOLEAN AmpVoltageValid;                 ///< Indicates if Amp voltage is valid
-  OUT   BOOLEAN AmpSupportDetectedButNotEnabled; ///< Indicates if Amp support is detected but not enabled
-  OUT   BOOLEAN AmpSelectedButNotEnabled;        ///< Indicates if Amp is selected but not enabled
-} AMP_STATUS;
-
-/// Normalized Critical Composite Data Eye
-///  Bit 15 represents trained eye Center
-///  Bit 0  represents eye center -15 delay steps
-///  Bit 31 represents eye center +16 delay steps
-///  Offset 0  represents +15 Vref Steps
-///  Offset 31  represents -15 Vref Steps
-typedef UINT32 COMPOSITE_DATAEYE[DATAEYE_VREF_RANGE];
-
-/// Build Configuration values for BLDCFG_AMD_PLATFORM_TYPE
-typedef enum {
-  AMD_PLATFORM_SERVER = 0x8000,     ///< Server
-  AMD_PLATFORM_DESKTOP = 0x10000,   ///< Desktop
-  AMD_PLATFORM_MOBILE = 0x20000,    ///< Mobile
-} AMD_PLATFORM_TYPE;
-
-/// Dram technology type
-typedef enum {
-  DDR2_TECHNOLOGY,        ///< DDR2 technology
-  DDR3_TECHNOLOGY,        ///< DDR3 technology
-  GDDR5_TECHNOLOGY,       ///< GDDR5 technology
-  UNSUPPORTED_TECHNOLOGY, ///< Unsupported technology
-} TECHNOLOGY_TYPE;
-
-/// Low voltage support
-typedef enum {
-  VOLT_INITIAL,              ///< Initial value for VDDIO
-  VOLT1_5,                   ///< 1.5 Volt
-  VOLT1_35,                  ///< 1.35 Volt
-  VOLT1_25,                  ///< 1.25 Volt
-  VOLT_UNSUPPORTED = 0xFF    ///< No common voltage found
-} DIMM_VOLTAGE;
-
-/// AMP voltage support
-typedef enum {
-  AMP_VOLT_RSVD,             ///< Reserved
-  AMP_VOLT1_5,               ///< 1.5 Volt
-  AMP_VOLT1_55,              ///< 1.55 Volt
-  AMP_VOLT1_6,               ///< 1.6 Volt
-  AMP_VOLT1_65,              ///< 1.65 Volt
-  AMP_VOLT1_7,               ///< 1.7 Volt
-  AMP_VOLT1_75,              ///< 1.75 Volt
-  AMP_VOLT1_8,               ///< 1.8 Volt
-  AMP_VOLT1_85,              ///< 1.85 Volt
-  AMP_VOLT1_9,               ///< 1.9 Volt
-  AMP_VOLT1_45 = 0x10,       ///< 1.45 Volt
-  AMP_VOLT1_4  = 0x20,       ///< 1.4 Volt
-  AMP_VOLT1_35 = 0x30,       ///< 1.35 Volt
-  AMP_VOLT1_3  = 0x40,       ///< 1.3 Volt
-  AMP_VOLT1_25 = 0x50,       ///< 1.25 Volt
-  AMP_VOLT1_2  = 0x60        ///< 1.2 Volt
-} AMP_DIMM_VOLTAGE;
-
-/// Build Configuration values for BLDCFG_ACP_SIZE
-typedef enum {
-  NO_ACP_SIZE = 0x00,        ///< NO ACP
-  ACP_SIZE_2MB = 0x20,       ///< UMA 4MB aligned
-  ACP_SIZE_4MB = 0x40,       ///< UMA 128MB aligned
-} ACP_SIZE;
-
-/// UMA Mode
-typedef enum {
-  UMA_NONE = 0,              ///< UMA None
-  UMA_SPECIFIED = 1,         ///< UMA Specified
-  UMA_AUTO = 2               ///< UMA Auto
-} UMA_MODE;
-
-/// Force Training Mode
-typedef enum {
-  FORCE_TRAIN_1D = 0,              ///< 1D Training only
-  FORCE_TRAIN_2D = 1,              ///< 2D Training only
-  FORCE_TRAIN_AUTO = 2             ///< Auto - 1D or 2D depending on configuration
-} FORCE_TRAIN_MODE;
-
-/// PMU Training Mode
-typedef enum {
-  PMU_TRAIN_1D = 0,                ///< PMU 1D Training only
-  PMU_TRAIN_1D_2D_READ = 1,        ///< PMU 1D and 2D Training read only
-  PMU_TRAIN_1D_2D = 2,             ///< PMU 1D and 2D Training
-  PMU_TRAIN_AUTO = 3               ///< Auto - PMU Training depend on configuration
-} PMU_TRAIN_MODE;
-
-///  The possible DRAM prefetch mode settings.
-typedef enum  {
-  DRAM_PREFETCHER_AUTO,                         ///< Use the recommended setting for the processor. In most cases, the recommended setting is enabled.
-  DISABLE_DRAM_PREFETCH_FOR_IO,                 ///< Disable DRAM prefetching for I/O requests only.
-  DISABLE_DRAM_PREFETCH_FOR_CPU,                ///< Disable DRAM prefetching for requests from processor cores only.
-  DISABLE_DRAM_PREFETCHER,                      ///< Disable DRAM prefetching.
-  MAX_DRAM_FREFETCH_MODE                        ///< Not a DRAM prefetch mode, use for limit checking.
-} DRAM_PREFETCH_MODE;
-
-/// Build Configuration values for BLDCFG_UMA_ALIGNMENT
-typedef enum {
-  NO_UMA_ALIGNED = 0x00FFFFFF,           ///< NO UMA aligned
-  UMA_4MB_ALIGNED = 0x00FFFFC0,          ///< UMA 4MB aligned
-  UMA_128MB_ALIGNED = 0x00FFF800,        ///< UMA 128MB aligned
-  UMA_256MB_ALIGNED = 0x00FFF000,        ///< UMA 256MB aligned
-  UMA_512MB_ALIGNED = 0x00FFE000,        ///< UMA 512MB aligned
-} UMA_ALIGNMENT;
-
-///
-///   Global MCT Configuration Status Word (GStatus)
-///
-typedef enum {
-  GsbMTRRshort,              ///< Ran out of MTRRs while mapping memory
-  GsbAllECCDimms,            ///< All banks of all Nodes are ECC capable
-  GsbDramECCDis,             ///< Dram ECC requested but not enabled.
-  GsbSoftHole,               ///< A Node Base gap was created
-  GsbHWHole,                 ///< A HW dram remap was created
-  GsbNodeIntlv,              ///< Node Memory interleaving was enabled
-  GsbSpIntRemapHole,         ///< Special condition for Node Interleave and HW remapping
-  GsbEnDIMMSpareNW,          ///< Indicates that DIMM Spare can be used without a warm reset
-
-  GsbEOL                     ///< End of list
-} GLOBAL_STATUS_FIELD;
-
-///
-///   Local Error Status (DIE_STRUCT.ErrStatus[31:0])
-///
-typedef enum {
-  EsbNoDimms,                  ///< No DIMMs
-  EsbSpdChkSum,                ///< SPD Checksum fail
-  EsbDimmMismatchM,            ///< dimm module type(buffer) mismatch
-  EsbDimmMismatchT,            ///< dimm CL/T mismatch
-  EsbDimmMismatchO,            ///< dimm organization mismatch (128-bit)
-  EsbNoTrcTrfc,                ///< SPD missing Trc or Trfc info
-  EsbNoCycTime,                ///< SPD missing byte 23 or 25
-  EsbBkIntDis,                 ///< Bank interleave requested but not enabled
-  EsbDramECCDis,               ///< Dram ECC requested but not enabled
-  EsbSpareDis,                 ///< Online spare requested but not enabled
-  EsbMinimumMode,              ///< Running in Minimum Mode
-  EsbNoRcvrEn,                 ///< No DQS Receiver Enable pass window found
-  EsbSmallRcvr,                ///< DQS Rcvr En pass window too small (far right of dynamic range)
-  EsbNoDqsPos,                 ///< No DQS-DQ passing positions
-  EsbSmallDqs,                 ///< DQS-DQ passing window too small
-  EsbDCBKScrubDis,             ///< DCache scrub requested but not enabled
-
-  EsbEMPNotSupported,          ///< Processor is not capable for EMP.
-  EsbEMPConflict,               ///< EMP requested but cannot be enabled since
-                               ///< channel interleaving, bank interleaving, or bank swizzle is enabled.
-  EsbEMPDis,                   ///< EMP requested but cannot be enabled since
-                               ///< memory size of each DCT is not a power of two.
-
-  EsbEOL                       ///< End of list
-} ERROR_STATUS_FIELD;
-
-///
-///  Local Configuration Status (DIE_STRUCT.Status[31:0])
-///
-typedef enum {
-  SbRegistered,                ///< All DIMMs are Registered
-  SbEccDimms,                  ///< All banks ECC capable
-  SbParDimms,                  ///< All banks Addr/CMD Parity capable
-  SbDiagClks,                  ///< Jedec ALL slots clock enable diag mode
-  Sb128bitmode,                ///< DCT in 128-bit mode operation
-  Sb64MuxedMode,               ///< DCT in 64-bit mux'ed mode.
-  Sb2TMode,                    ///< 2T CMD timing mode is enabled.
-  SbSWNodeHole,                ///< Remapping of Node Base on this Node to create a gap.
-  SbHWHole,                    ///< Memory Hole created on this Node using HW remapping.
-  SbOver400Mhz,                ///< DCT freq greater than or equal to 400MHz flag
-  SbDQSPosPass2,               ///< Used for TrainDQSPos DIMM0/1, when freq greater than or equal to 400MHz
-  SbDQSRcvLimit,               ///< Used for DQSRcvEnTrain to know we have reached the upper bound.
-  SbExtConfig,                 ///< Indicate the default setting for extended PCI configuration support
-  SbLrdimms,                   ///< All DIMMs are LRDIMMs
-
-  SbEOL                        ///< End of list
-} LOCAL_STATUS_FIELD;
-
-
-///< CPU MSR Register definitions ------------------------------------------
-#define SYS_CFG     0xC0010010ul
-#define TOP_MEM     0xC001001Aul
-#define TOP_MEM2    0xC001001Dul
-#define HWCR        0xC0010015ul
-#define NB_CFG      0xC001001Ful
-
-#define FS_BASE     0xC0000100ul
-#define IORR0_BASE  0xC0010016ul
-#define IORR0_MASK  0xC0010017ul
-#define BU_CFG      0xC0011023ul
-#define BU_CFG2     0xC001102Aul
-#define COFVID_STAT 0xC0010071ul
-#define TSC         0x10
-
-//-----------------------------------------------------------------------------
-///
-/// SPD Data for each DIMM.
-///
-typedef struct _SPD_DEF_STRUCT {
-  IN BOOLEAN DimmPresent;  ///< Indicates that the DIMM is present and Data is valid
-  IN UINT8 Data[256];      ///< Buffer for 256 Bytes of SPD data from DIMM
-} SPD_DEF_STRUCT;
-
-
-//-----------------------------------------------------------------------------
-///
-/// VDDP_VDDR Voltage Info for Low Power DIMM
-///
-typedef struct _VDDP_VDDR_VOLTAGE {
-  IN BOOLEAN IsValid;               ///< Indicates if daata is valid
-  IN MEMORY_PHY_VOLTAGE Voltage;    ///< VDDP VDDR Voltage Value
-} VDDP_VDDR_VOLTAGE;
-
-///
-/// Channel Definition Structure.
-/// This data structure defines entries that are specific to the channel initialization
-///
-typedef struct _CH_DEF_STRUCT {
-  OUT UINT8   ChannelID;         ///< Physical channel ID of a socket(0 = CH A, 1 = CH B, 2 = CH C, 3 = CH D)
-  OUT TECHNOLOGY_TYPE TechType;  ///< Technology type of this channel
-  OUT UINT8   ChDimmPresent;     ///< For each bit n 0..7, 1 = DIMM n is present.
-                                 ///<  DIMM#  Select Signal
-                                 ///<  0      MA0_CS_L[0, 1]
-                                 ///<  1      MB0_CS_L[0, 1]
-                                 ///<  2      MA1_CS_L[0, 1]
-                                 ///<  3      MB1_CS_L[0, 1]
-                                 ///<  4      MA2_CS_L[0, 1]
-                                 ///<  5      MB2_CS_L[0, 1]
-                                 ///<  6      MA3_CS_L[0, 1]
-                                 ///<  7      MB3_CS_L[0, 1]
-
-  OUT struct _DCT_STRUCT *DCTPtr; ///< Pointer to the DCT data of this channel.
-  OUT struct _DIE_STRUCT *MCTPtr; ///< Pointer to the node data of this channel.
-  OUT SPD_DEF_STRUCT *SpdPtr;    ///< Pointer to the SPD data for this channel. (Setup by NB Constructor)
-  OUT SPD_DEF_STRUCT *DimmSpdPtr[MAX_DIMMS_PER_CHANNEL]; ///< Array of pointers to
-                                 ///<   SPD Data for each Dimm. (Setup by Tech Block Constructor)
-  OUT UINT8   ChDimmValid;       ///< For each bit n 0..3, 1 = DIMM n is valid and is/will be configured where 4..7 are reserved.
-                                 ///<
-  OUT UINT8   RegDimmPresent;   ///< For each bit n 0..3, 1 = DIMM n is a registered DIMM where 4..7 are reserved.
-  OUT UINT8   LrDimmPresent;     ///< For each bit n 0..3, 1 = DIMM n is Load Reduced DIMM where 4..7 are reserved.
-  OUT UINT8   SODimmPresent;     ///< For each bit n 0..3, 1 = DIMM n is a SO-DIMM, where 4..7 are reserved.
-  OUT UINT8   Loads;             ///< Number of devices loading bus
-  OUT UINT8   Dimms;             ///< Number of DIMMs loading Channel
-  OUT UINT8   Ranks;             ///< Number of ranks loading Channel DATA
-  OUT BOOLEAN SlowMode;          ///< 1T or 2T CMD mode (slow access mode)
-                                 ///< FALSE = 1T
-                                 ///< TRUE = 2T
-  ///< The following pointers will be pointed to dynamically allocated buffers.
-  ///< Each buffer is two dimensional (RowCount x ColumnCount) and is lay-outed as in below.
-  ///< Example: If DIMM and Byte based training, then
-  ///< XX is a value in Hex
-  ///<                        BYTE 0, BYTE 1, BYTE 2, BYTE 3, BYTE 4, BYTE 5, BYTE 6, BYTE 7, ECC BYTE
-  ///<  Row1 -  Logical DIMM0    XX      XX      XX      XX      XX      XX      XX      XX      XX
-  ///<  Row2 -  Logical DIMM1    XX      XX      XX      XX      XX      XX      XX      XX      XX
-  OUT UINT16  *RcvEnDlys;       ///< DQS Receiver Enable Delays
-  OUT UINT8   *WrDqsDlys;       ///< Write DQS delays (only valid for DDR3)
-  OUT UINT8   *RdDqsDlys;       ///< Read Dqs delays
-  OUT UINT8   *WrDatDlys;       ///< Write Data delays
-  OUT UINT8   *RdDqs2dDlys;     ///< 2d Read DQS data
-  OUT UINT8   *RdDqsMinDlys;    ///< Minimum Window for Read DQS
-  OUT UINT8   *RdDqsMaxDlys;    ///< Maximum Window for Read DQS
-  OUT UINT8   *WrDatMinDlys;    ///< Minimum Window for Write data
-  OUT UINT8   *WrDatMaxDlys;    ///< Maximum Window for Write data
-  OUT UINT16  *RcvEnDlysMemPs1;       ///< DQS Receiver Enable Delays for Mem Pstate 1
-  OUT UINT8   *WrDqsDlysMemPs1;       ///< Write DQS delays (only valid for DDR3) for Mem Pstate 1
-  OUT UINT8   *RdDqsDlysMemPs1;       ///< Read Dqs delays for Memory Pstate 1
-  OUT UINT8   *WrDatDlysMemPs1;       ///< Write Data delays for Memory Pstate 1
-  OUT UINT8   *RdDqs2dDlysMemPs1;     ///< 2d Read DQS data for Memory Pstate 1
-  OUT UINT8   *RdDqsMinDlysMemPs1;    ///< Minimum Window for Read DQS for Memory Pstate 1
-  OUT UINT8   *RdDqsMaxDlysMemPs1;    ///< Maximum Window for Read DQS for Memory Pstate 1
-  OUT UINT8   *WrDatMinDlysMemPs1;    ///< Minimum Window for Write data for Memory Pstate 1
-  OUT UINT8   *WrDatMaxDlysMemPs1;    ///< Maximum Window for Write data for Memory Pstate 1
-  OUT UINT8   RowCount;         ///< Number of rows of the allocated buffer.
-  OUT UINT8   ColumnCount;      ///< Number of columns of the allocated buffer.
-  OUT UINT8   *FailingBitMask;    ///< Table of masks to Track Failing bits
-  OUT UINT8   *FailingBitMaskMemPs1;    ///< Table of masks to Track Failing bits for Memory Pstate 1
-  OUT VOID    *RdDataEyes;        ///< Pointer to Read Data Eye Bitmaps
-  OUT VOID    *WrDataEyes;        ///< Pointer to Write Data Eye Bitmaps
-  OUT UINT32  DctOdcCtl;          ///< Output Driver Strength (see BKDG FN2:Offset 9Ch, index 00h)
-  OUT UINT32  DctAddrTmg;         ///< Address Bus Timing (see BKDG FN2:Offset 9Ch, index 04h)
-  OUT UINT32  PhyRODTCSLow;       ///< Phy Read ODT Pattern Chip Select low (see BKDG FN2:Offset 9Ch, index 180h)
-  OUT UINT32  PhyRODTCSHigh;      ///< Phy Read ODT Pattern Chip Select high (see BKDG FN2:Offset 9Ch, index 181h)
-  OUT UINT32  PhyWODTCSLow;       ///< Phy Write ODT Pattern Chip Select low (see BKDG FN2:Offset 9Ch, index 182h)
-  OUT UINT32  PhyWODTCSHigh;      ///< Phy Write ODT Pattern Chip Select high (see BKDG FN2:Offset 9Ch, index 183)
-  OUT UINT8   PhyWLODT[4];        ///< Write Levelization ODT Pattern for Dimm 0-3 or CS 0-7(see BKDG FN2:Offset 9Ch, index 0x8[11:8])
-  OUT UINT16  DctEccDqsLike;      ///< DCT DQS ECC UINT8 like...
-  OUT UINT8   DctEccDqsScale;     ///< DCT DQS ECC UINT8 scale
-  OUT UINT16  PtrPatternBufA;     ///< Ptr on stack to aligned DQS testing pattern
-  OUT UINT16  PtrPatternBufB;     ///< Ptr on stack to aligned DQS testing pattern
-  OUT UINT8   ByteLane;           ///< Current UINT8 Lane (0..7)
-  OUT UINT8   Direction;          ///< Current DQS-DQ training write direction (0=read, 1=write)
-  OUT UINT8   Pattern;            ///< Current pattern
-  OUT UINT8   DqsDelay;           ///< Current DQS delay value
-  OUT UINT16  HostBiosSrvc1;      ///< UINT16 sized general purpose field for use by host BIOS.  Scratch space.
-  OUT UINT32  HostBiosSrvc2;      ///< UINT32 sized general purpose field for use by host BIOS.  Scratch space.
-  OUT UINT16  DctMaxRdLat[4];     ///< Max Read Latency (ns) for the DCT
-                                  ///< DctMaxRdLat [i] is for NBPstate i
-  OUT UINT8   DIMMValidCh;        ///< DIMM# in CH
-  OUT UINT8   MaxCh;              ///< Max number of CH in system
-  OUT UINT8   Dct;                ///< Dct pointer
-  OUT UINT8   WrDatGrossH;        ///< Write Data Gross delay high value
-  OUT UINT8   DqsRcvEnGrossL;     ///< DQS Receive Enable Gross Delay low
-
-  OUT UINT8   TrwtWB;             ///<  Non-SPD timing value for TrwtWB
-  OUT UINT8   CurrRcvrDctADelay;  ///< for keep current RcvrEnDly
-  OUT UINT16  T1000;              ///< get the T1000 figure (cycle time (ns) * 1K)
-  OUT UINT8   DqsRcvEnPass;       ///< for TrainRcvrEn UINT8 lane pass flag
-  OUT UINT8   DqsRcvEnSaved;      ///< for TrainRcvrEn UINT8 lane saved flag
-  OUT UINT8   SeedPass1Remainder; ///< for Phy assisted DQS receiver enable training
-
-  OUT UINT8   ClToNbFlag;         ///< is used to restore ClLinesToNbDis bit after memory
-  OUT UINT32  NodeSysBase;        ///< for channel interleave usage
-  OUT UINT8   RefRawCard[MAX_DIMMS_PER_CHANNEL];   ///< Array of rawcards detected
-  OUT UINT8   CtrlWrd02[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 2 values per DIMM
-  OUT UINT8   CtrlWrd03[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 3 values per DIMM
-  OUT UINT8   CtrlWrd04[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 4 values per DIMM
-  OUT UINT8   CtrlWrd05[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 5 values per DIMM
-  OUT UINT8   CtrlWrd08[MAX_DIMMS_PER_CHANNEL];    ///< Control Word 8 values per DIMM
-
-  OUT UINT16  CsPresentDCT;       ///< For each bit n 0..7, 1 = Chip-select n is present
-  OUT UINT8   DimmMirrorPresent;  ///< For each bit n 0..3, 1 = DIMM n is OnDimmMirror capable where 4..7 are reserved.
-  OUT UINT8   DimmSpdCse;         ///< For each bit n 0..3, 1 = DIMM n SPD checksum error where 4..7 are reserved.
-  OUT UINT8   DimmExclude;        ///< For each bit n 0..3, 1 = DIMM n gets excluded where 4..7 are reserved.
-  OUT UINT8   DimmYr06;           ///< Bitmap indicating which Dimms have a manufacturer's year code <= 2006
-  OUT UINT8   DimmWk2406;         ///< Bitmap indicating which Dimms have a manufacturer's week code <= 24 of 2006 (June)
-  OUT UINT8   DimmPlPresent;      ///< Bitmap indicating that Planar (1) or Stacked (0) Dimms are present.
-  OUT UINT8   DimmQrPresent;      ///< QuadRank DIMM present?
-  OUT UINT8   DimmDrPresent;      ///< Bitmap indicating that Dual Rank Dimms are present
-  OUT UINT8   DimmSRPresent;      ///< Bitmap indicating that Single Rank Dimms are present
-  OUT UINT8   Dimmx4Present;      ///< For each bit n 0..3, 1 = DIMM n contains x4 data devices. where 4..7 are reserved.
-  OUT UINT8   Dimmx8Present;      ///< For each bit n 0..3, 1 = DIMM n contains x8 data devices. where 4..7 are reserved.
-  OUT UINT8   Dimmx16Present;     ///< For each bit n 0..3, 1 = DIMM n contains x16 data devices. where 4..7 are reserved.
-  OUT UINT8   LrdimmPhysicalRanks[MAX_DIMMS_PER_CHANNEL];///< Number of Physical Ranks for LRDIMMs
-  OUT UINT8   LrDimmLogicalRanks[MAX_DIMMS_PER_CHANNEL];///< Number of LRDIMM Logical ranks in this configuration
-  OUT UINT8   LrDimmRankMult[MAX_DIMMS_PER_CHANNEL];///< Rank Multipication factor per dimm.
-  OUT UINT8   DimmNibbleAccess;   ///< For each bit n 0..3, 1 = DIMM n will use nibble signaling. Where 4..7 are reserved.
-  OUT UINT8   *MemClkDisMap;      ///<  This pointer will be set to point to an array that describes
-                                  ///<  the routing of M[B,A]_CLK pins to the DIMMs' ranks. AGESA will
-                                  ///<  base on this array to disable unused MemClk to save power.
-                                  ///<
-                                  ///<  The array must have 8 entries. Each entry, which associates with
-                                  ///<  one MemClkDis bit, is a bitmap of 8 CS that that MemClk is routed to.
-                                  ///<    Example:
-                                  ///<    BKDG definition of Fn2x88[MemClkDis] bitmap for AM3 package
-                                  ///<    is like below:
-                                  ///<         Bit AM3/S1g3 pin name
-                                  ///<         0   M[B,A]_CLK_H/L[0]
-                                  ///<         1   M[B,A]_CLK_H/L[1]
-                                  ///<         2   M[B,A]_CLK_H/L[2]
-                                  ///<         3   M[B,A]_CLK_H/L[3]
-                                  ///<         4   M[B,A]_CLK_H/L[4]
-                                  ///<         5   M[B,A]_CLK_H/L[5]
-                                  ///<         6   M[B,A]_CLK_H/L[6]
-                                  ///<         7   M[B,A]_CLK_H/L[7]
-                                  ///<    And platform has the following routing:
-                                  ///<         CS0   M[B,A]_CLK_H/L[4]
-                                  ///<         CS1   M[B,A]_CLK_H/L[2]
-                                  ///<         CS2   M[B,A]_CLK_H/L[3]
-                                  ///<         CS3   M[B,A]_CLK_H/L[5]
-                                  ///<    Then MemClkDisMap should be pointed to the following array:
-                                  ///<               CLK_2 CLK_3 CLK_4 CLK_5
-                                  ///<    0x00, 0x00, 0x02, 0x04, 0x01, 0x08, 0x00, 0x00
-                                  ///<  Each entry of the array is the bitmask of 8 chip selects.
-
-  OUT UINT8   *CKETriMap;         ///<  This pointer will be set to point to an array that describes
-                                  ///<  the routing of CKE pins to the DIMMs' ranks.
-                                  ///<  The array must have 2 entries. Each entry, which associates with
-                                  ///<  one CKE pin, is a bitmap of 8 CS that that CKE is routed to.
-                                  ///<  AGESA will base on this array to disable unused CKE pins to save power.
-
-  OUT UINT8   *ODTTriMap;         ///<  This pointer will be set to point to an array that describes
-                                  ///<  the routing of ODT pins to the DIMMs' ranks.
-                                  ///<  The array must have 4 entries. Each entry, which associates with
-                                  ///<  one ODT pin, is a bitmap of 8 CS that that ODT is routed to.
-                                  ///<  AGESA will base on this array to disable unused ODT pins to save power.
-
-  OUT UINT8   *ChipSelTriMap;     ///<  This pointer will be set to point to an array that describes
-                                  ///<  the routing of chip select pins to the DIMMs' ranks.
-                                  ///<  The array must have 8 entries. Each entry is a bitmap of 8 CS.
-                                  ///<  AGESA will base on this array to disable unused Chip select pins to save power.
-
-  OUT BOOLEAN   ExtendTmp;        ///<  If extended temperature is supported on all dimms on a channel.
-
-  OUT UINT8   MaxVref;            ///<  Maximum Vref Value for channel
-
-  OUT UINT8   Reserved[100];      ///< Reserved
-} CH_DEF_STRUCT;
-
-///
-/// DCT Channel Timing Parameters.
-/// This data structure sets timings that are specific to the channel.
-///
-typedef struct _CH_TIMING_STRUCT {
-  OUT UINT16  DctDimmValid;       ///< For each bit n 0..3, 1=DIMM n is valid and is/will be configured where 4..7 are reserved.
-  OUT UINT16  DimmMirrorPresent;  ///< For each bit n 0..3, 1=DIMM n is OnDimmMirror capable where 4..7 are reserved.
-  OUT UINT16  DimmSpdCse;         ///< For each bit n 0..3, 1=DIMM n SPD checksum error where 4..7 are reserved.
-  OUT UINT16  DimmExclude;        ///< For each bit n 0..3, 1 = DIMM n gets excluded where 4..7 are reserved.
-  OUT UINT16  CsPresent;          ///< For each bit n 0..7, 1=Chip-select n is present
-  OUT UINT16  CsEnabled;          ///< For each bit n 0..7, 1=Chip-select n is enabled
-  OUT UINT16  CsTestFail;         ///< For each bit n 0..7, 1=Chip-select n is present but disabled
-  OUT UINT16  CsTrainFail;        ///< Bitmap showing which chipselects failed training
-  OUT UINT16  DIMM1KPage;         ///< For each bit n 0..3, 1=DIMM n contains 1K page devices. where 4..7 are reserved
-  OUT UINT16  DimmQrPresent;      ///< QuadRank DIMM present?
-  OUT UINT16  DimmDrPresent;      ///< Bitmap indicating that Dual Rank Dimms are present , where 4..7 are reserved
-  OUT UINT8   DimmSRPresent;      ///< Bitmap indicating that Single Rank Dimms are present, where 4..7 are reserved
-  OUT UINT16  Dimmx4Present;      ///< For each bit n 0..3, 1=DIMM n contains x4 data devices. where 4..7 are reserved
-  OUT UINT16  Dimmx8Present;      ///< For each bit n 0..3, 1=DIMM n contains x8 data devices. where 4..7 are reserved
-  OUT UINT16  Dimmx16Present;     ///< For each bit n 0..3, 1=DIMM n contains x16 data devices. where 4..7 are reserved
-
-  OUT UINT16  DIMMTrcd;           ///< Minimax Trcd*40 (ns) of DIMMs
-  OUT UINT16  DIMMTrp;            ///< Minimax Trp*40 (ns) of DIMMs
-  OUT UINT16  DIMMTrtp;           ///< Minimax Trtp*40 (ns) of DIMMs
-  OUT UINT16  DIMMTras;           ///< Minimax Tras*40 (ns) of DIMMs
-  OUT UINT16  DIMMTrc;            ///< Minimax Trc*40 (ns) of DIMMs
-  OUT UINT16  DIMMTwr;            ///< Minimax Twr*40 (ns) of DIMMs
-  OUT UINT16  DIMMTrrd;           ///< Minimax Trrd*40 (ns) of DIMMs
-  OUT UINT16  DIMMTwtr;           ///< Minimax Twtr*40 (ns) of DIMMs
-  OUT UINT16  DIMMTfaw;           ///< Minimax Tfaw*40 (ns) of DIMMs
-  OUT UINT16  TargetSpeed;        ///< Target DRAM bus speed in MHz
-  OUT UINT16  Speed;              ///< DRAM bus speed in MHz
-                                  ///<  400 (MHz)
-                                  ///<  533 (MHz)
-                                  ///<  667 (MHz)
-                                  ///<  800 (MHz)
-                                  ///<  and so on...
-  OUT UINT8   CasL;               ///< CAS latency DCT setting (busclocks)
-  OUT UINT8   Trcd;               ///< DCT Trcd (busclocks)
-  OUT UINT8   Trp;                ///< DCT Trp (busclocks)
-  OUT UINT8   Trtp;               ///< DCT Trtp (busclocks)
-  OUT UINT8   Tras;               ///< DCT Tras (busclocks)
-  OUT UINT8   Trc;                ///< DCT Trc (busclocks)
-  OUT UINT8   Twr;                ///< DCT Twr (busclocks)
-  OUT UINT8   Trrd;               ///< DCT Trrd (busclocks)
-  OUT UINT8   Twtr;               ///< DCT Twtr (busclocks)
-  OUT UINT8   Tfaw;               ///< DCT Tfaw (busclocks)
-  OUT UINT8   Trfc0;              ///< DCT Logical DIMM0 Trfc
-                                  ///<  0 = 75ns (for 256Mb devs)
-                                  ///<  1 = 105ns (for 512Mb devs)
-                                  ///<  2 = 127.5ns (for 1Gb devs)
-                                  ///<  3 = 195ns (for 2Gb devs)
-                                  ///<  4 = 327.5ns (for 4Gb devs)
-  OUT UINT8   Trfc1;              ///< DCT Logical DIMM1 Trfc (see Trfc0 for format)
-  OUT UINT8   Trfc2;              ///< DCT Logical DIMM2 Trfc (see Trfc0 for format)
-  OUT UINT8   Trfc3;              ///< DCT Logical DIMM3 Trfc (see Trfc0 for format)
-  OUT UINT32  DctMemSize;         ///< Base[47:16], total DRAM size controlled by this DCT.
-                                  ///<
-  OUT BOOLEAN SlowMode;           ///< 1T or 2T CMD mode (slow access mode)
-                                  ///< FALSE = 1T
-                                  ///< TRUE = 2T
-  OUT UINT8   TrwtTO;             ///< DCT TrwtTO (busclocks)
-  OUT UINT8   Twrrd;              ///< DCT Twrrd (busclocks)
-  OUT UINT8   Twrwr;              ///< DCT Twrwr (busclocks)
-  OUT UINT8   Trdrd;              ///< DCT Trdrd (busclocks)
-  OUT UINT8   TrwtWB;             ///< DCT TrwtWB (busclocks)
-  OUT UINT8   TrdrdSD;            ///< DCT TrdrdSD (busclocks)
-  OUT UINT8   TwrwrSD;            ///< DCT TwrwrSD (busclocks)
-  OUT UINT8   TwrrdSD;            ///< DCT TwrrdSD (busclocks)
-  OUT UINT16  MaxRdLat;           ///< Max Read Latency
-  OUT UINT8   WrDatGrossH;        ///< Temporary variables must be removed
-  OUT UINT8   DqsRcvEnGrossL;     ///< Temporary variables must be removed
-} CH_TIMING_STRUCT;
-
-///
-/// Data for each DCT.
-/// This data structure defines data used to configure each DRAM controller.
-///
-typedef struct _DCT_STRUCT {
-  OUT UINT8   Dct;                ///< Current Dct
-  OUT CH_TIMING_STRUCT Timings;   ///< Channel Timing structure
-  OUT CH_TIMING_STRUCT *TimingsMemPs1;   ///< Pointed to channel timing structure for memory Pstate 1
-  OUT CH_DEF_STRUCT    *ChData;   ///< Pointed to a dynamically allocated array of Channel structures
-  OUT UINT8   ChannelCount;       ///< Number of channel per this DCT
-  OUT BOOLEAN BkIntDis;           ///< Bank interleave requested but not enabled on current DCT
-  OUT UINT8 BankAddrMap;          ///< Bank Address Mapping
-  OUT UINT8 EnabledChipSels;      ///< Number of enabled chip selects on current DCT
-} DCT_STRUCT;
-
-
-///
-/// Data Structure defining each Die.
-/// This data structure contains information that is used to configure each Die.
-///
-typedef struct _DIE_STRUCT {
-
-  /// Advanced:
-
-  OUT UINT8   NodeId;              ///< Node ID of current controller
-  OUT UINT8   SocketId;            ///< Socket ID of this Die
-  OUT UINT8   DieId;               ///< ID of this die relative to the socket
-  OUT PCI_ADDR      PciAddr;       ///< Pci bus and device number of this controller.
-  OUT AGESA_STATUS  ErrCode;       ///< Current error condition of Node
-                                   ///<  0x0 = AGESA_SUCCESS
-                                   ///<  0x1 = AGESA_UNSUPPORTED
-                                   ///<  0x2 = AGESA_BOUNDS_CHK
-                                   ///<  0x3 = AGESA_ALERT
-                                   ///<  0x4 = AGESA_WARNING
-                                   ///<  0x5 = AGESA_ERROR
-                                   ///<  0x6 = AGESA_CRITICAL
-                                   ///<  0x7 = AGESA_FATAL
-                                   ///<
-  OUT BOOLEAN ErrStatus[EsbEOL];   ///< Error Status bit Field
-                                   ///<
-  OUT BOOLEAN Status[SbEOL];       ///< Status bit Field
-                                   ///<
-  OUT UINT32  NodeMemSize;         ///< Base[47:16], total DRAM size controlled by both DCT0 and DCT1 of this Node.
-                                   ///<
-  OUT UINT32  NodeSysBase;         ///< Base[47:16] (system address) DRAM base address of this Node.
-                                   ///<
-  OUT UINT32  NodeHoleBase;        ///< If not zero, Base[47:16] (system address) of dram hole for HW remapping.  Dram hole exists on this Node
-                                   ///<
-  OUT UINT32  NodeSysLimit;        ///< Base[47:16] (system address) DRAM limit address of this Node.
-                                   ///<
-  OUT UINT32  DimmPresent;         ///< For each bit n 0..7, 1 = DIMM n is present.
-                                   ///<   DIMM#  Select Signal
-                                   ///<   0      MA0_CS_L[0, 1]
-                                   ///<   1      MB0_CS_L[0, 1]
-                                   ///<   2      MA1_CS_L[0, 1]
-                                   ///<   3      MB1_CS_L[0, 1]
-                                   ///<   4      MA2_CS_L[0, 1]
-                                   ///<   5      MB2_CS_L[0, 1]
-                                   ///<   6      MA3_CS_L[0, 1]
-                                   ///<   7      MB3_CS_L[0, 1]
-                                   ///<
-  OUT UINT32  DimmValid;           ///< For each bit n 0..7, 1 = DIMM n is valid and is / will be configured
-  OUT UINT32  RegDimmPresent;      ///< For each bit n 0..7, 1 = DIMM n is registered DIMM
-  OUT UINT32  LrDimmPresent;       ///< For each bit n 0..7, 1 = DIMM n is Load Reduced DIMM
-  OUT UINT32  DimmEccPresent;      ///< For each bit n 0..7, 1 = DIMM n is ECC capable.
-  OUT UINT32  DimmParPresent;      ///< For each bit n 0..7, 1 = DIMM n is ADR/CMD Parity capable.
-                                   ///<
-  OUT UINT16  DimmTrainFail;       ///< Bitmap showing which dimms failed training
-  OUT UINT16  ChannelTrainFail;    ///< Bitmap showing the channel information about failed Chip Selects
-                                   ///<  0 in any bit field indicates Channel 0
-                                   ///<  1 in any bit field indicates Channel 1
-  OUT UINT8   Dct;                 ///<  Need to be removed
-                                   ///<  DCT pointer
-  OUT BOOLEAN GangedMode;          ///< Ganged mode
-                                   ///<  0 = disabled
-                                   ///<  1 = enabled
-  OUT CPU_LOGICAL_ID LogicalCpuid; ///< The logical CPUID of the node
-                                   ///<
-  OUT UINT16  HostBiosSrvc1;       ///< UINT16 sized general purpose field for use by host BIOS.  Scratch space.
-                                   ///<
-  OUT UINT32  HostBiosSrvc2;       ///< UINT32 sized general purpose field for use by host BIOS.  Scratch space.
-                                   ///<
-  OUT UINT8   MLoad;               ///< Need to be removed
-                                   ///< Number of devices loading MAA bus
-                                   ///<
-  OUT UINT8   MaxAsyncLat;         ///< Legacy wrapper
-                                   ///<
-  OUT UINT8   ChbD3Rcvrdly;        ///< Legacy wrapper
-                                   ///<
-  OUT UINT16  ChaMaxRdLat;         ///< Max Read Latency (ns) for DCT 0
-                                   ///<
-  OUT UINT8   ChbD3BcRcvrdly;      ///< CHB DIMM 3 Check UINT8 Receiver Enable Delay
-
-  OUT DCT_STRUCT *DctData;         ///< Pointed to a dynamically allocated array of DCT_STRUCTs
-  OUT UINT8   DctCount;            ///< Number of DCTs per this Die
-  OUT UINT8   Reserved[16];        ///< Reserved
-} DIE_STRUCT;
-
-/**********************************************************************
- * S3 Support structure
- **********************************************************************/
-/// AmdInitResume, AmdS3LateRestore, and AmdS3Save param structure
-typedef struct {
-     OUT   UINT32 Signature;           ///< "ASTR" for AMD Suspend-To-RAM
-     OUT   UINT16 Version;             ///< S3 Params version number
-  IN OUT   UINT32 Flags;               ///< Indicates operation
-  IN OUT   VOID   *NvStorage;          ///< Pointer to memory critical save state data
-  IN OUT   UINT32 NvStorageSize;       ///< Size in bytes of the NvStorage region
-  IN OUT   VOID   *VolatileStorage;    ///< Pointer to remaining AMD save state data
-  IN OUT   UINT32 VolatileStorageSize; ///< Size in bytes of the VolatileStorage region
-} AMD_S3_PARAMS;
-
-///===============================================================================
-/// MEM_PARAMETER_STRUCT
-/// This data structure is used to pass wrapper parameters to the memory configuration code
-///
-typedef struct _MEM_PARAMETER_STRUCT {
-
-  // Basic (Return parameters)
-  // (This section contains the outbound parameters from the memory init code)
-
-  OUT BOOLEAN GStatus[GsbEOL];    ///< Global Status bitfield.
-                                  ///<
-  OUT UINT32 HoleBase;            ///< If not zero Base[47:16] (system address) of sub 4GB dram hole for HW remapping.
-                                  ///<
-  OUT UINT32 Sub4GCacheTop;       ///< If not zero, the 32-bit top of cacheable memory.
-                                  ///<
-  OUT UINT32 Sub1THoleBase;       ///< If not zero Base[47:16] (system address) of sub 1TB dram hole.
-                                  ///<
-  OUT UINT32 SysLimit;            ///< Limit[47:16] (system address).
-                                  ///<
-  OUT DIMM_VOLTAGE DDR3Voltage;   ///< Find support voltage and send back to platform BIOS.
-                                  ///<
-  OUT VDDP_VDDR_VOLTAGE VddpVddrVoltage;    ///< For a given configuration, request is made to change the VDDP/VDDR
-                                            ///< voltage in platform BIOS via AgesaHookBeforeDramInit callout and
-                                            ///< MEM_PARAMETER_STRUCT.VddpVddrVoltage.Voltage parameter if
-                                            ///< MEM_PARAMETER_STRUCT.VddpVddrVoltage.IsValid is TRUE. The
-                                            ///< MEM_PARAMETER_STRUCT.VddpVddrVoltage.Voltage is defined in
-                                            ///< MEMORY_PHY_VOLTAGE
-  OUT UINT8 ExternalVrefValue;    ///< Target reference voltage for external Vref for 2D training
-                                  ///<
-  OUT struct _MEM_DATA_STRUCT *MemData;   ///< Access to global memory init data.
-
-  //  Advanced (Optional parameters)
-  //  Optional (all defaults values will be initialized by the
-  //  'AmdMemInitDataStructDef' based on AMD defaults. It is up
-  //  to the IBV/OEM to change the defaults after initialization
-  //  but prior to the main entry to the memory code):
-
-  // Memory Map/Mgt.
-
-  IN UINT16  BottomIo;             ///< Bottom of 32-bit IO space (8-bits).
-                                   ///<   NV_BOTTOM_IO[7:0]=Addr[31:24]
-                                   ///<
-  IN BOOLEAN MemHoleRemapping;     ///< Memory Hole Remapping (1-bit).
-                                   ///<  FALSE = disable
-                                   ///<  TRUE  = enable
-                                   ///<
-  IN BOOLEAN LimitMemoryToBelow1Tb;///< Limit memory address space to below 1 TB
-                                   ///<  FALSE = disable
-                                   ///<  TRUE  = enable
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_LIMIT_MEMORY_TO_BELOW_1TB}
-
-
-  // Dram Timing
-
-  IN UINT32  UserTimingMode;       ///< User Memclock Mode.
-                                                ///< @BldCfgItem{BLDCFG_TIMING_MODE_SELECT}
-
-  IN UINT32  MemClockValue;        ///< Memory Clock Value.
-                                                ///< @BldCfgItem{BLDCFG_MEMORY_CLOCK_SELECT}
-
-
-  // Dram Configuration
-
-  IN BOOLEAN EnableBankIntlv;      ///< Dram Bank (chip-select) Interleaving (1-bit).
-                                   ///<  - FALSE =disable (default)
-                                   ///<  - TRUE = enable
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_MEMORY_ENABLE_BANK_INTERLEAVING}
-
-  IN BOOLEAN EnableNodeIntlv;      ///< Node Memory Interleaving (1-bit).
-                                   ///<   - FALSE = disable (default)
-                                   ///<   - TRUE = enable
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_MEMORY_ENABLE_NODE_INTERLEAVING}
-
-  IN BOOLEAN EnableChannelIntlv;   ///< Channel Interleaving (1-bit).
-                                   ///<   - FALSE = disable (default)
-                                   ///<   - TRUE = enable
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_MEMORY_CHANNEL_INTERLEAVING}
-  // DllPDBypassMode
-
-  IN BOOLEAN EnableDllPDBypassMode;///< Enable low-power DDR phy operation. This feature is used for low-power
-                                   ///< solder-down DRAM motherboard designs with route matched CK/DQS/DQ signals.
-                                   ///< It limits maximim achieveable DDR rates on the platform and should not be
-                                   ///< enabled for systems requiring high DDR rate operation and/or DIMM-based systems.
-                                   ///<   - FALSE = disable
-                                   ///<   - TRUE = enable (default)
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_DDR_PHY_DLL_BYPASS_MODE}
-  // ECC
-
-  IN BOOLEAN EnableEccFeature;     ///< enable ECC error to go into MCE.
-                                   ///<   - FALSE = disable (default)
-                                   ///<   - TRUE = enable
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_ENABLE_ECC_FEATURE}
-  // Dram Power
-
-  IN BOOLEAN EnablePowerDown;      ///< CKE based power down mode (1-bit).
-                                   ///<   - FALSE =disable (default)
-                                   ///<   - TRUE =enable
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_MEMORY_POWER_DOWN}
-
-  // Online Spare
-
-  IN BOOLEAN EnableOnLineSpareCtl; ///< Chip Select Spare Control bit 0.
-                                   ///<  - FALSE = disable Spare (default)
-                                   ///<  - TRUE = enable Spare
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_ONLINE_SPARE}
-
-  IN UINT8 *TableBasedAlterations; ///< Desired modifications to register settings.
-
-  IN PSO_TABLE *PlatformMemoryConfiguration;
-                                   ///< A table that contains platform specific settings.
-                                   ///< For example, MemClk routing, the number of DIMM slots per channel, ....
-                                   ///< AGESA initializes this pointer with DefaultPlatformMemoryConfiguration that
-                                   ///< contains default conservative settings. Platform BIOS can either tweak
-                                   ///< DefaultPlatformMemoryConfiguration or reassign this pointer to its own table.
-                                   ///<
-  IN BOOLEAN EnableParity;         ///< Parity control.
-                                   ///<  - TRUE = enable
-                                   ///<  - FALSE = disable (default)
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_MEMORY_PARITY_ENABLE}
-
-  IN BOOLEAN EnableBankSwizzle;    ///< BankSwizzle control.
-                                   ///<  - FALSE = disable
-                                   ///<  - TRUE = enable  (default)
-                                   ///<
-                                   ///< @BldCfgItem{BLDCFG_BANK_SWIZZLE}
-
-                                   ///<
-
-  IN BOOLEAN EnableMemClr;         ///< Memory Clear functionality control.
-                                   ///<  - FALSE = disable
-                                   ///<  - TRUE = enable  (default)
-                                   ///<
-
-  // Uma Configuration
-
-  IN UMA_MODE UmaMode;             ///<  Uma Mode
-                                   ///<  0 = None
-                                   ///<  1 = Specified
-                                   ///<  2 = Auto
-  IN OUT UINT32 UmaSize;           ///<  The size of shared graphics dram (16-bits)
-                                   ///<  NV_UMA_Size[31:0]=Addr[47:16]
-                                   ///<
-  OUT UINT32 UmaBase;              ///<  The allocated Uma base address (32-bits)
-                                   ///<  NV_UMA_Base[31:0]=Addr[47:16]
-                                   ///<
-
-  /// Memory Restore Feature
-
-  IN BOOLEAN MemRestoreCtl;        ///< Memory context restore control
-                                   ///<   FALSE = perform memory init as normal (AMD default)
-                                   ///<   TRUE = restore memory context and skip training. This requires
-                                   ///<          MemContext is valid before AmdInitPost
-                                   ///<
-  IN BOOLEAN SaveMemContextCtl;    ///< Control switch to save memory context at the end of MemAuto
-                                   ///<   TRUE = AGESA will setup MemContext block before exit AmdInitPost
-                                   ///<   FALSE = AGESA will not setup MemContext block. Platform is
-                                   ///<           expected to call S3Save later in POST if it wants to
-                                   ///<           use memory context restore feature.
-                                   ///<
-  IN OUT AMD_S3_PARAMS MemContext; ///< Memory context block describes the data that platform needs to
-                                   ///< save and restore for memory context restore feature to work.
-                                   ///< It uses the subset of S3Save block to save/restore. Hence platform
-                                   ///< may save only S3 block and uses it for both S3 resume and
-                                   ///< memory context restore.
-                                   ///<  - If MemRestoreCtl is TRUE, platform needs to pass in MemContext
-                                   ///<    before AmdInitPost.
-                                   ///<  - If SaveMemContextCtl is TRUE, platform needs to save MemContext
-                                   ///<    right after AmdInitPost.
-                                   ///<
-  IN BOOLEAN IsCapsuleMode;        ///< Capsule reboot control
-                                   ///<   FALSE = This is not a capsule reboot.
-                                   ///<   TRUE = This is a capsule reboot.
-                                   ///<
-  IN BOOLEAN ExternalVrefCtl;      ///< Control the use of external Vref
-                                   ///<   TRUE = AGESA will use the function defined in "AGESA_EXTERNAL_VREF_CHANGE" in function list
-                                   ///<          to change the vref
-                                   ///<   FALSE = AGESA will will use the internal vref control.
-                                   ///< @BldCfgItem{BLDCFG_ENABLE_EXTERNAL_VREF_FEATURE}
-                                   ///<
-  IN FORCE_TRAIN_MODE ForceTrainMode;   ///<  Training Mode
-                                   ///<  0 = Force 1D Training for all configurations
-                                   ///<  1 = Force 2D Training for all configurations
-                                   ///<  2 = Auto - AGESA will control 1D or 2D
-  IN TECHNOLOGY_TYPE DimmTypeUsedInMixedConfig;   ///< Select the preferred technology type that AGESA will enable
-                                                  ///< when it is mixed with other technology types.
-                                                  ///<   DDR3_TECHNOLOGY = Use DDR3 DIMMs
-                                                  ///<   GDDR5_TECHNOLOGY = Use GDDR5 DIMMs
-                                                  ///<   UNSUPPORTED_TECHNOLOGY = Exit with fatal error when DDR3 and GDDR5 DIMMs
-                                                  ///<                            are installed on the same system
-                                                  ///< @BldCfgItem{BLDCFG_DIMM_TYPE_USED_IN_MIXED_CONFIG}
-  IN BOOLEAN AmpEnable;            ///< AMP functionality control
-                                   ///<   TRUE = Enable, platform BIOS requests to enable memory overclocking function, and AGESA
-                                   ///<          detects if memory is capable of it
-                                   ///<   FALSE = Disable, there is no request to enable memory overclocking function
-                                   ///<
-  IN BOOLEAN AmpWarningMsgEnable;  ///< AMP warning messages control
-                                   ///<   TRUE = Enable to log the warning messages of AMP
-                                   ///<   FALSE = Disable
-                                   ///<
-  OUT AMP_STATUS AmpStatus;        ///< AMP status allows platform BIOS to check which voltage or warning message it should
-                                   ///< use/apply.
-                                   ///<
-                                   ///<   AmpVoltageValid :
-                                   ///<       TRUE - AGESA does enable AMP function, so use AmpVoltage for voltage adjustment
-                                   ///<       FALSE - AGESA does not enable AMP function, so use DDR3Voltage for voltage adjustment
-                                   ///<
-                                   ///<   AmpSupportDetectedButNotEnabled :
-                                   ///<       TRUE - Display warning message of "AMP support detected but not enabled"
-                                   ///<       FALSE - No corresponding message should be displayed
-                                   ///<
-                                   ///<   AmpSelectedButNotEnabled :
-                                   ///<       TRUE - Display warning message of "AMP selected but not enabled"
-                                   ///<       FALSE - No corresponding message should be displayed
-                                   ///<
-                                   ///<   Note that both of warning message status reports are controlled by AmpWarningMsgEnable
-                                   ///<
-  OUT AMP_DIMM_VOLTAGE AmpVoltage; ///< AMP voltage which will be sent back to platform BIOS, and
-                                   ///< the value in AmpVoltage is valid only if AmpStatus is TRUE returned
-  IN BOOLEAN DataEyeEn;            ///< Get 2D training data eye
-                                   ///<   TRUE  = Enable to get the 2D data eye
-                                   ///<   FALSE = The 2D data eye is not enabled
-                                   ///< @BldCfgItem{BLDCFG_ENABLE_DATA_EYE}
-  IN BOOLEAN DramDoubleRefreshRate;///< Specify the average time between refresh requests to all DRAM devices.
-                                   ///<   TRUE  = 2x refresh rate.
-                                   ///<   FALSE = 1x refresh rate.
-                                   ///< @BldCfgItem{BLDCFG_DRAM_DOUBLE_REFRESH_RATE}
-  IN PMU_TRAIN_MODE PmuTrainMode;  ///<  PMU Training Mode
-                                   ///< @BldCfgItem{BLDCFG_PMU_TRAINING_MODE}
-                                   ///<  0 = PMU 1D Training only for all configurations
-                                   ///<  1 = PMU 1D and 2D Training read only for all configurations
-                                   ///<  2 = PMU 1D and 2D Training for all configurations
-                                   ///<  3 = AGESA control type of training depend on configurations
-} MEM_PARAMETER_STRUCT;
-
-
-///
-/// Function definition.
-/// This data structure passes function pointers to the memory configuration code.
-/// The wrapper can use this structure with customized versions.
-///
-typedef struct _MEM_FUNCTION_STRUCT {
-
-  // PUBLIC required Internal functions
-
-  IN OUT BOOLEAN (*amdMemGetPsCfgU) ( VOID *pMemData);  ///< Proc for Unbuffered DIMMs, platform specific
-  IN OUT BOOLEAN (*amdMemGetPsCfgR) (VOID *pMemData);   ///< Proc for Registered DIMMs, platform specific
-
-  // PUBLIC optional functions
-
-  IN OUT VOID (*amdMemEccInit) (VOID *pMemData);                  ///< NB proc for ECC feature
-  IN OUT VOID (*amdMemChipSelectInterleaveInit) (VOID *pMemData); ///< NB proc for CS interleave feature
-  IN OUT VOID (*amdMemDctInterleavingInit) (VOID *pMemData);      ///< NB proc for Channel interleave feature
-  IN OUT VOID (*amdMemMctInterleavingInit) (VOID *pMemData);      ///< NB proc for Node interleave feature
-  IN OUT VOID (*amdMemParallelTraining) (VOID *pMemData);         ///< NB proc for parallel training feature
-  IN OUT VOID (*amdMemEarlySampleSupport) (VOID *pMemData);       ///< NB code for early sample support feature
-  IN OUT VOID (*amdMemMultiPartInitSupport) (VOID *pMemData);     ///< NB code for 'multi-part'
-  IN OUT VOID (*amdMemOnlineSpareSupport) (VOID *pMemData);       ///< NB code for On-Line Spare feature
-  IN OUT VOID (*amdMemUDimmInit) (VOID *pMemData);                ///< NB code for UDIMMs
-  IN OUT VOID (*amdMemRDimmInit) (VOID *pMemData);                ///< NB code for RDIMMs
-  IN OUT VOID (*amdMemLrDimmInit) (VOID *pMemData);               ///< NB code for LRDIMMs
-  IN OUT UINT32   Reserved[100]; ///< Reserved for later function definition
-} MEM_FUNCTION_STRUCT;
-
-///
-/// Socket Structure
-///
-///
-typedef struct _MEM_SOCKET_STRUCT {
-  OUT VOID *ChannelPtr[MAX_CHANNELS_PER_SOCKET];  ///< Pointers to each channels training data
-
-  OUT VOID *TimingsPtr[MAX_CHANNELS_PER_SOCKET];  ///< Pointers to each channels timing data
-} MEM_SOCKET_STRUCT;
-
-///
-/// Contains all data relevant to Memory Initialization.
-///
-typedef struct _MEM_DATA_STRUCT {
-  IN AMD_CONFIG_PARAMS StdHeader;             ///< Standard configuration header
-
-  IN MEM_PARAMETER_STRUCT *ParameterListPtr;  ///< List of input Parameters
-
-  OUT MEM_FUNCTION_STRUCT FunctionList;       ///< List of function Pointers
-
-  IN OUT AGESA_STATUS (*GetPlatformCfg[MAX_PLATFORM_TYPES]) (struct _MEM_DATA_STRUCT *MemData, UINT8 SocketID, CH_DEF_STRUCT *CurrentChannel); ///< look-up platform info
-
-  IN OUT BOOLEAN (*ErrorHandling)(struct _DIE_STRUCT *MCTPtr, UINT8 DCT, UINT16 ChipSelMask, AMD_CONFIG_PARAMS *StdHeader); ///< Error Handling
-
-
-  OUT MEM_SOCKET_STRUCT SocketList[MAX_SOCKETS_SUPPORTED];  ///< Socket list for memory code.
-                                   ///< SocketList is a shortcut for IBVs to retrieve training
-                                   ///< and timing data for each channel indexed by socket/channel,
-                                   ///< eliminating their need to parse die/dct/channel etc.
-                                   ///< It contains pointers to the populated data structures for
-                                   ///< each channel and skips the channel structures that are
-                                   ///< unpopulated. In the case of channels sharing the same DCT,
-                                   ///< the pTimings pointers will point to the same DCT Timing data.
-
-  OUT DIE_STRUCT *DiesPerSystem;  ///< Pointed to an array of DIE_STRUCTs
-  OUT UINT8      DieCount;        ///< Number of MCTs in the system.
-
-  IN SPD_DEF_STRUCT *SpdDataStructure;              ///< Pointer to SPD Data structure
-
-  IN OUT  struct _PLATFORM_CONFIGURATION   *PlatFormConfig;    ///< Platform profile/build option config structure
-
-  IN OUT BOOLEAN IsFlowControlSupported;    ///< Indicates if flow control is supported
-
-  OUT UINT32 TscRate;             ///< The rate at which the TSC increments in megahertz.
-  IN BOOLEAN PhyReceiverLowPower;  ///< Force PHY receiver in low power.
-                                   ///<   TRUE  = PHY receiver low power
-                                   ///<   FALSE = PHY receiver high power
-} MEM_DATA_STRUCT;
-
-///
-/// Uma Structure
-///
-///
-typedef struct _UMA_INFO {
-  OUT UINT64 UmaBase;          ///< UmaBase[63:0] = Addr[63:0]
-  OUT UINT32 UmaSize;          ///< UmaSize[31:0] = Addr[31:0]
-  OUT UINT32 UmaAttributes;    ///< Indicate the attribute of Uma
-  OUT UINT8  UmaMode;          ///< Indicate the mode of Uma
-  OUT UINT16 MemClock;         ///< Indicate memory running speed in MHz
-  OUT UINT8  MemType;          ///< Indicate the DRAM technology type that is being used
-  OUT UINT8  Reserved[2];      ///< Reserved for future usage
-} UMA_INFO;
-
-
-/// Bitfield for ID
-typedef struct {
-  OUT UINT16 SocketId:8;       ///< Socket ID
-  OUT UINT16 ModuleId:8;       ///< Module ID
-} ID_FIELD;
-///
-/// Union for ID of socket and module that will be passed out in call out
-///
-typedef union {
-  OUT ID_FIELD IdField;         ///< Bitfield for ID
-  OUT UINT16 IdInformation;     ///< ID information for call out
-} ID_INFO;
-
-//  AGESA MEMORY ERRORS
-
-// AGESA_SUCCESS memory events
-#define MEM_EVENT_CAPSULE_IN_EFFECT      0x04013600ul          ///< Capsule is in effect
-#define MEM_EVENT_CONTEXT_RESTORE_IN_EFFECT     0x04023600ul   ///< Context restore is in effect
-
-// AGESA_ALERT Memory Errors
-#define MEM_ALERT_USER_TMG_MODE_OVERRULED   0x04010000ul       ///< TIMING_MODE_SPECIFIC is requested but
-                                                               ///< cannot be applied to current configurations.
-#define MEM_ALERT_ORG_MISMATCH_DIMM 0x04010100ul               ///< DIMM organization miss-match
-#define MEM_ALERT_BK_INT_DIS 0x04010200ul                      ///< Bank interleaving disable for internal issue
-
-// AGESA_ERROR Memory Errors
-#define MEM_ERROR_NO_DQS_POS_RD_WINDOW 0x04010300ul            ///< No DQS Position window for RD DQS
-#define MEM_ERROR_SMALL_DQS_POS_RD_WINDOW 0x04020300ul         ///< Small DQS Position window for RD DQS
-#define MEM_ERROR_NO_DQS_POS_WR_WINDOW 0x04030300ul            ///< No DQS Position window for WR DQS
-#define MEM_ERROR_SMALL_DQS_POS_WR_WINDOW 0x04040300ul         ///< Small DQS Position window for WR DQS
-#define MEM_ERROR_DIMM_SPARING_NOT_ENABLED 0x04010500ul        ///< DIMM sparing has not been enabled for an internal issues
-#define MEM_ERROR_RCVR_EN_VALUE_TOO_LARGE 0x04050300ul         ///< Receive Enable value is too large
-#define MEM_ERROR_RCVR_EN_NO_PASSING_WINDOW 0x04060300ul       ///< There is no DQS receiver enable window
-#define MEM_ERROR_DRAM_ENABLED_TIME_OUT 0x04010600ul           ///< Time out when polling DramEnabled bit
-#define MEM_ERROR_DCT_ACCESS_DONE_TIME_OUT 0x04010700ul        ///< Time out when polling DctAccessDone bit
-#define MEM_ERROR_SEND_CTRL_WORD_TIME_OUT 0x04010800ul         ///< Time out when polling SendCtrlWord bit
-#define MEM_ERROR_PREF_DRAM_TRAIN_MODE_TIME_OUT 0x04010900ul   ///< Time out when polling PrefDramTrainMode bit
-#define MEM_ERROR_ENTER_SELF_REF_TIME_OUT 0x04010A00ul         ///< Time out when polling EnterSelfRef bit
-#define MEM_ERROR_FREQ_CHG_IN_PROG_TIME_OUT 0x04010B00ul       ///< Time out when polling FreqChgInProg bit
-#define MEM_ERROR_EXIT_SELF_REF_TIME_OUT 0x04020A00ul          ///< Time out when polling ExitSelfRef bit
-#define MEM_ERROR_SEND_MRS_CMD_TIME_OUT 0x04010C00ul           ///< Time out when polling SendMrsCmd bit
-#define MEM_ERROR_SEND_ZQ_CMD_TIME_OUT 0x04010D00ul            ///< Time out when polling SendZQCmd bit
-#define MEM_ERROR_DCT_EXTRA_ACCESS_DONE_TIME_OUT 0x04010E00ul  ///< Time out when polling DctExtraAccessDone bit
-#define MEM_ERROR_MEM_CLR_BUSY_TIME_OUT 0x04010F00ul           ///< Time out when polling MemClrBusy bit
-#define MEM_ERROR_MEM_CLEARED_TIME_OUT 0x04020F00ul            ///< Time out when polling MemCleared bit
-#define MEM_ERROR_FLUSH_WR_TIME_OUT 0x04011000ul               ///< Time out when polling FlushWr bit
-#define MEM_ERROR_NBPSTATE_TRANSITION_TIME_OUT 0x04012600ul    ///< Time out when polling CurNBPstate bit
-#define MEM_ERROR_MAX_LAT_NO_WINDOW 0x04070300ul               ///< Fail to find pass during Max Rd Latency training
-#define MEM_ERROR_PARALLEL_TRAINING_LAUNCH_FAIL 0x04080300ul   ///< Fail to launch training code on an AP
-#define MEM_ERROR_PARALLEL_TRAINING_TIME_OUT 0x04090300ul      ///< Fail to finish parallel training
-#define MEM_ERROR_NO_ADDRESS_MAPPING 0x04011100ul              ///< No address mapping found for a dimm
-#define MEM_ERROR_RCVR_EN_NO_PASSING_WINDOW_EQUAL_LIMIT  0x040A0300ul ///< There is no DQS receiver enable window and the value is equal to the largest value
-#define MEM_ERROR_RCVR_EN_VALUE_TOO_LARGE_LIMIT_LESS_ONE 0x040B0300ul ///< Receive Enable value is too large and is 1 less than limit
-#define MEM_ERROR_CHECKSUM_NV_SPDCHK_RESTRT_ERROR  0x04011200ul       ///< SPD Checksum error for NV_SPDCHK_RESTRT
-#define MEM_ERROR_NO_CHIPSELECT 0x04011300ul                   ///< No chipselects found
-#define MEM_ERROR_UNSUPPORTED_333MHZ_UDIMM 0x04011500ul        ///< Unbuffered dimm is not supported at 333MHz
-#define MEM_ERROR_WL_PRE_OUT_OF_RANGE 0x040C0300ul             ///< Returned PRE value during write levelizzation was out of range
-#define MEM_ERROR_NO_2D_RDDQS_WINDOW 0x040D0300ul              ///< No 2D RdDqs Window
-#define MEM_ERROR_NO_2D_RDDQS_HEIGHT 0x040E0300ul              ///< No 2D RdDqs Height
-#define MEM_ERROR_2D_DQS_ERROR  0x040F0300ul                   ///< 2d RdDqs Error
-#define MEM_ERROR_INVALID_2D_RDDQS_VALUE  0x04022400ul         ///< 2d RdDqs invalid value found
-#define MEM_ERROR_2D_DQS_VREF_MARGIN_ERROR  0x04023400ul       ///< 2d RdDqs Vef Margin error found
-#define MEM_ERROR_LR_IBT_NOT_FOUND  0x04013500ul               ///< No LR dimm IBT value is found
-#define MEM_ERROR_MR0_NOT_FOUND  0x04023500ul                  ///< No MR0 value is found
-#define MEM_ERROR_ODT_PATTERN_NOT_FOUND  0x04033500ul          ///< No odt pattern value is found
-#define MEM_ERROR_RC2_IBT_NOT_FOUND  0x04043500ul              ///< No RC2 IBT value is found
-#define MEM_ERROR_RC10_OP_SPEED_NOT_FOUND  0x04053500ul        ///< No RC10 op speed is found
-#define MEM_ERROR_RTT_NOT_FOUND  0x04063500ul                  ///< No RTT value is found
-#define MEM_ERROR_P2D_NOT_FOUND  0x04073500ul                  ///< No 2D training config value is found
-#define MEM_ERROR_SAO_NOT_FOUND  0x04083500ul                  ///< No slow access mode, Address timing and Output driver compensation value is found
-#define MEM_ERROR_CLK_DIS_MAP_NOT_FOUND  0x04093500ul          ///< No CLK disable map is found
-#define MEM_ERROR_CKE_TRI_MAP_NOT_FOUND  0x040A3500ul          ///< No CKE tristate map is found
-#define MEM_ERROR_ODT_TRI_MAP_NOT_FOUND  0x040B3500ul          ///< No ODT tristate map is found
-#define MEM_ERROR_CS_TRI_MAP_NOT_FOUND  0x040C3500ul           ///< No CS tristate map is found
-#define MEM_ERROR_TRAINING_SEED_NOT_FOUND  0x040D3500ul        ///< No training seed is found
-#define MEM_ERROR_NO_2D_WRDAT_WINDOW 0x040D0400ul              ///< No 2D WrDat Window
-#define MEM_ERROR_NO_2D_WRDAT_HEIGHT 0x040E0400ul              ///< No 2D WrDat Height
-#define MEM_ERROR_2D_WRDAT_ERROR  0x040F0400ul                 ///< 2d WrDat Error
-#define MEM_ERROR_INVALID_2D_WRDAT_VALUE  0x04100400ul         ///< 2d WrDat invalid value found
-#define MEM_ERROR_2D_WRDAT_VREF_MARGIN_ERROR  0x04110400ul     ///< 2d WrDat Vef Margin error found
-#define MEM_ERROR_PMU_TRAINING 0x04120400ul                    ///< Fail PMU training.
-
-// AGESA_WARNING Memory Errors
-#define MEM_WARNING_UNSUPPORTED_QRDIMM      0x04011600ul       ///< QR DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_UDIMM       0x04021600ul       ///< U DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_SODIMM      0x04031600ul       ///< SO-DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_X4DIMM      0x04041600ul       ///< x4 DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_RDIMM       0x04051600ul       ///< R DIMMs detected but not supported
-#define MEM_WARNING_UNSUPPORTED_LRDIMM      0x04061600ul       ///< LR DIMMs detected but not supported
-#define MEM_WARNING_EMP_NOT_SUPPORTED       0x04011700ul       ///< Processor is not capable for EMP
-#define MEM_WARNING_EMP_CONFLICT            0x04021700ul       ///< EMP cannot be enabled if channel interleaving,
-#define MEM_WARNING_EMP_NOT_ENABLED         0x04031700ul       ///< Memory size is not power of two.
-#define MEM_WARNING_ECC_DIS                 0x04041700ul       ///< ECC has been disabled as a result of an internal issue
-#define MEM_WARNING_PERFORMANCE_ENABLED_BATTERY_LIFE_PREFERRED 0x04011800ul  ///< Performance has been enabled, but battery life is preferred.
-                                                                             ///< bank interleaving, or bank swizzle is enabled.
-#define MEM_WARNING_NO_SPDTRC_FOUND               0x04011900ul ///< No Trc timing value found in SPD of a dimm.
-#define MEM_WARNING_NODE_INTERLEAVING_NOT_ENABLED 0x04012000ul ///< Node Interleaveing Requested, but could not be enabled
-#define MEM_WARNING_CHANNEL_INTERLEAVING_NOT_ENABLED 0x04012100ul ///< Channel Interleaveing Requested, but could not be enabled
-#define MEM_WARNING_BANK_INTERLEAVING_NOT_ENABLED 0x04012200ul ///< Bank Interleaveing Requested, but could not be enabled
-#define MEM_WARNING_VOLTAGE_1_35_NOT_SUPPORTED    0x04012300ul ///< Voltage 1.35 determined, but could not be supported
-#define MEM_WARNING_INITIAL_DDR3VOLT_NONZERO      0x04012400ul ///< DDR3 voltage initial value is not 0
-#define MEM_WARNING_NO_COMMONLY_SUPPORTED_VDDIO   0x04012500ul ///< Cannot find a commonly supported VDDIO
-#define MEM_WARNING_AMP_SUPPORT_DETECTED_BUT_NOT_ENABLED 0x04012900ul ///< AMP support detected but not enabled
-#define MEM_WARNING_AMP_SELECTED_BUT_NOT_ENABLED  0x04022900ul ///< AMP selected but not enabled
-
-// AGESA_FATAL Memory Errors
-#define MEM_ERROR_MINIMUM_MODE              0x04011A00ul       ///< Running in minimum mode
-#define MEM_ERROR_MODULE_TYPE_MISMATCH_DIMM 0x04011B00ul       ///< DIMM modules are miss-matched
-#define MEM_ERROR_NO_DIMM_FOUND_ON_SYSTEM   0x04011C00ul       ///< No DIMMs have been found
-#define MEM_ERROR_MISMATCH_DIMM_CLOCKS      0x04011D00ul       ///< DIMM clocks miss-matched
-#define MEM_ERROR_NO_CYC_TIME               0x04011E00ul       ///< No cycle time found
-#define MEM_ERROR_HEAP_ALLOCATE_DYN_STORING_OF_TRAINED_TIMINGS     0x04011F00ul  ///< Heap allocation error with dynamic storing of trained timings
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_DCT_STRUCT_AND_CH_DEF_STRUCTs  0x04021F00ul  ///< Heap allocation error for DCT_STRUCT and CH_DEF_STRUCT
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_REMOTE_TRAINING_ENV   0x04031F00ul           ///< Heap allocation error with REMOTE_TRAINING_ENV
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_SPD               0x04041F00ul    ///< Heap allocation error for SPD data
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_RECEIVED_DATA     0x04051F00ul    ///< Heap allocation error for RECEIVED_DATA during parallel training
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_S3_SPECIAL_CASE_REGISTERS     0x04061F00ul   ///< Heap allocation error for S3 "SPECIAL_CASE_REGISTER"
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_TRAINING_DATA     0x04071F00ul    ///< Heap allocation error for Training Data
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_IDENTIFY_DIMM_MEM_NB_BLOCK    0x04081F00ul   ///< Heap allocation error for  DIMM Identify "MEM_NB_BLOCK
-#define MEM_ERROR_NO_CONSTRUCTOR_FOR_IDENTIFY_DIMM    0x04022300ul    ///< No Constructor for DIMM Identify
-#define MEM_ERROR_VDDIO_UNSUPPORTED                   0x04022500ul    ///< VDDIO of the dimms on the board is not supported
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_2D                0x040B1F00ul    ///< Heap allocation error for 2D training data
-#define MEM_ERROR_HEAP_DEALLOCATE_FOR_2D              0x040C1F00ul    ///< Heap de-allocation error for 2D training data
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_DATAEYE           0x040F1F00ul    ///< Heap allocation error for DATAEYE Storage
-#define MEM_ERROR_HEAP_DEALLOCATE_FOR_DATAEYE         0x040E1F00ul    ///< Heap de-allocation error for DATAEYE Storage
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_PMU_SRAM_MSG_BLOCK            0x04101F00ul    ///< Heap allocation error for PMU SRAM Message Block Storage
-#define MEM_ERROR_HEAP_DEALLOCATE_FOR_PMU_SRAM_MSG_BLOCK          0x04111F00ul    ///< Heap de-allocation error for PMU SRAM Message Block Storage
-#define MEM_ERROR_HEAP_LOCATE_FOR_PMU_SRAM_MSG_BLOCK              0x04121F00ul    ///< Heap location error for PMU SRAM Message Block Storage
-
-// AGESA_CRITICAL Memory Errors
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR3    0x04091F00ul    ///< Heap allocation error for DMI table for DDR3
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR2    0x040A1F00ul    ///< Heap allocation error for DMI table for DDR2
-#define MEM_ERROR_UNSUPPORTED_DIMM_CONFIG             0x04011400ul    ///< Dimm population is not supported
-#define MEM_ERROR_HEAP_ALLOCATE_FOR_CRAT_MEM_AFFINITY 0x040D1F00ul    ///< Heap allocation error for CRAT memory affinity info
-
-
-
-/*----------------------------------------------------------------------------
- *
- *                END OF MEMORY-SPECIFIC DATA STRUCTURES
- *
- *----------------------------------------------------------------------------
- */
-
-
-
-
-/*----------------------------------------------------------------------------
- *
- *                    CPU RELATED DEFINITIONS
- *
- *----------------------------------------------------------------------------
- */
-
-// CPU Event definitions.
-
-// Defines used to filter CPU events based on functional blocks
-#define CPU_EVENT_PM_EVENT_MASK                         0xFF00FF00ul
-#define CPU_EVENT_PM_EVENT_CLASS                        0x08000400ul
-
-//================================================================
-// CPU General events
-//    Heap allocation                     (AppFunction =      01h)
-#define CPU_ERROR_HEAP_BUFFER_IS_NOT_PRESENT            0x08000100ul
-#define CPU_ERROR_HEAP_IS_ALREADY_INITIALIZED           0x08010100ul
-#define CPU_ERROR_HEAP_IS_FULL                          0x08020100ul
-#define CPU_ERROR_HEAP_BUFFER_HANDLE_IS_ALREADY_USED    0x08030100ul
-#define CPU_ERROR_HEAP_BUFFER_HANDLE_IS_NOT_PRESENT     0x08040100ul
-//    BrandId                             (AppFunction =      02h)
-#define CPU_ERROR_BRANDID_HEAP_NOT_AVAILABLE            0x08000200ul
-//    Micro code patch                    (AppFunction =      03h)
-#define CPU_ERROR_MICRO_CODE_PATCH_IS_NOT_LOADED        0x08000300ul
-//    Power management                    (AppFunction =      04h)
-#define CPU_EVENT_PM_PSTATE_OVERCURRENT                 0x08000400ul
-#define CPU_EVENT_PM_ALL_PSTATE_OVERCURRENT             0x08010400ul
-#define CPU_ERROR_PSTATE_HEAP_NOT_AVAILABLE             0x08020400ul
-#define CPU_ERROR_PM_NB_PSTATE_MISMATCH                 0x08030400ul
-#define CPU_ERROR_PM_ALL_PSTATE_OVER_FREQUENCY_LIMIT    0x08040400ul
-#define CPU_EVENT_PM_PSTATE_FREQUENCY_LIMIT             0x08050400ul
-//    Other CPU events                    (AppFunction =      05h)
-#define CPU_EVENT_BIST_ERROR                            0x08000500ul
-#define CPU_EVENT_UNKNOWN_PROCESSOR_FAMILY              0x08010500ul
-#define CPU_EVENT_STACK_REENTRY                         0x08020500ul
-#define CPU_EVENT_CORE_NOT_IDENTIFIED                   0x08030500ul
-
-//=================================================================
-// CPU Feature events
-//    Execution cache                     (AppFunction =      21h)
-//        AGESA_CACHE_SIZE_REDUCED                            2101
-//        AGESA_CACHE_REGIONS_ACROSS_1MB                      2102
-//        AGESA_CACHE_REGIONS_ACROSS_4GB                      2103
-//        AGESA_REGION_NOT_ALIGNED_ON_BOUNDARY                2104
-//        AGESA_CACHE_START_ADDRESS_LESS_D0000                2105
-//        AGESA_THREE_CACHE_REGIONS_ABOVE_1MB                 2106
-//        AGESA_DEALLOCATE_CACHE_REGIONS                      2107
-#define CPU_EVENT_EXECUTION_CACHE_ALLOCATION_ERROR      0x08002100ul
-//    Core Leveling                       (AppFunction =      22h)
-#define CPU_WARNING_ADJUSTED_LEVELING_MODE              0x08002200ul
-//    SCS initialization                  (AppFunction =      24h)
-//        AGESA_SCS_HEAP_ENTRY_MISSING                        2401
-//        AGESA_SCS_BUFFER_EMPTY                              2402
-//        AGESA_SCS_WEIGHTS_MISMATCH                          2403
-#define CPU_EVENT_SCS_INITIALIZATION_ERROR              0x08002400ul
-
-// CPU Build Configuration structures and definitions
-
-/// Build Configuration structure for BLDCFG_AP_MTRR_SETTINGS
-typedef struct {
-  IN  UINT32 MsrAddr;     ///< Fixed-Sized MTRR address
-  IN  UINT64 MsrData;     ///< MTRR Settings
-} AP_MTRR_SETTINGS;
-
-#define AMD_AP_MTRR_FIX64k_00000    0x00000250ul
-#define AMD_AP_MTRR_FIX16k_80000    0x00000258ul
-#define AMD_AP_MTRR_FIX16k_A0000    0x00000259ul
-#define AMD_AP_MTRR_FIX4k_C0000     0x00000268ul
-#define AMD_AP_MTRR_FIX4k_C8000     0x00000269ul
-#define AMD_AP_MTRR_FIX4k_D0000     0x0000026Aul
-#define AMD_AP_MTRR_FIX4k_D8000     0x0000026Bul
-#define AMD_AP_MTRR_FIX4k_E0000     0x0000026Cul
-#define AMD_AP_MTRR_FIX4k_E8000     0x0000026Dul
-#define AMD_AP_MTRR_FIX4k_F0000     0x0000026Eul
-#define AMD_AP_MTRR_FIX4k_F8000     0x0000026Ful
-#define CPU_LIST_TERMINAL           0xFFFFFFFFul
-
-/// Data structure for the Mapping Item between Unified ID for IDS Setup Option
-/// and the option value.
-///
-typedef struct {
-  IN    UINT16 IdsNvId;           ///< Unified ID for IDS Setup Option.
-  OUT UINT16 IdsNvValue;        ///< The value of IDS Setup Option.
-} IDS_NV_ITEM;
-
-/// Data Structure for IDS CallOut Function
-typedef struct {
-  IN    AMD_CONFIG_PARAMS StdHeader;        ///< Standard configuration header
-  IN    IDS_NV_ITEM *IdsNvPtr;              ///< Memory Pointer of IDS NV Table
-  IN OUT UINTN Reserved;              ///< reserved
-} IDS_CALLOUT_STRUCT;
-
-/// Data Structure for Connected Standby Function
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;           ///< Standard configuration header
-  IN       VOID              *CsRestoreTable;     ///< Pointer to the CsRestoreTable
-  IN       UINT32            CsRestoreTableSize;  ///< Size in bytes of the CsRestoreTable
-} CS_CALLOUT_STRUCT;
-
-/************************************************************************
- *
- *  AGESA interface Call-Out function parameter structures
- *
- ***********************************************************************/
-
-/// Parameters structure for interface call-out AgesaAllocateBuffer
-typedef struct {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;      ///< Standard configuration header
-  IN OUT    UINT32              BufferLength;   ///< Size of buffer to allocate
-  IN        UINT32              BufferHandle;   ///< Identifier or name for the buffer
-  OUT       VOID                *BufferPointer; ///< location of the created buffer
-} AGESA_BUFFER_PARAMS;
-
-/// Parameters structure for interface call-out AgesaHeapRebase
-typedef struct {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;      ///< Standard configuration header
-     OUT    UINTN               HeapAddress;    ///< The address which heap content will be temporarily stored in
-} AGESA_REBASE_PARAMS;
-
-/// Parameters structure for interface call-out AgesaRunCodeOnAp
-typedef struct {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;            ///< Standard configuration header
-  IN        UINT32              FunctionNumber;       ///< Index of the procedure to execute
-  IN        VOID                *RelatedDataBlock;    ///< Location of data structure the procedure will use
-  IN        UINT32              RelatedBlockLength;   ///< Size of the related data block
-} AP_EXE_PARAMS;
-
-/// Parameters structure for the interface call-out AgesaReadSpd & AgesaReadSpdRecovery
-typedef struct {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;      ///< Standard configuration header
-  IN        UINT8               SocketId;       ///< Address of SPD - socket ID
-  IN        UINT8               MemChannelId;   ///< Address of SPD - memory channel ID
-  IN        UINT8               DimmId;         ///< Address of SPD - DIMM ID
-  IN OUT    UINT8               *Buffer;        ///< Location where to place the SPD content
-  IN OUT    MEM_DATA_STRUCT     *MemData;       ///< Location of the MemData structure, for reference
-} AGESA_READ_SPD_PARAMS;
-
-/// VoltageType values
-typedef enum {
-  VTYPE_CPU_VREF,                                    ///< Cpu side Vref
-  VTYPE_DIMM_VREF,                                   ///< Dimm Side Vref
-  VTYPE_VDDIO                                        ///< Vddio
-} VTYPE;
-
-/// Parameters structure for the interface call-out AgesaExternalVoltageAdjust
-typedef struct _VOLTAGE_ADJUST {
-  IN OUT    AMD_CONFIG_PARAMS   StdHeader;     ///< Standard configuration header
-  IN OUT    MEM_DATA_STRUCT     *MemData;      ///< Location of the MemData structure, for reference
-  IN        VTYPE               VoltageType;   ///< Which Voltage Type to adjust
-  IN        INT8                AdjustValue;   ///< Positive/Negative Adjust Value
-} VOLTAGE_ADJUST;
-
-/// Buffer Handles
-typedef enum {
-  AMD_DMI_INFO_BUFFER_HANDLE = 0x000D000,       ///< Assign 0x000D000 buffer handle to DMI function
-  AMD_PSTATE_DATA_BUFFER_HANDLE,                ///< Assign 0x000D001 buffer handle to Pstate data
-  AMD_PSTATE_ACPI_BUFFER_HANDLE,                ///< Assign 0x000D002 buffer handle to Pstate table
-  AMD_BRAND_ID_BUFFER_HANDLE,                   ///< Assign 0x000D003 buffer handle to Brand ID
-  AMD_ACPI_SLIT_BUFFER_HANDLE,                  ///< Assign 0x000D004 buffer handle to SLIT function
-  AMD_SRAT_INFO_BUFFER_HANDLE,                  ///< Assign 0x000D005 buffer handle to SRAT function
-  AMD_WHEA_BUFFER_HANDLE,                       ///< Assign 0x000D006 buffer handle to WHEA function
-  AMD_S3_INFO_BUFFER_HANDLE,                    ///< Assign 0x000D007 buffer handle to S3 function
-  AMD_S3_NB_INFO_BUFFER_HANDLE,                 ///< Assign 0x000D008 buffer handle to S3 NB device info
-  AMD_ACPI_ALIB_BUFFER_HANDLE,                  ///< Assign 0x000D009 buffer handle to ALIB SSDT table
-  AMD_ACPI_IVRS_BUFFER_HANDLE,                  ///< Assign 0x000D00A buffer handle to IOMMU IVRS table
-  AMD_CRAT_INFO_BUFFER_HANDLE,                  ///< Assign 0x000D00B buffer handle to CRAT function
-  AMD_ACPI_CDIT_BUFFER_HANDLE                   ///< Assign 0x000D00C buffer handle to CDIT function
-} AMD_BUFFER_HANDLE;
-
-
-/************************************************************************
- *
- *  AGESA interface Call-Out function prototypes
- *
- ***********************************************************************/
-
-VOID
-AgesaDoReset (
-  IN        UINTN               ResetType,
-  IN OUT    AMD_CONFIG_PARAMS   *StdHeader
-  );
-
-AGESA_STATUS
-AgesaAllocateBuffer (
-  IN      UINTN                 FcnData,
-  IN OUT  AGESA_BUFFER_PARAMS   *AllocParams
-  );
-
-AGESA_STATUS
-AgesaDeallocateBuffer (
-  IN      UINTN                 FcnData,
-  IN OUT  AGESA_BUFFER_PARAMS   *DeallocParams
-  );
-
-AGESA_STATUS
-AgesaLocateBuffer (
-  IN      UINTN                 FcnData,
-  IN OUT  AGESA_BUFFER_PARAMS   *LocateParams
-  );
-
-AGESA_STATUS
-AgesaHeapRebase (
-  IN      UINTN                 FcnData,
-  IN OUT  AGESA_REBASE_PARAMS   *RebaseParams
-  );
-
-AGESA_STATUS
-AgesaReadSpd (
-  IN        UINTN                 FcnData,
-  IN OUT    AGESA_READ_SPD_PARAMS *ReadSpd
-  );
-
-AGESA_STATUS
-AgesaReadSpdRecovery (
-  IN        UINTN                 FcnData,
-  IN OUT    AGESA_READ_SPD_PARAMS *ReadSpd
-  );
-
-AGESA_STATUS
-AgesaHookBeforeDramInitRecovery (
-  IN       UINTN           FcnData,
-  IN OUT   MEM_DATA_STRUCT *MemData
-  );
-
-AGESA_STATUS
-AgesaRunFcnOnAp (
-  IN        UINTN               ApicIdOfCore,
-  IN        AP_EXE_PARAMS       *LaunchApParams
-  );
-
-AGESA_STATUS
-AgesaHookBeforeDramInit (
-  IN        UINTN               SocketIdModuleId,
-  IN OUT    MEM_DATA_STRUCT     *MemData
-  );
-
-AGESA_STATUS
-AgesaHookBeforeDQSTraining (
-  IN        UINTN               SocketIdModuleId,
-  IN OUT    MEM_DATA_STRUCT     *MemData
-  );
-
-AGESA_STATUS
-AgesaHookBeforeExitSelfRefresh (
-  IN        UINTN               FcnData,
-  IN OUT    MEM_DATA_STRUCT     *MemData
-  );
-
-AGESA_STATUS
-AgesaPcieSlotResetControl (
-  IN      UINTN                 FcnData,
-  IN      PCIe_SLOT_RESET_INFO  *ResetInfo
- );
-
-AGESA_STATUS
-AgesaGetVbiosImage (
-  IN       UINTN                 FcnData,
-  IN OUT   GFX_VBIOS_IMAGE_INFO *VbiosImageInfo
-  );
-
-AGESA_STATUS
-AgesaFchOemCallout (
-  IN      VOID                  *FchData
- );
-
-AGESA_STATUS
-AgesaExternal2dTrainVrefChange (
-  IN        UINTN               SocketIdModuleId,
-  IN OUT    MEM_DATA_STRUCT     *MemData
-  );
-
-AGESA_STATUS
-AgesaGetIdsData  (
-  IN       UINTN              Data,
-  IN OUT   IDS_CALLOUT_STRUCT *IdsCalloutData
-  );
-
-AGESA_STATUS
-AgesaExternalVoltageAdjust (
-  IN       UINTN           SocketIdModuleId,
-  IN OUT   VOLTAGE_ADJUST *AdjustValue
-  );
-
-AGESA_STATUS
-AgesaPublishCsRestorationData (
-  IN       UINTN             Reserved,
-  IN OUT   CS_CALLOUT_STRUCT *AdjustValue
-  );
-
-AGESA_STATUS
-AgesaGnbOemCallout (
-  IN        AMD_CONFIG_PARAMS   *StdHeader,
-  IN        UINTN               FcnData,
-  IN OUT    VOID                *GnbCalloutData
- );
-
-/************************************************************************
- *
- *  AGESA interface structure definition and function prototypes
- *
- ***********************************************************************/
-
-/**********************************************************************
- * Platform Configuration:  The parameters in boot branch function
- **********************************************************************/
-
-///  The possible platform control flow settings.
-typedef enum  {
-  Nfcm,                                          ///< Normal Flow Control Mode.
-  UmaDr,                                         ///< UMA using Display Refresh flow control.
-  UmaIfcm,                                       ///< UMA using Isochronous Flow Control.
-  Ifcm,                                          ///< Isochronous Flow Control Mode (other than for UMA).
-  Iommu,                                         ///< An IOMMU is in use in the system.
-  MaxControlFlow                                 ///< Not a control flow mode, use for limit checking.
-} PLATFORM_CONTROL_FLOW;
-
-///  The possible hardware prefetch mode settings.
-typedef enum  {
-  HARDWARE_PREFETCHER_AUTO,                     ///< Use the recommended setting for the processor. In most cases, the recommended setting is enabled.
-  DISABLE_HW_PREFETCHER_TRAINING_ON_SOFTWARE_PREFETCHES,  ///< Use the recommended setting for the hardware prefetcher, but disable training on software prefetches.
-  DISABLE_L1_PREFETCHER,                        ///< Use the recommended settings for the hardware prefetcher, but disable L1 prefetching and above.
-  DISABLE_L1_PREFETCHER_AND_HW_PREFETCHER_TRAINING_ON_SOFTWARE_PREFETCHES,  ///< (deprecated) - This setting is deprecated; it has the same effect as DISABLE_L1_PREFETCHER
-  DISABLE_L2_STRIDE_PREFETCHER,                 ///< Use the recommended settings for the hardware prefetcher, but disable the L2 stride prefetcher and above
-  DISABLE_HARDWARE_PREFETCH,                    ///< Disable hardware prefetching.
-  MAX_HARDWARE_PREFETCH_MODE                    ///< Not a hardware prefetch mode, use for limit checking.
-} HARDWARE_PREFETCH_MODE;
-
-///  The possible software prefetch mode settings.
-typedef enum  {
-  SOFTWARE_PREFETCHES_AUTO,                     ///< Use the recommended setting for the processor. In most cases, the recommended setting is enabled.
-  DISABLE_SOFTWARE_PREFETCHES,                  ///< Disable software prefetches (convert software prefetch instructions to NOP).
-  MAX_SOFTWARE_PREFETCH_MODE                    ///< Not a software prefetch mode, use for limit checking.
-} SOFTWARE_PREFETCH_MODE;
-
-/// Advanced performance tunings, prefetchers.
-/// These settings provide for performance tuning to optimize for specific workloads.
-typedef struct {
-  IN HARDWARE_PREFETCH_MODE  HardwarePrefetchMode; ///< This value provides for advanced performance tuning by controlling the hardware prefetcher setting.
-  IN SOFTWARE_PREFETCH_MODE  SoftwarePrefetchMode; ///< This value provides for advanced performance tuning by controlling the software prefetch instructions.
-  IN DRAM_PREFETCH_MODE      DramPrefetchMode;     ///< This value provides for advanced performance tuning by controlling the DRAM prefetcher setting.
-} ADVANCED_PERFORMANCE_PROFILE;
-
-///  The possible platform power policy settings.
-typedef enum  {
-  Performance,                                   ///< Optimize for performance.
-  BatteryLife,                                   ///< Optimize for battery life.
-  MaxPowerPolicy                                 ///< Not a power policy mode, use for limit checking.
-} PLATFORM_POWER_POLICY;
-
-///  Platform performance settings for optimized settings.
-///  Several configuration settings for the processor depend upon other parts and
-///  general designer choices for the system. The determination of these data points
-///  is not standard for all platforms, so the host environment needs to provide these
-///  to specify how the system is to be configured.
-typedef struct {
-  IN PLATFORM_CONTROL_FLOW PlatformControlFlowMode;    ///< The platform's control flow mode for optimum platform performance.
-                                                       ///< @BldCfgItem{BLDCFG_PLATFORM_CONTROL_FLOW_MODE}
-  IN BOOLEAN               Use32ByteRefresh;           ///< Display Refresh traffic generates 32 byte requests.
-                                                       ///< @BldCfgItem{BLDCFG_USE_32_BYTE_REFRESH}
-  IN BOOLEAN               UseVariableMctIsocPriority; ///< The Memory controller will be set to Variable Isoc Priority.
-                                                       ///< @BldCfgItem{BLDCFG_USE_VARIABLE_MCT_ISOC_PRIORITY}
-  IN ADVANCED_PERFORMANCE_PROFILE AdvancedPerformanceProfile;   ///< The advanced platform performance settings.
-  IN PLATFORM_POWER_POLICY PlatformPowerPolicy;        ///< The platform's desired power policy
-                                                       ///< @BldCfgItem{BLDCFG_PLATFORM_POWER_POLICY_MODE}
-  IN BOOLEAN               NbPstatesSupported;         ///< The Nb-Pstates is supported or not
-                                                       ///< @BldCfgItem{BLDCFG_NB_PSTATES_SUPPORTED}
-} PERFORMANCE_PROFILE;
-
-///  Platform settings that describe the voltage regulator modules of the system.
-///  Many power management settings are dependent upon the characteristics of the
-///  on-board voltage regulator module (VRM).  The host environment needs to provide
-///  these to specify how the system is to be configured.
-typedef struct {
-  IN UINT32  CurrentLimit;                         ///< Vrm Current Limit.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_CURRENT_LIMIT}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_CURRENT_LIMIT}
-  IN UINT32  LowPowerThreshold;                    ///< Vrm Low Power Threshold.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_LOW_POWER_THRESHOLD}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_LOW_POWER_THRESHOLD}
-  IN UINT32  SlewRate;                             ///< Vrm Slew Rate.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_SLEW_RATE}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_SLEW_RATE}
-  IN BOOLEAN HiSpeedEnable;                        ///< Select high speed VRM.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_HIGH_SPEED_ENABLE}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_HIGH_SPEED_ENABLE}
-  IN UINT32  MaximumCurrentLimit;                  ///< Vrm Maximum Current Limit.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_MAXIMUM_CURRENT_LIMIT}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_MAXIMUM_CURRENT_LIMIT}
-  IN UINT32  SviOcpLevel;                          ///< SVI OCP Level.
-                                                   ///< @BldCfgItem{BLDCFG_VRM_SVI_OCP_LEVEL}
-                                                   ///< @BldCfgItem{BLDCFG_VRM_NB_SVI_OCP_LEVEL}
-} PLATFORM_VRM_CONFIGURATION;
-
-///  The VRM types to characterize.
-typedef enum  {
-  CoreVrm,                                       ///< VDD plane.
-  NbVrm,                                         ///< VDDNB plane.
-  MaxVrmType                                     ///< Not a valid VRM type, use for limit checking.
-} PLATFORM_VRM_TYPE;
-
-
-/// FCH Platform Configuration Policy
-typedef struct {
-  IN UINT16     CfgSmbus0BaseAddress;             ///< SMBUS0 Controller Base Address
-  IN UINT16     CfgSmbus1BaseAddress;             ///< SMBUS1 Controller Base Address
-  IN UINT16     CfgSioPmeBaseAddress;             ///< I/O base address for LPC I/O target range
-  IN UINT16     CfgAcpiPm1EvtBlkAddr;             ///< I/O base address of ACPI power management Event Block
-  IN UINT16     CfgAcpiPm1CntBlkAddr;             ///< I/O base address of ACPI power management Control Block
-  IN UINT16     CfgAcpiPmTmrBlkAddr;              ///< I/O base address of ACPI power management Timer Block
-  IN UINT16     CfgCpuControlBlkAddr;             ///< I/O base address of ACPI power management CPU Control Block
-  IN UINT16     CfgAcpiGpe0BlkAddr;               ///< I/O base address of ACPI power management General Purpose Event Block
-  IN UINT16     CfgSmiCmdPortAddr;                ///< I/O base address of ACPI SMI Command Block
-  IN UINT16     CfgAcpiPmaCntBlkAddr;             ///< I/O base address of ACPI power management additional control block
-  IN UINT32     CfgGecShadowRomBase;              ///< 32-bit base address to the GEC shadow ROM
-  IN UINT32     CfgWatchDogTimerBase;             ///< Watchdog Timer base address
-  IN UINT32     CfgSpiRomBaseAddress;             ///< Base address for the SPI ROM controller
-  IN UINT32     CfgHpetBaseAddress;               ///< HPET MMIO base address
-  IN UINT32     CfgAzaliaSsid;                    ///< Subsystem ID of HD Audio controller
-  IN UINT32     CfgSmbusSsid;                     ///< Subsystem ID of SMBUS controller
-  IN UINT32     CfgIdeSsid;                       ///< Subsystem ID of IDE controller
-  IN UINT32     CfgSataAhciSsid;                  ///< Subsystem ID of SATA controller in AHCI mode
-  IN UINT32     CfgSataIdeSsid;                   ///< Subsystem ID of SATA controller in IDE mode
-  IN UINT32     CfgSataRaid5Ssid;                 ///< Subsystem ID of SATA controller in RAID5 mode
-  IN UINT32     CfgSataRaidSsid;                  ///< Subsystem ID of SATA controller in RAID mode
-  IN UINT32     CfgEhciSsid;                      ///< Subsystem ID of EHCI
-  IN UINT32     CfgOhciSsid;                      ///< Subsystem ID of OHCI
-  IN UINT32     CfgLpcSsid;                       ///< Subsystem ID of LPC ISA Bridge
-  IN UINT32     CfgSdSsid;                        ///< Subsystem ID of SecureDigital controller
-  IN UINT32     CfgXhciSsid;                      ///< Subsystem ID of XHCI
-  IN BOOLEAN    CfgFchPort80BehindPcib;           ///< Is port80 cycle going to the PCI bridge
-  IN BOOLEAN    CfgFchEnableAcpiSleepTrap;        ///< ACPI sleep SMI enable/disable
-  IN GPP_LINKMODE CfgFchGppLinkConfig;            ///< GPP link configuration
-  IN BOOLEAN    CfgFchGppPort0Present;            ///< Is FCH GPP port 0 present
-  IN BOOLEAN    CfgFchGppPort1Present;            ///< Is FCH GPP port 1 present
-  IN BOOLEAN    CfgFchGppPort2Present;            ///< Is FCH GPP port 2 present
-  IN BOOLEAN    CfgFchGppPort3Present;            ///< Is FCH GPP port 3 present
-  IN BOOLEAN    CfgFchGppPort0HotPlug;            ///< Is FCH GPP port 0 hotplug capable
-  IN BOOLEAN    CfgFchGppPort1HotPlug;            ///< Is FCH GPP port 1 hotplug capable
-  IN BOOLEAN    CfgFchGppPort2HotPlug;            ///< Is FCH GPP port 2 hotplug capable
-  IN BOOLEAN    CfgFchGppPort3HotPlug;            ///< Is FCH GPP port 3 hotplug capable
-
-  IN UINT8   CfgFchEsataPortBitMap;               ///< ESATA Port definition, eg: [0]=1, means port 0 is ESATA capable
-  IN UINT8   CfgFchIrPinControl;                  ///< Register bitfield describing Infrared Pin Control:
-                                                  ///<   [0] - IR Enable 0
-                                                  ///<   [1] - IR Enable 1
-                                                  ///<   [2] - IR Tx0
-                                                  ///<   [3] - IR Tx1
-                                                  ///<   [4] - IR Open Drain
-                                                  ///<   [5] - IR Enable LED
-  IN SD_CLOCK_CONTROL CfgFchSdClockControl;       ///< FCH SD Clock Control
-  IN SCI_MAP_CONTROL  *CfgFchSciMapControl;       ///< FCH SCI Mapping Control
-  IN SATA_PHY_CONTROL *CfgFchSataPhyControl;      ///< FCH SATA PHY Control
-  IN GPIO_CONTROL     *CfgFchGpioControl;         ///< FCH GPIO Control
-  IN BOOLEAN          CfgFchRtcWorkAround;        ///< FCH RTC Workaround
-  IN BOOLEAN          CfgFchUsbPortDisWorkAround; ///< FCH USB Workaround
-} FCH_PLATFORM_POLICY;
-
-
-/// Build Option/Configuration Boolean Structure.
-typedef struct {
-  IN  AMD_CODE_HEADER VersionString;              ///< AMD embedded code version string
-
-  //Build Option Area
-  IN BOOLEAN OptionUDimms;                        ///< @ref BLDOPT_REMOVE_UDIMMS_SUPPORT "BLDOPT_REMOVE_UDIMMS_SUPPORT"
-  IN BOOLEAN OptionRDimms;                        ///< @ref BLDOPT_REMOVE_RDIMMS_SUPPORT "BLDOPT_REMOVE_RDIMMS_SUPPORT"
-  IN BOOLEAN OptionLrDimms;                       ///< @ref BLDOPT_REMOVE_LRDIMMS_SUPPORT "BLDOPT_REMOVE_LRDIMMS_SUPPORT"
-  IN BOOLEAN OptionEcc;                           ///< @ref BLDOPT_REMOVE_ECC_SUPPORT "BLDOPT_REMOVE_ECC_SUPPORT"
-  IN BOOLEAN OptionBankInterleave;                ///< @ref BLDOPT_REMOVE_BANK_INTERLEAVE "BLDOPT_REMOVE_BANK_INTERLEAVE"
-  IN BOOLEAN OptionDctInterleave;                 ///< @ref BLDOPT_REMOVE_DCT_INTERLEAVE "BLDOPT_REMOVE_DCT_INTERLEAVE"
-  IN BOOLEAN OptionNodeInterleave;                ///< @ref BLDOPT_REMOVE_NODE_INTERLEAVE "BLDOPT_REMOVE_NODE_INTERLEAVE"
-  IN BOOLEAN OptionParallelTraining;              ///< @ref BLDOPT_REMOVE_PARALLEL_TRAINING "BLDOPT_REMOVE_PARALLEL_TRAINING"
-  IN BOOLEAN OptionOnlineSpare;                   ///< @ref BLDOPT_REMOVE_ONLINE_SPARE_SUPPORT "BLDOPT_REMOVE_ONLINE_SPARE_SUPPORT"
-  IN BOOLEAN OptionMemRestore;                    ///< @ref BLDOPT_REMOVE_MEM_RESTORE_SUPPORT "BLDOPT_REMOVE_MEM_RESTORE_SUPPORT"
-  IN BOOLEAN OptionMultisocket;                   ///< @ref BLDOPT_REMOVE_MULTISOCKET_SUPPORT "BLDOPT_REMOVE_MULTISOCKET_SUPPORT"
-  IN BOOLEAN OptionAcpiPstates;                   ///< @ref BLDOPT_REMOVE_ACPI_PSTATES "BLDOPT_REMOVE_ACPI_PSTATES"
-  IN BOOLEAN OptionCrat;                          ///< @ref BLDOPT_REMOVE_CRAT "BLDOPT_REMOVE_CRAT"
-  IN BOOLEAN OptionCdit;                          ///< @ref BLDOPT_REMOVE_CDIT "BLDOPT_REMOVE_CDIT"
-  IN BOOLEAN OptionSrat;                          ///< @ref BLDOPT_REMOVE_SRAT "BLDOPT_REMOVE_SRAT"
-  IN BOOLEAN OptionSlit;                          ///< @ref BLDOPT_REMOVE_SLIT "BLDOPT_REMOVE_SLIT"
-  IN BOOLEAN OptionWhea;                          ///< @ref BLDOPT_REMOVE_WHEA "BLDOPT_REMOVE_WHEA"
-  IN BOOLEAN OptionDmi;                           ///< @ref BLDOPT_REMOVE_DMI "BLDOPT_REMOVE_DMI"
-  IN BOOLEAN OptionEarlySamples;                  ///< @ref BLDOPT_REMOVE_EARLY_SAMPLES "BLDOPT_REMOVE_EARLY_SAMPLES"
-  IN BOOLEAN OptionAddrToCsTranslator;            ///< ADDR_TO_CS_TRANSLATOR
-
-  //Build Configuration Area
-  IN UINT64 CfgPciMmioAddress;                    ///< Pci Mmio Base Address to use for PCI Config accesses.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_PCI_MMIO_BASE}
-  IN UINT32 CfgPciMmioSize;                       ///< Pci Mmio region Size.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_PCI_MMIO_SIZE}
-  IN PLATFORM_VRM_CONFIGURATION CfgPlatVrmCfg[MaxVrmType]; ///< Several configuration settings for the voltage regulator modules.
-  IN UINT32 CfgCpuFrequencyLimit;                 ///< CPU frequency limit
-  IN PLATFORM_CONNECTED_STANDBY_MODES CfgPlatformConnectedStandbyMode; ///< Enable or disable connected standby
-  IN UINT32 CfgPlatNumIoApics;                    ///< The number of IO APICS for the platform.
-  IN UINT32 CfgMemInitPstate;                     ///< Memory Init Pstate.
-  IN PLATFORM_CSTATE_MODES CfgPlatformCStateMode; ///< Select the C-State Mode that will used.
-  IN UINT32 CfgPlatformCStateOpData;              ///< An IO port or additional C-State setup data, depends on C-State mode.
-  IN UINT16 CfgPlatformCStateIoBaseAddress;       ///< Specifies I/O ports that can be used to allow CPU to enter CStates
-  IN PLATFORM_CPB_MODES CfgPlatformCpbMode;       ///< Enable or disable core performance boost
-  IN PLATFORM_LOW_POWER_PSTATE_MODES CfgLowPowerPstateForProcHot; ///< Low power Pstate for PROCHOT mode
-  IN UINT32 CfgCoreLevelingMode;                  ///< Apply any downcoring or core count leveling as specified.
-  IN PERFORMANCE_PROFILE CfgPerformanceProfile;   ///< The platform's control flow mode and platform performance settings.
-
-  IN UINT32 CfgAmdPlatformType;                   ///< Designate the platform as a Server, Desktop, or Mobile.
-  IN UINT32 CfgAmdPowerCeiling;                   ///< PowerCeiling, specifies a maximum power usage limit for the platform
-  IN UINT16 CfgHtcTemperatureLimit;               ///< Hardware Thermal Control temperature limit in tenths of degrees Celsius.
-  IN UINT16 CfgLhtcTemperatureLimit;              ///< Local Hardware Thermal Control temperature limit in tenths of degrees Celsius.
-
-  IN UINT32 CfgMemoryBusFrequencyLimit;           ///< Memory Bus Frequency Limit.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT}
-  IN BOOLEAN CfgMemoryModeUnganged;               ///< Memory Mode Unganged.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_MODE_UNGANGED}
-  IN BOOLEAN CfgMemoryQuadRankCapable;            ///< Memory Quad Rank Capable.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_QUAD_RANK_CAPABLE}
-  IN UINT32 CfgMemoryQuadrankType;        ///< Memory Quadrank Type.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_QUADRANK_TYPE}
-  IN BOOLEAN CfgMemoryRDimmCapable;               ///< Memory RDIMM Capable.
-  IN BOOLEAN CfgMemoryLRDimmCapable;              ///< Memory LRDIMM Capable.
-  IN BOOLEAN CfgMemoryUDimmCapable;               ///< Memory UDIMM Capable.
-  IN BOOLEAN CfgMemorySODimmCapable;              ///< Memory SODimm Capable.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_SODIMM_CAPABLE}
-  IN BOOLEAN CfgLimitMemoryToBelow1Tb;            ///< Limit memory address space to below 1TB
-  IN BOOLEAN CfgMemoryEnableBankInterleaving;     ///< Memory Enable Bank Interleaving.
-  IN BOOLEAN CfgMemoryEnableNodeInterleaving;     ///< Memory Enable Node Interleaving.
-  IN BOOLEAN CfgMemoryChannelInterleaving;        ///< Memory Channel Interleaving.
-  IN BOOLEAN CfgMemoryPowerDown;                  ///< Memory Power Down.
-  IN UINT32  CfgPowerDownMode;                    ///< Power Down Mode.
-  IN BOOLEAN CfgOnlineSpare;                      ///< Online Spare.
-  IN BOOLEAN CfgMemoryParityEnable;               ///< Memory Parity Enable.
-  IN BOOLEAN CfgBankSwizzle;                      ///< Bank Swizzle.
-  IN UINT32  CfgTimingModeSelect;                 ///< Timing Mode Select.
-  IN UINT32  CfgMemoryClockSelect;                ///< Memory Clock Select.
-  IN BOOLEAN CfgDqsTrainingControl;               ///< Dqs Training Control.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_DQS_TRAINING_CONTROL}
-  IN BOOLEAN CfgIgnoreSpdChecksum;                ///< Ignore Spd Checksum.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_IGNORE_SPD_CHECKSUM}
-  IN BOOLEAN CfgUseBurstMode;                     ///< Use Burst Mode.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_USE_BURST_MODE}
-  IN BOOLEAN CfgMemoryAllClocksOn;                ///< Memory All Clocks On.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_MEMORY_ALL_CLOCKS_ON}
-  IN BOOLEAN CfgDdrPhyDllBypassMode;              ///< Enable DllPDBypassMode
-  IN BOOLEAN CfgEnableEccFeature;                 ///< Enable ECC Feature.
-  IN BOOLEAN CfgEccRedirection;                   ///< ECC Redirection.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_ECC_REDIRECTION}
-  IN UINT16  CfgScrubDramRate;                    ///< Scrub Dram Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_DRAM_RATE}
-  IN UINT16  CfgScrubL2Rate;                      ///< Scrub L2Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_L2_RATE}
-  IN UINT16  CfgScrubL3Rate;                      ///< Scrub L3Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_L3_RATE}
-  IN UINT16  CfgScrubIcRate;                      ///< Scrub Ic Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_IC_RATE}
-  IN UINT16  CfgScrubDcRate;                      ///< Scrub Dc Rate.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_SCRUB_DC_RATE}
-  IN BOOLEAN CfgEccSyncFlood;                     ///< ECC Sync Flood.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_ECC_SYNC_FLOOD}
-  IN UINT16  CfgEccSymbolSize;                    ///< ECC Symbol Size.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_ECC_SYMBOL_SIZE}
-  IN UINT64  CfgHeapDramAddress;                  ///< Heap contents will be temporarily stored in this address during the transition.
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_HEAP_DRAM_ADDRESS}
-  IN BOOLEAN CfgNodeMem1GBAlign;                  ///< Node Mem 1GB boundary Alignment
-  IN BOOLEAN CfgS3LateRestore;                    ///< S3 Late Restore
-  IN BOOLEAN CfgAcpiPstateIndependent;            ///< PSD method dependent/Independent
-  IN UINT32  CfgAcpiPstatesPsdPolicy;             ///< PSD policy
-  IN AP_MTRR_SETTINGS *CfgApMtrrSettingsList;     ///< The AP's MTRR settings before final halt
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_AP_MTRR_SETTINGS_LIST}
-  IN UMA_MODE CfgUmaMode;                         ///< Uma Mode
-  IN UINT32 CfgUmaSize;                           ///< Uma Size [31:0]=Addr[47:16]
-  IN BOOLEAN CfgUmaAbove4G;                       ///< Uma Above 4G Support
-  IN UMA_ALIGNMENT CfgUmaAlignment;               ///< Uma alignment
-  IN BOOLEAN CfgProcessorScopeInSb;               ///< ACPI Processor Object in \\_SB scope
-  IN CHAR8   CfgProcessorScopeName0;              ///< OEM specific 1st character of processor scope name.
-  IN CHAR8   CfgProcessorScopeName1;              ///< OEM specific 2nd character of processor scope name.
-  IN UINT8   CfgGnbHdAudio;                       ///< GNB HD Audio
-  IN UINT8   CfgAbmSupport;                       ///< Abm Support
-  IN UINT8   CfgDynamicRefreshRate;               ///< DRR Dynamic Refresh Rate
-  IN UINT16  CfgLcdBackLightControl;              ///< LCD Backlight Control
-  IN UINT8   CfgGnb3dStereoPinIndex;                ///< 3D Stereo Pin ID.
-  IN UINT32  CfgTempPcieMmioBaseAddress;          ///< Temp pcie MMIO base Address
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_TEMP_PCIE_MMIO_BASE_ADDRESS}
-  IN UINT32  CfgGnbIGPUSSID;                      ///< Gnb internal GPU SSID
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_IGPU_SUBSYSTEM_ID}
-  IN UINT32  CfgGnbHDAudioSSID;                   ///< Gnb HD Audio SSID
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID}
-  IN UINT32  CfgGnbPcieSSID;                      ///< Gnb PCIe SSID
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_APU_PCIE_PORTS_SUBSYSTEM_ID}
-  IN UINT16  CfgLvdsSpreadSpectrum;               ///< Lvds Spread Spectrum
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_GFX_LVDS_SPREAD_SPECTRUM}
-  IN UINT16  CfgLvdsSpreadSpectrumRate;           ///< Lvds Spread Spectrum Rate
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_GFX_LVDS_SPREAD_SPECTRUM_RATE}
-  IN FCH_PLATFORM_POLICY  *FchBldCfg;             ///< FCH platform build configuration policy
-
-  IN BOOLEAN    CfgIommuSupport;                  ///< IOMMU support
-  IN UINT8      CfgLvdsPowerOnSeqDigonToDe;       ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqDeToVaryBl;      ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqDeToDigon;       ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqVaryBlToDe;      ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqOnToOffDelay;    ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqVaryBlToBlon;    ///< Panel initialization timing
-  IN UINT8      CfgLvdsPowerOnSeqBlonToVaryBl;    ///< Panel initialization timing
-  IN UINT16     CfgLvdsMaxPixelClockFreq;         ///< The maximum pixel clock frequency supported
-  IN UINT32     CfgLcdBitDepthControlValue;       ///< The LCD bit depth control settings
-  IN UINT8      CfgLvds24bbpPanelMode;            ///< The LVDS 24 BBP mode
-  IN LVDS_MISC_CONTROL CfgLvdsMiscControl;        ///< THe LVDS Misc control
-  IN UINT16     CfgPcieRefClkSpreadSpectrum;      ///< PCIe Reference Clock Spread Spectrum
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_PCIE_REFCLK_SPREAD_SPECTRUM}
-  IN BOOLEAN    CfgExternalVrefCtlFeature;        ///< External Vref control
-  IN FORCE_TRAIN_MODE   CfgForceTrainMode;        ///< Force Train Mode
-  IN BOOLEAN    CfgGnbRemoteDisplaySupport;       ///< Wireless Display Support
-  IN IOMMU_EXCLUSION_RANGE_DESCRIPTOR *CfgIvrsExclusionRangeList;
-  IN BOOLEAN    CfgGnbSyncFloodPinAsNmi;          ///< @ref BLDCFG_USE_SYNCFLOOD_AS_NMI "BLDCFG_USE_SYNCFLOOD_AS_NMI"
-  IN UINT8      CfgIgpuEnableDisablePolicy;       ///< This item defines the iGPU Enable/Disable policy
-                                                  ///< @li 0 = Auto - use current default
-                                                  ///< @li 2 = Disable iGPU if ANY PCI or PCIe Graphics card is present
-                                                  ///< @BldCfgItem{BLDCFG_IGPU_ENABLE_DISABLE_POLICY}
-  IN UINT8      CfgGnbSwTjOffset;                 ///< Software-writeable TjOffset to account for changes in junction temperature
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_GNB_THERMAL_SENSOR_CORRECTION}
-  IN UINT8      CfgLvdsMiscVoltAdjustment;        ///< Register LVDS_CTRL_4 to adjust LVDS output voltage
-                                                  ///< Build-time customizable only - @BldCfgItem{BLDCFG_LVDS_MISC_VOL_ADJUSTMENT}
-  IN DISPLAY_MISC_CONTROL CfgDisplayMiscControl;  ///< The Display Misc control
-  IN DP_FIXED_VOLT_SWING_TYPE CfgDpFixedVoltSwingType;///< To indicate fixed voltage swing value
-                                                      ///< @BldCfgItem{BLDCFG_DP_FIXED_VOLT_SWING}
-  IN TECHNOLOGY_TYPE CfgDimmTypeUsedInMixedConfig; ///< Select the preferred technology type that AGESA will enable
-                                                   ///< when it is mixed with other technology types.
-  IN BOOLEAN CfgHybridBoostEnable;                ///< HyBrid Boost support
-                                                  ///< @BldCfgItem{BLDCFG_HYBRID_BOOST_ENABLE}
-  IN UINT64  CfgGnbIoapicAddress;                 ///< GNB IOAPIC Base Address(NULL if platform configured)
-                                                  ///< @BldCfgItem{BLDCFG_GNB_IOAPIC_ADDRESS}
-  IN BOOLEAN CfgDataEyeEn;                        ///< Enable get 2D Data Eye
-  IN BOOLEAN CfgDockedTdpHeadroom;                ///< @BldCfgItem{BLDCFG_DOCKED_TDP_HEADROOM}
-  IN BOOLEAN CfgBatteryBoostEn;                   ///< @BldCfgItem{BLDCFG_BATTERY_BOOST_EN}
-  IN UINT32 CfgBatteryBoostTune;                  ///< @BldCfgItem{BLDCFG_BATTERY_BOOST_TUNE}
-  IN UINT32 CfgNumGfxCoresEnabled;                ///< @BldCfgItem{BLDCFG_NUM_GFX_CORES_ENABLED}
-  IN UINT32 CfgTdpAcDocked;                       ///< @BldCfgItem{BLDCFG_TDP_AC_DOCKED}
-  IN UINT32 CfgTdpDcDocked;                       ///< @BldCfgItem{BLDCFG_TDP_DC_DOCKED}
-  IN UINT32 CfgTdpAcUnDocked;                     ///< @BldCfgItem{BLDCFG_TDP_AC_UNDOCKED}
-  IN UINT32 CfgTdpDcUnDocked;                     ///< @BldCfgItem{BLDCFG_TDP_DC_UNDOCKED}
-  IN UINT32 CfgTspAcDocked;                       ///< @BldCfgItem{BLDCFG_TSP_AC_DOCKED}
-  IN UINT32 CfgTspDcDocked;                       ///< @BldCfgItem{BLDCFG_TSP_DC_DOCKED}
-  IN UINT32 CfgTspAcUnDocked;                     ///< @BldCfgItem{BLDCFG_TSP_AC_UNDOCKED}
-  IN UINT32 CfgTspDcUnDocked;                     ///< @BldCfgItem{BLDCFG_TSP_DC_UNDOCKED}
-  IN BOOLEAN CfgStapmEnAcDocked;                  ///< @BldCfgItem{BLDCFG_STAPM_EN_AC_DOCKED}
-  IN BOOLEAN CfgStapmEnDcDocked;                  ///< @BldCfgItem{BLDCFG_STAPM_EN_DC_DOCKED}
-  IN BOOLEAN CfgStapmEnAcUnDocked;                ///< @BldCfgItem{BLDCFG_STAPM_EN_AC_UNDOCKED}
-  IN BOOLEAN CfgStapmEnDcUnDocked;                ///< @BldCfgItem{BLDCFG_STAPM_EN_DC_UNDOCKED}
-  IN UINT32 CfgStapmPowerAcDocked;                ///< @BldCfgItem{BLDCFG_STAPM_POWER_AC_DOCKED}
-  IN UINT32 CfgStapmPowerDcDocked;                ///< @BldCfgItem{BLDCFG_STAPM_POWER_DC_DOCKED}
-  IN UINT32 CfgStapmPowerAcUnDocked;              ///< @BldCfgItem{BLDCFG_STAPM_POWER_AC_UNDOCKED}
-  IN UINT32 CfgStapmPowerDcUnDocked;              ///< @BldCfgItem{BLDCFG_STAPM_POWER_DC_UNDOCKED}
-  IN BOOLEAN CfgDramDoubleRefreshRateEn;          ///< Double DRAM refresh rate
-  IN ACP_SIZE  CfgGnbAcpSize;                     ///< ACP size [31:0]=Addr[47:16]
-                                                  ///< @BldCfgItem{BLDCFG_ACP_SIZE}
-  IN PMU_TRAIN_MODE   CfgPmuTrainMode;            ///< Force Train Mode
-                                                  ///< @BldCfgItem{BLDCFG_PMU_TRAINING_MODE}
-  IN MEMORY_PHY_VOLTAGE CfgMemoryPhyVoltage;      ///< Memory Phy voltage (VDDR)
-                                                  ///< @BldCfgItem{BLDCFG_MEMORY_PHY_VOLTAGE}
-  IN UINT32 CfgGpuFrequencyLimit;                 ///< @BldCfgItem{BLDCFG_GPU_FREQUENCY_LIMIT}
-  IN UINT8 CfgMaxNumAudioEndpoints;               ///< @BldCfgItem{BLDCFG_MAX_NUM_AUDIO_ENDPOINTS}
-  IN BOOLEAN Reserved;                            ///< reserved...
-} BUILD_OPT_CFG;
-
-///  A structure containing platform specific operational characteristics. This
-///  structure is initially populated by the initializer with a copy of the same
-///  structure that was created at build time using the build configuration controls.
-typedef struct _PLATFORM_CONFIGURATION {
-  IN PERFORMANCE_PROFILE PlatformProfile;             ///< Several configuration settings for the processor.
-  IN UINT8               CoreLevelingMode;            ///< Indicates how to balance the number of cores per processor.
-                                                      ///< @BldCfgItem{BLDCFG_CORE_LEVELING_MODE}
-  IN PLATFORM_CSTATE_MODES  CStateMode;               ///< Specifies the method of C-State enablement - Disabled, or C6.
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_CSTATE_MODE}
-  IN UINT32              CStatePlatformData;          ///< This element specifies some pertinent data needed for the operation of the Cstate feature
-                                                      ///< If CStateMode is CStateModeC6, this item is reserved
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_CSTATE_OPDATA}
-  IN UINT16              CStateIoBaseAddress;         ///< This item specifies a free block of 8 consecutive bytes of I/O ports that
-                                                      ///< can be used to allow the CPU to enter Cstates.
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_CSTATE_IO_BASE_ADDRESS}
-  IN PLATFORM_CPB_MODES  CpbMode;                     ///< Specifies the method of core performance boost enablement - Disabled, or Auto.
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_CPB_MODE}
-  IN BOOLEAN             UserOptionDmi;               ///< When set to TRUE, the DMI data table is generated.
-  IN BOOLEAN             UserOptionPState;            ///< When set to TRUE, the PState data tables are generated.
-  IN BOOLEAN             UserOptionCrat;              ///< When set to TRUE, the CRAT data table is generated.
-  IN BOOLEAN             UserOptionCdit;              ///< When set to TRUE, the CDIT data table is generated.
-  IN BOOLEAN             UserOptionSrat;              ///< When set to TRUE, the SRAT data table is generated.
-  IN BOOLEAN             UserOptionSlit;              ///< When set to TRUE, the SLIT data table is generated.
-  IN BOOLEAN             UserOptionWhea;              ///< When set to TRUE, the WHEA data table is generated.
-  IN PLATFORM_LOW_POWER_PSTATE_MODES  LowPowerPstateForProcHot; ///< Specifies the method of low power Pstate for PROCHOT enablement - Disabled, or Auto.
-  IN UINT32              PowerCeiling;                ///< P-State Ceiling Enabling Deck - Max power milli-watts.
-  IN BOOLEAN             ForcePstateIndependent;      ///< Deprecated in favor of PstatesPsdPolicy.
-                                                      ///< P-State _PSD is forced independent.
-                                                      ///< @BldCfgItem{BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT}
-  IN UINT32              PstatesPsdPolicy;            ///< PSD policy
-                                                      ///< @BldCfgItem{BLDCFG_ACPI_PSTATES_PSD_POLICY}
-  IN UINT32              CpuFrequencyLimit;           ///< @BldCfgItem{BLDCFG_CPU_FREQUENCY_LIMIT}
-  IN PLATFORM_CONNECTED_STANDBY_MODES CfgPlatformConnectedStandbyMode; ///< @BldCfgItem{BLDCFG_CPU_CONNECTED_STANDBY_MODE}
-  IN UINT32              NumberOfIoApics;             ///< Number of I/O APICs in the system
-                                                      ///< @BldCfgItem{BLDCFG_PLATFORM_NUM_IO_APICS}
-  IN PLATFORM_VRM_CONFIGURATION VrmProperties[MaxVrmType]; ///< Several configuration settings for the voltage regulator modules.
-  IN BOOLEAN             ProcessorScopeInSb;          ///< ACPI Processor Object in \\_SB scope
-                                                      ///< @BldCfgItem{BLDCFG_PROCESSOR_SCOPE_IN_SB}
-  IN CHAR8               ProcessorScopeName0;         ///< OEM specific 1st character of processor scope name.
-                                                      ///< @BldCfgItem{BLDCFG_PROCESSOR_SCOPE_NAME0}
-  IN CHAR8               ProcessorScopeName1;         ///< OEM specific 2nd character of processor scope name.
-                                                      ///< @BldCfgItem{BLDCFG_PROCESSOR_SCOPE_NAME1}
-  IN UINT8               GnbHdAudio;                  ///< Control GFX HD Audio controller(Used for HDMI and DP display output),
-                                                      ///< essentially it enables function 1 of graphics device.
-                                                      ///< @li 0 = HD Audio disable
-                                                      ///< @li 1 = HD Audio enable
-                                                      ///< @BldCfgItem{BLDCFG_CFG_GNB_HD_AUDIO}
-  IN UINT8               AbmSupport;                  ///< Automatic adjust LVDS/eDP Back light level support.It is
-                                                      ///< characteristic specific to display panel which used by platform design.
-                                                      ///< @li 0 = ABM support disabled
-                                                      ///< @li 1 = ABM support enabled
-                                                      ///< @BldCfgItem{BLDCFG_CFG_ABM_SUPPORT}
-  IN UINT8               DynamicRefreshRate;          ///< Adjust refresh rate on LVDS/eDP.
-                                                      ///< @BldCfgItem{BLDCFG_CFG_DYNAMIC_REFRESH_RATE}
-  IN UINT16              LcdBackLightControl;         ///< The PWM frequency to LCD backlight control.
-                                                      ///< If equal to 0 backlight not controlled by iGPU
-                                                      ///< @BldCfgItem{BLDCFG_CFG_LCD_BACK_LIGHT_CONTROL}
-  IN UINT16              HtcTemperatureLimit;         ///< The Hardware Thermal Control temperature limit in tenths of degrees Celsius.
-                                                      ///< If equal to 0, use hardware defaults.
-                                                      ///< @BldCfgItem{BLDCFG_HTC_TEMPERATURE_LIMIT}
-  IN UINT16              LhtcTemperatureLimit;        ///< The Local Hardware Thermal Control temperature limit in tenths of degrees Celsius.
-                                                      ///< If equal to 0, use hardware defaults.
-                                                      ///< @BldCfgItem{BLDCFG_LHTC_TEMPERATURE_LIMIT}
-  IN ACP_SIZE              AcpSize;                     ///< The size of ACP dram
-                                                      ///< ACP_Size[31:0]=Addr[47:16]
-                                                      ///< @BldCfgItem{BLDCFG_ACP_SIZE}
-} PLATFORM_CONFIGURATION;
-
-
-/**********************************************************************
- * Structures for: AmdInitLate
- **********************************************************************/
-#define PROC_VERSION_LENGTH  48
-#define MAX_DIMMS_PER_SOCKET 16
-#define PROC_MANU_LENGTH     29
-
-/*  Interface Parameter Structures  */
-/// DMI Type4 - Processor ID
-typedef struct {
-  OUT UINT32                    ProcIdLsd;              ///< Lower half of 64b ID
-  OUT UINT32                    ProcIdMsd;              ///< Upper half of 64b ID
-} TYPE4_PROC_ID;
-
-/// DMI Type 4 - Processor information
-typedef struct {
-  OUT UINT8                     T4ProcType;             ///< CPU Type
-  OUT UINT8                     T4ProcFamily;           ///< Family 1
-  OUT TYPE4_PROC_ID             T4ProcId;               ///< Id
-  OUT UINT8                     T4Voltage;              ///< Voltage
-  OUT UINT16                    T4ExternalClock;        ///< External clock
-  OUT UINT16                    T4MaxSpeed;             ///< Max speed
-  OUT UINT16                    T4CurrentSpeed;         ///< Current speed
-  OUT UINT8                     T4Status;               ///< Status
-  OUT UINT8                     T4ProcUpgrade;          ///< Up grade
-  OUT UINT8                     T4CoreCount;            ///< Core count
-  OUT UINT8                     T4CoreEnabled;          ///< Core Enable
-  OUT UINT8                     T4ThreadCount;          ///< Thread count
-  OUT UINT16                    T4ProcCharacteristics;  ///< Characteristics
-  OUT UINT16                    T4ProcFamily2;          ///< Family 2
-  OUT CHAR8                     T4ProcVersion[PROC_VERSION_LENGTH]; ///< Cpu version
-  OUT CHAR8                     T4ProcManufacturer[PROC_MANU_LENGTH]; ///< Manufacturer
-} TYPE4_DMI_INFO;
-
-/// DMI Type 7 - Cache information
-typedef struct _TYPE7_DMI_INFO {
-  OUT UINT16                    T7CacheCfg;             ///< Cache cfg
-  OUT UINT16                    T7MaxCacheSize;         ///< Max size
-  OUT UINT16                    T7InstallSize;          ///< Install size
-  OUT UINT16                    T7SupportedSramType;    ///< Supported Sram Type
-  OUT UINT16                    T7CurrentSramType;      ///< Current type
-  OUT UINT8                     T7CacheSpeed;           ///< Speed
-  OUT UINT8                     T7ErrorCorrectionType;  ///< ECC type
-  OUT UINT8                     T7SystemCacheType;      ///< Cache type
-  OUT UINT8                     T7Associativity;        ///< Associativity
-} TYPE7_DMI_INFO;
-
-/// DMI Type 16 offset 04h - Location
-typedef enum {
-  OtherLocation = 0x01,                                 ///< Assign 01 to Other
-  UnknownLocation,                                      ///< Assign 02 to Unknown
-  SystemboardOrMotherboard,                             ///< Assign 03 to systemboard or motherboard
-  IsaAddonCard,                                         ///< Assign 04 to ISA add-on card
-  EisaAddonCard,                                        ///< Assign 05 to EISA add-on card
-  PciAddonCard,                                         ///< Assign 06 to PCI add-on card
-  McaAddonCard,                                         ///< Assign 07 to MCA add-on card
-  PcmciaAddonCard,                                      ///< Assign 08 to PCMCIA add-on card
-  ProprietaryAddonCard,                                 ///< Assign 09 to proprietary add-on card
-  NuBus,                                                ///< Assign 0A to NuBus
-  Pc98C20AddonCard,                                     ///< Assign 0A0 to PC-98/C20 add-on card
-  Pc98C24AddonCard,                                     ///< Assign 0A1 to PC-98/C24 add-on card
-  Pc98EAddoncard,                                       ///< Assign 0A2 to PC-98/E add-on card
-  Pc98LocalBusAddonCard                                 ///< Assign 0A3 to PC-98/Local bus add-on card
-} DMI_T16_LOCATION;
-
-/// DMI Type 16 offset 05h - Memory Error Correction
-typedef enum {
-  OtherUse = 0x01,                                      ///< Assign 01 to Other
-  UnknownUse,                                           ///< Assign 02 to Unknown
-  SystemMemory,                                         ///< Assign 03 to system memory
-  VideoMemory,                                          ///< Assign 04 to video memory
-  FlashMemory,                                          ///< Assign 05 to flash memory
-  NonvolatileRam,                                       ///< Assign 06 to non-volatile RAM
-  CacheMemory                                           ///< Assign 07 to cache memory
-} DMI_T16_USE;
-
-/// DMI Type 16 offset 07h - Maximum Capacity
-typedef enum {
-  Dmi16OtherErrCorrection = 0x01,                       ///< Assign 01 to Other
-  Dmi16UnknownErrCorrection,                            ///< Assign 02 to Unknown
-  Dmi16NoneErrCorrection,                               ///< Assign 03 to None
-  Dmi16Parity,                                          ///< Assign 04 to parity
-  Dmi16SingleBitEcc,                                    ///< Assign 05 to Single-bit ECC
-  Dmi16MultiBitEcc,                                     ///< Assign 06 to Multi-bit ECC
-  Dmi16Crc                                              ///< Assign 07 to CRC
-} DMI_T16_ERROR_CORRECTION;
-
-/// DMI Type 16 - Physical Memory Array
-typedef struct {
-  OUT DMI_T16_LOCATION          Location;               ///< The physical location of the Memory Array,
-                                                        ///< whether on the system board or an add-in board.
-  OUT DMI_T16_USE               Use;                    ///< Identifies the function for which the array
-                                                        ///< is used.
-  OUT DMI_T16_ERROR_CORRECTION  MemoryErrorCorrection;  ///< The primary hardware error correction or
-                                                        ///< detection method supported by this memory array.
-  OUT UINT16                    NumberOfMemoryDevices;  ///< The number of slots or sockets available
-                                                        ///< for memory devices in this array.
-} TYPE16_DMI_INFO;
-
-/// DMI Type 17 offset 0Eh - Form Factor
-typedef enum {
-  OtherFormFactor = 0x01,                               ///< Assign 01 to Other
-  UnknowFormFactor,                                     ///< Assign 02 to Unknown
-  SimmFormFactor,                                       ///< Assign 03 to SIMM
-  SipFormFactor,                                        ///< Assign 04 to SIP
-  ChipFormFactor,                                       ///< Assign 05 to Chip
-  DipFormFactor,                                        ///< Assign 06 to DIP
-  ZipFormFactor,                                        ///< Assign 07 to ZIP
-  ProprietaryCardFormFactor,                            ///< Assign 08 to Proprietary Card
-  DimmFormFactorFormFactor,                             ///< Assign 09 to DIMM
-  TsopFormFactor,                                       ///< Assign 10 to TSOP
-  RowOfChipsFormFactor,                                 ///< Assign 11 to Row of chips
-  RimmFormFactor,                                       ///< Assign 12 to RIMM
-  SodimmFormFactor,                                     ///< Assign 13 to SODIMM
-  SrimmFormFactor,                                      ///< Assign 14 to SRIMM
-  FbDimmFormFactor                                      ///< Assign 15 to FB-DIMM
-} DMI_T17_FORM_FACTOR;
-
-/// DMI Type 17 offset 12h - Memory Type
-typedef enum {
-  OtherMemType = 0x01,                                  ///< Assign 01 to Other
-  UnknownMemType,                                       ///< Assign 02 to Unknown
-  DramMemType,                                          ///< Assign 03 to DRAM
-  EdramMemType,                                         ///< Assign 04 to EDRAM
-  VramMemType,                                          ///< Assign 05 to VRAM
-  SramMemType,                                          ///< Assign 06 to SRAM
-  RamMemType,                                           ///< Assign 07 to RAM
-  RomMemType,                                           ///< Assign 08 to ROM
-  FlashMemType,                                         ///< Assign 09 to Flash
-  EepromMemType,                                        ///< Assign 10 to EEPROM
-  FepromMemType,                                        ///< Assign 11 to FEPROM
-  EpromMemType,                                         ///< Assign 12 to EPROM
-  CdramMemType,                                         ///< Assign 13 to CDRAM
-  ThreeDramMemType,                                     ///< Assign 14 to 3DRAM
-  SdramMemType,                                         ///< Assign 15 to SDRAM
-  SgramMemType,                                         ///< Assign 16 to SGRAM
-  RdramMemType,                                         ///< Assign 17 to RDRAM
-  DdrMemType,                                           ///< Assign 18 to DDR
-  Ddr2MemType,                                          ///< Assign 19 to DDR2
-  Ddr2FbdimmMemType,                                    ///< Assign 20 to DDR2 FB-DIMM
-  Ddr3MemType = 0x18,                                   ///< Assign 24 to DDR3
-  Fbd2MemType                                           ///< Assign 25 to FBD2
-} DMI_T17_MEMORY_TYPE;
-
-/// DMI Type 17 offset 13h - Type Detail
-typedef struct {
-  OUT UINT16                    Reserved1:1;            ///< Reserved
-  OUT UINT16                    Other:1;                ///< Other
-  OUT UINT16                    Unknown:1;              ///< Unknown
-  OUT UINT16                    FastPaged:1;            ///< Fast-Paged
-  OUT UINT16                    StaticColumn:1;         ///< Static column
-  OUT UINT16                    PseudoStatic:1;         ///< Pseudo-static
-  OUT UINT16                    Rambus:1;               ///< RAMBUS
-  OUT UINT16                    Synchronous:1;          ///< Synchronous
-  OUT UINT16                    Cmos:1;                 ///< CMOS
-  OUT UINT16                    Edo:1;                  ///< EDO
-  OUT UINT16                    WindowDram:1;           ///< Window DRAM
-  OUT UINT16                    CacheDram:1;            ///< Cache Dram
-  OUT UINT16                    NonVolatile:1;          ///< Non-volatile
-  OUT UINT16                    Registered:1;           ///< Registered (Buffered)
-  OUT UINT16                    Unbuffered:1;           ///< Unbuffered (Unregistered)
-  OUT UINT16                    Reserved2:1;            ///< Reserved
-} DMI_T17_TYPE_DETAIL;
-
-/// DMI Type 17 - Memory Device
-typedef struct {
-  OUT UINT16                    Handle;                 ///< The temporary handle, or instance number, associated with the structure
-  OUT UINT16                    TotalWidth;             ///< Total Width, in bits, of this memory device, including any check or error-correction bits.
-  OUT UINT16                    DataWidth;              ///< Data Width, in bits, of this memory device.
-  OUT UINT16                    MemorySize;             ///< The size of the memory device.
-  OUT DMI_T17_FORM_FACTOR       FormFactor;             ///< The implementation form factor for this memory device.
-  OUT UINT8                     DeviceSet;              ///< Identifies when the Memory Device is one of a set of
-                                                        ///< Memory Devices that must be populated with all devices of
-                                                        ///< the same type and size, and the set to which this device belongs.
-  OUT CHAR8                     DeviceLocator[8];       ///< The string number of the string that identifies the physically labeled socket or board position where the memory device is located.
-  OUT CHAR8                     BankLocator[10];        ///< The string number of the string that identifies the physically labeled bank where the memory device is located.
-  OUT DMI_T17_MEMORY_TYPE       MemoryType;             ///< The type of memory used in this device.
-  OUT DMI_T17_TYPE_DETAIL       TypeDetail;             ///< Additional detail on the memory device type
-  OUT UINT16                    Speed;                  ///< Identifies the speed of the device, in megahertz (MHz).
-  OUT UINT64                    ManufacturerIdCode;     ///< Manufacturer ID code.
-  OUT CHAR8                     SerialNumber[9];        ///< Serial Number.
-  OUT CHAR8                     PartNumber[19];         ///< Part Number.
-  OUT UINT8                     Attributes;             ///< Bits 7-4: Reserved, Bits 3-0: rank.
-  OUT UINT32                    ExtSize;                ///< Extended Size.
-  OUT UINT16                    ConfigSpeed;            ///< Configured memory clock speed
-} TYPE17_DMI_INFO;
-
-/// Memory DMI Type 17 - for memory use
-typedef struct {
-  OUT UINT8                     Socket:3;               ///< Socket ID
-  OUT UINT8                     Channel:2;              ///< Channel ID
-  OUT UINT8                     Dimm:2;                 ///< DIMM ID
-  OUT UINT8                     DimmPresent:1;          ///< Dimm Present
-  OUT UINT16                    Handle;                 ///< The temporary handle, or instance number, associated with the structure
-  OUT UINT16                    TotalWidth;             ///< Total Width, in bits, of this memory device, including any check or error-correction bits.
-  OUT UINT16                    DataWidth;              ///< Data Width, in bits, of this memory device.
-  OUT UINT16                    MemorySize;             ///< The size of the memory device.
-  OUT DMI_T17_FORM_FACTOR       FormFactor;             ///< The implementation form factor for this memory device.
-  OUT UINT8                     DeviceLocator;          ///< The string number of the string that identifies the physically labeled socket or board position where the memory device is located.
-  OUT UINT8                     BankLocator;            ///< The string number of the string that identifies the physically labeled bank where the memory device is located.
-  OUT UINT16                    Speed;                  ///< Identifies the speed of the device, in megahertz (MHz).
-  OUT UINT64                    ManufacturerIdCode;     ///< Manufacturer ID code.
-  OUT UINT8                     SerialNumber[4];        ///< Serial Number.
-  OUT UINT8                     PartNumber[18];         ///< Part Number.
-  OUT UINT8                     Attributes;             ///< Bits 7-4: Reserved, Bits 3-0: rank.
-  OUT UINT32                    ExtSize;                ///< Extended Size.
-  OUT UINT16                    ConfigSpeed;            ///< Configured memory clock speed
-} MEM_DMI_PHYSICAL_DIMM_INFO;
-
-/// Memory DMI Type 20 - for memory use
-typedef struct {
-  OUT UINT8                     Socket:3;               ///< Socket ID
-  OUT UINT8                     Channel:2;              ///< Channel ID
-  OUT UINT8                     Dimm:2;                 ///< DIMM ID
-  OUT UINT8                     DimmPresent:1;          ///< Dimm Present
-  OUT UINT32                    StartingAddr;           ///< The physical address, in kilobytes, of a range
-                                                        ///< of memory mapped to the referenced Memory Device.
-  OUT UINT32                    EndingAddr;             ///< The handle, or instance number, associated with
-                                                        ///< the Memory Device structure to which this address
-                                                        ///< range is mapped.
-  OUT UINT16                    MemoryDeviceHandle;     ///< The handle, or instance number, associated with
-                                                        ///< the Memory Device structure to which this address
-                                                        ///< range is mapped.
-  OUT UINT64                    ExtStartingAddr;        ///< The physical address, in bytes, of a range of
-                                                        ///< memory mapped to the referenced Memory Device.
-  OUT UINT64                    ExtEndingAddr;          ///< The physical ending address, in bytes, of the last of
-                                                        ///< a range of addresses mapped to the referenced Memory Device.
-} MEM_DMI_LOGICAL_DIMM_INFO;
-
-/// DMI Type 19 - Memory Array Mapped Address
-typedef struct {
-  OUT UINT32                    StartingAddr;           ///< The physical address, in kilobytes,
-                                                        ///< of a range of memory mapped to the
-                                                        ///< specified physical memory array.
-  OUT UINT32                    EndingAddr;             ///< The physical ending address of the
-                                                        ///< last kilobyte of a range of addresses
-                                                        ///< mapped to the specified physical memory array.
-  OUT UINT16                    MemoryArrayHandle;      ///< The handle, or instance number, associated
-                                                        ///< with the physical memory array to which this
-                                                        ///< address range is mapped.
-  OUT UINT8                     PartitionWidth;         ///< Identifies the number of memory devices that
-                                                        ///< form a single row of memory for the address
-                                                        ///< partition defined by this structure.
-  OUT UINT64                    ExtStartingAddr;        ///< The physical address, in bytes, of a range of
-                                                        ///< memory mapped to the specified Physical Memory Array.
-  OUT UINT64                    ExtEndingAddr;          ///< The physical address, in bytes, of a range of
-                                                        ///< memory mapped to the specified Physical Memory Array.
-} TYPE19_DMI_INFO;
-
-///DMI Type 20 - Memory Device Mapped Address
-typedef struct {
-  OUT UINT32                    StartingAddr;           ///< The physical address, in kilobytes, of a range
-                                                        ///< of memory mapped to the referenced Memory Device.
-  OUT UINT32                    EndingAddr;             ///< The handle, or instance number, associated with
-                                                        ///< the Memory Device structure to which this address
-                                                        ///< range is mapped.
-  OUT UINT16                    MemoryDeviceHandle;     ///< The handle, or instance number, associated with
-                                                        ///< the Memory Device structure to which this address
-                                                        ///< range is mapped.
-  OUT UINT16                    MemoryArrayMappedAddressHandle; ///< The handle, or instance number, associated
-                                                        ///< with the Memory Array Mapped Address structure to
-                                                        ///< which this device address range is mapped.
-  OUT UINT8                     PartitionRowPosition;   ///< Identifies the position of the referenced Memory
-                                                        ///< Device in a row of the address partition.
-  OUT UINT8                     InterleavePosition;     ///< The position of the referenced Memory Device in
-                                                        ///< an interleave.
-  OUT UINT8                     InterleavedDataDepth;   ///< The maximum number of consecutive rows from the
-                                                        ///< referenced Memory Device that are accessed in a
-                                                        ///< single interleaved transfer.
-  OUT UINT64                    ExtStartingAddr;        ///< The physical address, in bytes, of a range of
-                                                        ///< memory mapped to the referenced Memory Device.
-  OUT UINT64                    ExtEndingAddr;          ///< The physical ending address, in bytes, of the last of
-                                                        ///< a range of addresses mapped to the referenced Memory Device.
-} TYPE20_DMI_INFO;
-
-/// Collection of pointers to the DMI records
-typedef struct {
-  OUT TYPE4_DMI_INFO            T4[MAX_SOCKETS_SUPPORTED];    ///< Type 4 struc
-  OUT TYPE7_DMI_INFO            T7L1[MAX_SOCKETS_SUPPORTED];  ///< Type 7 struc 1
-  OUT TYPE7_DMI_INFO            T7L2[MAX_SOCKETS_SUPPORTED];  ///< Type 7 struc 2
-  OUT TYPE7_DMI_INFO            T7L3[MAX_SOCKETS_SUPPORTED];  ///< Type 7 struc 3
-  OUT TYPE16_DMI_INFO           T16;                          ///< Type 16 struc
-  OUT TYPE17_DMI_INFO           T17[MAX_SOCKETS_SUPPORTED][MAX_CHANNELS_PER_SOCKET][MAX_DIMMS_PER_CHANNEL]; ///< Type 17 struc
-  OUT TYPE19_DMI_INFO           T19;                          ///< Type 19 struc
-  OUT TYPE20_DMI_INFO           T20[MAX_SOCKETS_SUPPORTED][MAX_CHANNELS_PER_SOCKET][MAX_DIMMS_PER_CHANNEL]; ///< Type 20 struc
-} DMI_INFO;
-
-/**********************************************************************
- * Interface call:  AllocateExecutionCache
- **********************************************************************/
-#define MAX_CACHE_REGIONS    3
-
-/// AllocateExecutionCache sub param structure for cached memory region
-typedef struct {
-  IN OUT   UINT32               ExeCacheStartAddr;      ///< Start address
-  IN OUT   UINT32               ExeCacheSize;           ///< Size
-} EXECUTION_CACHE_REGION;
-
-/**********************************************************************
- * Interface call:  AmdGetAvailableExeCacheSize
- **********************************************************************/
-/// Get available Cache remain
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS    StdHeader;              ///< Standard configuration header
-     OUT   UINT32               AvailableExeCacheSize;  ///< Remain size
-} AMD_GET_EXE_SIZE_PARAMS;
-
-AGESA_STATUS
-AmdGetAvailableExeCacheSize (
-  IN OUT   AMD_GET_EXE_SIZE_PARAMS *AmdGetExeSizeParams
-  );
-
-/// Selection type for core leveling
-typedef enum {
-  CORE_LEVEL_LOWEST,            ///< Level to lowest common denominator
-  CORE_LEVEL_TWO,               ///< Level to 2 cores
-  CORE_LEVEL_POWER_OF_TWO,      ///< Level to 1,2,4 or 8
-  CORE_LEVEL_NONE,              ///< Do no leveling
-  CORE_LEVEL_COMPUTE_UNIT,      ///< Level cores to one core per compute unit
-  CORE_LEVEL_COMPUTE_UNIT_TWO,  ///< Level cores to two cores per compute unit
-  CORE_LEVEL_COMPUTE_UNIT_THREE,  ///< Level cores to three cores per compute unit
-  CORE_LEVEL_ONE,               ///< Level to 1 core
-  CORE_LEVEL_THREE,             ///< Level to 3 cores
-  CORE_LEVEL_FOUR,              ///< Level to 4 cores
-  CORE_LEVEL_FIVE,              ///< Level to 5 cores
-  CORE_LEVEL_SIX,               ///< Level to 6 cores
-  CORE_LEVEL_SEVEN,             ///< Level to 7 cores
-  CORE_LEVEL_EIGHT,             ///< Level to 8 cores
-  CORE_LEVEL_NINE,              ///< Level to 9 cores
-  CORE_LEVEL_TEN,               ///< Level to 10 cores
-  CORE_LEVEL_ELEVEN,            ///< Level to 11 cores
-  CORE_LEVEL_TWELVE,            ///< Level to 12 cores
-  CORE_LEVEL_THIRTEEN,          ///< Level to 13 cores
-  CORE_LEVEL_FOURTEEN,          ///< Level to 14 cores
-  CORE_LEVEL_FIFTEEN,           ///< Level to 15 cores
-  CoreLevelModeMax              ///< Used for bounds checking
-} CORE_LEVELING_TYPE;
-
-
-
-
-
-/************************************************************************
- *
- *  AGESA Basic Level interface structure definition and function prototypes
- *
- ***********************************************************************/
-
-/**********************************************************************
- * Interface call:  AmdCreateStruct
- **********************************************************************/
-AGESA_STATUS
-AmdCreateStruct (
-  IN OUT   AMD_INTERFACE_PARAMS *InterfaceParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdReleaseStruct
- **********************************************************************/
-AGESA_STATUS
-AmdReleaseStruct (
-  IN OUT   AMD_INTERFACE_PARAMS *InterfaceParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdInitReset
- **********************************************************************/
-/// AmdInitReset param structure
-typedef struct {
-  IN       AMD_CONFIG_PARAMS         StdHeader;        ///< Standard configuration header
-  IN       EXECUTION_CACHE_REGION    CacheRegion[3];   ///< The cached memory region
-  IN       FCH_RESET_INTERFACE       FchInterface;     ///< Interface for FCH configuration
-} AMD_RESET_PARAMS;
-
-AGESA_STATUS
-AmdInitReset (
-  IN OUT   AMD_RESET_PARAMS     *ResetParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitEarly
- **********************************************************************/
-/// InitEarly param structure
-///
-/// Provide defaults or customizations to each service performed in AmdInitEarly.
-///
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;        ///< Standard configuration header
-  IN       EXECUTION_CACHE_REGION CacheRegion[3];   ///< Execution Map Interface
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-  IN       GNB_CONFIGURATION      GnbConfig;        ///< GNB configuration
-} AMD_EARLY_PARAMS;
-
-AGESA_STATUS
-AmdInitEarly (
-  IN OUT   AMD_EARLY_PARAMS     *EarlyParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitPost
- **********************************************************************/
-/// AmdInitPost param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;        ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-  IN       MEM_PARAMETER_STRUCT   MemConfig;        ///< Memory post param
-  IN       GNB_POST_CONFIGURATION GnbPostConfig;    ///< GNB post param
-} AMD_POST_PARAMS;
-
-AGESA_STATUS
-AmdInitPost (
-  IN OUT   AMD_POST_PARAMS      *PostParams         ///< Amd Cpu init param
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitEnv
- **********************************************************************/
-/// AmdInitEnv param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;            ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;       ///< platform operational characteristics.
-  IN       GNB_ENV_CONFIGURATION  GnbEnvConfiguration;  ///< GNB configuration
-  IN       FCH_INTERFACE          FchInterface;         ///< FCH configuration
-} AMD_ENV_PARAMS;
-
-AGESA_STATUS
-AmdInitEnv (
-  IN OUT   AMD_ENV_PARAMS       *EnvParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitMid
- **********************************************************************/
-/// AmdInitMid param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;        ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-  IN       GNB_MID_CONFIGURATION  GnbMidConfiguration;  ///< GNB configuration
-  IN       FCH_INTERFACE          FchInterface;     ///< FCH configuration
-} AMD_MID_PARAMS;
-
-AGESA_STATUS
-AmdInitMid (
-  IN OUT   AMD_MID_PARAMS       *MidParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdInitLate
- **********************************************************************/
-/// AmdInitLate param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;              ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;         ///< platform operational characteristics.
-  IN       IOMMU_EXCLUSION_RANGE_DESCRIPTOR  *IvrsExclusionRangeList;   ///< Pointer to array of exclusion ranges
-     OUT   DMI_INFO               *DmiTable;              ///< DMI Interface
-     OUT   VOID                   *AcpiPState;            ///< Acpi Pstate SSDT Table
-     OUT   VOID                   *AcpiSrat;              ///< SRAT Table
-     OUT   VOID                   *AcpiSlit;              ///< SLIT Table
-     OUT   VOID                   *AcpiWheaMce;           ///< WHEA MCE Table
-     OUT   VOID                   *AcpiWheaCmc;           ///< WHEA CMC Table
-     OUT   VOID                   *AcpiAlib;              ///< ACPI SSDT table with ALIB implementation
-     OUT   VOID                   *AcpiIvrs;              ///< IOMMU ACPI IVRS(I/O Virtualization Reporting Structure) table
-     OUT   VOID                   *AcpiCrat;              ///< Component Resource Affinity Table table
-     OUT   VOID                   *AcpiCdit;              ///< Component Locality Distance Information table
-  IN       GNB_LATE_CONFIGURATION GnbLateConfiguration;   ///< GNB configuration
-} AMD_LATE_PARAMS;
-
-AGESA_STATUS
-AmdInitLate (
-  IN OUT   AMD_LATE_PARAMS      *LateParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdInitRecovery
- **********************************************************************/
-/// CPU Recovery Parameters
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS StdHeader;             ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-} AMD_CPU_RECOVERY_PARAMS;
-
-/// AmdInitRecovery param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS        StdHeader;            ///< Standard configuration header
-  IN       MEM_PARAMETER_STRUCT     MemConfig;            ///< Memory post param
-  IN       EXECUTION_CACHE_REGION   CacheRegion[3];       ///< The cached memory region. And the max cache region is 3
-  IN       AMD_CPU_RECOVERY_PARAMS  CpuRecoveryParams;    ///< Params for CPU related recovery init.
-} AMD_RECOVERY_PARAMS;
-
-AGESA_STATUS
-AmdInitRecovery (
-  IN OUT   AMD_RECOVERY_PARAMS    *RecoveryParams
-  );
-
-/**********************************************************************
- * Interface call:  AmdInitResume
- **********************************************************************/
-/// AmdInitResume param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS      StdHeader;      ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig; ///< Platform operational characteristics
-  IN       AMD_S3_PARAMS          S3DataBlock;    ///< Save state data
-} AMD_RESUME_PARAMS;
-
-AGESA_STATUS
-AmdInitResume (
-  IN       AMD_RESUME_PARAMS    *ResumeParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdS3LateRestore
- **********************************************************************/
-/// AmdS3LateRestore param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS    StdHeader;          ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-  IN       AMD_S3_PARAMS          S3DataBlock;      ///< Save state data
-} AMD_S3LATE_PARAMS;
-
-AGESA_STATUS
-AmdS3LateRestore (
-  IN OUT   AMD_S3LATE_PARAMS    *S3LateParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdS3Save
- **********************************************************************/
-/// AmdS3Save param structure
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS    StdHeader;          ///< Standard configuration header
-  IN       PLATFORM_CONFIGURATION PlatformConfig;   ///< platform operational characteristics.
-     OUT   AMD_S3_PARAMS          S3DataBlock;      ///< Standard header
-  IN       FCH_INTERFACE          FchInterface;     ///< FCH configuration
-} AMD_S3SAVE_PARAMS;
-
-AGESA_STATUS
-AmdS3Save (
-  IN OUT   AMD_S3SAVE_PARAMS    *AmdS3SaveParams
-  );
-
-
-/**********************************************************************
- * Interface call:  AmdLateRunApTask
- **********************************************************************/
-/**
- * Entry point for AP tasking.
- */
-AGESA_STATUS
-AmdLateRunApTask (
-  IN       AP_EXE_PARAMS  *AmdApExeParams
-);
-
-//
-// General Services API
-//
-
-/**********************************************************************
- * Interface service call:  AmdGetApicId
- **********************************************************************/
-/// Request the APIC ID of a particular core.
-
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;        ///< Standard configuration header
-  IN       UINT8             Socket;           ///< The Core's Socket.
-  IN       UINT8             Core;             ///< The Core id.
-     OUT   BOOLEAN           IsPresent;        ///< The Core is present, and  ApicAddress is valid.
-     OUT   UINT8             ApicAddress;      ///< The Core's APIC ID.
-} AMD_APIC_PARAMS;
-
-/**
- * Get a specified Core's APIC ID.
- */
-AGESA_STATUS
-AmdGetApicId (
-  IN OUT AMD_APIC_PARAMS *AmdParamApic
-);
-
-/**********************************************************************
- * Interface service call:  AmdGetPciAddress
- **********************************************************************/
-/// Request the PCI Address of a Processor Module (that is, its Northbridge)
-
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;        ///< Standard configuration header
-  IN       UINT8             Socket;           ///< The Processor's socket
-  IN       UINT8             Module;           ///< The Module in that Processor
-     OUT   BOOLEAN           IsPresent;        ///< The Core is present, and  PciAddress is valid.
-     OUT   PCI_ADDR          PciAddress;       ///< The Processor's PCI Config Space address (Function 0, Register 0)
-} AMD_GET_PCI_PARAMS;
-
-/**
- * Get Processor Module's PCI Config Space address.
- */
-AGESA_STATUS
-AmdGetPciAddress (
-  IN OUT   AMD_GET_PCI_PARAMS *AmdParamGetPci
-);
-
-/**********************************************************************
- * Interface service call:  AmdIdentifyCore
- **********************************************************************/
-/// Request the identity (Socket, Module, Core) of the current Processor Core
-
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;         ///< Standard configuration header
-     OUT   UINT8             Socket;            ///< The current Core's Socket
-     OUT   UINT8             Module;            ///< The current Core's Processor Module
-     OUT   UINT8             Core;              ///< The current Core's core id.
-} AMD_IDENTIFY_PARAMS;
-
-/**
- * "Who am I" for the current running core.
- */
-AGESA_STATUS
-AmdIdentifyCore (
-  IN OUT  AMD_IDENTIFY_PARAMS *AmdParamIdentify
-);
-
-/**********************************************************************
- * Interface service call:  AmdReadEventLog
- **********************************************************************/
-/// An Event Log Entry.
-typedef struct {
-  IN       AMD_CONFIG_PARAMS StdHeader;         ///< Standard configuration header
-     OUT   UINT32            EventClass;        ///< The severity of this event, matches AGESA_STATUS.
-     OUT   UINT32            EventInfo;         ///< The unique event identifier, zero means "no event".
-     OUT   UINT32            DataParam1;        ///< Data specific to the Event.
-     OUT   UINT32            DataParam2;        ///< Data specific to the Event.
-     OUT   UINT32            DataParam3;        ///< Data specific to the Event.
-     OUT   UINT32            DataParam4;        ///< Data specific to the Event.
-} EVENT_PARAMS;
-
-/**
- * Read an Event from the Event Log.
- */
-AGESA_STATUS
-AmdReadEventLog (
-  IN       EVENT_PARAMS *Event
-);
-
-/**********************************************************************
- * Interface service call:  AmdIdentifyDimm
- **********************************************************************/
-/// Request the identity of dimm from system address
-
-typedef struct {
-  IN OUT   AMD_CONFIG_PARAMS StdHeader;            ///< Standard configuration header
-  IN       UINT64            MemoryAddress;        ///< System Address that needs to be translated to dimm identification.
-  OUT      UINT8             SocketId;             ///< The socket on which the targeted address locates.
-  OUT      UINT8             MemChannelId;         ///< The channel on which the targeted address locates.
-  OUT      UINT8             DimmId;               ///< The dimm on which the targeted address locates.
-  OUT      UINT8             ChipSelect;           ///< The chip select on which the targeted address locates.
-  OUT      UINT8             Bank;                 ///< The Bank for which the error address resides
-  OUT      UINT32            Row;                  ///< The Row for which the error address resides
-  OUT      UINT16            Column;               ///< The Column for which the error address resides
-} AMD_IDENTIFY_DIMM;
-
-/**
- * Get the dimm identification for the address.
- */
-AGESA_STATUS
-AmdIdentifyDimm (
-  IN OUT   AMD_IDENTIFY_DIMM *AmdDimmIdentify
-);
-
-AGESA_STATUS
-AmdIdsRunApTaskLate (
-  IN       AP_EXE_PARAMS  *AmdApExeParams
-  );
-
-/// Request the 2D Data Eye Training Data
-#define RD_DATAEYE  0
-#define WR_DATAEYE  1
-
-/**********************************************************************
- * Interface service call:  AmdGet2DDataEye
- **********************************************************************/
-/// Request the training data eye on Socket, Channel, Dimm.
-
-typedef struct _AMD_GET_DATAEYE {
-  IN OUT AMD_CONFIG_PARAMS StdHeader;            ///< Standard configuration header
-  IN OUT AMD_POST_PARAMS *PostParamsPtr;         ///< Pointer to AMD_POST_PARAMS
-  IN  UINT8 SocketId;                            ///< The socket number to get the 2D data eye
-  IN  UINT8 MemChannelId;                        ///< The channel number to get the 2D data eye
-  IN  UINT8 DimmId;                              ///< The dimm number to get the 2D data eye
-  IN  UINT8 DataEyeType;                         ///< Get the 2D data eye on read or write training
-  OUT UINT8* DataEyeBuffer;                      ///< The buffer to stores the 2D data eye
-} AMD_GET_DATAEYE;
-
-AGESA_STATUS
-AmdGet2DDataEye (
-  IN OUT   AMD_GET_DATAEYE *AmdGetDataEye
-  );
-
-#define AGESA_IDS_DFT_VAL   0xFFFF                  ///<  Default value of every uninitlized NV item, the action for it will be ignored
-#define AGESA_IDS_NV_END    0xFFFF                  ///< Flag specify end of option structure
-/// WARNING: Don't change the comment below, it used as signature for script
-/// AGESA IDS NV ID Definitions
-typedef enum {
-  AGESA_IDS_EXT_ID_START                   = 0x0000,///< 0x0000                                                             specify the start of external NV id
-
-  AGESA_IDS_NV_UCODE,                               ///< 0x0001                                                            Enable or disable microcode patching
-
-  AGESA_IDS_NV_TARGET_PSTATE,                       ///< 0x0002                                                        Set the P-state required to be activated
-  AGESA_IDS_NV_POSTPSTATE,                          ///< 0x0003                                           Set the P-state required to be activated through POST
-
-  AGESA_IDS_NV_BANK_INTERLEAVE,                     ///< 0x0004                                                               Enable or disable Bank Interleave
-  AGESA_IDS_NV_CHANNEL_INTERLEAVE,                  ///< 0x0005                                                            Enable or disable Channel Interleave
-  AGESA_IDS_NV_NODE_INTERLEAVE,                     ///< 0x0006                                                               Enable or disable Node Interleave
-  AGESA_IDS_NV_MEMHOLE,                             ///< 0x0007                                                                  Enables or disable memory hole
-
-  AGESA_IDS_NV_SCRUB_REDIRECTION,                   ///< 0x0008                                           Enable or disable a write to dram with corrected data
-  AGESA_IDS_NV_DRAM_SCRUB,                          ///< 0x0009                                                   Set the rate of background scrubbing for DRAM
-  AGESA_IDS_NV_DCACHE_SCRUB,                        ///< 0x000A                                            Set the rate of background scrubbing for the DCache.
-  AGESA_IDS_NV_L2_SCRUB,                            ///< 0x000B                                           Set the rate of background scrubbing for the L2 cache
-  AGESA_IDS_NV_L3_SCRUB,                            ///< 0x000C                                           Set the rate of background scrubbing for the L3 cache
-  AGESA_IDS_NV_ICACHE_SCRUB,                        ///< 0x000D                                             Set the rate of background scrubbing for the Icache
-  AGESA_IDS_NV_SYNC_ON_ECC_ERROR,                   ///< 0x000E                                    Enable or disable the sync flood on un-correctable ECC error
-  AGESA_IDS_NV_ECC_SYMBOL_SIZE,                     ///< 0x000F                                                                             Set ECC symbol size
-
-  AGESA_IDS_NV_ALL_MEMCLKS,                         ///< 0x0010                                                      Enable or disable all memory clocks enable
-  AGESA_IDS_NV_DCT_GANGING_MODE,                    ///< 0x0011                                                                             Set the Ganged mode
-  AGESA_IDS_NV_DRAM_BURST_LENGTH32,                 ///< 0x0012                                                                    Set the DRAM Burst Length 32
-  AGESA_IDS_NV_MEMORY_POWER_DOWN,                   ///< 0x0013                                                        Enable or disable Memory power down mode
-  AGESA_IDS_NV_MEMORY_POWER_DOWN_MODE,              ///< 0x0014                                                                  Set the Memory power down mode
-  AGESA_IDS_NV_DLL_SHUT_DOWN,                       ///< 0x0015                                                                   Enable or disable DLLShutdown
-  AGESA_IDS_NV_ONLINE_SPARE,                        ///< 0x0016      Enable or disable the Dram controller to designate a DIMM bank as a spare for logical swap
-
-  AGESA_IDS_NV_HDTOUT,                              ///< 0x0017                                                                Enable or disable HDTOUT feature
-
-  AGESA_IDS_NV_GNBHDAUDIOEN,                        ///< 0x0018                                                                  Enable or disable GNB HD Audio
-
-  AGESA_IDS_NV_CPB_EN,                              ///< 0x0019                                                                          Core Performance Boost
-
-  AGESA_IDS_NV_HTC_EN,                              ///< 0x001A                                                                                      HTC Enable
-  AGESA_IDS_NV_HTC_OVERRIDE,                        ///< 0x001B                                                                                    HTC Override
-  AGESA_IDS_NV_HTC_PSTATE_LIMIT,                    ///< 0x001C                                                                        HTC P-state limit select
-  AGESA_IDS_NV_HTC_TEMP_HYS,                        ///< 0x001D                                                                      HTC Temperature Hysteresis
-  AGESA_IDS_NV_HTC_ACT_TEMP,                        ///< 0x001E                                                                             HTC Activation Temp
-
-  AGESA_IDS_NV_POWER_POLICY,                        ///< 0x001F                                                                    Select Platform Power Policy
-  AGESA_IDS_NV_DRAMCON,                             ///< 0x0020                                                  Specify the mode for controller initialization
-  AGESA_IDS_EXT_ID_END,                             ///< 0x0021                                                               specify the end of external NV ID
-} IDS_EX_NV_ID;
-
-
-#define IDS_NUM_EXT_NV_ITEM (AGESA_IDS_EXT_ID_END - AGESA_IDS_EXT_ID_START + 1)
-
-
-#endif // _AGESA_H_

pi/amd/00730F01/AMD.h

diff --git a/pi/amd/00730F01/AMD.h b/pi/amd/00730F01/AMD.h
deleted file mode 100644
index 1b6fdb2..0000000
--- a/pi/amd/00730F01/AMD.h
+++ /dev/null
@@ -1,474 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Agesa structures and definitions
- *
- * Contains AMD AGESA core interface
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Include
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-
-#ifndef _AMD_H_
-#define _AMD_H_
-
-#define Int16FromChar(a,b) (UINT16)((a) << 0 | (b) << 8)
-#define Int32FromChar(a,b,c,d) (UINT32)((a) << 0 | (b) << 8 | (c) << 16 | (d) << 24)
-#define Int64FromChar(a,b,c,d,e,f,g,h) ((UINT64)(Int32FromChar(a,b,c,d)<<32) | (UINT64)Int32FromChar(e,f,g,h))
-
-#define AGESA_REVISION  "Arch2008"
-#define AGESA_ID        {'A', 'G', 'E', 'S', 'A', 0x00, 0x00, 0x00}
-
-//
-//
-// AGESA Types and Definitions
-//
-//
-#define LAST_ENTRY          0xFFFFFFFFul
-#define IMAGE_SIGNATURE     Int32FromChar ('$', 'A', 'M', 'D')
-#define MODULE_SIGNATURE    Int32FromChar ('$', 'M', 'O', 'D')
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-/// The return status for all AGESA public services.
-///
-/// Services return the most severe status of any logged event.  Status other than SUCCESS, UNSUPPORTED, and BOUNDS_CHK
-/// will have log entries with more detail.
-///
-typedef enum {
-  AGESA_SUCCESS = 0,             ///< The service completed normally. Info may be logged.
-  AGESA_UNSUPPORTED,             ///< The dispatcher or create struct had an unimplemented function requested.
-                                 ///<  Not logged.
-  AGESA_BOUNDS_CHK,              ///< A dynamic parameter was out of range and the service was not provided.
-                                 ///< Example, memory address not installed, heap buffer handle not found.
-                                 ///< Not Logged.
-  // AGESA_STATUS of greater severity (the ones below this line), always have a log entry available.
-  AGESA_ALERT,                   ///< An observed condition, but no loss of function.  See Log.
-  AGESA_WARNING,                 ///< Possible or minor loss of function.  See Log.
-  AGESA_ERROR,                   ///< Significant loss of function, boot may be possible.  See Log.
-  AGESA_CRITICAL,                ///< Continue boot only to notify user.  See Log.
-  AGESA_FATAL,                   ///< Halt booting.  See Log, however Fatal errors pertaining to heap problems
-                                 ///< may not be able to reliably produce log events.
-  AgesaStatusMax                 ///< Not a status, for limit checking.
-} AGESA_STATUS;
-
-/// For checking whether a status is at or above the mandatory log level.
-#define AGESA_STATUS_LOG_LEVEL AGESA_ALERT
-
-/**
- * Callout method to the host environment.
- *
- * Callout using a dispatch with appropriate thunk layer, which is determined by the host environment.
- *
- * @param[in]        Function      The specific callout function being invoked.
- * @param[in]        FcnData       Function specific data item.
- * @param[in,out]    ConfigPtr     Reference to Callout params.
- */
-typedef AGESA_STATUS (*CALLOUT_ENTRY) (
-  IN       UINT32  Function,
-  IN       UINTN   FcnData,
-  IN OUT   VOID    *ConfigPtr
-  );
-
-typedef AGESA_STATUS (*IMAGE_ENTRY) (VOID *ConfigPtr);
-typedef AGESA_STATUS (*MODULE_ENTRY) (VOID *ConfigPtr);
-
-///This allocation type is used by the AmdCreateStruct entry point
-typedef enum {
-  PreMemHeap = 0,                                           ///< Create heap in cache.
-  PostMemDram,                                              ///< Create heap in memory.
-  ByHost                                                    ///< Create heap by Host.
-} ALLOCATION_METHOD;
-
-/// These width descriptors are used by the library function, and others, to specify the data size
-typedef enum ACCESS_WIDTH {
-  AccessWidth8 = 1,                                         ///< Access width is 8 bits.
-  AccessWidth16,                                            ///< Access width is 16 bits.
-  AccessWidth32,                                            ///< Access width is 32 bits.
-  AccessWidth64,                                            ///< Access width is 64 bits.
-
-  AccessS3SaveWidth8 = 0x81,                                ///< Save 8 bits data.
-  AccessS3SaveWidth16,                                      ///< Save 16 bits data.
-  AccessS3SaveWidth32,                                      ///< Save 32 bits data.
-  AccessS3SaveWidth64,                                      ///< Save 64 bits data.
-} ACCESS_WIDTH;
-
-/// AGESA struct name
-typedef enum {
-  // AGESA BASIC FUNCTIONS
-  AMD_INIT_RECOVERY          = 0x00021000,                  ///< AmdInitRecovery entry point handle
-  AMD_CREATE_STRUCT          = 0x00022000,                  ///< AmdCreateStruct handle
-  AMD_INIT_EARLY             = 0x00023000,                  ///< AmdInitEarly entry point handle
-  AMD_INIT_ENV               = 0x00024000,                  ///< AmdInitEnv entry point handle
-  AMD_INIT_LATE              = 0x00025000,                  ///< AmdInitLate entry point handle
-  AMD_INIT_MID               = 0x00026000,                  ///< AmdInitMid entry point handle
-  AMD_INIT_POST              = 0x00027000,                  ///< AmdInitPost entry point handle
-  AMD_INIT_RESET             = 0x00028000,                  ///< AmdInitReset entry point handle
-  AMD_INIT_RESUME            = 0x00029000,                  ///< AmdInitResume entry point handle
-  AMD_RELEASE_STRUCT         = 0x0002A000,                  ///< AmdReleaseStruct handle
-  AMD_S3LATE_RESTORE         = 0x0002B000,                  ///< AmdS3LateRestore entry point handle
-  AMD_S3_SAVE                = 0x0002C000,                  ///< AmdS3Save entry point handle
-  AMD_GET_APIC_ID            = 0x0002D000,                  ///< AmdGetApicId entry point handle
-  AMD_GET_PCI_ADDRESS        = 0x0002E000,                  ///< AmdGetPciAddress entry point handle
-  AMD_IDENTIFY_CORE          = 0x0002F000,                  ///< AmdIdentifyCore general service handle
-  AMD_READ_EVENT_LOG         = 0x00030000,                  ///< AmdReadEventLog general service handle
-  AMD_GET_EXECACHE_SIZE      = 0x00031000,                  ///< AmdGetAvailableExeCacheSize general service handle
-  AMD_LATE_RUN_AP_TASK       = 0x00032000,                  ///< AmdLateRunApTask entry point handle
-  AMD_IDENTIFY_DIMMS         = 0x00033000,                  ///< AmdIdentifyDimm general service handle
-  AMD_GET_2D_DATA_EYE        = 0x00034000,                  ///< AmdGet2DDataEye general service handle
-  AMD_HEAP_ALLOCATE_BUFFER   = 0x00038000,
-  AMD_HEAP_DEALLOCATE_BUFFER = 0x00039000,
-  FCH_INIT_RESET             = 0x00040000,
-  FCH_INIT_ENV               = 0x00041000,
-  FCH_INIT_MID               = 0x00042000,
-  FCH_INIT_LATE              = 0x00043000,
-  FCH_INIT_S3_EARLY_RESTORE  = 0x00044000,
-  FCH_INIT_S3_LATE_RESTORE   = 0x00045000,
-  AMD_SET_VALUE              = 0x00081000,
-  AMD_GET_VALUE              = 0x00082000,
-} AGESA_STRUCT_NAME;
-
-  /*  ResetType constant values */
-#define WARM_RESET_WHENEVER 1
-#define COLD_RESET_WHENEVER 2
-#define WARM_RESET_IMMEDIATELY 3
-#define COLD_RESET_IMMEDIATELY 4
-
-
-// AGESA Structures
-
-/// The standard header for all AGESA services.
-/// For internal AGESA naming conventions, see @ref amdconfigparamname .
-typedef struct {
-  IN       VOID *          ImageBasePtr;     ///< The AGESA Image base address.
-  IN       UINT32          Func;             ///< The service desired
-  IN       VOID *          AltImageBasePtr;  ///< Alternate Image location
-  IN       CALLOUT_ENTRY   CalloutPtr;       ///< For Callout from AGESA
-  IN       UINT8           HeapStatus;       ///< For heap status from boot time slide.
-  IN       UINT64          HeapBasePtr;      ///< Location of the heap
-  IN OUT   UINT8           Reserved[7];      ///< This space is reserved for future use.
-} AMD_CONFIG_PARAMS;
-
-
-/// Create Struct Interface.
-typedef struct {
-  IN       AMD_CONFIG_PARAMS   StdHeader;          ///< Standard configuration header
-  IN       AGESA_STRUCT_NAME   AgesaFunctionName;  ///< The service to init
-  IN       ALLOCATION_METHOD   AllocationMethod;   ///< How to handle buffer allocation
-  IN OUT   UINT32              NewStructSize;      ///< The size of the allocated data, in for ByHost, else out only.
-  IN OUT   VOID                *NewStructPtr;      ///< The struct for the service.
-                                                   ///< The struct to init for ByHost allocation,
-                                                   ///< the initialized struct on return.
-} AMD_INTERFACE_PARAMS;
-
-#define FUNC_0    0   // bit-placed for PCI address creation
-#define FUNC_1    1
-#define FUNC_2    2
-#define FUNC_3    3
-#define FUNC_4    4
-#define FUNC_5    5
-#define FUNC_6    6
-#define FUNC_7    7
-
-/// AGESA Binary module header structure
-typedef struct {
-  IN  UINT32  Signature;                          ///< Binary Signature
-  IN  CHAR8   CreatorID[8];                       ///< 8 characters ID
-  IN  CHAR8   Version[12];                        ///< 12 characters version
-  IN  UINT32  ModuleInfoOffset;                   ///< Offset of module
-  IN  UINT32  EntryPointAddress;                  ///< Entry address
-  IN  UINT32  ImageBase;                          ///< Image base
-  IN  UINT32  RelocTableOffset;                   ///< Relocate Table offset
-  IN  UINT32  ImageSize;                          ///< Size
-  IN  UINT16  Checksum;                           ///< Checksum
-  IN  UINT8   ImageType;                          ///< Type
-  IN  UINT8   V_Reserved;                         ///< Reserved
-} AMD_IMAGE_HEADER;
-
-/// AGESA Binary module header structure
-typedef struct _AMD_MODULE_HEADER {
-  IN  UINT32          ModuleHeaderSignature;      ///< Module signature
-  IN  CHAR8           ModuleIdentifier[8];        ///< 8 characters ID
-  IN  CHAR8           ModuleVersion[12];          ///< 12 characters version
-  IN  VOID            *ModuleDispatcher;          ///< A pointer point to dispatcher
-  IN  struct _AMD_MODULE_HEADER  *NextBlock;      ///< Next module header link
-} AMD_MODULE_HEADER;
-
-// AMD_CODE_HEADER Signatures.
-#define AGESA_CODE_SIGNATURE  {'!', '!', '!', 'A', 'G', 'E', 'S', 'A'}
-#define CIMXNB_CODE_SIGNATURE {'!', '!', 'C', 'I', 'M', 'X', 'N', 'B'}
-#define CIMXSB_CODE_SIGNATURE {'!', '!', 'C', 'I', 'M', 'X', 'S', 'B'}
-
-/// AGESA_CODE_SIGNATURE
-typedef struct {
-  IN  CHAR8   Signature[8];                       ///< code header Signature
-  IN  CHAR8   ComponentName[16];                  ///< 16 character name of the code module
-  IN  CHAR8   Version[12];                        ///< 12 character version string
-  IN  CHAR8   TerminatorNull;                     ///< null terminated string
-  IN  CHAR8   VerReserved[7];                     ///< reserved space
-} AMD_CODE_HEADER;
-
-/// Extended PCI address format
-typedef struct {
-  IN OUT  UINT32      Register:12;                ///< Register offset
-  IN OUT  UINT32      Function:3;                 ///< Function number
-  IN OUT  UINT32      Device:5;                   ///< Device number
-  IN OUT  UINT32      Bus:8;                      ///< Bus number
-  IN OUT  UINT32      Segment:4;                  ///< Segment
-} EXT_PCI_ADDR;
-
-/// Union type for PCI address
-typedef union _PCI_ADDR {
-  IN  UINT32          AddressValue;               ///< Formal address
-  IN  EXT_PCI_ADDR    Address;                    ///< Extended address
-} PCI_ADDR;
-
-//   SBDFO - Segment Bus Device Function Offset
-//   31:28   Segment (4-bits)
-//   27:20   Bus     (8-bits)
-//   19:15   Device  (5-bits)
-//   14:12   Function(3-bits)
-//   11:00   Offset  (12-bits)
-
-#define MAKE_SBDFO(Seg, Bus, Dev, Fun, Off) ((((UINT32) (Seg)) << 28) | (((UINT32) (Bus)) << 20) | \
-                   (((UINT32)(Dev)) << 15) | (((UINT32)(Fun)) << 12) | ((UINT32)(Off)))
-#define ILLEGAL_SBDFO 0xFFFFFFFFul
-
-/// CPUID data received registers format
-typedef struct {
-  OUT UINT32          EAX_Reg;                    ///< CPUID instruction result in EAX
-  OUT UINT32          EBX_Reg;                    ///< CPUID instruction result in EBX
-  OUT UINT32          ECX_Reg;                    ///< CPUID instruction result in ECX
-  OUT UINT32          EDX_Reg;                    ///< CPUID instruction result in EDX
-} CPUID_DATA;
-
-// Topology Services definitions and macros
-#define TOPOLOGY_LIST_TERMINAL             0xFF             ///< End of list.
-
-
-#ifndef BIT0
-  #define BIT0        0x0000000000000001ull
-#endif
-#ifndef BIT1
-  #define BIT1        0x0000000000000002ull
-#endif
-#ifndef BIT2
-  #define BIT2        0x0000000000000004ull
-#endif
-#ifndef BIT3
-  #define BIT3        0x0000000000000008ull
-#endif
-#ifndef BIT4
-  #define BIT4        0x0000000000000010ull
-#endif
-#ifndef BIT5
-  #define BIT5        0x0000000000000020ull
-#endif
-#ifndef BIT6
-  #define BIT6        0x0000000000000040ull
-#endif
-#ifndef BIT7
-  #define BIT7        0x0000000000000080ull
-#endif
-#ifndef BIT8
-  #define BIT8        0x0000000000000100ull
-#endif
-#ifndef BIT9
-  #define BIT9        0x0000000000000200ull
-#endif
-#ifndef BIT10
-  #define BIT10       0x0000000000000400ull
-#endif
-#ifndef BIT11
-  #define BIT11       0x0000000000000800ull
-#endif
-#ifndef BIT12
-  #define BIT12       0x0000000000001000ull
-#endif
-#ifndef BIT13
-  #define BIT13       0x0000000000002000ull
-#endif
-#ifndef BIT14
-  #define BIT14       0x0000000000004000ull
-#endif
-#ifndef BIT15
-  #define BIT15       0x0000000000008000ull
-#endif
-#ifndef BIT16
-  #define BIT16       0x0000000000010000ull
-#endif
-#ifndef BIT17
-  #define BIT17       0x0000000000020000ull
-#endif
-#ifndef BIT18
-  #define BIT18       0x0000000000040000ull
-#endif
-#ifndef BIT19
-  #define BIT19       0x0000000000080000ull
-#endif
-#ifndef BIT20
-  #define BIT20       0x0000000000100000ull
-#endif
-#ifndef BIT21
-  #define BIT21       0x0000000000200000ull
-#endif
-#ifndef BIT22
-  #define BIT22       0x0000000000400000ull
-#endif
-#ifndef BIT23
-  #define BIT23       0x0000000000800000ull
-#endif
-#ifndef BIT24
-  #define BIT24       0x0000000001000000ull
-#endif
-#ifndef BIT25
-  #define BIT25       0x0000000002000000ull
-#endif
-#ifndef BIT26
-  #define BIT26       0x0000000004000000ull
-#endif
-#ifndef BIT27
-  #define BIT27       0x0000000008000000ull
-#endif
-#ifndef BIT28
-  #define BIT28       0x0000000010000000ull
-#endif
-#ifndef BIT29
-  #define BIT29       0x0000000020000000ull
-#endif
-#ifndef BIT30
-  #define BIT30       0x0000000040000000ull
-#endif
-#ifndef BIT31
-  #define BIT31       0x0000000080000000ull
-#endif
-#ifndef BIT32
-  #define BIT32       0x0000000100000000ull
-#endif
-#ifndef BIT33
-  #define BIT33       0x0000000200000000ull
-#endif
-#ifndef BIT34
-  #define BIT34       0x0000000400000000ull
-#endif
-#ifndef BIT35
-  #define BIT35       0x0000000800000000ull
-#endif
-#ifndef BIT36
-  #define BIT36       0x0000001000000000ull
-#endif
-#ifndef BIT37
-  #define BIT37       0x0000002000000000ull
-#endif
-#ifndef BIT38
-  #define BIT38       0x0000004000000000ull
-#endif
-#ifndef BIT39
-  #define BIT39       0x0000008000000000ull
-#endif
-#ifndef BIT40
-  #define BIT40       0x0000010000000000ull
-#endif
-#ifndef BIT41
-  #define BIT41       0x0000020000000000ull
-#endif
-#ifndef BIT42
-  #define BIT42       0x0000040000000000ull
-#endif
-#ifndef BIT43
-  #define BIT43       0x0000080000000000ull
-#endif
-#ifndef BIT44
-  #define BIT44       0x0000100000000000ull
-#endif
-#ifndef BIT45
-  #define BIT45       0x0000200000000000ull
-#endif
-#ifndef BIT46
-  #define BIT46       0x0000400000000000ull
-#endif
-#ifndef BIT47
-  #define BIT47       0x0000800000000000ull
-#endif
-#ifndef BIT48
-  #define BIT48       0x0001000000000000ull
-#endif
-#ifndef BIT49
-  #define BIT49       0x0002000000000000ull
-#endif
-#ifndef BIT50
-  #define BIT50       0x0004000000000000ull
-#endif
-#ifndef BIT51
-  #define BIT51       0x0008000000000000ull
-#endif
-#ifndef BIT52
-  #define BIT52       0x0010000000000000ull
-#endif
-#ifndef BIT53
-  #define BIT53       0x0020000000000000ull
-#endif
-#ifndef BIT54
-  #define BIT54       0x0040000000000000ull
-#endif
-#ifndef BIT55
-  #define BIT55       0x0080000000000000ull
-#endif
-#ifndef BIT56
-  #define BIT56       0x0100000000000000ull
-#endif
-#ifndef BIT57
-  #define BIT57       0x0200000000000000ull
-#endif
-#ifndef BIT58
-  #define BIT58       0x0400000000000000ull
-#endif
-#ifndef BIT59
-  #define BIT59       0x0800000000000000ull
-#endif
-#ifndef BIT60
-  #define BIT60       0x1000000000000000ull
-#endif
-#ifndef BIT61
-  #define BIT61       0x2000000000000000ull
-#endif
-#ifndef BIT62
-  #define BIT62       0x4000000000000000ull
-#endif
-#ifndef BIT63
-  #define BIT63       0x8000000000000000ull
-#endif
-
-#endif // _AMD_H_

pi/amd/00730F01/Dispatcher.h

diff --git a/pi/amd/00730F01/Dispatcher.h b/pi/amd/00730F01/Dispatcher.h
deleted file mode 100644
index eecdd0e..0000000
--- a/pi/amd/00730F01/Dispatcher.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Pushhigh Interface
- *
- * Contains interface to Pushhigh entry
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Legacy
- * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * ***************************************************************************
- */
-
-#ifndef _DISPATCHER_H_
-#define _DISPATCHER_H_
-
-// AGESA function prototypes
-AGESA_STATUS CALLCONV AmdAgesaDispatcher ( IN OUT VOID *ConfigPtr );
-AGESA_STATUS CALLCONV AmdAgesaCallout ( IN UINT32 Func, IN UINT32 Data, IN OUT VOID *ConfigPtr );
-
-#endif // _DISPATCHER_H_

pi/amd/00730F01/FT3b/AGESA.bin

diff --git a/pi/amd/00730F01/FT3b/AGESA.bin b/pi/amd/00730F01/FT3b/AGESA.bin
index a6379cc..bbb5655 100644
--- a/pi/amd/00730F01/FT3b/AGESA.bin
+++ b/pi/amd/00730F01/FT3b/AGESA.bin
Binary files differ

pi/amd/00730F01/FT3b/AGESA_Release_Notes.txt

diff --git a/pi/amd/00730F01/FT3b/AGESA_Release_Notes.txt b/pi/amd/00730F01/FT3b/AGESA_Release_Notes.txt
index e8da53f..7d1d3e7 100644
--- a/pi/amd/00730F01/FT3b/AGESA_Release_Notes.txt
+++ b/pi/amd/00730F01/FT3b/AGESA_Release_Notes.txt
@@ -22,40 +22,76 @@
 
 =============================================================================
 
-Version:  1.0.0.3                             Release Date: May 2014
-File:     MullinsPI_1.0.0.3.ZIP
+MullinsPI Version: 1.0.0.A                         Release Date: July 2015
+BinaryPI Version: 1.1                             Build date: Aug. 25 2015
+Built by coreboot toolchain v1.27 March 8th, 2015
+Test Board: Olive Hill Plus
 
 =============================================================================
+- Update to MullinsPI 1.0.0.A
+- BUG465142: ECC error injection fails
 
-Compliant to specs:                                                             PID#
-- BIOS and Kernel Developer's Guide Family 16h Models 30h-3Fh (Mullins) rev3.00 (#52740)
-- AGESA Arch2008 Interface Specification, Revision v2.20                        (#44065)
+Agesa ENHANCEMENTS and FIXED BUGS after 1.0.0.9:
+
+- BUG466307: PSP Trustlets is not updated properly
+
+
+Agesa ENHANCEMENTS and FIXED BUGS after 1.0.0.8:
+
+- ENH466202: PSP FW stack version D.1.1.4D
+- ENH460470: Remove the PSP DEBUG info to fix system hanging issue
+- PLAT-986:  Initial iTpmControlArea to avoid potential exception
+- ENH465927: Enable MMIO decode in iTpmGetResponse
+
+
+Agesa ENHANCEMENTS and FIXED BUGS after 1.0.0.7:
+
+- ENH465438: Add SMBIOS support for Sempron part
+- ENH465709: PSP FW stack version D.1.1.4A
+- ENH465474: SMU_Firmware_14_33
+
+
+Agesa ENHANCEMENTS and FIXED BUGS after 1.0.0.6:
+
+- ENH465011: PSP FW stack version D.1.1.47
+- BUG463002: SATA hardware revision ID gets overwritten
+- ENH463253: LAN performance data(Auto negotiation/1000M)
+
+
+Agesa ENHANCEMENTS and FIXED BUGS after 1.0.0.5:
+
+- ENH464327: PSP FW stack version D.1.1.42
+- ENH463121: AGESA Memory Option for JEDEC DDR3/DDR4 SPD MAC
+- BUG455965: System hangs at PC02FF when GFX card(Asic type: Topaz) plugged in
+- ENH462603: Enable SRT only when the platform really needs to run > 85C
+
+
+Agesa ENHANCEMENTS and FIXED BUGS after 1.0.0.4:
+
+- ENH462390: PSP FW stack version D.1.1.36
+- ENH457952: Publish PSP fTPM ready PPI
+- BUG460543: ECC lane fails training
+- BUG458825: Typo in dec file
+- ENH455439: Save & Restore PSP Bar3 related register for S3
+- BUG458331: Correct Size mismatch of create the recovery guid Hob
+- ENH455923: Update ALIB to support Windows XP
+- ENH454744: Save Restore FakeSMI related registers for S3
 
 =============================================================================
 
 =============================================================================
 
-Version:  1.0.0.2                             Release Date: March 2014
-File:     MullinsPI_1.0.0.2.ZIP
+MullinsPI Version: 1.0.0.4                         Release Date: Jun. 25 2015
+BinaryPI Version: 1.0
 
 =============================================================================
+From this commit we use two version numbers to identify binary PI:
+MullinsPI Version is the AGESA version. This is the same as original
+MullinsPI.
+BinaryPI Version is the AGESA.bin version. We will change this version when
+we upload new AGESA.bin.
 
-Compliant to specs:                                                     	PID#
-- BIOS and Kernel Developer's Guide Family 16h Models 30h-3Fh (Mullins) rev1.04	(#52740)
-- AGESA Arch2008 Interface Specification, Revision v2.20                        (#44065)
+- Add PspMboxBiosCmdDramInfo and PspMboxBiosCmdExitBootServices to fix
+  Windows 7 hang after graphics driver installed.
 
 =============================================================================
-
-=============================================================================
-
-Version:  1.0.0.0                             Release Date: February 2014
-File:     MullinsPI_1.0.0.0.ZIP
-
-=============================================================================
-
-Compliant to specs:                                                     	PID#
-- BIOS and Kernel Developer's Guide Family 16h Models 30h-3Fh (Mullins) rev1.03	(#52740)
-- AGESA Arch2008 Interface Specification, Revision v2.20                        (#44065)
-
-=============================================================================
-

pi/amd/00730F01/Include/Filecode.h

diff --git a/pi/amd/00730F01/Include/Filecode.h b/pi/amd/00730F01/Include/Filecode.h
deleted file mode 100644
index c2893a7..0000000
--- a/pi/amd/00730F01/Include/Filecode.h
+++ /dev/null
@@ -1,823 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Collectively assign unique filecodes for assert and debug to each source file.
- *
- * Publish values for decorated filenames, which can be used for
- * ASSERT and debug support using a preprocessor define like:
- * @n <tt> \#define FILECODE MY_C_FILENAME_FILECODE </tt> @n
- * This file serves as a reference for debugging to associate the code and filename.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Include
- * @e \$Revision: 282320 $   @e \$Date: 2014-01-09 20:13:34 -0600 (Thu, 09 Jan 2014) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _FILECODE_H_
-#define _FILECODE_H_
-
-#define UNASSIGNED_FILE_FILECODE                                         (0xFFFF)
-
-/// For debug use in any Platform's options C file.
-/// Can be reused for platforms and image builds, since only one options file can be built.
-#define PLATFORM_SPECIFIC_OPTIONS_FILECODE                               (0xBBBB)
-
-
-#define PROC_GNB_COMMON_GNBLIBFEATURES_FILECODE                          (0xA001)
-#define PROC_GNB_GNBINITATEARLY_FILECODE                                 (0xA017)
-#define PROC_GNB_GNBINITATENV_FILECODE                                   (0xA020)
-#define PROC_GNB_GNBINITATLATE_FILECODE                                  (0xA021)
-#define PROC_GNB_GNBINITATMID_FILECODE                                   (0xA022)
-#define PROC_GNB_GNBINITATPOST_FILECODE                                  (0xA023)
-#define PROC_GNB_GNBINITATRESET_FILECODE                                 (0xA024)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIB_FILECODE                    (0xA025)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBCPUACC_FILECODE              (0xA026)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBHEAP_FILECODE                (0xA027)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBIOACC_FILECODE               (0xA028)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBMEMACC_FILECODE              (0xA029)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBPCI_FILECODE                 (0xA02A)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBPCIACC_FILECODE              (0xA030)
-#define PROC_GNB_MODULES_GNBGFXINITLIBV1_GFXCARDINFO_FILECODE            (0xA031)
-#define PROC_GNB_MODULES_GNBGFXINITLIBV1_GFXENUMCONNECTORS_FILECODE      (0xA032)
-#define PROC_GNB_MODULES_GNBGFXINITLIBV1_GFXPOWERPLAYTABLE_FILECODE      (0xA033)
-#define PROC_GNB_MODULES_GNBNBINITLIBV1_GNBNBINITLIBV1_FILECODE          (0xA034)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_PCIECONFIGDATA_FILECODE           (0xA036)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_PCIECONFIGLIB_FILECODE            (0xA037)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_PCIEINPUTPARSER_FILECODE          (0xA038)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_PCIEMAPTOPOLOGY_FILECODE          (0xA039)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEASPMBLACKLIST_FILECODE     (0xA03B)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEASPMEXITLATENCY_FILECODE   (0xA03C)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPHYSERVICES_FILECODE       (0xA03D)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPIFSERVICES_FILECODE       (0xA03E)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPORTREGACC_FILECODE        (0xA03F)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPORTSERVICES_FILECODE      (0xA041)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEPOWERMGMT_FILECODE         (0xA043)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIESILICONSERVICES_FILECODE   (0xA045)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIETIMER_FILECODE             (0xA046)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIETOPOLOGYSERVICES_FILECODE  (0xA047)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEUTILITYLIB_FILECODE        (0xA048)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEWRAPPERREGACC_FILECODE     (0xA049)
-#define PROC_GNB_MODULES_GNBPCIETRAININGV1_PCIETRAINING_FILECODE         (0xA04A)
-#define PROC_GNB_MODULES_GNBPCIETRAININGV1_PCIEWORKAROUNDS_FILECODE      (0xA04B)
-#define PROC_GNB_MODULES_GNBPCIECOMMCLKCFG_PCIECOMMCLKCFG_FILECODE       (0xA04C)
-
-#define PROC_GNB_MODULES_GNBGFXCONFIG_GFXCONFIGENV_FILECODE              (0xA08E)
-#define PROC_GNB_MODULES_GNBGFXCONFIG_GFXCONFIGPOST_FILECODE             (0xA08F)
-#define PROC_GNB_MODULES_GNBTABLE_GNBTABLE_FILECODE                      (0xA090)
-#define PROC_GNB_MODULES_GNBGFXINITLIBV1_GNBGFXINITLIBV1_FILECODE        (0xA091)
-#define PROC_GNB_MODULES_GNBGFXCONFIG_GFXCONFIGLIB_FILECODE              (0xA093)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV4_PCIEWRAPPERSERVICESV4_FILECODE (0xA0A6)
-#define PROC_GNB_MODULES_GNBIOMMUIVRS_GNBIOMMUIVRS_FILECODE              (0xA0A7)
-#define PROC_GNB_MODULES_GNBIVRSLIB_GNBIVRSLIB_FILECODE                  (0xA0A8)
-#define PROC_GNB_MODULES_GNBNBINITLIBV4_GNBNBINITLIBV4_FILECODE          (0xA0A9)
-#define PROC_GNB_MODULES_GNBFAMTRANSLATION_GNBPCIETRANSLATION_FILECODE   (0xA0AA)
-
-#define PROC_GNB_MODULES_GNBSBLIB_GNBSBPCIE_FILECODE                     (0xA0BA)
-#define PROC_GNB_MODULES_GNBSBLIB_GNBSBLIB_FILECODE                      (0xA0BB)
-#define PROC_GNB_MODULES_GNBSBIOMMULIB_GNBSBIOMMULIB_FILECODE            (0xA0BC)
-#define PROC_GNB_MODULES_GNBCOMMONLIB_GNBTIMERLIB_FILECODE               (0xA0BD)
-#define PROC_GNB_MODULES_GNBSSOCKETLIB_GNBSSOCKETLIB_FILECODE            (0xA0BF)
-#define PROC_GNB_MODULES_GNBPCIECONFIG_GNBHANDLELIB_FILECODE             (0xA0C0)
-#define PROC_GNB_MODULES_GNBPCIEASPM_PCIEASPM_FILECODE                   (0xA0C2)
-
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEASPMEXITLATENCYV5_FILECODE (0xA0C5)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEPIFSERVICESV5_FILECODE     (0xA0C6)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEPORTSERVICESV5_FILECODE    (0xA0C7)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEPOWERMGMTV5_FILECODE       (0xA0C8)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIESILICONSERVICESV5_FILECODE (0xA0C9)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIEWRAPPERSERVICESV5_FILECODE (0xA0CA)
-#define PROC_GNB_MODULES_GNBNBINITLIBV5_GNBNBINITLIBV5_FILECODE          (0xA0CB)
-
-#define PROC_GNB_MODULES_GNBFAMTRANSLATION_GNBTRANSLATION_FILECODE       (0xA0DB)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV4_PCIEPOWERMGMTV4_FILECODE       (0xA0DC)
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV4_PCIEPORTSERVICESV4_FILECODE    (0xA0DD)
-
-#define PROC_GNB_MODULES_GNBGFXCONFIG_GFXCONFIGMID_FILECODE              (0xA0E0)
-
-#define PROC_GNB_MODULES_GNBIOAPIC_GNBIOAPIC_FILECODE                    (0xA0EE)
-
-#define PROC_GNB_MODULES_GNBPCIEMAXPAYLOAD_PCIEMAXPAYLOAD_FILECODE       (0xA0F4)
-#define PROC_GNB_MODULES_GNBPCIECLKPM_PCIECLKPM_FILECODE                 (0xA0F5)
-
-#define PROC_GNB_MODULES_GNBPCIEINITLIBV5_PCIETOPOLOGYSERVICESV5_FILECODE (0xA100)
-#define PROC_GNB_MODULES_GNBPCIETRAININGV2_PCIETRAININGV2_FILECODE        (0xA101)
-#define PROC_GNB_MODULES_GNBPCIETRAININGV2_PCIEWORKAROUNDSV2_FILECODE     (0xA102)
-
-#define PROC_RECOVERY_GNB_GNBRECOVERY_FILECODE                           (0xAE01)
-#define PROC_RECOVERY_GNB_NBINITRECOVERY_FILECODE                        (0xAE02)
-#define PROC_GNB_GNBINITATS3SAVE_FILECODE                                (0xAE03)
-#define PROC_GNB_MODULES_GNBSVIEW_GNBSVIEW_FILECODE                      (0xAE04)
-
-#define PROC_GNB_MODULES_GNBIOMMUSCRATCH_GNBIOMMUSCRATCH_FILECODE        (0xAE18)
-#define PROC_GNB_MODULES_GNBSMULIBV7_GNBSMUINITLIBV7_FILECODE            (0xAE1A)
-
-#define PROC_GNB_MODULES_GNBPCIEALIBV2_PCIEALIBV2_FILECODE               (0xAE33)
-#define PROC_GNB_MODULES_GNBURALIBV1_GNBURALIBV1_FILECODE                (0xAE3A)
-#define PROC_GNB_MODULES_GNBGFXINTTABLEV3_GFXLIBV3_FILECODE              (0xAE41)
-#define PROC_GNB_MODULES_GNBGFXINTTABLEV3_GFXINTEGRATEDINFOTABLE_FILECODE (0xAE42)
-#define PROC_GNB_MODULES_GNBGFXINTTABLEV3_GFXPWRPLAYTABLE_FILECODE       (0xAE43)
-#define PROC_GNB_MODULES_GNBSCSLIBV1_GNBSCSLIBV1_FILECODE                (0xAE44)
-
-#define PROC_GNB_MODULES_GNBINITML_GFXENVINITML_FILECODE                 (0xAE50)
-#define PROC_GNB_MODULES_GNBINITML_GFXINTEGRATEDINFOTABLEML_FILECODE     (0xAE51)
-#define PROC_GNB_MODULES_GNBINITML_GFXMIDINITML_FILECODE                 (0xAE52)
-#define PROC_GNB_MODULES_GNBINITML_GFXPOSTINITML_FILECODE                (0xAE53)
-#define PROC_GNB_MODULES_GNBINITML_GFXLIBML_FILECODE                     (0xAE54)
-#define PROC_GNB_MODULES_GNBINITML_GNBEARLYINITML_FILECODE               (0xAE55)
-#define PROC_GNB_MODULES_GNBINITML_GNBENVINITML_FILECODE                 (0xAE56)
-#define PROC_GNB_MODULES_GNBINITML_GNBMIDINITML_FILECODE                 (0xAE57)
-#define PROC_GNB_MODULES_GNBINITML_GNBPOSTINITML_FILECODE                (0xAE58)
-#define PROC_GNB_MODULES_GNBINITML_GNBREGISTERACCML_FILECODE             (0xAE59)
-#define PROC_GNB_MODULES_GNBINITML_PCIECOMPLEXDATAML_FILECODE            (0xAE5A)
-#define PROC_GNB_MODULES_GNBINITML_PCIECONFIGML_FILECODE                 (0xAE5B)
-#define PROC_GNB_MODULES_GNBINITML_PCIEEARLYINITML_FILECODE              (0xAE5C)
-#define PROC_GNB_MODULES_GNBINITML_PCIEENVINITML_FILECODE                (0xAE5D)
-#define PROC_GNB_MODULES_GNBINITML_PCIEMIDINITML_FILECODE                (0xAE5F)
-#define PROC_GNB_MODULES_GNBINITML_PCIEPOSTINITML_FILECODE               (0xAE60)
-#define PROC_GNB_MODULES_GNBINITML_PCIELIBML_FILECODE                    (0xAE61)
-#define PROC_GNB_MODULES_GNBINITML_GFXGMCINITML_FILECODE                 (0xAE62)
-#define PROC_GNB_MODULES_GNBINITML_ALIBML_FILECODE                       (0xAE63)
-#define PROC_GNB_MODULES_GNBINITML_GNBFUSETABLEML_FILECODE               (0xAE64)
-#define PROC_GNB_MODULES_GNBINITML_GFXSAMUINITML_FILECODE                (0xAE65)
-#define PROC_GNB_MODULES_GNBINITML_GNBURAML_FILECODE                     (0xAE66)
-#define PROC_GNB_MODULES_GNBINITML_GNBURATOKENMAPML_FILECODE             (0xAE67)
-#define PROC_GNB_MODULES_GNBINITML_GNBIOMMUIVRSML_FILECODE               (0xAE68)
-#define PROC_GNB_MODULES_GNBINITML_GNBPSPML_FILECODE                     (0xAE69)
-#define PROC_GNB_MODULES_GNBINITML_GNBSMUBIOSTABLEML_FILECODE            (0xAE6A)
-
-// FCH
-#define PROC_FCH_COMMON_ACPILIB_FILECODE                                 (0xB010)
-#define PROC_FCH_COMMON_FCHLIB_FILECODE                                  (0xB011)
-#define PROC_FCH_COMMON_FCHCOMMON_FILECODE                               (0xB012)
-#define PROC_FCH_COMMON_FCHCOMMONSMM_FILECODE                            (0xB013)
-#define PROC_FCH_COMMON_MEMLIB_FILECODE                                  (0xB014)
-#define PROC_FCH_COMMON_PCILIB_FILECODE                                  (0xB015)
-#define PROC_FCH_COMMON_FCHPELIB_FILECODE                                (0xB016)
-#define UEFI_DXE_AMDIGPUVGACONTROLDXE_AMDIGPUVGACONTROLDXE_FILECODE      (0xB218)
-#define UEFI_SMM_MEMSMMLIB_MEMSMMLIB_FILECODE                             (0xB2C1)
-#define UEFI_SMM_MEMSMMLIB_ML_DRAMMAPML_FILECODE                          (0xB2C4)
-#define PROC_FCH_AVALON_AVALONAZALIA_AVALONAZALIARESET_FILECODE                           (0xB300)
-#define PROC_FCH_AVALON_AVALONAZALIA_AVALONAZALIAENV_FILECODE                             (0xB301)
-#define PROC_FCH_AVALON_AVALONAZALIA_AVALONAZALIAMID_FILECODE                             (0xB302)
-#define PROC_FCH_AVALON_AVALONAZALIA_AVALONAZALIALATE_FILECODE                            (0xB303)
-#define PROC_FCH_AVALON_AVALONHWACPI_AVALONHWACPIRESET_FILECODE                           (0xB310)
-#define PROC_FCH_AVALON_AVALONHWACPI_AVALONHWACPIENV_FILECODE                             (0xB311)
-#define PROC_FCH_AVALON_AVALONHWACPI_AVALONHWACPIMID_FILECODE                             (0xB312)
-#define PROC_FCH_AVALON_AVALONHWACPI_AVALONHWACPILATE_FILECODE                            (0xB313)
-#define PROC_FCH_AVALON_AVALONHWACPI_AVALONSSSERVICE_FILECODE                             (0xB314)
-#define PROC_FCH_AVALON_AVALONHWACPI_AVALONHWACPIENVSERVICE_FILECODE                      (0xB315)
-#define PROC_FCH_AVALON_AVALONHWACPI_AVALONHWACPIMIDSERVICE_FILECODE                      (0xB316)
-#define PROC_FCH_AVALON_AVALONHWACPI_AVALONHWACPILATESERVICE_FILECODE                     (0xB317)
-#define PROC_FCH_AVALON_AVALONHWM_AVALONHWMRESET_FILECODE                                 (0xB320)
-#define PROC_FCH_AVALON_AVALONHWM_AVALONHWMENV_FILECODE                                   (0xB321)
-#define PROC_FCH_AVALON_AVALONHWM_AVALONHWMMID_FILECODE                                   (0xB322)
-#define PROC_FCH_AVALON_AVALONHWM_AVALONHWMLATE_FILECODE                                  (0xB323)
-#define PROC_FCH_AVALON_AVALONHWM_AVALONHWMENVSERVICE_FILECODE                            (0xB324)
-#define PROC_FCH_AVALON_AVALONHWM_AVALONHWMMIDSERVICE_FILECODE                            (0xB325)
-#define PROC_FCH_AVALON_AVALONHWM_AVALONHWMLATESERVICE_FILECODE                           (0xB326)
-#define PROC_FCH_AVALON_AVALONINTERFACE_AVALONFCHINITRESET_FILECODE                       (0xB327)
-#define PROC_FCH_AVALON_AVALONINTERFACE_AVALONFCHINITENV_FILECODE                         (0xB328)
-#define PROC_FCH_AVALON_AVALONINTERFACE_AVALONFCHINITMID_FILECODE                         (0xB329)
-#define PROC_FCH_AVALON_AVALONINTERFACE_AVALONFCHINITLATE_FILECODE                        (0xB32A)
-#define PROC_FCH_AVALON_AVALONINTERFACE_AVALONFCHINITS3_FILECODE                          (0xB32B)
-#define PROC_FCH_AVALON_AVALONINTERFACE_AVALONINITRESETDEF_FILECODE                       (0xB32C)
-#define PROC_FCH_AVALON_AVALONINTERFACE_AVALONINITENVDEF_FILECODE                         (0xB32D)
-#define PROC_FCH_AVALON_AVALONINTERFACE_AVALONFCHTASKLAUNCHER_FILECODE                    (0xB32E)
-#define PROC_FCH_AVALON_AVALONIMC_AVALONIMCRESET_FILECODE                                 (0xB330)
-#define PROC_FCH_AVALON_AVALONIMC_AVALONIMCENV_FILECODE                                   (0xB331)
-#define PROC_FCH_AVALON_AVALONIMC_AVALONIMCMID_FILECODE                                   (0xB332)
-#define PROC_FCH_AVALON_AVALONIMC_AVALONIMCLATE_FILECODE                                  (0xB333)
-#define PROC_FCH_AVALON_AVALONIMC_AVALONFCHECRESET_FILECODE                               (0xB334)
-#define PROC_FCH_AVALON_AVALONIMC_AVALONFCHECENV_FILECODE                                 (0xB335)
-#define PROC_FCH_AVALON_AVALONIMC_AVALONFCHECMID_FILECODE                                 (0xB336)
-#define PROC_FCH_AVALON_AVALONIMC_AVALONFCHECLATE_FILECODE                                (0xB337)
-#define PROC_FCH_AVALON_AVALONIMC_AVALONIMCLIB_FILECODE                                   (0xB338)
-#define PROC_FCH_AVALON_AVALONIMC_AVALONIMCSERVICE_FILECODE                               (0xB339)
-#define PROC_FCH_AVALON_AVALONIR_AVALONIRENV_FILECODE                                     (0xB33A)
-#define PROC_FCH_AVALON_AVALONIR_AVALONIRMID_FILECODE                                     (0xB33B)
-#define PROC_FCH_AVALON_AVALONIR_AVALONIRLATE_FILECODE                                    (0xB33C)
-#define PROC_FCH_AVALON_AVALONPCIE_AVALONABRESET_FILECODE                                 (0xB340)
-#define PROC_FCH_AVALON_AVALONPCIE_AVALONABENV_FILECODE                                   (0xB341)
-#define PROC_FCH_AVALON_AVALONPCIE_AVALONABMID_FILECODE                                   (0xB342)
-#define PROC_FCH_AVALON_AVALONPCIE_AVALONABLATE_FILECODE                                  (0xB343)
-#define PROC_FCH_AVALON_AVALONPCIE_AVALONABENVSERVICE_FILECODE                            (0xB34C)
-#define PROC_FCH_AVALON_AVALONPCIE_AVALONABRESETSERVICE_FILECODE                          (0xB34D)
-#define PROC_FCH_AVALON_AVALONPCIE_AVALONABSERVICE_FILECODE                               (0xB34E)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATARESET_FILECODE                               (0xB360)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATAENV_FILECODE                                 (0xB361)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATAMID_FILECODE                                 (0xB362)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATALATE_FILECODE                                (0xB363)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATARESETSERVICE_FILECODE                        (0xB364)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATAENVSERVICE_FILECODE                          (0xB365)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATASERVICE_FILECODE                             (0xB366)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATALIB_FILECODE                                 (0xB367)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATAENVLIB_FILECODE                              (0xB368)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONAHCILIB_FILECODE                                 (0xB369)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONAHCIENV_FILECODE                                 (0xB36A)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONAHCIMID_FILECODE                                 (0xB36B)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONAHCILATE_FILECODE                                (0xB36C)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONRAIDLIB_FILECODE                                 (0xB36D)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONRAIDENV_FILECODE                                 (0xB36E)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONRAIDMID_FILECODE                                 (0xB36F)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONRAIDLATE_FILECODE                                (0xB370)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONIDE2AHCILIB_FILECODE                             (0xB371)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONIDE2AHCIENV_FILECODE                             (0xB372)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONIDE2AHCIMID_FILECODE                             (0xB373)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONIDE2AHCILATE_FILECODE                            (0xB374)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATAIDELIB_FILECODE                              (0xB375)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATAIDEENV_FILECODE                              (0xB376)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATAIDEMID_FILECODE                              (0xB377)
-#define PROC_FCH_AVALON_AVALONSATA_AVALONSATAIDELATE_FILECODE                             (0xB378)
-#define PROC_FCH_AVALON_AVALONSD_AVALONSDENV_FILECODE                                     (0xB381)
-#define PROC_FCH_AVALON_AVALONSD_AVALONSDMID_FILECODE                                     (0xB382)
-#define PROC_FCH_AVALON_AVALONSD_AVALONSDLATE_FILECODE                                    (0xB383)
-#define PROC_FCH_AVALON_AVALONSD_AVALONSDRESETSERVICE_FILECODE                            (0xB384)
-#define PROC_FCH_AVALON_AVALONSD_AVALONSDENVSERVICE_FILECODE                              (0xB385)
-#define PROC_FCH_AVALON_AVALONSD_AVALONSDSERVICE_FILECODE                                 (0xB386)
-#define PROC_FCH_AVALON_AVALONSPI_AVALONSPIRESET_FILECODE                                 (0xB390)
-#define PROC_FCH_AVALON_AVALONSPI_AVALONSPIENV_FILECODE                                   (0xB391)
-#define PROC_FCH_AVALON_AVALONSPI_AVALONSPIMID_FILECODE                                   (0xB392)
-#define PROC_FCH_AVALON_AVALONSPI_AVALONSPILATE_FILECODE                                  (0xB393)
-#define PROC_FCH_AVALON_AVALONSPI_AVALONLPCRESET_FILECODE                                 (0xB394)
-#define PROC_FCH_AVALON_AVALONSPI_AVALONLPCENV_FILECODE                                   (0xB395)
-#define PROC_FCH_AVALON_AVALONSPI_AVALONLPCMID_FILECODE                                   (0xB396)
-#define PROC_FCH_AVALON_AVALONSPI_AVALONLPCLATE_FILECODE                                  (0xB397)
-#define PROC_FCH_AVALON_AVALONSPI_AVALONLPCRESETSERVICE_FILECODE                          (0xB398)
-#define PROC_FCH_AVALON_AVALONSPI_AVALONLPCENVSERVICE_FILECODE                            (0xB399)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONUSBRESET_FILECODE                                 (0xB3A0)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONUSBENV_FILECODE                                   (0xB3A1)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONUSBMID_FILECODE                                   (0xB3A2)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONUSBLATE_FILECODE                                  (0xB3A3)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONEHCIRESET_FILECODE                                (0xB3A4)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONEHCIENV_FILECODE                                  (0xB3A5)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONEHCIMID_FILECODE                                  (0xB3A6)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONEHCILATE_FILECODE                                 (0xB3A7)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONEHCIMIDSERVICE_FILECODE                           (0xB3A8)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONEHCIENVSERVICE_FILECODE                           (0xB3A9)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONEHCILATESERVICE_FILECODE                          (0xB3AA)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONXHCIRESET_FILECODE                                (0xB3B2)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONXHCIENV_FILECODE                                  (0xB3B3)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONXHCIMID_FILECODE                                  (0xB3B4)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONXHCILATE_FILECODE                                 (0xB3B5)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONXHCIRESETSERVICE_FILECODE                         (0xB3B6)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONXHCIENVSERVICE_FILECODE                           (0xB3B7)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONXHCIMIDSERVICE_FILECODE                           (0xB3B8)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONXHCILATESERVICE_FILECODE                          (0xB3B9)
-#define PROC_FCH_AVALON_AVALONUSB_AVALONXHCIRECOVERY_FILECODE                             (0xB3BA)
-#define UEFI_FCH_AVALON_DXE_FCHACPICS_FCHACPICS_FILECODE                                  (0xB308)
-#define UEFI_FCH_AVALON_DXE_FCHACPICS_FCHACPICSAML_FILECODE                               (0xB309)
-#define UEFI_FCH_AVALON_DXE_FCHACPICS_FCHACPICSCONTROL_FILECODE                           (0xB30A)
-#define UEFI_FCH_AVALON_DXE_FCHACPICS_FUNCTIONS_FCHD3COLD_FCHD3COLD_FILECODE              (0xB30B)
-#define UEFI_FCH_AVALON_DXE_AMDFCHHWM_AMDFCHHWM_FILECODE                                  (0xB3C1)
-#define UEFI_FCH_AVALON_DXE_AMDFCHWHEA_AMDFCHWHEA_FILECODE                                (0xB3C2)
-#define UEFI_FCH_AVALON_DXE_AMDFCHWHEA_AMDFCHWHEAEINJ_FILECODE                            (0xB3C3)
-#define UEFI_FCH_AVALON_DXE_AMDFCHWHEA_AMDFCHWHEAHEST_FILECODE                            (0xB3C4)
-#define UEFI_FCH_AVALON_DXE_CF9RESET_CF9RESET_FILECODE                                    (0xB3C5)
-#define UEFI_FCH_AVALON_DXE_CF9RESET_IA32_IA32CF9RESET_FILECODE                           (0xB3C6)
-#define UEFI_FCH_AVALON_DXE_CF9RESET_X64_X64CF9RESET_FILECODE                             (0xB3C7)
-#define UEFI_FCH_AVALON_DXE_FCHDXE_FCHDXE_FILECODE                                        (0xB3C8)
-#define UEFI_FCH_AVALON_DXE_FCHDXE_USBOC_FILECODE                                         (0xB3C9)
-#define UEFI_FCH_AVALON_DXE_FCHDXEAUX_DXEBOOTTIMER_FILECODE                               (0xB3CA)
-#define UEFI_FCH_AVALON_DXE_FCHDXEAUX_DXEDISUSBPORT_FILECODE                              (0xB3CB)
-#define UEFI_FCH_AVALON_DXE_FCHDXEAUX_DXEESATAPORT_FILECODE                               (0xB3CC)
-#define UEFI_FCH_AVALON_DXE_FCHDXEAUX_DXEGPIO_FILECODE                                    (0xB3CD)
-#define UEFI_FCH_AVALON_DXE_FCHDXEAUX_DXEGPIOREAD_FILECODE                                (0xB3CE)
-#define UEFI_FCH_AVALON_DXE_FCHDXEAUX_FCHDXEAUX_FILECODE                                  (0xB3CF)
-#define UEFI_FCH_AVALON_DXE_FCHDXELIB_FCHDXELIB_FILECODE                                  (0xB3D0)
-#define UEFI_FCH_AVALON_DXE_FCHDXELPCCLKRUN_FCHDXELPCCLKRUN_FILECODE                      (0xB3D1)
-#define UEFI_FCH_AVALON_DXE_FCHDXEMMIO_FCHDXEMMIO_FILECODE                                (0xB3D2)
-#define UEFI_FCH_AVALON_DXE_LEGACYINTERRUPT_LEGACYINTERRUPT_FILECODE                      (0xB3D3)
-#define UEFI_FCH_AVALON_DXE_SMBUS_SMBUSLIGHT_FILECODE                                     (0xB3D4)
-#define UEFI_FCH_AVALON_DXE_SMMCONTROL_SMMCONTROL_FILECODE                                (0xB3D5)
-#define UEFI_FCH_AVALON_PEI_FCHPEI_FCHEHCIRECOVERY_FILECODE                               (0xB3D6)
-#define UEFI_FCH_AVALON_PEI_FCHPEI_FCHPEI_FILECODE                                        (0xB3D8)
-#define UEFI_FCH_AVALON_PEI_FCHPEI_FCHRESET_FILECODE                                      (0xB3D9)
-#define UEFI_FCH_AVALON_PEI_FCHPEI_FCHSATARECOVERY_FILECODE                               (0xB3DA)
-#define UEFI_FCH_AVALON_PEI_FCHPEI_FCHSTALL_FILECODE                                      (0xB3DB)
-#define UEFI_FCH_AVALON_PEI_FCHPEI_FCHXHCIRECOVERY_FILECODE                               (0xB3DC)
-#define UEFI_FCH_AVALON_PEI_FCHPEIAUX_FCHPEIAUX_FILECODE                                  (0xB3DD)
-#define UEFI_FCH_AVALON_PEI_FCHPEIAUX_PEIBOOTTIMER_FILECODE                               (0xB3DE)
-#define UEFI_FCH_AVALON_PEI_FCHPEIAUX_PEIDISUSBPORT_FILECODE                              (0xB3DF)
-#define UEFI_FCH_AVALON_PEI_FCHPEIAUX_PEIGPIO_FILECODE                                    (0xB3E0)
-#define UEFI_FCH_AVALON_PEI_FCHPEIAUX_PEIGPIOREAD_FILECODE                                (0xB3E1)
-#define UEFI_FCH_AVALON_PEI_FCHPEIAUX_PEIOSCOUTCLOCK_FILECODE                             (0xB3E2)
-#define UEFI_FCH_AVALON_PEI_FCHPEILIB_FCHPEILIB_FILECODE                                  (0xB3E3)
-#define UEFI_FCH_AVALON_PEI_FCHPEILIB_LIBAMDPEI_FILECODE                                  (0xB3E4)
-#define UEFI_FCH_AVALON_PEI_SMBUS_SMBUS_FILECODE                                          (0xB3E5)
-#define UEFI_FCH_AVALON_SMM_FCHSMM_FCHSMM_FILECODE                                        (0xB3E6)
-#define UEFI_FCH_AVALON_SMM_FCHSMM_GPESMI_FILECODE                                        (0xB3E7)
-#define UEFI_FCH_AVALON_SMM_FCHSMM_IOTRAPSMI_FILECODE                                     (0xB3E8)
-#define UEFI_FCH_AVALON_SMM_FCHSMM_MISCSMI_FILECODE                                       (0xB3E9)
-#define UEFI_FCH_AVALON_SMM_FCHSMM_PERIODICTIMERSMI_FILECODE                              (0xB3EA)
-#define UEFI_FCH_AVALON_SMM_FCHSMM_POWERBUTTONSMI_FILECODE                                (0xB3EB)
-#define UEFI_FCH_AVALON_SMM_FCHSMM_SWSMI_FILECODE                                         (0xB3EC)
-#define UEFI_FCH_AVALON_SMM_FCHSMM_SXSMI_FILECODE                                         (0xB3ED)
-#define UEFI_FCH_AVALON_SMM_FCHSMMCOMPLEMENT_IMCCONTROL_IMCCONTROL_FILECODE                                  (0xB3F0)
-#define UEFI_FCH_AVALON_SMM_FCHSMMCOMPLEMENT_IMCCONTROL_IMCCONTROLLIB_FILECODE                               (0xB3F1)
-#define UEFI_FCH_AVALON_SMM_FCHSMMLIB_FCHDXECOMMON_FILECODE                                                  (0xB3F5)
-#define UEFI_FCH_AVALON_SMM_FCHSMMLIB_FCHSMMLIB_FILECODE                                                     (0xB3F6)
-#define UEFI_FCH_AVALON_SMM_FCHSMMDISPATCHER_FCHSMMDISPATCHER_FILECODE                                       (0xB3F7)
-#define UEFI_FCH_AVALON_SMM_FCHSMMDISPATCHER_FCHSMMGPEDISPATCHER_FCHSMMGPEDISPATCHER_FILECODE                (0xB3F8)
-#define UEFI_FCH_AVALON_SMM_FCHSMMDISPATCHER_FCHSMMIOTRAPDISPATCHER_FCHSMMIOTRAPDISPATCHER_FILECODE          (0xB3F9)
-#define UEFI_FCH_AVALON_SMM_FCHSMMDISPATCHER_FCHSMMMISCDISPATCHER_FCHSMMMISCDISPATCHER_FILECODE              (0xB3FA)
-#define UEFI_FCH_AVALON_SMM_FCHSMMDISPATCHER_FCHSMMPERIODICALDISPATCHER_FCHSMMPERIODICALDISPATCHER_FILECODE  (0xB3FB)
-#define UEFI_FCH_AVALON_SMM_FCHSMMDISPATCHER_FCHSMMPWRBTNDISPATCHER_FCHSMMPWRBTNDISPATCHER_FILECODE          (0xB3FC)
-#define UEFI_FCH_AVALON_SMM_FCHSMMDISPATCHER_FCHSMMSWDISPATCHER_FCHSMMSWDISPATCHER_FILECODE                  (0xB3FE)
-#define UEFI_FCH_AVALON_SMM_FCHSMMDISPATCHER_FCHSMMSXDISPATCHER_FCHSMMSXDISPATCHER_FILECODE                  (0xB3FF)
-#define UEFI_FCH_AVALON_SMM_FCHSMMDISPATCHER_FCHSMMUSBDISPATCHER_FCHSMMUSBDISPATCHER_FILECODE                (0xB3F2)
-
-#define PROC_FCH_KERN_KERNAZALIA_KERNAZALIARESET_FILECODE                           (0xB400)
-#define PROC_FCH_KERN_KERNAZALIA_KERNAZALIAENV_FILECODE                             (0xB401)
-#define PROC_FCH_KERN_KERNAZALIA_KERNAZALIAMID_FILECODE                             (0xB402)
-#define PROC_FCH_KERN_KERNAZALIA_KERNAZALIALATE_FILECODE                            (0xB403)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPIRESET_FILECODE                           (0xB410)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPIENV_FILECODE                             (0xB411)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPIMID_FILECODE                             (0xB412)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPILATE_FILECODE                            (0xB413)
-#define PROC_FCH_KERN_KERNHWACPI_KERNSSSERVICE_FILECODE                             (0xB414)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPIENVSERVICE_FILECODE                      (0xB415)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPIMIDSERVICE_FILECODE                      (0xB416)
-#define PROC_FCH_KERN_KERNHWACPI_KERNHWACPILATESERVICE_FILECODE                     (0xB417)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMRESET_FILECODE                                 (0xB420)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMENV_FILECODE                                   (0xB421)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMMID_FILECODE                                   (0xB422)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMLATE_FILECODE                                  (0xB423)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMENVSERVICE_FILECODE                            (0xB424)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMMIDSERVICE_FILECODE                            (0xB425)
-#define PROC_FCH_KERN_KERNHWM_KERNHWMLATESERVICE_FILECODE                           (0xB426)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNFCHINITRESET_FILECODE                       (0xB427)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNFCHINITENV_FILECODE                         (0xB428)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNFCHINITMID_FILECODE                         (0xB429)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNFCHINITLATE_FILECODE                        (0xB42A)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNFCHINITS3_FILECODE                          (0xB42B)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNINITRESETDEF_FILECODE                       (0xB42C)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNINITENVDEF_FILECODE                         (0xB42D)
-#define PROC_FCH_KERN_KERNINTERFACE_KERNFCHTASKLAUNCHER_FILECODE                    (0xB42E)
-#define PROC_FCH_KERN_KERNIMC_KERNIMCRESET_FILECODE                                 (0xB430)
-#define PROC_FCH_KERN_KERNIMC_KERNIMCENV_FILECODE                                   (0xB431)
-#define PROC_FCH_KERN_KERNIMC_KERNIMCMID_FILECODE                                   (0xB432)
-#define PROC_FCH_KERN_KERNIMC_KERNIMCLATE_FILECODE                                  (0xB433)
-#define PROC_FCH_KERN_KERNIMC_KERNFCHECRESET_FILECODE                               (0xB434)
-#define PROC_FCH_KERN_KERNIMC_KERNFCHECENV_FILECODE                                 (0xB435)
-#define PROC_FCH_KERN_KERNIMC_KERNFCHECMID_FILECODE                                 (0xB436)
-#define PROC_FCH_KERN_KERNIMC_KERNFCHECLATE_FILECODE                                (0xB437)
-#define PROC_FCH_KERN_KERNIMC_KERNIMCLIB_FILECODE                                   (0xB438)
-#define PROC_FCH_KERN_KERNIMC_KERNIMCSERVICE_FILECODE                               (0xB439)
-#define PROC_FCH_KERN_KERNPCIE_KERNABRESET_FILECODE                                 (0xB440)
-#define PROC_FCH_KERN_KERNPCIE_KERNABENV_FILECODE                                   (0xB441)
-#define PROC_FCH_KERN_KERNPCIE_KERNABMID_FILECODE                                   (0xB442)
-#define PROC_FCH_KERN_KERNPCIE_KERNABLATE_FILECODE                                  (0xB443)
-#define PROC_FCH_KERN_KERNPCIE_KERNABENVSERVICE_FILECODE                            (0xB44C)
-#define PROC_FCH_KERN_KERNPCIE_KERNABRESETSERVICE_FILECODE                          (0xB44D)
-#define PROC_FCH_KERN_KERNPCIE_KERNABSERVICE_FILECODE                               (0xB44E)
-#define PROC_FCH_KERN_KERNSATA_KERNSATARESET_FILECODE                               (0xB460)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAENV_FILECODE                                 (0xB461)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAMID_FILECODE                                 (0xB462)
-#define PROC_FCH_KERN_KERNSATA_KERNSATALATE_FILECODE                                (0xB463)
-#define PROC_FCH_KERN_KERNSATA_KERNSATARESETSERVICE_FILECODE                        (0xB464)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAENVSERVICE_FILECODE                          (0xB465)
-#define PROC_FCH_KERN_KERNSATA_KERNSATASERVICE_FILECODE                             (0xB466)
-#define PROC_FCH_KERN_KERNSATA_KERNSATALIB_FILECODE                                 (0xB467)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAENVLIB_FILECODE                              (0xB468)
-#define PROC_FCH_KERN_KERNSATA_KERNAHCILIB_FILECODE                                 (0xB469)
-#define PROC_FCH_KERN_KERNSATA_KERNAHCIENV_FILECODE                                 (0xB46A)
-#define PROC_FCH_KERN_KERNSATA_KERNAHCIMID_FILECODE                                 (0xB46B)
-#define PROC_FCH_KERN_KERNSATA_KERNAHCILATE_FILECODE                                (0xB46C)
-#define PROC_FCH_KERN_KERNSATA_KERNRAIDLIB_FILECODE                                 (0xB46D)
-#define PROC_FCH_KERN_KERNSATA_KERNRAIDENV_FILECODE                                 (0xB46E)
-#define PROC_FCH_KERN_KERNSATA_KERNRAIDMID_FILECODE                                 (0xB46F)
-#define PROC_FCH_KERN_KERNSATA_KERNRAIDLATE_FILECODE                                (0xB470)
-#define PROC_FCH_KERN_KERNSATA_KERNIDE2AHCILIB_FILECODE                             (0xB471)
-#define PROC_FCH_KERN_KERNSATA_KERNIDE2AHCIENV_FILECODE                             (0xB472)
-#define PROC_FCH_KERN_KERNSATA_KERNIDE2AHCIMID_FILECODE                             (0xB473)
-#define PROC_FCH_KERN_KERNSATA_KERNIDE2AHCILATE_FILECODE                            (0xB474)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAIDELIB_FILECODE                              (0xB475)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAIDEENV_FILECODE                              (0xB476)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAIDEMID_FILECODE                              (0xB477)
-#define PROC_FCH_KERN_KERNSATA_KERNSATAIDELATE_FILECODE                             (0xB478)
-#define PROC_FCH_KERN_KERNSD_KERNSDENV_FILECODE                                     (0xB481)
-#define PROC_FCH_KERN_KERNSD_KERNSDMID_FILECODE                                     (0xB482)
-#define PROC_FCH_KERN_KERNSD_KERNSDLATE_FILECODE                                    (0xB483)
-#define PROC_FCH_KERN_KERNSD_KERNSDRESETSERVICE_FILECODE                            (0xB484)
-#define PROC_FCH_KERN_KERNSD_KERNSDENVSERVICE_FILECODE                              (0xB485)
-#define PROC_FCH_KERN_KERNSD_KERNSDSERVICE_FILECODE                                 (0xB486)
-#define PROC_FCH_KERN_KERNSPI_KERNSPIRESET_FILECODE                                 (0xB490)
-#define PROC_FCH_KERN_KERNSPI_KERNSPIENV_FILECODE                                   (0xB491)
-#define PROC_FCH_KERN_KERNSPI_KERNSPIMID_FILECODE                                   (0xB492)
-#define PROC_FCH_KERN_KERNSPI_KERNSPILATE_FILECODE                                  (0xB493)
-#define PROC_FCH_KERN_KERNSPI_KERNLPCRESET_FILECODE                                 (0xB494)
-#define PROC_FCH_KERN_KERNSPI_KERNLPCENV_FILECODE                                   (0xB495)
-#define PROC_FCH_KERN_KERNSPI_KERNLPCMID_FILECODE                                   (0xB496)
-#define PROC_FCH_KERN_KERNSPI_KERNLPCLATE_FILECODE                                  (0xB497)
-#define PROC_FCH_KERN_KERNSPI_KERNLPCRESETSERVICE_FILECODE                          (0xB498)
-#define PROC_FCH_KERN_KERNSPI_KERNLPCENVSERVICE_FILECODE                            (0xB499)
-#define PROC_FCH_KERN_KERNUSB_KERNUSBRESET_FILECODE                                 (0xB4A0)
-#define PROC_FCH_KERN_KERNUSB_KERNUSBENV_FILECODE                                   (0xB4A1)
-#define PROC_FCH_KERN_KERNUSB_KERNUSBMID_FILECODE                                   (0xB4A2)
-#define PROC_FCH_KERN_KERNUSB_KERNUSBLATE_FILECODE                                  (0xB4A3)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCIRESET_FILECODE                                (0xB4A4)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCIENV_FILECODE                                  (0xB4A5)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCIMID_FILECODE                                  (0xB4A6)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCILATE_FILECODE                                 (0xB4A7)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCIMIDSERVICE_FILECODE                           (0xB4A8)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCIENVSERVICE_FILECODE                           (0xB4A9)
-#define PROC_FCH_KERN_KERNUSB_KERNEHCILATESERVICE_FILECODE                          (0xB4AA)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIRESET_FILECODE                                (0xB4B2)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIENV_FILECODE                                  (0xB4B3)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIMID_FILECODE                                  (0xB4B4)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCILATE_FILECODE                                 (0xB4B5)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIRESETSERVICE_FILECODE                         (0xB4B6)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIENVSERVICE_FILECODE                           (0xB4B7)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIMIDSERVICE_FILECODE                           (0xB4B8)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCILATESERVICE_FILECODE                          (0xB4B9)
-#define PROC_FCH_KERN_KERNUSB_KERNXHCIRECOVERY_FILECODE                             (0xB4BA)
-#define UEFI_FCH_KERN_DXE_FCHACPICS_FCHACPICS_FILECODE                                  (0xB408)
-#define UEFI_FCH_KERN_DXE_FCHACPICS_FCHACPICSAML_FILECODE                               (0xB409)
-#define UEFI_FCH_KERN_DXE_FCHACPICS_FCHACPICSCONTROL_FILECODE                           (0xB40A)
-#define UEFI_FCH_KERN_DXE_FCHACPICS_FUNCTIONS_FCHD3COLD_FCHD3COLD_FILECODE              (0xB40B)
-#define UEFI_FCH_KERN_DXE_AMDFCHHWM_AMDFCHHWM_FILECODE                                  (0xB4C1)
-#define UEFI_FCH_KERN_DXE_AMDFCHWHEA_AMDFCHWHEA_FILECODE                                (0xB4C2)
-#define UEFI_FCH_KERN_DXE_AMDFCHWHEA_AMDFCHWHEAEINJ_FILECODE                            (0xB4C3)
-#define UEFI_FCH_KERN_DXE_AMDFCHWHEA_AMDFCHWHEAHEST_FILECODE                            (0xB4C4)
-#define UEFI_FCH_KERN_DXE_CF9RESET_CF9RESET_FILECODE                                    (0xB4C5)
-#define UEFI_FCH_KERN_DXE_CF9RESET_IA32_IA32CF9RESET_FILECODE                           (0xB4C6)
-#define UEFI_FCH_KERN_DXE_CF9RESET_X64_X64CF9RESET_FILECODE                             (0xB4C7)
-#define UEFI_FCH_KERN_DXE_FCHDXE_FCHDXE_FILECODE                                        (0xB4C8)
-#define UEFI_FCH_KERN_DXE_FCHDXE_USBOC_FILECODE                                         (0xB4C9)
-#define UEFI_FCH_KERN_DXE_FCHDXEAUX_DXEBOOTTIMER_FILECODE                               (0xB4CA)
-#define UEFI_FCH_KERN_DXE_FCHDXEAUX_DXEDISUSBPORT_FILECODE                              (0xB4CB)
-#define UEFI_FCH_KERN_DXE_FCHDXEAUX_DXEESATAPORT_FILECODE                               (0xB4CC)
-#define UEFI_FCH_KERN_DXE_FCHDXEAUX_DXEGPIO_FILECODE                                    (0xB4CD)
-#define UEFI_FCH_KERN_DXE_FCHDXEAUX_DXEGPIOREAD_FILECODE                                (0xB4CE)
-#define UEFI_FCH_KERN_DXE_FCHDXEAUX_FCHDXEAUX_FILECODE                                  (0xB4CF)
-#define UEFI_FCH_KERN_DXE_FCHDXELIB_FCHDXELIB_FILECODE                                  (0xB4D0)
-#define UEFI_FCH_KERN_DXE_FCHDXELPCCLKRUN_FCHDXELPCCLKRUN_FILECODE                      (0xB4D1)
-#define UEFI_FCH_KERN_DXE_FCHDXEMMIO_FCHDXEMMIO_FILECODE                                (0xB4D2)
-#define UEFI_FCH_KERN_DXE_LEGACYINTERRUPT_LEGACYINTERRUPT_FILECODE                      (0xB4D3)
-#define UEFI_FCH_KERN_DXE_SMBUS_SMBUSLIGHT_FILECODE                                     (0xB4D4)
-#define UEFI_FCH_KERN_DXE_SMMCONTROL_SMMCONTROL_FILECODE                                (0xB4D5)
-#define UEFI_FCH_KERN_PEI_FCHPEI_FCHEHCIRECOVERY_FILECODE                               (0xB4D6)
-#define UEFI_FCH_KERN_PEI_FCHPEI_FCHPEI_FILECODE                                        (0xB4D8)
-#define UEFI_FCH_KERN_PEI_FCHPEI_FCHRESET_FILECODE                                      (0xB4D9)
-#define UEFI_FCH_KERN_PEI_FCHPEI_FCHSATARECOVERY_FILECODE                               (0xB4DA)
-#define UEFI_FCH_KERN_PEI_FCHPEI_FCHSTALL_FILECODE                                      (0xB4DB)
-#define UEFI_FCH_KERN_PEI_FCHPEI_FCHXHCIRECOVERY_FILECODE                               (0xB4DC)
-#define UEFI_FCH_KERN_PEI_FCHPEIAUX_FCHPEIAUX_FILECODE                                  (0xB4DD)
-#define UEFI_FCH_KERN_PEI_FCHPEIAUX_PEIBOOTTIMER_FILECODE                               (0xB4DE)
-#define UEFI_FCH_KERN_PEI_FCHPEIAUX_PEIDISUSBPORT_FILECODE                              (0xB4DF)
-#define UEFI_FCH_KERN_PEI_FCHPEIAUX_PEIGPIO_FILECODE                                    (0xB4E0)
-#define UEFI_FCH_KERN_PEI_FCHPEIAUX_PEIGPIOREAD_FILECODE                                (0xB4E1)
-#define UEFI_FCH_KERN_PEI_FCHPEIAUX_PEIOSCOUTCLOCK_FILECODE                             (0xB4E2)
-#define UEFI_FCH_KERN_PEI_FCHPEILIB_FCHPEILIB_FILECODE                                  (0xB4E3)
-#define UEFI_FCH_KERN_PEI_FCHPEILIB_LIBAMDPEI_FILECODE                                  (0xB4E4)
-#define UEFI_FCH_KERN_PEI_SMBUS_SMBUS_FILECODE                                          (0xB4E5)
-#define UEFI_FCH_KERN_SMM_FCHSMM_FCHSMM_FILECODE                                        (0xB4E6)
-#define UEFI_FCH_KERN_SMM_FCHSMM_GPESMI_FILECODE                                        (0xB4E7)
-#define UEFI_FCH_KERN_SMM_FCHSMM_IOTRAPSMI_FILECODE                                     (0xB4E8)
-#define UEFI_FCH_KERN_SMM_FCHSMM_MISCSMI_FILECODE                                       (0xB4E9)
-#define UEFI_FCH_KERN_SMM_FCHSMM_PERIODICTIMERSMI_FILECODE                              (0xB4EA)
-#define UEFI_FCH_KERN_SMM_FCHSMM_POWERBUTTONSMI_FILECODE                                (0xB4EB)
-#define UEFI_FCH_KERN_SMM_FCHSMM_SWSMI_FILECODE                                         (0xB4EC)
-#define UEFI_FCH_KERN_SMM_FCHSMM_SXSMI_FILECODE                                         (0xB4ED)
-#define UEFI_FCH_KERN_SMM_FCHSMMCOMPLEMENT_IMCCONTROL_IMCCONTROL_FILECODE                                  (0xB4F0)
-#define UEFI_FCH_KERN_SMM_FCHSMMCOMPLEMENT_IMCCONTROL_IMCCONTROLLIB_FILECODE                               (0xB4F1)
-#define UEFI_FCH_KERN_SMM_FCHSMMLIB_FCHDXECOMMON_FILECODE                                                  (0xB4F5)
-#define UEFI_FCH_KERN_SMM_FCHSMMLIB_FCHSMMLIB_FILECODE                                                     (0xB4F6)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMDISPATCHER_FILECODE                                       (0xB4F7)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMGPEDISPATCHER_FCHSMMGPEDISPATCHER_FILECODE                (0xB4F8)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMIOTRAPDISPATCHER_FCHSMMIOTRAPDISPATCHER_FILECODE          (0xB4F9)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMMISCDISPATCHER_FCHSMMMISCDISPATCHER_FILECODE              (0xB4FA)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMPERIODICALDISPATCHER_FCHSMMPERIODICALDISPATCHER_FILECODE  (0xB4FB)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMPWRBTNDISPATCHER_FCHSMMPWRBTNDISPATCHER_FILECODE          (0xB4FC)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMSWDISPATCHER_FCHSMMSWDISPATCHER_FILECODE                  (0xB4FE)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMSXDISPATCHER_FCHSMMSXDISPATCHER_FILECODE                  (0xB4FF)
-#define UEFI_FCH_KERN_SMM_FCHSMMDISPATCHER_FCHSMMUSBDISPATCHER_FCHSMMUSBDISPATCHER_FILECODE                (0xB4F2)
-
-#define LIB_AMDLIB_FILECODE                                              (0xC001)
-
-#define LEGACY_PROC_AGESACALLOUTS_FILECODE                               (0xC010)
-#define LEGACY_PROC_HOBTRANSFER_FILECODE                                 (0xC011)
-#define LEGACY_PROC_DISPATCHER_FILECODE                                  (0xC012)
-
-#define UEFI_DXE_AMDAGESADXEDRIVER_AMDAGESADXEDRIVER_FILECODE            (0xC120)
-
-#define UEFI_PEI_AMDINITPOSTPEIM_AMDINITPOSTPEIM_FILECODE                (0xC140)
-#define UEFI_PEI_AMDPROCESSORINITPEIM_AMDPROCESSORINITPEIM_FILECODE      (0xC141)
-#define UEFI_PEI_AMDRESETMANAGER_AMDRESETMANAGER_FILECODE                (0xC142)
-#define UEFI_PROC_COMMON_HOBTRANSFERUEFI_FILECODE                        (0xC160)
-#define UEFI_PROC_DXE_HOBTRANSFERUEFIDXE_FILECODE                        (0xC161)
-#define UEFI_PROC_PEI_HOBTRANSFERUEFIPEI_FILECODE                        (0xC162)
-
-#define PROC_COMMON_AMDINITEARLY_FILECODE                                (0xC020)
-#define PROC_COMMON_AMDINITENV_FILECODE                                  (0xC021)
-#define PROC_COMMON_AMDINITLATE_FILECODE                                 (0xC022)
-#define PROC_COMMON_AMDINITMID_FILECODE                                  (0xC023)
-#define PROC_COMMON_AMDINITPOST_FILECODE                                 (0xC024)
-#define PROC_COMMON_AMDINITRECOVERY_FILECODE                             (0xC025)
-#define PROC_COMMON_AMDINITRESET_FILECODE                                (0xC026)
-#define PROC_COMMON_AMDINITRESUME_FILECODE                               (0xC027)
-#define PROC_COMMON_AMDS3LATERESTORE_FILECODE                            (0xC028)
-#define PROC_COMMON_AMDS3SAVE_FILECODE                                   (0xC029)
-#define PROC_COMMON_AMDLATERUNAPTASK_FILECODE                            (0xC02A)
-
-#define PROC_COMMON_COMMONRETURNS_FILECODE                               (0xC0C0)
-#define PROC_COMMON_CREATESTRUCT_FILECODE                                (0xC0D0)
-#define PROC_COMMON_COMMONINITS_FILECODE                                 (0xC0F0)
-#define PROC_COMMON_S3RESTORESTATE_FILECODE                              (0xC0F8)
-#define PROC_COMMON_S3SAVESTATE_FILECODE                                 (0xC0F9)
-
-#define PROC_CPU_CPUAPICUTILITIES_FILECODE                               (0xC401)
-#define PROC_CPU_TABLE_FILECODE                                          (0xC403)
-#define PROC_CPU_CPUEARLYINIT_FILECODE                                   (0xC405)
-#define PROC_CPU_CPUEVENTLOG_FILECODE                                    (0xC406)
-#define PROC_CPU_CPUFAMILYTRANSLATION_FILECODE                           (0xC407)
-#define PROC_CPU_CPUGENERALSERVICES_FILECODE                             (0xC408)
-#define PROC_CPU_CPULATEINIT_FILECODE                                    (0xC40A)
-#define PROC_CPU_CPUMICROCODEPATCH_FILECODE                              (0xC40B)
-#define PROC_CPU_CPUWARMRESET_FILECODE                                   (0xC40C)
-#define PROC_CPU_HEAPMANAGER_FILECODE                                    (0xC40D)
-#define PROC_CPU_CPUBIST_FILECODE                                        (0xC40E)
-#define PROC_CPU_MMIOMAPMANAGER_FILECODE                                 (0xC40F)
-
-#define PROC_CPU_CPUPOSTINIT_FILECODE                                    (0xC420)
-#define PROC_CPU_CPUPOWERMGMT_FILECODE                                   (0xC430)
-#define PROC_CPU_CPUPOWERMGMTSINGLESOCKET_FILECODE                       (0xC432)
-#define PROC_CPU_S3_FILECODE                                             (0xC460)
-
-// Family 16h
-#define PROC_CPU_FAMILY_0X16_CPUF16BRANDID_FILECODE                      (0xCC00)
-#define PROC_CPU_FAMILY_0X16_CPUF16UTILITIES_FILECODE                    (0xCC01)
-#define PROC_CPU_FAMILY_0X16_CPUF16WHEAINITDATATABLES_FILECODE           (0xCC02)
-#define PROC_CPU_FAMILY_0X16_CPUF16CACHEDEFAULTS_FILECODE                (0xCC03)
-#define PROC_CPU_FAMILY_0X16_CPUF16DMI_FILECODE                          (0xCC04)
-#define PROC_CPU_FAMILY_0X16_CPUF16PCIUNKNOWNTABLES_FILECODE             (0xCC05)
-#define PROC_CPU_FAMILY_0X16_CPUF16MSRUNKNOWNTABLES_FILECODE             (0xCC06)
-#define PROC_CPU_FAMILY_0X16_CPUF16MMIOMAP_FILECODE                      (0xCC07)
-#define PROC_CPU_FAMILY_0X16_CPUF16APM_FILECODE                          (0xCC09)
-#define PROC_CPU_FAMILY_0X16_CPUF16CRAT_FILECODE                         (0xCC0A)
-
-#define PROC_CPU_FAMILY_0X16_ML_F16MLLOGICALIDTABLES_FILECODE            (0xCC40)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLINITEARLYTABLE_FILECODE             (0xCC41)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLEQUIVALENCETABLE_FILECODE           (0xCC42)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLMICROCODEPATCHTABLES_FILECODE       (0xCC43)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLPCITABLES_FILECODE                  (0xCC44)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLMSRTABLES_FILECODE                  (0xCC45)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLSHAREDMSRTABLE_FILECODE             (0xCC46)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLUTILITIES_FILECODE                  (0xCC47)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLC6STATE_FILECODE                    (0xCC48)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLCOREAFTERRESET_FILECODE             (0xCC49)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLCPB_FILECODE                        (0xCC4A)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLDMI_FILECODE                        (0xCC4B)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLIOCSTATE_FILECODE                   (0xCC4C)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLNBAFTERRESET_FILECODE               (0xCC4D)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLPOWERCHECK_FILECODE                 (0xCC4E)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLPSTATE_FILECODE                     (0xCC4F)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLPSI_FILECODE                        (0xCC50)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLHTC_FILECODE                        (0xCC51)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLPOWERMGMTSYSTEMTABLES_FILECODE      (0xCC52)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLSCS_FILECODE                        (0xCC53)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLCACHEFLUSHONHALT_FILECODE           (0xCC54)
-#define PROC_CPU_FAMILY_0X16_ML_F16MLCONNECTEDSTANDBY_FILECODE           (0xCC55)
-#define UEFI_PSP_LIBRARY_CSRESUMESMMLIB_ML_CSRESUMESMMLIBML_FILECODE     (0xCC56)
-
-#define PROC_CPU_FEATURE_CPUCACHEFLUSHONHALT_FILECODE                    (0xDC01)
-#define PROC_CPU_FEATURE_CPUCACHEINIT_FILECODE                           (0xDC02)
-#define PROC_CPU_FEATURE_CPUDMI_FILECODE                                 (0xDC10)
-#define PROC_CPU_FEATURE_CPUPSTATEGATHER_FILECODE                        (0xDC41)
-#define PROC_CPU_FEATURE_CPUPSTATELEVELING_FILECODE                      (0xDC42)
-#define PROC_CPU_FEATURE_CPUPSTATETABLES_FILECODE                        (0xDC43)
-#define PROC_CPU_FEATURE_CPUSLIT_FILECODE                                (0xDC50)
-#define PROC_CPU_FEATURE_CPUSRAT_FILECODE                                (0xDC60)
-#define PROC_CPU_FEATURE_CPUWHEA_FILECODE                                (0xDC70)
-#define PROC_CPU_FEATURE_CPUC6STATE_FILECODE                             (0xDC82)
-#define PROC_CPU_FEATURE_CPUCPB_FILECODE                                 (0xDC83)
-#define PROC_CPU_FEATURE_CPUIOCSTATE_FILECODE                            (0xDC85)
-#define PROC_CPU_FEATURE_CPUAPM_FILECODE                                 (0xDC86)
-#define PROC_CPU_FEATURE_CPUFEATURES_FILECODE                            (0xDC90)
-#define PROC_CPU_FEATURE_CPUCORELEVELING_FILECODE                        (0xDCB0)
-#define PROC_CPU_FEATURE_CPUPSI_FILECODE                                 (0xDCC0)
-#define PROC_CPU_FEATURE_CPUHTC_FILECODE                                 (0xDCC1)
-#define PROC_CPU_FEATURE_CPUCRAT_FILECODE                                (0xDCD0)
-#define PROC_CPU_FEATURE_CPUCDIT_FILECODE                                (0xDCD1)
-#define PROC_CPU_FEATURE_CPUSCS_FILECODE                                 (0xDCD4)
-#define PROC_CPU_FEATURE_CPUCONNECTEDSTANDBY_FILECODE                    (0xDCD5)
-
-#define PROC_RECOVERY_CPU_CPURECOVERY_FILECODE                           (0xDE01)
-
-#define PROC_TOPOLOGY_TOPOMAIN_FILECODE                                  (0xE001)
-#define PROC_TOPOLOGY_TOPONB_FILECODE                                    (0xE002)
-#define PROC_TOPOLOGY_FAM16_TOPONBFAM16_FILECODE                         (0xE097)
-#define PROC_TOPOLOGY_FAM16_TOPONBUTILITIESFAM16_FILECODE                (0xE098)
-
-#define PROC_RECOVERY_TOPOLOGY_TOPOINITRECOVERY_FILECODE                 (0xE0FF)
-
-#define PROC_IDS_CONTROL_IDSCTRL_FILECODE                                (0xE801)
-#define PROC_IDS_LIBRARY_IDSLIB_FILECODE                                 (0xE802)
-#define PROC_IDS_DEBUG_IDSDEBUG_FILECODE                                 (0xE803)
-#define PROC_IDS_PERF_IDSPERF_FILECODE                                   (0xE804)
-#define PROC_IDS_LIBRARY_IDSREGACC_FILECODE                              (0xE810)
-#define PROC_IDS_DEBUG_IDSDPHDTOUT_FILECODE                              (0xE811)
-#define PROC_IDS_DEBUG_IDSDEBUGPRINT_FILECODE                            (0xE812)
-#define PROC_IDS_DEBUG_IDSDPSERIAL_FILECODE                              (0xE813)
-#define PROC_IDS_DEBUG_IDSDPREDIRECTIO_FILECODE                          (0xE814)
-#define PROC_IDS_DEBUG_IDSDPRAM_FILECODE                                 (0xE815)
-
-#define PROC_IDS_DEBUG_IDSIDTTABLE_FILECODE                              (0xE81E)
-#define PROC_IDS_CONTROL_IDSNVTOCMOS_FILECODE                            (0xE81F)
-#define PROC_IDS_FAMILY_0X16_ML_IDSF16MLALLSERVICE_FILECODE              (0xE823)
-
-///0xE820 ~ 0xE840 is reserved for ids extend module
-
-#define PROC_MEM_ARDK_MA_FILECODE                                    (0xF001)
-
-#define PROC_MEM_FEAT_CSINTLV_MFCSI_FILECODE                         (0xF082)
-#define PROC_MEM_FEAT_ECC_MFECC_FILECODE                             (0xF083)
-#define PROC_MEM_FEAT_ECC_MFEMP_FILECODE                             (0xF085)
-#define PROC_MEM_FEAT_EXCLUDIMM_MFDIMMEXCLUD_FILECODE                (0xF086)
-#define PROC_MEM_FEAT_IDENDIMM_MFIDENDIMM_FILECODE                   (0xF088)
-#define PROC_MEM_FEAT_LVDDR3_MFLVDDR3_FILECODE                       (0xF08A)
-#define PROC_MEM_FEAT_MEMCLR_MFMEMCLR_FILECODE                       (0xF08B)
-#define PROC_MEM_FEAT_ODTHERMAL_MFODTHERMAL_FILECODE                 (0xF08D)
-#define PROC_MEM_FEAT_PARTRN_MFPARALLELTRAINING_FILECODE             (0xF08F)
-#define PROC_MEM_FEAT_PARTRN_MFSTANDARDTRAINING_FILECODE             (0xF091)
-#define PROC_MEM_FEAT_S3_MFS3_FILECODE                               (0xF092)
-#define PROC_MEM_FEAT_TABLE_MFTDS_FILECODE                           (0xF093)
-#define PROC_MEM_FEAT_CRAT_MFCRAT_FILECODE                           (0xF095)
-#define PROC_MEM_FEAT_DATAEYE_MF2DDATAEYE_FILECODE                   (0xF097)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFWRDAT2DTRAINING_FILECODE         (0xF098)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFRDWR2DEYERIMSEARCH_FILECODE      (0xF099)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFRDDQS2DTRAINING_FILECODE         (0xF09A)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFRDWR2DTRAINING_FILECODE          (0xF09B)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_MFRDWR2DPATTERNGENERATION_FILECODE (0xF09C)
-#define PROC_MEM_FEAT_RDWR2DTRAINING_ML_MFRDWR2DML_FILECODE             (0xF09E)
-#define PROC_MEM_FEAT_DLLPDBYPASS_MFDLLPDBYPASS_FILECODE                (0xF0A0)
-
-#define PROC_MEM_MAIN_MDEF_FILECODE                                  (0xF101)
-#define PROC_MEM_MAIN_MINIT_FILECODE                                 (0xF102)
-#define PROC_MEM_MAIN_MM_FILECODE                                    (0xF103)
-#define PROC_MEM_FEAT_DMI_MFDMI_FILECODE                             (0xF104)
-#define PROC_MEM_MAIN_MMECC_FILECODE                                 (0xF105)
-#define PROC_MEM_MAIN_MMEXCLUDEDIMM_FILECODE                         (0xF106)
-#define PROC_MEM_MAIN_MMNODEINTERLEAVE_FILECODE                      (0xF10B)
-#define PROC_MEM_MAIN_MMONLINESPARE_FILECODE                         (0xF10C)
-#define PROC_MEM_MAIN_MMPARALLELTRAINING_FILECODE                    (0xF10D)
-#define PROC_MEM_MAIN_MMSTANDARDTRAINING_FILECODE                    (0xF10E)
-#define PROC_MEM_MAIN_MUC_FILECODE                                   (0xF10F)
-#define PROC_MEM_MAIN_MMMEMCLR_FILECODE                              (0xF110)
-#define PROC_MEM_MAIN_MMFLOW_FILECODE                                (0xF112)
-#define PROC_MEM_MAIN_MERRHDL_FILECODE                               (0xF113)
-#define PROC_MEM_MAIN_MMLVDDR3_FILECODE                              (0xF115)
-#define PROC_MEM_MAIN_MMUMAALLOC_FILECODE                            (0xF116)
-#define PROC_MEM_MAIN_MMMEMRESTORE_FILECODE                          (0xF117)
-#define PROC_MEM_MAIN_MMCONDITIONALPSO_FILECODE                      (0xF118)
-#define PROC_MEM_MAIN_MMAGGRESSOR_FILECODE                           (0xF119)
-#define PROC_MEM_MAIN_ML_MMFLOWML_FILECODE                           (0xF126)
-
-#define PROC_MEM_NB_MN_FILECODE                                      (0XF27C)
-#define PROC_MEM_NB_MNDCT_FILECODE                                   (0XF27D)
-#define PROC_MEM_NB_MNPHY_FILECODE                                   (0XF27E)
-#define PROC_MEM_NB_MNMCT_FILECODE                                   (0XF27F)
-#define PROC_MEM_NB_MNS3_FILECODE                                    (0XF280)
-#define PROC_MEM_NB_MNFLOW_FILECODE                                  (0XF281)
-#define PROC_MEM_NB_MNFEAT_FILECODE                                  (0XF282)
-#define PROC_MEM_NB_MNTRAIN3_FILECODE                                (0XF284)
-#define PROC_MEM_NB_MNREG_FILECODE                                   (0XF285)
-#define PROC_MEM_NB_MNPMU_FILECODE                                   (0xF2B7)
-#define PROC_MEM_NB_ML_MNREGML_FILECODE                              (0XF2CD)
-#define PROC_MEM_NB_ML_MNML_FILECODE                                 (0XF2CE)
-#define PROC_MEM_NB_ML_MNMCTML_FILECODE                              (0XF2CF)
-#define PROC_MEM_NB_ML_MNOTML_FILECODE                               (0XF2D0)
-#define PROC_MEM_NB_ML_MNDCTML_FILECODE                              (0XF2D1)
-#define PROC_MEM_NB_ML_MNPHYML_FILECODE                              (0XF2D2)
-#define PROC_MEM_NB_ML_MNS3ML_FILECODE                               (0XF2D3)
-#define PROC_MEM_NB_ML_MNIDENDIMMML_FILECODE                         (0XF2D4)
-#define PROC_MEM_NB_ML_MNFLOWML_FILECODE                             (0XF2D5)
-#define PROC_MEM_NB_ML_MNPROTOML_FILECODE                            (0XF2D6)
-#define PROC_MEM_NB_ML_MNPSPML_FILECODE                              (0XF2E2)
-
-
-
-#define PROC_MEM_PS_MP_FILECODE                                      (0XF401)
-#define PROC_MEM_PS_MPRTT_FILECODE                                   (0XF422)
-#define PROC_MEM_PS_MPMAXFREQ_FILECODE                               (0XF423)
-#define PROC_MEM_PS_MPODTPAT_FILECODE                                (0XF424)
-#define PROC_MEM_PS_MPSAO_FILECODE                                   (0XF425)
-#define PROC_MEM_PS_MPMR0_FILECODE                                   (0XF426)
-#define PROC_MEM_PS_MPRC2IBT_FILECODE                                (0XF427)
-#define PROC_MEM_PS_MPRC10OPSPD_FILECODE                             (0XF428)
-#define PROC_MEM_PS_MPLRIBT_FILECODE                                 (0XF429)
-#define PROC_MEM_PS_MPLRNPR_FILECODE                                 (0XF42A)
-#define PROC_MEM_PS_MPLRNLR_FILECODE                                 (0XF42B)
-#define PROC_MEM_PS_MPS2D_FILECODE                                   (0XF436)
-#define PROC_MEM_PS_MPSEEDS_FILECODE                                 (0XF437)
-#define PROC_MEM_PS_MPCADCFG_FILECODE                                (0XF43C)
-#define PROC_MEM_PS_MPDATACFG_FILECODE                               (0XF43D)
-#define PROC_MEM_PS_ML_MPSML3_FILECODE                               (0XF441)
-#define PROC_MEM_PS_ML_MPML3_FILECODE                                (0XF442)
-#define PROC_MEM_PS_ML_MPUML3_FILECODE                               (0XF443)
-#define PROC_MEM_PS_ML_FT3_MPSMLFT3_FILECODE                         (0XF444)
-
-#define PROC_MEM_TECH_MT_FILECODE                                    (0XF501)
-#define PROC_MEM_TECH_MTHDI_FILECODE                                 (0XF502)
-#define PROC_MEM_TECH_MTTDIMBT_FILECODE                              (0XF504)
-#define PROC_MEM_TECH_MTTECC_FILECODE                                (0XF505)
-#define PROC_MEM_TECH_MTTHRC_FILECODE                                (0XF506)
-#define PROC_MEM_TECH_MTTML_FILECODE                                 (0XF507)
-#define PROC_MEM_TECH_MTTOPTSRC_FILECODE                             (0XF509)
-#define PROC_MEM_TECH_MTTSRC_FILECODE                                (0XF50B)
-#define PROC_MEM_TECH_MTTEDGEDETECT_FILECODE                         (0XF50C)
-#define PROC_MEM_TECH_DDR3_MT3_FILECODE                              (0XF581)
-#define PROC_MEM_TECH_DDR3_MTOT3_FILECODE                            (0XF583)
-#define PROC_MEM_TECH_DDR3_MTRCI3_FILECODE                           (0XF584)
-#define PROC_MEM_TECH_DDR3_MTSDI3_FILECODE                           (0XF585)
-#define PROC_MEM_TECH_DDR3_MTSPD3_FILECODE                           (0XF586)
-#define PROC_MEM_TECH_DDR3_MTTWL3_FILECODE                           (0XF587)
-#define PROC_MEM_TECH_DDR3_MTTECC3_FILECODE                          (0XF588)
-#define PROC_MEM_TECH_DDR3_MTLRDIMM3_FILECODE                        (0XF589)
-#define PROC_MEM_TECH_MTTHRCSEEDTRAIN_FILECODE                       (0XF58A)
-#define PROC_MEM_TECH_MTTRDDQS2DTRAINING_FILECODE                    (0XF58B)
-#define PROC_MEM_TECH_MTTRDDQS2DEYERIMSEARCH_FILECODE                (0XF58C)
-
-#define PROC_RECOVERY_MEM_MRDEF_FILECODE                             (0XF801)
-#define PROC_RECOVERY_MEM_MRINIT_FILECODE                            (0XF802)
-#define PROC_RECOVERY_MEM_MRM_FILECODE                               (0XF803)
-#define PROC_RECOVERY_MEM_MRUC_FILECODE                              (0XF804)
-#define PROC_RECOVERY_MEM_TECH_MRTTPOS_FILECODE                      (0XF8C1)
-#define PROC_RECOVERY_MEM_TECH_MRTTSRC_FILECODE                      (0XF8C2)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRT3_FILECODE                    (0XF8C3)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRTRCI3_FILECODE                 (0XF8C4)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRTSDI3_FILECODE                 (0XF8C5)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRTSPD3_FILECODE                 (0XF8C6)
-#define PROC_RECOVERY_MEM_TECH_DDR3_MRTTWL3_FILECODE                 (0XF8C7)
-#define PROC_RECOVERY_MEM_NB_MRN_FILECODE                            (0XF8C8)
-#define PROC_RECOVERY_MEM_NB_MRNDCT_FILECODE                         (0XF8C9)
-#define PROC_RECOVERY_MEM_NB_MRNMCT_FILECODE                         (0XF8CA)
-#define PROC_RECOVERY_MEM_NB_MRNTRAIN3_FILECODE                      (0XF8CB)
-#define PROC_RECOVERY_MEM_TECH_MRTTHRC_FILECODE                      (0XF8CC)
-#define PROC_RECOVERY_MEM_PS_MRP_FILECODE                            (0XF8E0)
-#define PROC_RECOVERY_MEM_PS_MRPRTT_FILECODE                         (0XF8E1)
-#define PROC_RECOVERY_MEM_PS_MRPODTPAT_FILECODE                      (0XF8E2)
-#define PROC_RECOVERY_MEM_PS_MRPSAO_FILECODE                         (0XF8E3)
-#define PROC_RECOVERY_MEM_PS_MRPMR0_FILECODE                         (0XF8E4)
-#define PROC_RECOVERY_MEM_PS_MRPRC2IBT_FILECODE                      (0XF8E5)
-#define PROC_RECOVERY_MEM_PS_MRPRC10OPSPD_FILECODE                   (0XF8E6)
-#define PROC_RECOVERY_MEM_PS_MRPLRIBT_FILECODE                       (0XF8E7)
-#define PROC_RECOVERY_MEM_PS_MRPLRNPR_FILECODE                       (0XF8E8)
-#define PROC_RECOVERY_MEM_PS_MRPLRNLR_FILECODE                       (0XF8E9)
-#define PROC_RECOVERY_MEM_TECH_MRTTHRCSEEDTRAIN_FILECODE             (0XF8FA)
-#define PROC_RECOVERY_MEM_NB_ML_MRNDCTML_FILECODE                    (0XF902)
-#define PROC_RECOVERY_MEM_NB_ML_MRNML_FILECODE                       (0XF903)
-#define PROC_RECOVERY_MEM_NB_ML_MRNMCTML_FILECODE                    (0XF904)
-#define PROC_RECOVERY_MEM_NB_ML_MRNPROTOML_FILECODE                  (0XF905)
-#define PROC_RECOVERY_MEM_PS_ML_MRPSML3_FILECODE                     (0XF906)
-#define PROC_RECOVERY_MEM_PS_ML_MRPML3_FILECODE                      (0XF907)
-#define PROC_RECOVERY_MEM_PS_ML_MRPUML3_FILECODE                     (0XF908)
-
-//Psp
-#define UEFI_PSP_DRIVERS_ITPMDXE_ITPMDXE_FILECODE                    (0xFA00)
-#define UEFI_PSP_DRIVERS_ITPMPEI_ITPMPEI_FILECODE                    (0xFA01)
-#define UEFI_PSP_DRIVERS_PSPP2CMBOX_PSPP2CMBOXCMD_FILECODE           (0xFA02)
-#define UEFI_PSP_DRIVERS_PSPP2CMBOX_PSPP2CMBOX_FILECODE              (0xFA03)
-#define UEFI_PSP_DRIVERS_PSPPEI_PSPPEI_FILECODE                      (0xFA04)
-#define UEFI_PSP_DRIVERS_PSPSMM_PSPRESUMEHANDLING_FILECODE           (0xFA05)
-#define UEFI_PSP_DRIVERS_PSPSMM_PSPRESUMESERVICES_FILECODE           (0xFA06)
-#define UEFI_PSP_DRIVERS_PSPSMM_PSPSMM_FILECODE                      (0xFA07)
-#define UEFI_PSP_DRIVERS_CSRESUMESMM_CSRESUMESMM_FILECODE            (0xFA08)
-#define UEFI_PSP_LIBRARY_PSPBASELIB_PSPBASELIB_FILECODE              (0xFA09)
-#define UEFI_PSP_LIBRARY_PSPMBOX_PSPMBOX_FILECODE                    (0xFA0A)
-#define UEFI_PSP_LIBRARY_SMMLOAD_SMMLOAD_FILECODE                    (0xFA0B)
-#define UEFI_PSP_DRIVERS_PSPDXE_PSPDXE_FILECODE                      (0xFA0C)
-#define UEFI_PSP_LIBRARY_PSPFTPMLIB_PSPFTPMLIB_FILECODE              (0xFA0D)
-#define UEFI_PSP_LIBRARY_CCPSHALIB_CCPSHALIB_FILECODE                (0xFA0E)
-#define UEFI_PSP_LIBRARY_CSRESUMESMMLIB_CSRESUMESMMLIB_FILECODE      (0xFA0F)
-#endif // _FILECODE_H_

pi/amd/00730F01/Include/Ids.h

diff --git a/pi/amd/00730F01/Include/Ids.h b/pi/amd/00730F01/Include/Ids.h
deleted file mode 100644
index 854b915..0000000
--- a/pi/amd/00730F01/Include/Ids.h
+++ /dev/null
@@ -1,1433 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD IDS Routines
- *
- * Contains AMD AGESA Integrated Debug Macros
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-  /* Macros to aid debugging */
-  /* These definitions expand to zero (0) bytes of code when disabled */
-
-#ifndef _IDS_H_
-#define _IDS_H_
-
-#undef FALSE
-#undef TRUE
-#define FALSE 0
-#define TRUE  1
-// Proto type for optionsids.h
-typedef UINT32 IDS_STATUS;  ///< Status of IDS function.
-#define IDS_SUCCESS         ((IDS_STATUS) 0x00000000ul) ///< IDS Function is Successful.
-#define IDS_UNSUPPORTED     ((IDS_STATUS) 0xFFFFFFFFul) ///< IDS Function is not existed.
-
-#define IDS_STRINGIZE(a) #a ///< for define stringize macro
-#ifndef IDS_DEADLOOP
-  #define IDS_DEADLOOP()    { volatile UINTN __i; __i = 1; while (__i); }
-#endif
-/**
- *  IDS Option Hook Points
- *
- *  These are the values to indicate hook point in AGESA for IDS Options.
- *
- */
-typedef enum {                        //vv- for debug reference only
-  IDS_INIT_EARLY_BEFORE,              ///< 00 Option Hook Point before AGESA function AMD_INIT_EARLY.
-                                          ///<   IDS Object is initialized.
-                                          ///<   Override CPU Core Leveling Mode.
-                                          ///<   Set P-State in Post
-  IDS_INIT_EARLY_AFTER,               ///< 01 Option Hook Point after AGESA function AMD_INIT_EARLY.
-  IDS_INIT_LATE_BEFORE,               ///< 02 Option Hook Point before AGESA function AMD_INIT_LATE.
-                                          ///< It will be used to control the following tables.
-                                          ///<   ACPI P-State Table (_PSS, XPSS, _PCT, _PSD, _PPC)
-                                          ///<   ACPI SRAT Table
-                                          ///<   ACPI SLIT Table
-                                          ///<   ACPI WHEA Table
-                                          ///<   DMI Table
-  IDS_INIT_LATE_AFTER,                ///< 03 Option Hook Point after AGESA function AMD_INIT_LATE.
-  IDS_INIT_MID_BEFORE,                ///< 04 Option Hook Point before AGESA function AMD_INIT_MID.
-  IDS_INIT_MID_AFTER,                 ///< 05 Option Hook Point after AGESA function AMD_INIT_MID.
-  IDS_INIT_POST_BEFORE,               ///< 06 Option Hook Point before AGESA function AMD_INIT_POST.
-                                          ///<   Control Interleaving and DRAM memory hole
-                                          ///<   Override the setting of ECC Control
-                                          ///<   Override the setting of Online Spare Rank
-  IDS_INIT_POST_AFTER,                ///< 07 Option Hook Point after AGESA function AMD_INIT_POST.
-  IDS_INIT_RESET_BEFORE,              ///< 08 Option Hook Point before AGESA function AMD_INIT_RESET.
-  IDS_INIT_RESET_AFTER,               ///< 09 Option Hook Point after AGESA function AMD_INIT_RESET.
-  IDS_INIT_POST_MID,                  ///< 0a Option Hook Point after AGESA function AMD_INIT_POST.
-  IDS_BEFORE_S3_SAVE,                 ///< 0b override any settings before S3 save.
-  IDS_BEFORE_S3_RESTORE,              ///< 0c  override any settings before S3 restore
-  IDS_AFTER_S3_SAVE,                  ///< 0d Override any settings after S3 save
-  IDS_AFTER_S3_RESTORE,               ///< 0e Override any settings after S3 restore
-  IDS_BEFORE_DQS_TRAINING,            ///< 0f override any settings before DQS training
-  IDS_BEFORE_DRAM_INIT,               ///< 10 override any settings before Dram initialization
-  IDS_BEFORE_MEM_FREQ_CHG,            ///< 11 override settings before MemClk frequency change
-  IDS_BEFORE_WARM_RESET ,             ///< 12 Override PCI or MSR Registers Before Warm Reset
-  IDS_BEFORE_PCI_INIT,                ///< 13 Override PCI or MSR Registers Before PCI Init
-  IDS_BEFORE_AP_EARLY_HALT,           ///< 14 Option Hook Point before AP early halt
-  IDS_BEFORE_S3_RESUME,               ///< 15 Option Hook Point before s3 resume
-  IDS_AFTER_S3_RESUME,                ///< 16 Option Hook Point after s3 resume
-  IDS_BEFORE_PM_INIT,                 ///< 17 Option Hook Point Before Pm Init
-
-  IDS_MT_BASE = 0x20,                 ///< 0x20 ~ 0x38 24 time points reserved for MTTime
-
-  IDS_PLATFORM_RSVD1 = 0x38,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD2 = 0x39,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD3 = 0x3a,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD4 = 0x3b,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD5 = 0x3c,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD6 = 0x3d,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD7 = 0x3e,          ///< from 0x38 to 0x3f will reserved for platform used
-  IDS_PLATFORM_RSVD8 = 0x3f,          ///< from 0x38 to 0x3f will reserved for platform used
-
-  // All the above timing point is used by BVM, their value should never be changed
-  IDS_INIT_DRAM_TABLE,                ///< 40 Generate override table for Dram Timing
-                                          ///< Dram Controller, Drive Strength and DQS Timing
-  IDS_GET_DRAM_TABLE,                 ///< 41 Generate override table for Dram Timing
-  IDS_GANGING_MODE,                   ///< 42 override Memory Mode Unganged
-  IDS_POWERDOWN_MODE,                 ///< 43 override Power Down Mode
-  IDS_BURST_LENGTH32,                 ///< 44 override Burst Length32
-  IDS_ALL_MEMORY_CLOCK,               ///< 45 override All Memory Clks Enable
-  IDS_ECC,                            ///< 46 override ECC parameter
-  IDS_ECCSYMBOLSIZE,                  ///< 47 override ECC symbol size
-  IDS_CPU_Early_Override,             ///< 48 override CPU early parameter
-  IDS_CACHE_FLUSH_HLT,                ///< 49 override Cache Flush Hlt
-  IDS_CHANNEL_INTERLEAVE,             ///< 4a override Channel Interleave
-  IDS_MEM_ERROR_RECOVERY,             ///< 4b override memory error recovery
-  IDS_MEM_RETRAIN_TIMES,              ///< 4c override memory retrain times
-  IDS_MEM_SIZE_OVERLAY,               ///< 4d Override the syslimit
-  IDS_CHECK_NEGATIVE_WL,              ///< 4e Check for negative write leveling result
-  IDS_DLL_SHUT_DOWN,                  ///< 4f Check for Dll Shut Down
-  IDS_POR_MEM_FREQ,                   ///< 50 Entry to enable/disable MemClk frequency enforcement
-  IDS_PHY_DLL_STANDBY_CTRL,           ///< 51 Enable/Disable Phy DLL standby feature
-  IDS_PLATFORMCFG_OVERRIDE,           ///< 52 Hook for Override PlatformConfig structure
-  IDS_LOADCARD_ERROR_RECOVERY,        ///< 53 Special error handling for load card support
-  IDS_MEM_IGNORE_ERROR,               ///< 54 Ignore error and do not do fatal exit in memory
-  IDS_GNB_SMU_SERVICE_CONFIG,         ///< 55 Config GNB SMU service
-  IDS_GNB_ORBDYNAMIC_WAKE,            ///< 56 config GNB dynamic wake
-  IDS_GNB_PLATFORMCFG_OVERRIDE,       ///< 57 override ids gnb platform config
-  IDS_GNB_LCLK_DPM_EN,                ///< 58 override GNB LCLK DPM configuration
-  IDS_GNB_LCLK_DEEP_SLEEP,            ///< 59 override GNB LCLK DPM deep sleep
-  IDS_GNB_CLOCK_GATING,               ///< 5a Override GNB Clock gating config
-  IDS_NB_PSTATE_DIDVID,               ///< 5b Override NB P-state settings
-  IDS_CPB_CTRL,                       ///< 5c Config the Core peformance boost feature
-  IDS_HTC_CTRL,                       ///< 5d Hook for Hardware Thermal Control
-  IDS_CC6_WORKAROUND,                 ///< 5e Hook for skip CC6 work around
-  IDS_MEM_MR0,                        ///< 5f Hook for override Memory Mr0 register
-  IDS_TRAP_TABLE,                     ///< 60 Hook for add IDS register table to the loop
-  IDS_NBBUFFERALLOCATIONATEARLY,      ///< 61 Hook for override North bridge bufer allocation
-  IDS_BEFORE_S3_SPECIAL,              ///< 62 Hook to bypass S3 special functions
-  IDS_SET_PCI_REGISTER_ENTRY,         ///< 63 Hook to SetRegisterForPciEntry
-  IDS_ERRATUM463_WORKAROUND,          ///< 64 Hook to Erratum 463 workaround
-  IDS_BEFORE_MEMCLR,                  ///< 65 Hook before set Memclr bit
-  IDS_OVERRIDE_IO_CSTATE,             ///< 66 Hook for override io C-state setting
-  IDS_NBPSDIS_OVERRIDE,               ///< 67 Hook for override NB pstate disable setting
-  IDS_NBPS_REG_OVERRIDE,              ///< 68 Hook for override Memory NBps reg
-  IDS_LOW_POWER_PSTATE,               ///< 69 Hook for disable Low power_Pstates feature
-  IDS_CST_CREATE,                     ///< 6a Hook for create _CST
-  IDS_CST_SIZE,                       ///< 6b Hook for get _CST size
-  IDS_ENFORCE_VDDIO,                  ///< 6c Hook to override VDDIO
-  IDS_STRETCH_FREQUENCY_LIMIT,        ///< 6d Hook for enforcing memory stretch frequency limit
-  IDS_INIT_MEM_REG_TABLE,             ///< 6e Hook for init memory register table
-  IDS_SKIP_FUSED_MAX_RATE,            ///< 6f Hook to skip fused max rate cap
-  IDS_FCH_INIT_AT_RESET,              ///< 70 Hook for FCH reset parameter
-  IDS_FCH_INIT_AT_ENV,                ///< 71 Hook for FCH ENV parameter
-  IDS_ENFORCE_PLAT_TABLES,            ///< 72 Hook to enforce platform specific tables
-  IDS_NBPS_MIN_FREQ,                  ///< 73 Hook for override MIN nb ps freq
-  IDS_GNB_FORCE_CABLESAFE,            ///< 74 Hook for override Force Cable Safe
-  IDS_SKIP_PM_TRANSITION_STEP,        ///< 75 Hook for provide IDS ability to skip this PM step
-  IDS_GNB_PROPERTY,                   ///< 76 Hook for GNB Property
-  IDS_GNB_PCIE_POWER_GATING,          ///< 77 Hook for GNB PCIe Power Gating
-  IDS_MEM_DYN_DRAM_TERM,              ///< 78 Hook for Override Dynamic Dram Term
-  IDS_MEM_DRAM_TERM,                  ///< 79 Hook for Override Dram Term
-  IDS_GNB_ALTVDDNB,                   ///< 7a Hook for Override AltVddNB
-  IDS_UCODE,                          ///< 7b Enable or Disable microcode patching
-  IDS_FAM_REG_GMMX,                   ///< 7c GMMX register access
-  IDS_MEMORY_POWER_POLICY,            ///< 7d Memory power policy
-  IDS_GET_STRETCH_FREQUENCY_LIMIT,    ///< 7e Hook for enforcing memory stretch frequency limit
-  IDS_CPU_FEAT,                       ///< 7f Hook for runtime force cpu feature disable
-  IDS_AFTER_DCT_PHY_ACCESS,           ///< 80 Hook for DctAccessDone check
-  IDS_FORCE_PHY_TO_M0,                ///< 81 Hook to bypass M0 enforcement
-  IDS_GNB_PMM_SWTJOFFSET,             ///< 82 Hook to GNBSWTJOFFSET
-  IDS_LOCK_DRAM_CFG,                  ///< 83 Hook to BFLockDramCfg
-  IDS_BEFORE_GEN2_INIT,               ///< 84 Hook to Before Gen2 Init
-  IDS_BEFORE_GPP_TRAINING,            ///< 85 Hook to Before Gpp training
-  IDS_BEFORE_RECONFIGURATION,         ///< 86 Hook to Before Reconfiguration
-  IDS_BEFORE_GEN3_INIT,               ///< 87 Hook to Before Gen3 Init
-  IDS_BEFORE_POWER_GATING,            ///< 88 Hook to Before Power Gating
-  IDS_AFTER_EARLY_INIT_ONCORE,        ///< 89 Hook to after EarlyInit On Core
-  IDS_GNB_PCIE_PORT_REMAP,            ///< 8a Hook to change mapping of PCIe devices
-  IDS_ECC_CONTROL,                    ///< 8b Enable/Disable ECC feature
-  IDS_GNB_PCIE_PHY_ISOLATION,         ///< 8c Enable/Disable PCIE PHY ISOLATION
-  IDS_AFTER_RESTORING_PCI_REG,        ///< 8d Hook after restoring PCI register during S3 resume
-  IDS_MSR_ACCESS_OVERRIDE,            ///< 8e Hook to disable MSR access
-  IDS_REPORT_SMU_FW_VERSION,          ///< 8f Hook to report SMU firmware version
-  IDS_GNB_LOAD_SAMU_PATCH,            ///< 90 Hook to Load SAMU patch
-  IDS_DLLSTAGGERDLY_OVERRIDE,         ///< 91 Hook to skip Dll Stagger Delay
-  IDS_CSAMPLE_TIMER,                  ///< 92 Hook to override CSampleTimer
-  IDS_PIPE_THROTTLE,                  ///< 93 Hook to override PipeThrottle
-  IDS_GNB_PMM_NATIVEGEN1PLL,          ///< 94 Enable/Disable Native Gen1 PLL
-  IDS_BEFORE_PLAT_TABLES,             ///< 95 Hook before processing platform specific tables
-  IDS_GNB_PCIE_MASTERPLL_SELECTION,   ///< 96 Hook to override PCIe Master PLL selection
-  IDS_GNB_PCIE_PHYLANE_CONFIG,        ///< 97 Hook to override PCIe PhyLane configuration
-  IDS_DSM_LP_SELECTION,               ///< 98 Set Dsm low power mode
-  IDS_GNB_EQUAL_PRESET,               ///< 99 Set equalization preset
-  IDS_GNB_GEN1_LOOPBACK,              ///< 9a Override Gen 1 loopback mode
-  IDS_GNB_SMU_SERVICE_MASK,           ///< 9b Override SMU service enablement mask
-  IDS_BEFORE_HT_MEM_MAP,              ///< 9c Hook before mapping memory address space among DCTs
-  IDS_GNB_GEN3_SETTINGS_OVERRIDE,     ///< 9d Hook to override Gen3 Adapt PI Offset Bypass Enable
-  IDS_GNB_TARGET_TDP,                 ///< 9e Hook to override Target TDP
-  IDS_GNB_LOAD_BUILD_OPTIONS,         ///< 9f Hook to override gnb build options
-  IDS_GNB_SMU_BIOS_TABLE,             ///< A0 Hook to override gnb smu bios table
-  IDS_LOW_POWER_RCVR_EN_CTRL,         ///< A1 Hook to override LowPowerRcvrEn mode
-  IDS_OPTION_END                      ///< A2 End of IDS option
-} AGESA_IDS_OPTION;
-
-#include "OptionsIds.h"
-#include "Filecode.h"
-#include "IdsPerf.h"
-
-/* Initialize IDS controls */
-#ifndef IDSOPT_IDS_ENABLED
-  #define IDSOPT_IDS_ENABLED        FALSE
-#endif
-
-#ifndef IDSOPT_CONTROL_ENABLED
-  #define IDSOPT_CONTROL_ENABLED    FALSE
-#endif
-
-#ifndef IDSOPT_CONTROL_NV_TO_CMOS
-  #define IDSOPT_CONTROL_NV_TO_CMOS FALSE
-#endif
-
-#ifndef IDSOPT_TRACING_ENABLED
-  #define IDSOPT_TRACING_ENABLED    FALSE
-#endif
-
-#ifndef IDSOPT_TRACE_USER_OPTIONS
-  #define IDSOPT_TRACE_USER_OPTIONS TRUE
-#endif
-
-#ifndef IDSOPT_PERF_ANALYSIS
-  #define IDSOPT_PERF_ANALYSIS      FALSE
-#endif
-
-#ifndef IDSOPT_HEAP_CHECKING
-  #define IDSOPT_HEAP_CHECKING           FALSE
-#endif
-
-#ifndef IDSOPT_ASSERT_ENABLED
-  #define IDSOPT_ASSERT_ENABLED         FALSE
-#endif
-
-#ifndef IDSOPT_ERROR_TRAP_ENABLED
-  #define IDSOPT_ERROR_TRAP_ENABLED   FALSE
-#endif
-
-#ifndef IDSOPT_CAR_CORRUPTION_CHECK_ENABLED
-  #define IDSOPT_CAR_CORRUPTION_CHECK_ENABLED   FALSE
-#endif
-
-#ifndef IDSOPT_DEBUG_CODE_ENABLED
-  #define IDSOPT_DEBUG_CODE_ENABLED   FALSE
-#endif
-
-#ifndef IDSOPT_IDT_EXCEPTION_TRAP
-  #define IDSOPT_IDT_EXCEPTION_TRAP FALSE
-#endif
-
-#ifndef IDSOPT_C_OPTIMIZATION_DISABLED
-  #define IDSOPT_C_OPTIMIZATION_DISABLED   FALSE
-#endif
-
-#ifndef IDSOPT_TRACING_CONSOLE_HDTOUT
-  #define IDSOPT_TRACING_CONSOLE_HDTOUT   TRUE
-#endif
-
-#ifndef IDSOPT_TRACING_CONSOLE_SERIALPORT
-  #define IDSOPT_TRACING_CONSOLE_SERIALPORT   FALSE
-#endif
-
-#ifndef IDSOPT_TRACING_CONSOLE_REDIRECT_IO
-  #define IDSOPT_TRACING_CONSOLE_REDIRECT_IO  FALSE
-#endif
-
-#ifndef IDSOPT_TRACING_CONSOLE_RAM
-  #define IDSOPT_TRACING_CONSOLE_RAM  FALSE
-#endif
-
-#if IDSOPT_IDS_ENABLED == FALSE
-  #undef  IDSOPT_CONTROL_ENABLED
-  #undef  IDSOPT_TRACING_ENABLED
-  #undef  IDSOPT_PERF_ANALYSIS
-  #undef  IDSOPT_HEAP_CHECKING
-  #undef  IDSOPT_ASSERT_ENABLED
-  #undef  IDSOPT_ERROR_TRAP_ENABLED
-  #undef  IDSOPT_CAR_CORRUPTION_CHECK_ENABLED
-  #undef  IDSOPT_DEBUG_CODE_ENABLED
-  #undef  IDSOPT_TRACE_USER_OPTIONS
-  #undef  IDSOPT_TRACING_CONSOLE_HDTOUT
-  #undef  IDSOPT_TRACING_CONSOLE_SERIALPORT
-  #undef  IDSOPT_TRACING_CONSOLE_REDIRECT_IO
-  #undef  IDSOPT_TRACING_CONSOLE_RAM
-
-  #define IDSOPT_CONTROL_ENABLED    FALSE
-  #define IDSOPT_TRACING_ENABLED    FALSE
-  #define IDSOPT_PERF_ANALYSIS      FALSE
-  #define IDSOPT_HEAP_CHECKING      FALSE
-  #define IDSOPT_ASSERT_ENABLED     FALSE
-  #define IDSOPT_ERROR_TRAP_ENABLED FALSE
-  #define IDSOPT_CAR_CORRUPTION_CHECK_ENABLED FALSE
-  #define IDSOPT_DEBUG_CODE_ENABLED FALSE
-  #define IDSOPT_TRACE_USER_OPTIONS FALSE
-  #define IDSOPT_TRACING_CONSOLE_HDTOUT FALSE
-  #define IDSOPT_TRACING_CONSOLE_SERIALPORT FALSE
-  #define IDSOPT_TRACING_CONSOLE_REDIRECT_IO FALSE
-  #define IDSOPT_TRACING_CONSOLE_RAM FALSE
-#endif
-
-//Disable when master token Tracing is set to FALSE
-#if (IDSOPT_TRACING_ENABLED == FALSE) || (defined (IDSOPT_CUSTOMIZE_TRACING_SERVICE))
-  #undef  IDSOPT_TRACING_CONSOLE_HDTOUT
-  #define IDSOPT_TRACING_CONSOLE_HDTOUT FALSE
-
-  #undef  IDSOPT_TRACING_CONSOLE_SERIALPORT
-  #define IDSOPT_TRACING_CONSOLE_SERIALPORT FALSE
-
-  #undef IDSOPT_TRACING_CONSOLE_REDIRECT_IO
-  #define IDSOPT_TRACING_CONSOLE_REDIRECT_IO FALSE
-
-  #undef IDSOPT_TRACING_CONSOLE_RAM
-  #define IDSOPT_TRACING_CONSOLE_RAM FALSE
-#endif
-
-//Disable Tracing if all support HW layer set to FALSE
-#if ((IDSOPT_TRACING_CONSOLE_HDTOUT == FALSE) && (IDSOPT_TRACING_CONSOLE_SERIALPORT == FALSE) && (IDSOPT_TRACING_CONSOLE_REDIRECT_IO == FALSE) && (IDSOPT_TRACING_CONSOLE_RAM == FALSE))
-  #ifndef IDSOPT_CUSTOMIZE_TRACING_SERVICE
-    #undef  IDSOPT_TRACING_ENABLED
-    #define IDSOPT_TRACING_ENABLED FALSE
-  #endif
-#endif
-/**
- *  Make a Progress Report to the User.
- *
- *  This Macro is always enabled. The default action is to write the TestPoint value
- *  to an I/O port. The I/O port is 8 bits in size and the default address is 0x80.
- *  IBVs can change AGESA's default port by defining IDS_DEBUG_PORT to desired port
- *  in OptionsIds.h in their build tip.
- *
- *  @param[in]      TestPoint       The value for display indicating progress
- *  @param[in,out]  StdHeader       Pointer of AMD_CONFIG_PARAMS
- *
- **/
-
-#define AGESA_TESTPOINT(TestPoint, StdHeader) IdsAgesaTestPoint ((TestPoint), (StdHeader))
-
-#ifndef IDS_DEBUG_PORT
-  #define IDS_DEBUG_PORT  0x80
-#endif
-
-/**
- * @def STOP_HERE
- *  (macro) - Causes program to halt. This is @b only for use during active debugging .
- *
- *  Causes the program to halt and display the file number of the source of the
- *  halt (displayed in decimal).
- *
- **/
-#if IDSOPT_IDS_ENABLED == TRUE
-  #ifdef STOP_CODE
-    #undef STOP_CODE
-  #endif
-  #define STOP_CODE (((UINT32)FILECODE)*0x10000ul + \
-                      ((__LINE__) % 10) + (((__LINE__ / 10) % 10)*0x10) + \
-                      (((__LINE__ / 100) % 10)*0x100) + (((__LINE__ / 1000) % 10)*0x1000))
-  #define STOP_HERE IdsErrorStop (STOP_CODE);
-#else
-  #define STOP_HERE  STOP_HERE_Needs_To_Be_Removed //"WARNING: Debug code needs to be removed for production builds."
-#endif
-
-/**
- * @def ASSERT
- *  Test an assertion that the given statement is True.
- *
- *  The statement is evaluated to a boolean value. If the statement is True,
- *  then no action is taken (no error). If the statement is False, a error stop
- *  is generated to halt the program. Used for testing for fatal errors that
- *  must be resolved before production. This is used to do parameter checks,
- *  bounds checking, range checks and 'sanity' checks.
- *
- * @param[in]   conditional    Assert that evaluating this conditional results in TRUE.
- *
- **/
-#ifndef ASSERT
-  #if IDSOPT_ASSERT_ENABLED == TRUE
-    #ifdef STOP_CODE
-      #undef STOP_CODE
-    #endif
-    #define STOP_CODE (((UINT32)FILECODE)*0x10000ul + \
-                        ((__LINE__) % 10) + (((__LINE__ / 10) % 10)*0x10) + \
-                        (((__LINE__ / 100) % 10)*0x100) + (((__LINE__ / 1000) % 10)*0x1000))
-
-    #define ASSERT(conditional) ((conditional) ? 0 : IdsAssert (STOP_CODE));
-  #else
-    #define ASSERT(conditional)
-  #endif
-#endif
-
-#if IDSOPT_CAR_CORRUPTION_CHECK_ENABLED == TRUE
-  #undef  IDSOPT_ERROR_TRAP_ENABLED
-  #define IDSOPT_ERROR_TRAP_ENABLED TRUE
-  #define IDS_CAR_CORRUPTION_CHECK(StdHeader)  IdsCarCorruptionCheck(StdHeader)
-#else
-  #define IDS_CAR_CORRUPTION_CHECK(StdHeader)
-#endif
-/**
- * @def DEBUG_CODE
- * Make the code active when IDSOPT_DEBUG_CODE_ENABLED enable
- *
- */
-#ifndef DEBUG_CODE
-  #if IDSOPT_DEBUG_CODE_ENABLED == TRUE
-    #define  DEBUG_CODE(Code) Code
-  #else
-    #define  DEBUG_CODE(Code)
-  #endif
-#endif
-
-/**
- * @def IDS_ERROR_TRAP
- * Trap AGESA Error events with stop code display.
- *
- * Works similarly to use of "ASSERT (FALSE);"
- *
- */
-#if IDSOPT_ERROR_TRAP_ENABLED == TRUE
-  #ifdef STOP_CODE
-    #undef STOP_CODE
-  #endif
-  #define STOP_CODE (((UINT32)FILECODE)*0x10000ul + \
-                      ((__LINE__) % 10) + (((__LINE__ / 10) % 10)*0x10) + \
-                      (((__LINE__ / 100) % 10)*0x100) + (((__LINE__ / 1000) % 10)*0x1000))
-
-  #define IDS_ERROR_TRAP  IdsErrorStop (STOP_CODE)
-#else
-  #define IDS_ERROR_TRAP
-#endif
-
-///give the extended Macro default value
-#ifndef __IDS_EXTENDED__
-  #define IDS_EXTENDED_HOOK(idsoption, dataptr, idsnvptr, stdheader) IDS_SUCCESS
-  #define IDS_TRACE_DEFAULT (0)
-  #define IDS_INITIAL_F15_TN_PM_STEP
-  #define IDS_INITIAL_F15_KV_PM_STEP
-  #define IDS_INITIAL_F15_CZ_PM_STEP
-  #define IDS_INITIAL_F16_KB_PM_STEP
-  #define IDS_INITIAL_F16_ML_PM_STEP
-  #define IDS_F15_TN_PM_CUSTOM_STEP
-  #define IDS_F15_KV_PM_CUSTOM_STEP
-  #define IDS_F15_CZ_PM_CUSTOM_STEP
-  #define IDS_F16_KB_PM_CUSTOM_STEP
-  #define IDS_F16_ML_PM_CUSTOM_STEP
-  #define IDS_EXTENDED_GET_DATA_EARLY(data, StdHeader)
-  #define IDS_EXTENDED_GET_DATA_LATE(data, StdHeader)
-  #define IDS_EXTENDED_HEAP_SIZE 0
-  #define IDS_EXT_INCLUDE_F15(file)
-  #define IDS_EXT_INCLUDE(file)
-  #define IDS_PAD_4K
-  #define IDS_EXTENDED_CODE(code)
-  #define SMU_FIRMWARE_PADS_1K
-#endif
-
-#ifndef IDS_NUM_NV_ITEM
-  #define IDS_NUM_NV_ITEM (IDS_NUM_EXT_NV_ITEM)
-#endif
-
-#define IDS_CMOS_INDEX_PORT 0x70
-#define IDS_CMOS_DATA_PORT 0x71
-#define IDS_CMOS_REGION_START 0x20
-#define IDS_CMOS_REGION_END 0x7F
-#define IDS_AP_GET_NV_FROM_CMOS(x) FALSE
-
-#if IDSOPT_CONTROL_ENABLED == TRUE
-  #define IDS_OPTION_HOOK(IdsOption, DataPtr, StdHeader) \
-          AmdIdsCtrlDispatcher ((IdsOption), (DataPtr), (StdHeader))
-
-  #define IDS_OPTION_CALLOUT(CallOutId, DataPtr, StdHeader) \
-          IdsOptionCallout ((CallOutId), (DataPtr), (StdHeader))
-  #if IDSOPT_CONTROL_NV_TO_CMOS == TRUE
-    #undef IDS_AP_GET_NV_FROM_CMOS
-    #define IDS_AP_GET_NV_FROM_CMOS(x) AmdIdsApGetNvFromCmos(x)
-    #ifdef IDS_OPT_CMOS_INDEX_PORT
-      #undef IDS_CMOS_INDEX_PORT
-      #define IDS_CMOS_INDEX_PORT IDS_OPT_CMOS_INDEX_PORT
-    #endif
-
-    #ifdef IDS_OPT_CMOS_DATA_PORT
-      #undef IDS_CMOS_DATA_PORT
-      #define IDS_CMOS_DATA_PORT IDS_OPT_CMOS_DATA_PORT
-    #endif
-
-    #ifdef IDS_OPT_CMOS_REGION_START
-      #undef IDS_CMOS_REGION_START
-      #define IDS_CMOS_REGION_START IDS_OPT_CMOS_REGION_START
-    #endif
-
-    #ifdef IDS_OPT_CMOS_REGION_END
-      #undef IDS_CMOS_REGION_END
-      #define IDS_CMOS_REGION_END IDS_OPT_CMOS_REGION_END
-    #endif
-  #endif
-#else
-  #define IDS_OPTION_HOOK(IdsOption, DataPtr, StdHeader)
-
-  #define IDS_OPTION_CALLOUT(CallOutId, DataPtr, StdHeader) AGESA_SUCCESS
-#endif
-
-/**
- *  Macro to add a *skip* hook for IDS options
- *
- *  The default minimal action is to do nothing and there is no any code to increase.
- *  For debug environments, IDS dispatcher function will be called to perform
- *  the detailed action and to skip AGESA code if necessary.
- *
- * @param[in]       IdsOption       IDS Option ID for this hook point
- * @param[in, out]  DataPtr         Data Pointer to override
- * @param[in, out]  StdHeader       Pointer of AMD_CONFIG_PARAMS
- *
- *
- **/
-
-#if IDSOPT_CONTROL_ENABLED == TRUE
-  #define IDS_SKIP_HOOK(IdsOption, DataPtr, StdHeader) \
-          if (AmdIdsCtrlDispatcher (IdsOption, DataPtr, StdHeader) == IDS_SUCCESS)
-#else
-  #define IDS_SKIP_HOOK(IdsOption, DataPtr, StdHeader)
-#endif
-
-/**
- *  Macro to add a heap manager routine
- *
- *  when memory is allocated the heap manager actually allocates two extra dwords of data,
- *  one dword buffer before the actual memory, and one dword afterwards.
- *  a complete heap walk and check to be performed at any time.
- *  it would ASSERT if the heap is corrupt
- *
- * @param[in]  StdHeader       Pointer of AMD_CONFIG_PARAMS
- *
- *
- **/
-
-// Heap debug feature
-#define SENTINEL_BEFORE_VALUE 0x64616548ul    // "Head"
-#define SENTINEL_AFTER_VALUE  0x6C696154ul    // "Tail"
-#if IDSOPT_IDS_ENABLED == TRUE
-  #if IDSOPT_HEAP_CHECKING == TRUE
-    #define SIZE_OF_SENTINEL  4
-    #define NUM_OF_SENTINEL   2             // Before ("Head") and After ("Tail")
-    #define SET_SENTINEL_BEFORE(NodePtr, AlignTo16Byte) (*(UINT32 *) ((UINT8 *) NodePtr + sizeof (BUFFER_NODE) + AlignTo16Byte) = SENTINEL_BEFORE_VALUE);
-    #define SET_SENTINEL_AFTER(NodePtr) (*(UINT32 *) ((UINT8 *) NodePtr + sizeof (BUFFER_NODE) + NodePtr->BufferSize - SIZE_OF_SENTINEL) = SENTINEL_AFTER_VALUE);
-    #define Heap_Check(stdheader) AmdHeapIntactCheck(stdheader)
-  #else
-    #define SIZE_OF_SENTINEL  0
-    #define NUM_OF_SENTINEL   0
-    #define SET_SENTINEL_BEFORE(NodePtr, AlignTo16Byte)
-    #define SET_SENTINEL_AFTER(NodePtr)
-    #define Heap_Check(stdheader)
-  #endif
-#else
-  #define SIZE_OF_SENTINEL    0
-  #define NUM_OF_SENTINEL     0
-  #define SET_SENTINEL_BEFORE(NodePtr, AlignTo16Byte)
-  #define SET_SENTINEL_AFTER(NodePtr)
-  #define Heap_Check(stdheader)
-#endif
-
-/**
- *  Macro to add IDT for debugging exception.
- *
- *  A debug feature. Adding a 'jmp $' into every exception handler.
- *  So debugger could use HDT to skip 'jmp $' and execute the iret,
- *  then they could find which instruction cause the exception.
- *
- * @param[in]       FunctionId      IDS Function ID for this hook point
- * @param[in, out]  DataPtr         Data Pointer to override
- * @param[in, out]  StdHeader       Pointer of AMD_CONFIG_PARAMS
- *
- *
- **/
-#if IDSOPT_IDS_ENABLED == TRUE
-  #if IDSOPT_IDT_EXCEPTION_TRAP == TRUE
-    #define IDS_EXCEPTION_TRAP(FunctionId, DataPtr, StdHeader) IdsExceptionTrap (FunctionId, DataPtr, StdHeader)
-  #else
-    #define IDS_EXCEPTION_TRAP(FunctionId, DataPtr, StdHeader)
-  #endif
-#else
-  #define IDS_EXCEPTION_TRAP(FunctionId, DataPtr, StdHeader)
-#endif
-
-
- //Note a is from 0 to 63
-#define DEBUG_PRINT_SHIFT(a)   ((UINT64)1 << a)
-//If you change the Bitmap definition below, please change the Hash in ParseFilter of hdtout2008.pl accordingly
-//Memory Masks
-#define MEM_SETREG                                  DEBUG_PRINT_SHIFT (0)
-#define MEM_GETREG                                  DEBUG_PRINT_SHIFT (1)
-#define MEM_FLOW                                    DEBUG_PRINT_SHIFT (2)
-#define MEM_STATUS                                  DEBUG_PRINT_SHIFT (3)
-#define MEM_UNDEF_BF                                DEBUG_PRINT_SHIFT (4)
-#define MEMORY_TRACE_RSV2                           DEBUG_PRINT_SHIFT (5)
-#define MEMORY_TRACE_RSV3                           DEBUG_PRINT_SHIFT (6)
-#define MEMORY_TRACE_RSV4                           DEBUG_PRINT_SHIFT (7)
-#define MEMORY_TRACE_RSV5                           DEBUG_PRINT_SHIFT (8)
-#define MEMORY_TRACE_RSV6                           DEBUG_PRINT_SHIFT (9)
-
-//CPU Masks
-#define CPU_TRACE                                   DEBUG_PRINT_SHIFT (10)
-#define CPU_TRACE_RSV1                              DEBUG_PRINT_SHIFT (11)
-#define CPU_TRACE_RSV2                              DEBUG_PRINT_SHIFT (12)
-#define CPU_TRACE_RSV3                              DEBUG_PRINT_SHIFT (13)
-#define CPU_TRACE_RSV4                              DEBUG_PRINT_SHIFT (14)
-#define CPU_TRACE_RSV5                              DEBUG_PRINT_SHIFT (15)
-#define CPU_TRACE_RSV6                              DEBUG_PRINT_SHIFT (16)
-#define CPU_TRACE_RSV7                              DEBUG_PRINT_SHIFT (17)
-#define CPU_TRACE_RSV8                              DEBUG_PRINT_SHIFT (18)
-#define CPU_TRACE_RSV9                              DEBUG_PRINT_SHIFT (19)
-
-//GNB Masks
-#define GNB_TRACE                                   DEBUG_PRINT_SHIFT (20)
-#define PCIE_MISC                                   DEBUG_PRINT_SHIFT (21)
-#define PCIE_PORTREG_TRACE                          DEBUG_PRINT_SHIFT (22)
-#define PCIE_HOSTREG_TRACE                          DEBUG_PRINT_SHIFT (23)
-#define GNB_TRACE_RSV2                              DEBUG_PRINT_SHIFT (24)
-#define NB_MISC                                     DEBUG_PRINT_SHIFT (25)
-#define GNB_TRACE_RSV3                              DEBUG_PRINT_SHIFT (26)
-#define GFX_MISC                                    DEBUG_PRINT_SHIFT (27)
-#define NB_SMUREG_TRACE                             DEBUG_PRINT_SHIFT (28)
-#define GNB_TRACE_RSV1                              DEBUG_PRINT_SHIFT (29)
-
-//Topology Masks
-#define TOPO_TRACE                                  DEBUG_PRINT_SHIFT (30)
-#define TOPO_TRACE_RSV1                             DEBUG_PRINT_SHIFT (31)
-#define TOPO_TRACE_RSV2                             DEBUG_PRINT_SHIFT (32)
-#define TOPO_TRACE_RSV3                             DEBUG_PRINT_SHIFT (33)
-#define TOPO_TRACE_RSV4                             DEBUG_PRINT_SHIFT (34)
-#define TOPO_TRACE_RSV5                             DEBUG_PRINT_SHIFT (35)
-#define TOPO_TRACE_RSV6                             DEBUG_PRINT_SHIFT (36)
-#define TOPO_TRACE_RSV7                             DEBUG_PRINT_SHIFT (37)
-#define TOPO_TRACE_RSV8                             DEBUG_PRINT_SHIFT (38)
-#define TOPO_TRACE_RSV9                             DEBUG_PRINT_SHIFT (39)
-
-//FCH Masks
-#define FCH_TRACE                                    DEBUG_PRINT_SHIFT (40)
-#define FCH_TRACE_RSV1                               DEBUG_PRINT_SHIFT (41)
-#define FCH_TRACE_RSV2                               DEBUG_PRINT_SHIFT (42)
-#define FCH_TRACE_RSV3                               DEBUG_PRINT_SHIFT (43)
-#define FCH_TRACE_RSV4                               DEBUG_PRINT_SHIFT (44)
-#define FCH_TRACE_RSV5                               DEBUG_PRINT_SHIFT (45)
-#define FCH_TRACE_RSV6                               DEBUG_PRINT_SHIFT (46)
-#define FCH_TRACE_RSV7                               DEBUG_PRINT_SHIFT (47)
-#define FCH_TRACE_RSV8                               DEBUG_PRINT_SHIFT (48)
-#define FCH_TRACE_RSV9                               DEBUG_PRINT_SHIFT (49)
-
-//Other Masks
-#define MAIN_FLOW                                    DEBUG_PRINT_SHIFT (50)
-#define EVENT_LOG                                    DEBUG_PRINT_SHIFT (51)
-#define PERFORMANCE_ANALYSE                          DEBUG_PRINT_SHIFT (52)
-
-//Ids Masks
-#define IDS_TRACE                                    DEBUG_PRINT_SHIFT (53)
-#define BVM_TRACE                                    DEBUG_PRINT_SHIFT (54)
-#define IDS_TRACE_RSV2                               DEBUG_PRINT_SHIFT (55)
-#define IDS_TRACE_RSV3                               DEBUG_PRINT_SHIFT (56)
-
-//S3
-#define S3_TRACE                                     DEBUG_PRINT_SHIFT (57)
-
-//Library function to read/write PCI/MSR registers
-#define LIB_PCI_RD                                   DEBUG_PRINT_SHIFT (58)
-#define LIB_PCI_WR                                   DEBUG_PRINT_SHIFT (59)
-
-//AGESA test points
-#define TEST_POINT                                   DEBUG_PRINT_SHIFT (60)
-
-//Reserved for platform log
-#define PLAT_RSV1                                    DEBUG_PRINT_SHIFT (61)
-#define PLAT_RSV2                                    DEBUG_PRINT_SHIFT (62)
-#define PLAT_RSV3                                    DEBUG_PRINT_SHIFT (63)
-
-#define GNB_TRACE_DEFAULT\
-      (\
-      GNB_TRACE | PCIE_MISC | NB_MISC | GFX_MISC \
-      )
-
-#define GNB_TRACE_REG\
-      (\
-      PCIE_PORTREG_TRACE | PCIE_HOSTREG_TRACE | \
-      NB_SMUREG_TRACE | GNB_TRACE_RSV1 \
-      )
-
-#define GNB_TRACE_ALL\
-      (\
-      GNB_TRACE_DEFAULT | GNB_TRACE_REG \
-      )
-
-#define CPU_TRACE_ALL\
-      (\
-      CPU_TRACE | CPU_TRACE_RSV1 | CPU_TRACE_RSV2 | CPU_TRACE_RSV3 | \
-      CPU_TRACE_RSV4 | CPU_TRACE_RSV5 | CPU_TRACE_RSV6 | CPU_TRACE_RSV7 | \
-      CPU_TRACE_RSV8 | CPU_TRACE_RSV9\
-      )
-
-#define MEMORY_TRACE_ALL\
-      (\
-      MEM_FLOW | MEM_GETREG | MEM_SETREG | MEM_STATUS | \
-      MEMORY_TRACE_RSV1 | MEMORY_TRACE_RSV2 | MEMORY_TRACE_RSV3 | MEMORY_TRACE_RSV4 | \
-      MEMORY_TRACE_RSV5 | MEMORY_TRACE_RSV6\
-      )
-
-#define TOPO_TRACE_ALL\
-      (\
-      TOPO_TRACE | TOPO_TRACE_RSV1 | TOPO_TRACE_RSV2 | TOPO_TRACE_RSV3 | \
-      TOPO_TRACE_RSV4 | TOPO_TRACE_RSV5 | TOPO_TRACE_RSV6 | TOPO_TRACE_RSV7 | \
-      TOPO_TRACE_RSV8 | TOPO_TRACE_RSV9\
-      )
-
-#define FCH_TRACE_ALL\
-      (\
-      FCH_TRACE | FCH_TRACE_RSV1 | FCH_TRACE_RSV2 | FCH_TRACE_RSV3 | \
-      FCH_TRACE_RSV4 | FCH_TRACE_RSV5 | FCH_TRACE_RSV6 | FCH_TRACE_RSV7 | \
-      FCH_TRACE_RSV8 | FCH_TRACE_RSV9\
-      )
-
-#define IDS_TRACE_ALL\
-      (\
-      IDS_TRACE | BVM_TRACE | IDS_TRACE_RSV2 | IDS_TRACE_RSV3\
-      )
-
-#define OTHER_TRACE_ALL\
-      (\
-      MAIN_FLOW | EVENT_LOG | PERFORMANCE_ANALYSE\
-      )
-
-
-#define TRACE_MASK_ALL (0xFFFFFFFFFFFFFFFFull)
-#ifndef IDS_DEBUG_PRINT_MASK
-  #define IDS_DEBUG_PRINT_MASK (GNB_TRACE_DEFAULT  | CPU_TRACE_ALL | MEM_FLOW | MEM_STATUS | TOPO_TRACE_ALL | FCH_TRACE_ALL | MAIN_FLOW | IDS_TRACE_DEFAULT | TEST_POINT)
-#endif
-
-/// if no specific define INIT & EXIT will be NULL
-#define IDS_HDT_CONSOLE_INIT(x)
-#define IDS_HDT_CONSOLE_EXIT(x)
-
-/// AGESA tracing service
-#if IDSOPT_TRACING_ENABLED == TRUE
-  #ifdef VA_ARGS_SUPPORTED
-    #if IDSOPT_C_OPTIMIZATION_DISABLED == TRUE
-      #define IDS_HDT_CONSOLE(f, s, ...)        AmdIdsDebugPrint (f, s, __VA_ARGS__)
-    #else
-      #pragma warning(disable: 4127)
-      #define IDS_HDT_CONSOLE(f, s, ...)        if      (f == MEM_FLOW) AmdIdsDebugPrintMem (s, __VA_ARGS__); \
-                                                 else if (f == CPU_TRACE) AmdIdsDebugPrintCpu (s, __VA_ARGS__); \
-                                                  else if (f == TOPO_TRACE) AmdIdsDebugPrintTopology (s, __VA_ARGS__); \
-                                                  else if (f == GNB_TRACE) AmdIdsDebugPrintGnb (s, __VA_ARGS__); \
-                                                 else AmdIdsDebugPrint (f, s, __VA_ARGS__)
-    #endif
-  #else
-    #define IDS_HDT_CONSOLE    AmdIdsDebugPrint
-  #endif
-  #define CONSOLE            AmdIdsDebugPrintAll
-  #define IDS_HDT_CONSOLE_DEBUG_CODE(Code)  Code
-  #define IDS_TIMEOUT_CTL(t)                IdsMemTimeOut (t)
-#else
-  #define IDS_HDT_CONSOLE           1 ? (VOID) 0 : AmdIdsDebugPrint
-  #define IDS_HDT_CONSOLE_DEBUG_CODE(Code)
-  #define CONSOLE   CONSOLE_Needs_To_Be_Removed_For_Production_Build //"WARNING: CONSOLE needs to be removed for production builds."
-  #define IDS_TIMEOUT_CTL(t)
-#endif
-
-/// Macros for serial port tracing
-#ifdef IDSOPT_SERIAL_PORT
-  #define IDS_SERIAL_PORT IDSOPT_SERIAL_PORT
-#endif
-
-#ifndef IDS_SERIAL_PORT
-  #define IDS_SERIAL_PORT 0x3F8
-#endif
-
-// Macros for redirect IO tracing
-#ifdef IDSOPT_DEBUG_PRINT_IO_PORT
-  #define IDS_DEBUG_PRINT_IO_PORT IDSOPT_DEBUG_PRINT_IO_PORT
-#endif
-
-#ifndef IDS_DEBUG_PRINT_IO_PORT
-  #define IDS_DEBUG_PRINT_IO_PORT 0x80
-#endif
-
-#define IDS_DPRAM_BASE 0
-#define IDS_DPRAM_SIZE 0
-///Default policy, shift the old data when buffer full
-#define IDS_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL FALSE
-#if IDSOPT_TRACING_CONSOLE_RAM  == TRUE
-  #ifdef IDSOPT_DPRAM_BASE
-    #undef IDS_DPRAM_BASE
-    #define IDS_DPRAM_BASE  IDSOPT_DPRAM_BASE
-  #else
-    #error "Debug Print Ram Base not specified, please define IDSOPT_DPRAM_BASE in optionsids.h"
-  #endif
-
-  #ifdef IDSOPT_DPRAM_SIZE
-    #undef IDS_DPRAM_SIZE
-    #define IDS_DPRAM_SIZE  IDSOPT_DPRAM_SIZE
-  #else
-    #error "Debug Print Ram size not specified, please define IDSOPT_DPRAM_SIZE in optionsids.h"
-  #endif
-
-  #ifdef IDSOPT_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL
-    #define IDS_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL IDSOPT_DPRAM_STOP_LOGGING_WHEN_BUFFER_FULL
-  #endif
-#endif
-/**
- *  Macros to add HDT OUT
- *
- *  The default minimal action is to do nothing and there is no any code to increase.
- *  For debug environments, the debug information can be displayed in HDT or other
- *  devices.
- *
- **/
-#if IDSOPT_TRACING_CONSOLE_HDTOUT == TRUE
-  #undef IDS_HDT_CONSOLE_INIT
-  #undef IDS_HDT_CONSOLE_EXIT
-  #define IDS_HDT_CONSOLE_INIT(x)           AmdIdsHdtOutInit (x)
-  #define IDS_HDT_CONSOLE_EXIT(x)           AmdIdsHdtOutExit (x)
-  #define IDS_HDT_CONSOLE_S3_EXIT(x)        AmdIdsHdtOutS3Exit (x)
-  #define IDS_HDT_CONSOLE_S3_AP_EXIT(x)     AmdIdsHdtOutS3ApExit (x)
-
-  #define IDS_HDT_CONSOLE_FLUSH_BUFFER(x)   AmdIdsHdtOutBufferFlush (x)
-  #define IDS_HDT_CONSOLE_ASSERT(x)   AmdIdsDebugPrintAssert (x)
-  #define IDS_FUNCLIST_ADDR                 ScriptFuncList
-  #define IDS_FUNCLIST_EXTERN()             extern SCRIPT_FUNCTION ScriptFuncList[]
-#else
-  #define IDS_HDT_CONSOLE_S3_EXIT(x)
-  #define IDS_HDT_CONSOLE_S3_AP_EXIT(x)
-  #define IDS_HDT_CONSOLE_FLUSH_BUFFER(x)
-  #define IDS_HDT_CONSOLE_ASSERT(x)
-  #define IDS_FUNCLIST_ADDR                 NULL
-  #define IDS_FUNCLIST_EXTERN()
-#endif
-
-#if IDSOPT_TRACING_ENABLED == TRUE
-  #ifdef IDSOPT_CUSTOMIZE_TRACING_SERVICE
-    #undef  IDS_HDT_CONSOLE
-    #define IDS_HDT_CONSOLE        IDSOPT_CUSTOMIZE_TRACING_SERVICE
-  #endif
-  #ifdef IDSOPT_CUSTOMIZE_TRACING_SERVICE_INIT
-    #undef IDS_HDT_CONSOLE_INIT
-    #define IDS_HDT_CONSOLE_INIT(x)           IDSOPT_CUSTOMIZE_TRACING_SERVICE_INIT (x)
-  #endif
-  #ifdef IDSOPT_CUSTOMIZE_TRACING_SERVICE_EXIT
-    #undef IDS_HDT_CONSOLE_EXIT
-    #define IDS_HDT_CONSOLE_EXIT(x)           IDSOPT_CUSTOMIZE_TRACING_SERVICE_EXIT (x)
-  #endif
-#endif
-
-#define IDS_TRACE_SHOW_BLD_OPT_CFG  IDSOPT_TRACE_USER_OPTIONS
-
-#if IDSOPT_PERF_ANALYSIS == TRUE
-  #include "IdsPerf.h"
-  #ifdef STOP_CODE
-    #undef STOP_CODE
-  #endif
-  #define STOP_CODE (((UINT32)FILECODE)*0x10000ul + \
-                        ((__LINE__) % 10) + (((__LINE__ / 10) % 10)*0x10) + \
-                        (((__LINE__ / 100) % 10)*0x100) + (((__LINE__ / 1000) % 10)*0x1000))
-
-  #define IDS_PERF_TIMESTAMP(ID, StdHeader)  IdsPerfTimestamp (STOP_CODE, ID, (StdHeader))
-  #define IDS_PERF_ANALYSE(StdHeader)   IdsPerfAnalyseTimestamp (StdHeader)
-#else
-  #define IDS_PERF_TIMESTAMP(ID, StdHeader)
-  #define IDS_PERF_ANALYSE(StdHeader)
-#endif
-
-///For IDS feat use
-#define IDS_FAMILY_ALL  0xFFFFFFFFFFFFFFFFull
-#define IDS_BSP_ONLY    TRUE
-#define IDS_ALL_CORES   FALSE
-
-#define IDS_LATE_RUN_AP_TASK_ID     PROC_IDS_LIBRARY_IDSLIB_FILECODE
-
-#define IDS_CALLOUT_INIT      0x01                             ///< The function data of IDS callout function of initialization.
-
-#define IDS_CALLOUT_GNB_PPFUSE_OVERRIDE           0x83        ///< The function data of IDS callout function of GNB pp fuse table.
-#define IDS_CALLOUT_GNB_INTEGRATED_TABLE_CONFIG   0x84        ///< The function data of IDS callout function of GNB integrated table.
-#define IDS_CALLOUT_GNB_NB_POWERGATE_CONFIG       0x85        ///< The function data of IDS callout function of GNB NB power gate config.
-#define IDS_CALLOUT_GNB_PCIE_POWERGATE_CONFIG     0x86        ///< The function data of IDS callout function of GNB PCIE power gateconfig.
-#define IDS_CALLOUT_GNB_PCIE_PLATFORM_CONFIG      0x87        ///< The function data of IDS callout function of GNB pcie platform config.
-#define IDS_CALLOUT_GNB_PCIE_PHY_CONFIG           0x88        ///< The function data of IDS callout function of GNB pcie PHY config.
-#define IDS_CALLOUT_GNB_GMM_REGISTER_OVERRIDE     0x89        ///< The function data of IDS callout function of GNB GMM register override
-#define IDS_CALLOUT_FCH_INIT_RESET                0x8A        ///< The function data of IDS callout function of FchInitReset
-#define IDS_CALLOUT_FCH_INIT_ENV                  0x8B        ///< The function data of IDS callout function of FchInitEnv.
-#define IDS_CALLOUT_POWER_PLAN_INIT               0x8C        ///< The function data of IDS callout function of Override Power Plan Init
-#define IDS_CALLOUT_GET_PERF_BUFFER               0x8D        ///< The function data of IDS callout function of get platform performance buffer.
-#define IDS_CALLOUT_GNB_PACKAGE_POWER_CONFIG      0x8E        ///< The function data of IDS callout function of Bapm Package Power.
-#define IDS_CALLOUT_SMU_PORT80_LOGGING_BUFFER     0x8F        ///< The function data of IDS callout function of SMU port80 logging buffer.
-#define IDS_CALLOUT_GNB_BEFORE_EARLY_INIT         0x90        ///< The function data of IDS callout function of GNB before early init.
-#define IDS_CALLOUT_GNB_SMUBIOSTABLE_OVERRIDE     0x91        ///< The function data of IDS callout function of GNB smu bios table.
-
-/// Function entry for HDT script to call
-typedef struct _SCRIPT_FUNCTION {
-  UINT32  FuncAddr;       ///< Function address in ROM
-  CHAR8   FuncName[40];   ///< Function name
-} SCRIPT_FUNCTION;
-
-/// Data Structure for Mem ECC parameter override
-typedef struct {
-  IN BOOLEAN CfgEccRedirection;                   ///< ECC Redirection
-  IN UINT16  CfgScrubDramRate;                    ///< Scrub Dram Rate
-  IN UINT16  CfgScrubL2Rate;                      ///< Scrub L2Rate
-  IN UINT16  CfgScrubL3Rate;                      ///< Scrub L3Rate
-  IN UINT16  CfgScrubIcRate;                      ///< Scrub Ic Rate
-  IN UINT16  CfgScrubDcRate;                      ///< Scrub Dc Rate
-  IN BOOLEAN CfgEccSyncFlood;                     ///< ECC Sync Flood
-} ECC_OVERRIDE_STRUCT;
-
-
-
-
-/**
- *  AGESA Test Points
- *
- *  These are the values displayed to the user to indicate progress through boot.
- *  These can be used in a debug environment to stop the debugger at a specific
- *  test point:
- *  For SimNow!, this command
- *      bi 81 w vb 49
- *  will stop the debugger on one of the TracePoints (49 is the TP value in this example).
- *
- */
-typedef enum {
-  StartProcessorTestPoints,           ///< 00 Entry used for range testing for @b Processor related TPs
-
-  // Memory test points
-  TpProcMemBeforeMemDataInit,         ///< 01 .. Memory structure initialization (Public interface)
-  TpProcMemBeforeSpdProcessing,       ///< 02 .. SPD Data processing  (Public interface)
-  TpProcMemAmdMemAuto,                ///< 03 .. Memory configuration  (Public interface)
-  TpProcMemDramInit,                  ///< 04 .. DRAM initialization
-  TpProcMemSPDChecking,               ///< 05 ..
-  TpProcMemModeChecking,              ///< 06 ..
-  TpProcMemSpeedTclConfig,            ///< 07 .. Speed and TCL configuration
-  TpProcMemSpdTiming,                 ///< 08 ..
-  TpProcMemDramMapping,               ///< 09 ..
-  TpProcMemPlatformSpecificConfig,    ///< 0A ..
-  TPProcMemPhyCompensation,           ///< 0B ..
-  TpProcMemStartDcts,                 ///< 0C ..
-  TpProcMemBeforeDramInit,            ///< 0D .. (Public interface)
-  TpProcMemPhyFenceTraining,          ///< 0E ..
-  TpProcMemSynchronizeDcts,           ///< 0F ..
-  TpProcMemSystemMemoryMapping,       ///< 10 ..
-  TpProcMemMtrrConfiguration,         ///< 11 ..
-  TpProcMemDramTraining,              ///< 12 ..
-  TpProcMemBeforeAnyTraining,         ///< 13 .. (Public interface)
-  TpProcMemWriteLevelizationTraining, ///< 14 ..
-  TpProcMemWlFirstPass,               ///< 15 .. Below 800Mhz first pass start
-  TpProcMemWlSecondPass,              ///< 16 .. Above 800Mhz second pass start
-  TpProcMemWlTrainTargetDimm,         ///< 17 .. Target DIMM configured
-  TpProcMemWlPrepDimms,               ///< 18 ..  Prepare DIMMS for WL
-  TpProcMemWlConfigDimms,             ///< 19 ..  Configure DIMMS for WL
-  TpProcMemReceiverEnableTraining,    ///< 1A ..
-  TpProcMemRcvrStartSweep,            ///< 1B .. Start sweep loop
-  TpProcMemRcvrSetDelay,              ///< 1C .. Set receiver Delay
-  TpProcMemRcvrWritePattern,          ///< 1D .. Write test pattern
-  TpProcMemRcvrReadPattern,           ///< 1E .. Read test pattern
-  TpProcMemRcvrTestPattern,           ///< 1F .. Compare test pattern
-  TpProcMemRcvrCalcLatency,           ///< 20 .. Calculate MaxRdLatency per channel
-  TpProcMemReceiveDqsTraining,        ///< 21 ..
-  TpProcMemRcvDqsSetDelay,            ///< 22 .. Set Write Data delay
-  TpProcMemRcvDqsWritePattern,        ///< 23 .. Write test pattern
-  TpProcMemRcvDqsStartSweep,          ///< 24 .. Start read sweep
-  TpProcMemRcvDqsSetRcvDelay,         ///< 25 .. Set Receive DQS delay
-  TpProcMemRcvDqsReadPattern,         ///< 26 .. Read Test pattern
-  TpProcMemRcvDqsTstPattern,          ///< 27 .. Compare Test pattern
-  TpProcMemRcvDqsResults,             ///< 28 .. Update results
-  TpProcMemRcvDqsFindWindow,          ///< 29 .. Start Find passing window
-  TpProcMemTransmitDqsTraining,       ///< 2A ..
-  TpProcMemTxDqStartSweep,            ///< 2B .. Start write sweep
-  TpProcMemTxDqSetDelay,              ///< 2C .. Set Transmit DQ delay
-  TpProcMemTxDqWritePattern,          ///< 2D .. Write test pattern
-  TpProcMemTxDqReadPattern,           ///< 2E .. Read Test pattern
-  TpProcMemTxDqTestPattern,           ///< 2F .. Compare Test pattern
-  TpProcMemTxDqResults,               ///< 30 .. Update results
-  TpProcMemTxDqFindWindow,            ///< 31 .. Start Find passing window
-  TpProcMemMaxRdLatencyTraining,      ///< 32 ..
-  TpProcMemMaxRdLatStartSweep,        ///< 33 .. Start sweep
-  TpProcMemMaxRdLatSetDelay,          ///< 34 .. Set delay
-  TpProcMemMaxRdLatWritePattern,      ///< 35 .. Write test pattern
-  TpProcMemMaxRdLatReadPattern,       ///< 36 .. Read Test pattern
-  TpProcMemMaxRdLatTestPattern,       ///< 37 .. Compare Test pattern
-  TpProcMemOnlineSpareInit,           ///< 38 .. Online Spare init
-  TpProcMemBankInterleaveInit,        ///< 39 .. Bank Interleave Init
-  TpProcMemNodeInterleaveInit,        ///< 3A .. Node Interleave Init
-  TpProcMemChannelInterleaveInit,     ///< 3B .. Channel Interleave Init
-  TpProcMemEccInitialization,         ///< 3C .. ECC initialization
-  TpProcMemPlatformSpecificInit,      ///< 3D .. Platform Specific Init
-  TpProcMemBeforeAgesaReadSpd,        ///< 3E .. Before callout for "AgesaReadSpd"
-  TpProcMemAfterAgesaReadSpd,         ///< 3F .. After callout for "AgesaReadSpd"
-  TpProcMemBeforeAgesaHookBeforeDramInit,    ///< 40 .. Before optional callout "AgesaHookBeforeDramInit"
-  TpProcMemAfterAgesaHookBeforeDramInit,     ///< 41 .. After optional callout "AgesaHookBeforeDramInit"
-  TpProcMemBeforeAgesaHookBeforeDQSTraining, ///< 42 .. Before optional callout "AgesaHookBeforeDQSTraining"
-  TpProcMemAfterAgesaHookBeforeDQSTraining,  ///< 43 .. After optional callout "AgesaHookBeforeDQSTraining"
-  TpProcMemBeforeAgesaHookBeforeExitSelfRef, ///< 44 .. Before optional callout "AgesaHookBeforeDramInit"
-  TpProcMemAfterAgesaHookBeforeExitSelfRef,  ///< 45 .. After optional callout "AgesaHookBeforeDramInit"
-  TpProcMemAfterMemDataInit,          ///< 46 .. After MemDataInit
-  TpProcMemInitializeMCT,             ///< 47 .. Before InitializeMCT
-  TpProcMemLvDdr3,                    ///< 48 .. Before LV DDR3
-  TpProcMemInitMCT,                   ///< 49 .. Before InitMCT
-  TpProcMemOtherTiming,               ///< 4A.. Before OtherTiming
-  TpProcMemUMAMemTyping,              ///< 4B .. Before UMAMemTyping
-  TpProcMemSetDqsEccTmgs,             ///< 4C .. Before SetDqsEccTmgs
-  TpProcMemMemClr,                    ///< 4D .. Before MemClr
-  TpProcMemOnDimmThermal,             ///< 4E .. Before On DIMM Thermal
-  TpProcMemDmi,                       ///< 4F .. Before DMI
-  TpProcMemEnd,                       ///< 50 .. End of memory code
-
-  // CPU test points
-  TpProcCpuEntryDmi,                  ///< 51 .. Entry point CreateDmiRecords
-  TpProcCpuEntryPstate,               ///< 52 .. Entry point GenerateSsdt
-  TpProcCpuEntryPstateLeveling,       ///< 53 .. Entry point PStateLeveling
-  TpProcCpuEntryPstateGather,         ///< 54 .. Entry point PStateGatherData
-  TpProcCpuEntryWhea,                 ///< 55 .. Entry point CreateAcpiWhea
-  TpProcCpuEntrySrat,                 ///< 56 .. Entry point CreateAcpiSrat
-  TpProcCpuEntrySlit,                 ///< 57 .. Entry point CreateAcpiSlit
-  TpProcCpuProcessRegisterTables,     ///< 58 .. Register table processing
-  TpProcCpuSetBrandID,                ///< 59 .. Set brand ID
-  TpProcCpuLocalApicInit,             ///< 5A .. Initialize local APIC
-  TpProcCpuLoadUcode,                 ///< 5B .. Load microcode patch
-  TpProcCpuBeforePMFeatureInit,       ///< 5C .. BeforePM feature dispatch point
-  TpProcCpuPowerMgmtInit,             ///< 5D .. Power Management table processing
-  TpProcCpuEarlyFeatureInit,          ///< 5E .. Early feature dispatch point
-  TpProcCpuCoreLeveling,              ///< 5F .. Core Leveling
-  TpProcCpuApMtrrSync,                ///< 60 .. AP MTRR sync up
-  TpProcCpuPostFeatureInit,           ///< 61 .. POST feature dispatch point
-  TpProcCpuBeforeRelinquishAPsFeatureInit = 0x63, ///< 63 .. Before Relinquishing control of APs feature dispatch point
-  TpProcCpuBeforeAllocateWheaBuffer,  ///< 64 .. Before the WHEA init code calls out to allocate a buffer
-  TpProcCpuAfterAllocateWheaBuffer,   ///< 65 .. After the WHEA init code calls out to allocate a buffer
-  TpProcCpuBeforeAllocateSratBuffer,  ///< 66 .. Before the SRAT init code calls out to allocate a buffer
-  TpProcCpuAfterAllocateSratBuffer,   ///< 67 .. After the SRAT init code calls out to allocate a buffer
-  TpProcCpuBeforeLocateSsdtBuffer,    ///< 68 .. Before the P-state init code calls out to locate a buffer
-  TpProcCpuAfterLocateSsdtBuffer,     ///< 69 .. After the P-state init code calls out to locate a buffer
-  TpProcCpuBeforeAllocateSsdtBuffer,  ///< 6A .. Before the P-state init code calls out to allocate a buffer
-  TpProcCpuAfterAllocateSsdtBuffer,   ///< 6B .. After the P-state init code calls out to allocate a buffer
-  TpProcCpuEntryCrat,                 ///< 6C .. Entry point CreateAcpiCrat
-  TpProcCpuEntryCdit,                 ///< 6D .. Entry point CreateAcpiCdit
-  TpProcCpuEntryScs,                  ///< 6E .. Entry point InitializeScsFeature
-
-  // Topology test points
-  TpProcTopologyEntry = 0x71,         ///< 71 .. Topology Init begin
-  TpProcTopologyDone = 0x7C,          ///< 7C .. Topology Init complete
-
-  // Extended memory test point
-  TpProcMemSendMRS2 = 0x80,           ///< 80 .. Sending MRS2
-  TpProcMemSendMRS3,                  ///< 81 .. Sedding MRS3
-  TpProcMemSendMRS1,                  ///< 82 .. Sending MRS1
-  TpProcMemSendMRS0,                  ///< 83 .. Sending MRS0
-  TpProcMemContinPatternGenRead,      ///< 84 .. Continuous Pattern Read
-  TpProcMemContinPatternGenWrite,     ///< 85 .. Continuous Pattern Write
-  TpProcMem2dRdDqsTraining,           ///< 86 .. Mem: 2d RdDqs Training begin
-  TpProcMemBefore2dTrainExtVrefChange,///< 87 .. Mem: Before optional callout to platform BIOS to change External Vref during 2d Training
-  TpProcMemAfter2dTrainExtVrefChange, ///< 88 .. Mem: After optional callout to platform BIOS to change External Vref during 2d Training
-  TpProcMemConfigureDCTForGeneral,    ///< 89 .. Configure DCT For General use begin
-  TpProcMemProcConfigureDCTForTraining,    ///< 8A .. Configure DCT For training begin
-  TpProcMemConfigureDCTNonExplicitSeq,///< 8B .. Configure DCT For Non-Explicit
-  TpProcMemSynchronizeChannels,       ///< 8C .. Configure to Sync channels
-  TpProcMemC6StorageAllocation,       ///< 8D .. Allocate C6 Storage
-
-  // Gnb Earlier init
-  TpGnbEarlierPcieConfigurationInit = 0x90,           ///< 90 .. GNB earlier PCIE configuration init
-  TpGnbEarlierInterface = 0x91,                       ///< 91 .. GNB earlier interface
-  // Gnb Early init
-  TpGnbEarlyInterface = 0x92,                         ///< 92 .. GNB early interface
-  TpGnbPcieConfigurationMap,                          ///< 93 .. GNB early PCIE configuration map
-  TpGnbPcieEarlyInterface,                            ///< 94 .. GNB early PCIE interface
-  //Gnb post init
-  TpGnbPciePostEarlyInterface = 0x95,                 ///< 95 .. GNB post early interface
-  TpGnbGfxConfigPostInterface,                        ///< 96 .. GNB post GFX config interface
-  TpGnbGfxPostInterface,                              ///< 97 .. GNB post GFX interface
-  // Gnb post after DRAM init
-  TpGnbPostInterface = 0x98,                          ///< 98 .. GNB post after DRAM interface
-  TpGnbPciePostInterface,                             ///< 99 .. GNB post after DRAM PCIE interface
-  // Gnb Env init
-  TpGnbEnvInterface,                                  ///< 9A .. GNB Env Nb interface
-  TpGnbPcieEnvInterface,                              ///< 9B .. GNB Env PCIE interface
-  TpGnbGfxConfigEnvInterface,                         ///< 9C .. GNB Env GFX Config interface
-  TpGnbGfxEnvInterface,                               ///< 9D .. GNB Env GFX interface
-  // Gnb Mid init
-  TpGnbGfxConfigMidInterface = 0xA1,                  ///< A1 .. GNB Mid GFX config interface
-  TpGnbGfxMidInterface,                               ///< A2 .. GNB Mid GFX interface
-  TpPcieMidInterface,                                 ///< A3 .. GNB Mid PCIE interface
-  TpGnbMidInterface,                                  ///< A4 .. GNB Mid interface
-  TpNbLclkFeature,                                    ///< A5 .. GNB Mid Nclk feature
-  TpPciePowerGateFeature,                             ///< A6 .. GNB Mid pcie power gate feature
-  TpGnbPcieMaxPayloadInterface,                       ///< A7 .. GNB Mid pcie max payload interface
-  TpGnbPcieClkPmInterface,                            ///< A8 .. GNB Mid pcie clk pm port interface
-  TpGnbPcieAspmInterface,                             ///< A9 .. GNB Mid pcie ASPM interface
-  TpGnbNbIoapicInterface,                             ///< AA .. GNB Mid IOAPIC interface
-  // Gnb Late init
-  TpGnbPcieAlibFeature = 0xAB,                        ///< AB .. GNB Late pcie ALIB feature
-  TpGnbIommuIvrsTable,                                ///< AC .. GNB Late pcie IOMMU
-  // Gnb S3 Save
-  TpGnbGfxInitSview = 0xAD,                           ///< AD .. GNB S3SAVE GFX sview init
-  TpGnbAlibDispatchFeature = 0xAE,                    ///< AE .. GNB ALIB dispatch feature
-  EndGnbTestPoints = 0xAF,                            ///< AF End of TP range for GNB
-
-  StartFchTestPoints = 0xB0,          ///< B0 Entry used for range testing for @b FCH related TPs
-  TpFchInitResetDispatching,          ///< B1 .. FCH InitReset dispatch point
-  TpFchGppBeforePortTraining,         ///< B2 .. Before FCH GPP port training
-  TpFchGppGen1PortPolling,            ///< B3 .. FCH GPP port polling with GEN1 speed
-  TpFchGppGen2PortPolling,            ///< B4 .. FCH GPP port polling with GEN2 speed
-  TpFchGppAfterPortTraining,          ///< B5 .. After FCH GPP port training
-  TpFchInitEnvDispatching,            ///< B6 .. FCH InitEnv dispatch point
-  TpFchInitMidDispatching,            ///< B7 .. FCH InitMid dispatch point
-  TpFchInitLateDispatching,           ///< B8 .. FCH InitLate dispatch point
-  TpFchGppHotPlugging,                ///< B9 .. FCH GPP hot plug event
-  TpFchGppHotUnplugging,              ///< BA .. AFCH GPP hot unplug event
-  TpFchInitS3EarlyDispatching,        ///< BB .. FCH InitS3Early dispatch point
-  TpFchInitS3LateDispatching,         ///< BC .. FCH InitS3Late dispatch point
-  EndFchTestPoints,                   ///< BF End of TP range for FCH
-
-  // Interface test points
-  TpIfAmdInitResetEntry = 0xC0,       ///< C0 .. Entry to AmdInitReset
-  TpIfAmdInitResetExit,               ///< C1 .. Exiting from AmdInitReset
-  TpIfAmdInitRecoveryEntry,           ///< C2 .. Entry to AmdInitRecovery
-  TpIfAmdInitRecoveryExit,            ///< C3 .. Exiting from AmdInitRecovery
-  TpIfAmdInitEarlyEntry,              ///< C4 .. Entry to AmdInitEarly
-  TpIfAmdInitEarlyExit,               ///< C5 .. Exiting from AmdInitEarly
-  TpIfAmdInitPostEntry,               ///< C6 .. Entry to AmdInitPost
-  TpIfAmdInitPostExit,                ///< C7 .. Exiting from AmdInitPost
-  TpIfAmdInitEnvEntry,                ///< C8 .. Entry to AmdInitEnv
-  TpIfAmdInitEnvExit,                 ///< C9 .. Exiting from AmdInitEnv
-  TpIfAmdInitMidEntry,                ///< CA .. Entry to AmdInitMid
-  TpIfAmdInitMidExit,                 ///< CB .. Exiting from AmdInitMid
-  TpIfAmdInitLateEntry,               ///< CC .. Entry to AmdInitLate
-  TpIfAmdInitLateExit,                ///< CD .. Exiting from AmdInitLate
-  TpIfAmdS3SaveEntry,                 ///< CE .. Entry to AmdS3Save
-  TpIfAmdS3SaveExit,                  ///< CF .. Exiting from AmdS3Save
-  TpIfAmdInitResumeEntry,             ///< D0 .. Entry to AmdInitResume
-  TpIfAmdInitResumeExit,              ///< D1 .. Exiting from AmdInitResume
-  TpIfAmdS3LateRestoreEntry,          ///< D2 .. Entry to AmdS3LateRestore
-  TpIfAmdS3LateRestoreExit,           ///< D3 .. Exiting from AmdS3LateRestore
-  TpIfAmdLateRunApTaskEntry,          ///< D4 .. Entry to AmdS3LateRestore
-  TpIfAmdLateRunApTaskExit,           ///< D5 .. Exiting from AmdS3LateRestore
-  TpIfAmdReadEventLogEntry,           ///< D6 .. Entry to AmdReadEventLog
-  TpIfAmdReadEventLogExit,            ///< D7 .. Exiting from AmdReadEventLog
-  TpIfAmdGetApicIdEntry,              ///< D8 .. Entry to AmdGetApicId
-  TpIfAmdGetApicIdExit,               ///< D9 .. Exiting from AmdGetApicId
-  TpIfAmdGetPciAddressEntry,          ///< DA .. Entry to AmdGetPciAddress
-  TpIfAmdGetPciAddressExit,           ///< DB .. Exiting from AmdGetPciAddress
-  TpIfAmdIdentifyCoreEntry,           ///< DC .. Entry to AmdIdentifyCore
-  TpIfAmdIdentifyCoreExit,            ///< DD .. Exiting from AmdIdentifyCore
-  TpIfBeforeRunApFromIds,             ///< DE .. After IDS calls out to run code on an AP
-  TpIfAfterRunApFromIds,              ///< DF .. After IDS calls out to run code on an AP
-  TpIfBeforeGetIdsData,               ///< E0 .. Before IDS calls out to get IDS data
-  TpIfAfterGetIdsData,                ///< E1 .. After IDS calls out to get IDS data
-  TpIfBeforeAllocateHeapBuffer,       ///< E2 .. Before the heap manager calls out to allocate a buffer
-  TpIfAfterAllocateHeapBuffer,        ///< E3 .. After the heap manager calls out to allocate a buffer
-  TpIfBeforeDeallocateHeapBuffer,     ///< E4 .. Before the heap manager calls out to deallocate a buffer
-  TpIfAfterDeallocateHeapBuffer,      ///< E5 .. After the heap manager calls out to deallocate a buffer
-  TpIfBeforeLocateHeapBuffer,         ///< E6 .. Before the heap manager calls out to locate a buffer
-  TpIfAfterLocateHeapBuffer,          ///< E7 .. After the heap manager calls out to locate a buffer
-  TpIfBeforeRunApFromAllAps,          ///< E8 .. Before the BSP calls out to run code on an AP
-  TpIfAfterRunApFromAllAps,           ///< E9 .. After the BSP calls out to run code on an AP
-  TpIfBeforeRunApFromAllCore0s,       ///< EA .. Before the BSP calls out to run code on an AP
-  TpIfAfterRunApFromAllCore0s,        ///< EB .. After the BSP calls out to run code on an AP
-  TpIfBeforeAllocateS3SaveBuffer,     ///< EC .. Before the S3 save code calls out to allocate a buffer
-  TpIfAfterAllocateS3SaveBuffer,      ///< ED .. After the S3 save code calls out to allocate a buffer
-  TpIfBeforeAllocateMemoryS3SaveBuffer,  ///< EE .. Before the memory S3 save code calls out to allocate a buffer
-  TpIfAfterAllocateMemoryS3SaveBuffer,   ///< EF .. After the memory S3 save code calls out to allocate a buffer
-  TpIfBeforeLocateS3PciBuffer,        ///< F0 .. Before the memory code calls out to locate a buffer
-  TpIfAfterLocateS3PciBuffer,         ///< F1 .. After the memory code calls out to locate a buffer
-  TpIfBeforeLocateS3CPciBuffer,       ///< F2 .. Before the memory code calls out to locate a buffer
-  TpIfAfterLocateS3CPciBuffer,        ///< F3 .. After the memory code calls out to locate a buffer
-  TpIfBeforeLocateS3MsrBuffer,        ///< F4 .. Before the memory code calls out to locate a buffer
-  TpIfAfterLocateS3MsrBuffer,         ///< F5 .. After the memory code calls out to locate a buffer
-  TpIfBeforeLocateS3CMsrBuffer,       ///< F6 .. Before the memory code calls out to locate a buffer
-  TpIfAfterLocateS3CMsrBuffer,        ///< F7 .. After the memory code calls out to locate a buffer
-  TpReadyToBoot,                      ///< F8 .. Ready to boot event
-  // PMU test points
-  TpProcMemPmuFailed,                 ///< F9 .. Failed PMU training.
-
-  EndAgesaTps = 0xFF,                 ///< Last defined AGESA TP
-} AGESA_TP;
-
-///Ids Feat description
-typedef enum {
-  IDS_FEAT_UCODE_UPDATE = 0x0000,   ///< Feat for Ucode Update
-  IDS_FEAT_TARGET_PSTATE,           ///< Feat for Target Pstate
-  IDS_FEAT_POSTPSTATE,              ///< Feat for Post Pstate
-  IDS_FEAT_ECC_CTRL,                ///< Feat for Ecc Control
-  IDS_FEAT_ECC_SYMBOL_SIZE,         ///< Feat for Ecc symbol size
-  IDS_FEAT_DCT_ALLMEMCLK,           ///< Feat for all memory clock
-  IDS_FEAT_DCT_GANGMODE,            ///< Feat for Dct gang mode
-  IDS_FEAT_DCT_BURSTLENGTH,         ///< Feat for dct burst length
-  IDS_FEAT_DCT_POWERDOWN,           ///< Feat for dct power down
-  IDS_FEAT_DCT_DLLSHUTDOWN,         ///< Feat for dct dll shut down
-  IDS_FEAT_HDTOUT,                  ///< Feat for hdt out
-  IDS_FEAT_GNB_PLATFORMCFG,         ///< Feat for override GNB platform config
-  IDS_FEAT_CPB_CTRL,                ///< Feat for Config the Core peformance boost feature
-  IDS_FEAT_HTC_CTRL,                ///< Feat for Hardware Thermal Control
-  IDS_FEAT_MEMORY_MAPPING,          ///< Feat for Memory Mapping
-  IDS_FEAT_POWER_POLICY,            ///< Feat for Power Policy
-  IDS_FEAT_NV_TO_CMOS,              ///< Feat for Save BSP Nv to CMOS
-  IDS_FEAT_COMMON,                  ///< Common Feat
-  IDS_FEAT_END = 0xFF               ///< End of Common feat
-} IDS_FEAT;
-
-///Ids IDT table function ID
-typedef enum {
-  IDS_IDT_REPLACE_IDTR_FOR_BSC = 0x0000,   ///< Function ID for saving IDTR for BSC
-  IDS_IDT_RESTORE_IDTR_FOR_BSC,            ///< Function ID for restoring IDTR for BSC
-  IDS_IDT_UPDATE_EXCEPTION_VECTOR_FOR_AP,  ///< Function ID for updating exception vector
-} IDS_IDT_FUNC_ID;
-
-typedef IDS_STATUS IDS_COMMON_FUNC (
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader,
-  IN       IDS_NV_ITEM *IdsNvPtr
-  );
-
-typedef IDS_COMMON_FUNC *PIDS_COMMON_FUNC;
-
-/// Data Structure of IDS Feature block
-typedef  struct _IDS_FAMILY_FEAT_STRUCT {
-  IDS_FEAT  IdsFeat;      ///< Ids Feat ID
-  BOOLEAN IsBsp;          ///< swith for Bsp check
-  AGESA_IDS_OPTION IdsOption;   ///< IDS option
-  UINT64 CpuFamily;       ///<
-  PIDS_COMMON_FUNC  pf_idsoption;   ///<pointer to function
-} IDS_FAMILY_FEAT_STRUCT;
-
-
-/// Data Structure of IDS option
-typedef  struct _IDS_OPTION_STRUCT {
-  AGESA_IDS_OPTION idsoption;       ///< IDS option
-  PIDS_COMMON_FUNC  pf_idsoption;   ///<pointer to function
-} IDS_OPTION_STRUCT;
-
-/// Data Structure of IDS option table
-typedef struct _IDS_OPTION_STRUCT_TBL {
-  UINT8 version;      ///<Version of IDS option table
-  UINT16 size;        ///<Size of IDS option table
-  CONST IDS_OPTION_STRUCT  *pIdsOptionStruct; ///<pointer to array of  structure
-} IDS_OPTION_STRUCT_TBL;
-
-#define IDS_NV_TO_CMOS_LEN_BYTE   1
-#define IDS_NV_TO_CMOS_LEN_WORD   2
-#define IDS_NV_TO_CMOS_LEN_END   0xFF
-#define IDS_NV_TO_CMOS_ID_END   0xFFFF
-
-/// Data struct of set/get NV to/from CMOS
-typedef struct _IDS_NV_TO_CMOS {
-  UINT8 Length;       ///< Length of NV
-  UINT16 IDS_NV_ID; ///< IDS id
-} IDS_NV_TO_CMOS;
-
-IDS_STATUS
-AmdIdsCtrlDispatcher (
-  IN       AGESA_IDS_OPTION IdsOption,
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-IdsOptionCallout (
-  IN       UINTN                CallOutId,
-  IN OUT   VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsHdtOutInit (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsHdtOutExit (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsHdtOutS3Exit (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsHdtOutS3ApExit (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-AmdIdsDebugPrint (
-  IN       UINT64 Flag,
-  IN       const CHAR8 *Format,
-  IN       ...
-  );
-
-VOID
-AmdIdsDebugPrintTopology (
-  IN      CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsDebugPrintCpu (
-  IN      CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsDebugPrintMem (
-  IN      CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsDebugPrintGnb (
-  IN      CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsDebugPrintAll (
-  IN      CHAR8 *Format,
-  IN      ...
-  );
-
-VOID
-AmdIdsHdtOutBufferFlush (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-IdsMemTimeOut (
-  IN OUT   VOID *DataPtr
-  );
-
-VOID
-IdsAgesaTestPoint (
-  IN      AGESA_TP TestPoint,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-/**
- *  IDS Backend Function for ASSERT
- *
- * Halt execution with stop code display.  Stop Code is displayed on port 80, with rotation so that
- * it is visible on 8, 16, or 32 bit display.  The stop code is alternated with 0xDEAD on the display,
- * to help distinguish the stop code from a post code loop.
- * Additional features may be available if using simulation.
- *
- * @param[in]     FileCode    File code(define in FILECODE.h) mix with assert Line num.
- *
- * @retval         TRUE     No error
-**/
-BOOLEAN
-IdsAssert (
-  IN      UINT32 FileCode
-  );
-
-/**
- * The engine code for ASSERT MACRO
- *
- * Halt execution with stop code display.  Stop Code is displayed on port 80, with rotation so that
- * it is visible on 8, 16, or 32 bit display.  The stop code is alternated with 0xDEAD on the display,
- * to help distinguish the stop code from a post code loop.
- * Additional features may be available if using simulation.
- *
- * @param[in]     FileCode    File code(define in FILECODE.h) mix with assert Line num.
- *
- */
-BOOLEAN
-IdsErrorStop (
-  IN      UINT32 FileCode
-  );
-
-VOID
-IdsDelay (
-  IN      VOID
-  );
-
-BOOLEAN
-AmdHeapIntactCheck (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-IdsCarCorruptionCheck (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-IDS_STATUS
-IdsExceptionTrap (
-  IN       IDS_IDT_FUNC_ID IdsIdtFuncId,
-  IN       VOID *DataPtr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-IdsPerfTimestamp (
-  IN       UINT32 LineInFile,
-  IN       UINT32 Description,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-IdsPerfAnalyseTimestamp (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-
-#if IDSOPT_IDS_ENABLED == FALSE
-  #undef IEM_SKIP_CODE
-  #undef IEM_INSERT_CODE
-#endif
-#ifndef IEM_SKIP_CODE
-  #define IEM_SKIP_CODE(L)
-#endif
-#ifndef IEM_INSERT_CODE
-  #define IEM_INSERT_CODE(L, Fn, Parm)
-#endif
-
-#endif // _IDS_H_

pi/amd/00730F01/Include/IdsPerf.h

diff --git a/pi/amd/00730F01/Include/IdsPerf.h b/pi/amd/00730F01/Include/IdsPerf.h
deleted file mode 100644
index 2067ebb..0000000
--- a/pi/amd/00730F01/Include/IdsPerf.h
+++ /dev/null
@@ -1,141 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Integrated Debug Routines for performance analysis
- *
- * Contains AMD AGESA debug macros and functions for performance analysis
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  IDS
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _IDS_PERFORMANCE_DATA_POINT
-
-  #define _IDS_PERFORMANCE_DATA_POINT
-  #define IDS_PERF_VERSION 0x00010000ul  //version number 0.1.0.0
-/// Time points performance function used
-  typedef enum {
-    TP_BEGINPROCAMDINITEARLY             = 0x100,  ///< BeginProcAmdInitEarly
-    TP_ENDPROCAMDINITEARLY               = 0x101,  ///< EndProcAmdInitEarly
-    TP_BEGINAMDTOPOINITIALIZE            = 0x102,  ///< BeginAmdTopoInitialize
-    TP_ENDAMDTOPOINITIALIZE              = 0x103,  ///< EndAmdTopoInitialize
-    TP_BEGINGNBINITATEARLIER             = 0x104,  ///< BeginGnbInitAtEarlier
-    TP_ENDGNBINITATEARLIER               = 0x105,  ///< EndGnbInitAtEarlier
-    TP_BEGINAMDCPUEARLY                  = 0x106,  ///< BeginAmdCpuEarly
-    TP_ENDAMDCPUEARLY                    = 0x107,  ///< EndAmdCpuEarly
-    TP_BEGINGNBINITATEARLY               = 0x108,  ///< BeginGnbInitAtEarly
-    TP_ENDGNBINITATEARLY                 = 0x109,  ///< EndGnbInitAtEarly
-    TP_BEGINPROCAMDINITENV               = 0x10A,  ///< BeginProcAmdInitEnv
-    TP_ENDPROCAMDINITENV                 = 0x10B,  ///< EndProcAmdInitEnv
-    TP_BEGININITENV                      = 0x10C,  ///< BeginInitEnv
-    TP_ENDINITENV                        = 0x10D,  ///< EndInitEnv
-    TP_BEGINGNBINITATENV                 = 0x10E,  ///< BeginGnbInitAtEnv
-    TP_ENDGNBINITATENV                   = 0x10F,  ///< EndGnbInitAtEnv
-    TP_BEGINPROCAMDINITLATE              = 0x110,  ///< BeginProcAmdInitLate
-    TP_ENDPROCAMDINITLATE                = 0x111,  ///< EndProcAmdInitLate
-    TP_BEGINCREATSYSTEMTABLE             = 0x112,  ///< BeginCreatSystemTable
-    TP_ENDCREATSYSTEMTABLE               = 0x113,  ///< EndCreatSystemTable
-    TP_BEGINDISPATCHCPUFEATURESLATE      = 0x114,  ///< BeginDispatchCpuFeaturesLate
-    TP_ENDDISPATCHCPUFEATURESLATE        = 0x115,  ///< EndDispatchCpuFeaturesLate
-    TP_BEGINAMDCPULATE                   = 0x116,  ///< BeginAmdCpuLate
-    TP_ENDAMDCPULATE                     = 0x117,  ///< EndAmdCpuLate
-    TP_BEGINGNBINITATLATE                = 0x118,  ///< BeginGnbInitAtLate
-    TP_ENDGNBINITATLATE                  = 0x119,  ///< EndGnbInitAtLate
-    TP_BEGINPROCAMDINITMID               = 0x11A,  ///< BeginProcAmdInitMid
-    TP_ENDPROCAMDINITMID                 = 0x11B,  ///< EndProcAmdInitMid
-    TP_BEGININITMID                      = 0x11E,  ///< BeginInitMid
-    TP_ENDINITMID                        = 0x11F,  ///< EndInitMid
-    TP_BEGINGNBINITATMID                 = 0x120,  ///< BeginGnbInitAtMid
-    TP_ENDGNBINITATMID                   = 0x121,  ///< EndGnbInitAtMid
-    TP_BEGINPROCAMDINITPOST              = 0x122,  ///< BeginProcAmdInitPost
-    TP_ENDPROCAMDINITPOST                = 0x123,  ///< EndProcAmdInitPost
-    TP_BEGINGNBINITATPOST                = 0x124,  ///< BeginGnbInitAtPost
-    TP_ENDGNBINITATPOST                  = 0x125,  ///< EndGnbInitAtPost
-    TP_BEGINAMDMEMAUTO                   = 0x126,  ///< BeginAmdMemAuto
-    TP_ENDAMDMEMAUTO                     = 0x127,  ///< EndAmdMemAuto
-    TP_BEGINAMDCPUPOST                   = 0x128,  ///< BeginAmdCpuPost
-    TP_ENDAMDCPUPOST                     = 0x129,  ///< EndAmdCpuPost
-    TP_BEGINGNBINITATPOSTAFTERDRAM       = 0x12A,  ///< BeginGnbInitAtPostAfterDram
-    TP_ENDGNBINITATPOSTAFTERDRAM         = 0x12B,  ///< EndGnbInitAtPostAfterDram
-    TP_BEGINPROCAMDINITRESET             = 0x12C,  ///< BeginProcAmdInitReset
-    TP_ENDPROCAMDINITRESET               = 0x12D,  ///< EndProcAmdInitReset
-    TP_BEGININITRESET                    = 0x12E,  ///< BeginInitReset
-    TP_ENDINITRESET                      = 0x12F,  ///< EndInitReset
-    TP_BEGINHTINITRESET                  = 0x130,  ///< BeginHtInitReset
-    TP_ENDHTINITRESET                    = 0x131,  ///< EndHtInitReset
-    TP_BEGINPROCAMDINITRESUME            = 0x132,  ///< BeginProcAmdInitResume
-    TP_ENDPROCAMDINITRESUME              = 0x133,  ///< EndProcAmdInitResume
-    TP_BEGINAMDMEMS3RESUME               = 0x134,  ///< BeginAmdMemS3Resume
-    TP_ENDAMDMEMS3RESUME                 = 0x135,  ///< EndAmdMemS3Resume
-    TP_BEGINDISPATCHCPUFEATURESS3RESUME  = 0x136,  ///< BeginDispatchCpuFeaturesS3Resume
-    TP_ENDDISPATCHCPUFEATURESS3RESUME    = 0x137,  ///< EndDispatchCpuFeaturesS3Resume
-    TP_BEGINSETCORESTSCFREQSEL           = 0x138,  ///< BeginSetCoresTscFreqSel
-    TP_ENDSETCORESTSCFREQSEL             = 0x139,  ///< EndSetCoresTscFreqSel
-    TP_BEGINMEMFMCTMEMCLR_INIT           = 0x13A,  ///< BeginMemFMctMemClr_Init
-    TP_ENDNMEMFMCTMEMCLR_INIT            = 0x13B,  ///< EndnMemFMctMemClr_Init
-    TP_BEGINMEMBEFOREMEMDATAINIT         = 0x13C,  ///< BeginMemBeforeMemDataInit
-    TP_ENDMEMBEFOREMEMDATAINIT           = 0x13D,  ///< EndMemBeforeMemDataInit
-    TP_BEGINPROCAMDMEMAUTO               = 0x13E,  ///< BeginProcAmdMemAuto
-    TP_ENDPROCAMDMEMAUTO                 = 0x13F,  ///< EndProcAmdMemAuto
-    TP_BEGINMEMMFLOWC32                  = 0x140,  ///< BeginMemMFlowC32
-    TP_ENDMEMMFLOWC32                    = 0x141,  ///< EndMemMFlowC32
-    TP_BEGINMEMINITIALIZEMCT             = 0x142,  ///< BeginMemInitializeMCT
-    TP_ENDMEMINITIALIZEMCT               = 0x143,  ///< EndMemInitializeMCT
-    TP_BEGINMEMSYSTEMMEMORYMAPPING       = 0x144,  ///< BeginMemSystemMemoryMapping
-    TP_ENDMEMSYSTEMMEMORYMAPPING         = 0x145,  ///< EndMemSystemMemoryMapping
-    TP_BEGINMEMDRAMTRAINING              = 0x146,  ///< BeginMemDramTraining
-    TP_ENDMEMDRAMTRAINING                = 0x147,  ///< EndMemDramTraining
-    TP_BEGINMEMOTHERTIMING               = 0x148,  ///< BeginMemOtherTiming
-    TP_ENDMEMOTHERTIMING                 = 0x149,  ///< EndMemOtherTiming
-    TP_BEGINMEMUMAMEMTYPING              = 0x14A,  ///< BeginMemUMAMemTyping
-    TP_ENDMEMUMAMEMTYPING                = 0x14B,  ///< EndMemUMAMemTyping
-    TP_BEGINMEMMEMCLR                    = 0x14C,  ///< BeginMemMemClr
-    TP_ENDMEMMEMCLR                      = 0x14D,  ///< EndMemMemClr
-    TP_BEGINMEMMFLOWTN                   = 0x14E,  ///< BeginMemMFlowTN
-    TP_ENDMEMMFLOWTN                     = 0x14F,  ///< EndMemMFlowTN
-    TP_BEGINAGESAHOOKBEFOREDRAMINIT      = 0x150,  ///< BeginAgesaHookBeforeDramInit
-    TP_ENDAGESAHOOKBEFOREDRAMINIT        = 0x151,  ///< EndAgesaHookBeforeDramInit
-    TP_BEGINPROCMEMDRAMTRAINING          = 0x152,  ///< BeginProcMemDramTraining
-    TP_ENDPROCMEMDRAMTRAINING            = 0x153,  ///< EndProcMemDramTraining
-    TP_BEGINGNBINITATS3SAVE              = 0x154,  ///< BeginGnbInitAtS3Save
-    TP_ENDGNBINITATS3SAVE                = 0x155,  ///< EndGnbInitAtS3Save
-    TP_BEGINGNBLOADSCSDATA               = 0x156,  ///< BeginGnbLoadScsData
-    TP_ENDGNBLOADSCSDATA                 = 0x157,  ///< EndGnbLoadScsData
-    TP_BEGINGNBPCIETRAINING              = 0x158,  ///< BeginGnbPcieTraining
-    TP_ENDGNBPCIETRAINING                = 0x159,  ///< EndGnbPcieTraining
-    TP_BEGINDISPATCHCPUFEATURESS3SAVE    = 0x15A,  ///< BeginDispatchCpuFeaturesS3Save
-    TP_ENDDISPATCHCPUFEATURESS3SAVE      = 0x15B,  ///< EndDispatchCpuFeaturesS3Save
-    IDS_TP_END                                     ///< End of IDS TP list
-  } IDS_PERF_DATA;
-#endif

pi/amd/00730F01/Include/Options.h

diff --git a/pi/amd/00730F01/Include/Options.h b/pi/amd/00730F01/Include/Options.h
deleted file mode 100644
index 94a180c..0000000
--- a/pi/amd/00730F01/Include/Options.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AGESA options structures
- *
- * Contains options control structures for the AGESA build options
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Core
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _OPTIONS_H_
-#define _OPTIONS_H_
-
-/**
- * Provide topology limits for loops and runtime, based on supported families.
- */
-typedef struct {
-  UINT32              PlatformNumberOfSockets;                  ///< The limit to the number of processors based on
-                                                                ///< supported families and other build options.
-  UINT32              PlatformNumberOfModules;                  ///< The limit to the number of modules in a processor, based
-                                                                ///< on supported families.
-} OPTIONS_CONFIG_TOPOLOGY;
-
-/**
- * Dispatch Table.
- *
- * The push high dispatcher uses this table to find what entries are currently in the build image.
- */
-typedef struct {
-  UINT32              FunctionId;                   ///< The function id specified.
-  IMAGE_ENTRY         EntryPoint;                   ///< The corresponding entry point to call.
-} DISPATCH_TABLE;
-
-
-#endif // _OPTIONS_H_

pi/amd/00730F01/Include/Topology.h

diff --git a/pi/amd/00730F01/Include/Topology.h b/pi/amd/00730F01/Include/Topology.h
deleted file mode 100644
index 3c50e34..0000000
--- a/pi/amd/00730F01/Include/Topology.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Topology interface definitions.
- *
- * Contains AMD AGESA internal interface for topology related data which
- * is consumed by code other than Topology Services init.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Core
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _TOPOLOGY_H_
-#define _TOPOLOGY_H_
-
-// Defines for limiting data structure maximum allocation and limit checking.
-#define MAX_NODES 1
-#define MAX_SOCKETS MAX_NODES
-#define MAX_DIES 1
-
-/**
- * Socket and Module to Node Map Item.
- * Provide the Node Id and core id range for each module in each processor.
- */
-typedef struct {
-  UINT8 Node;                 ///< The module's Node id.
-  UINT8 LowCore;              ///< The lowest processor core id for this module.
-  UINT8 HighCore;             ///< The highest processor core id for this module.
-  UINT8 EnabledComputeUnits;  ///< The value of Enabled for this processor module.
-  UINT8 DualCoreComputeUnits; ///< The value of DualCore for this processor module.
-  UINT8 TripleCoreComputeUnits;///< The value of TripleCore for this processor module.
-  UINT8 QuadCoreComputeUnits; ///< The value of QuadCore for this processor module.
-} SOCKET_DIE_TO_NODE_ITEM;
-
-/**
- * Socket and Module to Node Map.
- * This type is a pointer to the actual map, it can be used for a struct item or
- * for typecasting a heap buffer pointer.
- */
-typedef SOCKET_DIE_TO_NODE_ITEM (*SOCKET_DIE_TO_NODE_MAP)[MAX_SOCKETS][MAX_DIES];
-
-/**
- * Node id to Socket Die Map Item.
- */
-typedef struct {
-  UINT8 Socket;             ///< socket of the processor containing the Node.
-  UINT8 Die;                ///< the module in the processor which is Node.
-} NODE_TO_SOCKET_DIE_ITEM;
-
-/**
- * Node id to Socket Die Map.
- */
-typedef NODE_TO_SOCKET_DIE_ITEM (*NODE_TO_SOCKET_DIE_MAP)[MAX_NODES];
-
-#endif  // _TOPOLOGY_H_

pi/amd/00730F01/Porting.h

diff --git a/pi/amd/00730F01/Porting.h b/pi/amd/00730F01/Porting.h
deleted file mode 100644
index eb2f049..0000000
--- a/pi/amd/00730F01/Porting.h
+++ /dev/null
@@ -1,307 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Describes compiler dependencies - to support several compile time environments
- *
- * Contains compiler environment porting descriptions
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Includes
- * @e \$Revision: 44324 $   @e \$Date: 2010-12-22 03:16:51 -0600 (Wed, 22 Dec 2010) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _PORTING_H_
-#define _PORTING_H_
-
-#if defined (_MSC_VER)
-  #include <intrin.h>
-  void _disable (void);
-  void _enable (void);
-  #pragma warning(disable: 4103 4001 4733)
-  #pragma intrinsic (_disable, _enable)
-  #pragma warning(push)
-  // -----------------------------------------------------------------------
-  //   Define a code_seg MACRO
-  //
-  #define MAKE_AS_A_STRING(arg) #arg
-
-  #define CODE_GROUP(arg) __pragma (code_seg (MAKE_AS_A_STRING (.t##arg)))
-
-  #define RDATA_GROUP(arg) __pragma (const_seg (MAKE_AS_A_STRING (.d##arg)))
-  #define FUNC_ATTRIBUTE(arg) __declspec(arg)
-  //#include <intrin.h>  // MS has built-in functions
-
-  #if _MSC_VER < 900
-    // -----------------------------------------------------------------------
-    //    Assume MSVC 1.52C (16-bit)
-    //
-    //    NOTE: When using MSVC 1.52C use the following command line:
-    //
-    //       CL.EXE /G3 /AL /O1i /Fa <FILENAME.C>
-    //
-    //    This will produce 32-bit code in USE16 segment that is optimized for code
-    //    size.
-    typedef void          VOID;
-
-    // Create the universal 32, 16, and 8-bit data types
-    typedef unsigned long   UINTN;
-    typedef          long   INT32;
-    typedef unsigned long   UINT32;
-    typedef          int    INT16;
-    typedef unsigned int    UINT16;
-    typedef          char   INT8;
-    typedef unsigned char   UINT8;
-    typedef          char   CHAR8;
-    typedef unsigned short  CHAR16;
-
-    /// struct for 16-bit environment handling of 64-bit value
-    typedef struct _UINT64 {
-      IN OUT  UINT32 lo;      ///< lower 32-bits of 64-bit value
-      IN OUT  UINT32 hi;      ///< highest 32-bits of 64-bit value
-    } UINT64;
-
-    // Create the Boolean type
-    #define TRUE  1
-    #define FALSE 0
-    typedef unsigned char BOOLEAN;
-
-    #define CONST const
-    #define STATIC static
-    #define VOLATILE volatile
-    #define CALLCONV __pascal
-    #define ROMDATA __based( __segname( "_CODE" ) )
-    #define _16BYTE_ALIGN   __declspec(align(16))
-    #define _8BYTE_ALIGN   __declspec(align(8))
-    #define _4BYTE_ALIGN   __declspec(align(4))
-    #define _2BYTE_ALIGN   __declspec(align(2))
-    #define _1BYTE_ALIGN   __declspec(align(1))
-
-    // Force tight packing of structures
-    // Note: Entire AGESA (Project / Solution) will be using pragma pack 1
-    #pragma warning( disable : 4103 ) // Disable '#pragma pack' in .h warning
-    #pragma pack(1)
-
-    //   Disable WORD->BYTE automatic conversion warnings.  Example:
-    //   BYTE LocalByte;
-    //   void MyFunc(BYTE val);
-    //
-    //   MyFunc(LocalByte*2+1); // Warning, automatic conversion
-    //
-    //   The problem is any time math is performed on a BYTE, it is converted to a
-    //   WORD by MSVC 1.52c, and then when it is converted back to a BYTE, a warning
-    //   is generated.  Disable warning C4761
-    #pragma warning( disable : 4761 )
-
-  #else
-    // -----------------------------------------------------------------------
-    //   Assume a 32-bit MSVC++
-    //
-    // Disable the following warnings:
-    // 4100 - 'identifier' : unreferenced formal parameter
-    // 4276 - 'function' : no prototype provided; assumed no parameters
-    // 4214 - non standard extension used : bit field types other than int
-    // 4001 - nonstandard extension 'single line comment' was used
-    // 4142 - benign redefinition of type for following declaration
-    //      - typedef char    INT8
-    #if defined (_M_IX86)
-      #pragma warning (disable: 4100 4276 4214 4001 4142 4305 4306)
-
-      #ifndef VOID
-        typedef void VOID;
-      #endif
-    // Create the universal 32, 16, and 8-bit data types
-      #ifndef UINTN
-        typedef unsigned __w64 UINTN;
-      #endif
-      typedef          __int64 INT64;
-      typedef unsigned __int64 UINT64;
-      typedef          int   INT32;
-      typedef unsigned int   UINT32;
-      typedef          short INT16;
-      typedef unsigned short UINT16;
-      typedef          char  INT8;
-      typedef unsigned char  UINT8;
-      typedef          char  CHAR8;
-      typedef unsigned short CHAR16;
-
-    // Create the Boolean type
-      #ifndef TRUE
-        #define TRUE  1
-      #endif
-      #ifndef FALSE
-        #define FALSE 0
-      #endif
-      typedef unsigned char BOOLEAN;
-
-      // Force tight packing of structures
-      // Note: Entire AGESA (Project / Solution) will be using pragma pack 1
-      #pragma pack(1)
-
-      #define CONST const
-      #define STATIC static
-      #define VOLATILE volatile
-      #define CALLCONV
-      #define ROMDATA
-      #define _16BYTE_ALIGN   __declspec(align(64))
-      #define _8BYTE_ALIGN   __declspec(align(8))
-      #define _4BYTE_ALIGN   __declspec(align(4))
-      #define _2BYTE_ALIGN   __declspec(align(2))
-      #define _1BYTE_ALIGN   __declspec(align(1))
-      //Support for variadic macros was introduced in Visual C++ 2005.
-      #if _MSC_VER >= 1400
-        #define VA_ARGS_SUPPORTED
-      #endif
-      // 64 bit of compiler
-    #else
-      #pragma warning (disable: 4100 4276 4214 4001 4142 4305 4306 4366)
-
-      #ifndef VOID
-        typedef void VOID;
-      #endif
-      // Create the universal 32, 16, and 8-bit data types
-      #ifndef UINTN
-        typedef unsigned __int64 UINTN;
-      #endif
-      typedef          __int64 INT64;
-      typedef unsigned __int64 UINT64;
-      typedef          int   INT32;
-      typedef unsigned int   UINT32;
-      typedef          short INT16;
-      typedef unsigned short UINT16;
-      typedef          char  INT8;
-      typedef unsigned char  UINT8;
-      typedef          char  CHAR8;
-      typedef unsigned short CHAR16;
-
-      // Create the Boolean type
-      #ifndef TRUE
-        #define TRUE  1
-      #endif
-      #ifndef FALSE
-        #define FALSE 0
-      #endif
-      typedef unsigned char BOOLEAN;
-      #define _16BYTE_ALIGN   __declspec(align(16))
-      #define _8BYTE_ALIGN   __declspec(align(8))
-      #define _4BYTE_ALIGN   __declspec(align(4))
-      #define _2BYTE_ALIGN   __declspec(align(2))
-      #define _1BYTE_ALIGN   __declspec(align(1))
-      // Force tight packing of structures
-      // Note: Entire AGESA (Project / Solution) will be using pragma pack 1
-      #pragma pack(1)
-
-      #define CONST const
-      #define STATIC static
-      #define VOLATILE volatile
-      #define CALLCONV
-      #define ROMDATA
-    #endif
-  #endif
-  // -----------------------------------------------------------------------
-  // End of MS compiler versions
-
-#elif defined __GNUC__
-
-  #define IN
-  #define OUT
-  #define STATIC static
-  #define VOLATILE volatile
-  #define TRUE 1
-  #define FALSE 0
-//  #undef CONST
-  #define CONST const
-  #define ROMDATA
-  #define CALLCONV
-  #define _16BYTE_ALIGN __attribute__ ((aligned (16)))
-  #define _8BYTE_ALIGN __attribute__ ((aligned (8)))
-  #define _4BYTE_ALIGN __attribute__ ((aligned (4)))
-  #define _2BYTE_ALIGN __attribute__ ((aligned (2)))
-  #define _1BYTE_ALIGN __attribute__ ((aligned (1)))
-
-  typedef unsigned char  BOOLEAN;
-  typedef   signed char  INT8;
-  typedef   signed short INT16;
-  typedef   signed long  INT32;
-  typedef   signed long  long INT64;
-  typedef          char  CHAR8;
-  typedef unsigned char  UINT8;
-  typedef unsigned short UINT16;
-  typedef unsigned long  UINT32;
-  typedef unsigned long  UINTN;
-  typedef unsigned long  long UINT64;
-  typedef void VOID;
-  //typedef unsigned long  size_t;
-  //typedef unsigned int   uintptr_t;
-  //#include <intrin.h>                   // MingW-w64 library header
-
-#define CODE_GROUP(arg)
-#define RDATA_GROUP(arg)
-
-  //#include <intrin.h>                   // MingW-w64 library header
-  //#include <MyIntrinsics.h>               // AGESA temp file for GCC until support is added to MinGW
-
-#pragma pack(1)
-
-#define FUNC_ATTRIBUTE(arg) __attribute__((arg))
-#define MAKE_AS_A_STRING(arg) #arg
-#include <stddef.h>
-#include "gcc-intrin.h"
-
-#include <assert.h>
-#include <config.h>
-#include <console/console.h>
-#include <console/loglevel.h>
-
-#ifndef NULL
-  #define NULL              ((void *)0)
-#endif
-
-#else
-  // -----------------------------------------------------------------------
-  // Unknown or unsupported compiler
-  //
-  #error "Unknown compiler in use"
-#endif
-
-// -----------------------------------------------------------------------
-// Common definitions for all compilers
-//
-
-//Support forward reference construct
-#define AGESA_FORWARD_DECLARATION(x) typedef struct _##x x
-
-// The following are use in conformance to the UEFI style guide
-#define IN
-#define OUT
-
-#endif // _PORTING_H_

pi/amd/00730F01/Proc/CPU/Family/cpuFamRegisters.h

diff --git a/pi/amd/00730F01/Proc/CPU/Family/cpuFamRegisters.h b/pi/amd/00730F01/Proc/CPU/Family/cpuFamRegisters.h
deleted file mode 100644
index c92c57a..0000000
--- a/pi/amd/00730F01/Proc/CPU/Family/cpuFamRegisters.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Register Table Related Functions
- *
- * Contains the definition of the CPU CPUID MSRs and PCI registers with BKDG recommended values
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _CPU_FAM_REGISTERS_H_
-#define _CPU_FAM_REGISTERS_H_
-
-/*
- *--------------------------------------------------------------
- *
- *                      M O D U L E S    U S E D
- *
- *---------------------------------------------------------------
- */
-
-/*
- *--------------------------------------------------------------
- *
- *                      D E F I N I T I O N S  /  M A C R O S
- *
- *---------------------------------------------------------------
- */
-
-// This define should be equal to the total number of families
-// in the cpuFamily enum.
-#define MAX_CPU_FAMILIES    64
-#define MAX_CPU_REVISIONS   63    // Max Cpu Revisions Per Family
-
-// CPU_LOGICAL_ID.Family equates
-// Family 15h equates
-#define AMD_FAMILY_15_TN  0x0000000000000200ull
-#define AMD_FAMILY_TN     (AMD_FAMILY_15_TN)
-#define AMD_FAMILY_15_RL  (AMD_FAMILY_15_TN)
-#define AMD_FAMILY_RL     (AMD_FAMILY_15_TN)
-#define AMD_FAMILY_15_KV  0x0000000000000400ull
-#define AMD_FAMILY_KV     (AMD_FAMILY_15_KV)
-#define AMD_FAMILY_15_CZ  0x0000000000000800ull
-#define AMD_FAMILY_CZ     (AMD_FAMILY_15_CZ)
-#define AMD_FAMILY_15     (AMD_FAMILY_15_TN | AMD_FAMILY_15_KV | AMD_FAMILY_15_CZ)
-
-// Family 16h equates
-#define AMD_FAMILY_16_KB  0x0000000000010000ull
-#define AMD_FAMILY_KB     AMD_FAMILY_16_KB
-#define AMD_FAMILY_16_ML  0x0000000000020000ull
-#define AMD_FAMILY_ML     AMD_FAMILY_16_ML
-#define AMD_FAMILY_16     (AMD_FAMILY_KB | AMD_FAMILY_ML)
-
-// Family Unknown
-#define AMD_FAMILY_UNKNOWN 0x8000000000000000ull
-
-
-// Family 15h CPU_LOGICAL_ID.Revision equates
-// -------------------------------------
-
-  // Family 15h TN steppings
-#define AMD_F15_TN_A0    0x0000000000000100ull
-#define AMD_F15_TN_A1    0x0000000000000200ull
-#define AMD_F15_RL_A1    0x0000000000000400ull
-  // Family 15h KV steppings
-#define AMD_F15_KV_A0    0x0000000000100000ull
-#define AMD_F15_KV_A1    0x0000000000200000ull
-  // Family 15h CZ steppings
-#define AMD_F15_CZ_A0    0x0000000001000000ull
-  // Family 15h Unknown stepping
-#define AMD_F15_UNKNOWN  0x8000000000000000ull
-
-#define AMD_F15_RL_Ax    (AMD_F15_RL_A1)
-#define AMD_F15_RL_ALL   (AMD_F15_RL_Ax)
-
-#define AMD_F15_TN_Ax    (AMD_F15_TN_A0 | AMD_F15_TN_A1)
-#define AMD_F15_TN_GT_A0 (AMD_F15_TN_ALL & ~AMD_F15_TN_A0)
-#define AMD_F15_TN_ONLY  (AMD_F15_TN_Ax)
-#define AMD_F15_TN_ALL   (AMD_F15_TN_Ax | AMD_F15_RL_ALL)
-
-#define AMD_F15_KV_Ax    (AMD_F15_KV_A0 | AMD_F15_KV_A1)
-#define AMD_F15_KV_ALL   (AMD_F15_KV_Ax)
-
-#define AMD_F15_CZ_Ax    (AMD_F15_CZ_A0)
-#define AMD_F15_CZ_ALL   (AMD_F15_CZ_Ax)
-
-#define AMD_F15_ALL      (AMD_F15_TN_ALL | AMD_F15_KV_ALL | AMD_F15_CZ_ALL)
-
-// Family 16h CPU_LOGICAL_ID.Revision equates
-// -------------------------------------
-
-  // Family 16h KB steppings
-#define AMD_F16_KB_A0    0x0000000000000001ull
-#define AMD_F16_KB_A1    0x0000000000000002ull
-  // Family 16h ML steppings
-#define AMD_F16_ML_A0    0x0000000000000100ull
-#define AMD_F16_ML_A1    0x0000000000000200ull
-  // Family 16h Unknown stepping
-#define AMD_F16_UNKNOWN  0x8000000000000000ull
-
-#define AMD_F16_KB_Ax    (AMD_F16_KB_A0 | AMD_F16_KB_A1)
-#define AMD_F16_KB_ALL   (AMD_F16_KB_Ax)
-
-#define AMD_F16_ML_Ax    (AMD_F16_ML_A0 | AMD_F16_ML_A1)
-#define AMD_F16_ML_ALL   (AMD_F16_ML_Ax)
-#define AMD_F16_ML_GT_A0 (AMD_F16_ML_ALL & ~AMD_F16_ML_A0)
-
-#define AMD_F16_ALL      (AMD_F16_KB_ALL | AMD_F16_ML_ALL)
-
-#endif      // _CPU_FAM_REGISTERS_H_
-

pi/amd/00730F01/Proc/CPU/Feature/cpuCacheInit.h

diff --git a/pi/amd/00730F01/Proc/CPU/Feature/cpuCacheInit.h b/pi/amd/00730F01/Proc/CPU/Feature/cpuCacheInit.h
deleted file mode 100644
index 86b38b3..0000000
--- a/pi/amd/00730F01/Proc/CPU/Feature/cpuCacheInit.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Execution Cache Allocation functions.
- *
- * Contains code for doing Execution Cache Allocation for ROM space
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _CPU_CACHE_INIT_H_
-#define _CPU_CACHE_INIT_H_
-
-/*----------------------------------------------------------------------------
- *   Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
- *
- *----------------------------------------------------------------------------
- */
-
-/*-----------------------------------------------------------------------------
- *                         DEFINITIONS AND MACROS
- *
- *-----------------------------------------------------------------------------
- */
-#define BSP_STACK_SIZE_64K        65536
-#define BSP_STACK_SIZE_32K        32768
-
-#define CORE0_STACK_SIZE          16384
-#define CORE1_STACK_SIZE          4096
-
-#define AMD_MTRR_FIX4K_BASE     0x268
-#define AMD_MTRR_VARIABLE_BASE6 0x20C
-#define AMD_MTRR_VARIABLE_BASE7 0x20E
-
-#define WP_IO 0x0505050505050505ull
-
-#define AGESA_CACHE_SIZE_REDUCED              1
-#define AGESA_CACHE_REGIONS_ACROSS_1MB        2
-#define AGESA_CACHE_REGIONS_ACROSS_4GB        3
-#define AGESA_REGION_NOT_ALIGNED_ON_BOUNDARY  4
-#define AGESA_CACHE_START_ADDRESS_LESS_D0000  5
-#define AGESA_THREE_CACHE_REGIONS_ABOVE_1MB   6
-#define AGESA_DEALLOCATE_CACHE_REGIONS        7
-
-/*----------------------------------------------------------------------------
- *                         TYPEDEFS, STRUCTURES, ENUMS
- *
- *----------------------------------------------------------------------------
- */
-/// Cache-As-Ram Executable region allocation modes
-typedef enum {
-  LimitedByL2Size,                            ///< Execution space must be allocated from L2
-  InfiniteExe,                                ///< Family can support unlimited Execution space
-  MaxCarExeMode                               ///< Used as limit or bounds check
-} CAR_EXE_MODE;
-
-/// Cache Information
-typedef struct {
-  IN       UINT32  BspStackSize;              ///< Stack size of BSP
-  IN       UINT32  Core0StackSize;            ///< Stack size of primary cores
-  IN       UINT32  Core1StackSize;            ///< Stack size of all non primary cores
-  IN       UINT32  MemTrainingBufferSize;     ///< Memory training buffer size
-  IN       UINT32  SharedMemSize;             ///< Shared memory size
-  IN       UINT64  VariableMtrrMask;          ///< Mask to apply before variable MTRR writes
-  IN       UINT64  VariableMtrrHeapMask;      ///< Mask to apply before variable MTRR writes for use in heap init.
-  IN       UINT64  HeapBaseMask;              ///< Mask used for the heap MTRR settings
-  IN CAR_EXE_MODE  CarExeType;                ///< Indicates which algorithm to use when allocating EXE space
-} CACHE_INFO;
-
-/// Merged memory region overlap type
-typedef enum {
-  EmptySet,                                   ///< One of the regions is zero length
-  Disjoint,                                   ///< The two regions do not touch
-  Adjacent,                                   ///< one region is next to the other, no gap
-  CommonEnd,                                  ///< regions overlap with a common end point
-  Extending,                                  ///< the 2nd region is extending the size of the 1st
-  Contained,                                  ///< the 2nd region is wholely contained inside the 1st
-  CommonStartContained,                       ///< the 2nd region is contained in the 1st with a common start
-  Identity,                                   ///< the two regions are the same
-  CommonStartExtending,                       ///< the 2nd region has same start as 1st, but is larger size
-  NotCombinable                               ///< the combined regions do not follow the cache block rules
-} OVERLAP_TYPE;
-
-/// Result of merging two memory regions for cache coverage
-typedef struct {
-  IN OUT  UINT32        MergedStartAddr;      ///< Start address of the merged regions
-  IN OUT  UINT32        MergedSize;           ///< Size of the merged regions
-     OUT  UINT32        OverlapAmount;        ///< the size of the overlapping section
-     OUT  OVERLAP_TYPE  OverlapType;          ///< indicates how the two regions overlap
-} MERGED_CACHE_REGION;
-
-/*----------------------------------------------------------------------------
- *                           FUNCTIONS PROTOTYPE
- *
- *----------------------------------------------------------------------------
- */
-AGESA_STATUS
-AllocateExecutionCache (
-  IN AMD_CONFIG_PARAMS *StdHeader,
-  IN EXECUTION_CACHE_REGION *AmdExeAddrMapPtr
-  );
-
-#endif  // _CPU_CACHE_INIT_H_
-

pi/amd/00730F01/Proc/CPU/cpuApicUtilities.h

diff --git a/pi/amd/00730F01/Proc/CPU/cpuApicUtilities.h b/pi/amd/00730F01/Proc/CPU/cpuApicUtilities.h
deleted file mode 100644
index 536391b..0000000
--- a/pi/amd/00730F01/Proc/CPU/cpuApicUtilities.h
+++ /dev/null
@@ -1,302 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU APIC related utility functions and structures
- *
- * Contains code that provides mechanism to invoke and control APIC communication.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _CPU_APIC_UTILITIES_H_
-#define _CPU_APIC_UTILITIES_H_
-
-
-/*---------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *---------------------------------------------------------------------------------------
- */
-
-
-/*---------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *---------------------------------------------------------------------------------------
- */
-#define APIC_CTRL_DWORD 0xF
-#define APIC_CTRL_REG (APIC_CTRL_DWORD << 4)
-#define APIC_CTRL_MASK 0xFF
-#define APIC_CTRL_SHIFT 0
-
-#define APIC_DATA_DWORD 0x38
-#define APIC_DATA_REG (APIC_DATA_DWORD << 4)
-
-#define APIC_REMOTE_READ_REG 0xC0
-#define APIC_CMD_LO_REG 0x300
-#define APIC_CMD_HI_REG 0x310
-
-// APIC_CMD_LO_REG bits
-#define CMD_REG_DELIVERY_STATUS 0x1000
-#define CMD_REG_TO_READ 0x300
-#define CMD_REG_REMOTE_RD_STS_MSK 0x30000ul
-#define CMD_REG_REMOTE_DELIVERY_PENDING 0x10000ul
-#define CMD_REG_REMOTE_DELIVERY_DONE 0x20000ul
-#define CMD_REG_TO_NMI 0x400
-
-// ExeFlags bits
-#define WAIT_FOR_CORE     0x00000001ul
-#define TASK_HAS_OUTPUT   0x00000002ul
-#define RETURN_PARAMS     0x00000004ul
-#define END_AT_HLT        0x00000008ul
-#define PASS_EARLY_PARAMS 0x00000010ul
-
-// Control Byte Values
-// bit 7 indicates the type of message
-// 1 - control message
-// 0 - launch + APIC ID = message to go
-//
-#define CORE_UNAVAILABLE            0xFF
-#define CORE_IDLE                   0xFE
-#define CORE_IDLE_HLT               0xFD
-#define CORE_ACTIVE                 0xFC
-#define CORE_NEEDS_PTR              0xFB
-#define CORE_NEEDS_DATA_SIZE        0xFA
-#define CORE_STS_DATA_READY_1       0xF9
-#define CORE_STS_DATA_READY_0       0xF8
-#define CORE_DATA_FLAGS_READY       0xF7
-#define CORE_DATA_FLAGS_ACKNOWLEDGE 0xF6
-#define CORE_DATA_PTR_READY         0xF5
-
-// Macro used to determine the number of dwords to transmit to the AP as input
-#define SIZE_IN_DWORDS(sInput) ((UINT32) (((sizeof (sInput)) + 3) >> 2))
-
-// IDT table
-#define IDT_DESC_PRESENT     0x80
-
-#define IDT_DESC_TYPE_LDT    0x02
-#define IDT_DESC_TYPE_CALL16 0x04
-#define IDT_DESC_TYPE_TASK   0x05
-#define IDT_DESC_TYPE_INT16  0x06
-#define IDT_DESC_TYPE_TRAP16 0x07
-#define IDT_DESC_TYPE_CALL32 0x0C
-#define IDT_DESC_TYPE_INT32  0x0E
-#define IDT_DESC_TYPE_TRAP32 0x0F
-/*---------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *---------------------------------------------------------------------------------------
- */
-typedef VOID (*PF_AP_TASK) (AMD_CONFIG_PARAMS *StdHeader);
-typedef VOID (*PF_AP_TASK_I) (VOID *, AMD_CONFIG_PARAMS *StdHeader);
-typedef VOID (*PF_AP_TASK_C) (AMD_CONFIG_PARAMS *StdHeader, AMD_CPU_EARLY_PARAMS *);
-typedef VOID (*PF_AP_TASK_IC) (VOID *, AMD_CONFIG_PARAMS *StdHeader, AMD_CPU_EARLY_PARAMS *);
-typedef UINT32 (*PF_AP_TASK_O) (AMD_CONFIG_PARAMS *StdHeader);
-typedef UINT32 (*PF_AP_TASK_IO) (VOID *, AMD_CONFIG_PARAMS *StdHeader);
-typedef UINT32 (*PF_AP_TASK_OC) (AMD_CONFIG_PARAMS *StdHeader, AMD_CPU_EARLY_PARAMS *);
-typedef UINT32 (*PF_AP_TASK_IOC) (VOID *, AMD_CONFIG_PARAMS *StdHeader, AMD_CPU_EARLY_PARAMS *);
-
-/// Function pointer union representing the eight different
-/// types of functions that an AP can be asked to perform.
-typedef union {
-  PF_AP_TASK     PfApTask;      ///< AMD_CONFIG_PARAMS *  input with no output
-  PF_AP_TASK_I   PfApTaskI;     ///< VOID * + AMD_CONFIG_PARAMS *  input with no output
-  PF_AP_TASK_C   PfApTaskC;     ///< AMD_CONFIG_PARAMS * + AMD_CPU_EARLY_PARAMS *  input with no output
-  PF_AP_TASK_IC  PfApTaskIC;    ///< VOID * + AMD_CONFIG_PARAMS * + AMD_CPU_EARLY_PARAMS *  input with no output
-  PF_AP_TASK_O   PfApTaskO;     ///< AMD_CONFIG_PARAMS * input with UINT32 output
-  PF_AP_TASK_IO  PfApTaskIO;    ///< VOID * + AMD_CONFIG_PARAMS * input with UINT32 output
-  PF_AP_TASK_OC  PfApTaskOC;    ///< AMD_CONFIG_PARAMS * + AMD_CPU_EARLY_PARAMS * input with UINT32 output
-  PF_AP_TASK_IOC PfApTaskIOC;   ///< VOID * + AMD_CONFIG_PARAMS * + AMD_CPU_EARLY_PARAMS *  input with UINT32 output
-} AP_FUNCTION_PTR;
-
-/// Input structure for ApUtilTransmitBuffer and ApUtilReceiveBuffer
-/// containing information about the data transfer from one core
-/// to another.
-typedef struct {
-  IN OUT   UINT16 DataSizeInDwords;   ///< Size of the data to be transferred rounded up to the nearest dword
-  IN OUT   VOID   *DataPtr;           ///< Pointer to the data
-  IN       UINT32 DataTransferFlags;  ///< Flags dictating certain aspects of the data transfer
-} AP_DATA_TRANSFER;
-
-/// Input structure for ApUtilRunCodeOnSocketCore.
-typedef struct _AP_TASK {
-  AP_FUNCTION_PTR  FuncAddress;   ///< Pointer to the function that the AP will run
-  AP_DATA_TRANSFER DataTransfer;  ///< Data transfer struct for optionally passing data that the AP should use as input to the function
-  UINT32           ExeFlags;      ///< Flags dictating certain aspects of the AP tasking sequence
-} AP_TASK;
-
-/// Input structure for ApUtilWaitForCoreStatus.
-typedef struct {
-  IN       UINT8  *Status;            ///< Pointer to the 1st element of an array of values to wait for
-  IN       UINT8  NumberOfElements;   ///< Number of elements in the array
-  IN       UINT32 RetryCount;         ///< Number of remote read cycles to complete before quitting
-  IN       UINT32 WaitForStatusFlags; ///< Flags dictating certain aspects of ApUtilWaitForCoreStatus
-} AP_WAIT_FOR_STATUS;
-
-/// Interrupt Descriptor Table entry
-typedef struct {
-  UINT16 OffsetLo;     ///< Lower 16 bits of the interrupt handler routine's offset
-  UINT16 Selector;     ///< Interrupt handler routine's selector
-  UINT8  Rsvd;         ///< Reserved
-  UINT8  Flags;        ///< Interrupt flags
-  UINT16 OffsetHi;     ///< Upper 16 bits of the interrupt handler routine's offset
-  UINT32 Offset64;     ///< High order 32 bits of the handler's offset needed when in 64 bit mode
-  UINT32 Rsvd64;       ///< Reserved
-} IDT_DESCRIPTOR;
-
-/// Structure needed to load the IDTR using the lidt instruction
-typedef struct {
-  UINT16 Limit;        ///< Interrupt Descriptor Table size
-  UINT64 Base;         ///< Interrupt Descriptor Table base address
-} IDT_BASE_LIMIT;
-
-#define WAIT_STATUS_EQUALITY 0x00000001ul
-#define WAIT_INFINITELY 0
-
-// Data Transfer Flags
-#define DATA_IN_MEMORY 0x00000001ul
-
-
-/*---------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *---------------------------------------------------------------------------------------
- */
-//                   These are   P U B L I C   functions, used by AGESA
-UINT8
-ApUtilReadRemoteControlByte (
-  IN       UINT32 TargetApicId,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-ApUtilWriteControlByte (
-  IN       UINT8 Value,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-UINT32
-ApUtilReadRemoteDataDword (
-  IN       UINT32 TargetApicId,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-ApUtilWriteDataDword (
-  IN       UINT32 Value,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-UINT32
-ApUtilRunCodeOnSocketCore (
-  IN       UINT8 Socket,
-  IN       UINT8 Core,
-  IN       AP_TASK *TaskPtr,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-UINT8
-ApUtilWaitForCoreStatus (
-  IN       UINT32 TargetApicId,
-  IN       AP_WAIT_FOR_STATUS *WaitParamsPtr,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-ApEntry (
-  IN       AMD_CONFIG_PARAMS *StdHeader,
-  IN       AMD_CPU_EARLY_PARAMS *CpuEarlyParams
-  );
-
-UINT32
-ApUtilTaskOnExecutingCore (
-  IN       AP_TASK *TaskPtr,
-  IN       AMD_CONFIG_PARAMS *StdHeader,
-  IN       VOID    *ConfigParams
-  );
-
-VOID
-ApUtilTransmitBuffer (
-  IN     UINT8   Socket,
-  IN     UINT8   Core,
-  IN     AP_DATA_TRANSFER *BufferInfo,
-  IN     AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-ApUtilReceiveBuffer (
-  IN       UINT8   Socket,
-  IN       UINT8   Core,
-  IN OUT   AP_DATA_TRANSFER  *BufferInfo,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-GetLocalApicIdForCore (
-  IN       UINT32 TargetSocket,
-  IN       UINT32 TargetCore,
-     OUT   UINT32 *LocalApicId,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-ApUtilRunCodeOnAllLocalCoresAtEarly (
-  IN       AP_TASK *TaskPtr,
-  IN       AMD_CONFIG_PARAMS *StdHeader,
-  IN       AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
-  );
-
-VOID
-RelinquishControlOfAllAPs (
-  IN       AMD_CONFIG_PARAMS   *StdHeader
-  );
-
-VOID
-GetCsSelector (
-  IN       UINT16 *Selector,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-SetIdtr (
-  IN       IDT_BASE_LIMIT *IdtInfo,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-GetIdtr (
-  IN       IDT_BASE_LIMIT *IdtInfo,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-#endif  /* _CPU_APIC_UTILITIES_H_ */
-

pi/amd/00730F01/Proc/CPU/cpuEarlyInit.h

diff --git a/pi/amd/00730F01/Proc/CPU/cpuEarlyInit.h b/pi/amd/00730F01/Proc/CPU/cpuEarlyInit.h
deleted file mode 100644
index f0e49b7..0000000
--- a/pi/amd/00730F01/Proc/CPU/cpuEarlyInit.h
+++ /dev/null
@@ -1,289 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Reset API, and related functions and structures.
- *
- * Contains code that initialized the CPU after early reset.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _CPU_EARLY_INIT_H_
-#define _CPU_EARLY_INIT_H_
-
-
-/*---------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *---------------------------------------------------------------------------------------
- */
-AGESA_FORWARD_DECLARATION (CPU_CORE_LEVELING_FAMILY_SERVICES);
-
-/*---------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *---------------------------------------------------------------------------------------
- */
-//----------------------------------------------------------------------------
-//                         CPU BRAND ID TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-#define CPU_BRAND_ID_LENGTH     48            // Total number of characters supported
-#define LOW_NODE_DEVICEID       24
-#define NB_CAPABILITIES         0xE8          //Function 3 Registers
-//----------------------------------------------------------------------------
-//                         CPU MICROCODE PATCH TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/* All lengths are in bytes */
-#define MICROCODE_TRIADE_SIZE           28
-#define MICROCODE_HEADER_LENGTH         64
-
-/**
- * @page ucodeflag Microcode Patches Signature Guide
- *
- * We mark patches in the ROM with a signature so that they can be easily found
- *
- *   @anchor Microcode Patch Signature
- *   @li @e  Microcode Patch Signature @n
- *         Microcode patches are marked by adding a signature before patches in the ROM image to
- *         help identify where they are located.
- *         There're two kind of signatures. One is '$UCODE2K', it indicates there's a following patch with 2K size.
- *         The other is '$UCODE4K', it indicates there's a following patch with 4K size.
- *         If you want to know the patch level / equivalent ID, please consult the BKDG for patch header format.
- *
- *
- */
-/// Microcode patch flag for replacement
-typedef struct {
-  IN       UINT8   MicrocodePatchesFlag[8];  ///< a flag followed by microcode
-} MICROCODE_PATCHES_FLAG;
-
-#define UCODE_2K_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', '2', 'K'}};
-#define UCODE_4K_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', '4', 'K'}};
-#define UCODE_VS_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', 'V', 'S'}};
-
-/* Offsets in UCODE PATCH Header */
-/* Note: Header is 64 bytes      */
-#define DATE_CODE_OFFSET                0   // 4 bytes
-#define PATCH_ID                        4   // 4 bytes
-#define MICROCODE_PATH_DATA_ID          8   // 2 bytes
-#define MICROCODE_PATCH_DATA_LENGTH     10  // 1 byte
-#define MICROCODE_PATCH_DATA_CHECKSUM   12  // 4 bytes
-#define CHIPSET_1_DEVICE_ID             16  // 4 bytes
-#define CHIPSET_2_DEVICE_ID             20  // 4 bytes
-#define PROCESSOR_REV_ID                24  // 2 bytes
-#define CHIPSET_1_REV_ID                26  // 1 byte
-#define CHIPSET_2_REV_ID                27  // 1 byte
-
-#define MICROCODE_PATCH_2K_SIZE    2048
-#define MICROCODE_PATCH_4K_SIZE    4096
-/*---------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *---------------------------------------------------------------------------------------
- */
-//----------------------------------------------------------------------------
-//                         CPU BRAND ID TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// A structure representing BrandId[15:0] from
-/// CPUID Fn8000_0001_EBX
-typedef struct {
-  UINT8           String1:4;   ///< An index to a string value used to create the name string
-  UINT8           String2:4;   ///< An index to a string value used to create the name string
-  UINT8           Page:1;      ///< An index to the appropriate page for the String1, String2, and Model values
-  UINT8           Model:7;     ///< A field used to create the model number in the name string
-  UINT8           Socket:4;    ///< Specifies the package type
-  UINT8           Cores:4;     ///< Identifies how many physical cores are present
-} AMD_CPU_BRAND_DATA;
-
-/// A structure containing string1 and string2 values
-/// as well as information pertaining to their usage
-typedef struct {
-  IN       UINT8  Cores;              ///< Appropriate number of physical cores
-  IN       UINT8  Page;               ///< This string's page number
-  IN       UINT8  Index;              ///< String index
-  IN       UINT8  Socket;             ///< Package type information
-  IN       CONST CHAR8 *Stringstart;  ///< The literal string
-  IN       UINT8  Stringlength;       ///< Number of characters in the string
-} AMD_CPU_BRAND;
-
-/// An entire CPU brand table.
-typedef struct {
-  UINT8 NumberOfEntries;        ///< The number of entries in the table.
-  CONST AMD_CPU_BRAND  *Table;  ///< The table entries.
-} CPU_BRAND_TABLE;
-
-//----------------------------------------------------------------------------
-//                         CPU MICROCODE PATCH TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// Microcode patch field definitions
-typedef struct {
-  UINT32   DateCode;                   ///< Date of patch creation
-  UINT32   PatchID;                    ///< Patch level
-  UINT16   MicrocodePatchDataID;       ///< Internal use only
-  UINT8    MicrocodePatchDataLength;   ///< Internal use only
-  UINT8    InitializationFlag;         ///< Internal use only
-  UINT32   MicrocodePatchDataChecksum; ///< Doubleword sum of data block
-  UINT32   Chipset1DeviceID;           ///< Device ID of 1st Chipset device to match
-  UINT32   Chipset2DeviceID;           ///< Device ID of 2nd Chipset device to match
-  UINT16   ProcessorRevisionID;        ///< Equivalent ID
-  UINT8    Chipset1RevisionID;         ///< Revision level of 1st Chipset device to match
-  UINT8    Chipset2RevisionID;         ///< Revision level of 2nd Chipset device to match
-  UINT8    BiosApiRevision;            ///< BIOS INT 15 API revision required
-  UINT8    Reserved1[3];               ///< Reserved
-  UINT32   MatchRegister0;             ///< Internal use only
-  UINT32   MatchRegister1;             ///< Internal use only
-  UINT32   MatchRegister2;             ///< Internal use only
-  UINT32   MatchRegister3;             ///< Internal use only
-  UINT32   MatchRegister4;             ///< Internal use only
-  UINT32   MatchRegister5;             ///< Internal use only
-  UINT32   MatchRegister6;             ///< Internal use only
-  UINT32   MatchRegister7;             ///< Internal use only
-  UINT8    PatchDataBlock[896];        ///< Raw patch data
-  UINT8    Reserved2[896];             ///< Reserved
-  UINT8    X86CodePresent;             ///< Boolean to determine if executable code exists
-  UINT8    X86CodeEntry[191];          ///< Code to execute if X86CodePresent != 0
-} MICROCODE_PATCH;
-
-/// Two kilobyte array containing the raw
-/// microcode patch binary data
-typedef struct {
-  IN       UINT8   MicrocodePatches[MICROCODE_PATCH_2K_SIZE];  ///< 2k UINT8 elements
-} MICROCODE_PATCHES;
-
-/// Four kilobyte array containing the raw
-/// microcode patch binary data
-typedef struct {
-  IN       UINT8   MicrocodePatches[MICROCODE_PATCH_4K_SIZE];  ///< 4k UINT8 elements
-} MICROCODE_PATCHES_4K;
-
-/**
- *  Set down core register
- *
- *  @CpuServiceInstances
- *
- * @param[in]      FamilySpecificServices  The current Family Specific Services.
- * @param[in]      Socket        Socket ID.
- * @param[in]      Module        Module ID in socket.
- * @param[in]      LeveledCores  Number of core.
- * @param[in]      CoreLevelMode Core level mode.
- * @param[in]      StdHeader     Header for library and services.
- *
- * @retval         TRUE          Down Core register is updated.
- * @retval         FALSE         Down Core register is not updated.
- */
-typedef BOOLEAN (F_CPU_SET_DOWN_CORE_REGISTER) (
-  IN       CPU_CORE_LEVELING_FAMILY_SERVICES  *FamilySpecificServices,
-  IN       UINT32 *Socket,
-  IN       UINT32 *Module,
-  IN       UINT32 *LeveledCores,
-  IN       CORE_LEVELING_TYPE CoreLevelMode,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-/// Reference to a method
-typedef F_CPU_SET_DOWN_CORE_REGISTER *PF_CPU_SET_DOWN_CORE_REGISTER;
-
-/**
- * Provide the interface to the Core Leveling Family Specific Services.
- *
- * Use the methods or data in this struct to adapt the feature code to a specific cpu family or model (or stepping!).
- * Each supported Family must provide an implementation for all methods in this interface, even if the
- * implementation is a CommonReturn().
- */
-struct _CPU_CORE_LEVELING_FAMILY_SERVICES {             // See Forward Declaration above
-  UINT16          Revision;                             ///< Interface version
-  // Public Methods.
-  PF_CPU_SET_DOWN_CORE_REGISTER SetDownCoreRegister;    ///< Method: Set down core register.
-};
-
-/*---------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *---------------------------------------------------------------------------------------
- */
-
-//                   These are   P U B L I C   functions, used by IBVs
-AGESA_STATUS
-AmdCpuEarly (
-  IN       AMD_CONFIG_PARAMS      *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig
-  );
-
-//                   These are   P U B L I C   functions, used by AGESA
-AGESA_STATUS
-PmInitializationAtEarly (
-  IN       AMD_CPU_EARLY_PARAMS *CpuEarlyParams,
-  IN       AMD_CONFIG_PARAMS    *StdHeader
-  );
-
-BOOLEAN
-LoadMicrocodePatch (
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-BOOLEAN
-GetPatchEquivalentId (
-  IN OUT   UINT16             *ProcessorEquivalentId,
-  IN OUT   AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-BOOLEAN
-ValidateMicrocode (
-  IN       MICROCODE_PATCH    *MicrocodePatchPtr,
-  IN       UINT16             ProcessorEquivalentId,
-  IN OUT   AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-VOID
-GetMicrocodeVersion (
-     OUT   UINT32             *pMicrocodeVersion,
-  IN OUT   AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-VOID
-AmdCpuEarlyInitializer (
-  IN       AMD_CONFIG_PARAMS      *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig,
-  IN OUT   AMD_CPU_EARLY_PARAMS   *CpuEarlyParamsPtr
-  );
-
-VOID
-McaInitialization (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-#endif  // _CPU_EARLY_INIT_H_
-

pi/amd/00730F01/Proc/CPU/cpuLateInit.h

diff --git a/pi/amd/00730F01/Proc/CPU/cpuLateInit.h b/pi/amd/00730F01/Proc/CPU/cpuLateInit.h
deleted file mode 100644
index da698d0..0000000
--- a/pi/amd/00730F01/Proc/CPU/cpuLateInit.h
+++ /dev/null
@@ -1,1140 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Late Init API functions Prototypes.
- *
- * Contains code for doing any late CPU initialization
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _CPU_LATE_INIT_H_
-#define _CPU_LATE_INIT_H_
-
-#include "Filecode.h"
-
-//  Forward declaration needed for multi-structure mutual references.
-AGESA_FORWARD_DECLARATION (PROC_FAMILY_TABLE);
-/*----------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-//----------------------------------------------------------------------------
-//                         DMI DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-#define AP_LATE_TASK_GET_TYPE4_TYPE7 (PROC_CPU_FEATURE_CPUDMI_FILECODE)
-// SMBIOS constant definition
-#define CENTRAL_PROCESSOR       0x03
-#define EXTERNAL_CLOCK_DFLT     200
-#define EXTERNAL_CLOCK_100MHZ   100
-#define P_FAMILY_UNKNOWN        0x02
-#define P_ENGINEERING_SAMPLE    0x00
-#define P_CHARACTERISTICS       0x4
-#define CACHE_CFG_L1            0x180
-#define CACHE_CFG_L2            0x181
-#define CACHE_CFG_L3            0x182
-#define SRAM_TYPE               0x10
-#define ERR_CORRECT_TYPE        0x06
-#define CACHE_TYPE              0x05
-#define DMI_ASSOCIATIVE_OTHER   0x01
-#define DMI_ASSOCIATIVE_UNKNOWN 0x02
-#define DMI_ASSOCIATIVE_DIRECT_MAPPED   0x03
-#define DMI_ASSOCIATIVE_2_WAY   0x04
-#define DMI_ASSOCIATIVE_4_WAY   0x05
-#define DMI_ASSOCIATIVE_FULLY   0x06
-#define DMI_ASSOCIATIVE_8_WAY   0x07
-#define DMI_ASSOCIATIVE_16_WAY  0x08
-#define DMI_ASSOCIATIVE_12_WAY  0x09
-#define DMI_ASSOCIATIVE_24_WAY  0x0A
-#define DMI_ASSOCIATIVE_32_WAY  0x0B
-#define DMI_ASSOCIATIVE_48_WAY  0x0C
-#define DMI_ASSOCIATIVE_64_WAY  0x0D
-#define DMI_ASSOCIATIVE_20_WAY  0x0E
-#define SOCKET_POPULATED        0x40
-#define CPU_STATUS_UNKNOWN      0x00
-#define CPU_STATUS_ENABLED      0x01
-
-// Processor Upgrade Definition
-#define P_UPGRADE_UNKNOWN       0x02
-#define P_UPGRADE_NONE          0x06
-#define P_UPGRADE_S1GX          0x16
-#define P_UPGRADE_AM2           0x17
-#define P_UPGRADE_F1207         0x18
-#define P_UPGRADE_G34           0x1A
-#define P_UPGRADE_AM3           0x1B
-#define P_UPGRADE_C32           0x1C
-#define P_UPGRADE_FS1           0x27
-#define P_UPGRADE_FM1           0x29
-#define P_UPGRADE_FM2           0x2A
-
-//----------------------------------------------------------------------------
-//                         SRAT DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-#define NorthbridgeCapabilities 0xE8
-#define DRAMBase0 0x40
-#define MMIOBase0 0x80
-#define TOP_MEM 0xC001001Aul
-#define LOW_NODE_DEVICEID 24
-#define LOW_APICID 0
-
-
-// Miscellaneous AMD related values
-#define MAX_NUMBER_NODES  8
-
-// Flags
-#define ENABLED         1   // Bit 0
-#define DISABLED        0   // Bit 0
-#define HOTPLUGGABLE    2   // Bit 1
-
-// Affinity Entry Structures
-#define AE_APIC     0
-#define AE_MEMORY   1
-
-
-// Memory Types
-#define TYPE_MEMORY   1
-#define TYPE_RESERVED 2
-#define TYPE_ACPI     3
-#define TYPE_NVS      4
-
-//----------------------------------------------------------------------------
-//                         SLIT DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-#define AMD_ACPI_SLIT_SOCKET_NUM_LENGTH   8
-
-//----------------------------------------------------------------------------
-//                         CDIT DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-#define AMD_ACPI_CDIT_NUM_DOMAINS_LENGTH   4 // Num domains is a 4-bytes unsigned integer
-
-
-//----------------------------------------------------------------------------
-//                         P-STATE DEFINITIONS AND MACROS
-//
-//----------------------------------------------------------------------------
-//-------------------------------------
-//          ERROR Codes
-//-------------------------------------
-#define     NO_ERROR                    0x0
-#define     USER_DISABLE_ERROR          0x01            // User disabled SSDT generation
-#define     CORES_MISSMATCH_PSS_ERROR   0x02            // No PSS match
-#define     PNOW_SUPPORT_ERROR          0x04            // One of the Cores do not support PNOW!
-#define     PWR_FREQ_MATCH_ERROR        0x08            // FREQ and PWR mismatch
-#define     NO_PSS_SIZE_ERROR           0x10            // Error in PSS Size
-#define     INVALID_PSTATE_ERROR        0x20            // Invalid Max or only 1 P-State available
-#define     NO_PSS_ENTRY                0x0FFFFul
-#define     INVALID_FREQ                0x0FFFFFFFFul
-
-//-------------------------
-// Default definitions
-// AMD BKDG default values
-//-------------------------
-#define DEFAULT_ISOCH_RELIEF_TIME       IRT_80uS
-#define DEFAULT_RAMP_VOLTAGE_OFFSET     RVO_50mV
-#define DEFAULT_MAX_VOLTAGE_STEP        MVS_25mV
-#define DEFAULT_PERF_PRESENT_CAP        0           // default for Desktop
-#define DEFAULT_VOLTAGE_STABLE_TIME     (100 / 20)  // 100uS
-#define DEFAULT_PLL_LOCK_TIME           2           // 2uS
-#define DEFAULT_TRANSITION_LATENCY      100         // 100uS
-#define DEFAULT_BUS_MASTER_LATENCY      9           // 9uS
-#define DEFAULT_CPU_SCOPE_NUMBER        "0UPC"
-
-// Defines for Common ACPI
-// -----------------------------
-#define     SCOPE_OPCODE            0x10
-#define     NAME_OPCODE             0x08
-#define     METHOD_OPCODE           0x14
-#define     PACKAGE_OPCODE          0x12
-#define     BUFFER_OPCODE           0x11
-#define     BYTE_PREFIX_OPCODE      0x0A
-#define     WORD_PREFIX_OPCODE      0x0B
-#define     DWORD_PREFIX_OPCODE     0x0C
-#define     RETURN_OPCODE           0xA4
-#define     ACPI_BUFFER             0x080A0B11ul
-
-// Generic Register Descriptor (GDR) Fields
-#define     GDR_ASI_SYSTEM_IO       0x01    // Address Space ID
-#define     GDR_ASZ_BYTE_ACCESS     0x01    // Address Size
-
-// Defines for ACPI Scope Table
-// ----------------------------
-#define     SCOPE_LENGTH    (SCOPE_STRUCT_SIZE + \
-                            PCT_STRUCT_SIZE + \
-                            PSS_HEADER_STRUCT_SIZE + \
-                            PSS_BODY_STRUCT_SIZE + \
-                            PPC_HEADER_BODY_STRUCT_SIZE)
-#define     SCOPE_VALUE1    0x5C
-#define     SCOPE_VALUE2    0x2E
-#define     SCOPE_NAME__    '_'
-#define     SCOPE_NAME_P    'P'
-#define     SCOPE_NAME_R    'R'
-#define     SCOPE_NAME_S    'S'
-#define     SCOPE_NAME_B    'B'
-#define     SCOPE_NAME_C    'C'
-#define     SCOPE_NAME_U    'U'
-#define     SCOPE_NAME_0    '0'
-#define     SCOPE_NAME_1    '1'
-#define     SCOPE_NAME_2    '2'
-#define     SCOPE_NAME_3    '3'
-#define     SCOPE_NAME_A    'A'
-
-#ifdef OEM_SCOPE_NAME
-  #if (OEM_SCOPE_NAME > 'Z') || (OEM_SCOPE_NAME < 'A')
-    #error "OEM_SCOPE_NAME: it should be only one char long AND a valid letter (A~Z)"
-  #endif
-  #define     SCOPE_NAME_VALUE    OEM_SCOPE_NAME
-#else
-  #define     SCOPE_NAME_VALUE    SCOPE_NAME_C
-#endif  // OEM_SCOPE_NAME
-
-#ifdef OEM_SCOPE_NAME1
-  #if (!(((OEM_SCOPE_NAME1 >= 'A') && (OEM_SCOPE_NAME1 <= 'Z')) || \
-         ((OEM_SCOPE_NAME1 >= '0') && (OEM_SCOPE_NAME1 <= '9')) || \
-         (OEM_SCOPE_NAME1 == '_')))
-    #error "OEM_SCOPE_NAME1: it should be only one char long AND a valid letter (0~9, A~F)"
-  #endif
-  #define     SCOPE_NAME_VALUE1   OEM_SCOPE_NAME1
-#else
-  #define     SCOPE_NAME_VALUE1   SCOPE_NAME_0
-#endif  // OEM_SCOPE_NAME
-
-// Defines for PCT Control and Status Table
-// ----------------------------------------
-#define     PCT_NAME__                  '_'
-#define     PCT_NAME_P                  'P'
-#define     PCT_NAME_C                  'C'
-#define     PCT_NAME_T                  'T'
-#define     PCT_VALUE1                  0x11022C12ul
-#define     PCT_VALUE2                  0x0A14
-#define     PCT_VALUE3                  0x11
-#define     GENERIC_REG_DESCRIPTION     0x82
-#define     PCT_LENGTH                  0x0C
-#define     PCT_ADDRESS_SPACE_ID        0x7F
-#define     PCT_REGISTER_BIT_WIDTH      0x40
-#define     PCT_REGISTER_BIT_OFFSET     0x00
-#define     PCT_RESERVED                0x00
-#define     PCT_CONTROL_REG_LO          0xC0010062ul
-#define     PCT_CONTROL_REG_HI          0x00
-#define     PCT_VALUE4                  0x14110079ul
-#define     PCT_VALUE5                  0x110A
-#define     PCT_STATUS_REG_LO           0x00
-#define     PCT_STATUS_REG_HI           0x00
-#define     PCT_VALUE6                  0x0079
-
-
-// Defines for PSS Header Table
-// ----------------------------
-#define     PSS_NAME__          '_'
-#define     PSS_NAME_X          'X'
-#define     PSS_NAME_P          'P'
-#define     PSS_NAME_S          'S'
-#define     PSS_LENGTH          (sizeof pssBodyStruct + 3)
-#define     NUM_OF_ITEMS_IN_PSS 0x00
-
-
-// Defines for PSS Header Table
-// ----------------------------
-#define     PSS_PKG_LENGTH              0x20  // PSS_BODY_STRUCT_SIZE - 1
-#define     PSS_NUM_OF_ELEMENTS         0x06
-#define     PSS_FREQUENCY               0x00
-#define     PSS_POWER                   0x00
-#define     PSS_TRANSITION_LATENCY      DEFAULT_TRANSITION_LATENCY
-#define     PSS_BUS_MASTER_LATENCY      DEFAULT_BUS_MASTER_LATENCY
-#define     PSS_CONTROL                 ((DEFAULT_ISOCH_RELIEF_TIME << 30) + \
-                                         (DEFAULT_RAMP_VOLTAGE_OFFSET << 28) + \
-                                         (DEFAULT_EXT_TYPE << 27) + \
-                                         (DEFAULT_PLL_LOCK_TIME << 20) + \
-                                         (DEFAULT_MAX_VOLTAGE_STEP << 18) + \
-                                         (DEFAULT_VOLTAGE_STABLE_TIME << 11) + \
-                                         (PSS_VID << 6) + PSS_FID)
-#define     PSS_STATUS                  (DEFAULT_EXTENDED_TYPE << 11) + (PSS_VID << 6) + (PSS_FID)
-
-// Defines for XPSS Header Table
-// ----------------------------
-#define     XPSS_PKG_LENGTH             0x47  // XPSS_BODY_STRUCT_SIZE - 1
-#define     XPSS_NUM_OF_ELEMENTS        0x08
-#define     XPSS_ACPI_BUFFER            0x080A0B11ul
-
-
-// Defines for PPC Header Table
-// ----------------------------
-#define     PPC_NAME__  '_'
-#define     PPC_NAME_P  'P'
-#define     PPC_NAME_C  'C'
-#define     PPC_NAME_V  'V'
-#define     PPC_METHOD_FLAGS  0x00;
-#define     PPC_VALUE1  0x0A;
-
-// Defines for PSD Header Table
-// ----------------------------
-#define     PSD_NAME__          '_'
-#define     PSD_NAME_P          'P'
-#define     PSD_NAME_S          'S'
-#define     PSD_NAME_D          'D'
-#define     PSD_HEADER_LENGTH   (PSD_BODY_STRUCT_SIZE + 2)
-#define     PSD_VALUE1          0x01
-
-
-// Defines for PSD Header Table
-// ----------------------------
-#define     PSD_PKG_LENGTH                   (PSD_BODY_STRUCT_SIZE - 1)
-#define     NUM_OF_ENTRIES                   0x05
-#define     PSD_NUM_OF_ENTRIES               0x05
-#define     PSD_REVISION                     0x00
-#define     PSD_DEPENDENCY_DOMAIN            0x00
-#define     PSD_COORDINATION_TYPE_HW_ALL     0xFE
-#define     PSD_COORDINATION_TYPE_SW_ANY     0xFD
-#define     PSD_COORDINATION_TYPE_SW_ALL     0xFC
-#define     PSD_NUM_OF_PROCESSORS            0x01
-#define     PSD_TWO_CORES_PER_COMPUTE_UNIT   0x02
-#define     PSD_THREE_CORES_PER_COMPUTE_UNIT 0x03
-#define     PSD_FOUR_CORES_PER_COMPUTE_UNIT  0x04
-
-
-#define     CUSTOM_PSTATE_FLAG      0x55
-#define     PSTATE_FLAG_1           0x55
-#define     TARGET_PSTATE_FLAG      0xAA
-#define     PSTATE_FLAG_2           0xAA
-
-/*----------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *----------------------------------------------------------------------------------------
- */
-//----------------------------------------------------------------------------
-//                         ACPI P-States AML TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-
-//--------------------------------------------
-//              AML code definition
-//                   (Scope)
-//---------------------------------------------
-/// SCOPE
-typedef struct _SCOPE {
-  UINT8   ScopeOpcode;                  ///< Opcode
-  UINT16  ScopeLength;                  ///< Scope Length
-  UINT8   ScopeValue1;                  ///< Value1
-  UINT8   ScopeValue2;                  ///< Value2
-  UINT8   ScopeNamePt1a__;              ///< Name Pointer
-  UINT8   ScopeNamePt1a_P;              ///< Name Pointer
-  UINT8   ScopeNamePt1a_R;              ///< Name Pointer
-  UINT8   ScopeNamePt1b__;              ///< Name Pointer
-  UINT8   ScopeNamePt2a_C;              ///< Name Pointer
-  UINT8   ScopeNamePt2a_P;              ///< Name Pointer
-  UINT8   ScopeNamePt2a_U;              ///< Name Pointer
-  UINT8   ScopeNamePt2a_0;              ///< Name Pointer
-} SCOPE;
-#define     SCOPE_STRUCT_SIZE   13      // 13 Bytes
-
-//--------------------------------------------
-//              AML code definition
-//             (PCT Header and Body)
-//---------------------------------------------
-
-///Performance Control Header
-typedef struct _PCT_HEADER_BODY {
-  UINT8   NameOpcode;                   ///< Opcode
-  UINT8   PctName_a__;                  ///< String "_"
-  UINT8   PctName_a_P;                  ///< String "P"
-  UINT8   PctName_a_C;                  ///< String "C"
-  UINT8   PctName_a_T;                  ///< String "T"
-  UINT32  Value1;                       ///< Value1
-  UINT16  Value2;                       ///< Value2
-  UINT8   Value3;                       ///< Value3
-  UINT8   GenericRegDescription1;       ///< Generic Reg Description
-  UINT16  Length1;                      ///< Length1
-  UINT8   AddressSpaceId1;              ///< PCT Address Space ID
-  UINT8   RegisterBitWidth1;            ///< PCT Register Bit Width
-  UINT8   RegisterBitOffset1;           ///< PCT Register Bit Offset
-  UINT8   Reserved1;                    ///< Reserved
-  UINT32  ControlRegAddressLo;          ///< Control Register Address Low
-  UINT32  ControlRegAddressHi;          ///< Control Register Address High
-  UINT32  Value4;                       ///< Value4
-  UINT16  Value5;                       ///< Value 5
-  UINT8   GenericRegDescription2;       ///< Generic Reg Description
-  UINT16  Length2;                      ///< Length2
-  UINT8   AddressSpaceId2;              ///< PCT Address Space ID
-  UINT8   RegisterBitWidth2;            ///< PCT Register Bit Width
-  UINT8   RegisterBitOffset2;           ///< PCT Register Bit Offset
-  UINT8   Reserved2;                    ///< Reserved
-  UINT32  StatusRegAddressLo;           ///< Control Register Address Low
-  UINT32  StatusRegAddressHi;           ///< Control Register Address High
-  UINT16  Value6;                       ///< Values
-} PCT_HEADER_BODY;
-#define     PCT_STRUCT_SIZE     50      // 50 Bytes
-
-
-//--------------------------------------------
-//              AML code definition
-//                 (PSS Header)
-//--------------------------------------------
-///Performance Supported States Header
-typedef struct  _PSS_HEADER {
-  UINT8   NameOpcode;                   ///< Opcode
-  UINT8   PssName_a__;                  ///< String "_"
-  UINT8   PssName_a_P;                  ///< String "P"
-  UINT8   PssName_a_S;                  ///< String "S"
-  UINT8   PssName_b_S;                  ///< String "S"
-  UINT8   PkgOpcode;                    ///< Package Opcode
-  UINT16  PssLength;                    ///< PSS Length
-  UINT8   NumOfItemsInPss;              ///< Number of Items in PSS
-} PSS_HEADER;
-#define     PSS_HEADER_STRUCT_SIZE  9   // 9 Bytes
-
-
-//--------------------------------------------
-//              AML code definition
-//                 (PSS Body)
-//--------------------------------------------
-///Performance Supported States Body
-typedef struct _PSS_BODY {
-  UINT8   PkgOpcode;                    ///< Package Opcode
-  UINT8   PkgLength;                    ///< Package Length
-  UINT8   NumOfElements;                ///< Number of Elements
-  UINT8   DwordPrefixOpcode1;           ///< Prefix Opcode1
-  UINT32  Frequency;                    ///< Frequency
-  UINT8   DwordPrefixOpcode2;           ///< Prefix Opcode2
-  UINT32  Power;                        ///< Power
-  UINT8   DwordPrefixOpcode3;           ///< Prefix Opcode3
-  UINT32  TransitionLatency;            ///< Transition Latency
-  UINT8   DwordPrefixOpcode4;           ///< Prefix Opcode4
-  UINT32  BusMasterLatency;             ///< Bus Master Latency
-  UINT8   DwordPrefixOpcode5;           ///< Prefix Opcode5
-  UINT32  Control;                      ///< Control
-  UINT8   DwordPrefixOpcode6;           ///< Prefix Opcode6
-  UINT32  Status;                       ///< Status
-} PSS_BODY;
-#define     PSS_BODY_STRUCT_SIZE    33  // 33 Bytes
-
-
-/*--------------------------------------------
- *              AML code definition
- *                 (XPSS Header)
- *--------------------------------------------
- */
-/// Extended PSS Header
-typedef struct  _XPSS_HEADER {
-  UINT8   NameOpcode;                   ///< 08h
-  UINT8   XpssName_a_X;                 ///< String "X"
-  UINT8   XpssName_a_P;                 ///< String "P"
-  UINT8   XpssName_a_S;                 ///< String "S"
-  UINT8   XpssName_b_S;                 ///< String "S"
-  UINT8   PkgOpcode;                    ///< 12h
-  UINT16  XpssLength;                   ///< XPSS Length
-  UINT8   NumOfItemsInXpss;             ///< Number of Items in XPSS
-} XPSS_HEADER;
-#define     XPSS_HEADER_STRUCT_SIZE  9  // 9 Bytes
-
-/*--------------------------------------------
- *              AML code definition
- *                 (XPSS Body)
- *--------------------------------------------
- */
-/// Extended PSS Body
-typedef struct  _XPSS_BODY {
-  UINT8   PkgOpcode;                    ///< 12h
-  UINT8   PkgLength;                    ///< Package Length
-  UINT8   XpssValueTbd;                 ///< XPSS Value
-  UINT8   NumOfElements;                ///< Number of Elements
-  UINT8   DwordPrefixOpcode1;           ///< Prefix Opcode1
-  UINT32  Frequency;                    ///< Frequency
-  UINT8   DwordPrefixOpcode2;           ///< Prefix Opcode2
-  UINT32  Power;                        ///< Power
-  UINT8   DwordPrefixOpcode3;           ///< Prefix Opcode3
-  UINT32  TransitionLatency;            ///< Transition Latency
-  UINT8   DwordPrefixOpcode4;           ///< Prefix Opcode4
-  UINT32  BusMasterLatency;             ///< Bus Master Latency
-  UINT32  ControlBuffer;                ///< Control Buffer
-  UINT32  ControlLo;                    ///< Control Low
-  UINT32  ControlHi;                    ///< Control High
-  UINT32  StatusBuffer;                 ///< Status Buffer
-  UINT32  StatusLo;                     ///< Status Low
-  UINT32  StatusHi;                     ///< Status High
-  UINT32  ControlMaskBuffer;            ///< Control Mask Buffer
-  UINT32  ControlMaskLo;                ///< Control Mask Low
-  UINT32  ControlMaskHi;                ///< Control Mask High
-  UINT32  StatusMaskBuffer;             ///< Status Mask Buffer
-  UINT32  StatusMaskLo;                 ///< Status Mask Low
-  UINT32  StatusMaskHi;                 ///< Status Mask High
-} XPSS_BODY;
-#define     XPSS_BODY_STRUCT_SIZE    72 // 72 Bytes
-
-/*--------------------------------------------
- *              AML code definition
- *             (PPC Header and Body)
- *--------------------------------------------
- */
-/// Performance Present Capabilities Header
-typedef struct _PPC_HEADER_BODY {
-  UINT8   NameOpcode;                   ///< Name Opcode
-  UINT8   PpcName_a_P;                  ///< String "P"
-  UINT8   PpcName_b_P;                  ///< String "P"
-  UINT8   PpcName_a_C;                  ///< String "C"
-  UINT8   PpcName_a_V;                  ///< String "V"
-  UINT8   Value1;                       ///< Value
-  UINT8   DefaultPerfPresentCap;        ///< Default Perf Present Cap
-  UINT8   MethodOpcode;                 ///< Method Opcode
-  UINT8   PpcLength;                    ///< Method Length
-  UINT8   PpcName_a__;                  ///< String "_"
-  UINT8   PpcName_c_P;                  ///< String "P"
-  UINT8   PpcName_d_P;                  ///< String "P"
-  UINT8   PpcName_b_C;                  ///< String "C"
-  UINT8   MethodFlags;                  ///< Method Flags
-  UINT8   ReturnOpcode;                 ///< Return Opcoce
-  UINT8   PpcName_e_P;                  ///< String "P"
-  UINT8   PpcName_f_P;                  ///< String "P"
-  UINT8   PpcName_c_C;                  ///< String "C"
-  UINT8   PpcName_b_V;                  ///< String "V"
-
-} PPC_HEADER_BODY;
-#define     PPC_HEADER_BODY_STRUCT_SIZE     19 // 19 Bytes
-#define     PPC_METHOD_LENGTH               11 // 11 Bytes
-
-
-/*--------------------------------------------
- *              AML code definition
- *                (PSD Header)
- *--------------------------------------------
- */
-/// P-State Dependency Header
-typedef struct  _PSD_HEADER {
-  UINT8   NameOpcode;                   ///< Name Opcode
-  UINT8   PsdName_a__;                  ///< String "_"
-  UINT8   PsdName_a_P;                  ///< String "P"
-  UINT8   PsdName_a_S;                  ///< String "S"
-  UINT8   PsdName_a_D;                  ///< String "D"
-  UINT8   PkgOpcode;                    ///< Package Opcode
-  UINT8   PsdLength;                    ///< PSD Length
-  UINT8   Value1;                       ///< Value
-} PSD_HEADER;
-#define     PSD_HEADER_STRUCT_SIZE  8   // 8 Bytes
-
-/*--------------------------------------------
- *              AML code definition
- *                 (PSD Body)
- *--------------------------------------------
- */
-/// P-State Dependency Body
-typedef struct _PSD_BODY {
-  UINT8   PkgOpcode;                    ///< Package Opcode
-  UINT8   PkgLength;                    ///< Package Length
-  UINT8   NumOfEntries;                 ///< Number of Entries
-  UINT8   BytePrefixOpcode1;            ///< Prefix Opcode1 in Byte
-  UINT8   PsdNumOfEntries;              ///< PSD Number of Entries
-  UINT8   BytePrefixOpcode2;            ///< Prefix Opcode2 in Byte
-  UINT8   PsdRevision;                  ///< PSD Revision
-  UINT8   DwordPrefixOpcode1;           ///< Prefix Opcode1 in DWord
-  UINT32  DependencyDomain;             ///< Dependency Domain
-  UINT8   DwordPrefixOpcode2;           ///< Prefix Opcode2 in DWord
-  UINT32  CoordinationType;             ///< (0xFC = SW_ALL, 0xFD = SW_ANY, 0xFE = HW_ALL)
-  UINT8   DwordPrefixOpcode3;           ///< Prefix Opcode3 in DWord
-  UINT32  NumOfProcessors;              ///< Number of Processors
-} PSD_BODY;
-#define     PSD_BODY_STRUCT_SIZE    22  // 22 Bytes
-
-//----------------------------------------------------------------------------
-//                         WHEA TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-
-/// HEST MCE TABLE
-typedef struct _AMD_HEST_MCE_TABLE {
-  UINT16 TblLength;               ///< Length, in bytes, of entire AMD_HEST_MCE structure.
-  UINT32 GlobCapInitDataLSD;      ///< Holds the value that the OS will program into
-  UINT32 GlobCapInitDataMSD;      ///< the machine check global capability register(MCG_CAP).
-  UINT32 GlobCtrlInitDataLSD;     ///< Holds the value that the OS will program into
-  UINT32 GlobCtrlInitDataMSD;     ///< the machine check global control register(MCG_CTL).
-  UINT8 NumHWBanks;               ///< The number of hardware error reporting banks.
-  UINT8 Rsvd[7];                  ///< reserve 7 bytes as spec's required
-} AMD_HEST_MCE_TABLE;
-
-/// HEST CMC TABLE
-typedef struct _AMD_HEST_CMC_TABLE {
-  UINT16 TblLength;               ///< Length, in bytes, of entire AMD_HEST_CMC structure.
-  UINT8 NumHWBanks;               ///< The number of hardware error reporting banks.
-  UINT8 Rsvd[3];                  ///< reserve 3 bytes as spec's required
-} AMD_HEST_CMC_TABLE;
-
-/// HEST BANK
-typedef struct _AMD_HEST_BANK {
-  UINT8 BankNum;                  ///< Zero-based index identifies the machine check error bank.
-  UINT8 ClrStatusOnInit;          ///< Indicates if the status information in this machine check bank
-                                  ///< is to be cleared during system initialization.
-  UINT8 StatusDataFormat;         ///< Indicates the format of the data in the status register
-  UINT8 ConfWriteEn;              ///< This field indicates whether configuration parameters may be
-                                  ///< modified by the OS. If the bit for the associated parameter is
-                                  ///< set, the parameter is writable by the OS.
-  UINT32 CtrlRegMSRAddr;          ///< Address of the hardware bank's control MSR. Ignored if zero.
-
-  UINT32 CtrlInitDataLSD;         ///< This is the value the OS will program into the machine check
-  UINT32 CtrlInitDataMSD;         ///< bank's control register
-  UINT32 StatRegMSRAddr;          ///< Address of the hardware bank's MCi_STAT MSR. Ignored if zero.
-  UINT32 AddrRegMSRAddr;          ///< Address of the hardware bank's MCi_ADDR MSR. Ignored if zero.
-  UINT32 MiscRegMSRAddr;          ///< Address of the hardware bank's MCi_MISC MSR. Ignored if zero.
-} AMD_HEST_BANK;
-
-/// Initial data of AMD_HEST_BANK
-typedef struct _AMD_HEST_BANK_INIT_DATA {
-  UINT32 CtrlInitDataLSD;         ///< Initial data of CtrlInitDataLSD
-  UINT32 CtrlInitDataMSD;         ///< Initial data of CtrlInitDataMSD
-  UINT32 CtrlRegMSRAddr;          ///< Initial data of CtrlRegMSRAddr
-  UINT32 StatRegMSRAddr;          ///< Initial data of StatRegMSRAddr
-  UINT32 AddrRegMSRAddr;          ///< Initial data of AddrRegMSRAddr
-  UINT32 MiscRegMSRAddr;          ///< Initial data of MiscRegMSRAddr
-} AMD_HEST_BANK_INIT_DATA;
-
-/// MSR179 Global Machine Check Capabilities data struct
-typedef struct _MSR_MCG_CAP_STRUCT {
-  UINT64 Count:8;                 ///< Indicates the number of
-                                  ///< error-reporting banks visible to each core
-  UINT64 McgCtlP:1;               ///< 1=The machine check control registers
-  UINT64 Rsvd:55;                 ///< reserved
-} MSR_MCG_CAP_STRUCT;
-
-/// Initial data of WHEA
-typedef struct _AMD_WHEA_INIT_DATA {
-  UINT32 GlobCapInitDataLSD;      ///< Holds the value that the OS will program into the machine
-  UINT32 GlobCapInitDataMSD;      ///< Check global capability register
-  UINT32 GlobCtrlInitDataLSD;     ///< Holds the value that the OS will grogram into the machine
-  UINT32 GlobCtrlInitDataMSD;     ///< Check global control register
-  UINT8  ClrStatusOnInit;         ///< Indicates if the status information in this machine check
-                                  ///< bank is to be cleared during system initialization
-  UINT8  StatusDataFormat;        ///< Indicates the format of the data in the status register
-  UINT8  ConfWriteEn;             ///< This field indicates whether configuration parameters may be
-                                  ///< modified by the OS. If the bit for the associated parameter is
-                                  ///< set, the parameter is writable by the OS.
-  UINT8  HestBankNum;             ///< Number of HEST Bank
-  AMD_HEST_BANK_INIT_DATA *HestBankInitData;  ///< Pointer to Initial data of HEST Bank
-} AMD_WHEA_INIT_DATA;
-
-//----------------------------------------------------------------------------
-//                         DMI TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// DMI brand information
-typedef struct {
-  UINT16 String1:4;                 ///< String1
-  UINT16 String2:4;                 ///< String2
-  UINT16 Model:7;                   ///< Model
-  UINT16 Pg:1;                      ///< Page
-} BRAND_ID;
-
-/// DMI cache information
-typedef struct {
-  UINT32 L1CacheSize;               ///< L1 cache size
-  UINT8  L1CacheAssoc;              ///< L1 cache associativity
-  UINT32 L2CacheSize;               ///< L2 cache size
-  UINT8  L2CacheAssoc;              ///< L2 cache associativity
-  UINT32 L3CacheSize;               ///< L3 cache size
-  UINT8  L3CacheAssoc;              ///< L3 cache associativity
-} CPU_CACHE_INFO;
-
-/// DMI processor information
-typedef struct {
-  UINT8  ExtendedFamily;            ///< Extended Family
-  UINT8  ExtendedModel;             ///< Extended Model
-  UINT8  BaseFamily;                ///< Base Family
-  UINT8  BaseModel;                 ///< Base Model
-  UINT8  Stepping;                  ///< Stepping
-  UINT8  PackageType;               ///< PackageType
-  BRAND_ID BrandId;                 ///< BrandId which contains information about String1, String2, Model and Page
-  UINT8  TotalCoreNumber;           ///< Number of total cores
-  UINT8  EnabledCoreNumber;         ///< Number of enabled cores
-  UINT8  ProcUpgrade;               ///< ProcUpdrade
-  CPU_CACHE_INFO CacheInfo;         ///< CPU cache info
-} CPU_TYPE_INFO;
-
-/// A structure containing processor name string and
-/// the value that should be provide to DMI type 4 processor family
-typedef struct {
-  IN       CONST CHAR8 *Stringstart;  ///< The literal string
-  IN       UINT8  T4ProcFamilySetting; ///< The value set to DMI type 4 processor family
-} CPU_T4_PROC_FAMILY;
-
-/// DMI ECC information
-typedef struct {
-  BOOLEAN EccCapable;               ///< ECC Capable
-} CPU_GET_MEM_INFO;
-
-/*  Transfer vectors for DMI family specific routines   */
-typedef VOID  OPTION_DMI_GET_CPU_INFO (
-  IN OUT   CPU_TYPE_INFO *CpuInfoPtr,
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef VOID  OPTION_DMI_GET_PROC_FAMILY (
-  IN OUT   UINT8 *T4ProcFamily,
-  IN       PROC_FAMILY_TABLE *CpuDmiProcFamilyTable,
-  IN       CPU_TYPE_INFO *CpuInfo,
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef UINT8 OPTION_DMI_GET_VOLTAGE (
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef UINT16  OPTION_DMI_GET_MAX_SPEED (
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef UINT16  OPTION_DMI_GET_EXT_CLOCK (
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-typedef VOID  OPTION_DMI_GET_MEM_INFO (
-  IN OUT   CPU_GET_MEM_INFO  *CpuGetMemInfoPtr,
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-/// Brand table entry format
-typedef struct {
-  UINT8 PackageType;                ///< Package type
-  UINT8 PgOfBrandId;                ///< Page
-  UINT8 NumberOfCores;              ///< Number of cores
-  UINT8 String1ofBrandId;           ///< String1
-  UINT8 ValueSetToDmiTable;         ///< The value which will should be set to DMI table
-} DMI_BRAND_ENTRY;
-
-/// Family specific data table structure
-struct _PROC_FAMILY_TABLE {
-  UINT64                    ProcessorFamily;  ///< processor
-  OPTION_DMI_GET_CPU_INFO   *DmiGetCpuInfo;   ///< transfer vectors
-  OPTION_DMI_GET_PROC_FAMILY  *DmiGetT4ProcFamily;  ///< Get DMI type 4 processor family information
-  OPTION_DMI_GET_VOLTAGE    *DmiGetVoltage;   ///< vector for reading voltage
-  OPTION_DMI_GET_MAX_SPEED  *DmiGetMaxSpeed;  ///< vector for reading speed
-  OPTION_DMI_GET_EXT_CLOCK  *DmiGetExtClock;  ///< vector for reading external clock speed
-  OPTION_DMI_GET_MEM_INFO   *DmiGetMemInfo;   ///< Get memory information
-  UINT8                     LenBrandList;     ///< size of brand table
-  CONST DMI_BRAND_ENTRY     *DmiBrandList;    ///< translate brand info to DMI identifier
-};
-
-//----------------------------------------------------------------------------
-//                         SLIT TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// Format for SRAT Header
-typedef struct {
-  UINT8   Sign[4];                      ///< Signature
-  UINT32  TableLength;                  ///< Table Length
-  UINT8   Revision;                     ///< Revision
-  UINT8   Checksum;                     ///< Checksum
-  UINT8   OemId[6];                     ///< OEM ID
-  UINT8   OemTableId[8];                ///< OEM Tabled ID
-  UINT32  OemRev;                       ///< OEM Revision
-  UINT8   CreatorId[4];                 ///< Creator ID
-  UINT32  CreatorRev;                   ///< Creator Revision
-} ACPI_TABLE_HEADER;
-
-//----------------------------------------------------------------------------
-//                         SRAT TYPEDEFS, STRUCTURES, ENUMS
-//
-//----------------------------------------------------------------------------
-/// Format for SRAT Header
-typedef struct _CPU_SRAT_HEADER {
-  UINT8   Sign[4];                      ///< Signature
-  UINT32  TableLength;                  ///< Table Length
-  UINT8   Revision;                     ///< Revision
-  UINT8   Checksum;                     ///< Checksum
-  UINT8   OemId[6];                     ///< OEM ID
-  UINT8   OemTableId[8];                ///< OEM Tabled ID
-  UINT32  OemRev;                       ///< OEM Revision
-  UINT8   CreatorId[4];                 ///< Creator ID
-  UINT32  CreatorRev;                   ///< Creator Revision
-  UINT32  TableRev;                     ///< Table Revision
-  UINT8   Reserved[8];                  ///< Reserved
-} CPU_SRAT_HEADER;
-
-
-/// Format for SRAT APIC Affinity Entry
-typedef struct _CPU_SRAT_APIC_ENTRY {
-  UINT8   Type;                         ///< Type
-  UINT8   Length;                       ///< Length
-  UINT8   Domain;                       ///< Domain
-  UINT8   ApicId;                       ///< Apic ID
-  UINT32  Flags;                        ///< Flags
-  UINT8   LSApicEid;                    ///< Local SAPIC EID
-  UINT8   Reserved[7];                  ///< Reserved
-} CPU_SRAT_APIC_ENTRY;
-
-
-/// Format for SRAT Memory Affinity Entry
-typedef struct _CPU_SRAT_MEMORY_ENTRY {
-  UINT8   Type;                         ///< 0: Memory affinity = 1
-  UINT8   Length;                       ///< 1: Length = 40 bytes
-  UINT32  Domain;                       ///< 2: Proximity domain
-  UINT8   Reserved1[2];                 ///< 6: Reserved
-  UINT32  BaseAddrLow;                  ///< 8:  Low 32bits address base
-  UINT32  BaseAddrHigh;                 ///< 12: High 32bits address base
-  UINT32  LengthAddrLow;                ///< 16: Low 32bits address limit
-  UINT32  LengthAddrHigh;               ///< 20: High 32bits address limit
-  UINT8   Reserved2[4];                 ///< 24: Memory Type
-  UINT32  Flags;                        ///< 28: Flags
-  UINT8   Reserved3[8];                 ///< 32: Reserved
-} CPU_SRAT_MEMORY_ENTRY;
-
-//----------------------------------------------------------------------------
-//                         CRAT TYPEDEFS, STRUCTURES, ENUMS
-//                         Component Resource Affinity Table
-//----------------------------------------------------------------------------
-/// Format for CRAT Header
-typedef struct {
-  UINT8   Sign[4];                      ///< CRAT, Signature for the Component Resource Affinity Table.
-  UINT32  Length;                       ///< Length, in bytes, of the entire CRAT
-  UINT8   Revision;                     ///< 0
-  UINT8   Checksum;                     ///< Entire table must sum to zero.
-  UINT8   OemId[6];                     ///< OEM ID
-  UINT8   OemTableId[8];                ///< OEM Tabled ID
-  UINT32  OemRev;                       ///< OEM Revision
-  UINT8   CreatorId[4];                 ///< Creator ID
-  UINT32  CreatorRev;                   ///< Creator Revision
-  UINT32  TotalEntries;                 ///< total number[n] of entries in the CRAT
-  UINT16  NumDomains;                   ///< Number of HSA proximity domains
-  UINT8   Reserved[6];                  ///< Reserved
-} CRAT_HEADER;
-
-/// Flags field of the CRAT HSA Processing Unit Affinity Structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 HotPluggable:1;             ///< Hot Pluggable
-  UINT32 CpuPresent:1;               ///< Cpu Present
-  UINT32 GpuPresent:1;               ///< Gpu Present
-  UINT32 IommuPresent:1;             ///< IOMMU Present
-  UINT32 :27;                        ///< Reserved
-} CRAT_HSA_PROCESSING_UNIT_FLAG;
-
-/// CRAT HSA Processing Unit Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 0 - CRAT HSA Processing Unit Structure
-  UINT8  Length;                     ///< 40
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_HSA_PROCESSING_UNIT_FLAG Flags; ///< Flags - HSA Processing Unit Affinity Structure
-  UINT32 ProximityDomain;            ///< Integer that represents the proximity domain to which the node belongs to
-  UINT32 ProcessorIdLow;             ///< Low value  of the logical processor included in this HSA proximity domain
-  UINT16 NumCPUCores;                ///< Indicates count of CCompute execution units present in this APU node.
-  UINT16 NumSIMDCores;               ///< Indicates maximum count of HCompute SIMD cores present in this node.
-  UINT16 MaxWavesSIMD;               ///< This identifies the max. number of launched waves per SIMD.
-  UINT16 IoCount;                    ///< Number of discoverable IO Interfaces connecting this node to other components.
-  UINT16 HSACapability;              ///< Must be 0
-  UINT16 LDSSizeInKB;                ///< Size of LDS memory per SIMD Wavefront
-  UINT8  WaveFrontSize;              ///< 64, may be 32 for some FSA based architectures
-  UINT8  NumBanks;                   ///< Number of Banks or "Shader Engines", typically 1 or 2
-  UINT16 uEngineIdentifier;          ///< Identifier (Rev) of the GPU uEngine or firmware
-  UINT8  NumArrays;                  ///< Number of SIMD Arrays per Engine
-  UINT8  NumCUPerArray;              ///< Number of Compute Units (CU) per SIMD Array
-  UINT8  NumSIMDPerCU;               ///< Number of SIMD representing a Compute Unit
-  UINT8  MaxSlotsScratchCU;          ///< Max. Number of temp. memory ("scratch") wave slots
-                                     ///< available to access, may be 0 if HW has no restrictions
-  UINT8  Reserved1[4];               ///< Reserved
-} CRAT_HSA_PROCESSING_UNIT;
-
-/// Flags field of the CRAT Memory Affinity Structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 HotPluggable:1;             ///< Hot Pluggable
-  UINT32 NonVolatile:1;              ///< If set, the memory region represents Non-Volatile memory
-  UINT32 :29;                        ///< Reserved
-} CRAT_MEMORY_FLAG;
-
-/// CRAT Memory Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 1 - CRAT Memory Affinity Structure
-  UINT8  Length;                     ///< 40
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_MEMORY_FLAG Flags;            ///< Flags - Memory Affinity Structure. Indicates whether the region of memory is enabled and can be hot plugged
-  UINT32 ProximityDomain;            ///< Integer that represents the proximity domain to which the node belongs to
-  UINT32 BaseAddressLow;             ///< Low 32Bits of the Base Address of the memory range
-  UINT32 BaseAddressHigh;            ///< High 32Bits of the Base Address of the memory range
-  UINT32 LengthLow;                  ///< Low 32Bits of the length of the memory range
-  UINT32 LengthHigh;                 ///< High 32Bits of the length of the memory range
-  UINT32 Width;                      ///< Memory width - Specifies the number of parallel bits of the memory interface
-  UINT8  Reserved1[8];               ///< Reserved
-} CRAT_MEMORY;
-
-/// Flags field of the CRAT Cache Affinity structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 DataCache:1;                ///< 1 if cache includes data
-  UINT32 InstructionCache:1;         ///< 1 if cache includes instructions
-  UINT32 CpuCache:1;                 ///< 1 if cache is part of CPU functionality
-  UINT32 SimdCache:1;                ///< 1 if cache is part of SIMD functionality
-  UINT32 :27;                        ///< Reserved
-} CRAT_CACHE_FLAG;
-
-/// CRAT Cache Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 2 - CRAT Cache Affinity Structure
-  UINT8  Length;                     ///< 64
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_CACHE_FLAG Flags;             ///< Flags - Cache Affinity Structure. Indicates whether the region of cache is enabled
-  UINT32 ProcessorIdLow;             ///< Low value of a logical processor which includes this component
-  UINT8  SiblingMap[32];             ///< Bitmask of  Processor Id sharing this component. 1 bit per logical processor
-  UINT32 CacheSize;                  ///< Cache size in KB
-  UINT8  CacheLevel;                 ///< Integer representing level: 1, 2, 3, 4, etc.
-  UINT8  LinesPerTag;                ///< Cache Lines per tag
-  UINT16 CacheLineSize;              ///< Cache line size in bytes
-  UINT8  Associativity;              ///< Cache associativity
-                                     ///< The associativity fields are encoded as follows:
-                                     ///< 00h: Reserved.
-                                     ///< 01h: Direct mapped.
-                                     ///< 02h-FEh: Associativity. (e.g., 04h = 4-way associative.)
-                                     ///< FFh: Fully associative
-  UINT8  CacheProperties;            ///< Cache Properties bits [2:0] represent Inclusive/Exclusive property encoded.
-                                     ///< 0: Cache is strictly exclusive to lower level caches.
-                                     ///< 1: Cache is mostly exclusive to lower level caches.
-                                     ///< 2: Cache is strictly inclusive to lower level caches.
-                                     ///< 3: Cache is mostly inclusive to lower level caches.
-                                     ///< 4: Cache is a "constant cache" (= explicit update)
-                                     ///< 5: Cache is a "specialty cache" (e.g. Texture cache)
-                                     ///< 6-7: Reserved
-                                     ///< CacheProperties bits [7:3] are reserved
-  UINT16 CacheLatency;               ///< Cost of time to access cache described in nanoseconds.
-  UINT8  Reserved1[8];               ///< Reserved
-} CRAT_CACHE;
-
-/// Flags field of the CRAT TLB Affinity structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 DataTLB:1;                  ///< 1 if TLB includes translation information for data.
-  UINT32 InstructionTLB:1;           ///< 1 if TLB includes translation information for instructions.
-  UINT32 CpuTLB:1;                   ///< 1 if TLB is part of CPU functionality
-  UINT32 SimdTLB:1;                  ///< 1 if TLB is part of SIMD functionality
-  UINT32 TLB4KBase256:1;             ///< 1 if value in table is factored by 256 to get number of 4K entries
-  UINT32 :1;                         ///< Reserved
-  UINT32 TLB2MBase256:1;             ///< 1 if value in table is factored by 256 to get number of 2M entries
-  UINT32 :1;                         ///< Reserved
-  UINT32 TLB1GBase256:1;             ///< 1 if value in table is factored by 256 to get number of 1G entries
-  UINT32 :22;                        ///< Reserved
-} CRAT_TLB_FLAG;
-
-/// CRAT TLB Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 3 - CRAT TLB  Affinity Structure
-  UINT8  Length;                     ///< 64
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_TLB_FLAG Flags;               ///< Flags - TLB Affinity Structure. Indicates whether the TLB is enabled and defined
-  UINT32 ProcessorIdLow;             ///< Low value of a logical processor which includes this component.
-  UINT8  SiblingMap[32];             ///< Bitmask of Processor Id sharing this component. 1 bit per logical processor
-  UINT32 TlbLevel;                   ///< Integer representing level: 1, 2, 3, 4, etc.
-  UINT8  DataTlbAssociativity2MB;    ///< Data TLB associativity for 2MB pages
-                                     ///< The associativity fields are encoded as follows:
-                                     ///< 00h: Reserved.
-                                     ///< 01h: Direct mapped.
-                                     ///< 02h-FEh: Associativity. (e.g., 04h = 4-way associative.)
-                                     ///< FFh: Fully associative.
-  UINT8  DataTlbSize2MB;             ///< Data TLB number of entries for 2MB.
-  UINT8  InstructionTlbAssociativity2MB;      ///< Instruction TLB associativity for 2MB pages
-                                     ///< The associativity fields are encoded as follows:
-                                     ///< 00h: Reserved.
-                                     ///< 01h: Direct mapped.
-                                     ///< 02h-FEh: Associativity. (e.g., 04h = 4-way associative.)
-                                     ///< FFh: Fully associative.
-  UINT8  InstructionTlbSize2MB;      ///< Instruction TLB number of entries for 2MB pages.
-  UINT8  DataTlbAssociativity4K;     ///< Data TLB Associativity for 4KB pages
-  UINT8  DataTlbSize4K;              ///< Data TLB number of entries for 4KB pages
-  UINT8  InstructionTlbAssociativity4K;       ///< Instruction TLB Associativity for 4KB pages
-  UINT8  InstructionTlbSize4K;       ///< Instruction TLB number of entries for 4KB pages
-  UINT8  DataTlbAssociativity1G;     ///< Data TLB Associativity for 1GB pages
-  UINT8  DataTlbSize1G;              ///< Data TLB number of entries for 1GB pages
-  UINT8  InstructionTlbAssociativity1G;       ///< Instruction TLB Associativity for 1GB pages
-  UINT8  InstructionTlbSize1G;       ///< Instruction TLB number of entries for 1GB pages
-  UINT8  Reserved1[4];               ///< Reserved
-} CRAT_TLB;
-
-/// Flags field of the CRAT FPU Affinity structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 :31;                        ///< Reserved
-} CRAT_FPU_FLAG;
-
-/// CRAT FPU Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 4 - CRAT FPU Affinity Structure
-  UINT8  Length;                     ///< 64
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_FPU_FLAG Flags;               ///< Flags - FPU Affinity Structure. Indicates whether the region of FPU affinity structure is enabled and defined
-  UINT32 ProcessorIdLow;             ///< Low value of a logical processor which includes this component.
-  UINT8  SiblingMap[32];             ///< Bitmask of  Processor Id sharing this component. 1 bit per logical processor
-  UINT32 FPUSize;                    ///< Product specific
-  UINT8  Reserved1[16];              ///< Reserved
-} CRAT_FPU;
-
-/// Flags field of the CRAT IO Affinity structure
-typedef struct {
-  UINT32 Enabled:1;                  ///< Enabled
-  UINT32 Coherency:1;                ///< If set, IO interface supports coherent transactions (natively or through protocol extensions)
-  UINT32 :30;                        ///< Reserved
-} CRAT_IO_FLAG;
-
-/// CRAT IO Affinity Structure
-typedef struct {
-  UINT8  Type;                       ///< 5 - CRAT IO Affinity Structure
-  UINT8  Length;                     ///< 64
-  UINT16 Reserved;                   ///< Reserved
-  CRAT_IO_FLAG Flags;                ///< Flags - IO Affinity Structure. Indicates whether the region of IO affinity structure is enabled and defined.
-  UINT32 ProximityDomainFrom;        ///< Integer that represents the proximity domain to which the IO Interface belongs to
-  UINT32 ProximityDomainTo;          ///< Integer that represents the other proximity domain to which the IO Interface belongs to
-  UINT8  IoType;                     ///< IO Interface type. Values defined are
-                                     ///< 0: Undefined
-                                     ///< 1: Hypertransport
-                                     ///< 2: PCI Express
-                                     ///< 3: Other (e.g. internal)
-                                     ///< 4-255: Reserved
-  UINT8  VersionMajor;               ///< Major version of the Bus interface
-  UINT16 VersionMinor;               ///< Minor version of the Bus interface ((optional)
-  UINT32 MinimumLatency;             ///< Cost of time to transfer, described in nanoseconds.
-  UINT32 MaximumLatency;             ///< Cost of time to transfer, described in nanoseconds.
-  UINT32 MinimumBandwidth;           ///< Minimum interface Bandwidth in MB/s
-  UINT32 MaximumBandwidth;           ///< Maximum interface Bandwidth in MB/s
-  UINT32 RecommendedTransferSize;    ///< Recommended transfer size to reach maximum interface bandwidth in Bytes
-  UINT8  Reserved1[24];              ///< Reserved
-} CRAT_IO;
-
-#define CRAT_MAX_LENGTH    0x800ul   ///< Reserve 2K for CRAT
-/// CRAT entry type
-typedef enum {
-  CRAT_TYPE_HSA_PROC_UNIT = 0,       ///< 0 - CRAT HSA Processing Unit Structure
-  CRAT_TYPE_MEMORY,                  ///< 1 - CRAT Memory Affinity Structure
-  CRAT_TYPE_CACHE,                   ///< 2 - CRAT Cache Affinity Structure
-  CRAT_TYPE_TLB,                     ///< 3 - CRAT TLB  Affinity Structure
-  CRAT_TYPE_FPU,                     ///< 4 - CRAT FPU Affinity Structure
-  CRAT_TYPE_IO,                      ///< 5 - CRAT IO Affinity Structure
-} CRAT_ENTRY_TYPE;
-
-/*----------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *----------------------------------------------------------------------------------------
- */
-
-AGESA_STATUS
-AmdCpuLate (
-  IN       AMD_CONFIG_PARAMS   *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig
-  );
-
-AGESA_STATUS
-CreateAcpiWhea (
-  IN OUT   AMD_CONFIG_PARAMS    *StdHeader,
-  IN OUT   VOID                 **WheaMcePtr,
-  IN OUT   VOID                 **WheaCmcPtr
-  );
-
-AGESA_STATUS
-CreateDmiRecords (
-  IN OUT   AMD_CONFIG_PARAMS    *StdHeader,
-  IN OUT   DMI_INFO             **DmiTable
-  );
-
-AGESA_STATUS
-GetType4Type7Info (
-  IN       AP_EXE_PARAMS *ApExeParams
-  );
-
-VOID
-DmiGetT4ProcFamilyFromBrandId (
-  IN OUT   UINT8 *T4ProcFamily,
-  IN       PROC_FAMILY_TABLE *CpuDmiProcFamilyTable,
-  IN       CPU_TYPE_INFO *CpuInfo,
-  IN       AMD_CONFIG_PARAMS  *StdHeader
-  );
-
-VOID
-GetNameString (
-  IN OUT   CHAR8 *String,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-BOOLEAN
-IsSourceStrContainTargetStr (
-  IN OUT   CHAR8 *SourceStr,
-  IN OUT   CONST CHAR8 *TargetStr,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-CreateAcpiCrat (
-  IN OUT   AMD_CONFIG_PARAMS     *StdHeader,
-     OUT   VOID                  **CratPtr
-  );
-
-AGESA_STATUS
-CreateAcpiCdit (
-  IN OUT   AMD_CONFIG_PARAMS      *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig,
-     OUT   VOID                   **CditPtr
-  );
-
-AGESA_STATUS
-CreateAcpiSrat (
-  IN OUT   AMD_CONFIG_PARAMS    *StdHeader,
-  IN OUT   VOID                 **SratPtr
-  );
-
-AGESA_STATUS
-CreateAcpiSlit (
-  IN OUT   AMD_CONFIG_PARAMS      *StdHeader,
-  IN       PLATFORM_CONFIGURATION *PlatformConfig,
-  IN OUT   VOID                   **SlitPtr
-  );
-
-VOID
-ChecksumAcpiTable (
-  IN OUT   ACPI_TABLE_HEADER *Table,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-RunLateApTaskOnAllAPs (
-  IN       AP_EXE_PARAMS     *ApParams,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-RunLateApTaskOnAllCore0s (
-  IN       AP_EXE_PARAMS     *ApParams,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-#endif // _CPU_LATE_INIT_H_

pi/amd/00730F01/Proc/CPU/cpuRegisters.h

diff --git a/pi/amd/00730F01/Proc/CPU/cpuRegisters.h b/pi/amd/00730F01/Proc/CPU/cpuRegisters.h
deleted file mode 100644
index 601a643..0000000
--- a/pi/amd/00730F01/Proc/CPU/cpuRegisters.h
+++ /dev/null
@@ -1,467 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD CPU Register Table Related Functions
- *
- * Contains the definition of the CPU CPUID MSRs and PCI registers with BKDG recommended values
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 282320 $   @e \$Date: 2014-01-09 20:13:34 -0600 (Thu, 09 Jan 2014) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _CPU_REGISTERS_H_
-#define _CPU_REGISTERS_H_
-
-#include "cpuFamRegisters.h"
-/*
- *--------------------------------------------------------------
- *
- *                      M O D U L E S    U S E D
- *
- *---------------------------------------------------------------
- */
-
-/*
- *--------------------------------------------------------------
- *
- *                      D E F I N I T I O N S  /  M A C R O S
- *
- *---------------------------------------------------------------
- */
-
-#undef BIT0
-#undef BIT1
-#undef BIT2
-#undef BIT3
-#undef BIT4
-#undef BIT5
-#undef BIT6
-#undef BIT7
-#undef BIT8
-#undef BIT9
-#undef BIT10
-#undef BIT10
-#undef BIT11
-#undef BIT12
-#undef BIT13
-#undef BIT14
-#undef BIT15
-#undef BIT16
-#undef BIT17
-#undef BIT18
-#undef BIT19
-#undef BIT20
-#undef BIT21
-#undef BIT22
-#undef BIT23
-#undef BIT24
-#undef BIT25
-#undef BIT26
-#undef BIT27
-#undef BIT28
-#undef BIT29
-#undef BIT30
-#undef BIT31
-#undef BIT32
-#undef BIT33
-#undef BIT34
-#undef BIT35
-#undef BIT36
-#undef BIT37
-#undef BIT38
-#undef BIT39
-#undef BIT40
-#undef BIT41
-#undef BIT42
-#undef BIT43
-#undef BIT44
-#undef BIT45
-#undef BIT46
-#undef BIT47
-#undef BIT48
-#undef BIT49
-#undef BIT40
-#undef BIT41
-#undef BIT42
-#undef BIT43
-#undef BIT44
-#undef BIT45
-#undef BIT46
-#undef BIT47
-#undef BIT48
-#undef BIT49
-#undef BIT50
-#undef BIT51
-#undef BIT52
-#undef BIT53
-#undef BIT54
-#undef BIT55
-#undef BIT56
-#undef BIT57
-#undef BIT58
-#undef BIT59
-#undef BIT60
-#undef BIT61
-#undef BIT62
-#undef BIT63
-
-#define BIT0        0x0000000000000001ull
-#define BIT1        0x0000000000000002ull
-#define BIT2        0x0000000000000004ull
-#define BIT3        0x0000000000000008ull
-#define BIT4        0x0000000000000010ull
-#define BIT5        0x0000000000000020ull
-#define BIT6        0x0000000000000040ull
-#define BIT7        0x0000000000000080ull
-#define BIT8        0x0000000000000100ull
-#define BIT9        0x0000000000000200ull
-#define BIT10       0x0000000000000400ull
-#define BIT11       0x0000000000000800ull
-#define BIT12       0x0000000000001000ull
-#define BIT13       0x0000000000002000ull
-#define BIT14       0x0000000000004000ull
-#define BIT15       0x0000000000008000ull
-#define BIT16       0x0000000000010000ull
-#define BIT17       0x0000000000020000ull
-#define BIT18       0x0000000000040000ull
-#define BIT19       0x0000000000080000ull
-#define BIT20       0x0000000000100000ull
-#define BIT21       0x0000000000200000ull
-#define BIT22       0x0000000000400000ull
-#define BIT23       0x0000000000800000ull
-#define BIT24       0x0000000001000000ull
-#define BIT25       0x0000000002000000ull
-#define BIT26       0x0000000004000000ull
-#define BIT27       0x0000000008000000ull
-#define BIT28       0x0000000010000000ull
-#define BIT29       0x0000000020000000ull
-#define BIT30       0x0000000040000000ull
-#define BIT31       0x0000000080000000ull
-#define BIT32       0x0000000100000000ull
-#define BIT33       0x0000000200000000ull
-#define BIT34       0x0000000400000000ull
-#define BIT35       0x0000000800000000ull
-#define BIT36       0x0000001000000000ull
-#define BIT37       0x0000002000000000ull
-#define BIT38       0x0000004000000000ull
-#define BIT39       0x0000008000000000ull
-#define BIT40       0x0000010000000000ull
-#define BIT41       0x0000020000000000ull
-#define BIT42       0x0000040000000000ull
-#define BIT43       0x0000080000000000ull
-#define BIT44       0x0000100000000000ull
-#define BIT45       0x0000200000000000ull
-#define BIT46       0x0000400000000000ull
-#define BIT47       0x0000800000000000ull
-#define BIT48       0x0001000000000000ull
-#define BIT49       0x0002000000000000ull
-#define BIT50       0x0004000000000000ull
-#define BIT51       0x0008000000000000ull
-#define BIT52       0x0010000000000000ull
-#define BIT53       0x0020000000000000ull
-#define BIT54       0x0040000000000000ull
-#define BIT55       0x0080000000000000ull
-#define BIT56       0x0100000000000000ull
-#define BIT57       0x0200000000000000ull
-#define BIT58       0x0400000000000000ull
-#define BIT59       0x0800000000000000ull
-#define BIT60       0x1000000000000000ull
-#define BIT61       0x2000000000000000ull
-#define BIT62       0x4000000000000000ull
-#define BIT63       0x8000000000000000ull
-
-/// CPUID related registers
-#define AMD_CPUID_FMF               0x80000001ul  // Family Model Features information
-#define AMD_CPUID_APICID_LPC_BID    0x00000001ul  // Local APIC ID, Logical Processor Count, Brand ID
-#define AMD_CPUID_L2L3Cache_L2TLB   0x80000006ul
-#define CPUID_ASSOCIATIVITY_DISABLED 0x00
-#define CPUID_ASSOCIATIVITY_1_WAY   0x01
-#define CPUID_ASSOCIATIVITY_2_WAY   0x02
-#define CPUID_ASSOCIATIVITY_4_WAY   0x04
-#define CPUID_ASSOCIATIVITY_8_WAY   0x06
-#define CPUID_ASSOCIATIVITY_16_WAY  0x08
-#define CPUID_ASSOCIATIVITY_32_WAY  0x0A
-#define CPUID_ASSOCIATIVITY_48_WAY  0x0B
-#define CPUID_ASSOCIATIVITY_64_WAY  0x0C
-#define CPUID_ASSOCIATIVITY_96_WAY  0x0D
-#define CPUID_ASSOCIATIVITY_128_WAY 0x0E
-#define CPUID_ASSOCIATIVITY_FULLY   0x0F
-#define AMD_CPUID_TLB_L1Cache       0x80000005ul
-#define AMD_CPUID_L1L2Tlb1GIdentifiers 0x80000019ul
-#define AMD_CPUID_APM               0x80000007ul
-#define LOCAL_APIC_ID               24
-#define LOGICAL_PROCESSOR_COUNT     16
-#define AMD_CPUID_ASIZE_PCCOUNT     0x80000008ul  // Address Size, Physical Core Count
-
-/// CPU Logical ID Transfer
-typedef struct {
-  UINT32         RawId;                         ///< RawID
-  UINT64         LogicalId;                     ///< LogicalID
-} CPU_LOGICAL_ID_XLAT;
-
-/// Logical CPU ID Table
-typedef struct {
-  IN       UINT32  Elements;                    ///< Number of Elements
-  IN       CPU_LOGICAL_ID_XLAT *LogicalIdTable; ///< CPU Logical ID Transfer table Pointer
-} LOGICAL_ID_TABLE;
-
-// MSRs
-// ------------------------
-#define MCG_CTL_P                   0x00000100ul              // bit 8  for MCG_CTL_P under MSRR
-#define MSR_MCG_CAP                 0x00000179ul
-#define DBG_CTL_MSR                 0x000001D9ul
-#define MSR_MC0_CTL                 0x00000400ul
-#define MSR_MC0_STATUS              0x00000401ul
-#define MSR_MC0_MISC                0x00000403ul
-#define MSR_MC1_MISC                0x00000407ul
-#define MSR_MC2_MISC                0x0000040Bul
-#define MSR_MC4_MISC0               0x00000413ul
-#define MSR_MC5_MISC                0x00000417ul
-#define MSR_MC4_MISC1               0xC0000408ul
-#define MSR_MC5_STATUS              0x00000415ul
-#define MSR_MC6_STATUS              0x00000419ul
-
-#define MSR_APIC_BAR                0x0000001Bul
-#define MSR_PATCH_LEVEL             0x0000008Bul
-
-#define CPUID_LONG_MODE_ADDR        0x80000008ul
-
-#define MSR_EXTENDED_FEATURE_EN     0xC0000080ul
-#define MSR_MC_MISC_LINK_THRESHOLD  0xC0000408ul
-#define MSR_MC_MISC_L3_THRESHOLD    0xC0000409ul
-#define MSR_PATCH_LOADER            0xC0010020ul
-
-/// Patch Loader Register
-typedef struct {
-  UINT64 PatchBase:32;                ///< Linear address of patch header address block
-  UINT64 SBZ:32;                      ///< Should be zero
-} PATCH_LOADER_MSR;
-
-#define MSR_SYS_CFG                 0xC0010010ul    // SYSCFG - F15 Shared
-#define MSR_TOM2                    0xC001001Dul    // TOP_MEM2 - F15 Shared
-#define MSR_MC0_CTL_MASK            0xC0010044ul    // MC0 Control Mask
-#define MSR_MC1_CTL_MASK            0xC0010045ul    // MC1 Control Mask
-#define MSR_MC2_CTL_MASK            0xC0010046ul    // MC2 Control Mask
-#define MSR_MC4_CTL_MASK            0xC0010048ul    // MC4 Control Mask
-
-#define MSR_CPUID_FEATS             0xC0011004ul    // CPUID Features
-#define MSR_CPUID_EXT_FEATS         0xC0011005ul    // CPUID Extended Features
-#define MSR_HDT_CFG                 0xC001100Aul
-#define MSR_HWCR                    0xC0010015ul
-#define MSR_NB_CFG                  0xC001001Ful    // NB Config
-#define CPU_WDT_CFG                 0xC0010074ul
-#define ENABLE_CF8_EXT_CFG          0x00004000ul    // [46]
-#define INIT_APIC_CPUID_LO          0x00400000ul    // [54]
-#define MSR_CU_SPMCTL               0xC0010281ul
-#define MSR_CpuWdtCfg               0xC0010074ul    // CPU Watchdog Timer
-#define MSR_LS_CFG                  0xC0011020ul
-#define MSR_IC_CFG                  0xC0011021ul    // ICache Config - F15 Shared
-#define MSR_DC_CFG                  0xC0011022ul
-#define MSR_ME_CFG                  0xC0011029ul
-#define MSR_BU_CFG                  0xC0011023ul
-#define MSR_CU_CFG                  0xC0011023ul    // F15 Shared
-#define MSR_DE_CFG                  0xC0011029ul    // F15 Shared
-#define MSR_BU_CFG2                 0xC001102Aul
-#define MSR_CU_CFG2                 0xC001102Aul    // F15 Shared
-#define MSR_BU_CFG3                 0xC001102Bul
-#define MSR_CU_CFG3                 0xC001102Bul    // F15 Shared
-#define MSR_LS_CFG2                 0xC001102Dul
-#define MSR_CU_PFTCFG               0xC001102Ful
-#define MSR_IBS_OP_DATA3            0xC0011037ul
-#define MSR_C001_1070               0xC0011070ul    // F15 Shared
-#define MSR_L2I_CFG                 0xC00110A0ul    // F16 shared
-#define MSR_CU_CBBCFG               0xC00110A1ul    // F15 CZ
-
-
-#define MSR_CPUID_NAME_STRING0      0xC0010030ul    // First CPUID namestring register
-#define MSR_CPUID_NAME_STRING1      0xC0010031ul
-#define MSR_CPUID_NAME_STRING2      0XC0010032ul
-#define MSR_CPUID_NAME_STRING3      0xC0010033ul
-#define MSR_CPUID_NAME_STRING4      0xC0010034ul
-#define MSR_CPUID_NAME_STRING5      0xC0010035ul    // Last CPUID namestring register
-#define MSR_MMIO_Cfg_Base           0xC0010058ul    // MMIO Configuration Base Address Register
-#define MSR_BIST                    0xC0010060ul    // BIST Results register
-#define MSR_OSVW_ID_Length          0xC0010140ul
-#define MSR_OSVW_Status             0xC0010141ul
-#define MSR_NB_PERF_CTL0            0xC0010240ul
-#define MSR_NB_PERF_CTR0            0xC0010241ul
-#define MSR_NB_PERF_CTL1            0xC0010242ul
-#define MSR_NB_PERF_CTR1            0xC0010243ul
-#define MSR_NB_PERF_CTL2            0xC0010244ul
-#define MSR_NB_PERF_CTR2            0xC0010245ul
-#define MSR_NB_PERF_CTL3            0xC0010246ul
-#define MSR_NB_PERF_CTR3            0xC0010247ul
-#define CU_SPMCTL                   0xC0010281ul    // Streaming Performance Monitor Control
-#define MSR_PERF_CONTROL3           0xC0010003ul    // Performance control register number 3
-#define MSR_PERF_COUNTER3           0xC0010007ul    // Performance counter register number 3
-#define PERF_RESERVE_BIT_MASK       0x030FFFDFFFFFull  // Mask of the Performance control Reserve bits
-#define PERF_CAR_CORRUPTION_EVENT   0x040040F0E2ul    // Configure the controller to capture the
-                                                    // CAR Corruption
-// FUNC_0 registers
-// ----------------
-#define LINK_INIT_CTRL              0x6C
-#define LINK_INIT_CTRL_REQ_DIS      0x02        // [1] = ReqDis
-#define LINK_INIT_COLD_RST_DET      BIT4
-#define LINK_INIT_BIOS_RST_DET_0    BIT5
-#define LINK_INIT_BIOS_RST_DET_1    BIT9
-#define LINK_INIT_BIOS_RST_DET_2    BIT10
-#define LINK_INIT_BIOS_RST_DET      BIT9 | BIT10
-#define EXTENDED_NODE_ID            0x160
-
-#define CORE_CTRL                   0x1DC
-#define CORE_CTRL_CORE1_EN          0x00000002ul
-#define CORE_CTRL_CORE2_EN          0x00000004ul
-#define CORE_CTRL_CORE3_EN          0x00000008ul
-#define CORE_CTRL_CORE4_EN          0x00000010ul
-#define CORE_CTRL_CORE5_EN          0x00000020ul
-#define CORE_CTRL_CORE6_EN          0x00000040ul
-#define CORE_CTRL_CORE7_EN          0x00000080ul
-#define CORE_CTRL_CORE8_EN          0x00000100ul
-#define CORE_CTRL_CORE9_EN          0x00000200ul
-
-// FUNC_3 registers
-// ----------------
-#define HARDWARE_THERMAL_CTRL_REG       0x64
-#define SOFTWARE_THERMAL_CTRL_REG       0x68
-
-#define ACPI_PSC_0_REG                  0x80    // ACPI Power State Control Registers
-#define ACPI_PSC_4_REG                  0x84
-
-#define NB_CFG_HIGH_REG                 0x8C
-#define POWER_CTRL_MISCELLANEOUS_REG    0xA0
-#define CLOCK_POWER_TIMING_CTRL2_REG    0xDC
-#define NORTH_BRIDGE_CAPABILITIES_REG   0xE8
-#define MULTI_NODE_CPU                  29
-#define CPUID_FMR                       0xFC    // Family / Model registers
-#define DOWNCORE_CTRL                   0x190   // Downcore Control Register
-
-#define LINK_TO_XCS_TOKEN_COUNT_REG_3X148 0x148
-#define REG_HT4_PHY_OFFSET_BASE_4X180    0x180
-#define REG_HT4_PHY_DATA_PORT_BASE_4X184 0x184
-
-// FUNC_5 registers
-// ----------------
-#define COMPUTE_UNIT_STATUS       0x80
-#define NORTH_BRIDGE_CAPABILITIES_2_REG  0x84
-
-
-// Misc. defines.
-#define PCI_DEV_BASE    24
-
-#define CPUID_STEPPING_MASK      0x0000000Ful
-#define CPUID_BASE_MODEL_MASK    0x000000F0ul
-#define CPUID_BASE_FAMILY_MASK   0x00000F00ul
-#define CPUID_EXT_MODEL_MASK     0x000F0000ul
-#define CPUID_EXT_FAMILY_MASK    0x0FF00000ul
-
-#define TN_SOCKET_FP2       0
-#define TN_SOCKET_FS1       1
-#define TN_SOCKET_FM2       2
-#define KV_SOCKET_FP3       0
-#define KV_SOCKET_FM2r2     1
-#define CZ_SOCKET_FP4       0   /// @todo : update value when BKDG updates
-#define CZ_SOCKET_FM2r2     1   /// @todo : update value when BKDG updates
-#define KB_SOCKET_FT3       0
-#define KB_SOCKET_FS1b      1
-#define ML_SOCKET_FT3b      0
-#define SOCKET_IGNORE       0xF
-
-#define LAPIC_BASE_ADDR_MASK    0x0000FFFFFFFFF000ull
-#define APIC_EXT_BRDCST_MASK    0x000E0000ul
-#define APIC_ENABLE_BIT         0x00000800ul
-#define LOCAL_APIC_ADDR         0xFEE00000ul
-#define INT_CMD_REG_LO          0x300
-#define INT_CMD_REG_HI          0x310
-#define REMOTE_MSG_REG          0x380
-#define REMOTE_READ_REG         0xC0
-#define APIC_ID_REG             0x20
-#define APIC20_ApicId           24
-#define CMD_REG_TO_READ_DATA    0x338
-
-#define MAX_CORE_ID_SIZE 8
-#define MAX_CORE_ID_MASK ((1 << MAX_CORE_ID_SIZE) - 1)
-
-/*-------------------------
- * Default definitions
- *-------------------------
- */
-#define DOWNCORE_MASK_SINGLE    0xFFFFFFFEul
-#define DOWNCORE_MASK_DUAL      0xFFFFFFFCul
-#define DOWNCORE_MASK_TRI       0xFFFFFFF8ul
-#define DOWNCORE_MASK_FOUR      0xFFFFFFF0ul
-#define DOWNCORE_MASK_FIVE      0xFFFFFFE0ul
-#define DOWNCORE_MASK_SIX       0xFFFFFFC0ul
-#define DOWNCORE_MASK_SEVEN     0xFFFFFF80ul
-#define DOWNCORE_MASK_EIGHT     0xFFFFFF00ul
-#define DOWNCORE_MASK_TEN       0xFFFFFC00ul
-#define DOWNCORE_MASK_TWELVE    0xFFFFF000ul
-#define DOWNCORE_MASK_FOURTEEN  0xFFFFC000ul
-#define DOWNCORE_MASK_DUAL_COMPUTE_UNIT  0xFFFFFFFAul
-#define DOWNCORE_MASK_TRI_COMPUTE_UNIT   0xFFFFFFEAul
-#define DOWNCORE_MASK_FOUR_COMPUTE_UNIT  0xFFFFFFAAul
-#define DOWNCORE_MASK_FIVE_COMPUTE_UNIT  0xFFFFFEAAul
-#define DOWNCORE_MASK_SIX_COMPUTE_UNIT   0xFFFFFAAAul
-#define DOWNCORE_MASK_SEVEN_COMPUTE_UNIT 0xFFFFEAAAul
-#define DOWNCORE_MASK_EIGHT_COMPUTE_UNIT 0xFFFFAAAAul
-
-#define DELIVERY_STATUS             BIT13
-#define REMOTE_READ_STAT_MASK       0x00030000ul
-#define REMOTE_DELIVERY_PENDING     0x00010000ul
-#define REMOTE_DELIVERY_DONE        0x00020000ul
-
-/*
- * --------------------------------------------------------------------------------------
- *
- *             D E F I N E S    /   T Y P E D E F S   /  S T R U C T U R E S
- *
- * --------------------------------------------------------------------------------------
- */
-
-/// CpuEarly param type
-typedef struct {
-  IN       UINT8                  MemInitPState;        ///< Pstate value during memory initial
-  IN       PLATFORM_CONFIGURATION PlatformConfig;       ///< Runtime configurable user options
-} AMD_CPU_EARLY_PARAMS;
-
-/// CPUID
-typedef enum {
-  REG_EAX,                                    ///< EAX
-  REG_EBX,                                    ///< EBX
-  REG_ECX,                                    ///< ECX
-  REG_EDX                                     ///< EDX
-} CPUID_REG;
-
-#endif      // _CPU_REGISTERS_H_
-

pi/amd/00730F01/Proc/CPU/heapManager.h

diff --git a/pi/amd/00730F01/Proc/CPU/heapManager.h b/pi/amd/00730F01/Proc/CPU/heapManager.h
deleted file mode 100644
index 7a278ef..0000000
--- a/pi/amd/00730F01/Proc/CPU/heapManager.h
+++ /dev/null
@@ -1,258 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Heap Manager and Heap Allocation APIs, and related functions.
- *
- * Contains code that initialize, maintain, and allocate the heap space.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  CPU
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _HEAP_MANAGER_H_
-#define _HEAP_MANAGER_H_
-
-/*---------------------------------------------------------------------------------------
- *          M I X E D   (Definitions And Macros / Typedefs, Structures, Enums)
- *---------------------------------------------------------------------------------------
- */
-
-
-/*---------------------------------------------------------------------------------------
- *                 D E F I N I T I O N S     A N D     M A C R O S
- *---------------------------------------------------------------------------------------
- */
-#define AMD_MTRR_VARIABLE_BASE0 0x200
-#define AMD_MTRR_VARIABLE_HEAP_BASE 0x20A
-#define AMD_MTRR_VARIABLE_HEAP_MASK (AMD_MTRR_VARIABLE_HEAP_BASE + 1)
-
-#define AMD_HEAP_START_ADDRESS  0x400000ul
-#define AMD_HEAP_REGION_END_ADDRESS 0xBFFFFFul
-#define AMD_HEAP_SIZE_PER_CORE  0x010000ul
-#define AMD_HEAP_INVALID_HEAP_OFFSET 0xFFFFFFFFul
-#define AMD_HEAP_MTRR_MASK ((0xFFFFFFFFFFFFF800ull & (((UINT64)AMD_HEAP_SIZE_PER_CORE ^ (-1)) + 1)) | 0x800)
-#define AMD_HEAP_SIZE_DWORD_PER_CORE  (AMD_HEAP_SIZE_PER_CORE / 4)
-
-#define AMD_TEMP_TOM            0x20000000ul  // Set TOM to 512 MB (temporary value)
-#define AMD_VAR_MTRR_ENABLE_BIT 0x100000ul    // bit 20
-
-#define AMD_HEAP_RAM_ADDRESS    0xB0000ul
-
-#define HEAP_SIGNATURE_VALID    0x50414548ul // Signature: 'HEAP'
-#define HEAP_SIGNATURE_INVALID  0x00000000ul // Signature cleared
-
-///Heap Manager Life cycle
-#define HEAP_DO_NOT_EXIST_YET        1
-#define HEAP_LOCAL_CACHE             2
-#define HEAP_TEMP_MEM                3
-#define HEAP_SYSTEM_MEM              4
-#define HEAP_DO_NOT_EXIST_ANYMORE    5
-#define HEAP_S3_RESUME               6
-#define HEAP_RUNTIME_SYSTEM_MEM      7
-
-///Heap callout
-#define HEAP_CALLOUT_BOOTTIME        0
-#define HEAP_CALLOUT_RUNTIME         1
-
-#define AMD_MTRR_FIX64k_00000    0x250
-#define AMD_MTRR_FIX16k_80000    0x258
-#define AMD_MTRR_FIX16k_A0000    0x259
-#define AMD_MTRR_FIX4k_C0000     0x268
-#define AMD_MTRR_FIX4k_C8000     0x269
-#define AMD_MTRR_FIX4k_D0000     0x26A
-#define AMD_MTRR_FIX4k_D8000     0x26B
-#define AMD_MTRR_FIX4k_E0000     0x26C
-#define AMD_MTRR_FIX4k_E8000     0x26D
-#define AMD_MTRR_FIX4k_F0000     0x26E
-#define AMD_MTRR_FIX4k_F8000     0x26F
-
-#define AMD_MTRR_FIX64K_WB_DRAM  0x1E
-#define AMD_MTRR_FIX64K_WT_DRAM  0x1C
-#define AMD_MTRR_FIX64K_UC_DRAM  0x18
-#define AMD_MTRR_FIX16K_WB_DRAM  0x1E1E1E1E1E1E1E1Eull
-#define AMD_MTRR_FIX16K_WT_DRAM  0x1C1C1C1C1C1C1C1Cull
-#define AMD_MTRR_FIX16K_UC_DRAM  0x1818181818181818ull
-#define AMD_MTRR_FIX4K_WB_DRAM   0x1E1E1E1E1E1E1E1Eull
-#define AMD_MTRR_FIX4K_WT_DRAM   0x1C1C1C1C1C1C1C1Cull
-#define AMD_MTRR_FIX4K_UC_DRAM   0x1818181818181818ull
-
-/*---------------------------------------------------------------------------------------
- *               T Y P E D E F S,   S T R U C T U R E S,    E N U M S
- *---------------------------------------------------------------------------------------
- */
-/// Allocate Heap Parameters
-typedef struct _ALLOCATE_HEAP_PARAMS {
-  UINT32  RequestedBufferSize;                    ///< Size of buffer.
-  UINT32  BufferHandle;                           ///< An unique ID of buffer.
-  UINT8   Persist;                                ///< A flag. If marked, to be stored and passed to AmdInitLate.
-  UINT8   *BufferPtr;                             ///< Pointer to buffer.
-} ALLOCATE_HEAP_PARAMS;
-
-/// Locate Heap Parameters
-typedef struct _LOCATE_HEAP_PTR {
-  UINT32  BufferHandle;                           ///< An unique ID of buffer.
-  UINT32 BufferSize;                              ///< Data buffer size.
-  UINT8   *BufferPtr;                             ///< Pointer to buffer.
-} LOCATE_HEAP_PTR;
-
-/// Heap Node Header
-typedef struct _BUFFER_NODE {
-  UINT32        BufferHandle;                     ///< An unique ID of buffer.
-  UINT32        BufferSize;                       ///< Size of buffer.
-  UINT8         Persist;                          ///< A flag. If marked, to be stored and passed to AmdInitLate.
-  UINT8         PadSize;                          ///< Size of pad.
-  UINT32        OffsetOfNextNode;                 ///< Offset of next node (relative to the base).
-} BUFFER_NODE;
-
-/// Heap Manager
-typedef struct _HEAP_MANAGER {
-  UINT32 Signature;                               ///< a signature to indicate if the heap is valid.
-  UINT32 UsedSize;                                ///< Used size of heap.
-  UINT32 FirstActiveBufferOffset;                 ///< Offset of the first active buffer.
-  UINT32 FirstFreeSpaceOffset;                    ///< Offset of the first free space.
-} HEAP_MANAGER;
-
-/// AGESA Buffer Handles (These are reserved)
-typedef enum {
-  AMD_INIT_RESET_HANDLE = 0x000A000,              ///< Assign 0x000A000 buffer handle to AmdInitReset routine.
-  AMD_INIT_EARLY_HANDLE,                          ///< Assign 0x000A001 buffer handle to AmdInitEarly routine.
-  AMD_INIT_POST_HANDLE,                           ///< Assign 0x000A002 buffer handle to AmdInitPost routine.
-  AMD_INIT_ENV_HANDLE,                            ///< Assign 0x000A003 buffer handle to AmdInitEnv routine.
-  AMD_INIT_MID_HANDLE,                            ///< Assign 0x000A004 buffer handle to AmdInitMid routine.
-  AMD_INIT_LATE_HANDLE,                           ///< Assign 0x000A005 buffer handle to AmdInitLate routine.
-  AMD_INIT_RESUME_HANDLE,                         ///< Assign 0x000A006 buffer handle to AmdInitResume routine.
-  AMD_LATE_RUN_AP_TASK_HANDLE,                    ///< Assign 0x000A007 buffer handle to AmdLateRunApTask routine.
-  AMD_S3_SAVE_HANDLE,                             ///< Assign 0x000A008 buffer handle to AmdS3Save routine.
-  AMD_S3_LATE_RESTORE_HANDLE,                     ///< Assign 0x000A009 buffer handle to AmdS3LateRestore routine.
-  AMD_S3_SCRIPT_SAVE_TABLE_HANDLE,                ///< Assign 0x000A00A buffer handle to be used for S3 save table
-  AMD_S3_SCRIPT_TEMP_BUFFER_HANDLE,               ///< Assign 0x000A00B buffer handle to be used for S3 save table
-  AMD_CPU_AP_TASKING_HANDLE,                      ///< Assign 0x000A00C buffer handle to AP tasking input parameters.
-  AMD_REC_MEM_SOCKET_HANDLE,                      ///< Assign 0x000A00D buffer handle to save socket with memory in memory recovery mode.
-  AMD_MEM_AUTO_HANDLE,                            ///< Assign 0x000A00E buffer handle to AmdMemAuto routine.
-  AMD_MEM_SPD_HANDLE,                             ///< Assign 0x000A00F buffer handle to AmdMemSpd routine.
-  AMD_MEM_DATA_HANDLE,                            ///< Assign 0x000A010 buffer handle to MemData
-  AMD_MEM_TRAIN_BUFFER_HANDLE,                    ///< Assign 0x000A011 buffer handle to allocate buffer for training
-  AMD_MEM_S3_DATA_HANDLE,                         ///< Assign 0x000A012 buffer handle to special case register for S3
-  AMD_MEM_S3_NB_HANDLE,                           ///< Assign 0x000A013 buffer handle to NB block for S3
-  AMD_MEM_S3_MR0_DATA_HANDLE,                     ///< Assign 0x000A014 buffer handle to MR0 data block for S3
-  AMD_UMA_INFO_HANDLE,                            ///< Assign 0x000A015 buffer handle to be used for Uma information
-  AMD_DMI_MEM_DEV_INFO_HANDLE,                    ///< Assign 0x000A016 buffer handle to DMI Type16 17 19 20 information
-  EVENT_LOG_BUFFER_HANDLE,                        ///< Assign 0x000A017 buffer handle to Event Log
-  IDS_CONTROL_HANDLE,                             ///< Assign 0x000A018 buffer handle to AmdIds routine.
-  IDS_HDT_OUT_BUFFER_HANDLE,                      ///< Assign 0x000A019 buffer handle to be used for HDTOUT support.
-  IDS_CHECK_POINT_PERF_HANDLE,                    ///< Assign 0x000A01A buffer handle to Performance analysis
-  AMD_PCIE_COMPLEX_DATA_HANDLE,                   ///< Assign 0x000A01B buffer handle to be used for PCIe support
-  AMD_MEM_SYS_DATA_HANDLE,                        ///< Assign 0x000A01C buffer handle to be used for memory data structure
-  AMD_GNB_SMU_CONFIG_HANDLE,                      ///< Assign 0x000A01D buffer handle to be used for GNB SMU configuration
-  AMD_PP_FUSE_TABLE_HANDLE,                       ///< Assign 0x000A01E buffer handle to be used for TT fuse table
-  AMD_GFX_PLATFORM_CONFIG_HANDLE,                 ///< Assign 0x000A01F buffer handle to be used for Gfx platform configuration
-  AMD_GNB_TEMP_DATA_HANDLE,                       ///< Assign 0x000A020 buffer handle for GNB general purpose data block
-  AMD_MEM_2D_RDQS_HANDLE,                         ///< Assign 0x000A021 buffer handle for 2D training
-  AMD_MEM_2D_RD_WR_HANDLE,                        ///< Assign 0x000A022 buffer handle for 2D Read/Write training
-  AMD_GNB_IOMMU_SCRATCH_MEM_HANDLE,               ///< Assign 0x000A023 buffer handle to be used for GNB IOMMU scratch memory
-  AMD_MEM_S3_SAVE_HANDLE,                         ///< Assign 0x000A024 buffer handle for memory data saved right after memory init
-  AMD_MEM_2D_RDQS_RIM_HANDLE,                     ///< Assign 0x000A025 buffer handle for 2D training Eye RIM Search
-  AMD_MEM_2D_RD_WR_RIM_HANDLE,                    ///< Assign 0x000A026 buffer handle for 2D Read/Write training Eye RIM Search
-  AMD_CPU_NB_PSTATE_FIXUP_HANDLE,                 ///< Assign 0x000A027 buffer handle for an NB P-state workaround
-  AMD_MEM_CRAT_INFO_BUFFER_HANDLE,                ///< Assign 0x000A028 buffer handle for CRAT Memory affinity component structure
-  AMD_SKIP_MEM_S3_SAVE,                           ///< Assign 0x000A029 buffer handle for the flag to skip memory S3 save
-  AMD_SCS_SMU_RAM_INFO,                           ///< Assign 0x000A02A buffer handle for keeping the result of SMU SCS service
-  AMD_SCS_HWP0_FREQ,                              ///< Assign 0x000A02B buffer handler for keeping frequency of HWP0
-  AMD_IS_FEATURE_ENABLED,                         ///< Assign 0x000A02C buffer handle for keeping the result of IsFeatureEnabled
-  AMD_MEM_DATAEYE_WORK_AREA_HANDLE,               ///< Assign 0x000A02D buffer handle for Composite Data Eye Compression Work Area
-  AMD_GNB_SAMU_PATCH_HANDLE,                      ///< Assign 0x000A02E buffer handle for Samu patch buffer
-  AMD_GNB_SAMU_BOOT_CONTROL_HANDLE,               ///< Assign 0x000A02F buffer handle for Samu boot control buffer
-  AMD_GNB_ACP_ENGINE_HANDLE,                      ///< Assign 0x000A030 buffer handle for GNB ACP engine buffer
-  AMD_MEM_PMU_SRAM_MSG_BLOCK_HANDLE,              ///< Assign 0x000A031 buffer handle for PMU SRAM Message Block buffer
-  AMD_MEM_DRAM_CAD_BUS_CONFIG_HANDLE,             ///< Assign 0x000A033 buffer handle for DRAM CAD Bus Configuration
-  AMD_GNB_SMU_TABLE_HANDLE,                       ///< Assign 0x000A034 buffer handle for GNB SMU table buffer
-  AMD_GNB_CRAT_HSA_TABLE_HANDLE,                  ///< Assign 0x000A035 buffer handle for GNB CRAT HSA unit table
-  AMD_GNB_BUILD_OPTIONS_HANDLE,                   ///< Assign 0x000A036 buffer handle for GNB build options
-  AMD_MEM_MISC_HANDLES_START = 0x1000000,         ///< Reserve 0x1000000 to 0x1FFFFFF buffer handle
-  AMD_MEM_MISC_HANDLES_END = 0x1FFFFFF,           ///< miscellaneous memory init tasks' buffers.
-  AMD_HEAP_IN_MAIN_MEMORY_HANDLE = 0x8000000,     ///< Assign 0x8000000 to AMD_HEAP_IN_MAIN_MEMORY_HANDLE.
-  SOCKET_DIE_MAP_HANDLE = 0x534F4B54,             ///< 'sokt'
-  NODE_ID_MAP_HANDLE = 0x4E4F4445,                ///< 'node'
-  HOP_COUNT_TABLE_HANDLE = 0x484F5053,            ///< 'hops'
-  AMD_FCH_RESET_DATA_BLOCK_HANDLE = 0x46434852,   ///< 'FCHR' Buffer handle for FCH private data block at InitReset
-  AMD_FCH_DATA_BLOCK_HANDLE = 0x46434845,         ///< 'FCHE' Buffer handle for FCH private data block at InitEnv
-  IDS_TRAP_TABLE_HANDLE = 0x49524547,             ///< 'IREG' Handle for IDS register table
-  IDS_SAVE_IDTR_HANDLE = 0x49445452,              ///< 'IDTR'
-  IDS_BSC_IDT_HANDLE = 0x42534349,                ///< 'BSCI' BSC Idt table
-  IDS_NV_TO_CMOS_HANDLE = 0x534D4349,             ///< 'ICMS' Handle for IDS CMOS save
-  IDS_GRA_HANDLE = 0x41524749,                    ///< 'IGRA' Handle for IDS GRA save
-  IDS_EXTEND_HANDLE = 0x54584549,                 ///< 'IEXT' Handle for IDS extend module
-  IDS_TEMP_DATA_HANDLE = 0x504D5459,              ///< 'ITMP' Handle for IDS temp data
-} AGESA_BUFFER_HANDLE;
-
-
-/*---------------------------------------------------------------------------------------
- *                        F U N C T I O N    P R O T O T Y P E
- *---------------------------------------------------------------------------------------
- */
-
-AGESA_STATUS
-HeapManagerInit (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-HeapAllocateBuffer (
-  IN OUT   ALLOCATE_HEAP_PARAMS *AllocateHeapParams,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-HeapDeallocateBuffer (
-  IN       UINT32 BufferHandle,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-HeapLocateBuffer (
-  IN OUT   LOCATE_HEAP_PTR *LocateHeap,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-UINT64
-HeapGetBaseAddress (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-AGESA_STATUS
-EventLogInitialization (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-#endif // _HEAP_MANAGER_H_

pi/amd/00730F01/Proc/Common/AmdFch.h

diff --git a/pi/amd/00730F01/Proc/Common/AmdFch.h b/pi/amd/00730F01/Proc/Common/AmdFch.h
deleted file mode 100644
index 5edcf35..0000000
--- a/pi/amd/00730F01/Proc/Common/AmdFch.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD FCH Component
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _AMD_FCH_H_
-#define _AMD_FCH_H_
-
-typedef AGESA_STATUS FCH_INIT (IN VOID *DataPtr);
-typedef VOID FCH_TASK_ENTRY (IN VOID *FchCfg);
-
-
-/// FCH API build options
-typedef struct {
-  FCH_INIT        *InitReset;                   ///< InitReset
-  FCH_INIT        *InitResetConstructor;        ///< InitResetConstructor
-  FCH_INIT        *InitEnv;                     ///< InitEnv
-  FCH_INIT        *InitEnvConstructor;          ///< InitEnvConstructor
-  FCH_INIT        *InitMid;                     ///< InitMid
-  FCH_INIT        *InitMidConstructor;          ///< InitMidConstructor
-  FCH_INIT        *InitLate;                    ///< InitLate
-  FCH_INIT        *InitLateConstructor;         ///< InitLateConstructor
-} BLDOPT_FCH_FUNCTION;
-
-#endif

pi/amd/00730F01/Proc/Fch/Common/AcpiLib.h

diff --git a/pi/amd/00730F01/Proc/Fch/Common/AcpiLib.h b/pi/amd/00730F01/Proc/Fch/Common/AcpiLib.h
deleted file mode 100644
index 23fb37c..0000000
--- a/pi/amd/00730F01/Proc/Fch/Common/AcpiLib.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH ACPI lib
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _FCH_ACPILIB_H_
-#define _FCH_ACPILIB_H_
-///
-/// RSDP - ACPI 2.0 table RSDP
-///
-typedef struct _RSDP_HEADER {
-  UINT64               Signature;                      ///< RSDP signature "RSD PTR"
-  UINT8                CheckSum;                       ///< checksum of the first 20 bytes
-  UINT8                OEMID[6];                       ///< OEM ID
-  UINT8                Revision;                       ///< 0 for APCI 1.0, 2 for ACPI 2.0
-  UINT32               RsdtAddress;                    ///< physical address of RSDT
-  UINT32               Length;                         ///< total length of RSDP (including extended part)
-  UINT64               XsdtAddress;                    ///< physical address of XSDT
-  UINT8                ExtendedCheckSum;               ///< chechsum of whole table
-  UINT8                Reserved[3];                    ///< Reserved
-} RSDP_HEADER;
-
-///
-/// DESCRIPTION_HEADER - ACPI common table header
-///
-typedef struct _DESCRIPTION_HEADER {
-  UINT32               Signature;                      ///< ACPI signature (4 ASCII characters)
-  UINT32               Length;                         ///< Length of table, in bytes, including header
-  UINT8                Revision;                       ///< ACPI Specification minor version #
-  UINT8                CheckSum;                       ///< To make sum of entire table == 0
-  UINT8                OemId[6];                       ///< OEM identification
-  UINT8                OemTableId[8];                  ///< OEM table identification
-  UINT32               OemRevision;                    ///< OEM revision number
-  UINT32               CreatorId;                      ///< ASL compiler vendor ID
-  UINT32               CreatorRevision;                ///< ASL compiler revision number
-} DESCRIPTION_HEADER;
-
-///
-/// _AcpiRegWrite - ACPI MMIO register R/W structure
-///
-typedef struct _ACPI_REG_WRITE {
-  UINT8        MmioBase;               /// MmioBase: Index of Fch block (For instance GPIO_BASE:0x01 SMI_BASE:0x02)
-  UINT8        MmioReg;                /// MmioReg      : Register index
-  UINT8        DataAndMask;            /// DataANDMask  : AND Register Data
-  UINT8        DataOrMask;             /// DataOrMask   : Or Register Data
-} ACPI_REG_WRITE;
-
-VOID*     AcpiLocateTable (IN UINT32 Signature);
-VOID      AcpiSetTableCheckSum (IN VOID *TablePtr);
-UINT8     AcpiGetTableCheckSum (IN VOID *TablePtr);
-UINT8     GetByteSum (IN VOID *DataPtr, IN UINT32 Length);
-
-#endif

pi/amd/00730F01/Proc/Fch/Common/FchBiosRamUsage.h

diff --git a/pi/amd/00730F01/Proc/Fch/Common/FchBiosRamUsage.h b/pi/amd/00730F01/Proc/Fch/Common/FchBiosRamUsage.h
deleted file mode 100644
index dcd12be..0000000
--- a/pi/amd/00730F01/Proc/Fch/Common/FchBiosRamUsage.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH BIOS Ram usage
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _FCH_BIOS_RAM_USAGE_H_
-#define _FCH_BIOS_RAM_USAGE_H_
-
-#define RESTORE_MEMORY_CONTROLLER_START       0
-#define XHCI_REGISTER_BAR00                   0xD0
-#define XHCI_REGISTER_BAR01                   0xD1
-#define XHCI_REGISTER_BAR02                   0xD2
-#define XHCI_REGISTER_BAR03                   0xD3
-#define XHCI_REGISTER_04H                     0xD4
-#define XHCI_REGISTER_0CH                     0xD5
-#define XHCI_REGISTER_3CH                     0xD6
-#define XHCI1_REGISTER_BAR00                  0xE0
-#define XHCI1_REGISTER_BAR01                  0xE1
-#define XHCI1_REGISTER_BAR02                  0xE2
-#define XHCI1_REGISTER_BAR03                  0xE3
-#define XHCI1_REGISTER_04H                    0xE4
-#define XHCI1_REGISTER_0CH                    0xE5
-#define XHCI1_REGISTER_3CH                    0xE6
-#define RTC_WORKAROUND_DATA_START             0xF0
-#define BOOT_TIME_FLAG_SEC                    0xF8
-#define BOOT_TIME_FLAG_INT19                  0xFC
-
-#endif
-

pi/amd/00730F01/Proc/Fch/Common/FchCommonCfg.h

diff --git a/pi/amd/00730F01/Proc/Fch/Common/FchCommonCfg.h b/pi/amd/00730F01/Proc/Fch/Common/FchCommonCfg.h
deleted file mode 100644
index 72e6aeb..0000000
--- a/pi/amd/00730F01/Proc/Fch/Common/FchCommonCfg.h
+++ /dev/null
@@ -1,1296 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH Function Support Definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _FCH_COMMON_CFG_H_
-#define _FCH_COMMON_CFG_H_
-
-#pragma pack (push, 1)
-
-//-----------------------------------------------------------------------------
-//                     FCH DEFINITIONS AND MACROS
-//-----------------------------------------------------------------------------
-
-//
-// FCH Component Data Structure Definitions
-//
-
-/// PCI_ADDRESS - PCI access structure
-#define PCI_ADDRESS(bus, dev, func, reg) \
-                   (UINT32) ( (((UINT32)bus) << 24) + (((UINT32)dev) << 19) + (((UINT32)func) << 16) + ((UINT32)reg) )
-
-#define CPUID_FMF        0x80000001ul  // Family Model Features information
-///
-///  - Byte Register R/W structure
-///
-typedef struct _REG8_MASK {
-  UINT8                 RegIndex;                       /// RegIndex - Reserved
-  UINT8                 AndMask;                        /// AndMask - Reserved
-  UINT8                 OrMask;                         /// OrMask - Reserved
-} REG8_MASK;
-
-
-///
-/// PCIE Reset Block
-///
-typedef enum {
-  NbBlock,                                              ///< Reset for NB PCIE
-  FchBlock                                              ///< Reset for FCH GPP
-} RESET_BLOCK;
-
-///
-/// PCIE Reset Operation
-///
-typedef enum {
-  DeassertReset,                                        ///< DeassertRese - Deassert reset
-  AssertReset                                           ///< AssertReset - Assert reset
-} RESET_OP;
-
-
-///
-/// SD structure
-///
-typedef struct {
-  SD_MODE               SdConfig;                       ///< SD Mode configuration
-                                                        ///   @li <b>00</b> - Disabled
-                                                        ///   @li <b>00</b> - AMDA
-                                                        ///   @li <b>01</b> - DMA
-                                                        ///   @li <b>10</b> - PIO
-                                                        ///
-  UINT8                 SdSpeed;                        ///< SD Speed
-                                                        ///   @li <b>0</b> - Low speed
-                                                        ///   @li <b>1</b> - High speed
-                                                        ///
-  UINT8                 SdBitWidth;                     ///< SD Bit Width
-                                                        ///   @li <b>0</b> - 32BIT clear 23
-                                                        ///   @li <b>1</b> - 64BIT, set 23,default
-                                                        ///
-  UINT32                SdSsid;                         ///< SD Subsystem ID
-  SD_CLOCK_CONTROL      SdClockControl;                 ///< SD Clock Control
-  BOOLEAN               SdClockMultiplier;              ///< SD Clock Multiplier enable/disable
-  UINT8                 SdReTuningMode;                 ///< SD Re-tuning modes select
-                                                        ///    @li <b>0</b> - mode 1
-                                                        ///    @li <b>1</b> - mode 2
-                                                        ///    @li <b>2</b> - mode 3
-  UINT8                 SdHostControllerVersion;        ///< SD controller Version
-                                                        ///    @li <b>1</b> - SD 2.0
-                                                        ///    @li <b>2</b> - SD 3.0
-  UINT8                 SdrCapabilities;                ///< SDR Capability mode select
-                                                        ///    @li <b>00</b> - SDR25/15
-                                                        ///    @li <b>01</b> - SDR50
-                                                        ///    @li <b>11</b> - SDR104
-  UINT8                 SdSlotType;                     ///< SDR Slot Type select
-                                                        ///    @li <b>00</b> - Removable Card Slot
-                                                        ///    @li <b>01</b> - Embedded Slot for One Device
-                                                        ///    @li <b>10</b> - Shared Bus Slot
-  BOOLEAN               SdForce18;                      ///< SD Force18
-} FCH_SD;
-
-///
-/// CODEC_ENTRY - Fch HD Audio OEM Codec structure
-///
-typedef struct _CODEC_ENTRY {
-  UINT8                 Nid;                            /// Nid - Reserved
-  UINT32                Byte40;                         /// Byte40 - Reserved
-} CODEC_ENTRY;
-
-///
-/// CODEC_TBL_LIST - Fch HD Audio Codec table list
-///
-typedef struct _CODEC_TBL_LIST {
-  UINT32                CodecId;                        /// CodecID - Codec ID
-  CONST CODEC_ENTRY*    CodecTablePtr;                  /// CodecTablePtr - Codec table pointer
-} CODEC_TBL_LIST;
-
-///
-/// AZALIA_PIN - HID Azalia or GPIO define structure.
-///
-typedef struct _AZALIA_PIN {
-  UINT8                 AzaliaSdin0;                    ///< AzaliaSdin0
-                                                        ///   @par
-                                                        ///   @li <b>00</b> - GPIO PIN
-                                                        ///   @li <b>10</b> - As a Azalia SDIN pin
-
-  UINT8                 AzaliaSdin1;                    ///< AzaliaSdin1
-                                                        ///   @par
-                                                        /// SDIN1 is define at BIT2 & BIT3
-                                                        ///   @li <b>00</b> - GPIO PIN
-                                                        ///   @li <b>10</b> - As a Azalia SDIN pin
-
-  UINT8                 AzaliaSdin2;                    ///< AzaliaSdin2
-                                                        ///   @par
-                                                        /// SDIN2 is define at BIT4 & BIT5
-                                                        ///   @li <b>00</b> - GPIO PIN
-                                                        ///   @li <b>10</b> - As a Azalia SDIN pin
-
-  UINT8                 AzaliaSdin3;                    ///< AzaliaSdin3
-                                                        ///   @par
-                                                        /// SDIN3 is define at BIT6 & BIT7
-                                                        ///   @li <b>00</b> - GPIO PIN
-                                                        ///   @li <b>10</b> - As a Azalia SDIN pin
-} AZALIA_PIN;
-
-///
-/// Azalia structure
-///
-typedef struct {
-  HDA_CONFIG            AzaliaEnable;                   ///< AzaliaEnable       - Azalia function configuration
-  BOOLEAN               AzaliaMsiEnable;                ///< AzaliaMsiEnable    - Azalia MSI capability
-  UINT32                AzaliaSsid;                     ///< AzaliaSsid         - Azalia Subsystem ID
-  UINT8                 AzaliaPinCfg;                   ///< AzaliaPinCfg       - Azalia Controller SDIN pin Configuration
-                                                        ///  @par
-                                                        ///  @li <b>0</b>       - disable
-                                                        ///  @li <b>1</b>       - enable
-
-  UINT8                 AzaliaFrontPanel;               ///< AzaliaFrontPanel   - Azalia Controller Front Panel Configuration
-                                                        ///   @par
-                                                        /// Support Front Panel configuration
-                                                        ///   @li <b>0</b>      - Auto
-                                                        ///   @li <b>1</b>      - disable
-                                                        ///   @li <b>2</b>      - enable
-
-  UINT8                 FrontPanelDetected;             ///< FrontPanelDetected - Force Azalia Controller Front Panel Configuration
-                                                        ///  @par
-                                                        /// Force Front Panel configuration
-                                                        ///  @li <b>0</b>       - Not Detected
-                                                        ///  @li <b>1</b>       - Detected
-
-  UINT8                 AzaliaSnoop;                    ///< AzaliaSnoop        - Azalia Controller Snoop feature Configuration
-                                                        ///   @par
-                                                        /// Azalia Controller Snoop feature Configuration
-                                                        ///   @li <b>0</b>      - disable
-                                                        ///   @li <b>1</b>      - enable
-
-  UINT8                 AzaliaDummy;                    /// AzaliaDummy         - Reserved */
-
-  AZALIA_PIN            AzaliaConfig;                   /// AzaliaConfig        - Azaliz Pin Configuration
-
-///
-/// AZOEMTBL - Azalia Controller OEM Codec Table Pointer
-///
-  CONST CODEC_TBL_LIST  *AzaliaOemCodecTablePtr;        /// AzaliaOemCodecTablePtr - Oem Azalia Codec Table Pointer
-
-///
-/// AZOEMFPTBL - Azalia Controller Front Panel OEM Table Pointer
-///
-  CONST VOID            *AzaliaOemFpCodecTablePtr;      /// AzaliaOemFpCodecTablePtr - Oem Front Panel Codec Table Pointer
-} FCH_AZALIA;
-
-///
-/// _SPI_DEVICE_PROFILE Spi Device Profile structure
-///
-typedef struct _SPI_DEVICE_PROFILE {
-  UINT32                JEDEC_ID;                       /// JEDEC ID
-  UINT32                RomSize;                        /// ROM Size
-  UINT32                SectorSize;                     /// Sector Size
-  UINT16                MaxNormalSpeed;                 /// Max Normal Speed
-  UINT16                MaxFastSpeed;                   /// Max Fast Speed
-  UINT16                MaxDualSpeed;                   /// Max Dual Speed
-  UINT16                MaxQuadSpeed;                   /// Max Quad Speed
-  UINT8                 QeReadRegister;                 /// QE Read Register
-  UINT8                 QeWriteRegister;                /// QE Write Register
-  UINT8                 QeOperateSize;                  /// QE Operate Size 1byte/2bytes
-  UINT16                QeLocation;                     // QE Location in the register
-} SPI_DEVICE_PROFILE;
-
-///
-/// _SPI_CONTROLLER_PROFILE Spi Device Profile structure
-///
-typedef struct _SPI_CONTROLLER_PROFILE {
-//  UINT32                SPI_CONTROLLER_ID;                       /// SPI Controller ID
-  UINT16                FifoSize;                       /// FIFO Size
-  UINT16                MaxNormalSpeed;                 /// Max Normal Speed
-  UINT16                MaxFastSpeed;                   /// Max Fast Speed
-  UINT16                MaxDualSpeed;                   /// Max Dual Speed
-  UINT16                MaxQuadSpeed;                   /// Max Quad Speed
-} SPI_CONTROLLER_PROFILE;
-
-///
-/// SPI structure
-///
-typedef struct {
-  BOOLEAN               LpcMsiEnable;                   ///< LPC MSI capability
-  UINT32                LpcSsid;                        ///< LPC Subsystem ID
-  UINT32                RomBaseAddress;                 ///< SpiRomBaseAddress
-                                                        ///   @par
-                                                        ///   SPI ROM BASE Address
-                                                        ///
-  UINT8                 SpiSpeed;                       ///< SpiSpeed - Spi Frequency
-                                                        ///  @par
-                                                        ///  SPI Speed [1.0] - the clock speed for non-fast read command
-                                                        ///   @li <b>00</b> - 66Mhz
-                                                        ///   @li <b>01</b> - 33Mhz
-                                                        ///   @li <b>10</b> - 22Mhz
-                                                        ///   @li <b>11</b> - 16.5Mhz
-                                                        ///
-  UINT8                 SpiFastSpeed;                   ///< FastSpeed  - Spi Fast Speed feature
-                                                        ///  SPIFastSpeed [1.0] - the clock speed for Fast Speed Feature
-                                                        ///   @li <b>00</b> - 66Mhz
-                                                        ///   @li <b>01</b> - 33Mhz
-                                                        ///   @li <b>10</b> - 22Mhz
-                                                        ///   @li <b>11</b> - 16.5Mhz
-                                                        ///
-  UINT8                 WriteSpeed;                     ///< WriteSpeed - Spi Write Speed
-                                                        /// @par
-                                                        ///  WriteSpeed [1.0] - the clock speed for Spi write command
-                                                        ///   @li <b>00</b> - 66Mhz
-                                                        ///   @li <b>01</b> - 33Mhz
-                                                        ///   @li <b>10</b> - 22Mhz
-                                                        ///   @li <b>11</b> - 16.5Mhz
-                                                        ///
-  UINT8                 SpiMode;                        ///< SpiMode    - Spi Mode Setting
-                                                        /// @par
-                                                        ///  @li <b>101</b> - Qual-io 1-4-4
-                                                        ///  @li <b>100</b> - Dual-io 1-2-2
-                                                        ///  @li <b>011</b> - Qual-io 1-1-4
-                                                        ///  @li <b>010</b> - Dual-io 1-1-2
-                                                        ///  @li <b>111</b> - FastRead
-                                                        ///  @li <b>110</b> - Normal
-                                                        ///
-  UINT8                 AutoMode;                       ///< AutoMode   - Spi Auto Mode
-                                                        /// @par
-                                                        ///  SPI Auto Mode
-                                                        ///  @li <b>0</b> - Disabled
-                                                        ///  @li <b>1</b> - Enabled
-                                                        ///
-  UINT8                 SpiBurstWrite;                  ///< SpiBurstWrite - Spi Burst Write Mode
-                                                        /// @par
-                                                        ///  SPI Burst Write
-                                                        ///  @li <b>0</b> - Disabled
-                                                        ///  @li <b>1</b> - Enabled
-  BOOLEAN               LpcClk0;                        ///< Lclk0En - LPCCLK0
-                                                        /// @par
-                                                        ///  LPC Clock 0 mode
-                                                        ///  @li <b>0</b> - forced to stop
-                                                        ///  @li <b>1</b> - functioning with CLKRUN protocol
-  BOOLEAN               LpcClk1;                        ///< Lclk1En - LPCCLK1
-                                                        /// @par
-                                                        ///  LPC Clock 1 mode
-                                                        ///  @li <b>0</b> - forced to stop
-                                                        ///  @li <b>1</b> - functioning with CLKRUN protocol
-//  UINT32                SPI100_RX_Timing_Config_Register_38;                 ///< SPI100_RX_Timing_Config_Register_38
-//  UINT16                SPI100_RX_Timing_Config_Register_3C;                 ///< SPI100_RX_Timing_Config_Register_3C
-//  UINT8                 SpiProtectEn0_1d_34;                  ///
-  UINT8                 SPI100_Enable;                  ///
-  SPI_DEVICE_PROFILE    SpiDeviceProfile;               /// Spi Device Profile
-} FCH_SPI;
-
-
-///
-/// IDE structure
-///
-typedef struct {
-  BOOLEAN               IdeEnable;                      ///< IDE function switch
-  BOOLEAN               IdeMsiEnable;                   ///< IDE MSI capability
-  UINT32                IdeSsid;                        ///< IDE controller Subsystem ID
-} FCH_IDE;
-
-///
-/// IR Structure
-///
-typedef struct {
-  IR_CONFIG             IrConfig;                       ///< IrConfig
-  UINT8                 IrPinControl;                   ///< IrPinControl
-} FCH_IR;
-
-
-///
-/// PCI Bridge Structure
-///
-typedef struct {
-  BOOLEAN               PcibMsiEnable;                  ///< PCI-PCI Bridge MSI capability
-  UINT32                PcibSsid;                       ///< PCI-PCI Bridge Subsystem ID
-  UINT8                 PciClks;                        ///< 33MHz PCICLK0/1/2/3 Enable, bits [0:3] used
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  UINT16                PcibClkStopOverride;            ///< PCIB_CLK_Stop Override
-  BOOLEAN               PcibClockRun;                   ///< Enable the auto clkrun functionality
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-} FCH_PCIB;
-
-
-///
-/// - SATA Phy setting structure
-///
-typedef struct _SATA_PHY_SETTING {
-  UINT16                PhyCoreControlWord;             /// PhyCoreControlWord - Reserved
-  UINT32                PhyFineTuneDword;               /// PhyFineTuneDword - Reserved
-} SATA_PHY_SETTING;
-
-///
-/// SATA main setting structure
-///
-typedef struct _SATA_ST {
-  UINT8                 SataModeReg;                    ///< SataModeReg - Sata Controller Mode
-  BOOLEAN               SataEnable;                     ///< SataEnable - Sata Controller Function
-                                                        ///   @par
-                                                        /// Sata Controller
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  UINT8                 Sata6AhciCap;                   ///< Sata6AhciCap - Reserved */
-  BOOLEAN               SataSetMaxGen2;                 ///< SataSetMaxGen2 - Set Sata Max Gen2 mode
-                                                        ///   @par
-                                                        /// Sata Controller Set to Max Gen2 mode
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  BOOLEAN               IdeEnable;                      ///< IdeEnable - Hidden IDE
-                                                        ///  @par
-                                                        /// Sata IDE Controller Combined Mode
-                                                        ///   Enable -  SATA controller has control over Port0 through Port3,
-                                                        ///     IDE controller has control over Port4 and Port7.
-                                                        ///   Disable - SATA controller has full control of all 8 Ports
-                                                        ///     when operating in non-IDE mode.
-                                                        ///  @li <b>0</b> - enable
-                                                        ///  @li <b>1</b> - disable
-                                                        ///
-  UINT8                 SataClkMode;                    /// SataClkMode - Reserved
-} SATA_ST;
-
-///
-/// SATA_PORT_ST - SATA PORT structure
-///
-typedef struct _SATA_PORT_ST {
-  UINT8                 SataPortReg;                    ///< SATA Port bit map - bits[0:7] for ports 0 ~ 7
-                                                        ///  @li <b>0</b> - disable
-                                                        ///  @li <b>1</b> - enable
-                                                        ///
-  BOOLEAN               Port0;                          ///< PORT0 - 0:disable, 1:enable
-  BOOLEAN               Port1;                          ///< PORT1 - 0:disable, 1:enable
-  BOOLEAN               Port2;                          ///< PORT2 - 0:disable, 1:enable
-  BOOLEAN               Port3;                          ///< PORT3 - 0:disable, 1:enable
-  BOOLEAN               Port4;                          ///< PORT4 - 0:disable, 1:enable
-  BOOLEAN               Port5;                          ///< PORT5 - 0:disable, 1:enable
-  BOOLEAN               Port6;                          ///< PORT6 - 0:disable, 1:enable
-  BOOLEAN               Port7;                          ///< PORT7 - 0:disable, 1:enable
-} SATA_PORT_ST;
-
-///
-///< _SATA_PORT_MD - Force Each PORT to GEN1/GEN2 mode
-///
-typedef struct _SATA_PORT_MD {
-  UINT16                SataPortMode;                   ///< SATA Port GEN1/GEN2 mode bit map - bits [0:15] for ports 0 ~ 7
-  UINT8                 Port0;                          ///< PORT0 - set BIT0 to GEN1, BIT1 - PORT0 set to GEN2
-  UINT8                 Port1;                          ///< PORT1 - set BIT2 to GEN1, BIT3 - PORT1 set to GEN2
-  UINT8                 Port2;                          ///< PORT2 - set BIT4 to GEN1, BIT5 - PORT2 set to GEN2
-  UINT8                 Port3;                          ///< PORT3 - set BIT6 to GEN1, BIT7 - PORT3 set to GEN2
-  UINT8                 Port4;                          ///< PORT4 - set BIT8 to GEN1, BIT9 - PORT4 set to GEN2
-  UINT8                 Port5;                          ///< PORT5 - set BIT10 to GEN1, BIT11 - PORT5 set to GEN2
-  UINT8                 Port6;                          ///< PORT6 - set BIT12 to GEN1, BIT13 - PORT6 set to GEN2
-  UINT8                 Port7;                          ///< PORT7 - set BIT14 to GEN1, BIT15 - PORT7 set to GEN2
-} SATA_PORT_MD;
-///
-/// SATA structure
-///
-typedef struct {
-  BOOLEAN               SataMsiEnable;                  ///< SATA MSI capability
-  UINT32                SataIdeSsid;                    ///< SATA IDE mode SSID
-  UINT32                SataRaidSsid;                   ///< SATA RAID mode SSID
-  UINT32                SataRaid5Ssid;                  ///< SATA RAID 5 mode SSID
-  UINT32                SataAhciSsid;                   ///< SATA AHCI mode SSID
-
-  SATA_ST               SataMode;                       /// SataMode - Reserved
-  SATA_CLASS            SataClass;                      ///< SataClass - SATA Controller mode [2:0]
-  UINT8                 SataIdeMode;                    ///< SataIdeMode - Sata IDE Controller mode
-                                                        ///  @par
-                                                        ///   @li <b>0</b> - Legacy IDE mode
-                                                        ///   @li <b>1</b> - Native IDE mode
-                                                        ///
-  UINT8                 SataDisUnusedIdePChannel;       ///< SataDisUnusedIdePChannel-Disable Unused IDE Primary Channel
-                                                        ///  @par
-                                                        ///   @li <b>0</b> - Channel Enable
-                                                        ///   @li <b>1</b> - Channel Disable
-                                                        ///
-  UINT8                 SataDisUnusedIdeSChannel;       ///< SataDisUnusedIdeSChannel - Disable Unused IDE Secondary Channel
-                                                        ///   @par
-                                                        ///    @li <b>0</b> - Channel Enable
-                                                        ///    @li <b>1</b> - Channel Disable
-                                                        ///
-  UINT8                 IdeDisUnusedIdePChannel;        ///< IdeDisUnusedIdePChannel-Disable Unused IDE Primary Channel
-                                                        ///   @par
-                                                        ///    @li <b>0</b> - Channel Enable
-                                                        ///    @li <b>1</b> - Channel Disable
-                                                        ///
-  UINT8                 IdeDisUnusedIdeSChannel;        ///< IdeDisUnusedIdeSChannel-Disable Unused IDE Secondary Channel
-                                                        ///   @par
-                                                        ///    @li <b>0</b> - Channel Enable
-                                                        ///    @li <b>1</b> - Channel Disable
-                                                        ///
-  UINT8                 SataOptionReserved;             /// SataOptionReserved - Reserved
-
-  SATA_PORT_ST          SataEspPort;                    ///<  SataEspPort - SATA port is external accessible on a signal only connector (eSATA:)
-
-  SATA_PORT_ST          SataPortPower;                  ///<  SataPortPower - Port Power configuration
-
-  SATA_PORT_MD          SataPortMd;                     ///<  SataPortMd - Port Mode
-
-  UINT8                 SataAggrLinkPmCap;              /// SataAggrLinkPmCap - 0:OFF   1:ON
-  UINT8                 SataPortMultCap;                /// SataPortMultCap - 0:OFF   1:ON
-  UINT8                 SataClkAutoOff;                 /// SataClkAutoOff - AutoClockOff 0:Disabled, 1:Enabled
-  UINT8                 SataPscCap;                     /// SataPscCap 1:Enable PSC, 0:Disable PSC capability
-  UINT8                 BiosOsHandOff;                  /// BiosOsHandOff - Reserved
-  UINT8                 SataFisBasedSwitching;          /// SataFisBasedSwitching - Reserved
-  UINT8                 SataCccSupport;                 /// SataCccSupport - Reserved
-  UINT8                 SataSscCap;                     /// SataSscCap - 1:Enable, 0:Disable SSC capability
-  UINT8                 SataMsiCapability;              /// SataMsiCapability 0:Hidden 1:Visible
-  UINT8                 SataForceRaid;                  /// SataForceRaid   0:No function 1:Force RAID
-  UINT8                 SataInternal100Spread;          /// SataInternal100Spread - Reserved
-  UINT8                 SataDebugDummy;                 /// SataDebugDummy - Reserved
-  UINT8                 SataTargetSupport8Device;       /// SataTargetSupport8Device - Reserved
-  UINT8                 SataDisableGenericMode;         /// SataDisableGenericMode - Reserved
-  BOOLEAN               SataAhciEnclosureManagement;    /// SataAhciEnclosureManagement - Reserved
-  UINT8                 SataSgpio0;                     /// SataSgpio0 - Reserved
-  UINT8                 SataSgpio1;                     /// SataSgpio1 - Reserved
-  UINT8                 SataPhyPllShutDown;             /// SataPhyPllShutDown - Reserved
-  BOOLEAN               SataHotRemovalEnh;              /// SataHotRemovalEnh - Reserved
-
-  SATA_PORT_ST          SataHotRemovalEnhPort;          ///<  SataHotRemovalEnhPort - Hot Remove
-
-  BOOLEAN               SataOobDetectionEnh;            /// SataOobDetectionEnh - TRUE
-  BOOLEAN               SataPowerSavingEnh;             /// SataPowerSavingEnh - TRUE
-  UINT8                 SataMemoryPowerSaving;          /// SataMemoryPowerSaving - 0-3 Default [3]
-  BOOLEAN               SataRasSupport;                 /// SataRasSupport - Support RAS function TRUE: Enable FALSE: Disable
-  BOOLEAN               SataAhciDisPrefetchFunction;    /// SataAhciDisPrefetchFunction - Disable AHCI Prefetch Function Support
-  BOOLEAN               SataDevSlpPort0;                /// SataDevSlpPort0 - Reserved
-  BOOLEAN               SataDevSlpPort1;                /// SataDevSlpPort1 - Reserved
-  UINT32                TempMmio;                       /// TempMmio - Reserved
-} FCH_SATA;
-
-
-//
-// IMC Message Register Software Interface
-//
-#define CPU_MISC_BUS_DEV_FUN          ((0x18 << 3) + 3)
-
-#define MSG_SYS_TO_IMC                0x80
-#define Fun_80                        0x80
-#define Fun_81                        0x81
-#define Fun_82                        0x82
-#define Fun_83                        0x83
-#define Fun_84                        0x84
-#define Fun_85                        0x85
-#define Fun_86                        0x86
-#define Fun_87                        0x87
-#define Fun_88                        0x88
-#define Fun_89                        0x89
-#define Fun_90                        0x90
-#define MSG_IMC_TO_SYS                0x81
-#define MSG_REG0                      0x82
-#define MSG_REG1                      0x83
-#define MSG_REG2                      0x84
-#define MSG_REG3                      0x85
-#define MSG_REG4                      0x86
-#define MSG_REG5                      0x87
-#define MSG_REG6                      0x88
-#define MSG_REG7                      0x89
-#define MSG_REG8                      0x8A
-#define MSG_REG9                      0x8B
-#define MSG_REGA                      0x8C
-#define MSG_REGB                      0x8D
-#define MSG_REGC                      0x8E
-#define MSG_REGD                      0x8F
-
-#define DISABLED                      0
-#define ENABLED                       1
-
-
-
-///
-/// EC structure
-///
-typedef struct _FCH_EC {
-  UINT8                 MsgFun81Zone0MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun81Zone0MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun81Zone0MsgReg2;           ///<Thermal zone control byte 1
-  UINT8                 MsgFun81Zone0MsgReg3;           ///<Thermal zone control byte 2
-  UINT8                 MsgFun81Zone0MsgReg4;           ///<Bit[3:0] - Thermal diode offset adjustment in degrees Celsius.
-  UINT8                 MsgFun81Zone0MsgReg5;           ///<Hysteresis information
-  UINT8                 MsgFun81Zone0MsgReg6;           ///<SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032
-  UINT8                 MsgFun81Zone0MsgReg7;           ///<Bit[1:0]: 0 - 2,  SMBUS bus number where the SMBUS based temperature sensor is located.
-  UINT8                 MsgFun81Zone0MsgReg8;           ///<Fan PWM stepping rate in unit of PWM level percentage
-  UINT8                 MsgFun81Zone0MsgReg9;           ///<Fan PWM ramping rate in 5ms unit
-//
-// EC LDN9 function 81 zone 1
-//
-  UINT8                 MsgFun81Zone1MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun81Zone1MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun81Zone1MsgReg2;           ///<Thermal zone control byte 1
-  UINT8                 MsgFun81Zone1MsgReg3;           ///<Thermal zone control byte 2
-  UINT8                 MsgFun81Zone1MsgReg4;           ///<Bit[3:0] - Thermal diode offset adjustment in degrees Celsius.
-  UINT8                 MsgFun81Zone1MsgReg5;           ///<Hysteresis information
-  UINT8                 MsgFun81Zone1MsgReg6;           ///<SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032
-  UINT8                 MsgFun81Zone1MsgReg7;           ///<Bit[1:0]: 0 - 2,  SMBUS bus number where the SMBUS based temperature sensor is located.
-  UINT8                 MsgFun81Zone1MsgReg8;           ///<Fan PWM stepping rate in unit of PWM level percentage
-  UINT8                 MsgFun81Zone1MsgReg9;           ///<Fan PWM ramping rate in 5ms unit
-//
-//EC LDN9 function 81 zone 2
-//
-  UINT8                 MsgFun81Zone2MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun81Zone2MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun81Zone2MsgReg2;           ///<Thermal zone control byte 1
-  UINT8                 MsgFun81Zone2MsgReg3;           ///<Thermal zone control byte 2
-  UINT8                 MsgFun81Zone2MsgReg4;           ///<Bit[3:0] - Thermal diode offset adjustment in degrees Celsius.
-  UINT8                 MsgFun81Zone2MsgReg5;           ///<Hysteresis information
-  UINT8                 MsgFun81Zone2MsgReg6;           ///<SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032
-  UINT8                 MsgFun81Zone2MsgReg7;           ///<Bit[1:0]: 0 - 2,  SMBUS bus number where the SMBUS based temperature sensor is located.
-  UINT8                 MsgFun81Zone2MsgReg8;           ///<Fan PWM stepping rate in unit of PWM level percentage
-  UINT8                 MsgFun81Zone2MsgReg9;           ///<Fan PWM ramping rate in 5ms unit
-//
-//EC LDN9 function 81 zone 3
-//
-  UINT8                 MsgFun81Zone3MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun81Zone3MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun81Zone3MsgReg2;           ///<Thermal zone control byte 1
-  UINT8                 MsgFun81Zone3MsgReg3;           ///<Thermal zone control byte 2
-  UINT8                 MsgFun81Zone3MsgReg4;           ///<Bit[3:0] - Thermal diode offset adjustment in degrees Celsius.
-  UINT8                 MsgFun81Zone3MsgReg5;           ///<Hysteresis information
-  UINT8                 MsgFun81Zone3MsgReg6;           ///<SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032
-  UINT8                 MsgFun81Zone3MsgReg7;           ///<Bit[1:0]: 0 - 2,  SMBUS bus number where the SMBUS based temperature sensor is located.
-  UINT8                 MsgFun81Zone3MsgReg8;           ///<Fan PWM stepping rate in unit of PWM level percentage
-  UINT8                 MsgFun81Zone3MsgReg9;           ///<Fan PWM ramping rate in 5ms unit
-//
-//EC LDN9 function 83 zone 0
-//
-  UINT8                 MsgFun83Zone0MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun83Zone0MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun83Zone0MsgReg2;           ///<_AC0
-  UINT8                 MsgFun83Zone0MsgReg3;           ///<_AC1
-  UINT8                 MsgFun83Zone0MsgReg4;           ///<_AC2
-  UINT8                 MsgFun83Zone0MsgReg5;           ///<_AC3
-  UINT8                 MsgFun83Zone0MsgReg6;           ///<_AC4
-  UINT8                 MsgFun83Zone0MsgReg7;           ///<_AC5
-  UINT8                 MsgFun83Zone0MsgReg8;           ///<_AC6
-  UINT8                 MsgFun83Zone0MsgReg9;           ///<_AC7
-  UINT8                 MsgFun83Zone0MsgRegA;           ///<_CRT
-  UINT8                 MsgFun83Zone0MsgRegB;           ///<_PSV
-//
-//EC LDN9 function 83 zone 1
-//
-  UINT8                 MsgFun83Zone1MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun83Zone1MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun83Zone1MsgReg2;           ///<_AC0
-  UINT8                 MsgFun83Zone1MsgReg3;           ///<_AC1
-  UINT8                 MsgFun83Zone1MsgReg4;           ///<_AC2
-  UINT8                 MsgFun83Zone1MsgReg5;           ///<_AC3
-  UINT8                 MsgFun83Zone1MsgReg6;           ///<_AC4
-  UINT8                 MsgFun83Zone1MsgReg7;           ///<_AC5
-  UINT8                 MsgFun83Zone1MsgReg8;           ///<_AC6
-  UINT8                 MsgFun83Zone1MsgReg9;           ///<_AC7
-  UINT8                 MsgFun83Zone1MsgRegA;           ///<_CRT
-  UINT8                 MsgFun83Zone1MsgRegB;           ///<_PSV
-//
-//EC LDN9 function 83 zone 2
-//
-  UINT8                 MsgFun83Zone2MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun83Zone2MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun83Zone2MsgReg2;           ///<_AC0
-  UINT8                 MsgFun83Zone2MsgReg3;           ///<_AC1
-  UINT8                 MsgFun83Zone2MsgReg4;           ///<_AC2
-  UINT8                 MsgFun83Zone2MsgReg5;           ///<_AC3
-  UINT8                 MsgFun83Zone2MsgReg6;           ///<_AC4
-  UINT8                 MsgFun83Zone2MsgReg7;           ///<_AC5
-  UINT8                 MsgFun83Zone2MsgReg8;           ///<_AC6
-  UINT8                 MsgFun83Zone2MsgReg9;           ///<_AC7
-  UINT8                 MsgFun83Zone2MsgRegA;           ///<_CRT
-  UINT8                 MsgFun83Zone2MsgRegB;           ///<_PSV
-//
-//EC LDN9 function 83 zone 3
-//
-  UINT8                 MsgFun83Zone3MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun83Zone3MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun83Zone3MsgReg2;           ///<_AC0
-  UINT8                 MsgFun83Zone3MsgReg3;           ///<_AC1
-  UINT8                 MsgFun83Zone3MsgReg4;           ///<_AC2
-  UINT8                 MsgFun83Zone3MsgReg5;           ///<_AC3
-  UINT8                 MsgFun83Zone3MsgReg6;           ///<_AC4
-  UINT8                 MsgFun83Zone3MsgReg7;           ///<_AC5
-  UINT8                 MsgFun83Zone3MsgReg8;           ///<_AC6
-  UINT8                 MsgFun83Zone3MsgReg9;           ///<_AC7
-  UINT8                 MsgFun83Zone3MsgRegA;           ///<_CRT
-  UINT8                 MsgFun83Zone3MsgRegB;           ///<_PSV
-//
-//EC LDN9 function 85 zone 0
-//
-  UINT8                 MsgFun85Zone0MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun85Zone0MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun85Zone0MsgReg2;           ///<AL0 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg3;           ///<AL1 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg4;           ///<AL2 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg5;           ///<AL3 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg6;           ///<AL4 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg7;           ///<AL5 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg8;           ///<AL6 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone0MsgReg9;           ///<AL7 PWM level in percentage (0 - 100%)
-//
-//EC LDN9 function 85 zone 1
-//
-  UINT8                 MsgFun85Zone1MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun85Zone1MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun85Zone1MsgReg2;           ///<AL0 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg3;           ///<AL1 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg4;           ///<AL2 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg5;           ///<AL3 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg6;           ///<AL4 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg7;           ///<AL5 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg8;           ///<AL6 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone1MsgReg9;           ///<AL7 PWM level in percentage (0 - 100%)
-//
-//EC LDN9 function 85 zone 2
-//
-  UINT8                 MsgFun85Zone2MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun85Zone2MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun85Zone2MsgReg2;           ///<AL0 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg3;           ///<AL1 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg4;           ///<AL2 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg5;           ///<AL3 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg6;           ///<AL4 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg7;           ///<AL5 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg8;           ///<AL6 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone2MsgReg9;           ///<AL7 PWM level in percentage (0 - 100%)
-//
-//EC LDN9 function 85 zone 3
-//
-  UINT8                 MsgFun85Zone3MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun85Zone3MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun85Zone3MsgReg2;           ///<AL0 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg3;           ///<AL1 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg4;           ///<AL2 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg5;           ///<AL3 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg6;           ///<AL4 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg7;           ///<AL5 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg8;           ///<AL6 PWM level in percentage (0 - 100%)
-  UINT8                 MsgFun85Zone3MsgReg9;           ///<AL7 PWM level in percentage (0 - 100%)
-//
-//EC LDN9 function 89 TEMPIN channel 0
-//
-  UINT8                 MsgFun89Zone0MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun89Zone0MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun89Zone0MsgReg2;           ///<At DWORD bit 0-7
-  UINT8                 MsgFun89Zone0MsgReg3;           ///<At DWORD bit 15-8
-  UINT8                 MsgFun89Zone0MsgReg4;           ///<At DWORD bit 23-16
-  UINT8                 MsgFun89Zone0MsgReg5;           ///<At DWORD bit 31-24
-  UINT8                 MsgFun89Zone0MsgReg6;           ///<Ct DWORD bit 0-7
-  UINT8                 MsgFun89Zone0MsgReg7;           ///<Ct DWORD bit 15-8
-  UINT8                 MsgFun89Zone0MsgReg8;           ///<Ct DWORD bit 23-16
-  UINT8                 MsgFun89Zone0MsgReg9;           ///<Ct DWORD bit 31-24
-  UINT8                 MsgFun89Zone0MsgRegA;           ///<Mode bit 0-7
-//
-//EC LDN9 function 89 TEMPIN channel 1
-//
-  UINT8                 MsgFun89Zone1MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun89Zone1MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun89Zone1MsgReg2;           ///<At DWORD bit 0-7
-  UINT8                 MsgFun89Zone1MsgReg3;           ///<At DWORD bit 15-8
-  UINT8                 MsgFun89Zone1MsgReg4;           ///<At DWORD bit 23-16
-  UINT8                 MsgFun89Zone1MsgReg5;           ///<At DWORD bit 31-24
-  UINT8                 MsgFun89Zone1MsgReg6;           ///<Ct DWORD bit 0-7
-  UINT8                 MsgFun89Zone1MsgReg7;           ///<Ct DWORD bit 15-8
-  UINT8                 MsgFun89Zone1MsgReg8;           ///<Ct DWORD bit 23-16
-  UINT8                 MsgFun89Zone1MsgReg9;           ///<Ct DWORD bit 31-24
-  UINT8                 MsgFun89Zone1MsgRegA;           ///<Mode bit 0-7
-//
-//EC LDN9 function 89 TEMPIN channel 2
-//
-  UINT8                 MsgFun89Zone2MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun89Zone2MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun89Zone2MsgReg2;           ///<At DWORD bit 0-7
-  UINT8                 MsgFun89Zone2MsgReg3;           ///<At DWORD bit 15-8
-  UINT8                 MsgFun89Zone2MsgReg4;           ///<At DWORD bit 23-16
-  UINT8                 MsgFun89Zone2MsgReg5;           ///<At DWORD bit 31-24
-  UINT8                 MsgFun89Zone2MsgReg6;           ///<Ct DWORD bit 0-7
-  UINT8                 MsgFun89Zone2MsgReg7;           ///<Ct DWORD bit 15-8
-  UINT8                 MsgFun89Zone2MsgReg8;           ///<Ct DWORD bit 23-16
-  UINT8                 MsgFun89Zone2MsgReg9;           ///<Ct DWORD bit 31-24
-  UINT8                 MsgFun89Zone2MsgRegA;           ///<Mode bit 0-7
-//
-//EC LDN9 function 89 TEMPIN channel 3
-//
-  UINT8                 MsgFun89Zone3MsgReg0;           ///<Thermal zone
-  UINT8                 MsgFun89Zone3MsgReg1;           ///<Thermal zone
-  UINT8                 MsgFun89Zone3MsgReg2;           ///<At DWORD bit 0-7
-  UINT8                 MsgFun89Zone3MsgReg3;           ///<At DWORD bit 15-8
-  UINT8                 MsgFun89Zone3MsgReg4;           ///<At DWORD bit 23-16
-  UINT8                 MsgFun89Zone3MsgReg5;           ///<At DWORD bit 31-24
-  UINT8                 MsgFun89Zone3MsgReg6;           ///<Ct DWORD bit 0-7
-  UINT8                 MsgFun89Zone3MsgReg7;           ///<Ct DWORD bit 15-8
-  UINT8                 MsgFun89Zone3MsgReg8;           ///<Ct DWORD bit 23-16
-  UINT8                 MsgFun89Zone3MsgReg9;           ///<Ct DWORD bit 31-24
-  UINT8                 MsgFun89Zone3MsgRegA;           ///<Mode bit 0-7
-//
-// FLAG for Fun83/85/89 support
-//
-  UINT16                IMCFUNSupportBitMap;            ///< Bit0=81FunZone0 support(1=On;0=Off); bit1-3=81FunZone1-Zone3;Bit4-7=83FunZone0-Zone3;Bit8-11=85FunZone0-Zone3;Bit11-15=89FunZone0-Zone3;
-} FCH_EC;
-
-///
-/// IMC structure
-///
-typedef struct _FCH_IMC {
-  UINT8                 ImcEnable;                      ///< ImcEnable - IMC Enable
-  UINT8                 ImcEnabled;                     ///< ImcEnabled - IMC Enable
-  UINT8                 ImcSureBootTimer;               ///< ImcSureBootTimer - IMc SureBootTimer function
-  FCH_EC                EcStruct;                       ///< EC structure
-  UINT8                 ImcEnableOverWrite;             ///< OverWrite IMC with the EC structure
-                                                        ///   @li <b>00</b> - by default strapping
-                                                        ///   @li <b>01</b> - enable
-                                                        ///   @li <b>10</b> - disable
-                                                        ///
-} FCH_IMC;
-
-
-///
-/// Hpet structure
-///
-typedef struct {
-  BOOLEAN               HpetEnable;                     ///< HPET function switch
-
-  BOOLEAN               HpetMsiDis;                     ///< HpetMsiDis - South Bridge HPET MSI Configuration
-                                                        ///   @par
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT32                HpetBase;                       ///< HpetBase
-                                                        ///   @par
-                                                        ///  HPET Base address
-} FCH_HPET;
-
-
-///
-/// GCPU related parameters
-///
-typedef struct {
-  UINT8                 AcDcMsg;                        ///< Send a message to CPU to indicate the power mode (AC vs battery)
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 TimerTickTrack;                 ///< Send a message to CPU to indicate the latest periodic timer interval
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 ClockInterruptTag;              ///< Mark the periodic timer interrupt
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 OhciTrafficHanding;             ///< Cause CPU to break out from C state when USB OHCI has pending traffic
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 EhciTrafficHanding;             ///< Cause CPU to break out from C state when USB EHCI has pending traffic
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 GcpuMsgCMultiCore;              ///< Track of CPU C state by monitoring each core's C state message
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-
-  UINT8                 GcpuMsgCStage;                  ///< Enable the FCH C state coordination logic
-                                                        ///   @li <b>1</b> - disable
-                                                        ///   @li <b>0</b> - enable
-} FCH_GCPU;
-
-
-///
-/// Timer
-///
-typedef struct {
-  BOOLEAN               Enable;                         ///< Whether to register timer SMI in POST
-  BOOLEAN               StartNow;                       ///< Whether to start the SMI immediately during registration
-  UINT16                CycleDuration;                  ///< [14:0] - Actual cycle duration = CycleDuration + 1
-} TIMER_SMI;
-
-///
-/// CS support
-///
-typedef struct {
-  BOOLEAN               FchCsD3Cold;                    ///< FCH Cs D3 Cold function
-  BOOLEAN               FchCsHwReduced;                 ///< FCH Cs hardware reduced ACPI flag
-  BOOLEAN               FchCsPwrBtn;                    ///< FCH Cs Power Button function
-  BOOLEAN               FchCsAcDc;                      ///< FCH Cs AcDc function
-  BOOLEAN               AsfNfcEnable;                   ///< FCH Cs NFC function
-  UINT8                 AsfNfcInterruptPin;             ///<    NFC Interrupt pin define
-  UINT8                 AsfNfcRegPuPin;                 ///<    NFC RegPu pin define
-  UINT8                 AsfNfcWakePin;                  ///<    NFC Wake Pin define
-  UINT8                 PowerButtonGpe;                 ///<    GPE# used by Power Button device
-  UINT8                 AcDcTimerGpe;                   ///<    GPE# used by Timer device
-} FCH_CS;
-
-
-///
-/// MISC structure
-///
-typedef struct {
-  BOOLEAN               NativePcieSupport;              /// PCIe NativePcieSupport - Debug function. 1:Enabled, 0:Disabled
-  BOOLEAN               S3Resume;                       /// S3Resume - Flag of ACPI S3 Resume.
-  BOOLEAN               RebootRequired;                 /// RebootRequired - Flag of Reboot system is required.
-  UINT8                 FchVariant;                     /// FchVariant - FCH Variant value.
-  UINT8                 Cg2Pll;                         ///< CG2 PLL - 0:disable, 1:enable
-  TIMER_SMI             LongTimer;                      ///< Long Timer SMI
-  TIMER_SMI             ShortTimer;                     ///< Short Timer SMI
-  UINT32                FchCpuId;                       ///< Saving CpuId for FCH Module.
-  BOOLEAN               NoneSioKbcSupport;              ///< NoneSioKbcSupport - No KBC/SIO controller ( Turn on Inchip KBC emulation function )
-  FCH_CS                FchCsSupport;                   ///< FCH Cs function structure
-} FCH_MISC;
-
-
-///
-/// SMBus structure
-///
-typedef struct {
-  UINT32                SmbusSsid;                      ///< SMBUS controller Subsystem ID
-} FCH_SMBUS;
-
-
-///
-/// Acpi structure
-///
-typedef struct {
-  UINT16                Smbus0BaseAddress;              ///< Smbus0BaseAddress
-                                                        ///   @par
-                                                        ///  Smbus BASE Address
-                                                        ///
-  UINT16                Smbus1BaseAddress;              ///< Smbus1BaseAddress
-                                                        ///   @par
-                                                        ///  Smbus1 (ASF) BASE Address
-                                                        ///
-  UINT16                SioPmeBaseAddress;              ///< SioPmeBaseAddress
-                                                        ///   @par
-                                                        ///  SIO PME BASE Address
-                                                        ///
-  UINT32                WatchDogTimerBase;              ///< WatchDogTimerBase
-                                                        ///   @par
-                                                        ///  Watch Dog Timer Address
-                                                        ///
-  UINT16                AcpiPm1EvtBlkAddr;              ///< AcpiPm1EvtBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI PM1 event block Address
-                                                        ///
-  UINT16                AcpiPm1CntBlkAddr;              ///< AcpiPm1CntBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI PM1 Control block Address
-                                                        ///
-  UINT16                AcpiPmTmrBlkAddr;               ///< AcpiPmTmrBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI PM timer block Address
-                                                        ///
-  UINT16                CpuControlBlkAddr;              ///< CpuControlBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI CPU control block Address
-                                                        ///
-  UINT16                AcpiGpe0BlkAddr;                ///< AcpiGpe0BlkAddr
-                                                        ///   @par
-                                                        ///  ACPI GPE0 block Address
-                                                        ///
-  UINT16                SmiCmdPortAddr;                 ///< SmiCmdPortAddr
-                                                        ///   @par
-                                                        ///  SMI command port Address
-                                                        ///
-  UINT16                AcpiPmaCntBlkAddr;              ///< AcpiPmaCntBlkAddr
-                                                        ///   @par
-                                                        ///  ACPI PMA Control block Address
-                                                        ///
-  BOOLEAN               AnyHt200MhzLink;                ///< AnyHt200MhzLink
-                                                        ///   @par
-                                                        ///  HT Link Speed on 200MHz option for each CPU specific LDTSTP# (Force enable)
-                                                        ///
-  BOOLEAN               SpreadSpectrum;                 ///< SpreadSpectrum
-                                                        ///  @par
-                                                        ///  Spread Spectrum function
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  POWER_FAIL            PwrFailShadow;                  ///< PwrFailShadow = PM_Reg: 5Bh [3:0]
-                                                        ///  @par
-                                                        ///   @li  <b>00</b> - Always off
-                                                        ///   @li  <b>01</b> - Always on
-                                                        ///   @li  <b>11</b> - Use previous
-                                                        ///
-  UINT8                 StressResetMode;                ///< StressResetMode 01-10
-                                                        ///   @li  <b>00</b> - Disabed
-                                                        ///   @li  <b>01</b> - Io Write 0x64 with 0xfe
-                                                        ///   @li  <b>10</b> - Io Write 0xcf9 with 0x06
-                                                        ///   @li  <b>11</b> - Io Write 0xcf9 with 0x0e
-                                                        ///
-  BOOLEAN               MtC1eEnable;                    /// MtC1eEnable - Enable MtC1e
-  VOID*                 OemProgrammingTablePtr;         /// Pointer of ACPI OEM table
-  UINT8                 SpreadSpectrumOptions;          /// SpreadSpectrumOptions - Spread Spectrum Option
-} FCH_ACPI;
-
-
-///
-/// HWM temp parameter structure
-///
-typedef struct _FCH_HWM_TEMP_PAR {
-  UINT16                At;                             ///< At
-  UINT16                Ct;                             ///< Ct
-  UINT8                 Mode;                           ///< Mode BIT0:HiRatio BIT1:HiCurrent
-} FCH_HWM_TEMP_PAR;
-
-///
-/// HWM Current structure
-///
-typedef struct _FCH_HWM_CUR {
-  UINT16                FanSpeed[5];                    ///< FanSpeed    - fan Speed
-  UINT16                Temperature[5];                 ///< Temperature - temperature
-  UINT16                Voltage[8];                     ///< Voltage     - voltage
-} FCH_HWM_CUR;
-
-///
-/// HWM fan control structure
-///
-typedef struct _FCH_HWM_FAN_CTR {
-  UINT8                 InputControlReg00;              /// Fan Input Control register, PM2 offset [0:4]0
-  UINT8                 ControlReg01;                   /// Fan control register, PM2 offset [0:4]1
-  UINT8                 FreqReg02;                      /// Fan frequency register, PM2 offset [0:4]2
-  UINT8                 LowDutyReg03;                   /// Low Duty register, PM2 offset [0:4]3
-  UINT8                 MedDutyReg04;                   /// Med Duty register, PM2 offset [0:4]4
-  UINT8                 MultiplierReg05;                /// Multiplier register, PM2 offset [0:4]5
-  UINT16                LowTempReg06;                   /// Low Temp register, PM2 offset [0:4]6
-  UINT16                MedTempReg08;                   /// Med Temp register, PM2 offset [0:4]8
-  UINT16                HighTempReg0A;                  /// High Temp register, PM2 offset [0:4]A
-  UINT8                 LinearRangeReg0C;               /// Linear Range register, PM2 offset [0:4]C
-  UINT8                 LinearHoldCountReg0D;           /// Linear Hold Count register, PM2 offset [0:4]D
-} FCH_HWM_FAN_CTR;
-
-///
-/// Hwm structure
-///
-typedef struct _FCH_HWM {
-  UINT8                 HwMonitorEnable;                ///< HwMonitorEnable
-  UINT32                HwmControl;                     ///< hwmControl
-                                                        ///   @par
-                                                        ///  HWM control configuration
-                                                        ///   @li <b>0</b> - HWM is Enabled
-                                                        ///   @li <b>1</b> - IMC is Enabled
-                                                        ///
-  UINT8                 FanSampleFreqDiv;               ///< Sampling rate of Fan Speed
-                                                        ///   @li <b>00</b> - Base(22.5KHz)
-                                                        ///   @li <b>01</b> - Base(22.5KHz)/2
-                                                        ///   @li <b>10</b> - Base(22.5KHz)/4
-                                                        ///   @li <b>11</b> - Base(22.5KHz)/8
-                                                        ///
-  UINT8                 HwmFchtsiAutoPoll;              ///< TSI Auto Polling
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  UINT8                 HwmFchtsiAutoPollStarted;       ///< HwmSbtsiAutoPollStarted
-  UINT8                 FanLinearEnhanceEn;             ///< FanLinearEnhanceEn
-  UINT8                 FanLinearHoldFix;               ///< FanLinearHoldFix
-  UINT8                 FanLinearRangeOutLimit;         ///< FanLinearRangeOutLimit
-  UINT16                HwmCalibrationFactor;           /// Calibration Factor
-  FCH_HWM_CUR           HwmCurrent;                     /// HWM Current structure
-  FCH_HWM_CUR           HwmCurrentRaw;                  /// HWM Current Raw structure
-  FCH_HWM_TEMP_PAR      HwmTempPar[5];                  /// HWM Temp parameter structure
-  FCH_HWM_FAN_CTR       HwmFanControl[5];               /// HWM Fan Control structure
-  FCH_HWM_FAN_CTR       HwmFanControlCooked[5];               /// HWM Fan Control structure
-} FCH_HWM;
-
-
-///
-/// Gec structure
-///
-typedef struct {
-  BOOLEAN               GecEnable;                      ///< GecEnable - GEC function switch
-  UINT8                 GecPhyStatus;                   /// GEC PHY Status
-  UINT8                 GecPowerPolicy;                 /// GEC Power Policy
-                                                        ///   @li <b>00</b> - GEC is powered down in S3 and S5
-                                                        ///   @li <b>01</b> - GEC is powered down only in S5
-                                                        ///   @li <b>10</b> - GEC is powered down only in S3
-                                                        ///   @li <b>11</b> - GEC is never powered down
-                                                        ///
-  UINT8                 GecDebugBus;                    /// GEC Debug Bus
-                                                        ///   @li <b>0</b> - disable
-                                                        ///   @li <b>1</b> - enable
-                                                        ///
-  UINT32                GecShadowRomBase;               ///< GecShadowRomBase
-                                                        ///   @par
-                                                        ///  GEC (NIC) SHADOWROM BASE Address
-                                                        ///
-  VOID                  *PtrDynamicGecRomAddress;       /// Pointer of Dynamic GEC ROM Address
-} FCH_GEC;
-
-
-///
-/// _ABTblEntry - AB link register table R/W structure
-///
-typedef struct _AB_TBL_ENTRY {
-  UINT8                 RegType;                        /// RegType  : AB Register Type (ABCFG, AXCFG and so on)
-  UINT32                RegIndex;                       /// RegIndex : AB Register Index
-  UINT32                RegMask;                        /// RegMask  : AB Register Mask
-  UINT32                RegData;                        /// RegData  : AB Register Data
-} AB_TBL_ENTRY;
-
-///
-/// AB structure
-///
-typedef struct {
-  BOOLEAN               AbMsiEnable;                    ///< ABlink MSI capability
-  UINT8                 ALinkClkGateOff;                /// Alink Clock Gate-Off function - 0:disable, 1:enable *KR
-  UINT8                 BLinkClkGateOff;                /// Blink Clock Gate-Off function - 0:disable, 1:enable *KR
-  UINT8                 AbClockGating;                  /// AB Clock Gating - 0:disable, 1:enable *KR
-  UINT8                 GppClockGating;                 /// GPP Clock Gating - 0:disable, 1:enable
-  UINT8                 UmiL1TimerOverride;             /// UMI L1 inactivity timer overwrite value
-  UINT8                 UmiLinkWidth;                   /// UMI Link Width
-  UINT8                 UmiDynamicSpeedChange;          /// UMI Dynamic Speed Change - 0:disable, 1:enable
-  UINT8                 PcieRefClockOverClocking;       /// PCIe Ref Clock OverClocking value
-  UINT8                 UmiGppTxDriverStrength;         /// UMI GPP TX Driver Strength
-  BOOLEAN               NbSbGen2;                       /// UMI link Gen2 - 0:Gen1, 1:Gen2
-  UINT8                 PcieOrderRule;                  /// PCIe Order Rule - 0:disable, 1:enable *KR AB Posted Pass Non-Posted
-  UINT8                 SlowSpeedAbLinkClock;           /// Slow Speed AB Link Clock - 0:disable, 1:enable *KR
-  BOOLEAN               ResetCpuOnSyncFlood;            /// Reset Cpu On Sync Flood - 0:disable, 1:enable *KR
-  BOOLEAN               AbDmaMemoryWrtie3264B;          /// AB DMA Memory Write 32/64 BYTE Support *KR only
-  BOOLEAN               AbMemoryPowerSaving;            /// AB Memory Power Saving *KR only
-  BOOLEAN               SbgDmaMemoryWrtie3264ByteCount; /// SBG DMA Memory Write 32/64 BYTE Count Support *KR only
-  BOOLEAN               SbgMemoryPowerSaving;           /// SBG Memory Power Saving *KR only
-} FCH_AB;
-
-
-/**
- * PCIE_CAP_ID - PCIe Cap ID
- *
- */
-#define  PCIE_CAP_ID    0x10
-
-///
-/// FCH_GPP_PORT_CONFIG - Fch GPP port config structure
-///
-typedef struct {
-  BOOLEAN               PortPresent;                    ///< Port connection
-                                                        ///  @par
-                                                        ///  @li <b>0</b> - Port doesn't have slot. No need to train the link
-                                                        ///  @li <b>1</b> - Port connection defined and needs to be trained
-                                                        ///
-  BOOLEAN               PortDetected;                   ///< Link training status
-                                                        ///  @par
-                                                        ///  @li <b>0</b> - EP not detected
-                                                        ///  @li <b>1</b> - EP detected
-                                                        ///
-  BOOLEAN               PortIsGen2;                     ///< Port link speed configuration
-                                                        ///  @par
-                                                        ///  @li <b>00</b> - Auto
-                                                        ///  @li <b>01</b> - Forced GEN1
-                                                        ///  @li <b>10</b> - Forced GEN2
-                                                        ///  @li <b>11</b> - Reserved
-                                                        ///
-  BOOLEAN               PortHotPlug;                    ///< Support hot plug?
-                                                        ///  @par
-                                                        ///  @li <b>0</b> - No support
-                                                        ///  @li <b>1</b> - support
-                                                        ///
-  UINT8                 PortMisc;                       ///  PortMisc - Reserved
-} FCH_GPP_PORT_CONFIG;
-
-///
-/// GPP structure
-///
-typedef struct {
-  FCH_GPP_PORT_CONFIG   PortCfg[4];                     /// GPP port configuration structure
-  GPP_LINKMODE          GppLinkConfig;                  ///< GppLinkConfig - PCIE_GPP_Enable[3:0]
-                                                        ///  @li  <b>0000</b> - Port ABCD -> 4:0:0:0
-                                                        ///  @li  <b>0010</b> - Port ABCD -> 2:2:0:0
-                                                        ///  @li  <b>0011</b> - Port ABCD -> 2:1:1:0
-                                                        ///  @li  <b>0100</b> - Port ABCD -> 1:1:1:1
-                                                        ///
-  BOOLEAN               GppFunctionEnable;              ///< GPP Function - 0:disable, 1:enable
-  BOOLEAN               GppToggleReset;                 ///< Toggle GPP core reset
-  UINT8                 GppHotPlugGeventNum;            ///< Hotplug GEVENT # - valid value 0-31
-  UINT8                 GppFoundGfxDev;                 ///< Gpp Found Gfx Device
-                                                        ///  @li   <b>0</b> - Not found
-                                                        ///  @li   <b>1</b> - Found
-                                                        ///
-  BOOLEAN               GppGen2;                        ///< GPP Gen2 - 0:disable, 1:enable
-  UINT8                 GppGen2Strap;                   ///< GPP Gen2 Strap - 0:disable, 1:enable, FCH itself uses this
-  BOOLEAN               GppMemWrImprove;                ///< GPP Memory Write Improve - 0:disable, 1:enable
-  BOOLEAN               GppUnhidePorts;                 ///< GPP Unhide Ports - 0:disable, 1:enable
-  UINT8                 GppPortAspm;                    ///< GppPortAspm - ASPM state for all GPP ports
-                                                        ///  @li   <b>01</b> - Disabled
-                                                        ///  @li   <b>01</b> - L0s
-                                                        ///  @li   <b>10</b> - L1
-                                                        ///  @li   <b>11</b> - L0s + L1
-                                                        ///
-  BOOLEAN               GppLaneReversal;                ///< GPP Lane Reversal - 0:disable, 1:enable
-  BOOLEAN               GppPhyPllPowerDown;             ///< GPP PHY PLL Power Down - 0:disable, 1:enable
-  BOOLEAN               GppDynamicPowerSaving;          ///< GPP Dynamic Power Saving - 0:disable, 1:enable
-  BOOLEAN               PcieAer;                        ///< PcieAer - Advanced Error Report: 0/1-disable/enable
-  BOOLEAN               PcieRas;                        ///< PCIe RAS - 0:disable, 1:enable
-  BOOLEAN               PcieCompliance;                 ///< PCIe Compliance - 0:disable, 1:enable
-  BOOLEAN               PcieSoftwareDownGrade;          ///< PCIe Software Down Grade
-  BOOLEAN               UmiPhyPllPowerDown;             ///< UMI PHY PLL Power Down - 0:disable, 1:enable
-  BOOLEAN               SerialDebugBusEnable;           ///< Serial Debug Bus Enable
-  UINT8                 GppHardwareDownGrade;           ///< GppHardwareDownGrade - Gpp HW Down Grade function 0:Disable, 1-4: portA-D
-  UINT8                 GppL1ImmediateAck;              ///< GppL1ImmediateAck - Gpp L1 Immediate ACK 0: enable, 1: disable
-  BOOLEAN               NewGppAlgorithm;                ///< NewGppAlgorithm - New GPP procedure
-  UINT8                 HotPlugPortsStatus;             ///< HotPlugPortsStatus - Save Hot-Plug Ports Status
-  UINT8                 FailPortsStatus;                ///< FailPortsStatus - Save Failure Ports Status
-  UINT8                 GppPortMinPollingTime;          ///< GppPortMinPollingTime - Min. Polling time for Gpp Port Training
-  BOOLEAN               IsCapsuleMode;                  ///< IsCapsuleMode - Support Capsule Mode in FCH
-} FCH_GPP;
-
-/// FCH USB Over Current Data Block
-typedef struct {
-  UINT8        Usb1OcPinMap[5];       ///< USB1 over current pin mapping
-  UINT8        Usb2OcPinMap[5];       ///< USB2 over current pin mapping
-  UINT8        Usb3OcPinMap[4];       ///< USB3 over current pin mapping
-  UINT8        Usb4OcPinMap[2];       ///< USB4 over current pin mapping
-  UINT8        Xhci0OcPinMap[2];      ///< XHCI0 over current pin mapping
-  UINT8        Xhci1OcPinMap[2];      ///< XHCI1 over current pin mapping
-} FCH_USB_OC;
-
-
-///
-/// FCH USB sturcture
-///
-typedef struct {
-  BOOLEAN               Ohci1Enable;                    ///< OHCI1 controller enable
-  BOOLEAN               Ohci2Enable;                    ///< OHCI2 controller enable
-  BOOLEAN               Ohci3Enable;                    ///< OHCI3 controller enable
-  BOOLEAN               Ohci4Enable;                    ///< OHCI4 controller enable
-  BOOLEAN               Ehci1Enable;                    ///< EHCI1 controller enable
-  BOOLEAN               Ehci2Enable;                    ///< EHCI2 controller enable
-  BOOLEAN               Ehci3Enable;                    ///< EHCI3 controller enable
-  BOOLEAN               Xhci0Enable;                    ///< XHCI0 controller enable
-  BOOLEAN               Xhci1Enable;                    ///< XHCI1 controller enable
-  BOOLEAN               UsbMsiEnable;                   ///< USB MSI capability
-  UINT32                OhciSsid;                       ///< OHCI SSID
-  UINT32                Ohci4Ssid;                      ///< OHCI 4 SSID
-  UINT32                EhciSsid;                       ///< EHCI SSID
-  UINT32                XhciSsid;                       ///< XHCI SSID
-  BOOLEAN               UsbPhyPowerDown;                ///< USB PHY Power Down - 0:disable, 1:enable
-  UINT32                UserDefineXhciRomAddr;          ///< XHCI ROM address define by platform BIOS
-  UINT8                 Ehci1Phy[5];                    ///< EHCI1 USB PHY Driving Strength value table
-  UINT8                 Ehci2Phy[5];                    ///< EHCI2 USB PHY Driving Strength value table
-  UINT8                 Ehci3Phy[4];                    ///< EHCI3 USB PHY Driving Strength value table
-  UINT8                 Xhci20Phy[4];                   ///< XHCI USB 2.0 PHY Driving Strength value table
-  UINT8                 Ehci1DebugPortSel;              ///< DebugPortSel for Ehci1 Hub
-                                                        ///  @li   <b>000</b> - Disable
-                                                        ///  @li   <b>001</b> - HubDownStreamPort0
-                                                        ///  @li   <b>010</b> - HubDownStreamPort1
-                                                        ///  @li   <b>011</b> - HubDownStreamPort2
-                                                        ///  @li   <b>100</b> - HubDownStreamPort3
-  UINT8                 Ehci2DebugPortSel;              ///< DebugPortSel for Ehci2 Hub
-                                                        ///  @li   <b>000</b> - Disable
-                                                        ///  @li   <b>001</b> - HubDownStreamPort0
-                                                        ///  @li   <b>010</b> - HubDownStreamPort1
-                                                        ///  @li   <b>011</b> - HubDownStreamPort2
-                                                        ///  @li   <b>100</b> - HubDownStreamPort3
-  UINT8                 Ehci3DebugPortSel;              ///< DebugPortSel for Ehci3 Hub
-                                                        ///  @li   <b>000</b> - Disable
-                                                        ///  @li   <b>001</b> - HubDownStreamPort0
-                                                        ///  @li   <b>010</b> - HubDownStreamPort1
-                                                        ///  @li   <b>011</b> - HubDownStreamPort2
-                                                        ///  @li   <b>100</b> - HubDownStreamPort3
-  FCH_USB_OC            FchUsbOcMap;                    ///< Fch USB OC Map
-} FCH_USB;
-
-
-/// Private: FCH_DATA_BLOCK_RESET
-typedef struct _FCH_RESET_DATA_BLOCK {
-  AMD_CONFIG_PARAMS     *StdHeader;                     ///< Header structure
-  FCH_RESET_INTERFACE   FchReset;                       ///< Reset interface
-
-  UINT8                 FastSpeed;                      ///< SPI FastSpeed: 1-66MHz, 2-33MHz, 3-22MHz, 4-16.5MHz, 5-100Mhz
-  UINT8                 WriteSpeed;                     ///< SPI Write Speed: 1-66MHz, 2-33MHz, 3-22MHz, 4-16.5MHz, 5-100Mhz
-  UINT8                 Mode;                           ///< SPI Mode
-                                                        ///  @li   <b>101</b> - Qual-io 1-4-4
-                                                        ///  @li   <b>100</b> - Dual-io 1-2-2
-                                                        ///  @li   <b>011</b> - Qual-io 1-1-4
-                                                        ///  @li   <b>010</b> - Dual-io 1-1-2
-                                                        ///  @li   <b>111</b> - FastRead
-                                                        ///  @li   <b>110</b> - Normal
-                                                        ///
-  UINT8                 AutoMode;                       ///< SPI Auto Mode - 0:disable, 1:enable
-  UINT8                 BurstWrite;                     ///< SPI Burst Write - 0:disable, 1:enable
-  BOOLEAN               Sata6AhciCap;                   ///< SATA 6 AHCI Capability - TRUE:enable, FALSE:disable
-  UINT8                 Cg2Pll;                         ///< CG2 PLL - 0:disable, 1:enable
-  BOOLEAN               EcKbd;                          ///< EC KBD - 0:disable, 1:enable
-  BOOLEAN               LegacyFree;                     ///< Legacy Free - 0:disable, 1:enable
-  BOOLEAN               SataSetMaxGen2;                 ///< SATA enable maximum GEN2
-  UINT8                 SataClkMode;                    ///< SATA reference clock selector and divider
-  UINT8                 SataModeReg;                    ///< Output: SATAConfig PMIO:0xDA
-  BOOLEAN               SataInternal100Spread;          ///< SATA internal 100MHz spread ON/OFF
-  UINT8                 SpiSpeed;                       ///< SPI NormSpeed: 1-66MHz, 2-33MHz, 3-22MHz, 4-16.5MHz, 5-100Mhz
-//  UINT32                SPI100_RX_Timing_Config_Register_38;                 ///< SPI100_RX_Timing_Config_Register_38
-//  UINT16                SPI100_RX_Timing_Config_Register_3C;                 ///< SPI100_RX_Timing_Config_Register_3C
-//  UINT8                 SpiProtectEn0_1d_34;                  ///
-  UINT8                 SPI100_Enable;                  ///
-  BOOLEAN               EcChannel0;                     ///< Enable EC channel 0
-  FCH_GPP               Gpp;                            ///< GPP subsystem
-  FCH_SPI               Spi;                            ///< SPI subsystem
-  BOOLEAN               QeEnabled;                      /// Quad Mode Enabled
-  BOOLEAN               FchOscout1ClkContinous;         ///< FCH OSCOUT1_CLK Continous
-  VOID*                 EarlyOemGpioTable;              /// Pointer of Early OEM GPIO table
-//  VOID*                 OemSpiDeviceTable;              /// Pointer of OEM Spi Device table
-  VOID*                 OemResetProgrammingTablePtr;    /// Pointer of ACPI OEM table
-} FCH_RESET_DATA_BLOCK;
-
-
-/// Private: FCH_DATA_BLOCK
-typedef struct _FCH_DATA_BLOCK {
-  AMD_CONFIG_PARAMS     *StdHeader;                     ///< Header structure
-
-  FCH_ACPI              HwAcpi;                         ///< ACPI structure
-  FCH_AB                Ab;                             ///< AB structure
-  FCH_GPP               Gpp;                            ///< GPP structure
-  FCH_USB               Usb;                            ///< USB structure
-  FCH_SATA              Sata;                           ///< SATA structure
-  FCH_SMBUS             Smbus;                          ///< SMBus structure
-  FCH_IDE               Ide;                            ///< IDE structure
-  FCH_AZALIA            Azalia;                         ///< Azalia structure
-  FCH_SPI               Spi;                            ///< SPI structure
-  FCH_PCIB              Pcib;                           ///< PCIB structure
-  FCH_GEC               Gec;                            ///< GEC structure
-  FCH_SD                Sd;                             ///< SD structure
-  FCH_HWM               Hwm;                            ///< Hardware Moniter structure
-  FCH_IR                Ir;                             ///< IR structure
-  FCH_HPET              Hpet;                           ///< HPET structure
-  FCH_GCPU              Gcpu;                           ///< GCPU structure
-  FCH_IMC               Imc;                            ///< IMC structure
-  FCH_MISC              Misc;                           ///< MISC structure
-  VOID*                 PostOemGpioTable;              /// Pointer of Post OEM GPIO table
-} FCH_DATA_BLOCK;
-
-#pragma pack (pop)
-
-#endif

pi/amd/00730F01/Proc/Fch/Common/FchDef.h

diff --git a/pi/amd/00730F01/Proc/Fch/Common/FchDef.h b/pi/amd/00730F01/Proc/Fch/Common/FchDef.h
deleted file mode 100644
index 13906c5..0000000
--- a/pi/amd/00730F01/Proc/Fch/Common/FchDef.h
+++ /dev/null
@@ -1,400 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH routine definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef _FCH_DEF_H_
-#define _FCH_DEF_H_
-
-
-UINT32        ReadAlink (IN UINT32 Index, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WriteAlink (IN UINT32 Index, IN UINT32 Data, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          RwAlink (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ReadMem (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *ValuePtr);
-VOID          WriteMem (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *ValuePtr);
-VOID          RwMem (IN UINT32 Address, IN UINT8 OpFlag, IN UINT32 Mask, IN UINT32 Data);
-VOID          ReadPci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WritePci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          RwPci (IN UINT32 Address, IN UINT8 OpFlag, IN UINT32 Mask, IN UINT32  Data, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ProgramPciByteTable (IN REG8_MASK* pPciByteTable, IN UINT16 dwTableSize, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ProgramFchAcpiMmioTbl (IN ACPI_REG_WRITE  *pAcpiTbl, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ProgramFchSciMapTbl (IN SCI_MAP_CONTROL  *pSciMapTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock);
-VOID          ProgramFchGpioTbl (IN GPIO_CONTROL  *pGpioTbl);
-VOID          ProgramFchSataPhyTbl (IN SATA_PHY_CONTROL  *pSataPhyTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock);
-VOID          GetChipSysMode (IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-BOOLEAN       IsImcEnabled (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ReadPmio (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WritePmio (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          RwPmio (IN UINT8 Address, IN UINT8 OpFlag, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ReadPmio2 (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WritePmio2 (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          RwPmio2 (IN UINT8 Address, IN UINT8  OpFlag, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          ReadBiosram (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          WriteBiosram (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          GetFchAcpiMmioBase (OUT UINT32 *AcpiMmioBase, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID          GetFchAcpiPmBase (OUT  UINT16 *AcpiPmBase, IN AMD_CONFIG_PARAMS *StdHeader);
-UINT8         ReadFchSleepType (IN AMD_CONFIG_PARAMS *StdHeader);
-UINT8         ReadFchChipsetRevision (IN AMD_CONFIG_PARAMS *StdHeader);
-UINT8         GetFchRevision (IN AMD_CONFIG_PARAMS *StdHeader);
-BOOLEAN       CheckAvalonRevisionA0 (IN AMD_CONFIG_PARAMS *StdHeader);
-
-///
-/// Fch Ab Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetAb (IN VOID* FchDataPtr);
-VOID  FchProgramAbPowerOnReset (IN VOID* FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvAb (IN VOID* FchDataPtr);
-VOID  FchInitEnvAbSpecial (IN VOID* FchDataPtr);
-VOID  FchInitMidAb (IN VOID* FchDataPtr);
-VOID  FchInitLateAb (IN VOID* FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID  FchInitEnvAbLinkInit (IN VOID* FchDataPtr);
-BOOLEAN IsUmiOneLaneGen1Mode (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchAbLateProgram (IN VOID* FchDataPtr);
-VOID  ProgramPcieNativeMode (IN VOID* FchDataPtr);
-
-///
-/// Fch Azalia Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetAzalia    (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvAzalia      (IN VOID  *FchDataPtr);
-VOID  FchInitMidAzalia      (IN VOID  *FchDataPtr);
-VOID  FchInitLateAzalia     (IN VOID  *FchDataPtr);
-
-///
-/// Fch HwAcpi Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetHwAcpiP    (IN VOID  *FchDataPtr);
-VOID  FchInitResetHwAcpi     (IN VOID  *FchDataPtr);
-VOID  ProgramFchHwAcpiResetP (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvHwAcpiP                      (IN VOID  *FchDataPtr);
-VOID  FchInitEnvHwAcpi                       (IN VOID  *FchDataPtr);
-VOID  ProgramEnvPFchAcpiMmio                 (IN VOID *FchDataPtr);
-VOID  ProgramFchEnvHwAcpiPciReg              (IN VOID *FchDataPtr);
-VOID  ProgramSpecificFchInitEnvAcpiMmio      (IN VOID *FchDataPtr);
-VOID  ProgramFchEnvSpreadSpectrum            (IN VOID *FchDataPtr);
-VOID  FchInitMidHwAcpi      (IN VOID  *FchDataPtr);
-VOID  FchInitLateHwAcpi     (IN VOID  *FchDataPtr);
-
-///
-///  Other Public Routines
-///
-VOID HpetInit               (IN VOID  *FchDataPtr);
-VOID C3PopupSetting         (IN VOID  *FchDataPtr);
-VOID MtC1eEnable            (IN VOID  *FchDataPtr);
-VOID GcpuRelatedSetting     (IN VOID  *FchDataPtr);
-VOID StressResetModeLate    (IN VOID  *FchDataPtr);
-
-///
-/// Fch Hwm Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetHwm (IN VOID* FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvHwm (IN VOID* FchDataPtr);
-VOID  FchInitMidHwm (IN VOID* FchDataPtr);
-VOID  FchInitLateHwm (IN VOID* FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID  HwmInitRegister (IN VOID* FchDataPtr);
-VOID  HwmProcessParameter (IN VOID* FchDataPtr);
-VOID  HwmSetRegister (IN VOID* FchDataPtr);
-VOID  HwmGetCalibrationFactor (IN VOID* FchDataPtr);
-VOID  HwmFchtsiAutoPolling (IN VOID* FchDataPtr);
-VOID  HwmGetRawData (IN VOID* FchDataPtr);
-VOID  HwmCaculate (IN VOID* FchDataPtr);
-VOID  HwmFchtsiAutoPollingOff (IN VOID* FchDataPtr);
-VOID  FchECfancontrolservice (IN VOID* FchDataPtr);
-
-///
-/// Fch Imc Routines
-///
-///  Pei Phase
-///
-VOID    FchInitResetImc    (IN VOID  *FchDataPtr);
-VOID    FchInitResetEc     (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID    FchInitEnvImc      (IN VOID  *FchDataPtr);
-VOID    FchInitMidImc      (IN VOID  *FchDataPtr);
-VOID    FchInitLateImc     (IN VOID  *FchDataPtr);
-VOID    FchInitEnvEc       (IN VOID  *FchDataPtr);
-VOID    FchInitMidEc       (IN VOID  *FchDataPtr);
-VOID    FchInitLateEc      (IN VOID  *FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID    EnterEcConfig (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    ExitEcConfig (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    ReadEc8    (IN UINT8 Address, IN UINT8* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    WriteEc8   (IN UINT8 Address, IN UINT8* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    RwEc8      (IN UINT8 Address, IN UINT8 AndMask, IN UINT8 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    WriteECmsg (IN UINT8 Address, IN UINT8 OpFlag, IN VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    ReadECmsg  (IN UINT8 Address, IN UINT8 OpFlag, OUT VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID    WaitForEcLDN9MailboxCmdAck (IN AMD_CONFIG_PARAMS *StdHeader);
-
-VOID    ImcSleep                   (IN VOID  *FchDataPtr);
-VOID    ImcEnableSurebootTimer     (IN VOID  *FchDataPtr);
-VOID    ImcDisarmSurebootTimer     (IN VOID  *FchDataPtr);
-VOID    ImcDisableSurebootTimer    (IN VOID  *FchDataPtr);
-VOID    ImcWakeup                  (IN VOID  *FchDataPtr);
-VOID    ImcIdle                    (IN VOID  *FchDataPtr);
-BOOLEAN ValidateImcFirmware        (IN VOID  *FchDataPtr);
-VOID    SoftwareToggleImcStrapping (IN VOID  *FchDataPtr);
-VOID    ImcCrashReset              (IN VOID  *FchDataPtr);
-VOID    SoftwareDisableImc         (IN VOID  *FchDataPtr);
-
-
-///
-/// Fch Ir Routines
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvIr (IN VOID* FchDataPtr);
-VOID  FchInitMidIr (IN VOID* FchDataPtr);
-VOID  FchInitLateIr (IN VOID* FchDataPtr);
-
-///
-/// Fch SATA Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetSata          (IN VOID  *FchDataPtr);
-VOID  FchInitResetSataProgram   (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitMidSata                   (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSata                   (IN VOID  *FchDataPtr);
-VOID  FchInitEnvProgramSataPciRegs     (IN VOID  *FchDataPtr);
-VOID  FchInitMidProgramSataRegs        (IN VOID  *FchDataPtr);
-VOID  FchInitLateProgramSataRegs       (IN VOID  *FchDataPtr);
-
-VOID  FchInitLateSata           (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataIde         (IN VOID  *FchDataPtr);
-VOID  FchInitMidSataIde         (IN VOID  *FchDataPtr);
-VOID  FchInitLateSataIde        (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataAhci        (IN VOID  *FchDataPtr);
-VOID  FchInitMidSataAhci        (IN VOID  *FchDataPtr);
-VOID  FchInitLateSataAhci       (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataRaid        (IN VOID  *FchDataPtr);
-VOID  FchInitMidSataRaid        (IN VOID  *FchDataPtr);
-VOID  FchInitLateSataRaid       (IN VOID  *FchDataPtr);
-VOID  FchInitEnvSataIde2Ahci    (IN VOID  *FchDataPtr);
-VOID  FchInitMidSataIde2Ahci    (IN VOID  *FchDataPtr);
-VOID  FchInitLateSataIde2Ahci   (IN VOID  *FchDataPtr);
-
-VOID SataAhciSetDeviceNumMsi     (IN VOID  *FchDataPtr);
-VOID SataRaidSetDeviceNumMsi     (IN VOID  *FchDataPtr);
-VOID SataIde2AhciSetDeviceNumMsi (IN VOID  *FchDataPtr);
-VOID  SataSetIrqIntResource (IN VOID  *FchDataPtr, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  SataBar5setting (IN VOID *FchDataPtr, IN UINT32 *Bar5Ptr);
-VOID  SataEnableWriteAccess (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  SataDisableWriteAccess (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  SataSetDeviceNumMsi (IN VOID  *FchDataPtr);
-VOID  FchSataSetDeviceNumMsi (IN VOID  *FchDataPtr);
-VOID  ShutdownUnconnectedSataPortClock (IN VOID *FchDataPtr, IN UINT32 Bar5);
-VOID  FchShutdownUnconnectedSataPortClock (IN VOID *FchDataPtr, IN UINT32 Bar5);
-VOID  SataDriveDetection (IN VOID *FchDataPtr, IN UINT32 *Bar5Ptr);
-VOID  FchSataDriveDetection (IN VOID *FchDataPtr, IN UINT32 *Bar5Ptr);
-VOID  FchSataGpioInitial (IN  VOID  *FchDataPtr);
-VOID  SataBar5RegSet (IN  VOID  *FchDataPtr);
-VOID  SataSetPortGenMode (IN  VOID  *FchDataPtr);
-VOID  FchSataSetPortGenMode (IN  VOID  *FchDataPtr);
-VOID  FchProgramSataPhy (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchSataDriveFpga (IN  VOID  *FchDataPtr);
-VOID  FchInitEnvSataRaidProgram  (IN VOID  *FchDataPtr);
-
-///
-/// FCH USB Controller Public Function
-///
-///  Pei Phase
-///
-VOID  FchInitResetUsb            (IN VOID  *FchDataPtr);
-VOID  FchInitResetEhci           (IN VOID  *FchDataPtr);
-VOID  FchInitResetXhci           (IN VOID  *FchDataPtr);
-VOID  FchInitResetXhciProgram    (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvUsb              (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsb              (IN VOID  *FchDataPtr);
-VOID  FchInitLateUsb             (IN VOID  *FchDataPtr);
-VOID  FchInitEnvUsbEhci          (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbEhci          (IN VOID  *FchDataPtr);
-VOID  FchInitLateUsbEhci         (IN VOID  *FchDataPtr);
-VOID  FchEhciDebugPortService    (IN VOID  *FchDataPtr);
-VOID  FchInitEnvUsbXhci          (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbXhci          (IN VOID  *FchDataPtr);
-VOID  FchInitLateUsbXhci         (IN VOID  *FchDataPtr);
-VOID  FchInitMidUsbEhci1         (IN FCH_DATA_BLOCK  *FchDataPtr);
-VOID  FchInitMidUsbEhci2         (IN FCH_DATA_BLOCK  *FchDataPtr);
-VOID  FchInitMidUsbEhci3         (IN FCH_DATA_BLOCK  *FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID  FchSetUsbEnableReg         (IN FCH_DATA_BLOCK *FchDataPtr);
-VOID  FchEhciInitAfterPciInit    (IN UINT32 Value, IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchXhciInitBeforePciInit   (IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchXhciInitIndirectReg     (IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchInitLateUsbXhciProgram  (IN VOID  *FchDataPtr);
-VOID  FchXhciPowerSavingProgram  (IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchXhciUsbPhyCalibrated    (IN FCH_DATA_BLOCK* FchDataPtr);
-UINT8 FchUsbCommonPhyCalibration (IN FCH_DATA_BLOCK* FchDataPtr);
-VOID  FchUsbOverCurrentControl      (IN VOID  *FchDataPtr);
-
-///
-/// Fch Sd Routines
-///
-VOID  FchInitEnvSd  (IN VOID  *FchDataPtr);
-VOID  FchInitMidSd  (IN VOID  *FchDataPtr);
-VOID  FchInitLateSd (IN VOID  *FchDataPtr);
-
-///
-///  Other Public Routines
-///
-
-VOID FchInitEnvSdProgram (IN VOID  *FchDataPtr);
-
-///
-/// Fch Spi Routines
-///
-///  Pei Phase
-///
-VOID  FchInitResetSpi        (IN VOID  *FchDataPtr);
-VOID  FchInitResetLpc        (IN VOID  *FchDataPtr);
-VOID  FchInitResetLpcProgram (IN VOID  *FchDataPtr);
-///
-///  Dxe Phase
-///
-VOID  FchInitEnvSpi          (IN VOID  *FchDataPtr);
-VOID  FchInitMidSpi          (IN VOID  *FchDataPtr);
-VOID  FchInitLateSpi         (IN VOID  *FchDataPtr);
-VOID  FchInitEnvLpc          (IN VOID  *FchDataPtr);
-VOID  FchInitMidLpc          (IN VOID  *FchDataPtr);
-VOID  FchInitLateLpc         (IN VOID  *FchDataPtr);
-VOID  FchInitEnvLpcProgram   (IN VOID  *FchDataPtr);
-///
-///  Other Public Routines
-///
-VOID  FchSpiUnlock       (IN VOID  *FchDataPtr);
-VOID  FchSpiLock         (IN VOID  *FchDataPtr);
-
-/*--------------------------- Documentation Pages ---------------------------*/
-VOID  FchStall (IN UINT32 uSec, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  CimFchStall (IN UINT32 uSec, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  FchPciReset (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  OutPort80 (IN UINT32 pcode, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  OutPort1080 (IN UINT32 pcode, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  GetEfuseStatus (IN VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  TurnOffCG2 (OUT VOID);
-VOID  BackUpCG2 (OUT VOID);
-VOID  FchCopyMem (IN VOID* pDest, IN VOID* pSource, IN UINTN Length);
-VOID* GetRomSigPtr (IN UINTN* RomSigPtr, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  RwXhciIndReg (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  RwXhci0IndReg (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  RwXhci1IndReg (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  ReadXhci0Phy (IN UINT32 Port, IN UINT32 Address, IN UINT32 *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  ReadXhci1Phy (IN UINT32 Port, IN UINT32 Address, IN UINT32 *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  AcLossControl (IN UINT8 AcLossControlValue);
-VOID  FchVgaInit (OUT VOID);
-VOID  RecordFchConfigPtr (IN UINT32 FchConfigPtr);
-VOID  ValidateFchVariant (IN VOID  *FchDataPtr);
-VOID  RecordSmiStatus (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID  ClearAllSmiStatus (IN AMD_CONFIG_PARAMS *StdHeader);
-BOOLEAN  IsGCPU (IN VOID  *FchDataPtr);
-BOOLEAN  IsExternalClockMode (IN VOID  *FchDataPtr);
-VOID  SbSleepTrapControl (IN BOOLEAN SleepTrap);
-
-AGESA_STATUS
-FchSpiTransfer (
-  IN       UINT8    PrefixCode,
-  IN       UINT8    Opcode,
-  IN  OUT  UINT8    *DataPtr,
-  IN       UINT8    *AddressPtr,
-  IN       UINT8    Length,
-  IN       BOOLEAN  WriteFlag,
-  IN       BOOLEAN  AddressFlag,
-  IN       BOOLEAN  DataFlag,
-  IN       BOOLEAN  FinishedFlag
-  );
-
-BOOLEAN
-FchConfigureSpiDeviceDummyCycle (
-  IN       UINT32     DeviceID,
-  IN       UINT8      SpiMode
-  );
-
-UINT32
-FchReadSpiId (
-  IN       BOOLEAN    Flag
-  );
-
-
-BOOLEAN
-FchPlatformSpiQe (
-  IN       VOID     *FchDataPtr
-  );
-
-#endif
-

pi/amd/00730F01/Proc/Fch/Fch.h

diff --git a/pi/amd/00730F01/Proc/Fch/Fch.h b/pi/amd/00730F01/Proc/Fch/Fch.h
deleted file mode 100644
index ab6f3c0..0000000
--- a/pi/amd/00730F01/Proc/Fch/Fch.h
+++ /dev/null
@@ -1,2318 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH registers definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#define FCH_REVISION       "0.0.5.0"
-#define FCH_ID             "FCH_A05"
-#define FCH_VERSION        0x0000
-
-/**
- * @page fchinitguide FCH implement phase in AGESA
- *
- * FCH provides below access to supported FCH service functions
- * and data.
- *   - @subpage fchreset "FCH_INIT_RESET"
- *   - @subpage fchenv "FCH_INIT_ENV"
- *   - @subpage fchmid "FCH_INIT_MID"
- *   - @subpage fchlate "FCH_INIT_LATE"
- *   - @subpage fchs3early "FCH_INIT_S3_EARLY_RESTORE"
- *   - @subpage fchs3late "FCH_INIT_S3_LATE_RESTORE"
- *   - @subpage fchsmm "FCH_SMM_SERVICE"
- *   - @subpage fchsmmacpion "FCH_SMM_ACPION"
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchreset FCH_INIT_RESET
- *  @section FCH_INIT_RESET Interface Call
- *  @par
- *     Initialize structure referenced by FCH_RESET_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_RESET_CallIn Call Prototype
- *  @par
- *     AGESA_STATUS FchInitReset (IN AMD_RESET_PARAMS *ResetParams);
- *  @subsection FCH_INIT_RESET_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_RESET_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSmbus0BaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSmbus1BaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSioPmeBaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgWatchDogTimerBase  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgGecShadowRomBase   </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSpiRomBaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiPm1EvtBlkAddr  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiPm1CntBlkAddr  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiPmTmrBlkAddr   </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgCpuControlBlkAddr  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiGpe0BlkAddr    </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSmiCmdPortAddr     </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgAcpiPmaCntBlkAddr  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_RESET_INTERFACE::SataEnable      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_RESET_INTERFACE::IdeEnable       </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchenv FCH_INIT_ENV
- *  @section FCH_INIT_ENV Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_ENV_CallIn Call Prototype
- *  @par
- *     AGESA_STATUS FchInitEnv (IN AMD_ENV_PARAMS *EnvParams);
- *  @subsection FCH_INIT_ENV_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_ENV_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SdConfig              </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::AzaliaController      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::IrConfig              </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataIdeMode           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci1Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci2Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci3Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci4Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchmid FCH_INIT_MID
- *  @section FCH_INIT_MID Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_MID_CallIn Call Prototype
- *  @par
- *     AGESA_STATUS FchInitMid (IN AMD_MID_PARAMS *MidParams);
- *  @subsection FCH_INIT_MID_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_MID_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::AzaliaController      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::IdeEnable             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchlate FCH_INIT_LATE
- *  @section FCH_INIT_LATE Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_LATE_CallIn Call Prototype
- *  @par
- *     AGESA_STATUS FchInitLate (IN AMD_S3SAVE_PARAMS *LateParams);
- *  @subsection FCH_INIT_LATE_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_LATE_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSpiRomBaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchs3early FCH_INIT_S3_EARLY_RESTORE
- *  @section FCH_INIT_S3_EARLY_RESTORE Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_S3_EARLY_RESTORE_CallIn Call Prototype
- *  @par
- *     VOID FchInitS3EarlyRestore (IN FCH_DATA_BLOCK *FchDataPtr);
- *  @subsection FCH_INIT_S3_EARLY_RESTORE_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_S3_EARLY_RESTORE_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SdConfig              </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::AzaliaController      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::IrConfig              </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataIdeMode           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci1Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci2Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci3Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::Ohci4Enable           </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchs3late FCH_INIT_S3_LATE_RESTORE
- *  @section FCH_INIT_S3_LATE_RESTORE Interface Call
- *  @par
- *     Initialize structure referenced by FCH_DATA_BLOCK to default recommended value.
- *  @subsection FCH_INIT_S3_LATE_RESTORE_CallIn Call Prototype
- *  @par
- *     VOID FchInitS3LateRestore (IN FCH_DATA_BLOCK *FchDataPtr);
- *  @subsection FCH_INIT_S3_LATE_RESTORE_CallOut Prepare for Callout
- *  @par
- *     Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_INIT_S3_LATE_RESTORE_Config Prepare for Configuration Data.
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::AzaliaController      </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataClass             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::SataEnable            </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> FCH_INTERFACE::IdeEnable             </TD><TD class="indexvalue"><B>Optional </B></TD></TR>
- *     <TR><TD class="indexkey" width=380> BUILD_OPT_CFG::CfgSpiRomBaseAddress  </TD><TD class="indexvalue"><B>Required </B></TD></TR>
- *  </TABLE>
- *
- */
-
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchsmm FCH_SMM_SERVICE
- *  @section FCH_SMM_SERVICE Interface Call
- *  Initialize structure referenced by FCHCFG to default recommended value.
- *  @subsection FCH_SMM_SERVICE_CallIn Call Prototype
- *  @par
- *     FchSmmService ((FCHCFG*)pConfig)     (Followed PH Interface)
- *  @subsection FCH_SMM_SERVICE_CallID Service ID
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_SMM_SERVICE  --> 0x00010060 </TD></TR>
- *  </TABLE>
- *  @subsection FCH_SMM_SERVICE_CallOut Prepare for Callout
- *  @par
- *    Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_SMM_SERVICE_Config Prepare for Configuration Data.
- *  @par
- *     Not necessary on current implementation
- *
- */
-#define FCH_SMM_SERVICE              0x00010060ul
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page fchsmmacpion FCH_SMM_ACPION
- *  @section FCH_SMM_ACPION Interface Call
- *  Initialize structure referenced by FCHCFG to default recommended value.
- *  @subsection FCH_SMM_ACPION_CallIn Call Prototype
- *  @par
- *     FchSmmAcpiOn ((FCHCFG*)pConfig)     (Followed PH Interface)
- *  @subsection FCH_SMM_ACPION_CallID Service ID
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> FCH_SMM_ACPION  --> 0x00010061 </TD></TR>
- *  </TABLE>
- *  @subsection FCH_SMM_ACPION_CallOut Prepare for Callout
- *  @par
- *    Not Applicable (Not necessary for the current implementation)
- *  @subsection FCH_SMM_ACPION_Config Prepare for Configuration Data.
- *  @par
- *     Not necessary on current implementation
- *
- */
-#define FCH_SMM_ACPION               0x00010061ul
-
-#ifndef OEM_CALLBACK_BASE
-  #define OEM_CALLBACK_BASE         0x00010100ul
-#endif
-
-//0x00 - 0x0F callback functions are reserved for bootblock
-#define SATA_PHY_PROGRAMMING        OEM_CALLBACK_BASE + 0x10
-#define PULL_UP_PULL_DOWN_SETTINGS  OEM_CALLBACK_BASE + 0x20
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page CB_SBGPP_RESET_ASSERT_Page CB_SBGPP_RESET_ASSERT
- *  @section CB_SBGPP_RESET_ASSERT Interface Call
- *  Initialize structure referenced by FCHCFG to default recommended value.
- *  @subsection CB_SBGPP_RESET_ASSERT_CallID Service ID
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> CB_SBGPP_RESET_ASSERT  --> 0x00010130 </TD></TR>
- *  </TABLE>
- *  @subsection CB_SBGPP_RESET_ASSERT_Config Prepare for Configuration Data.
- *  @par
- *     Not necessary on current implementation
- *
- */
-#define CB_SBGPP_RESET_ASSERT       OEM_CALLBACK_BASE + 0x30
-/*--------------------------- Documentation Pages ---------------------------*/
-/**
- *  @page CB_SBGPP_RESET_DEASSERT_Page CB_SBGPP_RESET_DEASSERT
- *  @section CB_SBGPP_RESET_DEASSERT  Interface Call
- *  Initialize structure referenced by FCHCFG to default recommended value.
- *  @subsection CB_SBGPP_RESET_DEASSERT _CallID Service ID
- *  @par
- *  <TABLE border="0">
- *     <TR><TD class="indexkey" width=380> CB_SBGPP_RESET_DEASSERT   --> 0x00010131 </TD></TR>
- *  </TABLE>
- *  @subsection CB_SBGPP_RESET_DEASSERT _Config Prepare for Configuration Data.
- *  @par
- *     Not necessary on current implementation
- *
- */
-#define CB_SBGPP_RESET_DEASSERT     OEM_CALLBACK_BASE + 0x31
-
-#define CFG_ADDR_PORT               0xCF8
-#define CFG_DATA_PORT               0xCFC
-
-#define ALINK_ACCESS_INDEX          0x0CD8
-#define ALINK_ACCESS_DATA           ALINK_ACCESS_INDEX + 4
-
-/*------------------------------------------------------------------
-; I/O Base Address - Should be set by host BIOS
-;------------------------------------------------------------------ */
-#define DELAY_PORT                  0x0E0
-
-#define FCH_8259_CONTROL_REG_MASTER 0x20
-#define FCH_8259_MASK_REG_MASTER    0x21
-
-/*------------------------------------------------------------------
-; DEBUG_PORT = 8-bit I/O Port Address for POST Code Display
-;------------------------------------------------------------------ */
-// ASIC VendorID and DeviceIDs
-#define ATI_VID                      0x1002
-#define AMD_FCH_VID                  0x1022
-#define FCH_DEVICE_ID                0x780B
-#define FCH_SATA_VID                 AMD_FCH_VID      // Dev 17 Func 0
-#define FCH_SATA_DID                 0x7800
-#define FCH_SATA_AHCI_DID            0x7801
-#define FCH_SATA_RAID_DID            0x7802
-#define FCH_SATA_RAID5_DID           0x7803
-#define FCH_SATA_AMDAHCI_DID         0x7804
-#define FCH_SATA_RAID_DOTHILL_DID    0x7805
-#define FCH_SATA_RAID5_DOTHILL_DID   0x780A
-#define FCH_USB_OHCI_VID             AMD_FCH_VID      // Dev 18 Func 0, Dev 19 Func 0
-#define FCH_USB_OHCI_DID             0x7807
-#define FCH_USB_EHCI_VID             AMD_FCH_VID      // Dev 18 Func 2, Dev 19 Func 2
-#define FCH_USB_EHCI_DID             0x7808
-#define FCH_USB_XHCI_VID             AMD_FCH_VID      // Dev 10 Func 0, Dev 10 Func 1
-#define FCH_USB_XHCI_DID             0x7812
-#define FCH_USB_XHCI_DID_BOLTON      0x7814
-#define AVALON_USB_XHCI_DID          0x7814
-#define FCH_SMBUS_VID                AMD_FCH_VID      // Dev 20 Func 0
-#define FCH_SMBUS_DID                0x780B
-#define FCH_IDE_VID                  AMD_FCH_VID      // Dev 20 Func 1
-#define FCH_IDE_DID                  0x780C
-#define FCH_AZALIA_VID               AMD_FCH_VID      // Dev 20 Func 2
-#define FCH_AZALIA_DID               0x780D
-#define FCH_LPC_VID                  AMD_FCH_VID      // Dev 20 Func 3
-#define FCH_LPC_DID                  0x780E
-#define FCH_PCIB_VID                 AMD_FCH_VID      // Dev 20 Func 4
-#define FCH_PCIB_DID                 0x780F
-#define FCH_USB_OHCIF_VID            AMD_FCH_VID      // dev 20 Func 5
-#define FCH_USB_OHCIF_DID            0x7809
-#define FCH_NIC_VID                  0x14E4          // Dev 20 Func 6
-#define FCH_NIC_DID                  0x1699
-#define FCH_SD_VID                   AMD_FCH_VID      // Dev 20 Func 7
-#define FCH_SD_DID                   0x7806
-
-//FCH Variant
-#define FCH_Variant_EFUSE_LOCATION        0x1E        // EFUSE bit 240-247
-
-#define FCH_M2                            0x01
-#define FCH_M3                            0x03
-#define FCH_M3T                           0x07
-#define FCH_D2                            0x0F
-#define FCH_D3                            0x1F
-#define FCH_D4                            0x3F
-#define FCH_BOLTON                        0x15
-#define FCH_YANGTZE                       0x39
-#define FCH_YANGTZEA1                     0x3A
-#define FCH_AVALONA0                      0x41
-#define FCH_AVALONA1                      0x42
-//Misc
-#define R_FCH_ACPI_PM1_STATUS              0x00
-#define R_FCH_ACPI_PM1_ENABLE              0x02
-#define R_FCH_ACPI_PM_CONTROL              0x04
-#define R_FCH_ACPI_EVENT_STATUS            0x20
-#define R_FCH_ACPI_EVENT_ENABLE            0x24
-#define R_FCH_PM_ACPI_PMA_CNT_BLK_LO       0x2C
-
-// ACPI Sleep Type
-#define ACPI_SLPTYP_S0                     0
-#define ACPI_SLPTYP_S1                     1
-#define ACPI_SLPTYP_S3                     3
-#define ACPI_SLPTYP_S4                     4
-#define ACPI_SLPTYP_S5                     5
-
-//#define SATA_BUS_DEV_FUN_FPGA            0x228
-#define SATA_BUS_DEV_FUN            ((0x11 << 3) + 0)
-#define FCH_SATA1_BUS        0
-#define FCH_SATA1_DEV        17
-#define FCH_SATA1_FUNC       0
-
-#define FC_BUS_DEV_FUN              ((0x11 << 3) + 1)
-#define FCH_XHCI_BUS        0
-#define FCH_XHCI_DEV        16
-#define FCH_XHCI_FUNC       0
-#define USB_XHCI_BUS_DEV_FUN        ((FCH_XHCI_DEV << 3) + FCH_XHCI_FUNC)
-#define FCH_XHCI1_BUS        0
-#define FCH_XHCI1_DEV        16
-#define FCH_XHCI1_FUNC       1
-#define USB_XHCI1_BUS_DEV_FUN       ((FCH_XHCI1_DEV << 3) + FCH_XHCI1_FUNC)
-#define USB1_OHCI_BUS_DEV_FUN       ((0x12 << 3) + 0)    // PORT 0-4
-#define FCH_OHCI1_BUS        0
-#define FCH_OHCI1_DEV        18
-#define FCH_OHCI1_FUNC       0
-#define USB2_OHCI_BUS_DEV_FUN       ((0x13 << 3) + 0)    // PORT 5-9
-#define FCH_OHCI2_BUS        0
-#define FCH_OHCI2_DEV        19
-#define FCH_OHCI2_FUNC       0
-#define USB3_OHCI_BUS_DEV_FUN       ((0x16 << 3) + 0)    // PORT 10-13
-#define FCH_OHCI3_BUS        0
-#define FCH_OHCI3_DEV        22
-#define FCH_OHCI3_FUNC       0
-#define USB1_EHCI_BUS_DEV_FUN       ((0x12 << 3) + 2)    // PORT 0-4
-#define FCH_EHCI1_BUS        0
-#define FCH_EHCI1_DEV        18
-#define FCH_EHCI1_FUNC       2
-#define USB2_EHCI_BUS_DEV_FUN       ((0x13 << 3) + 2)    // PORT 5-9
-#define FCH_EHCI2_BUS        0
-#define FCH_EHCI2_DEV        19
-#define FCH_EHCI2_FUNC       2
-#define USB3_EHCI_BUS_DEV_FUN       ((0x16 << 3) + 2)  // PORT 10-13
-#define FCH_EHCI3_BUS        0
-#define FCH_EHCI3_DEV        22
-#define FCH_EHCI3_FUNC       2
-#define SMBUS_BUS_DEV_FUN           ((0x14 << 3) + 0)
-#define FCH_ISA_BUS          0
-#define FCH_ISA_DEV          20
-#define FCH_ISA_FUNC         0
-#define IDE_BUS_DEV_FUN             ((0x14 << 3) + 1)
-#define FCH_IDE_BUS          0
-#define FCH_IDE_DEV          20
-#define FCH_IDE_FUNC         1
-#define AZALIA_BUS_DEV_FUN          ((0x14 << 3) + 2)
-#define FCH_AZALIA_BUS       0
-#define FCH_AZALIA_DEV       20
-#define FCH_AZALIA_FUNC      2
-#define LPC_BUS_DEV_FUN             ((0x14 << 3) + 3)
-#define FCH_LPC_BUS          0
-#define FCH_LPC_DEV          20
-#define FCH_LPC_FUNC         3
-#define PCIB_BUS_DEV_FUN            ((0x14 << 3) + 4)    // P2P in SB700
-#define FCH_PCI_BUS          0
-#define FCH_PCI_DEV          20
-#define FCH_PCI_FUNC         4
-#define USB4_OHCI_BUS_DEV_FUN       ((0x14 << 3) + 5)    // PORT FL0 - FL1
-#define FCH_OHCI4_BUS        0
-#define FCH_OHCI4_DEV        20
-#define FCH_OHCI4_FUNC       5
-//Gigabyte Ethernet Controller
-#define GEC_BUS_DEV_FUN             ((0x14 << 3) + 6)
-#define FCH_GBEC_BUS         0
-#define FCH_GBEC_DEV         20
-#define FCH_GBEC_FUNC        6
-
-#define SD_BUS_DEV_FUN            ((0x14 << 3) + 7)      // SD Controller
-#define SD_PCI_BUS          0
-#define SD_PCI_DEV          20
-#define SD_PCI_FUNC         7
-
-
-#define FCH_GPP_BUS          0
-#define FCH_GPP_DEV          21
-#define FCH_GPP_FUNC         0
-#define GPP0_BUS_DEV_FUN            ((0x15 << 3) + 0)    // GPP P2P bridge PORT0
-#define GPP1_BUS_DEV_FUN            ((0x15 << 3) + 1)    // GPP P2P bridge PORT1
-#define GPP2_BUS_DEV_FUN            ((0x15 << 3) + 2)    // GPP P2P bridge PORT2
-#define GPP3_BUS_DEV_FUN            ((0x15 << 3) + 3)    // GPP P2P bridge PORT3
-
-#define ACPI_MMIO_BASE  0xFED80000ul
-#define FCH_CFG_BASE     0x000   // DWORD
-#define GPIO_BASE       0x100   // BYTE
-#define SMI_BASE        0x200   // DWORD
-#define PMIO_BASE       0x300   // DWORD
-#define PMIO2_BASE      0x400   // BYTE
-#define BIOS_RAM_BASE   0x500   // BYTE
-#define CMOS_RAM_BASE   0x600   // BYTE
-#define CMOS_BASE       0x700   // BYTE
-#define ASF_BASE        0x900   // DWORD
-#define SMBUS_BASE      0xA00   // DWORD
-#define WATCHDOG_BASE   0xB00   //
-#define HPET_BASE       0xC00   // DWORD
-#define IOMUX_BASE      0xD00   // BYTE
-#define MISC_BASE       0xE00
-#define SERIAL_DEBUG_BASE  0x1000
-#define GFX_DAC_BASE       0x1400
-#define GPIO_BANK0_BASE    0x1500   // DWORD
-//#define GPIO_BANK1_BASE    0x1600   // DWORD
-//#define GPIO_BANK2_BASE    0x1700   // DWORD
-#define CEC_BASE           0x1800
-#define XHCI_BASE          0x1C00
-#define ACDC_BASE          0x1D00
-#define AOAC_BASE          0x1E00
-
-
-// Chip type definition
-#define CHIPTYPE_HUDSON2         (1 << 0)
-#define CHIPTYPE_YUBA            (1 << 1)
-
-//
-// ROM SIG type definition
-//
-#define NUM_OF_ROMSIG_FILED      0x04
-#define XHCI_FILED_NUM           0x03
-#define ROMSIG_CFG_MASK          0x07
-#define XHCI_BOOT_RAM_OFFSET     0x8000
-#define INSTRUCTION_RAM_SIG      0x55AA
-#define ROMSIG_SIG               0x55AA55AAul
-
-// RegSpace field (AB_INDEX[31:29]
-#define AXINDC         0               // AXINDC
-#define AXINDP         2               // AXINDP
-#define ABCFG          6               // ABCFG
-#define AXCFG          4               // AXCFG
-#define RCINDXC        1               // PCIEIND
-#define RCINDXP        3               // PCIEIND_P
-
-#define GPP_DEV_NUM    21              //
-#define MAX_GPP_PORTS  4
-
-#define PCIE_FORCE_GEN1_EFUSE_LOCATION     0x14    // EFUSE bit 160
-//
-// ABCFG Registers
-//
-#define FCH_ABCFG_REG00     0x00  // VENDOR ID
-#define FCH_ABCFG_REG08     0x08  // REVISION ID
-#define FCH_ABCFG_REG40     0x40  // BL_EVENTCNT0LO
-#define FCH_ABCFG_REG44     0x44  // BL_EVENTCNT1LO
-#define FCH_ABCFG_REG48     0x48  // BL_EVENTCNTSEL
-#define FCH_ABCFG_REG4A     0x4A  // BL_EVENTCNT0HI
-#define FCH_ABCFG_REG4B     0x4B  // BL_EVENTCNT1HI
-#define FCH_ABCFG_REG4C     0x4C  // BL_EVENTCNTCTL
-#define FCH_ABCFG_REG50     0x50  // MISCCTL_50
-#define FCH_ABCFG_REG54     0x54  // MISCCTL_54
-#define FCH_ABCFG_REG58     0x58  // BL RAB CONTROL
-
-#define FCH_ABCFG_REG60     0x60  // LINKWIDTH_CTL
-#define FCH_ABCFG_REG64     0x64  // LINKWIDTH_UP_INTERVAL
-#define FCH_ABCFG_REG68     0x68  // LINKWIDTH_DN_INVERVAL
-#define FCH_ABCFG_REG6C     0x6C  // LINKWIDTH_UPSTREAM_DWORDS
-#define FCH_ABCFG_REG70     0x70  // LINKWIDTH_DOWNSTREAM_DWORDS
-#define FCH_ABCFG_REG74     0x74  // LINKWIDTH_THRESHOLD_INCREASE
-#define FCH_ABCFG_REG78     0x78  // LINKWIDTH_THRESHOLD_DECREASE
-
-#define FCH_ABCFG_REG80     0x80  // BL DMA PREFETCH CONTROL
-#define FCH_ABCFG_REG88     0x88  //
-#define FCH_ABCFG_REG8C     0x8C  //
-#define FCH_ABCFG_REG90     0x90  // BIF CONTROL 0
-#define FCH_ABCFG_REG94     0x94  // MSI CONTROL
-#define FCH_ABCFG_REG98     0x98  // BIF CONTROL 1
-#define FCH_ABCFG_REG9C     0x9C  // MISCCTL_9C
-#define FCH_ABCFG_REGA0     0xA0  // BIF PHY CONTROL ENABLE
-#define FCH_ABCFG_REGA4     0xA4  // BIF PHY CONTROL A4
-#define FCH_ABCFG_REGA8     0xA8  // BIF PHY CONTROL A8
-#define FCH_ABCFG_REGB0     0xB0  // HYPERFLASH-PCIE PORT MAPPING
-#define FCH_ABCFG_REGB8     0xB8  //
-#define FCH_ABCFG_REGB4     0xB4  //
-#define FCH_ABCFG_REGBC     0xBC  //
-#define FCH_ABCFG_REGC0     0xC0  // PCIE_GPP_ENABLE
-#define FCH_ABCFG_REGC4     0xC4  // PCIE_P2P_INT_MAP
-#define FCH_ABCFG_REGD0     0xD0  // MCTP_VDM_TX_FIFO_DATA
-#define FCH_ABCFG_REGD4     0xD4  // MCTP_VMD_TX_CONTROL
-#define FCH_ABCFG_REGE0     0xE0  // MCTP_VDM_RX_FIFO_DATA
-#define FCH_ABCFG_REGE4     0xE4  // MCTP_VDM_RX_FIFO_STATUS
-#define FCH_ABCFG_REGEC     0xEC  // MCTP_VDM_CONTROL
-#define FCH_ABCFG_REGF0     0xF0  // GPP_UPSTREAM_CONTROL
-#define FCH_ABCFG_REGF4     0xF4  // GPP_SYSTEM_ERROR_CONTROL
-#define FCH_ABCFG_REGFC     0xFC  // FCH_TRAP_CONTROL
-#define FCH_ABCFG_REG100    0x100 // FCH_TRAP0_ADDRL
-#define FCH_ABCFG_REG104    0x104 // FCH_TRAP0_ADDRH
-#define FCH_ABCFG_REG108    0x108 // FCH_TRAP0_CMD
-#define FCH_ABCFG_REG10C    0x10C // FCH_TRAP1_DATA
-#define FCH_ABCFG_REG110    0x110 // FCH_TRAP1_ADDRL
-#define FCH_ABCFG_REG114    0x114 // FCH_TRAP1_ADDRH
-#define FCH_ABCFG_REG118    0x118 // FCH_TRAP1_CMD
-#define FCH_ABCFG_REG11C    0x11C // FCH_TRAP1_DATA
-#define FCH_ABCFG_REG120    0x120 // FCH_TRAP2_ADDRL
-#define FCH_ABCFG_REG124    0x124 // FCH_TRAP2_ADDRH
-#define FCH_ABCFG_REG128    0x128 // FCH_TRAP2_CMD
-#define FCH_ABCFG_REG12C    0x12C // FCH_TRAP2_DATA
-#define FCH_ABCFG_REG130    0x130 // FCH_TRAP3_ADDRL
-#define FCH_ABCFG_REG134    0x134 // FCH_TRAP3_ADDRH
-#define FCH_ABCFG_REG138    0x138 // FCH_TRAP3_CMD
-#define FCH_ABCFG_REG13C    0x13C // FCH_TRAP3_DATA
-#define FCH_ABCFG_REG208    0x208 // KR New
-#define FCH_ABCFG_REG300    0x300 // MCTP_VDM_RX_SMI_CONTROL
-#define FCH_ABCFG_REG310    0x310 // BIF_GPP_STRAP_SYSTEM_0
-#define FCH_ABCFG_REG314    0x314 // BIF_GPP_STRAP_SYSTEM_1
-#define FCH_ABCFG_REG31C    0x31C // BIF_GPP_STRAP_LINK_CONTROL_0
-#define FCH_ABCFG_REG320    0x320 // BIF_GPP_STRAP_LINK_CONTROL_LANE_A
-#define FCH_ABCFG_REG324    0x324 // BIF_GPP_STRAP_LINK_CONTROL_LANE_B
-#define FCH_ABCFG_REG328    0x328 // BIF_GPP_STRAP_LINK_CONTROL_LANE_C
-#define FCH_ABCFG_REG32C    0x32C // BIF_GPP_STRAP_LINK_CONTROL_LANE_D
-#define FCH_ABCFG_REG330    0x330 // BIF_GPP_STRAP_BIF_0
-#define FCH_ABCFG_REG334    0x334 // BIF_GPP_STRAP_BIF_1
-#define FCH_ABCFG_REG338    0x338 // BIF_GPP_STRAP_BIF_2
-#define FCH_ABCFG_REG340    0x340 // BIF_GPP_STRAP_BIF_LANE_A
-#define FCH_ABCFG_REG344    0x344 // BIF_GPP_STRAP_BIF_LANE_B
-#define FCH_ABCFG_REG348    0x348 // BIF_GPP_STRAP_BIF_LANE_C
-#define FCH_ABCFG_REG34C    0x34C // BIF_GPP_STRAP_BIF_LANE_D
-#define FCH_ABCFG_REG350    0x350 // BIF_GPP_STRAP_PHY_LOGICAL _0
-#define FCH_ABCFG_REG354    0x354 // BIF_GPP_STRAP_PHY_LOGICAL _1
-#define FCH_ABCFG_REG404    0x404 // GPP0_SHADOW_COMMAND
-#define FCH_ABCFG_REG418    0x418 // GPP0_SHADOW_BUS_NUMBER
-#define FCH_ABCFG_REG41C    0x41C // GPP0_SHADOW_IO_LIMIT_BASE
-#define FCH_ABCFG_REG420    0x420 // GPP0_SHADOW_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG424    0x424 // GPP0_SHADOW_PREF_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG428    0x428 // GPP0_SHADOW_PREF_MEM_BASE_UPPER
-#define FCH_ABCFG_REG42C    0x42C // GPP0_SHADOW_PREF_MEM_LIMIT_UPPER
-#define FCH_ABCFG_REG430    0x430 // GPP0_SHADOW_IO_LIMIT_BASE_UPPER
-#define FCH_ABCFG_REG43C    0x43C // GPP0_SHADOW_BRIDGE_CONTROL
-#define FCH_ABCFG_REG444    0x444 // GPP1_SHADOW_COMMAND
-#define FCH_ABCFG_REG458    0x458 // GPP1_SHADOW_BUS_NUMBER
-#define FCH_ABCFG_REG45C    0x45C // GPP1_SHADOW_IO_LIMIT_BASE
-#define FCH_ABCFG_REG460    0x460 // GPP1_SHADOW_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG464    0x464 // GPP1_SHADOW_PREF_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG468    0x468 // GPP1_SHADOW_PREF_MEM_BASE_UPPER
-#define FCH_ABCFG_REG46C    0x46C // GPP1_SHADOW_PREF_MEM_LIMIT_UPPER
-#define FCH_ABCFG_REG470    0x470 // GPP1_SHADOW_IO_LIMIT_BASE_UPPER
-#define FCH_ABCFG_REG47C    0x47C // GPP1_SHADOW_BRIDGE_CONTROL
-#define FCH_ABCFG_REG484    0x484 // GPP2_SHADOW_COMMAND
-#define FCH_ABCFG_REG498    0x498 // GPP2_SHADOW_BUS_NUMBER
-#define FCH_ABCFG_REG49C    0x49C // GPP2_SHADOW_IO_LIMIT_BASE
-#define FCH_ABCFG_REG4A0    0x4A0 // GPP2_SHADOW_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG4A4    0x4A4 // GPP2_SHADOW_PREF_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG4A8    0x4A8 // GPP2_SHADOW_PREF_MEM_BASE_UPPER
-#define FCH_ABCFG_REG4AC    0x4AC // GPP2_SHADOW_PREF_MEM_LIMIT_UPPER
-#define FCH_ABCFG_REG4B0    0x4B0 // GPP2_SHADOW_IO_LIMIT_BASE_UPPER
-#define FCH_ABCFG_REG4BC    0x4BC // GPP2_SHADOW_BRIDGE_CONTROL
-#define FCH_ABCFG_REG4C4    0x4C4 // GPP3_SHADOW_COMMAND
-#define FCH_ABCFG_REG4D8    0x4D8 // GPP3_SHADOW_BUS_NUMBER
-#define FCH_ABCFG_REG4DC    0x4DC // GPP3_SHADOW_IO_LIMIT_BASE
-#define FCH_ABCFG_REG4E0    0x4E0 // GPP3_SHADOW_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG4E4    0x4E4 // GPP3_SHADOW_PREF_MEM_LIMIT_BASE
-#define FCH_ABCFG_REG4E8    0x4E8 // GPP3_SHADOW_PREF_MEM_BASE_UPPER
-#define FCH_ABCFG_REG4EC    0x4EC // GPP3_SHADOW_PREF_MEM_LIMIT_UPPER
-#define FCH_ABCFG_REG4F0    0x4F0 // GPP3_SHADOW_IO_LIMIT_BASE_UPPER
-#define FCH_ABCFG_REG4FC    0x4FC // GPP3_SHADOW_BRIDGE_CONTROL
-#define FCH_ABCFG_REG10040  0x10040ul  // AL_EVENTCNT0LO
-#define FCH_ABCFG_REG10044  0x10044ul  // AL_EVENTCNT1LO
-#define FCH_ABCFG_REG10048  0x10048ul  // AL_EVENTCNTSEL
-#define FCH_ABCFG_REG1004A  0x1004Aul  // AL_EVENTCNT0HI
-#define FCH_ABCFG_REG1004B  0x1004Bul  // AL_EVENTCNT1HI
-#define FCH_ABCFG_REG1004C  0x1004Cul  // AL_EVENTCNTCTL
-#define FCH_ABCFG_REG10050  0x10050ul  // MISCCTL_10050
-#define FCH_ABCFG_REG10054  0x10054ul  // AL_ARB_CTL
-#define FCH_ABCFG_REG10056  0x10056ul  // AL_CLK_CTL
-#define FCH_ABCFG_REG10058  0x10058ul  // AL RAB CONTROL
-#define FCH_ABCFG_REG1005C  0x1005Cul  // AL MLT CONTROL
-#define FCH_ABCFG_REG10060  0x10060ul  // AL DMA PREFETCH ENABLE
-#define FCH_ABCFG_REG10064  0x10064ul  // AL DMA PREFETCH FLUSH CONTROL
-#define FCH_ABCFG_REG10068  0x10068ul  // AL PREFETCH LIMIT
-#define FCH_ABCFG_REG1006C  0x1006Cul  // AL DMA PREFETCH CONTROL
-#define FCH_ABCFG_REG10070  0x10070ul  // MISCCTL_10070
-#define FCH_ABCFG_REG10080  0x10080ul  // CLKMUXSTATUS
-#define FCH_ABCFG_REG10090  0x10090ul  // BIF CONTROL 0
-#define FCH_ABCFG_REG1009C  0x1009Cul  // MISCCTL_1009C
-
-//
-// RCINDX_P Registers
-//
-#define FCH_RCINDXP_REG01   0x01 | RCINDXP << 29 // PCIEP_SCRATCH
-#define FCH_RCINDXP_REG02   0x02 | RCINDXP << 29 //
-#define FCH_RCINDXP_REG10   0x10 | RCINDXP << 29 //
-#define FCH_RCINDXP_REG20   0x20 | RCINDXP << 29 // PCIE_TX_CNTL
-#define FCH_RCINDXP_REG21   0x21 | RCINDXP << 29 // PCIE_TX_REQUESTER_ID
-#define FCH_RCINDXP_REG50   0x50 | RCINDXP << 29 // PCIE_P_PORT_LANE_STATUS
-#define FCH_RCINDXP_REG6A   0x6A | RCINDXP << 29 //
-#define FCH_RCINDXP_REG70   0x70 | RCINDXP << 29 // PCIE_RX_CNTL
-#define FCH_RCINDXP_REGA0   0xA0 | RCINDXP << 29 // PCIE_LC_CNTL
-#define FCH_RCINDXP_REGA1   0xA1 | RCINDXP << 29 // PCIE_LC_TRAINING_CNTL
-#define FCH_RCINDXP_REGA2   0xA2 | RCINDXP << 29 //
-#define FCH_RCINDXP_REGA4   0xA4 | RCINDXP << 29 //
-#define FCH_RCINDXP_REGA5   0xA5 | RCINDXP << 29 // PCIE_LC_STATE0
-#define FCH_RCINDXP_REGC0   0xC0 | RCINDXP << 29 //
-
-//
-// RCINDX_C Registers
-//
-#define FCH_RCINDXC_REG02   0x02 | RCINDXC << 29  // PCIE_HW_DEBUG
-#define FCH_RCINDXC_REG10   0x10 | RCINDXC << 29  // PCIE_CNTL
-#define FCH_RCINDXC_REG40   0x40 | RCINDXC << 29  // PCIE_P_CNTL
-#define FCH_RCINDXC_REG65   0x65 | RCINDXC << 29  // PCIE_P_PAD_FORCE_DIS
-#define FCH_RCINDXC_REGC0   0xC0 | RCINDXC << 29  // PCIE_STRAP_MISC
-#define FCH_RCINDXC_REGC1   0xC1 | RCINDXC << 29  // PCIE_STRAP_MISC2
-
-
-//
-// AXINDC Registers
-//
-#define FCH_AX_INDXC_REG02  0x02 // PCIEP_HW_DEBUG
-#define FCH_AX_INDXC_REG10  0x10
-#define FCH_AX_INDXC_REG30  0x30
-#define FCH_AX_DATAC_REG34  0x34
-#define FCH_AX_INDXP_REG38  0x38
-#define FCH_AX_DATAP_REG3C  0x3C
-#define FCH_AX_INDXC_REG40  0x40 | AXINDC << 29
-#define FCH_AX_INDXC_REGA4  0xA4 | AXINDC << 29
-
-#define FCH_AX_INDXP_REG02  0x02 | AXINDP << 29
-#define FCH_AX_INDXP_REGA0  0xA0 | AXINDP << 29
-#define FCH_AX_INDXP_REGA4  0xA4 | AXINDP << 29
-#define FCH_AX_INDXP_REGB1  0xB1 | AXINDP << 29
-
-#define FCH_AX_CFG_REG68  0x68 | AXCFG << 29
-#define FCH_AX_CFG_REG88  0x88 | AXCFG << 29
-
-#define FCH_AB_REG04         0x04
-#define FCH_AB_REG40         0x40
-
-//Sata Port Configuration
-#define SIX_PORTS       0
-#define FOUR_PORTS      1
-
-#define SATA_EFUSE_LOCATION     0x10    // EFUSE bit 133
-#define SATA_DH_EFUSE_LOCATION  0x11    // EFUSE bit 138
-#define SATA_FIS_BASE_EFUSE_LOC 0x15    // EFUSE bit 169
-#define SATA_EFUSE_BIT          0x20    //
-#define SATA_DH_EFUSE_BIT       0x04    //
-#define FCH_SATA_REG00           0x000   // Vendor ID - R- 16 bits
-#define FCH_SATA_REG02           0x002   // Device ID - RW -16 bits
-#define FCH_SATA_REG04           0x004   // PCI Command - RW - 16 bits
-#define FCH_SATA_REG06           0x006   // PCI Status - RW - 16 bits
-#define FCH_SATA_REG08           0x008   // Revision ID/PCI Class Code - R - 32 bits - Offset: 08
-#define FCH_SATA_REG0C           0x00C   // Cache Line Size - R/W - 8bits
-#define FCH_SATA_REG0D           0x00D   // Latency Timer - RW - 8 bits
-#define FCH_SATA_REG0E           0x00E   // Header Type - R - 8 bits
-#define FCH_SATA_REG0F           0x00F   // BIST - R - 8 bits
-#define FCH_SATA_REG10           0x010   // Base Address Register 0 - RW - 32 bits
-#define FCH_SATA_REG14           0x014   // Base Address Register 1 - RW- 32 bits
-#define FCH_SATA_REG18           0x018   // Base Address Register 2 - RW - 32 bits
-#define FCH_SATA_REG1C           0x01C   // Base Address Register 3 - RW - 32 bits
-#define FCH_SATA_REG20           0x020   // Base Address Register 4 - RW - 32 bits
-#define FCH_SATA_REG24           0x024   // Base Address Register 5 - RW - 32 bits
-#define FCH_SATA_REG2C           0x02C   // Subsystem Vendor ID - R - 16 bits
-#define FCH_SATA_REG2D           0x02D   // Subsystem ID - R - 16 bits
-#define FCH_SATA_REG30           0x030   // Expansion ROM Base Address - 32 bits
-#define FCH_SATA_REG34           0x034   // Capabilities Pointer - R - 32 bits
-#define FCH_SATA_REG3C           0x03C   // Interrupt Line - RW - 8 bits
-#define FCH_SATA_REG3D           0x03D   // Interrupt Pin - R - 8 bits
-#define FCH_SATA_REG3E           0x03E   // Min Grant - R - 8 bits
-#define FCH_SATA_REG3F           0x03F   // Max Latency - R - 8 bits
-#define FCH_SATA_REG40           0x040   // Configuration - RW - 32 bits
-#define FCH_SATA_REG44           0x044   // Software Data Register - RW - 32 bits
-#define FCH_SATA_REG48           0x048
-#define FCH_SATA_REG4C           0x04C
-#define FCH_SATA_REG50           0x050   // Message Capability - R - 16 bits
-#define FCH_SATA_REG52           0x052   // Message Control - R/W - 16 bits
-#define FCH_SATA_REG54           0x054   // Message Address - R/W - 32 bits
-#define FCH_SATA_REG58           0x058   // Message Data - R/W - 16 bits
-#define FCH_SATA_REG5C           0x05C   // RAMBIST Control Register - R/W - 8 bits
-#define FCH_SATA_REG5D           0x05D   // RAMBIST Status0 Register - R - 8 bits
-#define FCH_SATA_REG5E           0x05E   // RAMBIST Status1 Register - R - 8 bits
-#define FCH_SATA_REG60           0x060   // Power Management Capabilities - R - 32 bits
-#define FCH_SATA_REG64           0x064   // Power Management Control + Status - RW - 32 bits
-#define FCH_SATA_REG68           0x068   // MSI Program - R/W - 8 bits
-#define FCH_SATA_REG69           0x069   // PCI Burst Timer - R/W - 8 bits
-#define FCH_SATA_REG70           0x070   // PCI Bus Master - IDE0 - RW - 32 bits
-#define FCH_SATA_REG74           0x074   // PRD Table Address - IDE0 - RW - 32 bits
-#define FCH_SATA_REG78           0x078   // PCI Bus Master - IDE1 - RW - 32 bits
-#define FCH_SATA_REG7C           0x07C   // PRD Table Address - IDE1 - RW - 32 bits
-#define FCH_SATA_REG80           0x080   // Data Transfer Mode - IDE0 - RW - 32 bits
-#define FCH_SATA_REG84           0x084   // Data Transfer Mode - IDE1 - RW - 32 bits
-#define FCH_SATA_REG86           0x086   // PY Global Control
-#define FCH_SATA_REG87           0x087
-#define FCH_SATA_REG88           0x088   // PHY Port0 Control - Port0 PY fine tune (0:23)
-#define FCH_SATA_REG8A           0x08A
-#define FCH_SATA_REG8C           0x08C   // PHY Port1 Control - Port0 PY fine tune (0:23)
-#define FCH_SATA_REG8E           0x08E
-#define FCH_SATA_REG90           0x090   // PHY Port2 Control - Port0 PY fine tune (0:23)
-#define FCH_SATA_REG92           0x092
-#define FCH_SATA_REG94           0x094   // PHY Port3 Control - Port0 PY fine tune (0:23)
-#define FCH_SATA_REG96           0x096
-#define FCH_SATA_REG98           0x098   // EEPROM Memory Address - Command + Status - RW - 32 bits
-#define FCH_SATA_REG9C           0x09C   // EEPROM Memory Data - RW - 32 bits
-#define FCH_SATA_REGA0           0x0A0   //
-#define FCH_SATA_REGA4           0x0A4   //
-#define FCH_SATA_REGA5           0x0A5   //;
-#define FCH_SATA_REGA8           0x0A8   //
-#define FCH_SATA_REGAD           0x0AD   //;
-#define FCH_SATA_REGB0           0x0B0   // IDE1 Task File Configuration + Status - RW - 32 bits
-#define FCH_SATA_REGB5           0x0B5   //;
-#define FCH_SATA_REGBD           0x0BD   //;
-#define FCH_SATA_REGC0           0x0C0   // BA5 Indirect Address - RW - 32 bits
-#define FCH_SATA_REGC4           0x0C4   // BA5 Indirect Access - RW - 32 bits
-
-#define FCH_SATA_BAR5_REG00      0x000   // PCI Bus Master - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG04      0x004   // PRD Table Address - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG08      0x008   // PCI Bus Master - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG0C      0x00C   // PRD Table Address - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG10      0x010   // PCI Bus Master2 - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG1C      0x01C
-#define FCH_SATA_BAR5_REG18      0x018   // PCI Bus Master2 - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG20      0x020   // PRD Address - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG24      0x024   // PCI Bus Master Byte Count - IDE0- RW - 32 bits
-#define FCH_SATA_BAR5_REG28      0x028   // PRD Address - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG2C      0x02C   // PCI Bus Master Byte Count - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG40      0x040   // FIFO Valid Byte Count and Control - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG44      0x044   // FIFO Valid Byte Count and Control - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REG48      0x048   // System Configuration Status - Command - RW - 32 bits
-#define FCH_SATA_BAR5_REG4C      0x04C   // System Software Data Register - RW - 32 bits
-#define FCH_SATA_BAR5_REG50      0x050   // FLAS Memory Address - Command + Status - RW - 32 bits
-#define FCH_SATA_BAR5_REG54      0x054   // FLAS Memory Data - RW - 32 bits
-#define FCH_SATA_BAR5_REG58      0x058   // EEPROM Memory Address - Command + Status - RW - 32 bits
-#define FCH_SATA_BAR5_REG5C      0x05C   // EEPROM Memory Data - RW - 32 bits
-#define FCH_SATA_BAR5_REG60      0x060   // FIFO Port - IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG68      0x068   // FIFO Pointers1- IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG6C      0x06C   // FIFO Pointers2- IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REG70      0x070   // FIFO Port - IDE1- RW - 32 bits
-#define FCH_SATA_BAR5_REG78      0x078   // FIFO Pointers1- IDE1- RW - 32 bits
-#define FCH_SATA_BAR5_REG7C      0x07C   // FIFO Pointers2- IDE1- RW - 32 bits
-#define FCH_SATA_BAR5_REG80      0x080   // IDE0 Task File Register 0- RW - 32 bits
-#define FCH_SATA_BAR5_REG84      0x084   // IDE0 Task File Register 1- RW - 32 bits
-#define FCH_SATA_BAR5_REG88      0x088   // IDE0 Task File Register 2- RW - 32 bits
-#define FCH_SATA_BAR5_REG8C      0x08C   // IDE0 Read Data - RW - 32 bits
-#define FCH_SATA_BAR5_REG90      0x090   // IDE0 Task File Register 0 - Command Buffering - RW - 32 bits
-#define FCH_SATA_BAR5_REG94      0x094   // IDE0 Task File Register 1 - Command Buffering - RW - 32 bits
-#define FCH_SATA_BAR5_REG9C      0x09C   // IDE0 Virtual DMA/PIO Read Byte Count - RW - 32 bits
-#define FCH_SATA_BAR5_REGA0      0x0A0   // IDE0 Task File Configuration + Status - RW - 32 bits
-#define FCH_SATA_BAR5_REGB4      0x0B4   // Data Transfer Mode -IDE0 - RW - 32 bits
-#define FCH_SATA_BAR5_REGC0      0x0C0   // IDE1 Task File Register 0 - RW - 32 bits
-#define FCH_SATA_BAR5_REGC4      0x0C4   // IDE1 Task File Register 1 - RW - 32 bits
-#define FCH_SATA_BAR5_REGC8      0x0C8   // IDE1 Task File Register 2 - RW - 32 bits
-#define FCH_SATA_BAR5_REGCC      0x0CC   //  Read/Write Data - RW - 32 bits
-#define FCH_SATA_BAR5_REGD0      0x0D0   // IDE1 Task File Register 0 - Command Buffering - RW - 32 bits
-#define FCH_SATA_BAR5_REGD4      0x0D4   // IDE1 Task File Register 1 - Command Buffering - RW - 32 bits
-#define FCH_SATA_BAR5_REGDC      0x0DC   // IDE1 Virtual DMA/PIO Read Byte Count - RW - 32 bits
-#define FCH_SATA_BAR5_REGE0      0x0E0   // IDE1 Task File Configuration + Status - RW - 32 bits
-#define FCH_SATA_BAR5_REGF4      0x0F4   // Data Transfer Mode - IDE1 - RW - 32 bits
-#define FCH_SATA_BAR5_REGF8      0x0F8   // PORT Configuration
-#define FCH_SATA_BAR5_REGFC      0x0FC
-#define FCH_SATA_BAR5_REG100     0x0100  // Serial ATA SControl - RW - 32 bits - [Offset: 100h (channel 1) / 180
-#define FCH_SATA_BAR5_REG104     0x0104  // Serial ATA Sstatus - RW - 32 bits - [Offset: 104h (channel 1) / 184h (cannel
-#define FCH_SATA_BAR5_REG108     0x0108  // Serial ATA Serror - RW - 32 bits - [Offset: 108h (channel 1) / 188h (cannel
-#define FCH_SATA_BAR5_REG10C     0x010C  // Serial ATA Sdevice - RW - 32 bits - [Offset: 10Ch (channel 1) / 18Ch (cannel
-#define FCH_SATA_BAR5_REG144     0x0144  // Serial ATA PY Configuration - RW - 32 bits
-#define FCH_SATA_BAR5_REG148     0x0148  // SIEN - RW - 32 bits - [Offset: 148 (channel 1) / 1C8 (cannel 2)]
-#define FCH_SATA_BAR5_REG14C     0x014C  // SFISCfg - RW - 32 bits - [Offset: 14C (channel 1) / 1CC (cannel 2)]
-#define FCH_SATA_BAR5_REG120     0x0120  //
-#define FCH_SATA_BAR5_REG128     0x0128  // Port Serial ATA Status
-#define FCH_SATA_BAR5_REG12C     0x012C  // Port Serial ATA Control
-#define FCH_SATA_BAR5_REG130     0x0130
-#define FCH_SATA_BAR5_REG1B0     0x01B0
-#define FCH_SATA_BAR5_REG230     0x0230
-#define FCH_SATA_BAR5_REG2B0     0x02B0
-#define FCH_SATA_BAR5_REG330     0x0330
-#define FCH_SATA_BAR5_REG3B0     0x03B0
-#define FCH_SATA_BAR5_REG430     0x0430
-#define FCH_SATA_BAR5_REG4B0     0x04B0
-
-
-// USB ports
-#define NUM_USB1_PORTS           5
-#define NUM_USB2_PORTS           5
-#define NUM_USB3_PORTS           4
-#define NUM_USB4_PORTS           2
-#define NUM_XHC0_PORTS           2
-#define NUM_XHC1_PORTS           2
-
-
-//
-//  USB OHCI Device 0x7807
-//  Device 18 (0x11)/Device 19 (0x12)/Device 22 (0x16) Func 0
-//  Device 20 (0x14) Func 5 (FL) 0x7809
-//
-#define FCH_OHCI_REG00           0x00        // Device/Vendor ID - R (0x43971002ul)
-#define FCH_OHCI_REG04           0x04        // Command - RW
-#define FCH_OHCI_REG06           0x06        // Status - R
-#define FCH_OHCI_REG08           0x08        // Revision ID/Class Code - R
-#define FCH_OHCI_REG0C           0x0C        // Miscellaneous - RW
-#define FCH_OHCI_REG10           0x10        // Bar_OCI - RW
-#define FCH_OHCI_REG2C           0x2C        // Subsystem Vendor ID/ Subsystem ID - RW
-#define FCH_OHCI_REG34           0x34        // Capability Pointer - R
-#define FCH_OHCI_REG3C           0x3C        // Interrupt Line - RW
-#define FCH_OHCI_REG3D           0x3D        // Interrupt Line - RW
-#define FCH_OHCI_REG40           0x40        // Config Timers - RW
-#define FCH_OHCI_REG42           0x42        // Port Disable Control - RW (800)
-#define FCH_OHCI_REG46           0x46        // USB PHY Battery Charger - RW (800)
-#define FCH_OHCI_REG48           0x48        // Port Force Reset - RW (800)
-#define FCH_OHCI_REG4C           0x4C        // MSI - RW   (800)
-#define FCH_OHCI_REG50           0x50        // Misc Control - RW
-#define FCH_OHCI_REG51           0x51
-#define FCH_OHCI_REG52           0x52
-#define FCH_OHCI_REG58           0x58        // Over Current Control - RW
-#define FCH_OHCI_REG5C           0x5C        // Over Current Control - RW
-#define FCH_OHCI_REG60           0x60        // Serial Bus Release Number - RW
-#define FCH_OHCI_REG68           0x68        // Over Current PME Enable - RW
-#define FCH_OHCI_REG74           0x74        // Target Timeout Control - RW
-#define FCH_OHCI_REG80           0x80        //
-#define FCH_OHCI_REGD0           0x0D0       // MSI Control - RW
-#define FCH_OHCI_REGD4           0x0D4       // MSI Address - RW
-#define FCH_OHCI_REGD8           0x0D8       // MSI Data - RW
-#define FCH_OHCI_REGE4           0x0E4       // HT MSI Support
-#define FCH_OHCI_REGF0           0x0F0       // Function Level Reset Capability
-#define FCH_OHCI_REGF4           0x0F4       // Function Level Reset Control
-
-#define FCH_OHCI_BAR_REG00       0x00        // cRevision - R
-#define FCH_OHCI_BAR_REG04       0x04        // cControl
-#define FCH_OHCI_BAR_REG08       0x08        // cCommandStatus
-#define FCH_OHCI_BAR_REG0C       0x0C        // cInterruptStatus  RW
-#define FCH_OHCI_BAR_REG10       0x10        // cInterruptEnable
-#define FCH_OHCI_BAR_REG14       0x14        // cInterruptDisable
-#define FCH_OHCI_BAR_REG18       0x18        // HcCCA
-#define FCH_OHCI_BAR_REG1C       0x1C        // cPeriodCurrentED
-#define FCH_OHCI_BAR_REG20       0x20        // HcControleadED
-#define FCH_OHCI_BAR_REG24       0x24        // cControlCurrentED  RW
-#define FCH_OHCI_BAR_REG28       0x28        // HcBulkeadED
-#define FCH_OHCI_BAR_REG2C       0x2C        // cBulkCurrentED- RW
-#define FCH_OHCI_BAR_REG30       0x30        // HcDoneead
-#define FCH_OHCI_BAR_REG34       0x34        // cFmInterval
-#define FCH_OHCI_BAR_REG38       0x38        // cFmRemaining
-#define FCH_OHCI_BAR_REG3C       0x3C        // cFmNumber
-#define FCH_OHCI_BAR_REG40       0x40        // cPeriodicStart
-#define FCH_OHCI_BAR_REG44       0x44        // HcLSThresold
-#define FCH_OHCI_BAR_REG48       0x48        // HcRDescriptorA
-#define FCH_OHCI_BAR_REG4C       0x4C        // HcRDescriptorB
-#define FCH_OHCI_BAR_REG50       0x50        // HcRStatus
-#define FCH_OHCI_BAR_REG54       0x54        // HcRhPortStatus (800)
-#define FCH_OHCI_BAR_REG58       0x58        // HcRhPortStatus NPD (800)
-#define FCH_OHCI_BAR_REGF0       0xF0        // OHCI Loop Back feature Support (800)
-
-#define FCH_OHCI_PORTSC_CCS      0x1         // HcRhPortStatus
-#define FCH_OHCI_PORTSC_PES      0x2         // HcRhPortStatus
-#define FCH_OHCI_PORTSC_PSS      0x4         // HcRhPortStatus
-#define FCH_OHCI_PORTSC_PPS      0x100       // HcRhPortStatus
-#define FCH_OHCI_PORTSC_LSDA     0x200       // HcRhPortStatus
-#define FCH_OHCI_PORTSC_PRS      0x10        // HcRhPortStatus
-
-//
-//  USB EHCI Device 0x7808
-//  Device 18 (0x11)/Device 19 (0x12)/Device 22 (0x16) Func 2
-//
-#define FCH_EHCI_REG00           0x00        // DEVICE/VENDOR ID - R
-#define FCH_EHCI_REG04           0x04        // Command - RW
-#define FCH_EHCI_REG06           0x06        // Status - R
-#define FCH_EHCI_REG08           0x08        // Revision ID/Class Code - R
-#define FCH_EHCI_REG0C           0x0C        // Miscellaneous - RW
-#define FCH_EHCI_REG10           0x10        // BAR - RW
-#define FCH_EHCI_REG2C           0x2C        // Subsystem ID/Subsystem Vendor ID - RW
-#define FCH_EHCI_REG34           0x34        // Capability Pointer - R
-#define FCH_EHCI_REG3C           0x3C        // Interrupt Line - RW
-#define FCH_EHCI_REG3D           0x3D        // Interrupt Line - RW
-#define FCH_EHCI_REG40           0x40        // Config Timers - RW
-#define FCH_EHCI_REG4C           0x4C        // MSI - RW
-#define FCH_EHCI_REG50           0x50        // EHCI Misc Control - RW
-#define FCH_EHCI_REG54           0x54        // EHCI Misc Control - RW
-#define FCH_EHCI_REG60           0x60        // SBRN - R
-#define FCH_EHCI_REG61           0x61        // FLADJ - RW
-#define FCH_EHCI_REG62           0x62        // PORTWAKECAP - RW
-#define FCH_EHCI_REG64           0x64        // Misc Control 2 - RW
-#define FCH_EHCI_REG70           0x70        // Over Current Control - RW
-#define FCH_EHCI_REG74           0x74        // EHCI Misc Control2 - RW
-#define FCH_EHCI_REG84           0x84        // HUB Configure 1 - RW
-#define FCH_EHCI_REG88           0x88        // - RW
-#define FCH_EHCI_REG90           0x90        // HUB Configure 4 - RW
-#define FCH_EHCI_REGA0           0xA0        //
-#define FCH_EHCI_REGA4           0xA4        //
-#define FCH_EHCI_REGC0           0x0C0       // PME control - RW (800)
-#define FCH_EHCI_REGC4           0x0C4       // PME Data /Status - RW (800)
-#define FCH_EHCI_REGD0           0x0D0       // MSI Control - RW
-#define FCH_EHCI_REGD4           0x0D4       // MSI Address - RW
-#define FCH_EHCI_REGD8           0x0D8       // MSI Data - RW
-#define FCH_EHCI_REGE4           0x0E4       // EHCI Debug Port Support - RW (800)
-#define FCH_EHCI_REGF0           0x0F0       // Function Level Reset Capability - R (800)
-#define FCH_EHCI_REGF4           0x0F4       // Function Level Reset Capability - R (800)
-
-#define FCH_EHCI_BAR_REG00       0x00        // CAPLENGT - R
-#define FCH_EHCI_BAR_REG02       0x002       // CIVERSION- R
-#define FCH_EHCI_BAR_REG04       0x004       // CSPARAMS - R
-#define FCH_EHCI_BAR_REG08       0x008       // CCPARAMS - R
-#define FCH_EHCI_BAR_REG0C       0x00C       // CSP-PORTROUTE - R
-
-#define FCH_EHCI_BAR_REG20       0x020       // USBCMD - RW - 32 bits
-#define FCH_EHCI_BAR_REG24       0x024       // USBSTS - RW - 32 bits
-#define FCH_EHCI_BAR_REG28       0x028       // USBINTR -RW - 32 bits
-#define FCH_EHCI_BAR_REG2C       0x02C       // FRINDEX -RW - 32 bits
-#define FCH_EHCI_BAR_REG30       0x030       // CTRLDSSEGMENT -RW - 32 bits
-#define FCH_EHCI_BAR_REG34       0x034       // PERIODICLISTBASE -RW - 32 bits
-#define FCH_EHCI_BAR_REG38       0x038       // ASYNCLISTADDR -RW - 32 bits
-#define FCH_EHCI_BAR_REG60       0x060       // CONFIGFLAG -RW - 32 bits
-#define FCH_EHCI_BAR_REG64       0x064       // PORTSC (1-N_PORTS) -RW - 32 bits
-#define FCH_EHCI_BAR_REGA0       0x0A0       // DebugPort MISC Control - RW - 32 bits (800)
-#define FCH_EHCI_BAR_REGA4       0x0A4       // Packet Buffer Threshold Values - RW - 32 bits
-#define FCH_EHCI_BAR_REGA8       0x0A8       // USB PHY Status 0 - R
-#define FCH_EHCI_BAR_REGAC       0x0AC       // USB PHY Status 1 - R
-#define FCH_EHCI_BAR_REGB0       0x0B0       // USB PHY Status 2 - R
-#define FCH_EHCI_BAR_REGB4       0x0B4       // UTMI Control - RW (800)
-#define FCH_EHCI_BAR_REGB8       0x0B8       // Loopback Test
-#define FCH_EHCI_BAR_REGBC       0x0BC       // EHCI MISC Control
-#define FCH_EHCI_BAR_REGC0       0x0C0       // USB PHY Calibration
-#define FCH_EHCI_BAR_REGC4       0x0C4       // USB Common PHY Control
-#define FCH_EHCI_BAR_REGC8       0x0C8       // EHCI Debug Purpose
-#define FCH_EHCI_BAR_REGCC       0x0CC       // Ehci Spare 1 (800) **
-#define FCH_EHCI_BAR_REGD0       0x0D0
-#define FCH_EHCI_BAR_REGD4       0x0D4
-#define FCH_EHCI_BAR_REGDC       0x0DC
-#define FCH_EHCI_BAR_REG100      0x100       // USB debug port
-
-//
-//  USB XHCI Device 0x7812/0x7814
-//  Device 16 (0x10) Func 0/1
-//
-#define FCH_XHCI_REG00           0x00        // DEVICE/VENDOR ID - R
-#define FCH_XHCI_REG04           0x04        // Command - RW
-#define FCH_XHCI_REG10           0x10        // Bar0
-#define FCH_XHCI_REG2C           0x2C        // Sub System ID
-#define FCH_XHCI_REG40           0x40        // Index0
-#define FCH_XHCI_REG44           0x44        // Data0
-#define FCH_XHCI_REG48           0x48        // Index1
-#define FCH_XHCI_REG4C           0x4C        // Data0
-#define FCH_XHCI_REG54           0x54        // PME Control/Status
-#define XHCI_EFUSE_LOCATION      0x18        // EFUSE bit 192, 193
-
-#define FCH_XHCI_BAR_REG420      0x420       // Port Status and Control
-#define FCH_XHCI_PORTSC_CCS      0x1         // Port Status and Control
-#define FCH_XHCI_PORTSC_PED      0x2         // Port Status and Control
-#define FCH_XHCI_PORTSC_PLS      0x1E0       // Port Status and Control
-#define FCH_XHCI_PORTSC_SPEED    0x3C00      // Port Status and Control
-#define FCH_XHCI_PORTSC_PR       0x10        // Port Status and Control
-
-//
-//  FCH CFG device  0x780B
-//  Device 20 (0x14) Func 0
-//
-#define FCH_CFG_REG00            0x000       // VendorID - R
-#define FCH_CFG_REG02            0x002       // DeviceID - R
-#define FCH_CFG_REG04            0x004       // Command- RW
-#define FCH_CFG_REG05            0x005       // Command- RW
-#define FCH_CFG_REG06            0x006       // STATUS- RW
-#define FCH_CFG_REG08            0x008       // Revision ID/Class Code- R
-#define FCH_CFG_REG0A            0x00A       //
-#define FCH_CFG_REG0B            0x00B       //
-#define FCH_CFG_REG0C            0x00C       // Cache Line Size- R
-#define FCH_CFG_REG0D            0x00D       // Latency Timer- R
-#define FCH_CFG_REG0E            0x00E       // Header Type- R
-#define FCH_CFG_REG0F            0x00F       // BIST- R
-#define FCH_CFG_REG10            0x010       // Base Address 0- R
-#define FCH_CFG_REG11            0x011       //;
-#define FCH_CFG_REG12            0x012       //;
-#define FCH_CFG_REG13            0x013       //;
-#define FCH_CFG_REG14            0x014       // Base Address 1- R
-#define FCH_CFG_REG18            0x018       // Base Address 2- R
-#define FCH_CFG_REG1C            0x01C       // Base Address 3- R
-#define FCH_CFG_REG20            0x020       // Base Address 4- R
-#define FCH_CFG_REG24            0x024       // Base Address 5- R
-#define FCH_CFG_REG28            0x028       // Cardbus CIS Pointer- R
-#define FCH_CFG_REG2C            0x02C       // Subsystem Vendor ID- W
-#define FCH_CFG_REG2E            0x02E       // Subsystem ID- W
-#define FCH_CFG_REG30            0x030       // Expansion ROM Base Address - R
-#define FCH_CFG_REG34            0x034       // Capability Pointer - R  (800) default changed as 0x00
-#define FCH_CFG_REG3C            0x03C       // Interrupt Line - R
-#define FCH_CFG_REG3D            0x03D       // Interrupt Pin - R
-#define FCH_CFG_REG3E            0x03E       // Min_Gnt - R
-#define FCH_CFG_REG3F            0x03F       // Max_Lat - R
-#define FCH_CFG_REG90            0x090       // Smbus Base Address - R
-#define FCH_CFG_REG9C            0x09C       // SBResourceMMIO_BASE
-
-//
-//  FCH SATA IDE device
-//  Device 20 (0x14) Func 1
-//
-
-#define FCH_IDE_REG00            0x00        // Vendor ID
-#define FCH_IDE_REG02            0x02        // Device ID
-#define FCH_IDE_REG04            0x04        // Command
-#define FCH_IDE_REG06            0x06        // Status
-#define FCH_IDE_REG08            0x08        // Revision ID/Class Code
-#define FCH_IDE_REG09            0x09        // Class Code
-#define FCH_IDE_REG2C            0x2C        // Subsystem ID and Subsystem Vendor ID
-#define FCH_IDE_REG40            0x40        // Configuration - RW - 32 bits
-#define FCH_IDE_REG34            0x34
-#define FCH_IDE_REG62            0x62        // IDE Internal Control
-#define FCH_IDE_REG63            0x63        // IDE Internal Control
-//
-//  FCH AZALIA device  0x780D
-//  Device 20 (0x14) Func 2
-//
-#define ATI_AZALIA_ExtBlk_Addr          0x0F8
-#define ATI_AZALIA_ExtBlk_DATA          0x0FC
-
-#define FCH_AZ_REG00             0x00        // Vendor ID - R
-#define FCH_AZ_REG02             0x02        // Device ID - R/W
-#define FCH_AZ_REG04             0x04        // PCI Command
-#define FCH_AZ_REG06             0x06        // PCI Status - R/W
-#define FCH_AZ_REG08             0x08        // Revision ID
-#define FCH_AZ_REG09             0x09        // Programming Interface
-#define FCH_AZ_REG0A             0x0A        // Sub Class Code
-#define FCH_AZ_REG0B             0x0B        // Base Class Code
-#define FCH_AZ_REG0C             0x0C        // Cache Line Size - R/W
-#define FCH_AZ_REG0D             0x0D        // Latency Timer
-#define FCH_AZ_REG0E             0x0E        // Header Type
-#define FCH_AZ_REG0F             0x0F        // BIST
-#define FCH_AZ_REG10             0x10        // Lower Base Address Register
-#define FCH_AZ_REG14             0x14        // Upper Base Address Register
-#define FCH_AZ_REG2C             0x2C        // Subsystem Vendor ID
-#define FCH_AZ_REG2D             0x2D        // Subsystem ID
-#define FCH_AZ_REG34             0x34        // Capabilities Pointer
-#define FCH_AZ_REG3C             0x3C        // Interrupt Line
-#define FCH_AZ_REG3D             0x3D        // Interrupt Pin
-#define FCH_AZ_REG3E             0x3E        // Minimum Grant
-#define FCH_AZ_REG3F             0x3F        // Maximum Latency
-#define FCH_AZ_REG40             0x40        // Misc Control 1
-#define FCH_AZ_REG42             0x42        // Misc Control 2 Register
-#define FCH_AZ_REG43             0x43        // Misc Control 3 Register
-#define FCH_AZ_REG44             0x44        // Interrupt Pin Control Register
-#define FCH_AZ_REG46             0x46        // Debug Control Register
-#define FCH_AZ_REG4C             0x4C
-#define FCH_AZ_REG50             0x50        // Power Management Capability ID
-#define FCH_AZ_REG52             0x52        // Power Management Capabilities
-#define FCH_AZ_REG54             0x54        // Power Management Control/Status
-#define FCH_AZ_REG60             0x60        // MSI Capability ID
-#define FCH_AZ_REG62             0x62        // MSI Message Control
-#define FCH_AZ_REG64             0x64        // MSI Message Lower Address
-#define FCH_AZ_REG68             0x68        // MSI Message Upper Address
-#define FCH_AZ_REG6C             0x6C        // MSI Message Data
-
-#define FCH_AZ_BAR_REG00         0x00        // Global Capabilities - R
-#define FCH_AZ_BAR_REG02         0x02        // Minor Version - R
-#define FCH_AZ_BAR_REG03         0x03        // Major Version - R
-#define FCH_AZ_BAR_REG04         0x04        // Output Payload Capability - R
-#define FCH_AZ_BAR_REG06         0x06        // Input Payload Capability - R
-#define FCH_AZ_BAR_REG08         0x08        // Global Control - R/W
-#define FCH_AZ_BAR_REG0C         0x0C        // Wake Enable - R/W
-#define FCH_AZ_BAR_REG0E         0x0E        // State Change Status - R/W
-#define FCH_AZ_BAR_REG10         0x10        // Global Status - R/W
-#define FCH_AZ_BAR_REG18         0x18        // Output Stream Payload Capability - R
-#define FCH_AZ_BAR_REG1A         0x1A        // Input Stream Payload Capability - R
-#define FCH_AZ_BAR_REG20         0x20        // Interrupt Control - R/W
-#define FCH_AZ_BAR_REG24         0x24        // Interrupt Status - R/W
-#define FCH_AZ_BAR_REG30         0x30        // Wall Clock Counter - R
-#define FCH_AZ_BAR_REG38         0x38        // Stream Synchronization - R/W
-#define FCH_AZ_BAR_REG40         0x40        // CORB Lower Base Address - R/W
-#define FCH_AZ_BAR_REG44         0x44        // CORB Upper Base Address - RW
-#define FCH_AZ_BAR_REG48         0x48        // CORB Write Pointer - R/W
-#define FCH_AZ_BAR_REG4A         0x4A        // CORB Read Pointer - R/W
-#define FCH_AZ_BAR_REG4C         0x4C        // CORB Control - R/W
-#define FCH_AZ_BAR_REG4D         0x4D        // CORB Status - R/W
-#define FCH_AZ_BAR_REG4E         0x4E        // CORB Size - R/W
-#define FCH_AZ_BAR_REG50         0x50        // RIRB Lower Base Address - RW
-#define FCH_AZ_BAR_REG54         0x54        // RIRB Upper Address - RW
-#define FCH_AZ_BAR_REG58         0x58        // RIRB Write Pointer - RW
-#define FCH_AZ_BAR_REG5A         0x5A        // RIRB Response Interrupt Count - R/W
-#define FCH_AZ_BAR_REG5C         0x5C        // RIRB Control - R/W
-#define FCH_AZ_BAR_REG5D         0x5D        // RIRB Status - R/W
-#define FCH_AZ_BAR_REG5E         0x5E        // RIRB Size - R/W
-#define FCH_AZ_BAR_REG60         0x60        // Immediate Command Output Interface - R/W
-#define FCH_AZ_BAR_REG64         0x64        // Immediate Command Input Interface - R/W
-#define FCH_AZ_BAR_REG68         0x68        // Immediate Command Input Interface - R/W
-#define FCH_AZ_BAR_REG70         0x70        // DMA Position Lower Base Address - R/W
-#define FCH_AZ_BAR_REG74         0x74        // DMA Position Upper Base Address - R/W
-#define FCH_AZ_BAR_REG2030       0x2030      // Wall Clock Counter Alias - R
-
-//
-//  FCH LPC Device  0x780E
-//  Device 20 (0x14) Func 3
-//
-#define FCH_LPC_REG00            0x00        // VID- R
-#define FCH_LPC_REG02            0x02        // DID- R
-#define FCH_LPC_REG04            0x04        // CMD- RW
-#define FCH_LPC_REG06            0x06        // STATUS- RW
-#define FCH_LPC_REG08            0x08        // Revision  ID/Class Code - R
-#define FCH_LPC_REG0C            0x0C        // Cache Line Size - R
-#define FCH_LPC_REG0D            0x0D        // Latency Timer - R
-#define FCH_LPC_REG0E            0x0E        // Header Type - R
-#define FCH_LPC_REG0F            0x0F        // BIST- R
-#define FCH_LPC_REG10            0x10        // Base Address Reg 0- RW*
-#define FCH_LPC_REG2C            0x2C        // Subsystem ID & Subsystem Vendor ID - Wo/Ro
-#define FCH_LPC_REG34            0x34        // Capabilities Pointer - Ro
-#define FCH_LPC_REG40            0x40        // PCI Control - RW
-#define FCH_LPC_REG44            0x44        // IO Port Decode Enable Register 1- RW
-#define FCH_LPC_REG45            0x45        // IO Port Decode Enable Register 2- RW
-#define FCH_LPC_REG46            0x46        // IO Port Decode Enable Register 3- RW
-#define FCH_LPC_REG47            0x47        // IO Port Decode Enable Register 4- RW
-#define FCH_LPC_REG48            0x48        // IO/Mem Port Decode Enable Register 5- RW
-#define FCH_LPC_REG49            0x49        // LPC Sync Timeout Count - RW
-#define FCH_LPC_REG4A            0x4A        // IO/Mem Port Decode Enable Register 6- RW
-#define FCH_LPC_REG4C            0x4C        // Memory Range Register - RW
-#define FCH_LPC_REG50            0x50        // Rom Protect 0 - RW
-#define FCH_LPC_REG54            0x54        // Rom Protect 1 - RW
-#define FCH_LPC_REG58            0x58        // Rom Protect 2 - RW
-#define FCH_LPC_REG5C            0x5C        // Rom Protect 3 - RW
-#define FCH_LPC_REG60            0x60        // PCI Memory Start Address of LPC Target Cycles -
-#define FCH_LPC_REG62            0x62        // PCI Memory End Address of LPC Target Cycles -
-#define FCH_LPC_REG64            0x64        // PCI IO base Address of Wide Generic Port - RW
-#define FCH_LPC_REG65            0x65
-#define FCH_LPC_REG66            0x66
-#define FCH_LPC_REG67            0x67
-#define FCH_LPC_REG68            0x68        // LPC ROM Address Range 1 (Start Address) - RW
-#define FCH_LPC_REG69            0x69
-#define FCH_LPC_REG6A            0x6A        // LPC ROM Address Range 1 (End Address) - RW
-#define FCH_LPC_REG6B            0x6B
-#define FCH_LPC_REG6C            0x6C        // LPC ROM Address Range 2 (Start Address)- RW
-#define FCH_LPC_REG6D            0x6D
-#define FCH_LPC_REG6E            0x6E        // LPC ROM Address Range 2 (End Address) - RW
-#define FCH_LPC_REG6F            0x6F
-#define FCH_LPC_REG70            0x70        // Firmware ub Select - RW*
-#define FCH_LPC_REG71            0x71
-#define FCH_LPC_REG72            0x72
-#define FCH_LPC_REG73            0x73
-#define FCH_LPC_REG74            0x74        // Alternative Wide IO Range Enable- W/R
-#define FCH_LPC_REG78            0x78        // Miscellaneous Control Bits- W/R
-#define FCH_LPC_REG7C            0x7C        // TPM (trusted plant form module) reg- W/R
-#define FCH_LPC_REG9C            0x9C
-#define FCH_LPC_REG80            0x80        // MSI Capability Register- R
-#define FCH_LPC_REGA0            0x0A0       // SPI base address
-#define FCH_LPC_REGA1            0x0A1       // SPI base address
-#define FCH_LPC_REGA2            0x0A2       // SPI base address
-#define FCH_LPC_REGA3            0x0A3       // SPI base address
-#define FCH_LPC_REGA4            0x0A4
-#define FCH_LPC_REGB8            0x0B8
-#define FCH_LPC_REGBA            0x0BA       // EcControl
-#define FCH_LPC_REGBB            0x0BB       // HostControl
-#define FCH_LPC_REGC8            0x0C8
-#define FCH_LPC_REGCC            0x0CC       // AutoRomCfg
-#define FCH_LPC_REGD0            0x0D0
-#define FCH_LPC_REGD3            0x0D3
-#define FCH_LPC_REGD4            0x0D4
-
-//
-//  FCH PCIB  0x780F
-//  Device 20 (0x14) Func 4
-//
-#define FCH_PCIB_REG04            0x04       // Command
-#define FCH_PCIB_REG0D            0x0D       // Primary Master Latency Timer
-#define FCH_PCIB_REG1B            0x1B       // Secondary Latency Timer
-#define FCH_PCIB_REG1C            0x1C       // IO Base
-#define FCH_PCIB_REG1D            0x1D       // IO Limit
-#define FCH_PCIB_REG40            0x40       // CPCTRL
-#define FCH_PCIB_REG42            0x42       // CLKCTRL
-#define FCH_PCIB_REG48            0x48       //
-#define FCH_PCIB_REG4A            0x4A       // PCICLK Enable Bits
-#define FCH_PCIB_REG4B            0x4B       // Misc Control
-#define FCH_PCIB_REG4C            0x4C       // AutoClockRun Control
-#define FCH_PCIB_REG50            0x50       // Dual Address Cycle Enable and PCIB_CLK_Stop Override
-#define FCH_PCIB_REG65            0x65       // Misc Control
-#define FCH_PCIB_REG66            0x66       // Misc Control
-//
-//  FCH GEC 0x14E4 0x1699
-//  Device 20 (0x14) Func 6
-//
-#define FCH_GEC_REG10             0x10       // GEC BAR
-
-//
-//  FCH SD
-//  Device 20 (0x14) Func 7
-//
-#define SD_PCI_REG10              0x10
-#define SD_PCI_REG2C              0x2C
-#define SD_PCI_REGA4              0xA4
-#define SD_PCI_REGA8              0xA8
-#define SD_PCI_REGAC              0xAC
-#define SD_PCI_REGB0              0xB0
-#define SD_PCI_REGB8              0xB8
-#define SD_PCI_REGBC              0xBC
-#define SD_PCI_REGD0              0xD0
-#define SD_PCI_REGF0              0xF0
-#define SD_PCI_REGF4              0xF4
-#define SD_PCI_REGF8              0xF8
-#define SD_PCI_REGFC              0xFC
-#define FCH_SD_BAR_REG28          0x28       // SDHC_CTRL1
-#define SD_CARD_PRESENT           BIT0
-#define FCH_SD_BAR_REG2C          0x2C       // SDHC_CTRL2
-#define FCH_SD_FREQUENCY_SLT      BIT2
-#define FCH_SD_BAR_REG3C          0x3C       // SDHC_HOST_CTRL2
-#define FCH_SD_1_8V               BIT3
-
-//
-//  FCH MMIO Base (SMI)
-//    offset : 0x200
-//
-#define FCH_SMI_REG00            0x00         // EventStatus
-#define FCH_SMI_REG04            0x04         // EventEnable
-#define FCH_SMI_REG08            0x08         // SciTrig
-#define FCH_SMI_REG0C            0x0C         // SciLevl
-#define FCH_SMI_REG10            0x10         // SmiSciStatus
-#define FCH_SMI_REG14            0x14         // SmiSciEn
-#define FCH_SMI_REG18            0x18         // ForceSciEn
-#define FCH_SMI_REG1C            0x1C         // SciRwData
-#define FCH_SMI_REG3C            0x3C         // DataErrorStatus
-#define FCH_SMI_REG20            0x20         // SciS0En
-#define FCH_SMI_Gevent0          0x40         // SciMap0
-#define FCH_SMI_Gevent1          0x41         // SciMap1
-#define FCH_SMI_Gevent2          0x42         // SciMap2
-#define FCH_SMI_Gevent3          0x43         // SciMap3
-#define FCH_SMI_Gevent4          0x44         // SciMap4
-#define FCH_SMI_Gevent5          0x45         // SciMap5
-#define FCH_SMI_Gevent6          0x46         // SciMap6
-#define FCH_SMI_Gevent7          0x47         // SciMap7
-#define FCH_SMI_Gevent8          0x48         // SciMap8
-#define FCH_SMI_Gevent9          0x49         // SciMap9
-#define FCH_SMI_Gevent10         0x4A         // SciMap10
-#define FCH_SMI_Gevent11         0x4B         // SciMap11
-#define FCH_SMI_Gevent12         0x4C         // SciMap12
-#define FCH_SMI_Gevent13         0x4D         // SciMap13
-#define FCH_SMI_Gevent14         0x4E         // SciMap14
-#define FCH_SMI_Gevent15         0x4F         // SciMap15
-#define FCH_SMI_Gevent16         0x50         // SciMap16
-#define FCH_SMI_Gevent17         0x51         // SciMap17
-#define FCH_SMI_Gevent18         0x52         // SciMap18
-#define FCH_SMI_Gevent19         0x53         // SciMap19
-#define FCH_SMI_Gevent20         0x54         // SciMap20
-#define FCH_SMI_Gevent21         0x55         // SciMap21
-#define FCH_SMI_Gevent22         0x56         // SciMap22
-#define FCH_SMI_Gevent23         0x57         // SciMap23
-#define FCH_SMI_Usbwakup0        0x58         // SciMap24
-#define FCH_SMI_Usbwakup1        0x59         // SciMap25
-#define FCH_SMI_Usbwakup2        0x5A         // SciMap26
-#define FCH_SMI_Usbwakup3        0x5B         // SciMap27
-#define FCH_SMI_SBGppPme0        0x5C         // SciMap28
-#define FCH_SMI_SBGppPme1        0x5D         // SciMap29
-#define FCH_SMI_SBGppPme2        0x5E         // SciMap30
-#define FCH_SMI_SBGppPme3        0x5F         // SciMap31
-#define FCH_SMI_SBGppHp0         0x60         // SciMap32
-#define FCH_SMI_SBGppHp1         0x61         // SciMap33
-#define FCH_SMI_SBGppHp2         0x62         // SciMap34
-#define FCH_SMI_SBGppHp3         0x63         // SciMap35
-#define FCH_SMI_AzaliaPme        0x64         // SciMap36
-#define FCH_SMI_SataGevent0      0x65         // SciMap37
-#define FCH_SMI_SataGevent1      0x66         // SciMap38
-#define FCH_SMI_GecPme           0x67         // SciMap39
-#define FCH_SMI_IMCGevent0       0x68         // SciMap40
-#define FCH_SMI_IMCGevent1       0x69         // SciMap41
-#define FCH_SMI_CIRPme           0x6A         // SciMap42
-#define FCH_SMI_WakePinGevent    0x6B         // SciMap43
-#define FCH_SMI_FanThGevent      0x6C         // SciMap44    //FanThermalGevent
-#define FCH_SMI_ASFMasterIntr    0x6D         // SciMap45
-#define FCH_SMI_ASFSlaveIntr     0x6E         // SciMap46
-#define FCH_SMI_SMBUS0           0x6F         // SciMap47
-#define FCH_SMI_TWARN            0x70         // SciMap48
-#define FCH_SMI_TMI              0x71         // SciMap49    // TrafficMonitorIntr
-#define FCH_SMI_iLLB             0x72         // SciMap50
-#define FCH_SMI_PowerButton      0x73         // SciMap51
-#define FCH_SMI_ProcHot          0x74         // SciMap52
-#define FCH_SMI_APUHwAssertion   0x75         // SciMap53
-#define FCH_SMI_APUSciAssertion  0x76         // SciMap54
-#define FCH_SMI_RAS              0x77         // SciMap55
-#define FCH_SMI_xHC0Pme          0x78         // SciMap56
-#define FCH_SMI_xHC1Pme          0x79         // SciMap57
-#define FCH_SMI_AcDcWake         0x7A         // SciMap58
-
-// Empty from 0x72-0x7F
-//#Define FCH_SMI_REG7C            0x7F         // SciMap63  ***
-
-#define FCH_SMI_REG80            0x80         //  SmiStatus0
-#define FCH_SMI_REG84            0x84         // SmiStatus1
-#define FCH_SMI_REG88            0x88         // SmiStatus2
-#define FCH_SMI_REG8C            0x8C         // SmiStatus3
-#define FCH_SMI_REG90            0x90         // SmiStatus4
-#define FCH_SMI_REG94            0x94         // SmiPointer
-#define FCH_SMI_REG96            0x96         // SmiTimer
-#define FCH_SMI_REG98            0x98         // SmiTrig
-#define FCH_SMI_REG9C            0x9C         // SmiTrig
-#define FCH_SMI_REGA0            0xA0
-#define FCH_SMI_REGA1            0xA1
-#define FCH_SMI_REGA2            0xA2
-#define FCH_SMI_REGA3            0xA3
-#define FCH_SMI_REGA4            0xA4
-#define FCH_SMI_REGA5            0xA5
-#define FCH_SMI_REGA6            0xA6
-#define FCH_SMI_REGA7            0xA7
-#define FCH_SMI_REGA8            0xA8
-#define FCH_SMI_REGA9            0xA9
-#define FCH_SMI_REGAA            0xAA
-#define FCH_SMI_REGAB            0xAB
-#define FCH_SMI_REGAC            0xAC
-#define FCH_SMI_REGAD            0xAD
-#define FCH_SMI_REGAE            0xAE
-#define FCH_SMI_REGAF            0xAF
-#define FCH_SMI_REGB0            0xB0
-#define FCH_SMI_REGB1            0xB1
-#define FCH_SMI_REGB2            0xB2
-#define FCH_SMI_REGB3            0xB3
-#define FCH_SMI_REGB4            0xB4
-#define FCH_SMI_REGB5            0xB5
-#define FCH_SMI_REGB6            0xB6
-#define FCH_SMI_REGB7            0xB7
-#define FCH_SMI_REGB8            0xB8
-#define FCH_SMI_REGB9            0xB9
-#define FCH_SMI_REGBA            0xBA
-#define FCH_SMI_REGBB            0xBB
-#define FCH_SMI_REGBC            0xBC
-#define FCH_SMI_REGBD            0xBD
-#define FCH_SMI_REGBE            0xBE
-#define FCH_SMI_REGBF            0xBF
-#define FCH_SMI_REGC0            0xC0
-#define FCH_SMI_REGC1            0xC1
-#define FCH_SMI_REGC2            0xC2
-#define FCH_SMI_REGC3            0xC3
-#define FCH_SMI_REGC4            0xC4
-#define FCH_SMI_REGC5            0xC5
-#define FCH_SMI_REGC6            0xC6
-#define FCH_SMI_REGC7            0xC7
-#define FCH_SMI_REGC8            0xC8
-#define FCH_SMI_REGCA            0xCA         //  IoTrapping1
-#define FCH_SMI_REGCC            0xCC         //  IoTrapping2
-#define FCH_SMI_REGCE            0xCE         //  IoTrapping3
-#define FCH_SMI_TRAPPING_WRITE   0x01
-#define FCH_SMI_REGD0            0xD0         //  MemTrapping0
-#define FCH_SMI_REGD4            0xD4         //  MemRdOvrData0
-#define FCH_SMI_REGD8            0xD8         //  MemTrapping1
-#define FCH_SMI_REGDC            0xDC         //  MemRdOvrData1
-#define FCH_SMI_REGE0            0xE0         //  MemTrapping2
-#define FCH_SMI_REGE4            0xE4         //  MemRdOvrData2
-#define FCH_SMI_REGE8            0xE8         //  MemTrapping3
-#define FCH_SMI_REGEC            0xEC         //  MemRdOvrData3
-#define FCH_SMI_REGF0            0xF0         //  CfgTrapping0
-#define FCH_SMI_REGF4            0xF4         //  CfgTrapping1
-#define FCH_SMI_REGF8            0xF8         //  CfgTrapping2
-#define FCH_SMI_REGFC            0xFC         //  CfgTrapping3
-
-//
-//  FCH MMIO Base (PMIO)
-//    offset : 0x300
-//
-#define FCH_PMIOA_REG00          0x00        // ISA Decode
-#define FCH_PMIOA_REG04          0x04        // ISA Control
-#define FCH_PMIOA_REG08          0x08        // PCI Control
-#define FCH_PMIOA_REG0C          0x0C        // StpClkSmaf
-#define FCH_PMIOA_REG10          0x10        // RetryDetect
-#define FCH_PMIOA_REG14          0x14        // StuckDetect
-#define FCH_PMIOA_REG20          0x20        // BiosRamEn
-#define FCH_PMIOA_REG24          0x24        //  AcpiMmioEn
-#define FCH_PMIOA_REG28          0x28         // AsfEn
-#define FCH_PMIOA_REG2C          0x2C         // Smbus0En
-#define FCH_PMIOA_REG2E          0x2E         // Smbus0Sel
-#define FCH_PMIOA_REG34          0x34         // IoApicEn
-#define FCH_PMIOA_REG3C          0x3C         // SmartVoltEn
-#define FCH_PMIOA_REG40          0x40         // SmartVolt2En
-#define FCH_PMIOA_REG44          0x44         // BootTimerEn
-#define FCH_PMIOA_REG48          0x48         // WatchDogTimerEn
-#define FCH_PMIOA_REG4C          0x4C         // WatchDogTimerConfig
-#define FCH_PMIOA_REG50          0x50         // HPETEn
-#define FCH_PMIOA_REG54          0x54         // SerialIrqConfig
-#define FCH_PMIOA_REG56          0x56         // RtcControl
-#define FCH_PMIOA_REG58          0x58         // VRT_T1
-#define FCH_PMIOA_REG59          0x59         // VRT_T2
-#define FCH_PMIOA_REG5A          0x5A         // IntruderControl
-#define FCH_PMIOA_REG5B          0x5B         // RtcShadow
-#define FCH_PMIOA_REG5C          0x5C
-#define FCH_PMIOA_REG5D          0x5D
-#define FCH_PMIOA_REG5E          0x5E         // RtcExtIndex
-#define FCH_PMIOA_REG5F          0x5F         // RtcExtData
-#define FCH_PMIOA_REG60          0x60         // AcpiPm1EvtBlk
-#define FCH_PMIOA_REG62          0x62         // AcpiPm1CntBlk
-#define FCH_PMIOA_REG64          0x64         // AcpiPmTmrBlk
-#define FCH_PMIOA_REG66          0x66         // P_CNTBlk
-#define FCH_PMIOA_REG68          0x68         // AcpiGpe0Blk
-#define FCH_PMIOA_REG6A          0x6A         // AcpiSmiCmd
-#define FCH_PMIOA_REG6C          0x6C         // AcpiPm2CntBlk
-#define FCH_PMIOA_REG6E          0x6E         // AcpiPmaCntBlk
-#define FCH_PMIOA_REG74          0x74         // AcpiConfig
-#define FCH_PMIOA_REG78          0x78         // WakeIoAddr
-#define FCH_PMIOA_REG7A          0x7A         // HaltCountEn
-#define FCH_PMIOA_REG7C          0x7C         // C1eWrPortAdr
-#define FCH_PMIOA_REG7E          0x7E         // CStateEn
-#define FCH_PMIOA_REG7F          0x7F         // CStateEn
-#define FCH_PMIOA_REG80          0x80         // BreakEvent
-#define FCH_PMIOA_REG84          0x84         // AutoArbEn
-#define FCH_PMIOA_REG88          0x88         // CStateControl
-#define FCH_PMIOA_REG89          0x89         //
-#define FCH_PMIOA_REG8C          0x8C         // StpClkHoldTime
-#define FCH_PMIOA_REG8E          0x8E         // PopUpEndTime
-#define FCH_PMIOA_REG90          0x90         // C4Control
-#define FCH_PMIOA_REG94          0x94         // CStateTiming0
-#define FCH_PMIOA_REG96          0x96         //
-#define FCH_PMIOA_REG97          0x97         //
-#define FCH_PMIOA_REG98          0x98         // CStateTiming1
-#define FCH_PMIOA_REG99          0x99         //
-#define FCH_PMIOA_REG9B          0x9B         //
-#define FCH_PMIOA_REG9C          0x9C         // C2Count
-#define FCH_PMIOA_REG9D          0x9D         // C3Count
-#define FCH_PMIOA_REG9E          0x9E         // C4Count
-#define FCH_PMIOA_REGA0          0xA0         // MessageCState
-#define FCH_PMIOA_REGA4          0xA4         //
-#define FCH_PMIOA_REGA8          0xA8         // TrafficMonitorIdleTime
-#define FCH_PMIOA_REGAA          0xAA         // TrafficMonitorIntTime
-#define FCH_PMIOA_REGAC          0xAC         // TrafficMonitorTrafficCount
-#define FCH_PMIOA_REGAE          0xAE         // TrafficMonitorIntrCount
-#define FCH_PMIOA_REGB0          0xB0         // TrafficMonitorTimeTick
-#define FCH_PMIOA_REGB4          0xB4         // FidVidControl
-#define FCH_PMIOA_REGB6          0xB6         // TPRESET1
-#define FCH_PMIOA_REGB7          0xB7         // Tpreset1b
-#define FCH_PMIOA_REGB8          0xB8         // TPRESET2
-#define FCH_PMIOA_REGB9          0xB9         // Test0
-#define FCH_PMIOA_REGBA          0xBA         // S_StateControl
-#define FCH_PMIOA_REGBB          0xBB         //
-#define FCH_PMIOA_REGBC          0xBC         // ThrottlingControl
-#define FCH_PMIOA_REGBE          0xBE         // ResetControl
-#define FCH_PMIOA_REGBF          0xBF         // ResetControl
-#define FCH_PMIOA_REGC0          0xC0         // S5Status
-#define FCH_PMIOA_REGC2          0xC2         // ResetStatus
-#define FCH_PMIOA_REGC4          0xC4         // ResetCommand
-#define FCH_PMIOA_REGC5          0xC5         // CF9Shadow
-#define FCH_PMIOA_REGC6          0xC6         // HTControl
-#define FCH_PMIOA_REGC8          0xC8         // Misc
-#define FCH_PMIOA_REGCC          0xCC         // IoDrvSth
-#define FCH_PMIOA_REGD0          0xD0         // CLKRunEn
-#define FCH_PMIOA_REGD2          0xD2         // PmioDebug
-#define FCH_PMIOA_REGD3          0xD3         // SD
-#define FCH_PMIOA_REGD6          0xD6         // IMCGating
-#define FCH_PMIOA_REGD7          0xD7         //
-#define FCH_PMIOA_REGD8          0xD8         // MiscIndex
-#define FCH_PMIOA_REGD9          0xD9         // MiscData
-#define FCH_PMIOA_REGDA          0xDA         // SataConfig
-#define FCH_PMIOA_REGDC          0xDC         // HyperFlashConfig
-#define FCH_PMIOA_REGDE          0xDE         // ABConfig
-#define FCH_PMIOA_REGE0          0xE0         // ABRegBar
-#define FCH_PMIOA_REGE4          0xE4
-#define FCH_PMIOA_REGE6          0xE6         // FcEn
-#define FCH_PMIOA_REGE7          0xE7
-#define FCH_PMIOA_REGE8          0xE8
-#define FCH_PMIOA_REGEA          0xEA         // PcibConfig
-#define FCH_PMIOA_REGEB          0xEB         // AzEn
-#define FCH_PMIOA_REGEC          0xEC         // LpcGating
-#define FCH_PMIOA_REGED          0xED         // UsbGating
-#define FCH_PMIOA_REGEE          0xEE         // UsbCntrl
-#define FCH_PMIOA_REGEF          0xEF         // UsbEnable
-#define FCH_PMIOA_REGF0          0xF0         // UsbControl
-#define FCH_PMIOA_REGF2          0xF2         // UsbControl2
-#define FCH_PMIOA_REGF3          0xF3         // UsbDebug
-#define FCH_PMIOA_REGF4          0xF4         // UsbDebug
-#define FCH_PMIOA_REGF6          0xF6         // GecEn
-#define FCH_PMIOA_REGF8          0xF8         // GecConfig
-#define FCH_PMIOA_REGFC          0xFC         // TraceMemoryEn
-
-//
-//  FCH MMIO Base (PMIO2)
-//    offset : 0x400
-//
-#define FCH_PMIO2_REG00          0x00        // Fan0InputControl
-#define FCH_PMIO2_REG01          0x01        // Fan0Control
-#define FCH_PMIO2_REG02          0x02        // Fan0Freq
-#define FCH_PMIO2_REG03          0x03        // LowDuty0
-#define FCH_PMIO2_REG04          0x04        // MidDuty0
-
-#define FCH_PMIO2_REG10          0x00        // Fan1InputControl
-#define FCH_PMIO2_REG11          0x01        // Fan1Control
-#define FCH_PMIO2_REG12          0x02        // Fan1Freq
-#define FCH_PMIO2_REG13          0x03        // LowDuty1
-#define FCH_PMIO2_REG14          0x04        // MidDuty1
-
-#define FCH_PMIO2_REG63          0x63        // SampleFreqDiv
-#define FCH_PMIO2_REG69          0x69        // Fan0 Speed
-#define FCH_PMIO2_REG95          0x95        // Temperature
-#define FCH_PMIO2_REGB8          0xB8        // Voltage
-#define FCH_PMIO2_REGEA          0xEA        // Hwm_Calibration
-
-#define FCH_PMIO2_REG92          0x92        //
-#define FCH_PMIO2_REGF8          0xF8        // VoltageSamleSel
-#define FCH_PMIO2_REGF9          0xF9        // TempSampleSel
-
-#define FCH_PMIO2_REG          0xFC         // TraceMemoryEn
-
-
-//
-//  FCH MMIO Base (GPIO/IoMux)
-//    offset : 0x100/0xD00
-//
-/*
-GPIO from 0 ~ 67, (GEVENT 0-23) 128 ~ 150, 160 ~ 226.
-*/
-#define FCH_GPIO_REG00           0x00
-#define FCH_GPIO_REG06           0x06
-#define FCH_GPIO_REG09           0x09
-#define FCH_GPIO_REG10           0x0A
-#define FCH_GPIO_REG17           0x11
-#define FCH_GPIO_REG21           0x15
-#define FCH_GPIO_REG28           0x1C
-#define FCH_GPIO_REG32           0x20
-#define FCH_GPIO_REG33           0x21
-#define FCH_GPIO_REG34           0x22
-#define FCH_GPIO_REG35           0x23
-#define FCH_GPIO_REG36           0x24
-#define FCH_GPIO_REG37           0x25
-#define FCH_GPIO_REG38           0x26
-#define FCH_GPIO_REG39           0x27
-#define FCH_GPIO_REG40           0x28
-#define FCH_GPIO_REG41           0x29
-#define FCH_GPIO_REG42           0x2A
-#define FCH_GPIO_REG43           0x2B
-#define FCH_GPIO_REG44           0x2C
-#define FCH_GPIO_REG45           0x2D
-#define FCH_GPIO_REG46           0x2E
-#define FCH_GPIO_REG47           0x2F
-#define FCH_GPIO_REG48           0x30
-#define FCH_GPIO_REG49           0x31
-#define FCH_GPIO_REG50           0x32
-#define FCH_GPIO_REG51           0x33
-#define FCH_GPIO_REG52           0x34
-#define FCH_GPIO_REG53           0x35
-#define FCH_GPIO_REG54           0x36
-#define FCH_GPIO_REG55           0x37
-#define FCH_GPIO_REG56           0x38
-#define FCH_GPIO_REG57           0x39
-#define FCH_GPIO_REG58           0x3A
-#define FCH_GPIO_REG59           0x3B
-#define FCH_GPIO_REG60           0x3C
-#define FCH_GPIO_REG61           0x3D
-#define FCH_GPIO_REG62           0x3E
-#define FCH_GPIO_REG63           0x3F
-#define FCH_GPIO_REG64           0x40
-#define FCH_GPIO_REG65           0x41
-#define FCH_GPIO_REG66           0x42
-#define FCH_GPIO_REG67           0x43
-#define FCH_GPIO_REG68           0x44
-#define FCH_GPIO_REG69           0x45
-#define FCH_GPIO_REG70           0x46
-#define FCH_GPIO_REG71           0x47
-#define FCH_GPIO_REG72           0x48
-#define FCH_GPIO_REG73           0x49
-#define FCH_GPIO_REG74           0x4A
-#define FCH_GPIO_REG75           0x4B
-#define FCH_GPIO_REG76           0x4C
-#define FCH_GPIO_REG77           0x4D
-#define FCH_GPIO_REG78           0x4E
-#define FCH_GPIO_REG79           0x4F
-#define FCH_GPIO_REG80           0x50
-
-#define FCH_GEVENT_REG00         0x60
-#define FCH_GEVENT_REG01         0x61
-#define FCH_GEVENT_REG02         0x62
-#define FCH_GEVENT_REG03         0x63
-#define FCH_GEVENT_REG04         0x64
-#define FCH_GEVENT_REG05         0x65
-#define FCH_GEVENT_REG06         0x66
-#define FCH_GEVENT_REG07         0x67
-#define FCH_GEVENT_REG08         0x68
-#define FCH_GEVENT_REG09         0x69
-#define FCH_GEVENT_REG10         0x6A
-#define FCH_GEVENT_REG11         0x6B
-#define FCH_GEVENT_REG12         0x6C
-#define FCH_GEVENT_REG13         0x6D
-#define FCH_GEVENT_REG14         0x6E
-#define FCH_GEVENT_REG15         0x6F
-#define FCH_GEVENT_REG16         0x70
-#define FCH_GEVENT_REG17         0x71
-#define FCH_GEVENT_REG18         0x72
-#define FCH_GEVENT_REG19         0x73
-#define FCH_GEVENT_REG20         0x74
-#define FCH_GEVENT_REG21         0x75
-#define FCH_GEVENT_REG22         0x76
-#define FCH_GEVENT_REG23         0x77
-// S5-DOMAIN GPIO
-#define FCH_GPIO_REG160          0xA0
-#define FCH_GPIO_REG161          0xA1
-#define FCH_GPIO_REG162          0xA2
-#define FCH_GPIO_REG163          0xA3
-#define FCH_GPIO_REG164          0xA4
-#define FCH_GPIO_REG165          0xA5
-#define FCH_GPIO_REG166          0xA6
-#define FCH_GPIO_REG167          0xA7
-#define FCH_GPIO_REG168          0xA8
-#define FCH_GPIO_REG169          0xA9
-#define FCH_GPIO_REG170          0xAA
-#define FCH_GPIO_REG171          0xAB
-#define FCH_GPIO_REG172          0xAC
-#define FCH_GPIO_REG173          0xAD
-#define FCH_GPIO_REG174          0xAE
-#define FCH_GPIO_REG175          0xAF
-#define FCH_GPIO_REG176          0xB0
-#define FCH_GPIO_REG177          0xB1
-#define FCH_GPIO_REG178          0xB2
-#define FCH_GPIO_REG179          0xB3
-#define FCH_GPIO_REG180          0xB4
-#define FCH_GPIO_REG181          0xB5
-#define FCH_GPIO_REG182          0xB6
-#define FCH_GPIO_REG183          0xB7
-#define FCH_GPIO_REG184          0xB8
-#define FCH_GPIO_REG185          0xB9
-#define FCH_GPIO_REG186          0xBA
-#define FCH_GPIO_REG187          0xBB
-#define FCH_GPIO_REG188          0xBC
-#define FCH_GPIO_REG189          0xBD
-#define FCH_GPIO_REG190          0xBE
-#define FCH_GPIO_REG191          0xBF
-#define FCH_GPIO_REG192          0xC0
-#define FCH_GPIO_REG193          0xC1
-#define FCH_GPIO_REG194          0xC2
-#define FCH_GPIO_REG195          0xC3
-#define FCH_GPIO_REG196          0xC4
-#define FCH_GPIO_REG197          0xC5
-#define FCH_GPIO_REG198          0xC6
-#define FCH_GPIO_REG199          0xC7
-#define FCH_GPIO_REG200          0xC8
-#define FCH_GPIO_REG201          0xC9
-#define FCH_GPIO_REG202          0xCA
-#define FCH_GPIO_REG203          0xCB
-#define FCH_GPIO_REG204          0xCC
-#define FCH_GPIO_REG205          0xCD
-#define FCH_GPIO_REG206          0xCE
-#define FCH_GPIO_REG207          0xCF
-#define FCH_GPIO_REG208          0xD0
-#define FCH_GPIO_REG209          0xD1
-#define FCH_GPIO_REG210          0xD2
-#define FCH_GPIO_REG211          0xD3
-#define FCH_GPIO_REG212          0xD4
-#define FCH_GPIO_REG213          0xD5
-#define FCH_GPIO_REG214          0xD6
-#define FCH_GPIO_REG215          0xD7
-#define FCH_GPIO_REG216          0xD8
-#define FCH_GPIO_REG217          0xD9
-#define FCH_GPIO_REG218          0xDA
-#define FCH_GPIO_REG219          0xDB
-#define FCH_GPIO_REG220          0xDC
-#define FCH_GPIO_REG221          0xDD
-#define FCH_GPIO_REG222          0xDE
-#define FCH_GPIO_REG223          0xDF
-#define FCH_GPIO_REG224          0xF0
-#define FCH_GPIO_REG225          0xF1
-#define FCH_GPIO_REG226          0xF2
-#define FCH_GPIO_REG227          0xF3
-#define FCH_GPIO_REG228          0xF4
-
-//
-//  FCH MMIO Base (GPIO BANK0)
-//    offset : 0x1500
-//
-#define FCH_GPIO_PULL_UP_ENABLE      BIT4
-#define FCH_GPIO_PULL_DOWN_ENABLE    BIT5
-#define FCH_GPIO_OUTPUT_VALUE        BIT6
-#define FCH_GPIO_OUTPUT_ENABLE       (1 << 7)
-
-#define FCH_GPIO_068_AZ_SDIN0_GPIO26      0x68
-#define FCH_GPIO_06C_AZ_SDIN1_GPIO27      0x6C
-#define FCH_GPIO_070_AZ_SDIN2_GPIO28      0x70
-#define FCH_GPIO_074_AZ_SDIN3_GPIO29      0x74
-
-#define FCH_GPIO_10C_GPIO55_AGPI067       0x10C
-#define FCH_GPIO_118_GPIO59_AGPI070       0x118
-
-//
-//  FCH MMIO Base (IoMux)
-//    offset : 0xD00
-//
-#define FCH_IOMUX_1A_AZ_SDIN0_EGPIO26          0x1A
-#define FCH_IOMUX_1B_AZ_SDIN1_EGPIO27          0x1B
-#define FCH_IOMUX_1C_AZ_SDIN2_EGPIO28          0x1C
-#define FCH_IOMUX_1D_AZ_SDIN3_EGPIO29          0x1D
-
-//
-//  FCH MMIO Base (SMBUS)
-//    offset : 0xA00
-//
-#define FCH_SMBUS_REG12           0x12        //   I2CbusConfig
-
-//
-//  FCH MMIO Base (MISC)
-//    offset : 0xE00
-//
-#define FCH_MISC_REG00           0x00        //  ClkCntrl0
-/*
-FCH_MISC_REG00                   EQU     000h
-  ClkCntrl0                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG04           0x04        //  ClkCntrl1
-/*
-FCH_MISC_REG04                   EQU     004h
-  ClkCntrl1                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG08           0x08        //  ClkCntrl2
-/*
-FCH_MISC_REG08                   EQU     008h
-  ClkCntrl2                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG0C           0x0C        //  ClkCntrl3
-/*
-FCH_MISC_REG0C                   EQU     00Ch
-  ClkCntrl3                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG10           0x10        //  ClkCntrl4
-/*
-FCH_MISC_REG10                   EQU     010h
-  ClkCntrl4                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG14           0x14        //   ClkCntrl5
-/*
-FCH_MISC_REG14                   EQU     014h
-  ClkCntrl5                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG18           0x18        //   ClkCntrl6
-/*
-FCH_MISC_REG18                   EQU     018h
-  ClkCntrl6                   EQU     0FFFFFFFFh
-*/
-#define FCH_MISC_REG1C           0x1C
-#define FCH_MISC_REG30           0x30         // OscFreqCounter
-/*
-FCH_MISC_REG30                   EQU     030h
-  OscCounter                  EQU     0FFFFFFFFh                  ; The 32bit register shows the number of OSC clock per second.
-*/
-#define FCH_MISC_REG34           0x34         //  HpetClkPeriod
-/*
-FCH_MISC_REG34                   EQU     034h
-  HpetClkPeriod               EQU     0FFFFFFFFh                  ; default - 0x429B17Eh (14.31818M).
-*/
-#define FCH_MISC_REG28           0x28         //  ClkDrvSth2
-#define FCH_MISC_REG2C           0x2C
-#define FCH_MISC_REG40           0x40         //  MiscCntrl      for clock only
-#define FCH_MISC_REG41           0x41         //  MiscCntr2
-#define FCH_MISC_REG42           0x42         //  MiscCntr3
-#define FCH_MISC_REG44           0x44         //  ValueOnPort80
-#define FCH_MISC_REG50           0x50         //
-#define FCH_MISCx50_JTAG_CONTROL_ECO           0xFED80E50ul   //
-#define FCH_MISCx68_MEMORY_POWER_SAVING_CONTROL           0xFED80E68ul   //
-
-#define FCH_MISC_REG6C           0x6C         //  EcoBit2
-/*
-FCH_MISC_REG40                   EQU     040h
-*/
-
-#define FCH_MISC_REG80           0x80        /**< FCH_MISC_REG80
-                                   *   @par
-                                   *   StrapStatus [15.0] - FCH chip Strap Status
-                                   *    @li <b>0001</b> - Not USED FWH
-                                   *    @li <b>0002</b> - Not USED LPC ROM
-                                   *    @li <b>0004</b> - EC enabled
-                                   *    @li <b>0008</b> - Reserved
-                                   *    @li <b>0010</b> - Internal Clock mode
-                                   */
-#define FCH_MISC_REGB6           0xB6         //
-
-#define  ChipSysNotUseFWHRom    0x0001                            // EcPwm3 pad
-#define  ChipSysNotUseLpcRom    0x0002                            // Inverted version from EcPwm2 pad (default - 1)
-                                                                  // Note: Both EcPwm3 and EcPwm2 straps pins are used to select boot ROM type.
-#define  ChipSysEcEnable        0x0004                            // Enable Embedded Controller (EC)
-#define  ChipSysBootFailTmrEn   0x0008                            // Enable Watchdog function
-#define  ChipSysIntClkGen       0x0010                            // Select 25Mhz crystal clock or 100Mhz PCI-E clock **
-
-#define FCH_MISC_REG84           0x84         //  StrapOverride
-/*
-FCH_MISC_REG84                   EQU     084h
-  Override FWHDisableStrap    EQU     BIT0                        ; Override FWHDiableStrap value from external pin.
-  Override UseLpcRomStrap     EQU     BIT1                        ; Override UseLpcRomStrap value from external pin.
-  Override EcEnableStrap      EQU     BIT2                        ; Override EcEnableStrap value from external pin.
-  Override BootFailTmrEnStrap EQU     BIT3                        ; Override BootFailTmrEnStrap value from external pin.
-  Override DefaultModeStrap   EQU     BIT5                        ; Override DefaultModeStrap value from external pin.
-  Override I2CRomStrap        EQU     BIT7                        ; Override I2CRomStrap value from external pin.
-  Override ILAAutorunEnBStrap EQU     BIT8                        ; Override ILAAutorunEnBStrap value from external pin.
-  Override FcPllBypStrap      EQU     BIT9                        ; Override FcPllBypStrap value from external pin.
-  Override PciPllBypStrap     EQU     BIT10                       ; Override PciPllBypStrap value from external pin.
-  Override ShortResetStrap    EQU     BIT11                       ; Override ShortResetStrap value from external pin.
-  Override FastBif2ClkStrap   EQU     BIT13                       ; Override FastBif2ClkStrap value from external pin
-  PciRomBootStrap             EQU     BIT15                       ; Override PCI Rom Boot Strap value from external pin
-  BlinkSlowModestrap          EQU     BIT16                       ; Override Blink Slow mode (100Mhz) from external pin
-  ClkGenStrap                 EQU     BIT17                       ; Override CLKGEN from external pin.
-  BIF_GEN2_COMPL_Strap        EQU     BIT18                       ; Override BIF_ GEN2_COMPLIANCE strap from external pin.
-  StrapOverrideEn             EQU     BIT31                       ; Enable override strapping feature.
-*/
-#define FCH_MISC_REGC0           0xC0        //  CPU_Pstate0
-/*
-FCH_MISC_REGC0                   EQU     0C0h
-  Core0_PState                EQU     BIT0+BIT1+BIT2              ; 000: P0  001: P1  010: P2 011: P3 100: P4 101: P5 110: P6 111: P7
-  Core1_PState                EQU     BIT4+BIT5+BIT6
-  Core2_PState                EQU     BIT8+BIT9+BIT10
-  Core3_PState                EQU     BIT12+BIT13+BIT14
-  Core4_PState                EQU     BIT16++BIT17+BIT18
-  Core5_PState                EQU     BIT20+BIT21+BIT22
-  Core6_PState                EQU     BIT24+BIT25+BIT26
-  Core7_PState                EQU     BIT28+BIT29+BIT30
-*/
-#define FCH_MISC_REGC4           0xC4         //  CPU_Pstate1
-/*
-FCH_MISC_REGC4                   EQU     0C4h
-  Core8_PState                EQU     BIT0+BIT1+BIT2              ; 000: P0  001: P1  010: P2 011: P3 100: P4 101: P5 110: P6 111: P7
-  Core9_PState                EQU     BIT4+BIT5+BIT6
-  Core10_PState               EQU     BIT8+BIT9+BIT10
-  Core11_PState               EQU     BIT12+BIT13+BIT14
-  Core12_PState               EQU     BIT16++BIT17+BIT18
-  Core13_PState               EQU     BIT20+BIT21+BIT22
-  Core14_PState               EQU     BIT24+BIT25+BIT26
-  Core15_PState               EQU     BIT28+BIT29+BIT30
-*/
-#define FCH_MISC_REGD0           0xD0         //  CPU_Cstate0
-/*
-FCH_MISC_REGD0                   EQU     0D0h
-  Core0_CState                EQU     BIT0+BIT1+BIT2              ; 000: C0  001: C1  010: C2 011: C3 100: C4 101: C5 110: C6 111: C7
-  Core1_CState                EQU     BIT4+BIT5+BIT6
-  Core2_CState                EQU     BIT8+BIT9+BIT10
-  Core3_CState                EQU     BIT12+BIT13+BIT14
-  Core4_CState                EQU     BIT16++BIT17+BIT18
-  Core5_CState                EQU     BIT20+BIT21+BIT22
-  Core6_CState                EQU     BIT24+BIT25+BIT26
-  Core7_CState                EQU     BIT28+BIT29+BIT30
-*/
-#define FCH_MISC_REGD4           0xD4         //  CPU_Cstate1
-/*
-FCH_MISC_REGD4                   EQU     0D4h
-  Core8_CState                EQU     BIT0+BIT1+BIT2              ; 000: C0  001: C1  010: C2 011: C3 100: C4 101: C5 110: C6 111: C7
-  Core9_CState                EQU     BIT4+BIT5+BIT6
-  Core10_CState               EQU     BIT8+BIT9+BIT10
-  Core11_CState               EQU     BIT12+BIT13+BIT14
-  Core12_CState               EQU     BIT16++BIT17+BIT18
-  Core13_CState               EQU     BIT20+BIT21+BIT22
-  Core14_CState               EQU     BIT24+BIT25+BIT26
-  Core15_CState               EQU     BIT28+BIT29+BIT30
-*/
-#define FCH_MISC_REGF0           0xF0         //  SataPortSts
-/*
-FCH_MISC_REGF0                   EQU     0F0h
-  Port0Sts                    EQU     BIT0                        ; The selected status of Port 0.
-  Port1Sts                    EQU     BIT1                        ; The selected status of Port 1
-  Port2Sts                    EQU     BIT2                        ; The selected status of Port 2.
-  Port3Sts                    EQU     BIT3                        ; The selected status of Port 3
-  Port4Sts                    EQU     BIT4                        ; The selected status of Port 4.
-  Port5Sts                    EQU     BIT5                        ; The selected status of Port 5
-  SataPortSel                 EQU     BIT24+BIT25                 ; 00  - Select "led" for Port 0 to 5
-                                  ; 01 - Select "delete" for Port 0 to 5
-                                  ; 10 - Select "err" for Port 0 to 5
-                                  ; 11 - Select "led" for Port 0 to 5
-*/
-
-//
-//  FCH MMIO Base (SERIAL_DEBUG_BASE)
-//    offset : 0x1000
-//
-#define FCH_SDB_REG00            0x00        //
-#define FCH_SDB_REG74            0x74
-
-#define FCH_RTC_REG00            0x00        // Seconds - RW
-#define FCH_RTC_REG01            0x01        // Seconds Alarm - RW
-#define FCH_RTC_REG02            0x02        // Minutes - RW
-#define FCH_RTC_REG03            0x03        // Minutes Alarm - RW
-#define FCH_RTC_REG04            0x04        // ours - RW
-#define FCH_RTC_REG05            0x05        // ours Alarm- RW
-#define FCH_RTC_REG06            0x06        // Day of Week - RW
-#define FCH_RTC_REG07            0x07        // Date of Mont - RW
-#define FCH_RTC_REG08            0x08        // Mont - RW
-#define FCH_RTC_REG09            0x09        // Year - RW
-#define FCH_RTC_REG0A            0x0A        // Register A - RW
-#define FCH_RTC_REG0B            0x0B        // Register B - RW
-#define FCH_RTC_REG0C            0x0C        // Register C - R
-#define FCH_RTC_REG0D            0x0D        // DateAlarm - RW
-#define FCH_RTC_REG32            0x32        // AltCentury - RW
-#define FCH_RTC_REG48            0x48        // Century - RW
-#define FCH_RTC_REG50            0x50        // Extended RAM Address Port - RW
-#define FCH_RTC_REG53            0x53        // Extended RAM Data Port - RW
-#define FCH_RTC_REG7E            0x7E        // RTC Time Clear - RW
-#define FCH_RTC_REG7F            0x7F        // RTC RAM Enable - RW
-
-#define FCH_ECMOS_REG00           0x00        // scratch - reg
-//;BIT0=0   AsicDebug is enabled
-//;BIT1=0   SLT S3 runs
-#define FCH_ECMOS_REG01          0x01
-#define FCH_ECMOS_REG02          0x02
-#define FCH_ECMOS_REG03          0x03
-#define FCH_ECMOS_REG04          0x04
-#define FCH_ECMOS_REG05          0x05
-#define FCH_ECMOS_REG06          0x06
-#define FCH_ECMOS_REG07          0x07
-#define FCH_ECMOS_REG08          0x08        // save 32BIT Physical address of Config structure
-#define FCH_ECMOS_REG09          0x09
-#define FCH_ECMOS_REG0A          0x0A
-#define FCH_ECMOS_REG0B          0x0B
-
-#define FCH_ECMOS_REG0C          0x0C        //;save MODULE_ID
-#define FCH_ECMOS_REG0D          0x0D        //;Reserve for NB
-
-//
-#define FCH_PMIOxC0_S5ResetStatus          0xFED803C0ul         // S5ResetStatus
-#define FCH_PMIOxC0_S5ResetStatus_ThermalTrip        (1 << 0)
-#define FCH_PMIOxC0_S5ResetStatus_FourSecondPwrBtn   (1 << 1)
-#define FCH_PMIOxC0_S5ResetStatus_All_Status        (0x3ff | (1 << 20))
-
-//
-//  FCH MISC Base (FCH_MISC_BASE)
-//    offset : 0x0E00
-//
-#define FCH_MISCx50_JTAG_Control_ECO_bits          0xFED80E50ul         // JTAG_Control_ECO_bits
-#define FCH_MISCx50_JTAG_Control_ECO_bits_BIT12   (1 << 12)
-#define FCH_MISCx50_JTAG_Control_ECO_bits_BIT16   (1 << 16)
-
-//  FCH AOAC Base (FCH_AOAC_BASE)
-//    offset : 0x1E00
-//
-#define FCH_AOACx94S013_CONTROL            0xFED81E94ul        //
-#define FCH_AOACx94S013_CONTROL_ARBITER_DIS            (1 << 14)
-#define FCH_AOACx94S013_CONTROL_INTERRUPT_DIS          (1 << 15)
-
-#define FCH_IOMAP_REG00          0x000   // Dma_C 0
-#define FCH_IOMAP_REG02          0x002   // Dma_C 1
-#define FCH_IOMAP_REG04          0x004   // Dma_C 2
-#define FCH_IOMAP_REG06          0x006   // Dma_C 3
-#define FCH_IOMAP_REG08          0x008   // Dma_Status
-#define FCH_IOMAP_REG09          0x009   // Dma_WriteRest
-#define FCH_IOMAP_REG0A          0x00A   // Dma_WriteMask
-#define FCH_IOMAP_REG0B          0x00B   // Dma_WriteMode
-#define FCH_IOMAP_REG0C          0x00C   // Dma_Clear
-#define FCH_IOMAP_REG0D          0x00D   // Dma_MasterClr
-#define FCH_IOMAP_REG0E          0x00E   // Dma_ClrMask
-#define FCH_IOMAP_REG0F          0x00F   // Dma_AllMask
-#define FCH_IOMAP_REG20          0x020   // IntrCntrlReg1
-#define FCH_IOMAP_REG21          0x021   // IntrCntrlReg2
-#define FCH_IOMAP_REG40          0x040   // TimerC0
-#define FCH_IOMAP_REG41          0x041   // TimerC1
-#define FCH_IOMAP_REG42          0x042   // TimerC2
-#define FCH_IOMAP_REG43          0x043   // Tmr1CntrlWord
-#define FCH_IOMAP_REG61          0x061   // Nmi_Status
-#define FCH_IOMAP_REG70          0x070   // Nmi_Enable
-#define FCH_IOMAP_REG71          0x071   // RtcDataPort
-#define FCH_IOMAP_REG72          0x072   // AlternatRtcAddrPort
-#define FCH_IOMAP_REG73          0x073   // AlternatRtcDataPort
-#define FCH_IOMAP_REG80          0x080   // Dma_Page_Reserved0
-#define FCH_IOMAP_REG81          0x081   // Dma_PageC2
-#define FCH_IOMAP_REG82          0x082   // Dma_PageC3
-#define FCH_IOMAP_REG83          0x083   // Dma_PageC1
-#define FCH_IOMAP_REG84          0x084   // Dma_Page_Reserved1
-#define FCH_IOMAP_REG85          0x085   // Dma_Page_Reserved2
-#define FCH_IOMAP_REG86          0x086   // Dma_Page_Reserved3
-#define FCH_IOMAP_REG87          0x087   // Dma_PageC0
-#define FCH_IOMAP_REG88          0x088   // Dma_Page_Reserved4
-#define FCH_IOMAP_REG89          0x089   // Dma_PageC6
-#define FCH_IOMAP_REG8A          0x08A   // Dma_PageC7
-#define FCH_IOMAP_REG8B          0x08B   // Dma_PageC5
-#define FCH_IOMAP_REG8C          0x08C   // Dma_Page_Reserved5
-#define FCH_IOMAP_REG8D          0x08D   // Dma_Page_Reserved6
-#define FCH_IOMAP_REG8E          0x08E   // Dma_Page_Reserved7
-#define FCH_IOMAP_REG8F          0x08F   // Dma_Refres
-#define FCH_IOMAP_REG92          0x092   // FastInit
-#define FCH_IOMAP_REGA0          0x0A0   // IntrCntrl2Reg1
-#define FCH_IOMAP_REGA1          0x0A1   // IntrCntrl2Reg2
-#define FCH_IOMAP_REGC0          0x0C0   // Dma2_C4Addr
-#define FCH_IOMAP_REGC2          0x0C2   // Dma2_C4Cnt
-#define FCH_IOMAP_REGC4          0x0C4   // Dma2_C5Addr
-#define FCH_IOMAP_REGC6          0x0C6   // Dma2_C5Cnt
-#define FCH_IOMAP_REGC8          0x0C8   // Dma2_C6Addr
-#define FCH_IOMAP_REGCA          0x0CA   // Dma2_C6Cnt
-#define FCH_IOMAP_REGCC          0x0CC   // Dma2_C7Addr
-#define FCH_IOMAP_REGCE          0x0CE   // Dma2_C7Cnt
-#define FCH_IOMAP_REGD0          0x0D0   // Dma_Status
-#define FCH_IOMAP_REGD2          0x0D2   // Dma_WriteRest
-#define FCH_IOMAP_REGD4          0x0D4   // Dma_WriteMask
-#define FCH_IOMAP_REGD6          0x0D6   // Dma_WriteMode
-#define FCH_IOMAP_REGD8          0x0D8   // Dma_Clear
-#define FCH_IOMAP_REGDA          0x0DA   // Dma_Clear
-#define FCH_IOMAP_REGDC          0x0DC   // Dma_ClrMask
-#define FCH_IOMAP_REGDE          0x0DE   // Dma_ClrMask
-#define FCH_IOMAP_REGED          0x0ED   // DUMMY IO PORT
-#define FCH_IOMAP_REGF0          0x0F0   // NCP_Error
-#define FCH_IOMAP_REG40B         0x040B  // DMA1_Extend
-#define FCH_IOMAP_REG4D0         0x04D0  // IntrEdgeControl
-#define FCH_IOMAP_REG4D6         0x04D6  // DMA2_Extend
-#define FCH_IOMAP_REGC00         0x0C00  // Pci_Intr_Index
-#define FCH_IOMAP_REGC01         0x0C01  // Pci_Intr_Data
-#define FCH_IOMAP_REGC14         0x0C14  // Pci_Error
-#define FCH_IOMAP_REGC50         0x0C50  // CMIndex
-#define FCH_IOMAP_REGC51         0x0C51  // CMData
-#define FCH_IOMAP_REGC52         0x0C52  // GpmPort
-#define FCH_IOMAP_REGC6F         0x0C6F  // Isa_Misc
-#define FCH_IOMAP_REGCD0         0x0CD0  // PMio2_Index
-#define FCH_IOMAP_REGCD1         0x0CD1  // PMio2_Data
-#define FCH_IOMAP_REGCD4         0x0CD4  // BIOSRAM_Index
-#define FCH_IOMAP_REGCD5         0x0CD5  // BIOSRAM_Data
-#define FCH_IOMAP_REGCD6         0x0CD6  // PM_Index
-#define FCH_IOMAP_REGCD7         0x0CD7  // PM_Data
-#define FCH_IOMAP_REGCF9         0x0CF9          // CF9Rst reg
-
-#define FCH_IRQ_INTA             0x00    // INTA#
-#define FCH_IRQ_INTB             0x01    // INTB#
-#define FCH_IRQ_INTC             0x02    // INTC#
-#define FCH_IRQ_INTD             0x03    // INTD#
-#define FCH_IRQ_INTE             0x04    // INTE#
-#define FCH_IRQ_INTF             0x05    // INTF#
-#define FCH_IRQ_INTG             0x06    // INTG#
-#define FCH_IRQ_INTH             0x07    // INTH#
-#define FCH_IRQ_SCI              0x10    // SCI
-#define FCH_IRQ_SMBUS0           0x11    // SMBUS0
-#define FCH_IRQ_ASF              0x12    // ASF
-#define FCH_IRQ_HDAUDIO          0x13    // HD Audio
-#define FCH_IRQ_FC               0x14    // FC
-#define FCH_IRQ_GEC              0x15    // GEC
-#define FCH_IRQ_SD               0x17    // SD
-#define FCH_IRQ_IMCINT0          0x20    // IMC INT0
-#define FCH_IRQ_IMCINT1          0x21    // IMC INT1
-#define FCH_IRQ_IMCINT2          0x22    // IMC INT2
-#define FCH_IRQ_IMCINT3          0x23    // IMC INT3
-#define FCH_IRQ_IMCINT4          0x24    // IMC INT4
-#define FCH_IRQ_IMCINT5          0x25    // IMC INT5
-#define FCH_IRQ_USB18INTA        0x30    // Dev 18 (USB) INTA#
-#define FCH_IRQ_USB18INTB        0x31    // Dev 18 (USB) INTB#
-#define FCH_IRQ_USB19INTA        0x32    // Dev 19 (USB) INTA#
-#define FCH_IRQ_USB19INTB        0x33    // Dev 19 (USB) INTB#
-#define FCH_IRQ_USB22INTA        0x34    // Dev 22 (USB) INTA#
-#define FCH_IRQ_USB22INTB        0x35    // Dev 22 (USB) INTB#
-#define FCH_IRQ_USB20INTC        0x36    // Dev 20 (USB) INTC#
-#define FCH_IRQ_IDE              0x40    // IDE pci interrupt
-#define FCH_IRQ_SATA             0x41    // SATA pci interrupt
-#define FCH_IRQ_GPPINT0          0x50    // Gpp Int0
-#define FCH_IRQ_GPPINT1          0x51    // Gpp Int1
-#define FCH_IRQ_GPPINT2          0x52    // Gpp Int2
-#define FCH_IRQ_GPPINT3          0x53    // Gpp Int3
-#define FCH_IRQ_GPIO             0x62    // GPIO Controller
-#define FCH_IRQ_IOAPIC           0x80    // Select IRQ routing to IoApic mode
-#define FCH_IRQ_PIC              0x00    // Select IRQ routing to PIC mode
-
-#define FCH_SPI_MMIO_REG00       0x00        //SPI_
-#define FCH_SPI_OPCODE           0x000000FFl  //
-#define FCH_SPI_TX_COUNT         0x00000F00l  //
-#define FCH_SPI_RX_COUNT         0x0000F000l  //
-#define FCH_SPI_EXEC_OPCODE      0x00010000l  //
-#define FCH_SPI_FIFO_PTR_CRL     0x00100000l  //
-#define FCH_SPI_FIFO_PTR_INC     0x00200000l  //
-#define FCH_SPI_BUSY             0x80000000l  //
-#define FCH_SPI_MMIO_REG0C       0x0C        //SPI_Cntrl1 Register
-#define FCH_SPI_PARAMETER        0x000000FFl  //
-#define FCH_SPI_FIFO_PTR         0x00000700l  //
-#define FCH_SPI_BYTE_PROGRAM     0xFF000000l  //
-#define FCH_SPI_MMIO_REG1C       0x1C        //
-#define FCH_SPI_RETRY_TIMES      0x3         //
-
-#define FCH_SPI_MMIO_REG1D       0x1D        //
-#define FCH_SPI_MMIO_REG1E       0x1E        //
-#define FCH_SPI_MMIO_REG1F       0x1F        //
-#define FCH_SPI_MMIO_REG4E       0x4E        //
-
-#define FCH_SPI_MMIO_REG1F_X05_TX_BYTE_COUNT   0x05        //
-#define FCH_SPI_MMIO_REG1F_X06_RX_BYTE_COUNT   0x06        //
-
-#define FCH_SPI_MMIO_REG20       0x20        //
-#define FCH_SPI_MMIO_REG22       0x22        //
-#define FCH_SPI_MMIO_REG2C       0x2C        //
-#define FCH_SPI_MMIO_REG38       0x38        //
-#define FCH_SPI_MMIO_REG3C       0x3C        //
-
-#define FCH_SPI_MMIO_REG45_CMDCODE           0x45        //
-#define FCH_SPI_MMIO_REG47_CMDTRIGGER        0x47        //
-#define FCH_SPI_MMIO_REG48_TXBYTECOUNT       0x48        //
-#define FCH_SPI_MMIO_REG4B_RXBYTECOUNT       0x4B        //
-#define FCH_SPI_MMIO_REG4C_SPISTATUS         0x4C        //
-#define FCH_SPI_MMIO_REG80_FIFO              0x80        //
-
-#define FCH_SPI_MODE_FAST        0x7        //
-#define FCH_SPI_MODE_NORMAL      0x6        //
-#define FCH_SPI_MODE_QUAL_144    0x5        //
-#define FCH_SPI_MODE_QUAL_122    0x4        //
-#define FCH_SPI_MODE_QUAL_114    0x3        //
-#define FCH_SPI_MODE_QUAL_112    0x2        //
-
-#define FCH_SPI_DEVICE_MODE_DIS  0x7        //
-#define FCH_SPI_DEVICE_MODE_144  0x4        //
-#define FCH_SPI_DEVICE_MODE_114  0x3        //
-#define FCH_SPI_DEVICE_MODE_122  0x2        //
-#define FCH_SPI_DEVICE_MODE_112  0x1        //
-#define FCH_SPI_DEVICE_MODE_FAST 0x0        //
-
-#define FCH_SPI_SPEED_16M        0x4        //
-#define FCH_SPI_SPEED_22M        0x3        //
-#define FCH_SPI_SPEED_33M        0x2        //
-#define FCH_SPI_SPEED_66M        0x1        //
-#define FCH_SPI_SPEED_100M       0x5        //
-
-#define AMD_NB_REG78            0x78
-#define AMD_NB_SCRATCH          AMD_NB_REG78
-#define MailBoxPort             0x3E
-
-#define MAX_LT_POLLINGS         0x4000
-#define SMI_TIMER_ENABLE        BIT15
-
-
-#define ACPIMMIO32(x) (*(volatile UINT32*)(UINTN)(x))
-#define ACPIMMIO16(x) (*(volatile UINT16*)(UINTN)(x))
-#define ACPIMMIO8(x)  (*(volatile UINT8*)(UINTN)(x))
-
-#define U3PLL_LOCK                   BIT7
-#define U3PLL_RESET                  BIT8
-#define U3PHY_RESET                  BIT9
-#define U3CORE_RESET                 BIT10
-#define XHC0_FUNC_RESET              BIT11
-#define XHC1_FUNC_RESET              BIT12
-
-#define XHCI_ACPI_MMIO_AMD_REG00     0x00
-#define XHCI_ACPI_MMIO_AMD_REG04     0x04
-#define XHCI_ACPI_MMIO_AMD_REG08     0x08
-#define XHCI_ACPI_MMIO_AMD_REG10     0x10
-#define XHCI_ACPI_MMIO_AMD_REG14     0x14
-#define XHCI_ACPI_MMIO_AMD_REG20     0x20
-#define XHCI_ACPI_MMIO_AMD_REG24     0x24
-#define XHCI_ACPI_MMIO_AMD_REG28     0x28
-#define XHCI_ACPI_MMIO_AMD_REG30     0x30
-#define XHCI_ACPI_MMIO_AMD_REG40     0x40
-#define XHCI_ACPI_MMIO_AMD_REG48     0x48 // USB3.0_Ind_REG Index
-#define XHCI_ACPI_MMIO_AMD_REG4C     0x4C // USB2.0_Ind_REG Data
-#define XHCI_ACPI_MMIO_AMD_REG8C     0x8C
-#define XHCI_ACPI_MMIO_AMD_REG90     0x90 // adaptation timer settings
-#define XHCI_ACPI_MMIO_AMD_REG98     0x98
-#define XHCI_ACPI_MMIO_AMD_REGA0     0xA0 // BAR 0
-#define XHCI_ACPI_MMIO_AMD_REGA4     0xA4 // BAR 1
-#define XHCI_ACPI_MMIO_AMD_REGA8     0xA8 // BAR 2
-#define XHCI_ACPI_MMIO_AMD_REGB0     0xB0 // SPI_Valid_Base.
-#define XHCI_ACPI_MMIO_AMD_REGC0     0xC0 // Firmware starting offset for coping
-#define XHCI_ACPI_MMIO_AMD_REGB4     0xB4
-#define XHCI_ACPI_MMIO_AMD_REGD0     0xD0
-
-#define FCH_XHCI_REG48                0x48 // XHCI IND_REG Index registers
-#define FCH_XHCI_REG4C                0x4C // XHCI IND_REG Data registers
-
-#define FCH_XHCI_IND60_BASE           0x40000000ul //
-
-#define FCH_XHCI_IND60_REG00           FCH_XHCI_IND60_BASE + 0x00 //
-#define FCH_XHCI_IND60_REG04           FCH_XHCI_IND60_BASE + 0x04 //
-#define FCH_XHCI_IND60_REG08           FCH_XHCI_IND60_BASE + 0x08 //
-#define FCH_XHCI_IND60_REG0C           FCH_XHCI_IND60_BASE + 0x0C //
-#define FCH_XHCI_IND60_REG18           FCH_XHCI_IND60_BASE + 0x18 //
-#define FCH_XHCI_IND60_REG48           FCH_XHCI_IND60_BASE + 0x48 //
-#define FCH_XHCI_IND60_REG50           FCH_XHCI_IND60_BASE + 0x50 //
-#define FCH_XHCI_IND60_REG54           FCH_XHCI_IND60_BASE + 0x54 //
-
-#define FCH_XHCI_IND_REG00            0x00  //
-#define FCH_XHCI_IND_REG04            0x04  //
-#define FCH_XHCI_IND_REG48            0x48  //
-#define FCH_XHCI_IND_REG54            0x54  //
-#define FCH_XHCI_IND_REG88            0x88  //
-#define FCH_XHCI_IND_REG94            0x94  // adaptation mode settings
-#define FCH_XHCI_IND_REG98            0x98  // CR phase and frequency filter settings
-#define FCH_XHCI_IND_REGC8            0xC8  //
-#define FCH_XHCI_IND_REGD4            0xD4  // adaptation mode settings
-#define FCH_XHCI_IND_REGD8            0xD8  // CR phase and frequency filter settings
-#define FCH_XHCI_IND_REG100           0x100 //
-#define FCH_XHCI_IND_REG120           0x120 //
-#define FCH_XHCI_IND_REG128           0x128 //
-#define MAX_XHCI_PORTS                0x04
-
-//SMBUS
-#define FCH_SMB_IOREG00               0x00        // SMBusStatus
-#define FCH_SMB_IOREG01               0x01        // SMBusSlaveStatus
-#define FCH_SMB_IOREG02               0x02        // SMBusControl
-#define FCH_SMB_IOREG03               0x03        // SMBusHostCmd
-#define FCH_SMB_IOREG04               0x04        // SMBusAddress
-#define FCH_SMB_IOREG05               0x05        // SMBusData0
-#define FCH_SMB_IOREG06               0x06        // SMBusData1
-#define FCH_SMB_IOREG07               0x07        // SMBusBlockData
-#define FCH_SMB_IOREG08               0x08        // SMBusSlaveControl
-#define FCH_SMB_IOREG14               0x14        // SMBusAutoPoll
-#define FCH_SMB_IOREG16               0x16        // SMBusPausePoll
-#define FCH_SMB_IOREG17               0x17        // SMBusHostCmd2
-
-#define FCH_SMB_CMD_QUICK             0x00 << 2   // Quick Read or Write
-#define FCH_SMB_CMD_BYTE              0x01 << 2   // Byte Read or Write
-#define FCH_SMB_CMD_BYTE_DATA         0x02 << 2   // Byte Data Read or Write
-#define FCH_SMB_CMD_WORD_DATA         0x03 << 2   // Word Data Read or Write
-#define FCH_SMB_CMD_BLOCK             0x05 << 2   // Block Read or Write
-
-#define FCH_SMB_ALL_HOST_STATUS       0x1f        // HostBusy+SMBInterrupt+DeviceErr+BusCollision+Failed
-#define FCH_SMB_CMD_BYTE_DATA_START   0x48        // Byte Data Read or Write
-#define FCH_SMB_CMD_START             BIT6
-#define FCH_SMB_READ_ENABLE           BIT0
-#define FCH_SMB_AUTO_POLL_EN          BIT0
-#define FCH_SMB_POLL2BYTE             BIT7
-
-#define SBTSI_ADDR                    0x98
-#define SBTSI_REG01                   0x01
-#define SBTSI_REG09                   0x09
-#define SBTSI_REG10                   0x10
-#define SBTSI_READORDER               BIT5
-
-#define FCH_EC_ENTER_CONFIG           0X5A
-#define FCH_EC_EXIT_CONFIG            0XA5
-#define FCH_EC_REG07                  0X07
-#define FCH_EC_REG30                  0X30
-#define FCH_EC_REG60                  0X60
-#define FCH_EC_REG61                  0X61
-
-#define FCH_IMC_ROMSIG                0x55aa55aaul
-
-#define SPI_HEAD_LENGTH 0x0E
-#define SPI_BAR0_VLD  0x01
-#define SPI_BASE0     (0x00 << 7)
-#define SPI_BAR1_VLD  (0x01 << 8)
-#define SPI_BASE1     (SPI_HEAD_LENGTH << 10)
-#define SPI_BAR2_VLD  (0x01 << 16)
-#define SPI_BASE2(x)  ((SPI_HEAD_LENGTH + ACPIMMIO16(x)) << 18)
-
-#define FW_TO_SIGADDR_OFFSET  0x0C
-#define BCD_ADDR_OFFSET       0x02
-#define BCD_SIZE_OFFSET       0x04
-#define FW_ADDR_OFFSET        0x06
-#define FW_SIZE_OFFSET        0x08
-#define ACD_ADDR_OFFSET       0x0A
-#define ACD_SIZE_OFFSET       0x0C
-#define XHC_BOOT_RAM_SIZE     0x8000
-
-#define PKT_DATA_REG       ACPI_MMIO_BASE + GFX_DAC_BASE + 0x00
-#define PKT_LEN_REG        ACPI_MMIO_BASE + GFX_DAC_BASE + 0x14
-#define PKT_CTRL_REG       ACPI_MMIO_BASE + GFX_DAC_BASE + 0x15
-#define EFUS_DAC_ADJUSTMENT_CONTROL    0x850A8ul
-#define BGADJ                             0x1F
-#define DACADJ                            0x1B
-#define EFUS_DAC_ADJUSTMENT_CONTROL_DATA  (BGADJ + (DACADJ << 8) + BIT16 )
-
-#define KABINI_OSC_OUT_CLOCK_SEL_48MHz  0x02
-#define KABINI_OSC_OUT_CLOCK_SEL_25MHz  0x01
-
-#define RTC_WORKAROUND_SECOND           0x00
-#define RTC_VALID_SECOND_VALUE          0x59
-#define RTC_SECOND_RESET_VALUE          0x30
-#define RTC_SECOND_LOWER_NIBBLE         0x0F
-#define RTC_VALID_SECOND_VALUE_LN       0x09
-
-#ifndef FCH_DEADLOOP
-  #define FCH_DEADLOOP()    { volatile UINTN __i; __i = 1; while (__i); }
-#endif
-
-#define OHCI_ARB_REGQ_VLD_EN            BIT2
-
-#define HCEx40_Control  0xFED80040ul
-#define HCEx44_Input    0xFED80044ul
-#define HCEx48_Output   0xFED80048ul
-#define HCEx4C_Status   0xFED8004Cul
-#define HCEx50_IntrEn   0xFED80050ul
-#define EmulationSmiEn  BIT4
-
-#define FCH_PMx08_PciControl           0xFED80308ul        // PCI Control
-#define FCH_PMx08_PciControl_ShutDownOption  BIT20
-

pi/amd/00730F01/Proc/Fch/FchPlatform.h

diff --git a/pi/amd/00730F01/Proc/Fch/FchPlatform.h b/pi/amd/00730F01/Proc/Fch/FchPlatform.h
deleted file mode 100644
index 38c4e7e..0000000
--- a/pi/amd/00730F01/Proc/Fch/FchPlatform.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * FCH platform definition
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:     AGESA
- * @e sub-project: FCH
- * @e \$Revision: 281178 $   @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
- *
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-
-#ifndef  _FCH_PLATFORM_H_
-#define  _FCH_PLATFORM_H_
-
-#define MAX_SATA_PORTS 8
-
-#include "AGESA.h"
-
-#ifndef FCHOEM_ACPI_RESTORE_SWSMI
-  #define FCHOEM_BEFORE_PCI_RESTORE_SWSMI    0xD3
-  #define FCHOEM_AFTER_PCI_RESTORE_SWSMI     0xD4
-  #define FCHOEM_ENABLE_ACPI_SWSMI           0xA0
-  #define FCHOEM_DISABLE_ACPI_SWSMI          0xA1
-  #define FCHOEM_START_TIMER_SMI             0xBC
-  #define FCHOEM_STOP_TIMER_SMI              0xBD
-#endif
-
-#ifndef FCHOEM_SPI_UNLOCK_SWSMI
-  #define FCHOEM_SPI_UNLOCK_SWSMI            0xAA
-#endif
-#ifndef FCHOEM_SPI_LOCK_SWSMI
-  #define FCHOEM_SPI_LOCK_SWSMI              0xAB
-#endif
-
-#ifndef FCHOEM_ACPI_TABLE_RANGE_LOW
-  #define FCHOEM_ACPI_TABLE_RANGE_LOW        0xE0000ul
-#endif
-
-#ifndef FCHOEM_ACPI_TABLE_RANGE_HIGH
-  #define FCHOEM_ACPI_TABLE_RANGE_HIGH       0xFFFF0ul
-#endif
-
-#ifndef FCHOEM_ACPI_BYTE_CHECHSUM
-  #define FCHOEM_ACPI_BYTE_CHECHSUM          0x100
-#endif
-
-#ifndef FCHOEM_IO_DELAY_PORT
-  #define FCHOEM_IO_DELAY_PORT               0x80
-#endif
-
-#ifndef FCHOEM_OUTPUT_DEBUG_PORT
-  #define FCHOEM_OUTPUT_DEBUG_PORT           0x80
-#endif
-
-#define FCH_PCIRST_BASE_IO                   0xCF9
-#define FCH_PCI_RESET_COMMAND06              0x06
-#define FCH_PCI_RESET_COMMAND0E              0x0E
-#define FCH_KBDRST_BASE_IO                   0x64
-#define FCH_KBC_RESET_COMMAND                0xFE
-#define FCH_ROMSIG_BASE_IO                   0x20000l
-#define FCH_ROMSIG_SIGNATURE                 0x55AA55AAul
-#define FCH_MAX_TIMER                        0xFFFFFFFFul
-#define FCH_GEC_INTERNAL_REG                 0x6804
-#define FCH_HPET_REG_MASK                    0xFFFFF800ul
-#define FCH_FAKE_USB_BAR_ADDRESS             0x58830000ul
-
-
-#ifndef FCHOEM_ELAPSED_TIME_UNIT
-  #define FCHOEM_ELAPSED_TIME_UNIT           28
-#endif
-
-#ifndef FCHOEM_ELAPSED_TIME_DIVIDER
-  #define FCHOEM_ELAPSED_TIME_DIVIDER        100
-#endif
-
-#include "Fch.h"
-#include "amdlib.h"
-#include "FchCommonCfg.h"
-#include "AcpiLib.h"
-#include "FchDef.h"
-#include "FchBiosRamUsage.h"
-#include "AmdFch.h"
-
-extern BUILD_OPT_CFG    UserOptions;
-
-#endif // _FCH_PLATFORM_H_

pi/amd/00730F01/binaryPI/AGESA.c

diff --git a/pi/amd/00730F01/binaryPI/AGESA.c b/pi/amd/00730F01/binaryPI/AGESA.c
deleted file mode 100644
index b58107c..0000000
--- a/pi/amd/00730F01/binaryPI/AGESA.c
+++ /dev/null
@@ -1,691 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Agesa structures and definitions
- *
- * Contains AMD AGESA core interface
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Include
- * @e \$Revision: 85818 $   @e \$Date: 2013-01-11 17:04:21 -0600 (Fri, 11 Jan 2013) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-// TODO This list needs to be pruned of anything that is not API
-#include "AGESA.h"
-#include <agesawrapper.h>
-#include "FieldAccessors.h"
-#include "AcpiLib.h"
-#include "FchCommonCfg.h"
-#include "Fch.h"
-#include "FchDef.h"
-#include "amdlib.h"
-
-// TODO These need to be replaced with calls to CreateStruct()
-AGESA_STATUS
-HeapAllocateBuffer (
-  IN OUT   VOID *AllocateHeapParams,
-  IN OUT   VOID *StdHeader
-  );
-
-AGESA_STATUS
-HeapDeallocateBuffer (
-  IN       UINT32 BufferHandle,
-  IN       VOID *StdHeader
-  );
-
-CONST UINT32 ImageSignature = IMAGE_SIGNATURE;
-CONST UINT32 ModuleSignature = MODULE_SIGNATURE;
-CONST CHAR8 ModuleIdentifier[] = AGESA_ID;
-
-/************************************************************************
- *
- *  AGESA Basic Level interface structure definition and function prototypes
- *
- ***********************************************************************/
-
-
-/**********************************************************************
- * Interface call:  AmdCreateStruct
- **********************************************************************/
-AGESA_STATUS
-AmdCreateStruct (
-  IN OUT   AMD_INTERFACE_PARAMS *InterfaceParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	InterfaceParams->StdHeader.Func = AMD_CREATE_STRUCT;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(InterfaceParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdReleaseStruct
- **********************************************************************/
-AGESA_STATUS
-AmdReleaseStruct (
-  IN OUT   AMD_INTERFACE_PARAMS *InterfaceParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	InterfaceParams->StdHeader.Func = AMD_RELEASE_STRUCT;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(InterfaceParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitReset
- **********************************************************************/
-AGESA_STATUS
-AmdInitReset (
-  IN OUT   AMD_RESET_PARAMS     *ResetParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	ResetParams->StdHeader.Func = AMD_INIT_RESET;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(ResetParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitEarly
- **********************************************************************/
-AGESA_STATUS
-AmdInitEarly (
-  IN OUT   AMD_EARLY_PARAMS     *EarlyParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	EarlyParams->StdHeader.Func = AMD_INIT_EARLY;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(EarlyParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitPost
- **********************************************************************/
-AGESA_STATUS
-AmdInitPost (
-  IN OUT   AMD_POST_PARAMS      *PostParams         ///< Amd Cpu init param
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	PostParams->StdHeader.Func = AMD_INIT_POST;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(PostParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitEnv
- **********************************************************************/
-AGESA_STATUS
-AmdInitEnv (
-  IN OUT   AMD_ENV_PARAMS       *EnvParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	EnvParams->StdHeader.Func = AMD_INIT_ENV;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(EnvParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitMid
- **********************************************************************/
-AGESA_STATUS
-AmdInitMid (
-  IN OUT   AMD_MID_PARAMS       *MidParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	MidParams->StdHeader.Func = AMD_INIT_MID;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(MidParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitLate
- **********************************************************************/
-AGESA_STATUS
-AmdInitLate (
-  IN OUT   AMD_LATE_PARAMS      *LateParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	LateParams->StdHeader.Func = AMD_INIT_LATE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(LateParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitRecovery
- **********************************************************************/
-AGESA_STATUS
-AmdInitRecovery (
-  IN OUT   AMD_RECOVERY_PARAMS    *RecoveryParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	RecoveryParams->StdHeader.Func = AMD_INIT_RECOVERY;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(RecoveryParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdInitResume
- **********************************************************************/
-AGESA_STATUS
-AmdInitResume (
-  IN       AMD_RESUME_PARAMS    *ResumeParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	ResumeParams->StdHeader.Func = AMD_INIT_RESUME;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(ResumeParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdS3LateRestore
- **********************************************************************/
-AGESA_STATUS
-AmdS3LateRestore (
-  IN OUT   AMD_S3LATE_PARAMS    *S3LateParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	S3LateParams->StdHeader.Func = AMD_S3LATE_RESTORE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(S3LateParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdS3Save
- **********************************************************************/
-AGESA_STATUS
-AmdS3Save (
-  IN OUT   AMD_S3SAVE_PARAMS    *AmdS3SaveParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdS3SaveParams->StdHeader.Func = AMD_S3_SAVE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdS3SaveParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdLateRunApTask
- **********************************************************************/
-AGESA_STATUS
-AmdLateRunApTask (
-  IN       AP_EXE_PARAMS  *AmdApExeParams
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdApExeParams->StdHeader.Func = AMD_LATE_RUN_AP_TASK;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdApExeParams);
-}
-
-/**********************************************************************
- * Interface service call:  AmdGetApicId
- **********************************************************************/
-AGESA_STATUS
-AmdGetApicId (
-  IN OUT AMD_APIC_PARAMS *AmdParamApic
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdParamApic->StdHeader.Func = AMD_GET_APIC_ID;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdParamApic);
-}
-
-/**********************************************************************
- * Interface service call:  AmdGetPciAddress
- **********************************************************************/
-AGESA_STATUS
-AmdGetPciAddress (
-  IN OUT   AMD_GET_PCI_PARAMS *AmdParamGetPci
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdParamGetPci->StdHeader.Func = AMD_GET_PCI_ADDRESS;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdParamGetPci);
-}
-
-/**********************************************************************
- * Interface service call:  AmdIdentifyCore
- **********************************************************************/
-AGESA_STATUS
-AmdIdentifyCore (
-  IN OUT  AMD_IDENTIFY_PARAMS *AmdParamIdentify
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdParamIdentify->StdHeader.Func = AMD_IDENTIFY_CORE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdParamIdentify);
-}
-
-/**********************************************************************
- * Interface service call:  AmdReadEventLog
- **********************************************************************/
-AGESA_STATUS
-AmdReadEventLog (
-  IN       EVENT_PARAMS *Event
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	Event->StdHeader.Func = AMD_READ_EVENT_LOG;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(Event);
-}
-
-/**********************************************************************
- * Interface service call:  AmdIdentifyDimm
- **********************************************************************/
-AGESA_STATUS
-AmdIdentifyDimm (
-  IN OUT   AMD_IDENTIFY_DIMM *AmdDimmIdentify
-)
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdDimmIdentify->StdHeader.Func = AMD_IDENTIFY_DIMMS;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdDimmIdentify);
-}
-
-AGESA_STATUS
-AmdIdsRunApTaskLate (
-  IN       AP_EXE_PARAMS  *AmdApExeParams
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdApExeParams->StdHeader.Func = -1;
-	return AGESA_UNSUPPORTED;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdApExeParams);
-}
-
-/**********************************************************************
- * Interface service call:  AmdGet2DDataEye
- **********************************************************************/
-AGESA_STATUS
-AmdGet2DDataEye (
-  IN OUT   AMD_GET_DATAEYE *AmdGetDataEye
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	AmdGetDataEye->StdHeader.Func = AMD_GET_2D_DATA_EYE;
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-	return Dispatcher(AmdGetDataEye);
-}
-
-/**********************************************************************
- * FCH Functions
- **********************************************************************/
-
-VOID FchInitS3LateRestore (IN FCH_DATA_BLOCK *FchDataPtr);
-VOID FchInitS3EarlyRestore (IN FCH_DATA_BLOCK *FchDataPtr);
-
-VOID
-FchInitS3EarlyRestore (
-  IN      FCH_DATA_BLOCK     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	FchDataPtr->StdHeader->Func = FCH_INIT_S3_EARLY_RESTORE;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-VOID
-FchInitS3LateRestore (
-  IN      FCH_DATA_BLOCK     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	FchDataPtr->StdHeader->Func = FCH_INIT_S3_LATE_RESTORE;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * WaitForEcLDN9MailboxCmdAck
- *
- *
- * @param[in] StdHeader
- *
- */
-VOID
-WaitForEcLDN9MailboxCmdAck (
-  IN AMD_CONFIG_PARAMS  *StdHeader
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(StdHeader);
-}
-
-/**
- * ImcSleep - IMC Sleep.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcSleep (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * SoftwareDisableImc - Software disable IMC strap
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-SoftwareDisableImc (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * ImcEnableSurebootTimer - IMC Enable Sureboot Timer.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcEnableSurebootTimer (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * ImcDisableSurebootTimer - IMC Disable Sureboot Timer.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcDisableSurebootTimer (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * ImcWakeup - IMC Wakeup.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcWakeup (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-/**
- * ImcIdle - IMC Idle.
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-ImcIdle (
-  IN  VOID     *FchDataPtr
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-	((FCH_DATA_BLOCK*)FchDataPtr)->StdHeader->Func = 0;
-	return;
-	if (!module) return;
-	Dispatcher = module->ModuleDispatcher;
-	Dispatcher(FchDataPtr);
-}
-
-// TODO This has to be removed
-AGESA_STATUS
-HeapAllocateBuffer (
-  IN OUT   VOID *AllocateHeapParams,
-  IN OUT   VOID *StdHeader
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-
-	AMD_INTERFACE_PARAMS InterfaceParams = {};
-
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-
-	InterfaceParams.StdHeader = *(AMD_CONFIG_PARAMS*)StdHeader;
-	InterfaceParams.StdHeader.Func = AMD_HEAP_ALLOCATE_BUFFER;
-
-	InterfaceParams.AllocationMethod = PreMemHeap;
-	InterfaceParams.NewStructPtr = AllocateHeapParams;
-
-	return Dispatcher(&InterfaceParams);
-}
-
-// TODO This has to be removed
-AGESA_STATUS
-HeapDeallocateBuffer (
-  IN       UINT32 BufferHandle,
-  IN       VOID *StdHeader
-  )
-{
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-
-	AMD_INTERFACE_PARAMS InterfaceParams = {};
-
-	if (!module) return AGESA_UNSUPPORTED;
-	Dispatcher = module->ModuleDispatcher;
-
-	InterfaceParams.StdHeader = *(AMD_CONFIG_PARAMS*)StdHeader;
-	InterfaceParams.StdHeader.Func = AMD_HEAP_DEALLOCATE_BUFFER;
-
-	InterfaceParams.NewStructPtr = &BufferHandle;
-
-	return Dispatcher(&InterfaceParams);
-}
-
-/**********************************************************************
- * Interface call:  AmdSetValue
- **********************************************************************/
-AGESA_STATUS
-AmdSetValue (
-  IN       CONST AGESA_FIELD_NAME name,
-  IN OUT   VOID* value,
-  IN       UINT32 size
-  )
-{
-	AGESA_STATUS status = AGESA_UNSUPPORTED;
-
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-
-	AMD_ACCESSOR_PARAMS AccessorParams = {};
-
-	if (!module) return status;
-	Dispatcher = module->ModuleDispatcher;
-
-	AccessorParams.StdHeader.AltImageBasePtr = 0;
-	AccessorParams.StdHeader.CalloutPtr = NULL;
-	AccessorParams.StdHeader.Func = AMD_SET_VALUE;
-	AccessorParams.StdHeader.ImageBasePtr = 0;
-
-	AccessorParams.AllocationMethod = ByHost;
-	AccessorParams.FieldName = name;
-	AccessorParams.FieldValue = value;
-	AccessorParams.FieldSize = size;
-
-	status = Dispatcher(&AccessorParams);
-	return status;
-}
-
-/**********************************************************************
- * Interface call:  AmdGetValue
- **********************************************************************/
-AGESA_STATUS
-AmdGetValue (
-  IN       CONST AGESA_FIELD_NAME name,
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  )
-{
-	AGESA_STATUS status = AGESA_UNSUPPORTED;
-
-	MODULE_ENTRY Dispatcher = NULL;
-	const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier);
-
-	AMD_ACCESSOR_PARAMS AccessorParams = {};
-
-	if (!module) return status;
-	Dispatcher = module->ModuleDispatcher;
-
-	AccessorParams.StdHeader.AltImageBasePtr = 0;
-	AccessorParams.StdHeader.CalloutPtr = NULL;
-	AccessorParams.StdHeader.Func = AMD_GET_VALUE;
-	AccessorParams.StdHeader.ImageBasePtr = 0;
-
-	AccessorParams.AllocationMethod = ByHost;
-	AccessorParams.FieldName = name;
-	AccessorParams.FieldValue = *value;
-	AccessorParams.FieldSize = size;
-
-	status = Dispatcher(&AccessorParams);
-
-	*value = AccessorParams.FieldValue;
-	size = AccessorParams.FieldSize;
-
-	return status;
-}

pi/amd/00730F01/binaryPI/FieldAccessors.h

diff --git a/pi/amd/00730F01/binaryPI/FieldAccessors.h b/pi/amd/00730F01/binaryPI/FieldAccessors.h
deleted file mode 100644
index d50e8fc..0000000
--- a/pi/amd/00730F01/binaryPI/FieldAccessors.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/*****************************************************************************
- *
- * Copyright (c) 2014, Sage Electronic Engineering, LLC
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _FIELDACCESSORS_H_
-#define _FIELDACCESSORS_H_
-
-#include "AGESA.h"
-
-/// AGESA value name
-typedef enum {
-	AMD_GLOBAL_USER_OPTIONS    = 0x00020000,
-	AMD_GLOBAL_NUM_SOCKETS     = 0x00020001,
-	AMD_GLOBAL_NUM_MODULES     = 0x00020002,
-} AGESA_FIELD_NAME;
-
-typedef AGESA_STATUS (*SETTER_ENTRY) (
-  IN OUT   VOID* value,
-  IN       UINT32 size
-  );
-
-typedef AGESA_STATUS (*GETTER_ENTRY) (
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-/// Accessor Interface.
-typedef struct {
-  IN       AMD_CONFIG_PARAMS   StdHeader;          ///< Standard configuration header
-  IN       AGESA_FIELD_NAME    FieldName;          ///< The service to init
-  IN       ALLOCATION_METHOD   AllocationMethod;   ///< For pointers, how to allocate space for copied data
-  IN OUT   VOID                *Struct;            ///< The struct for the service.
-  IN OUT   UINT32              FieldSize;          ///< The size of the data value.
-  IN OUT   VOID                *FieldValue;        ///< The value retrieved or set into the target structure.
-} AMD_ACCESSOR_PARAMS;
-
-
-/**********************************************************************
- * Interface call:  AmdSetValue
- **********************************************************************/
-AGESA_STATUS
-AmdGetValue (
-  IN       CONST AGESA_FIELD_NAME name,
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-/**********************************************************************
- * Interface call:  AmdSetValue
- **********************************************************************/
-AGESA_STATUS
-AmdSetValue (
-  IN       CONST AGESA_FIELD_NAME name,
-  IN OUT   VOID* value,
-  IN       UINT32 size
-  );
-
-/**
- * Dispatch Table.
- *
- * The push high dispatcher uses this table to find what entries are currently in the build image.
- */
-typedef struct {
-  UINT32              FunctionId;
-  SETTER_ENTRY        SetValueEntryPoint;
-  GETTER_ENTRY        GetValueEntryPoint;
-} ACCESSOR_DISPATCH_TABLE;
-
-AGESA_STATUS
-GetUserOptions(
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-AGESA_STATUS
-GetNumSockets(
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-AGESA_STATUS
-GetNumModules(
-  IN OUT   VOID** value,
-  IN       UINT32 size
-  );
-
-#endif /* _FIELDACCESSORS_H_ */

pi/amd/00730F01/binaryPI/OptionsIds.h

diff --git a/pi/amd/00730F01/binaryPI/OptionsIds.h b/pi/amd/00730F01/binaryPI/OptionsIds.h
deleted file mode 100644
index 53bded3..0000000
--- a/pi/amd/00730F01/binaryPI/OptionsIds.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*****************************************************************************
- *
- * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _OPTION_IDS_H_
-#define _OPTION_IDS_H_
-
-/**
- *
- * These options have no effect on the host side of the binary AGESA API.
- */
-
-#define IDSOPT_IDS_ENABLED                    FALSE
-//#define IDSOPT_ERROR_TRAP_ENABLED             FALSE
-//#define IDSOPT_CONTROL_ENABLED                FALSE
-#define IDSOPT_TRACING_ENABLED                FALSE
-#define IDSOPT_TRACING_CONSOLE_SERIALPORT     TRUE
-#define IDS_DEBUG_PRINT_MASK                  (0)
-
-#endif //_OPTION_IDS_H_

pi/amd/00730F01/binaryPI/gcc-intrin.h

diff --git a/pi/amd/00730F01/binaryPI/gcc-intrin.h b/pi/amd/00730F01/binaryPI/gcc-intrin.h
deleted file mode 100644
index a637715..0000000
--- a/pi/amd/00730F01/binaryPI/gcc-intrin.h
+++ /dev/null
@@ -1,833 +0,0 @@
-/*
-  Compatibility <intrin_x86.h> header for GCC -- GCC equivalents of intrinsic
-  Microsoft Visual C++ functions. Originally developed for the ReactOS
-  (<http://www.reactos.org/>) and TinyKrnl (<http://www.tinykrnl.org/>)
-  projects.
-
-  Copyright (c) 2006 KJK::Hyperion <hackbunny@reactos.com>
-                2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
-                2014 Sage Electronic Engineering, LLC
-  All rights reserved.
-
-  Permission is hereby granted, free of charge, to any person obtaining a
-  copy of this software and associated documentation files (the "Software"),
-  to deal in the Software without restriction, including without limitation
-  the rights to use, copy, modify, merge, publish, distribute, sublicense,
-  and/or sell copies of the Software, and to permit persons to whom the
-  Software is furnished to do so, subject to the following conditions:
-
-  The above copyright notice and this permission notice shall be included in
-  all copies or substantial portions of the Software.
-
-  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-  DEALINGS IN THE SOFTWARE.
-*/
-
-#if defined (__GNUC__)
-
-#if !defined(AMDLIB_OPTIMIZE)
-	#define AMDLIB_OPTIMIZE
-#endif
-
-/* I/O intrin functions.  */
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned char __inbyte(unsigned short Port)
-{
-  unsigned char value;
-
-  __asm__ __volatile__ (
-    "in  %1, %0"
-    : "=a" (value)
-    : "Nd" (Port)
-    );
-
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned short __inword(unsigned short Port)
-{
-  unsigned short value;
-
-  __asm__ __volatile__ (
-    "in  %1, %0"
-    : "=a" (value)
-    : "Nd" (Port)
-    );
-
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __indword(unsigned short Port)
-{
-  unsigned long value;
-
-  __asm__ __volatile__ (
-    "in  %1, %0"
-    : "=a" (value)
-    : "Nd" (Port)
-    );
-  return value;
-
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __outbyte(unsigned short Port,unsigned char Data)
-{
-  __asm__ __volatile__ (
-    "out  %0, %1"
-    :
-    : "a" (Data), "Nd" (Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __outword(unsigned short Port,unsigned short Data)
-{
-  __asm__ __volatile__ (
-    "out  %0, %1"
-    :
-    : "a" (Data), "Nd" (Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __outdword(unsigned short Port,unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "out  %0, %1"
-    :
-    : "a" (Data), "Nd" (Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __inbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "rep ; insb"
-    : "+D" (Buffer), "+c" (Count)
-    : "d"(Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __inwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "rep ; insw"
-    : "+D" (Buffer), "+c" (Count)
-    : "d"(Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __indwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "rep ; insl"
-    : "+D" (Buffer), "+c" (Count)
-    : "d"(Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __outbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "rep ; outsb"
-    : "+S" (Buffer), "+c" (Count)
-    : "d"(Port)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __outwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-    "rep ; outsw"
-    : "+S" (Buffer), "+c" (Count)
-    : "d"(Port)
-  );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __outdwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count)
-{
-  __asm__ __volatile__ (
-   "rep ; outsl"
-   : "+S" (Buffer), "+c" (Count)
-   : "d"(Port)
-   );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readdr0(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr0, %[value]"
-    : [value] "=r" (value)
-    );
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readdr1(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr1, %[value]"
-    : [value] "=r" (value)
-    );
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readdr2(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr2, %[value]"
-    : [value] "=r" (value)
-    );
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readdr3(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr3, %[value]"
-    : [value] "=r" (value)
-    );
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readdr7(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%dr7, %[value]"
-    : [value] "=r" (value)
-    );
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readdr(unsigned long reg)
-{
-  switch (reg){
-    case 0:
-      return __readdr0 ();
-      break;
-
-    case 1:
-      return __readdr1 ();
-      break;
-
-    case 2:
-      return __readdr2 ();
-      break;
-
-    case 3:
-      return __readdr3 ();
-      break;
-
-    case 7:
-      return __readdr7 ();
-      break;
-
-    default:
-      return -1;
-      break;
-  }
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writedr0(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%dr0"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writedr1(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%dr1"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writedr2(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%dr2"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writedr3(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%dr3"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writedr7(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%dr7"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writedr(unsigned long reg, unsigned long Data)
-{
-  switch (reg){
-    case 0:
-      __writedr0 (Data);
-      break;
-
-    case 1:
-      __writedr1 (Data);
-      break;
-
-    case 2:
-      __writedr2 (Data);
-      break;
-
-    case 3:
-      __writedr3 (Data);
-      break;
-
-    case 7:
-      __writedr7 (Data);
-      break;
-
-    default:
-      break;
-  }
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readcr0(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr0, %[value]"
-    : [value] "=r" (value));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readcr2(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr2, %[value]"
-    : [value] "=r" (value));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readcr3(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr3, %[value]"
-    : [value] "=r" (value));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readcr4(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr4, %[value]"
-    : [value] "=r" (value));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readcr8(void)
-{
-  unsigned long value;
-  __asm__ __volatile__ (
-    "mov %%cr8, %[value]"
-    : [value] "=r" (value));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readcr(unsigned long reg)
-{
-  switch (reg){
-    case 0:
-      return __readcr0 ();
-      break;
-
-    case 2:
-      return __readcr2 ();
-      break;
-
-    case 3:
-      return __readcr3 ();
-      break;
-
-    case 4:
-      return __readcr4 ();
-      break;
-
-    case 8:
-      return __readcr8 ();
-      break;
-
-    default:
-      return -1;
-      break;
-  }
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writecr0(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%cr0"
-    :
-    : "r" (Data)
-    : "memory"
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writecr2(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%cr2"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writecr3(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%cr3"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writecr4(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%cr4"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writecr8(unsigned long Data)
-{
-  __asm__ __volatile__ (
-    "mov %0, %%cr8"
-    :
-    : "r" (Data)
-    );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writecr(unsigned long reg, unsigned long Data)
-{
-  switch (reg){
-    case 0:
-      __writecr0 (Data);
-      break;
-
-    case 2:
-      __writecr2 (Data);
-      break;
-
-    case 3:
-      __writecr3 (Data);
-      break;
-
-    case 4:
-      __writecr4 (Data);
-      break;
-
-    case 8:
-      __writecr8 (Data);
-      break;
-
-    default:
-      break;
-  }
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-UINT64 __readmsr(UINT32 msr)
-{
-  UINT64 retval;
-  __asm__ __volatile__(
-       "rdmsr"
-       : "=A" (retval)
-       : "c" (msr)
-       );
-   return retval;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writemsr (UINT32 msr, UINT64 Value)
-{
-  __asm__ __volatile__ (
-     "wrmsr"
-     :
-     : "c" (msr), "A" (Value)
-     );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-UINT64 __rdtsc(void)
-{
-  UINT64 retval;
-  __asm__ __volatile__ (
-     "rdtsc"
-     : "=A" (retval));
-  return retval;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __cpuid(int CPUInfo[], const int InfoType)
-{
-   __asm__ __volatile__(
-     "cpuid"
-     :"=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3])
-     : "a" (InfoType)
-     );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _disable(void)
-{
-  __asm__ __volatile__ ("cli");
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _enable(void)
-{
-  __asm__ __volatile__ ("sti");
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __halt(void)
-{
-  __asm__ __volatile__ ("hlt");
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __debugbreak(void)
-{
-  __asm__ __volatile__ ("int3");
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __invd(void)
-{
-  __asm__ __volatile__ ("invd");
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __wbinvd(void)
-{
-  __asm__ __volatile__ ("wbinvd");
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __lidt(void *Source)
-{
-  __asm__ __volatile__("lidt %0" : : "m"(*(short*)Source));
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writefsbyte(const unsigned long Offset, const unsigned char Data)
-{
-  __asm__ ("movb %[Data], %%fs:%a[Offset]"
-          :
-          : [Offset] "ir" (Offset), [Data] "iq" (Data));
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writefsword(const unsigned long Offset, const unsigned short Data)
-{
-  __asm__ ("movw %[Data], %%fs:%a[Offset]"
-          :
-          : [Offset] "ir" (Offset), [Data] "ir" (Data));
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __writefsdword(const unsigned long Offset, const unsigned long Data)
-{
-  __asm__ ("movl %[Data], %%fs:%a[Offset]"
-           :
-           : [Offset] "ir" (Offset), [Data] "ir" (Data));
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned char __readfsbyte(const unsigned long Offset)
-{
-  unsigned char value;
-  __asm__ ("movb %%fs:%a[Offset], %[value]"
-          : [value] "=q" (value)
-          : [Offset] "ir" (Offset));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned short __readfsword(const unsigned long Offset)
-{
-  unsigned short value;
-  __asm__ ("movw %%fs:%a[Offset], %[value]"
-           : [value] "=q" (value)
-           : [Offset] "ir" (Offset));
-  return value;
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-unsigned long __readfsdword(unsigned long Offset)
-{
-  unsigned long value;
-  __asm__ ("movl %%fs:%a[Offset], %[value]"
-           : [value] "=r" (value)
-           : [Offset] "ir" (Offset));
-  return value;
-}
-
-#ifdef __SSE3__
-typedef long long __v2di __attribute__ ((__vector_size__ (16)));
-typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _mm_stream_si128_fs2 (void *__A, __m128i __B)
-{
-  __asm__(".byte 0x64"); // fs prefix
-  __builtin_ia32_movntdq ((__v2di *)__A, (__v2di)__B);
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _mm_stream_si128_fs (void *__A, void *__B)
-{
-  __m128i data;
-  data = (__m128i) __builtin_ia32_lddqu ((char const *)__B);
-  _mm_stream_si128_fs2 (__A, data);
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _mm_clflush_fs (void *__A)
-{
-  __asm__(".byte 0x64"); // fs prefix
-  __builtin_ia32_clflush (__A);
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _mm_mfence (void)
-{
-  __builtin_ia32_mfence ();
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void _mm_sfence (void)
-{
-  __builtin_ia32_sfence ();
-}
-#endif /* __SSE3__ */
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __stosb(unsigned char *dest, unsigned char data, size_t count)
-{
-   __asm__ __volatile__ (
-    "rep ; stosb "
-    : "+D" (dest), "+c" (count)
-    : "a"(data)
-  );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void __movsb(unsigned char *dest, unsigned char *data, size_t count)
-{
-   __asm__ __volatile__ (
-    "movsb "
-    : "+D" (dest), "+S"(data), "+c" (count)
-  );
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void debug_point ( unsigned short Port,  unsigned long Data )
-{
-   __outdword (Port, Data);
-   __asm__ __volatile__ (".word 0xfeeb");
-
-}
-
-static
-AMDLIB_OPTIMIZE
-__inline__ __attribute__((always_inline))
-void delay_point ( unsigned short Port, unsigned long Data, unsigned long delayTime )
-{
-  UINTN  Index;
-  Index = 0;
-  __outdword (Port, Data);
-  while (Index < delayTime * 600000) {
-    __outdword (0xE0, 0);
-    Index ++;
-  }
-}
-#endif /* defined (__GNUC__) */

pi/amd/00730F01/binaryPI/gcccar.inc

diff --git a/pi/amd/00730F01/binaryPI/gcccar.inc b/pi/amd/00730F01/binaryPI/gcccar.inc
deleted file mode 100644
index d5b0871..0000000
--- a/pi/amd/00730F01/binaryPI/gcccar.inc
+++ /dev/null
@@ -1,1311 +0,0 @@
-/*
- * Copyright (c) 2012, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/******************************************************************************
-* AMD Generic Encapsulated Software Architecture
-*
-* $Workfile:: GccCar.inc    $Revision:: 32932   $
-*
-* Description: GccCar.inc - AGESA cache-as-RAM setup Include File for GCC complier
-*
-******************************************************************************/
-
-.altmacro
-
-BSP_STACK_BASE_ADDR     =       0x30000         /* Base address for primary cores stack   */
-BSP_STACK_SIZE          =       0x10000         /* 64KB for BSP core                      */
-CORE0_STACK_BASE_ADDR   =       0x80000         /* Base address for primary cores stack   */
-CORE0_STACK_SIZE        =       0x4000          /* 16KB for primary cores                 */
-CORE1_STACK_BASE_ADDR   =       0x40000         /* Base address for AP cores              */
-CORE1_STACK_SIZE        =       0x1000          /* 4KB for each AP cores                  */
-
-APIC_BASE_ADDRESS       =       0x0000001B
-  APIC_BSC              =       8               /* Boot Strap Core  */
-
-APIC_MSG_REG            = 0x380        # Location of BSC message
-    APIC_MSG            = 0x00DE00AD   # Message data
-    APIC_INVD_ALL_DONE_MSG  =     0x00AD00DE  /* Indicate all cores have invalidated */
-APIC_CMD_LO_REG         = 0x300        # APIC command low
-APIC_CMD_HI_REG         = 0x310        # APIC command high
-// del     CMD_REG_TO_READ_DATA = 0x00000338  # APIC command for remote read of APIC_MSG_REG
-    REMOTE_READ_STS       = 0x00030000 # Remote read status mask
-    REMOTE_DELIVERY_PEND  = 0x00010000 # Remote read is pending
-    REMOTE_DELIVERY_DONE  = 0x00020000 # Remote read is complete
-    DELIVERY_STS_BIT    = 12          #Delivery status valid bit
-APIC_ID_REG             = 0x0020       # Local APIC ID offset
-    APIC20_APICID       = 24
-APIC_REMOTE_READ_REG    = 0x00C0       # Remote read offset
-
-# Flags can only run from bits 31 to 24.  Bits 23:0 are in use.
-AMD_CU_NEED_TO_WAIT     = 31
-AMD_CU_SEND_INVD_MSG    = 30
-AMD_CU_RESTORE_ES       = 29
-
-AMD_MTRR_VARIABLE_BASE0  =      0x0200
-AMD_MTRR_VARIABLE_BASE6  =      0x020C
-AMD_MTRR_VARIABLE_BASE7 = 0x020E
-    VMTRR_VALID             =     11
-    MTRR_TYPE_WB            =     0x06
-    MTRR_TYPE_WP            =     0x05
-    MTRR_TYPE_WT            =     0x04
-    MTRR_TYPE_UC            =     0x00
-AMD_MTRR_VARIABLE_MASK7 = 0x020F
-AMD_MTRR_FIX64k_00000    =      0x0250
-AMD_MTRR_FIX16k_80000    =      0x0258
-AMD_MTRR_FIX16k_A0000    =      0x0259
-AMD_MTRR_FIX4k_C0000     =      0x0268
-AMD_MTRR_FIX4k_C8000     =      0x0269
-AMD_MTRR_FIX4k_D0000     =      0x026A
-AMD_MTRR_FIX4k_D8000     =      0x026B
-AMD_MTRR_FIX4k_E0000     =      0x026C
-AMD_MTRR_FIX4k_E8000     =      0x026D
-AMD_MTRR_FIX4k_F0000     =      0x026E
-AMD_MTRR_FIX4k_F8000     =      0x026F
-
-/* Reproduced from AGESA.h */
-AMD_AP_MTRR_FIX64k_00000  =  0x00000250
-AMD_AP_MTRR_FIX16k_80000  =  0x00000258
-AMD_AP_MTRR_FIX16k_A0000  =  0x00000259
-AMD_AP_MTRR_FIX4k_C0000   =  0x00000268
-AMD_AP_MTRR_FIX4k_C8000   =  0x00000269
-AMD_AP_MTRR_FIX4k_D0000   =  0x0000026A
-AMD_AP_MTRR_FIX4k_D8000   =  0x0000026B
-AMD_AP_MTRR_FIX4k_E0000   =  0x0000026C
-AMD_AP_MTRR_FIX4k_E8000   =  0x0000026D
-AMD_AP_MTRR_FIX4k_F0000   =  0x0000026E
-AMD_AP_MTRR_FIX4k_F8000   =  0x0000026F
-CPU_LIST_TERMINAL         =  0xFFFFFFFF
-
-AMD_MTRR_DEFTYPE         =      0x02FF
-    WB_DRAM_TYPE         =      0x1E             /* MemType - memory type */
-    MTRR_DEF_TYPE_EN     =      11               /* MtrrDefTypeEn - variable and fixed MTRRs default enabled */
-    MTRR_DEF_TYPE_FIX_EN =      10               /* MtrrDefTypeEn - fixed MTRRs default enabled */
-
-HWCR                     =      0x0C0010015      /* Hardware Configuration                                                                                                                                       */
-    INVD_WBINVD          =      0x04             /* INVD to WBINVD conversion */
-
-IORR_BASE                =      0x0C0010016      /* IO Range Regusters Base/Mask, 2 pairs */
-                                                 /*  uses 16h - 19h                                                                                                                                                             */
-TOP_MEM                  =      0x0C001001A      /* Top of Memory                                                                                                                                                                                */
-TOP_MEM2                 =      0x0C001001D      /* Top of Memory2                                                                                                                                                                       */
-
-LS_CFG                   =      0x0C0011020      /* Load-Store Configuration                                                                                                                             */
-    DIS_SS               =     28                /* Family 10h,12h,15h:Disable Streng Store functionality */
-    DIS_STREAM_ST        =     28                /* Family 14h:DisStreamSt - Disable Streaming Store functionality */
-
-IC_CFG                   =      0x0C0011021      /* Instruction Cache Config Register  */
-    IC_DIS_SPEC_TLB_RLD  =      9                /*   Disable speculative TLB reloads  */
-    DIS_IND              =      14               /*   Family 10-14h:Disable Indirect Branch Predictor */
-    DIS_I_CACHE          =      14               /*   Family 15h:DisICache - Disable Indirect Branch Predictor */
-
-DC_CFG                   =      0x0C0011022      /* Data Cache Configuration                                                                                                                                   */
-    DC_DIS_SPEC_TLB_WALK     =  4                /* Disable speculative table-walks */
-    DIS_HW_PF                =  13               /*   Hardware prefetches bit                                                                                                                                    */
-DE_CFG                   =      0x0C0011029      /* Decode Configuration */
-    CL_FLUSH_SERIALIZE   =      23               /*   Family 12h,15h: CL Flush Serialization */
-
-BU_CFG2                  =      0x0C001102A      /* Family 10h: Bus Unit Configuration 2 */
-CU_CFG2                  =      0x0C001102A      /* Family 15h: Combined Unit Configuration 2 */
-    F10_CL_LINES_TO_NB_DIS  =   15               /*   ClLinesToNbDis - allows WP code to be cached in L2 */
-    IC_DIS_SPEC_TLB_WR      =   35               /*   IcDisSpecTlbWr - ITLB speculative writes */
-    F16_CL_LINES_TO_L2_DIS  =   15      /*   ClLinesToL2Dis */
-
-//del CU_CFG3                  =      0x0C001102B      /* Combined Unit Configuration 3 */
-//del    COMBINE_CR0_CD       =      49               /*   Combine CR0.CD for both cores of a compute unit */
-//del L2I_CFG                  = 0x0C00110A0  /* L2I Configuration */
-    L2_RINSER_DIS          = 20           /*   L2 rinser disable */
-    PREFETCHER_DIS        =  7           /* L2 prefetcher disable*/
-    CACHE_IC_ATTR_DIS     =  3           /*  Inserting IC attributes into the L2 disable */
-
-CR0_PE                  = 0           # Protection Enable
-CR0_NW                  = 29          # Not Write-through
-CR0_CD                  = 30          # Cache Disable
-CR0_PG                  = 31          # Paging Enable
-
-/* CPUID Functions */
-
-CPUID_MODEL              =      1
-AMD_CPUID_FMF            =      0x80000001       /* Family Model Features information */
-AMD_CPUID_L2Cache        =      0X80000006       /* L2/L3 cache info */
-AMD_CPUID_APIC           =      0x80000008       /* Long Mode and APIC info., core count */
-    APIC_ID_CORE_ID_SIZE      = 12               /* ApicIdCoreIdSize bit position */
-
-NB_CFG                   =      0x0C001001F      /* Northbridge Configuration Register */
-    INIT_APIC_ID_CPU_ID_LO    = 54               /*  InitApicIdCpuIdLo - is core# in high or low half of APIC ID? */
-    ENABLE_CF8_EXT_CFG        = 46               /*  EnableCf8ExtCfg - enable CF8 extended configuration cycles */
-
-MTRR_SYS_CFG             =      0x0C0010010      /* System Configuration Register */
-  CHX_TO_DIRTY_DIS       =      16               /*   ChxToDirtyDis    Change to dirty disable  */
-  SYS_UC_LOCK_EN         =      17               /*   SysUcLockEn      System lock command enable */
-  MTRR_FIX_DRAM_EN       =      18               /*   MtrrFixDramEn    MTRR fixed RdDram and WrDram attributes enable */
-  MTRR_FIX_DRAM_MOD_EN   =      19               /*   MtrrFixDramModEn MTRR fixed RdDram and WrDram modification enable */
-  MTRR_VAR_DRAM_EN       =      20               /*   MtrrVarDramEn    MTRR variable DRAM enable */
-  MTRR_TOM2_EN           =      21               /*   MtrrTom2En       MTRR top of memory 2 enable */
-
-PERF_CONTROL3            =      0x0C0010003      /* Performance event control three */
-    PERF_CONTROL3_RESERVE_L  =  0x00200000       /* Preserve the reserved bits */
-    PERF_CONTROL3_RESERVE_H  =  0x0FCF0          /* Preserve the reserved bits */
-    CONFIG_EVENT_L           =  0x0F0E2          /* All cores with level detection */
-    CONFIG_EVENT_H           =  4                /* Increment count by number of event */
-                                                 /* occured in clock cycle */
-    EVENT_ENABLE             =  22               /* Enable the event */
-PERF_COUNTER3            =      0x0C0010007      /* Performance event counter three */
-
-COMPUTE_UNIT_STATUS     = 0x08000C580 /* Compute Unit Status Register */
-  QUAD_CORE                 = 24      /*  QuadCore         four cores of a compute unit are enabled */
-  DUAL_CORE                 = 16      /*  DualCore         two cores of a compute unit are enabled */
-  TRIPLE_CORE               = 8       /*  TripleCore       three cores of a compute unit are enabled */
-  CU_ENABLED                = 0       /*  Enabled          at least one core of a compute unit is enabled */
-
-FUNC_3			=	3
-MCA_NB_CFG		=	0x44		 /* MCA NB Configuration */
-CPU_ERR_DIS             =       6                /* CPU error response disable */
-PRODUCT_INFO_REG1	=	0x1FC			/* Product Information Register 1 */
-
-# Local use flags, in upper most byte if ESI
-FLAG_UNKNOWN_FAMILY     = 24          # Signals that the family# of the installed processor is not recognized
-FLAG_STACK_REENTRY      = 25          # Signals that the environment has made a re-entry (2nd) call to set up the stack
-FLAG_IS_PRIMARY         = 26          # Signals that this core is the primary within the comoute unit
-FLAG_CORE_NOT_IDENTIFIED     = 27          # Signals that the cores/compute units of the installed processor is not recognized
-FLAG_FORCE_32K_STACK     = 28         # Signals that to force 32KB stack size for BSP core
-CR0_MASK    = ((1 << CR0_CD) | (1 << CR0_NW))
-MSR_MASK    = ((1 << MTRR_DEF_TYPE_EN)+(1 << MTRR_DEF_TYPE_FIX_EN))
-
-/****************************************************************************
- *
- *                      CPU MACROS - PUBLIC
- *
- ****************************************************************************/
-.macro   _WRMSR
-        .byte 0x0f, 0x30
-.endm
-
-.macro  _RDMSR
-        .byte   0x0F, 0x32
-.endm
-
-.macro AMD_CPUID arg0
-  .ifb \arg0
-    mov   $0x1, %eax
-    .byte 0x0F, 0x0A2                     /* Execute instruction */
-    bswap %eax
-    xchg  %ah, %al                        /* Ext model in al now */
-    rol   $0x08, %eax                     /* Ext model in ah, model in al */
-    and   $0x0FFCF, ax                    /* Keep 23:16, 7:6, 3:0 */
-  .else
-    mov   \arg0, %eax
-    .byte 0x0F, 0x0A2
-  .endif
-.endm
-
-.macro MAKE_EXT_PCI_ADDR  Seg, Bus, Dev, Func, Offset
-	mov $(1 << 31 | (Seg) << 28 | (((Offset) & (0x0F00)) >> 8) << 24 | (Bus) << 16 | (Dev) << 11 | (Func) << 8) | ((Offset) & (0xFC)), %eax
-.endm
-/****************************************************************************
-*
-* AMD_ENABLE_STACK_FAMILY_HOOK Macro - Stackless
-*
-*   Set any family specific controls needed to enable the use of
-*   cache as general storage before main memory is available.
-*
-* Inputs:
-*       none
-* Outputs:
-*       none
- ****************************************************************************/
-.macro  AMD_ENABLE_STACK_FAMILY_HOOK
-
-    AMD_ENABLE_STACK_FAMILY_HOOK_F16
-
-.endm
-
-/****************************************************************************
-*
-* AMD_DISABLE_STACK_FAMILY_HOOK Macro - Stackless
-*
-*   Return any family specific controls to their 'standard'
-*   settings for using cache with main memory.
-*
-* Inputs:
-*       none
-* Outputs:
-*       none
- ****************************************************************************/
-.macro  AMD_DISABLE_STACK_FAMILY_HOOK
-
-    AMD_DISABLE_STACK_FAMILY_HOOK_F16
-
-.endm
-
-/****************************************************************************
-*
-* GET_NODE_ID_CORE_ID Macro - Stackless
-*
-*   Read family specific values to determine the node and core
-*   numbers for the core executing this code.
-*
-* Inputs:
-*     none
-* Outputs:
-*     SI[7:0] = Core# (0..N, relative to node)
-*     SI[15:8]= Node# (0..N)
-*     SI[23:16]= reserved
-*     SI[24]=   flag: 1=Family Unrecognized
-*     SI[25]=   flag: 1=Interface re-entry call
-*     SI[26]=   flag: 1=Core is primary of compute unit
-*     SI[31:27]= reserved, =0
-****************************************************************************/
-.macro  GET_NODE_ID_CORE_ID
-    LOCAL  node_core_exit
-
-    mov     $-1, %si
-    GET_NODE_ID_CORE_ID_F16
-
-    /*
-     * Check for unrecognized Family
-     */
-    cmp     $-1, %si                      # Has family (node/core) already been discovered?
-    jnz     node_core_exit              # Br if yes
-
-   mov     $((1 << FLAG_UNKNOWN_FAMILY)+(1 << FLAG_IS_PRIMARY)), %esi # No, Set error code, Only let BSP continue
-
-    mov     $APIC_BASE_ADDRESS, %ecx      # MSR:0000_001B
-    _RDMSR
-    bt      $APIC_BSC, %eax               # Is this the BSC?
-    jc      node_core_exit              # Br if yes
-    hlt                                 # Kill APs
-node_core_exit:
-
-.endm
-
-/*
-***************************************************************************
-                      Family 16h MACROS
-***************************************************************************/
-/*--------------------------------------------------
-
-AMD_ENABLE_STACK_FAMILY_HOOK_F16 Macro - Stackless
-
-  Set any family specific controls needed to enable the use of
-  cache as general storage before main memory is available.
-
-Inputs:
-      ESI - node#, core#, flags from GET_NODE_ID_CORE_ID
-Outputs:
-      none
-Destroyed:
-      eax, ebx, ecx, edx
-
-Family 16h requirements (BKDG #48751 section 2.3.3):
-  * Paging must be disabled.
-  * MSRC001_0015[INVD_WBINVD]=0
-  * MSRC001_1020[DisSS]=1
-  * MSRC001_1021[DIS_SPEC_TLB_RLD]=1
-  * MSRC001_1022[DIS_SPEC_TLB_RLD]=1
-  * MSRC001_1022[DisHwPf]=1
-  * If MSRC001_102B[CombineCr0Cd] == 1 then MSRC001_102B[CombineCroCd] = 0
-  * No INVD or WBINVD, no exceptions, page faults or interrupts
---------------------------------------------------
-
-	*/
-
-.macro  AMD_ENABLE_STACK_FAMILY_HOOK_F16
-    LOCAL   fam16_enable_stack_hook_exit
-
-    AMD_CPUID   $CPUID_MODEL
-    mov     %eax, %ebx                # Save revision info to EBX
-    shr     $20, %eax                 # AL = cpu extended family
-    cmp     $0x07, %al                     # Is this family 16h?
-    jnz     fam16_enable_stack_hook_exit # Br if no
-
-    bt      $FLAG_STACK_REENTRY , %esi                 # Check if stack has already been set
-    jc      fam16_skipClearingBit4
-    mov     $HWCR, %ecx                   # MSR C001_0015
-    _RDMSR
-    btr     $INVD_WBINVD, %eax            # disable INVD -> WBINVD conversion
-    _WRMSR
-
-fam16_skipClearingBit4:
-    mov     $IC_CFG, %ecx                  # MSR:C001_1021
-    _RDMSR
-    bts     $IC_DIS_SPEC_TLB_RLD, %eax    # Turn on Disable speculative IC-TLB reloads bit
-    _WRMSR
-
-#    mov     %ebx, %eax                   # Restore revision info to EAX
-#    shr     $16, %eax
-#    and     $0x0F, %al                   # AL = cpu extended model
-
-    mov     $DC_CFG, %ecx                # MSR:C001_1022
-    _RDMSR
-    bts     $DC_DIS_SPEC_TLB_WALK, %eax    # Turn on Disable speculative DC-TLB reloads bit
-    bts     $DIS_HW_PF, %eax              # Turn on Disable hardware prefetches bit
-    _WRMSR				# Remove KM in PI 1.1.0.0
-
-    mov     $0x0C00110A0, %ecx                  # MSR:C001_10A0
-    _RDMSR
-    bts     $L2_RINSER_DIS, %eax    #Do not search for the repair single bit errors in the background
-    bts     $PREFETCHER_DIS, %eax
-    bts     $CACHE_IC_ATTR_DIS, %eax
-    _WRMSR
-
-fam16_enable_stack_hook_exit:
-.endm
-
-/*
-;
-; AMD_DISABLE_STACK_FAMILY_HOOK_F16 Macro - Stackless
-;
-;   Return any family specific controls to their 'standard'
-;   settings for using cache with main memory.
-;
-; Inputs:
-;       ESI - [31:24] flags; [15:8]= Node#; [7:0]= core#
-; Outputs:
-;       none
-; Destroyed:
-;       eax, ebx, ecx, edx
-;
-; Family 16h requirements:
-;   * INVD or WBINVD
-;   * MSRC001_0015[INVD_WBINVD]=1
-;   * MSRC001_1020[DisSS]=0
-;   * MSRC001_1021[DIS_SPEC_TLB_RLD]=0
-;   * MSRC001_1022[DIS_SPEC_TLB_RLD]=0
-;   * MSRC001_1022[DIS_HW_PF]=0
-;---------------------------------------------------
-*/
-.macro  AMD_DISABLE_STACK_FAMILY_HOOK_F16
-    LOCAL   fam16_disable_stack_hook_exit
-    LOCAL   fam16_disable_stack_remote_read_exit
-#    LOCAL   fam16_invd_done_remote_read_exit
-
-    AMD_CPUID   $CPUID_MODEL
-    mov     %eax, %ebx                    # Save revision info to EBX
-    shr     $20, %eax                     # AL = cpu extended family
-    cmp     $0x07, %al                     # Is this family 16h?
-    jnz     fam16_disable_stack_hook_exit # Br if no
-
-    mov     %ebx, %edi                    # Save revision info to EDI
-    AMD_CPUID  $AMD_CPUID_APIC
-    mov     %cl,  %al                     # AL = number of cores - 1
-    shr     $APIC_ID_CORE_ID_SIZE, %cx    # CL = ApicIdCoreIdSize
-    mov     $1,   %bx
-    shl     %cl,  %bl                     # BL = theoretical number of cores on socket
-    dec     %bx                           # BL = core number on socket mask
-    mov     %bl,  %ah                     # AH = core number on socket mask
-    mov     %edi, %ebx                    # Restore revision info to EBX
-    mov     %ax,  %di                     # DI[15:8] = core number mask, DI[7:0] = number of cores - 1
-
-    and     $0x0F00FF, %ebx
-    mov     %ebx,  %eax
-    shr     $8,    %eax
-    or      %ax,   %bx                    # Save Extended Model, Model and Stepping to BX
-	                                  # [11:8] = Extended Model, [7:4] = Model, [3:0] = Stepping (bx=0000000000010100, ok)
-
-    mov     $APIC_BASE_ADDRESS, %ecx
-    _RDMSR                                # dx=0 ax=fee00800
-    mov     %bx,  %dx                     # Save Extended Model, Model and Stepping to DX
-    shl     $16,  %edx                    #EDX[31:16] = Extended Model, Model and Stepping
-    mov     %eax ,%ebx                    # EBX = LAPIC base
-    xor     %ecx ,%ecx                    # Zero out CU flags
-    bts     $AMD_CU_NEED_TO_WAIT,  %ecx  # Default to waiting
-    bts     $AMD_CU_SEND_INVD_MSG, %ecx  # Default to signaling
-    mov     %cr0, %eax
-    bt      $CR0_PE, %ax                  # Are we in protected mode?
-    # .if (!carry?)
-    jc      1f
-    bts     $AMD_CU_RESTORE_ES, %ecx  # Indicate ES restore is required
-    mov     %es,   %cx    # Save ES segment register to CX
-    xor     %ax,   %ax
-    mov     %ax,   %es    # Set ES to big real mode selector for 4GB access
-    # .endif
-
-1:
-    and     $0x0F000, %bx                  # EBX = LAPIC base, offset 0
-    or      $APIC_ID_REG, %bl		#
-    mov     %es:(%ebx), %eax               # EAX[31:24] = APIC ID
-    shr     $APIC20_APICID, %eax          # AL = APIC ID
-    mov     %al, %ah                      # AH = APIC ID
-    mov     %di, %dx                      # DH = core mask
-    and     %dh, %ah                      # AH = core number #  ax=111 dx=01000F03
-
-    # .if (zero?)
-    jnz      1f
-    #  Core 0 of a socket
-        btr     $AMD_CU_SEND_INVD_MSG, %ecx  # No need to signal after INVD
-        #.if (dl != 0)
-	cmp     $0,  %dl
-        jz      2f
-        # This socket has multiple cores
-        and     $0xf000, %bx            # EBX = LAPIC base, offset 0
-        or      $APIC_MSG_REG, %bx
-        mov     $APIC_MSG,  %edi
-	mov     %edi,  %es:(%ebx)      # Signal for non core 0s to complete CAR breakdown
-        jmp     1f
-        #.else
-2:      btr     $AMD_CU_NEED_TO_WAIT, %ecx   # No need to wait on a single core CPU
-	#.endif
-    # .endif
-1:
-
-    bt      $AMD_CU_NEED_TO_WAIT, %ecx  #cx = c0000000
-    #.if (carry?)
-    jnc    1f
-        #.if (ah == dl)
-        cmp  %dl,  %ah
-        jnz  2f
-        # This is the highest numbered core on this socket -- wait on core 0
-            not  %dh                       # Flip the mask to determine local core 0's APID ID
-            and   %dh, %al                 # AL = target APIC ID  # ax=310
-        jmp   3f
-2:      #.else
-        # All other cores (including core 0) wait on the next highest core.
-        # In this way, cores will halt in a cascading fashion down to 0.
-            inc    %al
-        #.endif
-3:
-        shl     $APIC20_APICID, %eax
-        and     $0x0F000, %bx
-        or      $APIC_CMD_HI_REG, %bx
-        mov     %eax, %es:(%ebx)          # Set target APIC ID
-
-        # Use bits 23:16 as a timeout for unresponsive cores
-        ror     $8,  %ecx
-        mov     $0xFF, %ch
-        stc
-
-        #.while (carry?)
-5:	jnc     4f
-            and     $0xF000, %bx         #EBX = LAPIC base, offset 0
-            or      $APIC_CMD_LO_REG, %bx # bx = 00000000FEE00300
-            mov     $0x338, %eax
-            mov     %eax, %es:(%ebx)     #Fire remove read IPI
-            inc     %ch                  #Pre increment the timeout
-            stc
-            #.while (carry?)
-7:          jnc     6f
-                dec     %ch                   #Check the timeout
-                jz      fam16_disable_stack_remote_read_exit
-                mov     %es:(%ebx), %eax      # ax = 0000000000020338
-                bt      $DELIVERY_STS_BIT, %eax
-            jmp     7b
-6:          #.endw
-            stc
-            #.while (carry?)
-7:          jnc     6f
-                mov     %es:(%ebx), %eax
-                and     $REMOTE_READ_STS, %eax
-                #.if (eax == REMOTE_DELIVERY_PEND)
-                    cmp     $REMOTE_DELIVERY_PEND, %eax
-                    jnz      8f
-                    dec     %ch               # Check the timeout
-                    jz      fam16_disable_stack_hook_exit # Branch if there is an unreponsive core
-                    stc
-                jmp     9f
-8:              #.else
-                    clc
-9:              #.endif
-            jmp     7b
-6:          #.endw
-            #.if (eax == REMOTE_DELIVERY_DONE)
-            cmp     $REMOTE_DELIVERY_DONE, %eax
-            jnz     6f
-                and     $0x0F000, %bx        #EBX = LAPIC base, offset 0
-                or      $APIC_REMOTE_READ_REG, %bl
-                mov     %es:(%ebx), %eax
-                #.if (eax == APIC_MSG)
-                cmp     $APIC_MSG, %eax     # ax=00000000FFC5BBB2
-                jnz     8f
-                    clc
-                jmp     9f
-                #.else
-8:                  stc
-9:              #.endif
-            jmp     7f
-6:          #.else
-                dec     %ch
-                jz      fam16_disable_stack_remote_read_exit
-                stc
-7:          #.endif
-        jmp     5b
-4:      #.endw
-
-fam16_disable_stack_remote_read_exit:
-        rol   $8, %ecx                 # Restore ECX
-
-1:  #.endif
-
-    bt     $AMD_CU_RESTORE_ES,  %ecx
-    #.if (carry?)
-    jnc    1f
-        mov    %cx, %es
-1:
-    mov    %ecx,   %edi
-    shr    $16, %edx
-    mov    %dx,  %bx
-
-    #Handshaking complete.  Continue tearing down CAR.
-
-    mov     $IC_CFG, %ecx                # MSR:C001_1021
-    _RDMSR
-    btr     $IC_DIS_SPEC_TLB_RLD, %eax    # Turn on speculative TLB reloads
-    _WRMSR
-
-    mov     $DC_CFG, %ecx                # MSR:C001_1022
-    _RDMSR
-    btr     $DC_DIS_SPEC_TLB_WALK, %eax    # Turn on speculative table-walks
-    #.if (bx != 0)              # Is this rev A0?
-    #cmp	$0, %bx
-    #jz	0f
-    btr     $DIS_HW_PF, %eax              # Turn on hardware prefetches
-    #.endif                              # End workaround for erratum 498
-    #0:
-    _WRMSR
-
-    mov     $0x0C00110A0, %ecx                 #MSR:C001_10A0
-    _RDMSR
-    btr     $PREFETCHER_DIS, %eax
-    btr     $CACHE_IC_ATTR_DIS, %eax
-    _WRMSR
-
-    mov     $BU_CFG2, %ecx
-    _RDMSR
-    btr     $F16_CL_LINES_TO_L2_DIS, %eax
-    _WRMSR
-
-    mov     $HWCR, %ecx                    # MSR:C001_0015h
-    _RDMSR
-    btr     $INVD_WBINVD, %eax            # Disable INVD -> WBINVD conversion
-    _WRMSR
-    wbinvd                                # Clear the cache tag RAMs
-    #invd
-
-    #Do Standard Family 16 work
-    mov     $HWCR, %ecx                    # MSR:C001_0015h
-    _RDMSR
-    bts     $INVD_WBINVD, %eax            # Turn on Conversion of INVD to WBINVD
-    _WRMSR
-    #.endif                              # end
-
-    bt      $AMD_CU_SEND_INVD_MSG, %edi
-    #.if (carry?)
-    jnc     1f
-    AMD_CPUID   $AMD_CPUID_APIC
-    shr     $APIC_ID_CORE_ID_SIZE, %cx  # CL = ApicIdCoreIdSize
-    mov     $1, %di
-    shl     %cl, %di           #DI = theoretical number of cores on socket
-    dec     %di             # DI = core number on socket mask
-    # Non core zero needs to signal to core 0 to proceed
-    mov     $APIC_BASE_ADDRESS, %ecx
-    _RDMSR
-    mov     %eax, %ebx                # EBX = LAPIC base
-    and     $0x0F000, %bx              # EBX = LAPIC base, offset 0
-    or      $APIC_MSG_REG, %bx
-    mov     $APIC_MSG, %eax
-    mov     %eax, %es:(%ebx)           # Signal for core 0 to complete CAR breakdown
-
-    #TODO: Non core zero needs to wait for core zero to do INVD
-    #A handshake is required to ensure that all cores on a node invalidate in sync.
-    and    $0x0F000, %bx
-    or     $APIC_ID_REG, %bl
-    mov    %es:(%ebx), %eax          # EAX[31:24] = APIC ID
-    shr    $APIC20_APICID, %eax      # AL = APIC ID
-    mov    %di, %dx                  # Use DL as core mask
-    not    %dl
-    and    %dl, %al                  # Remote read message from core zero
-    shl    $APIC20_APICID, %eax
-
-    and    $0x0F000, %bx
-    or     $APIC_CMD_HI_REG, %bx
-    mov    %eax, %es:(%ebx)           #
-        # Use bits 23:16 as a timeout for unresponsive cores
-        ror     $8,  %ecx
-        mov     $0xFF, %ch
-        stc
-
-        #.while (carry?)
-5:	jnc     4f
-            and     $0xF000, %bx         #EBX = LAPIC base, offset 0
-            or      $APIC_CMD_LO_REG, %bx # bx = 00000000FEE00300
-            mov     $0x338, %eax
-            mov     %eax, %es:(%ebx)     #Fire remove read IPI
-            inc     %ch                  #Pre increment the timeout
-            stc
-            #.while (carry?)
-7:          jnc     6f
-                dec     %ch                   #Check the timeout
-                jz      fam16_invd_done_remote_read_exit
-                mov     %es:(%ebx), %eax      # ax = 0000000000020338
-                bt      $DELIVERY_STS_BIT, %eax
-            jmp     7b
-6:          #.endw
-            stc
-            #.while (carry?)
-7:          jnc     6f
-                mov     %es:(%ebx), %eax
-                and     $REMOTE_READ_STS, %eax
-                #.if (eax == REMOTE_DELIVERY_PEND)
-                    cmp     $REMOTE_DELIVERY_PEND, %eax
-                    jnz      8f
-                    dec     %ch               # Check the timeout
-                    jz      fam16_invd_done_remote_read_exit # Branch if there is an unreponsive core
-                    stc
-                jmp     9f
-8:              #.else
-                    clc
-9:              #.endif
-            jmp     7b
-6:          #.endw
-            #.if (eax == REMOTE_DELIVERY_DONE)
-            cmp     $REMOTE_DELIVERY_DONE, %eax
-            jnz     6f
-                and     $0x0F000, %bx        #EBX = LAPIC base, offset 0
-                or      $APIC_REMOTE_READ_REG, %bl
-                mov     %es:(%ebx), %eax
-                #.if (eax == APIC_MSG)
-                cmp     $APIC_MSG, %eax     # ax=00000000FFC5BBB2
-                jnz     8f
-                    clc
-                jmp     9f
-                #.else
-8:                  stc
-9:              #.endif
-            jmp     7f
-6:          #.else
-                dec     %ch
-                jz      fam16_invd_done_remote_read_exit
-                stc
-7:          #.endif
-        jmp     5b
-4:      #.endw
-
-     jmp  2f
-fam16_invd_done_remote_read_exit:
-1: #.else
-     mov    $APIC_BASE_ADDRESS, %ecx
-     _RDMSR
-     mov    %eax, %ebx
-     and    $0x0F000, %bx
-     or     $APIC_MSG_REG, %bx
-     mov    $APIC_INVD_ALL_DONE_MSG, %edi
-     mov    %edi,  %es:(%ebx)
-2: #.endif
-
-   mov $0xc0011004, %ecx
-   _RDMSR
-    btr     $30, %edx
-    _WRMSR
-
-fam16_disable_stack_hook_exit:
-.endm
-
-/*
-*/
-.macro  GET_NODE_ID_CORE_ID_F16
-
-    LOCAL   node_core_f16_exit
-    LOCAL   node_core_f16_AP
-    LOCAL   node_core_f16_shared
-    LOCAL node_core_f16_AP_not_TN
-
-#define F16_L2Size	1024
-#define F16_ShareCores  4
-#define F16_AllocMem    0
-#define F16_AllocExe    0
-#define F16_SzAddrBus   40
-#define F16_pad         0
-    cmp     $-1, %si                      # Has node/core already been discovered?
-    jnz     node_core_f16_exit          # Br if yes
-
-    AMD_CPUID   $CPUID_MODEL
-    shr     $12, %eax                     # AL = cpu extended family
-    cmp     $07, %ah                     # Is this family 16h?
-    jnz     node_core_f16_exit          # Br if no
-    shr     $4,  %al                     # AL = cpu extended model
-    shr     $16, %ebx                    # BH = LocalApicId
-    mov     %al, %bl                     # BL = cpu extended model
-
-    # LoadTableAddress(FAM16H_INFO_STRUCT)
-    # movd    mm5, eax                    # load pointer to Family Info Struc
-
-    xor     %esi, %esi                    # Assume BSC, clear local flags
-    mov     $APIC_BASE_ADDRESS, %ecx      # MSR:0000_001B
-    _RDMSR
-    bt      $APIC_BSC, %eax               # Is this the BSC?
-    jnc      node_core_f16_AP            # Br if no
-
-    # This is the BSP.
-    # Enable routing tables on BSP (just in case the HT init code has not yet enabled them)
-    mov     $0x8000C06C, %eax              # PCI address for D18F0x6C Link Initialization Control Register
-    mov     $0x0CF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    in      %dx, %eax
-    btr     $0, %eax                      # Set LinkInitializationControl[RouteTblDis] = 0
-    out     %eax, %dx
-    jmp     6f         #node_core_f16_shared        #
-
-node_core_f16_AP:
-    mov     %bl, %al                        # AL = cpu extended model
-    shr     $8,  %bx                        # BL = CPUID Fn0000_0001_EBX[LocalApicId]
-    #.if (al == 0)
-    cmp    $3,  %al                        # Is This ML?
-    jnz    5f
-    #.else
-4:  mov     %bx, %si
-    jmp     6f
-5:  #node_core_f16_AP_not_KB
-         bts $FLAG_CORE_NOT_IDENTIFIED, %esi
-    #.endif
-    #.endif
-      #
-      #   determine if this core shares MTRRs
-      #
-6:	#node_core_f16_shared
-    mov     $COMPUTE_UNIT_STATUS, %eax              # Compute Unit Status
-    mov     %si, %bx
-    shl     $3, %bh                       # Move node# to PCI Dev# field
-    add     %bh, %ah                      # Adjust for node number
-    mov     $0x0CF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    in      %dx, %eax                     # [3:0]=Enabled# [19:16]=DualCore
-
-                                        # BL is MyCore#
-    mov     $0x04, %cx                     # Use CH as 'first of pair' core#
-    #.while (cl > 0)
-    jmp  0f
-    8:
-        bt      $CU_ENABLED, %eax                  # Is pair enabled?
-        #.if (carry?)                    #
-        jnc     1f
-            mov     $0x01, %bh             #   flag core as primary
-            #.break .if (ch == bl)   # Does 1st match MyCore#?
-            cmp     %bl, %ch
-            je      9f
-            #inc     %ch
-            xor     %bh, %bh          #     flag core as NOT primary
-            #
-            bt      $DUAL_CORE, %eax
-            #.if (carry?)
-	    jnc  5f
-                 add   $1, %eax
-            #.endif
-            5:
-	    bt      $TRIPLE_CORE, %eax
-	    jnc  5f
-            #.if (carry?)
-                 add   $2, %eax
-            #.endif
-            5:
-	    bt      $QUAD_CORE, %eax
-            jnc  5f
-            #.if (carry?)
-                 add   $3, %eax
-            #.endif
-            5:
-            #.break .if (ch >= bl) #TODO:
-            cmp     %bl, %ch
-            jae      9f
-            inc     %ch
-        #.endif
-        1:
-        shr     $1, %eax
-        dec     %cl
-    0:
-    cmp $0x0, %cl
-    ja	8b
-
-    #.endw
-    9:
-
-    #.if (cl == 0)
-    or	%cl, %cl
-    jne 1f
-        #Error - core# didn't match Compute Unit Status content
-        bts     $FLAG_CORE_NOT_IDENTIFIED, %esi
-        bts     $FLAG_IS_PRIMARY, %esi    #   Set Is_Primary for unknowns
-    #.endif
-    1:
-    #.if (bh != 0)                       # Check state of primary for the matched core
-    or %bh, %bh
-    je 2f
-        bts     $FLAG_IS_PRIMARY, %esi    #   Set shared flag into return value
-    #.endif
-    2:
-
-node_core_f16_exit:
-
-.endm
-
-/*****************************************************************************
-* AMD_ENABLE_STACK:  Setup a stack
-*
-*   In:
-*       EBX  = Return address (preserved)
-*
-*   Out:
-*       SS:ESP - Our new private stack location
-*
-*       EAX = AGESA_STATUS
-*
-*       ECX = Stack size in bytes
-*
-*   Requirements:
-*       * This routine presently is limited to a max of 64 processor cores
-*   Preserved:
-*       ebx ebp
-*   Destroyed:
-*       eax, ecx, edx, edi, esi, ds, es, ss, esp
-*       mmx0, mmx1
-*
-*   Description:
-* Fixed MTRR address allocation to cores:
-* The BSP gets 64K of stack, Core0 of each node gets 16K of stack, all other cores get 4K.
-* There is a max of 1 BSP, 7 core0s and 56 other cores.
-* Although each core has it's own cache storage, they share the address space. Each core must
-* be assigned a private and unique address space for its stack. To support legacy systems,
-* the stack needs to be within the legacy address space (1st 1Meg). Room must also be reserved
-* for the other legacy elements (Interrupt vectors, BIOS ROM, video buffer, etc.)
-*
-* 80000h                                        40000h                                      00000h
-*     +----------+----------+----------+----------+----------+----------+----------+----------+
-* 64K |          |          |          |          |          |          |          |          |  64K  ea
-*  ea +----------+----------+----------+----------+----------+----------+----------+----------+
-*     |                             MTRR 0000_0250 MTRRfix64K_00000                           |
-*     +----------+----------+----------+----------+----------+----------+----------+----------+
-*     |  7 ,  6  |  5 ,  4  |  3 ,  2  |  1 ,  0  |     0    |          |          |          | <-node
-*     |7..1,7..1 |7..1,7..1 |7..1,7..1 |7..1,7..1 |     0    |          |          |          | <-core
-*     +----------+----------+----------+----------+----------+----------+----------+----------+
-*
-* C0000h                       B0000h                      A0000h                      90000h                      80000h
-*     +------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+
-*16K  |      |      |      |      |      |      |      |      |      |      |      |      |      |      |      |      |
-* ea  +------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+
-*     |              MTRR 0259 MTRRfix16K_A0000               |             MTRR 0258 MTRRfix16K_80000                |
-*     +------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+
-*     | > Dis|play B|uffer |   <  |      |      |      |      |   7  |  6   |  5   |  4   |  3   |  2   |  1   |      | <-node
-*     | >   T| e  m |p o r |a r y |  B u |f f e |r   A |r e a<|   0  |  0   |  0   |  0   |  0   |  0   |  0   |      | <-core
-*     +------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+------+
-*
-* E0000h                                            D0000h                                         C0000h
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-* 4K  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  4K  ea
-*  ea +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     |  026B MTRRfix4K_D8000 | 026A MTRRfix4K_D0000  | 0269 MTRRfix4K_C8000  | 0268 MTRRfix4K_C0000  |
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  | >| V| I| D| E| O|  |B |I |O |S |  |A |r |e |a<|
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*
-* 100000h                                           F0000h                                          E0000h
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  4K  ea
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     |  026F MTRRfix4K_F8000 | 026E MTRRfix4K_F0000  | 026D MTRRfix4K_E8000  | 026C MTRRfix4K_E0000  |
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*     | >|MA|IN| B|IO|S |RA|NG|E |  |  |  |  |  |  |< | >|EX|TE|ND|ED| B|IO|S |ZO|NE|  |  |  |  |  |< |
-*     +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-*****************************************************************************/
-.macro  AMD_ENABLE_STACK
-
-# These are local labels. Declared so linker doesn't cause 'redefined label' errors
-    LOCAL   SetupStack
-    LOCAL   Real16bMode
-    LOCAL   Protected32Mode
-    LOCAL   ClearTheStack
-
-#   Note that SS:ESP will be default stack.  Note that this stack
-#   routine will not be used after memory has been initialized.  Because
-#   of its limited lifetime, it will not conflict with typical PCI devices.
-    movd    %ebx, %mm0                    # Put return address in a safe place
-    movd    %ebp, %mm1                    # Save some other user registers
-
-    # get node id and core id of current executing core
-    GET_NODE_ID_CORE_ID                 # Sets ESI[23:16]=Shared core## SI[15,8]= Node## SI[7,0]= core# (relative to node)
-    # Note: ESI[31:24] are used for flags:  Unrecognized Family,  Is_Primary core,  Stack already established
-
-    # determine if stack is already enabled. We are using the DefType MSR for this determination.
-    # It is =0 after reset; CAR setup sets it to enable the MTRRs
-    mov     %cr0, %eax
-    test    $CR0_MASK, %eax              # Is cache disabled? (CD & NW bits)
-    jnz     SetupStack                  # Jump if yes
-    mov     $AMD_MTRR_DEFTYPE, %ecx       # MSR:0000_02FF
-    _RDMSR
-    test    $MSR_MASK, %eax                     # Are the default types enabled? (MTRR_DEF_TYPE_EN + MTRR_DEF_TYPE_FIX_EN)
-    jz      SetupStack                  # Jump if no
-    or      $FLAG_STACK_REENTRY, %esi             # Bit25, indicate stack has already been initialized
-
-SetupStack:
-    # Set node to map the first 16MB to node 0# 0000_0000 to 00FF_FFFF as DRAM
-    mov     %esi, %ebx                    # Get my Node/Core info
-    xor     %bl, %bl
-    shl     $3, %bh                       # Isolate my node#, match alignment for PCI Dev#
-    mov     $0x8000C144, %eax              # D18F1x44:DRAM Base/Limit# N is Base, N+4 is Limit
-    add     %bh, %ah
-    mov     %eax, %ebx                    # Save PCI address for Base/Limit pair
-
-    mov     $0x0CF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    xor     %eax, %eax                    # Least Significant bit is AD24 so 0 sets mask of 00FF_FFFF (16MB)
-    out     %eax, %dx                     # DRAM Limit = node0, no interleave
-
-    mov     %ebx, %eax
-    sub     $4, %eax                      # Now point to the Base register
-    mov     $0x0CF8, %dx
-    out     %eax, %dx
-    add     $4, %dx
-    mov     $0x00000003, %eax              # Set the read and write enable bits
-    out     %eax, %dx                     # DRAM Base = 0x0000, R/W
-
-    AMD_ENABLE_STACK_FAMILY_HOOK
-
-    # Init CPU MSRs for our init routines
-    mov     $MTRR_SYS_CFG, %ecx           # SYS_CFG
-    _RDMSR
-    bts     $MTRR_FIX_DRAM_MOD_EN, %eax   # Turn on modification enable bit
-    _WRMSR
-
-    mov     %esi, %eax
-    bt      $FLAG_STACK_REENTRY, %eax     # Is this a 2nd entry?
-    #.if (!carry?)                       #   On a re-entry, do not clear MTRRs or reset TOM; just reset the stack SS:ESP
-    jc 0f
-        bt      $FLAG_IS_PRIMARY, %eax    #   Is this core the primary in a compute unit?
-        #.if (carry?)                    #     Families using shared groups do not need to clear the MTRRs since that is done at power-on reset
-            #  Note: Relying on MSRs to be cleared to 0's at reset for families w/shared cores
-            # Clear all variable and Fixed MTRRs for non-shared cores
-        jnc 0f
-        mov     $AMD_MTRR_VARIABLE_BASE0, %ecx
-        xor     %eax, %eax
-        xor     %edx, %edx
-        #.while (cl != 10h)                  # Variable MTRRphysBase[n] and MTRRphysMask[n]
-        jmp	1f
-        2:
-            _WRMSR
-            inc     %cl
-        #.endw
-        1:
-        cmp	$0x10, %cl
-        jne	2b
-        mov     $AMD_MTRR_FIX64k_00000, %cx   # MSR:0000_0250
-        _WRMSR
-        mov     $AMD_MTRR_FIX16k_80000, %cx   # MSR:0000_0258
-        _WRMSR
-        mov     $AMD_MTRR_FIX16k_A0000, %cx   # MSR:0000_0259
-        _WRMSR
-        mov     $AMD_MTRR_FIX4k_C0000, %cx    # Fixed 4Ks: MTRRfix4K_C0000 to MTRRfix4K_F8000
-        #.while (cl != 70h)
-        jmp 3f
-        4:
-            _WRMSR
-            inc     %cl
-        #.endw
-        3:
-        cmp $0x70, %cl
-        jne  4b
-        # Set TOP_MEM (C001_001A) for non-shared cores to 16M. This will be increased at heap init.
-        #  - not strictly needed since the FixedMTRRs take presedence.
-        mov     $(16 * 1024 * 1024), %eax
-        mov     $TOP_MEM, %ecx            # MSR:C001_001A
-        _WRMSR
-        #.endif                          #   End Is_Primary
-    #.endif                              # End Stack_ReEntry
-    0:
-    # Clear IORRs (C001_0016-19) and TOM2(C001_001D) for all cores
-    xor     %eax, %eax
-    xor     %edx, %edx
-    mov     $IORR_BASE, %ecx              # MSR:C001_0016 - 0019
-    #.while (cl != 1Ah)
-    jmp  1f
-    2:
-        _WRMSR
-        inc     %cl
-    #.endw
-    1:
-    cmp $0x1A, %cl
-    jne  2b
-    mov     $TOP_MEM2, %ecx               # MSR:C001_001D
-    _WRMSR
-
-    # setup MTTRs for stacks
-    #   A speculative read can be generated by a speculative fetch mis-aligned in a code zone
-    #    or due to a data zone being interpreted as code. When a speculative read occurs outside a
-    #    controlled region (intentionally used by software), it could cause an unwanted cache eviction.
-    #   To prevent speculative reads from causing an eviction, the unused cache ranges are set
-    #    to UC type. Only the actively used regions (stack, heap) are reflected in the MTRRs.
-    #    Note: some core stack regions will share an MTRR since the control granularity is much
-    #    larger than the allocated stack zone. The allocation algorithm must account for this 'extra'
-    #    space covered by the MTRR when parseling out cache space for the various uses. In some cases
-    #    this could reduce the amount of EXE cache available to a core. see cpuCacheInit.c
-    #
-    # Outcome of this block is that:   (Note the MTRR map at the top of the file)
-    #   ebp - start address of stack block
-    #   ebx - [31:16] - MTRR MSR address
-    #       - [15:8]  - slot# in MTRR register
-    #       - [7:0]   - block size in #4K blocks
-    # review: ESI[31:24]=Flags; SI[15,8]= Node#; SI[7,0]= core# (relative to node)
-    #
-
-    mov     %si, %ax                      # Load node, core
-    #.if (al == 0)                       # Is a core 0?
-    or %al, %al
-    jne 1f
-        #.if (ah == 0)                   # Is Node 0? (BSP)
-        or %ah, %ah
-        jne 2f
-            # Is BSP, assign a 64K stack
-            mov     $((AMD_MTRR_FIX64k_00000 << 16) + (3 << 8) + (BSP_STACK_SIZE  / 0x1000)), %ebx
-            mov     $BSP_STACK_BASE_ADDR, %ebp
-            jmp     0f
-        #.else   # node 1 to 7, core0
-        2:
-            # Is a Core0 of secondary node, assign 16K stacks
-            mov     $AMD_MTRR_FIX16k_80000, %bx
-            shl     $16, %ebx             #
-            mov     %ah, %bh              # Node# is used as slot#
-            mov     $(CORE0_STACK_SIZE / 0x1000), %bl
-            mov     %ah, %al              # Base = (Node# * Size)#
-            mul     %bl                  #
-            movzx   %ax, %eax             #
-            shl     $12, %eax             # Expand back to full byte count (* 4K)
-            add     $CORE0_STACK_BASE_ADDR, %eax
-            mov     %eax, %ebp
-        #.endif
-        jmp 0f
-    #.else    #core 1 thru core 7
-    1:
-        # Is core 1-7 of any node, assign 4K stacks
-        mov     $8, %al                   # CoreIndex = ( (Node# * 8) ...
-        mul     %ah                      #
-        mov     %si, %bx                  #
-        add     %bl, %al                  #         ...  + Core#)#
-
-        mov     $AMD_MTRR_FIX64k_00000, %bx
-        shl     $16, %ebx                 #
-        mov     %al, %bh                  # Slot# = (CoreIndex / 16) + 4#
-        shr     $4, %bh                   #
-        add     $4, %bh                   #
-        mov     $(CORE1_STACK_SIZE / 0x1000), %bl
-
-        mul     %bl                      # Base = ( (CoreIndex * Size) ...
-        movzx   %ax, %eax                 #
-        shl     $12, %eax                 # Expand back to full byte count (* 4K)
-        add     $CORE1_STACK_BASE_ADDR, %eax #     ...   + Base_Addr)#
-        mov     %eax, %ebp
-    #.endif
-    0:
-
-    # Now set the MTRR. Add this to already existing settings (don't clear any MTRR)
-    mov     $WB_DRAM_TYPE, %edi           # Load Cache type in 1st slot
-    mov     %bh, %cl                      # ShiftCount =  ((slot#   ...
-    and     $0x03, %cl                     #   ...  % 4)             ...
-    shl     $0x03, %cl                       #   ...  * 8)#
-    shl     %cl, %edi                     # Cache type is now in correct position
-    ror     $16, %ebx                     # Get the MTRR address
-    movzx   %bx, %ecx                     #
-    rol     $16, %ebx                     # Put slot# & size back in BX
-    _RDMSR                              # Read-modify-write the MSR
-    #.if (bh < 4)                        # Is value in lower or upper half of MSR?
-    cmp $4, %bh
-    jae 1f
-        or      %edi, %eax                #
-        jmp     0f
-    #.else
-    1:                               #
-        or      %edi, %edx                #
-    #.endif                              #
-    0:
-    _WRMSR                              #
-
-    # Enable MTRR defaults as UC type
-    mov     $AMD_MTRR_DEFTYPE, %ecx       # MSR:0000_02FF
-    _RDMSR                              # Read-modify-write the MSR
-    bts     $MTRR_DEF_TYPE_EN, %eax       # MtrrDefTypeEn
-    bts     $MTRR_DEF_TYPE_FIX_EN, %eax   # MtrrDefTypeFixEn
-    _WRMSR
-
-    # Close the modification window on the Fixed MTRRs
-    mov     $MTRR_SYS_CFG, %ecx           # MSR:0C001_0010
-    _RDMSR
-    bts     $MTRR_FIX_DRAM_EN, %eax       # MtrrFixDramEn
-    bts     $MTRR_VAR_DRAM_EN, %eax       # variable MTRR enable bit
-    btr     $MTRR_FIX_DRAM_MOD_EN, %eax   # Turn off modification enable bit
-    _WRMSR
-
-    # Enable caching in CR0
-    mov     %cr0, %eax                    # Enable WT/WB cache
-    btr     $CR0_PG, %eax                     # Make sure paging is disabled
-    btr     $CR0_CD, %eax                     # Clear CR0 NW and CD
-    btr     $CR0_NW, %eax
-    mov     %eax, %cr0
-
-    # Use the Stack Base & size to calculate SS and ESP values
-    # review:
-    #       esi[31:24]=Flags; esi[15,8]= Node#; esi[7,0]= core# (relative to node)
-    #       ebp - start address of stack block
-    #       ebx - [31:16] - MTRR MSR address
-    #           - [15:8]  - slot# in MTRR register
-    #           - [7:0]   - block size in #4K blocks
-    #
-    mov     %ebp, %esp                    # Initialize the stack pointer
-    mov     %esp, %edi                    # Copy the stack start to edi
-    movzx   %bl, %bx
-    movzx   %bx, %ebx                     # Clear upper ebx, don't need MSR addr anymore
-    shl     $12, %ebx                     # Make size full byte count (* 4K)
-    add     %ebx, %esp                    # Set the Stack Pointer as full linear address
-    sub     $4, %esp
-    #
-    # review:
-    #       esi[31:24]=Flags; esi[15,8]= Node#; esi[7,0]= core# (relative to node)
-    #       edi - 32b start address of stack block
-    #       ebx - size of stack block
-    #       esp - 32b linear stack pointer
-    #
-
-    # Determine mode for SS base;
-    mov     %cr0, %ecx                    # Check for 32-bit protect mode
-    bt      $CR0_PE, %ecx                 #
-    #.if (!carry?)                       # PE=0 means real mode
-    jc      Protected32Mode
-    mov     %cs, %cx                      # PE=1
-    cmp     $0x0D000, %cx                  # Check for CS
-    jb      Protected32Mode             # If CS < D000, it is a selector instead of a segment
-            # alter SS:ESP for 16b Real Mode:
-Real16bMode:
-    mov     %edi, %eax
-    shr     $4, %eax                      # Create a Real Mode segment for ss, ds, es
-    mov     %ax, %ss
-    mov     %ax, %ds
-    mov     %ax, %es
-    shl     $4, %eax
-    sub     %eax, %edi                    # Adjust the clearing pointer for Seg:Offset mode
-    mov     %ebx, %esp                    # Make SP an offset from SS
-    sub     $4, %esp              #
-    #    .endif                          # endif
-    # #else
-    #   Default is to use Protected 32b Mode
-    #.endif
-    ;
-Protected32Mode:
-    #
-    # Clear The Stack
-    #   Now that we have set the location and the MTRRs, initialize the cache by
-    #   reading then writing to zero all of the stack area.
-    # review:
-    #       ss  - Stack base
-    #       esp - stack pointer
-    #       ebx - size of stack block
-    #       esi[31:24]=Flags; esi[15,8]= Node#; esi[7,0]= core# (relative to node)
-    #       edi -  address of start of stack block
-    #
-
-ClearTheStack:                          # Stack base is in SS, stack pointer is in ESP
-    shr     $2, %ebx                      # ebx = stack block size in dwords
-    mov     %bx, %cx                      #
-    # Check our flags - Don't clear an existing stack
-    #.if ( !(esi & 0FF000000h))          # Check our flags
-    test    $(1 << FLAG_STACK_REENTRY), %esi
-    jne 1f
-        cld
-        mov     %edi, %esi
-        rep     lodsl (%esi)    # Pre-load the range
-        xor     %eax, %eax
-        mov     %bx, %cx
-        mov     %edi, %esi                # Preserve base for push on stack
-        rep     stosl (%edi)    # Clear the range
-        movl     $0x0ABCDDCBA, (%esp) # Put marker in top stack dword
-        shl     $2, %ebx                  # Put stack size and base
-        push    %ebx                     #  in top of stack
-        push    %esi
-
-        mov     %ebx, %ecx                # Return size of stack in bytes
-        xor     %eax, %eax                # eax = 0 : no error return code
-        jmp     0f
-    #.else
-    1:
-        movzx   %cx, %ecx
-        shl     $2, %ecx                  # Return size of stack in bytes
-        mov     %esi, %eax
-        shr     $24, %eax                 # Keep the flags as part of the error report
-        or      $0x40000000, %eax          # eax = AGESA_WARNING (Stack has already been set up)
-    #.endif
-    0:
-
-    movd        %mm0, %ebx                # Restore return address
-    movd        %mm1, %ebp
-.endm
-
-/*****************************************************************************
-* AMD_DISABLE_STACK:  Destroy the stack inside the cache. This routine
-*                     should only be executed on the BSP
-*
-*   In:
-*       none
-*
-*   Out:
-*       EAX = AGESA_SUCCESS
-*
-*   Preserved:
-*       ebx
-*   Destroyed:
-*       eax, ecx, edx, esp
-*****************************************************************************/
-.macro  AMD_DISABLE_STACK
-
-    mov     %ebx, %esp                    # Save return address
-
-    # get node/core/flags of current executing core
-    GET_NODE_ID_CORE_ID                 # Sets ESI[15,8]= Node#; ESI[7,0]= core# (relative to node)
-
-    # Turn on modification enable bit
-    mov     $MTRR_SYS_CFG, %ecx           # MSR:C001_0010
-    _RDMSR
-    bts     $MTRR_FIX_DRAM_MOD_EN, %eax   # Enable modifications
-    _WRMSR
-
-    # Set lower 640K MTRRs for Write-Back memory caching
-    mov     $AMD_MTRR_FIX64k_00000, %ecx
-    mov     $0x1E1E1E1E, %eax
-    mov     %eax, %edx
-    _WRMSR                              # 0 - 512K = WB Mem
-    mov     $AMD_MTRR_FIX16k_80000, %ecx
-    _WRMSR                              # 512K - 640K = WB Mem
-
-    # Turn off modification enable bit
-    mov     $MTRR_SYS_CFG, %ecx           # MSR:C001_0010
-    _RDMSR
-    btr     $MTRR_FIX_DRAM_MOD_EN, %eax   # Disable modification
-    _WRMSR
-
-    AMD_DISABLE_STACK_FAMILY_HOOK       # Re-Enable 'normal' cache operations
-
-    mov     %esp, %ebx
-    xor     %eax, %eax
-
-.endm
-

soc/intel/baytrail/M0C30678_0000082D.h

diff --git a/soc/intel/baytrail/M0C30678_0000082D.h b/soc/intel/baytrail/M0C30678_0000082D.h
deleted file mode 100644
index b7200f6..0000000
--- a/soc/intel/baytrail/M0C30678_0000082D.h
+++ /dev/null
@@ -1,13056 +0,0 @@
-0x00000001,
-0x0000082d,
-0x09182014,
-0x00030678,
-0x71bc26fc,
-0x00000001,
-0x0000000c,
-0x0000cbd0,
-0x0000cc00,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x000000a1,
-0x00020001,
-0x0000082d,
-0x00000000,
-0x00000000,
-0x20140918,
-0x00003201,
-0x00000001,
-0x00030678,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x000032f4,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x617a37ff,
-0x5303dba7,
-0xb1f97ab5,
-0x71ec2257,
-0xd80df93f,
-0x85ca1a0e,
-0x59894a07,
-0x6c968b83,
-0x156866db,
-0xc4bf175a,
-0x9d00ca4f,
-0xb3e89a09,
-0x7d2c8e19,
-0xbf5b667c,
-0x7a1a7ac0,
-0x26eebc7d,
-0xb2967286,
-0xceb685c8,
-0xffba02e6,
-0x144b5468,
-0x00c428c9,
-0x6d15dd3a,
-0xf9461953,
-0x1632a092,
-0x222335da,
-0x1fee67d9,
-0xa770513c,
-0x4e83def6,
-0xb3d82e5a,
-0x50f0b89f,
-0x7fe10d45,
-0x70f05efd,
-0x5f575449,
-0xab71a0a3,
-0xfb2a6eb5,
-0x0283b4e2,
-0x58a95566,
-0x38a4c957,
-0x8a682f1b,
-0xc49b3009,
-0x1256e90b,
-0x33169c52,
-0xd91585c4,
-0xdf78eb29,
-0x9f403399,
-0xa9de58da,
-0xfd05c858,
-0x5a0f11bc,
-0xc00e7840,
-0xb39bd56a,
-0xb87f38c7,
-0x90141c59,
-0x325933f9,
-0x0b0e1332,
-0x963c4bef,
-0xf203d9ac,
-0x3925365b,
-0x2955f8e7,
-0x1fc417cb,
-0xd840e4e7,
-0x25e9f7fa,
-0xfb769b96,
-0xc7b8da5e,
-0xe81200f0,
-0x71291c12,
-0x5989b1e5,
-0xc007fdad,
-0xd7c9091f,
-0x6a008197,
-0x73005539,
-0x6d8b436c,
-0xbc606f43,
-0x00000011,
-0x5f813318,
-0x6f87a2ce,
-0x8f280324,
-0x968c8f61,
-0xd16e0e73,
-0x07b65c72,
-0x33cad9f0,
-0x23afad77,
-0x73463c86,
-0x0bbd1459,
-0x307fea6c,
-0xe5e83ba0,
-0x62f82c5d,
-0xdf2421e6,
-0xebdf5964,
-0x27260524,
-0x228dd7b0,
-0xcbf4158d,
-0x703b7611,
-0x6be6eecf,
-0xcfe520b5,
-0x105ed241,
-0xeb4fdb1d,
-0x68d40ec8,
-0x9e8a6465,
-0x15932571,
-0xf839ef14,
-0x32514fca,
-0xf966e9d0,
-0xbf4e6b5e,
-0x22be3144,
-0xf737f64e,
-0x2ae320ee,
-0x7bf9a602,
-0x0337261b,
-0x8b0b92b9,
-0x5f7315e0,
-0x6d90f980,
-0xc0a52b16,
-0x0c1ab213,
-0x1a807305,
-0x402235b7,
-0x5b635a12,
-0x277012d3,
-0x5001c104,
-0x02cb5b6f,
-0x1ce7dc3c,
-0x88ed3e72,
-0x41e35ac1,
-0xc10782f7,
-0x636bee67,
-0x6f46a6c4,
-0xc3c75f5d,
-0x45f899a5,
-0xdc64a2bf,
-0x0112aee3,
-0x4f2f1a2e,
-0x83cd4e02,
-0x8b67af93,
-0xcec717f4,
-0x26a8f8e2,
-0x10f99399,
-0xf86b934f,
-0x9b89db08,
-0x2487fef6,
-0xbbff7a69,
-0x6908c2f3,
-0xa045df2a,
-0xce65d3ce,
-0xd61a9294,
-0xfd7b3fdd,
-0x42c13d62,
-0x7e87e222,
-0xed2c5e20,
-0x2b19d4ab,
-0x874dbeba,
-0xc1dd586b,
-0xd60bc6e6,
-0xd84f5d29,
-0xe332dfb3,
-0x91f572ed,
-0xe151fada,
-0x791feda4,
-0x9606eee0,
-0xc19d813d,
-0x757a0a22,
-0xf3d601ec,
-0xd9175522,
-0x656da24e,
-0xe253425c,
-0xc1d785f8,
-0xed1f4d3c,
-0x43474b17,
-0xfc359c41,
-0xc5068790,
-0x114e7d58,
-0xb1e0693c,
-0xd92baade,
-0xebc0ec49,
-0x2dd672c0,
-0x3f9ac6de,
-0x2e0a166f,
-0x6e8bdaed,
-0xda94c30e,
-0xcdf02f8c,
-0x43d9dda6,
-0x4a6baeb0,
-0x3f2382d6,
-0xbc759da8,
-0x2e3601c3,
-0x56a4b614,
-0xd34d6ef7,
-0xe17569fd,
-0x1cde4fed,
-0xa3c6be73,
-0x770919d5,
-0x448f24e6,
-0xa21c3876,
-0x80ff6c48,
-0xc8eca7d1,
-0xab868eaf,
-0x1c7eaa22,
-0x8e8c9b6f,
-0x37610851,
-0xb9052511,
-0x2235ec62,
-0xf59d30d5,
-0xd4f09bc3,
-0x2b9bbb39,
-0x68965dbb,
-0xda36b2d3,
-0x659591d2,
-0x8b6e60a6,
-0x74a7267f,
-0xd27cc8ae,
-0x2f60d81b,
-0x019b506f,
-0xf13cd673,
-0x7dad58b2,
-0x491a0566,
-0x42c2418b,
-0x0565c74c,
-0x53eb363c,
-0xa0f9716e,
-0x80fc5629,
-0xcad03e0e,
-0x52eb5e6a,
-0x780f26a1,
-0x22a22734,
-0x135ff60b,
-0xf973dbe0,
-0x306c9642,
-0x2ad4f2c3,
-0x698c05bd,
-0xcf776cdd,
-0xe4f2cf0c,
-0xe4afbb1f,
-0xac395092,
-0xe34f1554,
-0x7c964590,
-0x833248b7,
-0x06a7d950,
-0xe2c7373c,
-0xaf67d476,
-0x5f2a28bc,
-0xcb633926,
-0xef7c37b8,
-0x52964916,
-0xb7b70845,
-0x441c01ad,
-0x6fef39b6,
-0x14f3a164,
-0x74ef27f6,
-0x33c7cbbc,
-0xbc88c920,
-0xc0a957b3,
-0x8b13ce3b,
-0xac627edc,
-0x869c4120,
-0xa2bea077,
-0xc063bbb4,
-0xf6ef5199,
-0xc7ab33e5,
-0x5e7a494d,
-0xa5d7bc68,
-0x6b97dcaf,
-0xb4f31d43,
-0xf92c221d,
-0xab48dec0,
-0x4f2260bc,
-0x53a35e60,
-0xd35dda86,
-0x89f1c55a,
-0x62e488d4,
-0x29a5ce72,
-0xe0f1aec8,
-0x6b74efa7,
-0x2740dd85,
-0x2ca2d6b8,
-0xf8fb18b8,
-0x782d7922,
-0xa53dc422,
-0xde77a470,
-0xf8fbac7d,
-0xf25dab61,
-0x0329420c,
-0xacd56e72,
-0xfa13ae4c,
-0x6a67685d,
-0x3f40d729,
-0x14402a95,
-0x9234f6e8,
-0x6fce09f5,
-0x8705e213,
-0x6d03c949,
-0xb0828afd,
-0x1389ea78,
-0x8dca0937,
-0x5455d973,
-0x951d0715,
-0xb08c08f7,
-0x70318776,
-0xa9e131bb,
-0xec48ebe6,
-0x061306e6,
-0xbb83f918,
-0x0460e1d6,
-0xd421b9bd,
-0xe0fbc016,
-0x14276fa5,
-0x666f05c6,
-0xd51598d2,
-0x36023730,
-0x538ea166,
-0x4cd82513,
-0x3ce58143,
-0xdeab5d51,
-0x4adf4666,
-0xed01aec8,
-0x43572cdb,
-0xad1fd1a8,
-0x9403d896,
-0xe6939490,
-0x2b0fafed,
-0x7b717957,
-0x82170740,
-0x886d1273,
-0x7ea299f5,
-0x3ea5822f,
-0x740acaeb,
-0xf7f3559a,
-0x28bdbedb,
-0x5a1aee23,
-0x922d9408,
-0xe497e405,
-0x2bf4489e,
-0x108c5627,
-0x8bfbff5f,
-0x03efb5b7,
-0x6c278b95,
-0x3702b16e,
-0xde8c24d0,
-0x586df014,
-0x3559ef3b,
-0xe772a113,
-0x59c50d2e,
-0xf177c3e7,
-0x027c2247,
-0x1747639f,
-0x0cec7112,
-0x07b034cb,
-0xa03df7e7,
-0x08021d74,
-0xb2d6e4c5,
-0xbbe12182,
-0x987ee0c9,
-0x64d98e2b,
-0xd5a91464,
-0xa82c4dd5,
-0x4cf5a49f,
-0x411c64a2,
-0x5996cfc3,
-0xdc154123,
-0x11538973,
-0x3f068765,
-0x1c96c60c,
-0x3704282d,
-0x1b123346,
-0x806f2ec1,
-0x61113000,
-0xdd664a36,
-0xa3155bc7,
-0x324d44dc,
-0x2f3f5422,
-0xc3c14e70,
-0xc8c1fc5b,
-0x08ec858e,
-0x42ef9e6d,
-0xfb999b18,
-0x6e2ccfba,
-0xd0249407,
-0xb037ad7b,
-0x7d26d264,
-0xd930518d,
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-0x3fe321a2,
-0x00167896,
-0x3a103adc,
-0x0bf693eb,
-0x0705dc7c,
-0x6c2ebabb,
-0xef5ea090,
-0xfb818299,
-0x1462e032,
-0x268e58d6,
-0x5116c318,
-0x70aaabb2,
-0x87ebae8b,
-0x0244aab2,
-0x07497479,
-0xa4566efd,
-0xa17a4462,
-0x871a18ef,
-0x7ff3ebc7,
-0xe9bf73a0,
-0x337fb30d,
-0xf3e68cb9,
-0x95fda1e8,
-0x5750b9c5,
-0x5a33b699,
-0x4410fe22,
-0x985ee3f2,
-0x27bb27c1,
-0x44757f8c,
-0xe851a5d3,
-0xa03dbb3c,
-0x4a3365d3,
-0xa6e3ccf5,
-0x97ff37eb,
-0xd8ea5bc7,
-0xad8f2ba8,
-0x03d2b93e,
-0xffbef924,
-0xb56446b6,
-0xab726d16,
-0xe74c50f3,
-0x73de21ed,
-0x704cc4f6,
-0x1f35dc19,
-0xec66b494,
-0x4ed3986c,
-0x4f424ba9,
-0xb31c9dc3,
-0xab99b7a8,
-0x977c17cc,
-0x51a48ee0,
-0xba47c56b,
-0x95436b46,
-0x04d94b19,
-0x71d156ed,
-0x3ac8964f,
-0xd6bae400,
-0x967966c5,
-0x0453b242,
-0x8e11a87d,
-0x3569cae2,
-0x1b9c99e2,
-0x69274776,
-0xf9cc0fe2,
-0x04650339,
-0x1e0e2c4c,
-0x4ae1e105,
-0x8d035f83,
-0xc7b4bdd3,
-0x559fcdcc,
-0x7bc329c0,
-0x545688d6,
-0x7ae11de5,
-0x44a5b6fd,
-0x1ea2597c,
-0xe0da25ac,
-0x54b20591,
-0x1ebf2734,
-0x6f5ceab4,
-0xaf977e3d,
-0x7c2f428f,
-0x24ac5b67,
-0x027084ab,
-0x213a1356,
-0xdb1c515e,
-0x53861d1c,
-0x9c0a86cb,
-0xf18d1174,
-0x42d6c33d,
-0x76679ea6,
-0xee45c1be,
-0x4e0ba122,
-0x9acbec0d,
-0x628a0dc6,
-0x0446324a,
-0x0bb379ea,
-0x7900bdbe,
-0x58ab45d6,
-0x155a12c4,
-0xe43c73ac,
-0xa5a6f292,
-0x43765290,
-0x39703b99,
-0xfb7e6a88,
-0x9f969e82,
-0xa1aa65f6,
-0x100028e8,
-0x181ce2f8,
-0x33868a11,
-0xcdcf0408,
-0x514609bd,
-0x16742f83,
-0x289d08f5,
-0x95d3135a,
-0x351d2550,
-0x65dc17f6,
-0xf52712b9,
-0x6c7fd366,
-0xae59d5bf,
-0xf7d51a31,
-0x766e7416,
-0xa06920f0,
-0xf031c1de,
-0xfb3a4976,
-0x40a2af48,
-0xf5df39d3,
-0x67b487f6,
-0xe1755089,
-0x6831d28e,
-0xab744aeb,
-0xe70e6833,
-0x64c975d7,
-0x3ee711ba,
-0xfe93e3fe,
-0x958b449f,
-0x6058a027,
-0x495936ce,
-0x957e0022,
-0xb4068279,
-0x200f8c77,
-0xd0ddcc21,
-0xa43afcd9,
-0x55adc2c7,
-0x203826a3,
-0x57bfc79b,
-0x58580229,
-0x8a98d2d6,
-0x88ea3f08,
-0xf67fa34b,
-0xeee366a0,
-0x010f4972,
-0x08a73c36,
-0xaa8dd893,
-0x5339c0cd,
-0x9df9f85f,
-0xbbeb2c1d,
-0x044e5914,
-0x6cc0ab86,
-0x30aa4cb9,
-0x8ef89a9d,
-0xafbf0472,
-0x5b4ebbc0,
-0xa3508118,
-0x44a04aad,
-0xd9f8fb66,
-0xab5a1ea8,
-0x3ac941cb,
-0x1aaaece6,
-0x1b0812cf,
-0x75278158,
-0x4b220690,
-0x4f330cf0,
-0xae155ea7,
-0xb5dde032,
-0xf2a878eb,
-0x24f867e8,
-0xdfdeeef7,
-0xce2d9f03,
-0x51695022,
-0x0b18d323,
-0x4c417c58,
-0xd665bc64,
-0x427de71e,
-0x48b0a713,
-0xcaf023a3,
-0x685322f2,
-0x78aa9d2f,
-0xdbf34911,
-0xc1d65a83,
-0x101f3ae6,
-0xd46ecb54,
-0x1a680c81,
-0xd02425fe,
-0x64c5b69e,
-0xfbb8ca68,
-0x2ac7ebc2,
-0xa0529352,
-0x9d28274b,
-0x2b84de88,
-0x07b053e1,
-0x1127f539,
-0xab69afda,
-0x8840ac73,
-0xb4346346,
-0x183942ec,
-0x1c88f09c,
-0xf6e5984c,
-0x0296970e,
-0xa730203f,
-0x1b647133,
-0x446e9d21,
-0x27c3f376,
-0x47e1dd28,
-0xd732cc0e,
-0x3381083f,
-0x3230f37c,
-0xf805f37f,
-0x348032e4,
-0xaa5ca983,
-0xb3dd21bc,
-0x48c78e23,
-0x3330c0dc,
-0x1955aeac,
-0x0e9ca4c0,
-0x9d210113,
-0x852cf856,
-0x9aa1f2e8,
-0x7901f677,
-0x359f71a5,
-0x96ff5a29,
-0xf9c13fea,
-0x0ae4bc4a,
-0xa93c42e1,
-0x94fe2d3b,
-0xe83395ee,
-0x61a002f4,
-0xdbe7af92,
-0x67bb34d0,
-0x51a9d66f,
-0x0375cdd5,
-0xb618ceb2,
-0x77c9d5f9,
-0xa5de79e9,
-0x4d23889c,
-0x8119cae0,
-0xde62a9e7,
-0x7bb0326e,
-0x79a44dfa,
-0xc1e86dba,
-0x4ca7e2e6,
-0xe149a07c,
-0x090691ce,
-0xf73a5e14,
-0x2c939d4e,
-0x2ae4a412,
-0x13192f64,
-0xd80fff6d,
-0xea1b3162,
-0xa7056847,
-0xf5ae3d79,
-0xbb28a344,
-0x09cc67f0,
-0xc15d4016,
-0x59c054e0,
-0x3fa74496,
-0xd4124c19,
-0xaf138730,
-0xe47b1a7a,
-0x1a884532,
-0xd000e9da,
-0x471412c1,
-0x147502b6,
-0x7a1660b6,
-0x82534fe0,
-0xa8bc4796,
-0xfc227932,
-0x272c8814,
-0x8d6230d1,
-0x8394e950,
-0x9888bf70,
-0x53caa038,
-0x236f8409,
-0x802b52f7,
-0xf9dda17d,
-0xd015655d,
-0xeda5ac38,
-0x34f0aa8a,
-0x337941be,
-0x888b34f5,
-0x72ec3cb4,
-0x9e580415,
-0xfcd25747,
-0x4989b075,
-0x18da1688,
-0x73f25a46,
-0x7687936b,
-0x6a3b7c71,
-0x42548a80,
-0xab6dd98f,
-0x8b99037b,
-0xc6a479d5,
-0x32c193de,
-0x2b8c0e2b,
-0xcf57aad5,
-0x006a512b,
-0xa4de6868,
-0x6c8cc7b7,
-0xe2a7bab7,
-0x2a794334,
-0x527ef7e1,
-0x7e93d62a,
-0xadad057c,
-0x3db7624b,
-0xcad91953,
-0xd50eeb52,
-0x0af8a442,
-0xf059c351,
-0x5e3e6e8b,
-0xa828492f,
-0xa5b3f306,
-0xde945e22,
-0xfe2e4ec3,
-0xe0be07d1,
-0x328b47c9,
-0x0eb783cb,
-0x514c3460,
-0xdd6a1786,
-0x2e45084f,
-0x52e93c02,
-0x569e8b2c,
-0x8f9d5186,
-0xe02a2c69,
-0x0d22f496,
-0x6a0ecd86,
-0x9ddd3272,
-0x55d31906,
-0x420c3ce4,
-0x7d265168,
-0xae941340,
-0x5efc716b,
-0x1ae5807b,
-0xc1723e3e,
-0xfd13067c,
-0x084f6f3d,
-0x319f1870,
-0x371281e0,
-0xcfaa9be9,
-0xef6eaf59,
-0x5bbef834,
-0xca4abd4b,
-0x770b42f8,
-0x65a0978f,
-0xb5c6e5c6,
-0xfe3d88c8,
-0xfd390094,
-0x5edccacd,
-0x2a32089c,
-0x3e0b75b3,
-0x9ed8b43d,
-0x902b4841,
-0xc93c29b0,
-0x5dfdc60c,
-0xa5992f7b,
-0x3f8e2087,
-0x9b020b73,
-0xec89b872,
-0x62fdb410,
-0x93e4f3ea,
-0xbac1969f,
-0x5741be5c,
-0x40d2d37d,
-0x8a849248,
-0xee3ad934,
-0xf6123d83,
-0x3a089cc8,
-0xca727824,
-0x246f0afd,
-0x92507ae3,
-0x2cc38b87,
-0xf987fbf3,
-0x495e0b87,
-0xf67adcd8,
-0xcfe4daa7,
-0x56d36fbb,
-0x975d2b57,
-0x9dc1bd1b,
-0x4846eb77,
-0xb0138075,
-0x4e3319c3,
-0x8b9d4fb9,
-0xa67a0fe3,
-0x141e9eea,
-0x492c41d7,
-0xe220704d,
-0xc0d5d8f1,
-0xa8803aeb,
-0x17a50b06,
-0xcdbd6701,
-0x36f7bae9,
-0xa6c20c16,
-0x65e9bfa0,
-0xbfb3d033,
-0x992fabb1,
-0x6e03d495,
-0xf74dfc5f,
-0x315b55be,
-0xfd64fb56,
-0x05e2308a,
-0x73d7fc69,
-0x4efdde3c,
-0x726dadc3,
-0xa3f77807,
-0xab0e2697,
-0x4df964c2,
-0x1aeae61b,
-0x0c31cac9,
-0x59839a03,
-0x4e608ffc,
-0xfd22613f,
-0xc8f5a727,
-0x4957c602,
-0x0e47be91,
-0xc162e167,
-0xa1dad6d1,
-0x75c71f26,
-0xbc753e3f,
-0xbbf11df0,
-0xd2386c67,
-0x9f7a8eeb,
-0xcd3caa2d,
-0x4f959ab3,
-0xde0724f1,
-0x5123451b,
-0x918cdd38,
-0x5e25767c,
-0x06c875cd,
-0x62a7ee1c,
-0xdba3d459,
-0x39c40d95,
-0xbc5d0d9c,
-0x6bf076b3,
-0x29dd7162,
-0x76b8006c,
-0x9f078d38,
-0xb5fde1eb,
-0xe48d0eae,
-0x80e414b9,
-0xd317cdc5,
-0xa0f6f61e,
-0xd4e1397f,
-0xd070d5c1,
-0xc2e6ef6c,
-0x8a409d6c,
-0xca351426,
-0x201f1296,
-0x9e250041,
-0xa5dd4609,
-0x165d2f3d,
-0x0c5c7e6c,
-0x3096076b,
-0x5ca1bc2d,
-0x62cbd77c,
-0xee062a5c,
-0xc4dcb3a6,
-0x1ff42f9d,
-0xfb9639fe,
-0xed699746,
-0x4bd70787,
-0xc333570d,
-0x9bb9c0fd,
-0x7f13858d,
-0xf3b1ab3e,
-0xd2e507d1,
-0x3935a24e,
-0xea5dd9f5,
-0xdfb8e5be,
-0x646989a7,
-0x91c37a3a,
-0x78d42ed3,
-0xb882396f,
-0x6fb19e89,
-0x4e58576e,
-0x69e1ea51,
-0x37113de0,
-0xad45f1cd,
-0x04a4ba1c,
-0xdc61f889,
-0xeee8392f,
-0x6ea06613,
-0x704b5793,
-0x3dfd7aab,
-0xf44d83f3,
-0x019796a4,
-0xb98b8ce1,
-0xdd860175,
-0x2a20b503,
-0x90764474,
-0x8b77f746,
-0xe0943ea3,
-0x3c0a315c,
-0x9fdac5c2,
-0x4e139981,

soc/intel/baytrail/M0C3067_0000031E.h

diff --git a/soc/intel/baytrail/M0C3067_0000031E.h b/soc/intel/baytrail/M0C3067_0000031E.h
deleted file mode 100644
index 021303d..0000000
--- a/soc/intel/baytrail/M0C3067_0000031E.h
+++ /dev/null
@@ -1,3264 +0,0 @@
- 0x00000001, 0x0000031e, 0x11222013, 0x00030673,
- 0x74f7a834, 0x00000001, 0x0000000c, 0x0000cbd0,
- 0x0000cc00, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x000000a1, 0x00020001, 0x0000031e,
- 0x00000000, 0x00000000, 0x20131122, 0x00003211,
- 0x00000001, 0x00030673, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x000032f4, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0xbf565d55, 0x38258339, 0x8e14da75, 0xcef7e34e,
- 0xc193245c, 0x55ecc05b, 0xc9fc0973, 0x4179db61,
- 0x156866db, 0xc4bf175a, 0x9d00ca4f, 0xb3e89a09,
- 0x7d2c8e19, 0xbf5b667c, 0x7a1a7ac0, 0x26eebc7d,
- 0xb2967286, 0xceb685c8, 0xffba02e6, 0x144b5468,
- 0x00c428c9, 0x6d15dd3a, 0xf9461953, 0x1632a092,
- 0x222335da, 0x1fee67d9, 0xa770513c, 0x4e83def6,
- 0xb3d82e5a, 0x50f0b89f, 0x7fe10d45, 0x70f05efd,
- 0x5f575449, 0xab71a0a3, 0xfb2a6eb5, 0x0283b4e2,
- 0x58a95566, 0x38a4c957, 0x8a682f1b, 0xc49b3009,
- 0x1256e90b, 0x33169c52, 0xd91585c4, 0xdf78eb29,
- 0x9f403399, 0xa9de58da, 0xfd05c858, 0x5a0f11bc,
- 0xc00e7840, 0xb39bd56a, 0xb87f38c7, 0x90141c59,
- 0x325933f9, 0x0b0e1332, 0x963c4bef, 0xf203d9ac,
- 0x3925365b, 0x2955f8e7, 0x1fc417cb, 0xd840e4e7,
- 0x25e9f7fa, 0xfb769b96, 0xc7b8da5e, 0xe81200f0,
- 0x71291c12, 0x5989b1e5, 0xc007fdad, 0xd7c9091f,
- 0x6a008197, 0x73005539, 0x6d8b436c, 0xbc606f43,
- 0x00000011, 0x86993075, 0xa33cfcf4, 0xe2d2093a,
- 0xe90654b9, 0xafc52cbf, 0x6fc74f97, 0x7ec453f2,
- 0x68ccbefe, 0x3072632e, 0x8a3c8d5e, 0x56e783c7,
- 0x80413013, 0xdb88d19f, 0x3eee9c5c, 0x58c22561,
- 0xbb8d3c3f, 0xc2986d1e, 0xf0093f8c, 0xa4e7a5c3,
- 0x8fc985d3, 0x2ec0ab20, 0x442352b2, 0xc4f77bb6,
- 0x0a7b03c5, 0xced18a78, 0xf8e1c50a, 0x0cdc3b59,
- 0x2c27a9a2, 0x216806f2, 0xcf8f473c, 0x7055a7e6,
- 0x577666e7, 0x1bccfe0a, 0xad5ba35b, 0xc85a588c,
- 0x24969d58, 0xa853807c, 0xc772ccd5, 0x23f8d2c6,
- 0x3dd86fd1, 0x0a7f79da, 0x48d24f9f, 0x77124fe8,
- 0x560f48a3, 0x3c8d81a2, 0x03625f3b, 0x731115cf,
- 0x1f1e0bd4, 0xd15c2153, 0xdaad219f, 0xbdd34cfd,
- 0x9e3243ef, 0x18a1af49, 0xb0a09da3, 0x6aac90b4,
- 0xff81f7de, 0x5ae08902, 0x50266ca0, 0xc49cb4ca,
- 0x46800b68, 0x92a53246, 0x09a06ad3, 0x98ef4ee1,
- 0x1948db9d, 0xa9d0b2ff, 0x6de1ac47, 0xc046718c,
- 0x6c75d258, 0x05f50508, 0xff8bfd9d, 0x9c983218,
- 0xe985d80a, 0xd5150d95, 0x849d9f3a, 0x14a0d62c,
- 0x910c96b6, 0x28d928fd, 0x588e810d, 0x943e2a5c,
- 0x3b708745, 0xab500fa3, 0xc0ba8b55, 0x01cfa928,
- 0x44f5b28e, 0x1f5b259b, 0xb23e7f84, 0x6923075e,
- 0x7c9fdc17, 0x0a57f37e, 0x25f0bb5a, 0xdf279dfe,
- 0x8d7dd592, 0x7912f993, 0xc1230b8e, 0x5c92b024,
- 0xfd27e2e0, 0xd97f0c6d, 0xcb1c2eed, 0xd8152ed4,
- 0x3e6bad99, 0x89db6805, 0x34bd18fc, 0x5c32216d,
- 0xfe576b83, 0xd2cd9ac9, 0x97565c05, 0x86b76584,
- 0x717e8c24, 0x06a319bc, 0x6b8cacdc, 0x23c04fb1,
- 0x2cbdcd44, 0xd89b5b25, 0xefda5b50, 0xfebb39cf,
- 0x63fc7bdf, 0x4fe10275, 0x85ca5ff6, 0xf7d31164,
- 0x7a816ce0, 0x95a0cda0, 0x2e52d3c3, 0x6278d12c,
- 0xc60214a7, 0xeb8dccdb, 0x32eaa1b1, 0x3f58010f,
- 0x4609b2d6, 0x21dae3f5, 0x52f5a2dc, 0xf177d7f6,
- 0xe6fc6feb, 0x398452ff, 0xdd2d2e59, 0xd141d83a,
- 0x63d668a5, 0xc6699704, 0x29228486, 0x2c6c0735,
- 0xf8ec4b50, 0x3c9bbf79, 0xb94358ff, 0xb8f374bc,
- 0x69a925a3, 0xc6b63a6f, 0xa1eeac6b, 0x5a095548,
- 0x64e192e9, 0xfcea6763, 0x71fa834a, 0xca198982,
- 0x3e673a02, 0x334317ba, 0xde290c6d, 0xd6015a36,
- 0x0acc939b, 0x2dfd1002, 0xc4801626, 0xf97f402d,
- 0xd93d8c86, 0xfbe850a6, 0xc0f63d6e, 0x9063896d,
- 0x4f60d190, 0x947b9ad5, 0x30ae46f9, 0xbb853e58,
- 0xc37d022f, 0x2943a03e, 0xe3c3f1e1, 0x7b2f1307,
- 0x946ed0d9, 0xe4a4332e, 0x6d5cab85, 0xa29a3f68,
- 0xe7f03b6a, 0x5cbf1811, 0x7e1de6c5, 0x28ffaa18,
- 0xba92f8e2, 0x9980918b, 0x72ddf15b, 0x5964cea2,
- 0x1bc3734e, 0xfecee901, 0xeca35041, 0x79407d1e,
- 0xb3c9abbc, 0xe17fc624, 0x9aff0689, 0xa27a353e,
- 0xa42c890f, 0xa6f9598f, 0xfd2bd5da, 0x576c8b70,
- 0xda028ac6, 0x10d7ffc8, 0x8a5d424c, 0x213195ee,
- 0x24533e0d, 0x4057825a, 0x0d476585, 0xe15cd557,
- 0xf77787e4, 0x682d7bf2, 0x14c08836, 0x51473972,
- 0x7f8333df, 0x0f9613b0, 0x1a760778, 0x4dc1b5d1,
- 0x06a1a134, 0x788904d8, 0x65e62607, 0xf58b4e41,
- 0x2cd54b64, 0x30e0226a, 0x97e39de5, 0x03029535,
- 0x298be450, 0x15ba4051, 0xf8d95dbd, 0x90ac7352,
- 0x75c126f6, 0x0bd61e6e, 0xc5cf5c44, 0xcc921f68,
- 0x89948225, 0xf5adbbff, 0x47472423, 0x3ec39457,
- 0xde8bbde1, 0xc4a5f48e, 0xd6c6b31f, 0x6d977d5e,
- 0x03a00c06, 0x7ead487b, 0x5e9a5be8, 0xb7d2fee3,
- 0x50ae2479, 0x0094f50c, 0x2e1fe01c, 0x60a7e74e,
- 0x73ede666, 0x172eb04f, 0x99735f29, 0x045140d7,
- 0x51f1d74f, 0x0ba058fc, 0xd043447e, 0xf655353c,
- 0xc5667d4d, 0x57e0acc6, 0xc7b01b29, 0xaa867411,
- 0x92d759b9, 0xcda67ed4, 0x4b6140c7, 0x19273ea1,
- 0x63b03909, 0xc07793ed, 0xde39ec06, 0x316e6070,
- 0x1c33f0f5, 0x1d1904ae, 0x1cd7c500, 0x687b30df,
- 0xd14d5602, 0x9c02fd14, 0xb75480c1, 0x7002f6b0,
- 0x2a6b7e2d, 0x9dc8208f, 0xc1427074, 0x5101e312,
- 0x1a346f36, 0x57510e13, 0x155c4b21, 0x2aa942ec,
- 0x079bfa9d, 0xdab867a2, 0x9bac8fea, 0x75ec8c01,
- 0x50d9cf16, 0x7113908c, 0x79b74b0f, 0xcbeafb52,
- 0x337396cf, 0x0a826b1b, 0x59e36435, 0x44680dbc,
- 0x6d6c23cb, 0x432d3c7a, 0x57c0fb67, 0xf13f0fe5,
- 0xb825a278, 0x664ad9d2, 0x0ec9e15f, 0x93e0a0d5,
- 0xc87f0dac, 0xda407a74, 0xf65670ab, 0xcdad17a1,
- 0x070cd828, 0x4fc961fa, 0xd732eaed, 0xa1d5832e,
- 0xf8100a82, 0x7df6daea, 0x20846dc8, 0xa72a2dff,
- 0xf82e1ef6, 0x1ff8bef2, 0x6c80161e, 0x9d5559bb,
- 0xb770aeda, 0xd080ff65, 0xe4abd3ef, 0x75583652,
- 0x4c14a25c, 0xcca4a73d, 0x0e58bf7d, 0xec3720cd,
- 0x1b558e5c, 0xb48ca16c, 0x77b603b3, 0x487a32d1,
- 0xf6d041a9, 0x165c6872, 0xc8a08b2a, 0x9fb8edef,
- 0xaf096381, 0x02a6f39a, 0x0869a696, 0x8a3cb00a,
- 0x851b951f, 0x477568e2, 0x732e6d0f, 0xf356b0d1,
- 0x398e48f4, 0x84e44a65, 0xe02b9b01, 0x14b0fc90,
- 0x0f09cee2, 0xcfd7ff9a, 0x5da0ed16, 0x4be7d666,
- 0x046f24ca, 0x29c92cba, 0x3dd830f7, 0xeef21118,
- 0x0c939afa, 0xd2d9ce88, 0xf021a60f, 0x59fd537b,
- 0xabef3ae8, 0x9fcd742d, 0x66a44a16, 0xb0f6040c,
- 0xd7fb9687, 0x6ce92a37, 0x5730d84f, 0xd766b94d,
- 0x2aec6c41, 0x452e4867, 0xe9374196, 0x3cff49f7,
- 0x4d2ce871, 0x1f03bb3f, 0x8117859d, 0x5b22b7eb,
- 0x327a0daa, 0x2d768d48, 0x543edd6f, 0xc76ceb41,
- 0x814430fb, 0xcea0d50d, 0x5fba5606, 0x9465fad2,
- 0xc84afa0c, 0x8af94721, 0xded00da4, 0xb8c2a217,
- 0xd4329a8b, 0xc6fbff61, 0x8a82ec7e, 0x4ce636d1,
- 0x4ba0d496, 0xc2a3bca0, 0xa5c3de9c, 0xd0caddc2,
- 0x5d2ff620, 0x7e6a71d1, 0xcb737271, 0xa0e15773,
- 0xad2336ab, 0xbcb621d6, 0x5f94ff6f, 0x393389f8,
- 0x7cc193ac, 0xcb096988, 0xbe5cf2b4, 0x474a4bd9,
- 0x43002571, 0xc4aad175, 0xe158db6d, 0xae279b66,
- 0x8f602d13, 0x3a4676bc, 0x32cb5292, 0xb0d10113,
- 0x00762103, 0x99c14c73, 0xebb942f5, 0x08a6057d,
- 0xf0c627a2, 0xa42b0a0e, 0x142935e7, 0xec8dae9f,
- 0xf553ca4d, 0xb9b970c7, 0x79cf447a, 0x1068309f,
- 0x33f30b5f, 0x3b48c9ac, 0x4f5532a9, 0x8256a232,
- 0x4153b2c9, 0x0bfb6fa7, 0xf61bf515, 0xd6abea3c,
- 0x6b173626, 0x48ce76f3, 0x2fcedf48, 0xce1bc025,
- 0x42877895, 0xb8a16b22, 0x26f02443, 0x738ccf03,
- 0x5d5ffb79, 0x99b16976, 0x66e091a1, 0x8587212c,
- 0x00a97256, 0xfd0e0fdc, 0x0723b790, 0xf7f575d4,
- 0xb5f7d751, 0x212243f2, 0xa84cd6dd, 0x91522ffe,
- 0x20332a82, 0x8f48e87e, 0xa027aefd, 0xc03bd1cb,
- 0x5d447f67, 0x7a339206, 0x675bebdf, 0x888b3050,
- 0xca347b8d, 0x7b49125c, 0xb07a9d19, 0x7c82ae14,
- 0x2207d582, 0x303f0d6d, 0x19b0ff02, 0x1204bd7a,
- 0x80194ae2, 0x15837433, 0xd2b75746, 0x48628cc3,
- 0xe95b7954, 0xe65d6066, 0x976511bf, 0x71b1a28b,
- 0x112327ce, 0x7ab110f1, 0x712a4ae4, 0x8b6579be,
- 0xc7e41aaf, 0xec7612fc, 0xd944cf82, 0x71dc2570,
- 0xf60d242b, 0x25420024, 0x2bb993d5, 0xac610b44,
- 0x69a74965, 0xc35d2cf5, 0xb664579c, 0x12235fc6,
- 0xb2add3c6, 0xabf28f79, 0x06d0673d, 0x6115a988,
- 0x96bdc9dd, 0x82652c0c, 0x65b46776, 0xf9a092ea,
- 0x94a68326, 0xe06cdf2c, 0x3b0b0726, 0x8c6c3155,
- 0x5395a32c, 0x264d5df1, 0x2871a700, 0x5db44aa7,
- 0x559ec6c6, 0x44239073, 0x2f447ab3, 0x4e653dba,
- 0xf8d13b24, 0xbe6876e9, 0xe554f09f, 0x7417038a,
- 0x661d180f, 0x28f9bee9, 0xf52554cd, 0xba49438a,
- 0x722ded7b, 0x746f9af8, 0x506016ef, 0xbfcc654f,
- 0xa0239098, 0x632210ad, 0x736327aa, 0x24fa32fa,
- 0x546e11a8, 0x368dce69, 0xc2575152, 0xfa7553f4,
- 0x168587d9, 0xf3363136, 0x9b21fdb6, 0x470da9ca,
- 0xd966f45a, 0x6005a5c9, 0xfe049c3f, 0x5e046cb1,
- 0xc2f7a9d6, 0xe2231756, 0x84b3a264, 0x87465041,
- 0xfaad0fa1, 0xd1c7db7e, 0xd3c841bd, 0xb0662cf5,
- 0xc55c0a13, 0x96e17ff7, 0x43ad1176, 0xc54a004c,
- 0x831ab6cc, 0xb105bcee, 0x6ac775f7, 0x3ce6e9f8,
- 0x9ef4be5a, 0x5fb00a50, 0xc1e8fc9d, 0xf2b477b5,
- 0x5582ed32, 0x2233589e, 0x89451382, 0x99b90862,
- 0x9e723e59, 0x588bd1de, 0x24f14032, 0x717b283f,
- 0x50687dfd, 0xf44d0a3b, 0x5f34b24f, 0x7c90c3eb,
- 0xab492f12, 0x6c17c5df, 0x3e032a7d, 0x04a7be72,
- 0xbbde4b51, 0x75c94238, 0x28bd23b2, 0xbd29ff15,
- 0x07c88cd6, 0xcb700a03, 0x8144797b, 0x64dc5773,
- 0xeaaaa475, 0x16c067f4, 0xc969dacb, 0xaa44f5e7,
- 0xc8d0fb40, 0xd704a0c5, 0x147a0259, 0x41f6f5e4,
- 0x2c48783d, 0x128136cd, 0x9f80dc76, 0x5e0361ff,
- 0x00c35d51, 0x2e1b514f, 0xde5d5043, 0x18ce853d,
- 0xa0d558b1, 0x40097904, 0xdbeaf286, 0x5d0b2f1c,
- 0xa7b18014, 0x0ab263c5, 0xd37631f1, 0x3aeac13b,
- 0x89df6a10, 0x8ac84f4d, 0x5efb988d, 0x1f4c0268,
- 0xa06a0f98, 0x375cd54b, 0x78f055e1, 0x46adb311,
- 0xd8873808, 0xd36c1612, 0x827753a5, 0x405bbcb8,
- 0xe5d855c8, 0xeb1fabd5, 0x9a08ef70, 0x88b129f0,
- 0xd396b665, 0xd86a4dc5, 0x463de483, 0x9ec23564,
- 0xeb5837bf, 0x14245ae2, 0xa9371691, 0xcce16dd5,
- 0x3add57e6, 0x5cff6cc6, 0x53a5b3ca, 0x006ee895,
- 0x277ac692, 0xcc85f79f, 0x4391ff7d, 0xc82a4ef8,
- 0xc39a8858, 0x11250b8c, 0xff865fa3, 0xabe983c2,
- 0xe42ebe4a, 0x02e602d2, 0xdd97b804, 0x0f02afae,
- 0x84ca5924, 0x68e1cad5, 0x9d2917f9, 0x36ab7bfd,
- 0x057a6e8f, 0x63f04ac6, 0x734b3414, 0xc0949d4f,
- 0x546cd09b, 0x102ae615, 0x34ebf1b7, 0xb480e6dd,
- 0x14255ee7, 0xf0ea12d4, 0xad4fe81e, 0xa03d997a,
- 0x61d6038e, 0xd5413dd0, 0x2b64fb8b, 0x52a7910a,
- 0x3818a0f2, 0x4de176d7, 0xbb96c3c6, 0x126fd9e3,
- 0xf307651b, 0x18d29d43, 0xccfb0a65, 0x6c0c1f49,
- 0x1c45496b, 0x80ac25f2, 0x70211f14, 0x120ee80a,
- 0x7fb2f153, 0xbe15c491, 0x29e14589, 0x4449e0a1,
- 0x4edf43fe, 0xc739e609, 0x495e4781, 0x672ed2cb,
- 0x0b76fe85, 0x2a0da259, 0x4c7a15d8, 0xb1fe821f,
- 0x3bc66bc1, 0x5a70d187, 0xe84b8a49, 0x5b16d3ae,
- 0x9c111f6e, 0x0f0e95ef, 0x7d861361, 0xbd3e7547,
- 0xdc9a080c, 0x125c96c9, 0xa97aea0a, 0xeb280954,
- 0xd7e6db61, 0x265e0fdc, 0x4664c0cd, 0x71f23a6c,
- 0xfb9fdca3, 0xd5b39273, 0x5c15d195, 0xf6e6e592,
- 0xbdf61fd1, 0xae5913e0, 0x861e93f0, 0xb01225b4,
- 0x0ec9115b, 0x9c517296, 0xd265fa8e, 0x86b261e4,
- 0xf0692d85, 0x0688a438, 0x06cdebe7, 0xd8e66cdb,
- 0x80cbc6a2, 0x7e8cfe67, 0x71dc6fa2, 0xe5d40de7,
- 0x7cd1d37b, 0x989156a9, 0x407717f5, 0x5594cd9e,
- 0x45a81aa1, 0xfabe3d42, 0x9c2ed10c, 0x1d85491e,
- 0x7a9f9133, 0x2b108ef1, 0xe426113d, 0x2068ce7a,
- 0xf0ccaef6, 0xc116be90, 0x0fe20781, 0xe9f1ae4e,
- 0x1932cd1a, 0xaeaefcf1, 0x3f6f8da5, 0x8233ee4f,
- 0xe7718973, 0x47f870e1, 0x723d61ca, 0x49c9f30c,
- 0xdf2be261, 0x2f1f8038, 0xdddd41aa, 0x16541423,
- 0x9bdd30cd, 0x14decfd4, 0x42c17fc7, 0xb585ebb4,
- 0x19a74973, 0x0f95347b, 0x39e2e844, 0x9942a599,
- 0x1450d405, 0x598cc42d, 0x13028178, 0xd85b2168,
- 0x3388ce9a, 0x063a9580, 0x92565ea5, 0xce1f7243,
- 0x33385a51, 0xfc45ffda, 0xf651de2e, 0x1907507a,
- 0x4d1d07d5, 0x483b37b7, 0xb94e7a09, 0x08d0907a,
- 0x00d1f047, 0xabb97f20, 0x763bda75, 0xcf67244b,
- 0xc6678bbd, 0xcbb8446b, 0x3f16dc05, 0x316ab5ef,
- 0xf824e089, 0x6947935b, 0x3aee38ca, 0x0446562c,
- 0xdde5933e, 0x37f5d64a, 0x4acdee81, 0x2d50aa2a,
- 0x61b554ac, 0x7fcbd2ee, 0x8f247ace, 0x37b1cc99,
- 0x36d53563, 0xa97ec27e, 0x73acf8b0, 0xe30d7fda,
- 0xd3059265, 0x196e0d7f, 0x18376cf8, 0x199f20f6,
- 0x311613b3, 0xa5adb2a7, 0xe97d2592, 0xdf8b5cd7,
- 0xc9362e9f, 0x23947026, 0x4511b634, 0x68da3d9c,
- 0x9b69da16, 0x1f342b1c, 0xf945ded8, 0x1512f7dd,
- 0x2fa63569, 0xf7ed00be, 0x0d1a8544, 0xad1d6d74,
- 0xc7a858e0, 0xa475b809, 0x1bca5970, 0xccc2c1e2,
- 0x6110b605, 0x5c074e63, 0x42c589e6, 0x8f4ca193,
- 0xcad9eb5b, 0x9d3d12a7, 0x2f85b623, 0x1bd8adfe,
- 0x8cda6742, 0x1467040f, 0x36a1aaab, 0xab3bd9d4,
- 0x8c122a00, 0xa066247c, 0x81b517ee, 0x64dc2065,
- 0xa3f5aac7, 0xa2eb4193, 0x5ed75da6, 0x1185e863,
- 0xb918efc1, 0x618de814, 0xfb3a4287, 0x667e7c54,
- 0xdb996d6a, 0xc46017b1, 0x7789c149, 0x1d4ad028,
- 0xad503ef7, 0x4531e48a, 0x7616af7a, 0xa142084f,
- 0x46bf8d11, 0x44205897, 0x94c267f3, 0x2ab7f510,
- 0xa9978502, 0xbc53e506, 0x58659611, 0x57efb750,
- 0x7cc65355, 0x9d22f3bc, 0xc42585b1, 0x0140e7c5,
- 0x141552e0, 0xefd35097, 0xc17010f7, 0xfb3e1972,
- 0x5c341b5e, 0x27a20003, 0xff28cee1, 0x13b06e0a,
- 0xd483f674, 0x7fde4210, 0x6e6eb4d3, 0x9b098e6d,
- 0x8e12948f, 0xc9a763e1, 0xa46f1c98, 0x52dff147,
- 0x6d862dc2, 0xd3828276, 0x9146659f, 0x05fff96a,
- 0x73e3872d, 0xa709f27a, 0x2136d8d5, 0xcf77f275,
- 0x0cedf6ef, 0xc93b7dba, 0x0e2302c2, 0x6473f453,
- 0x8b88bee3, 0xb0baf0b1, 0x2831acec, 0xafa70e75,
- 0xecab6817, 0x09e82b17, 0x78ccd8c2, 0x4718e95f,
- 0x50b8511d, 0xa491b09d, 0xfd83b844, 0x4cc78ba9,
- 0x8bfe99e0, 0xf587318b, 0xdb62b0aa, 0x11f4a06c,
- 0x288b02ef, 0xf7c14b8b, 0x143fca2c, 0x0adf7b9b,
- 0x538ce33b, 0x5a5e1952, 0xa48cffc5, 0x4a62055d,
- 0x38a18dd7, 0x5658c217, 0x4255fe29, 0x2602a634,
- 0x68cb5b0f, 0x9b329e26, 0x1bf83981, 0x99d9cb3e,
- 0x92d7fc6a, 0xb8191fef, 0xcc1c57a3, 0xf755c1de,
- 0x97990946, 0x9e2d6cb9, 0x991941e8, 0x4c37338b,
- 0xb79010ed, 0x8cdf39a3, 0x0f88cfbb, 0xdb885644,
- 0x409d2721, 0x25c54f27, 0xc3eeeeaf, 0x2bf24bbe,
- 0xaececc16, 0x3a82008f, 0xab8b32f7, 0xc29254ce,
- 0xf3e7b0af, 0xe94aa114, 0xf85a2d84, 0x58f44736,
- 0x4fbe9e56, 0xae35cad4, 0x780c27d2, 0xc6da14a2,
- 0x5e26e1e5, 0x37b58819, 0x2cd7c5c1, 0x1d9699ab,
- 0x72ec5cca, 0xfca9a49f, 0xf3667835, 0x4fc7d965,
- 0xe7e3ed90, 0x205bc031, 0x9b19429a, 0x7cd1c7d9,
- 0x4ffea41e, 0x227b953d, 0xc39363db, 0xc62a4f8f,
- 0x288716e3, 0xa4d62686, 0xda15e0d4, 0x8ab98e08,
- 0x1f1e6c80, 0x93b08433, 0x37ace529, 0x8596988d,
- 0xbccb284e, 0x6de275b6, 0xe7bfbff9, 0x500aa98a,
- 0xd229e71d, 0x3c4af83e, 0x2e82a123, 0xc7fd6119,
- 0xc7818ebe, 0xd5e8430c, 0x47f55f2b, 0xd124f22d,
- 0x46478549, 0xb362db78, 0xa4129cc5, 0xd3e114b9,
- 0x8e4df6f7, 0x41198dae, 0x8407ca30, 0xea9fc534,
- 0xdcc72494, 0x99599608, 0x27b2c746, 0x8626e02d,
- 0x7026fb56, 0x1463aafc, 0x707cde60, 0x6df9280b,
- 0x3ba65213, 0xb998e450, 0x1dac9110, 0xfccdddb2,
- 0x094cc73e, 0xf2f94554, 0x90cb96f6, 0x1ca389ca,
- 0x9941f75f, 0x850cd9fc, 0x97b2d2dd, 0xd2291fe4,
- 0xe4dec2dc, 0x47aee389, 0xff12240b, 0x0db4c6c9,
- 0x0a5ae8a7, 0x5bcba24e, 0x2b01d4b7, 0x6b731967,
- 0xb8da5990, 0xc949785f, 0x32100788, 0x7ed8da28,
- 0xfe1ab8d1, 0x30b59071, 0x2285ef9d, 0xe3029035,
- 0x878e5e90, 0xdea2d6e6, 0x2fb1586a, 0xbc307c9f,
- 0x231c7276, 0xc4a1855c, 0x930efb53, 0x1b326944,
- 0x04aac196, 0x4454aeca, 0x608ce81e, 0xc9f37572,
- 0x88b88493, 0xa09b54df, 0x539adbf0, 0xa01880e2,
- 0xac74791b, 0x4322325c, 0xd2bc2364, 0xb27d1575,
- 0x2c1b9559, 0x6ba7a6f6, 0x7cd9ae9e, 0x3d675bb4,
- 0x379bafea, 0x6937110a, 0xa0d1855e, 0x1c430c95,
- 0x339eeb3a, 0x5232ec9c, 0xed3aeb8b, 0x395028af,
- 0x7c0eb026, 0x2ad79839, 0x31f82a68, 0x50e47a3b,
- 0x89042c57, 0x9134a400, 0x531d82ec, 0x02f2394c,
- 0x945c107d, 0x1ac8ccd7, 0x808a9c41, 0x6e748856,
- 0xbf0e0dc4, 0xfb0da0ff, 0xe1cef6ef, 0xb20c765e,
- 0x0971dbc9, 0x7385e9bc, 0xff31df7b, 0xb102e368,
- 0x4277e6e2, 0x10cd8127, 0x89d68846, 0x0f52ac92,
- 0xdd2f427b, 0xc57743a9, 0x48cf5fb3, 0xcaad400f,
- 0x26ef4057, 0x48228b1b, 0xd56d72f0, 0x1a646667,
- 0xcaa87978, 0x53e71f0b, 0x49aca7e6, 0x68ff2a5f,
- 0x678d9abe, 0xbbfaeace, 0xca4a048a, 0xaa594ee1,
- 0xcf0bb1d0, 0xfeb7bc8e, 0xa857fed9, 0xb3578282,
- 0x4fd39f2c, 0xab881286, 0x019ce70c, 0x7896f627,
- 0x26191b46, 0xfe3c78f4, 0xa42e692a, 0x4b9018c1,
- 0xa4066926, 0xde833f4d, 0xc31a2fd0, 0xea28e969,
- 0x5c4a9922, 0x0bf72d6b, 0x59933e6d, 0x01dc943c,
- 0x1d374197, 0xd56d5ea2, 0x616d4f8e, 0xd229da83,
- 0xb10bccc3, 0x2dd41abb, 0x310cda0d, 0x7610d025,
- 0x9887136a, 0x95068a58, 0x41e6ac7d, 0x77137d64,
- 0x6fac6ca5, 0xb8552579, 0xbfa3a1da, 0x2bf9011c,
- 0x7f73d6d0, 0x851731e8, 0x6fdd72c3, 0x4203d860,
- 0xedbdeda2, 0xc545d443, 0x662cf3c8, 0xa8342eb0,
- 0x6bde212d, 0xee46381a, 0xa266ab5e, 0xf68e01ba,
- 0x9e94324f, 0xe72a6d23, 0x589fe187, 0xc7b9f1ac,
- 0x27749e56, 0x1142ad7a, 0x679f17ec, 0x6b7786ad,
- 0xaf0776fc, 0xc48a3b00, 0x021e44af, 0xce05cb34,
- 0x42b833d1, 0x341a28e8, 0x3bd80897, 0xf503615c,
- 0x2835364f, 0x0205bd26, 0xb4437c78, 0x9ad5ddb7,
- 0x0bd1d5b9, 0x0ce0f298, 0xc6c8fb58, 0x2c00ed0b,
- 0xb81fa7fc, 0xf37c3cf8, 0x254b2e8f, 0xc79843c2,
- 0x66cbf695, 0xf880ee7d, 0x58d3165c, 0x32761bb3,
- 0x62caf34d, 0xd7110b0d, 0xa9ced7b1, 0xf1e78a6f,
- 0xde0f1e3d, 0x1b8559f2, 0x2d1d6b61, 0x1e25a62a,
- 0x23890ea5, 0x316851f0, 0xcf81bf63, 0xe432c8ec,
- 0xe2670acb, 0x889b716a, 0xf167d8f6, 0xe2ce3ea4,
- 0x0fdd6105, 0x3ab98d0e, 0xddb76815, 0x5b50d0d5,
- 0x6c72821d, 0x830ec583, 0xd89d44f5, 0xee123312,
- 0x936e96d3, 0x17714540, 0x2bee56fa, 0x8b54f390,
- 0x9ea2fe49, 0xa261f1e1, 0x5fea57ad, 0x3f981865,
- 0x985f3a75, 0xfbc3c0dc, 0xe9a8f17d, 0xea9f23fc,
- 0xd4a9bfcf, 0x55789025, 0xa8715ef0, 0x85fda5f6,
- 0x3d77b64f, 0x71332e1a, 0x5f0026cc, 0xf940a9df,
- 0xd444f5dc, 0x880a4304, 0x2d58ca64, 0xae8f7a5a,
- 0x090e46ae, 0x462cfcbe, 0xa1941852, 0x0e767732,
- 0x5616c715, 0x54c2acc1, 0xfe6d9be4, 0x42e66d3a,
- 0x27c00f86, 0xd3d69e04, 0x1a54bb24, 0xed2552bd,
- 0xf7709214, 0xcb178bcf, 0x41cf0563, 0xa76d7626,
- 0x65be00b6, 0x31afd6ce, 0x791f585b, 0x5d948793,
- 0x20321b9d, 0x976a4abd, 0x8aa576d1, 0xfc286915,
- 0x4c29e738, 0x945b943a, 0x336f9564, 0xc75fde9a,
- 0x8e35d000, 0xb6caf7da, 0x440f9a9e, 0xf9340566,
- 0xdb4a8d36, 0xb92523af, 0x94a359eb, 0xdf4fbffc,
- 0xef523d50, 0x2fb05dfe, 0x59841a0a, 0x7db5d9ae,
- 0xd21b5fb4, 0x89136b25, 0xd4e70ac5, 0xbe4c54a1,
- 0x61224ae2, 0x8c9f1b5c, 0x7b0d3924, 0x2da194ec,
- 0x69919006, 0x7ac94822, 0x7cf741b8, 0xa5f80e5d,
- 0x25c9d226, 0xc0c5dc88, 0xa1a0c252, 0x827991c5,
- 0x8b172a53, 0x9dc39f2f, 0x22379941, 0x042fd018,
- 0xa74f669d, 0x0c91d302, 0x3e686f0b, 0x7a2309e3,
- 0x5f308bd3, 0xa4bd995c, 0xd10569b6, 0x6ccc8b57,
- 0x01e3b622, 0x5ef0ab2b, 0x16578df5, 0x93d3a5fa,
- 0xed6b2809, 0x5127b966, 0x21f7fdde, 0x8e5f8374,
- 0x7c0efe40, 0x26f7037b, 0x03ce41d7, 0xf4feb35d,
- 0xc89b2654, 0x44676ab6, 0x5385fb70, 0x0c6b18ba,
- 0x4fd1be37, 0x400b98a0, 0x17339588, 0x73b944a8,
- 0x6761afc2, 0x3ad0b9b9, 0xed83ecb8, 0xc0d87835,
- 0x94c55e62, 0xebf723e2, 0xa99229eb, 0xcd6939fe,
- 0x493e484f, 0x1a875265, 0xa293bdda, 0x3ef3027b,
- 0xa1b81af7, 0x656ac6b4, 0x44d45870, 0x2f1a2bb8,
- 0xaa2f8c30, 0x6ccc2722, 0x6c9ce089, 0x8a826a74,
- 0x79c3801f, 0x2ce3a5b7, 0x49db575b, 0xe1756ae7,
- 0x96b90f0d, 0x7db88316, 0xb146be0c, 0xe16e2b37,
- 0x79f466b2, 0x0fc9c0f9, 0xd731594a, 0xf4417f11,
- 0xd78c5db2, 0x22971a89, 0xdfd46771, 0x33288719,
- 0x9ea40d16, 0x24ac0673, 0xdd2ebd1d, 0x60dc770c,
- 0x4616fc0a, 0x1851e861, 0xbf1bf5e7, 0x90d2cd44,
- 0x4f80074a, 0xe19fe0b3, 0x73bb8109, 0x65b09784,
- 0x3ebf3150, 0xde015df6, 0x000a6c09, 0x0664fed0,
- 0x35677a0b, 0x9029dfd0, 0xcc7247b6, 0xea52b8f0,
- 0xa2efda7e, 0x67ce44a2, 0xf7511014, 0x99d1f014,
- 0x20e9f7fd, 0xcb10c51e, 0x30143244, 0xf63abdd8,
- 0x7c233587, 0x207ed78e, 0x239b8a29, 0x2562f7ee,
- 0x9c520273, 0xfde73326, 0xf47caa50, 0x91405a0b,
- 0x3b4df754, 0xce63c39d, 0x1311e0c4, 0x4136b90e,
- 0x693e7b04, 0xcfaccd60, 0x15d19062, 0x575c988a,
- 0xef93764e, 0x9c83476a, 0xe3091579, 0xa8230f6f,
- 0x0bc9041f, 0x40dce4f3, 0xaf6e0b44, 0x85f845fc,
- 0xa34e2c96, 0xaf35c5c6, 0x2dc48d78, 0x18df1226,
- 0x66520258, 0x967eb4d7, 0xc4f21e5f, 0xeb44471d,
- 0xc86420a8, 0x282782fe, 0x1a7d707a, 0x0a268d21,
- 0x6828ceb8, 0x33057688, 0xb74039de, 0xf149a8aa,
- 0x97dedb10, 0xb11032c9, 0x8b693f65, 0x97acade7,
- 0x792df7ca, 0x195429c9, 0xc1e8ec75, 0x5b9110f8,
- 0xe11234ea, 0xb4685812, 0xa2c2fb10, 0x80136255,
- 0x1effc1a0, 0xc8fc3744, 0xff0103a7, 0xf60187ca,
- 0xac960517, 0xfa4a4c0e, 0x5c8dccf0, 0xbe5d2e5a,
- 0xe3ac5e6f, 0x0857c37d, 0x6cba5735, 0x8d3dec6f,
- 0xe98ec1ec, 0xec49ffeb, 0xd291c4c8, 0x64ed0a94,
- 0x8bee800c, 0x0effd327, 0x5885bb11, 0x6c6fa23b,
- 0xaa399202, 0x4b1a3310, 0x46bab2e1, 0x9bce015c,
- 0xa0455a4d, 0x11a3d593, 0xd667006a, 0xca2241d8,
- 0xbe6dc73e, 0xd5461b30, 0x06d38aa5, 0x4bacc1a3,
- 0x4002f2f6, 0x6ec05acb, 0x0d7f1720, 0x09983b4c,
- 0xd63f9ebc, 0x296be5d4, 0xdf1e40ad, 0xc017636d,
- 0xc22ea1e3, 0xa47d8a16, 0xf6eae2a2, 0x58fd07ee,
- 0xa346b981, 0x443a70c8, 0xf51d8a7f, 0x0b6a4e5e,
- 0x90005b44, 0xd65d20ef, 0xf9c9548b, 0x1b8f670d,
- 0x6732c000, 0xc61eae0c, 0xca4dba6c, 0xc57b5f3c,
- 0x838412fd, 0x3a64976d, 0x908960bc, 0xe6fc70a6,
- 0x23540703, 0x64ad9681, 0xdc99ba25, 0x34302628,
- 0x260583ae, 0x1d330877, 0x837d1e3f, 0x17280aaa,
- 0x3ad0e4b6, 0xcc4746e7, 0x86c3ada5, 0xb9b50ced,
- 0xd1570f3f, 0x5af33a09, 0x05e561e2, 0x42b74345,
- 0x2f29f422, 0xe99250dd, 0x3d023347, 0x390d1ac4,
- 0x8eb73237, 0xc0ef6a51, 0xf54b5d2a, 0xfb87f00d,
- 0x11c9d3ac, 0x73cf0617, 0xdc74cd9f, 0xaa03d91b,
- 0x22ff768c, 0xbb5e0a84, 0x54b9bcd6, 0x02bdb8fd,
- 0xc365bb43, 0xe8c64d88, 0x5ab95d94, 0x057c8d35,
- 0xc62c8a52, 0x1c2c38ac, 0x907e505c, 0x36869f64,
- 0x779cd99e, 0x09b91df9, 0x1359ae8e, 0x9910e35a,
- 0xf40bdd0e, 0xbfe7c4ab, 0xb810a776, 0x71c8ccbe,
- 0x2cf280d7, 0x491c752c, 0x07d0534a, 0xad1be8bb,
- 0x01730fa3, 0x0d759a10, 0x75755f5b, 0x3ff564a1,
- 0x8b03d3fd, 0xcf2a2a12, 0x4b9e4dea, 0xb4ac64a3,
- 0xddc0daee, 0xe8318438, 0x53cf11c8, 0x8ec4ea03,
- 0xe8e10d39, 0x70b8a85f, 0x94ccb479, 0xb9f524b5,
- 0xd0081dae, 0x4eed46c9, 0xb339612b, 0x4307e5c0,
- 0x8aebdc84, 0x07574cc7, 0xd4a6037a, 0xc6ffb6a1,
- 0x0c2c43d1, 0x093e79b2, 0xf6a09279, 0x8f38533c,
- 0x9fdb1096, 0x76b7b7e1, 0x41e01a6c, 0x8d262b58,
- 0xd8dcef0d, 0xf17408f3, 0xfd29abe2, 0xdf40d7ec,
- 0x46a54270, 0x97505382, 0x422a468d, 0xd924eb6b,
- 0xe22afecd, 0xdd9d4e9c, 0x9909b518, 0x1ec2e4bc,
- 0x92d3b2c7, 0x3d51d9b4, 0x7d8af0cd, 0xe41aa28d,
- 0x72d2fd01, 0xd06360ca, 0x9520fa85, 0xd5e96f77,
- 0x3628906d, 0x16a90354, 0xf4ce3334, 0x5e383904,
- 0xd300e05a, 0xe60bcecf, 0x04e4d78a, 0x11c80fe1,
- 0x21b8b926, 0x0ac3ab25, 0x58b00c67, 0x4b369e1e,
- 0x07b2832f, 0x99a5257d, 0xb47c81dd, 0x8a463df3,
- 0x87f1ecd3, 0x8d86d6b2, 0xdd8a61aa, 0x5e5abd11,
- 0x0f7c9621, 0x6757b617, 0x166dcea1, 0x3421fc35,
- 0xf650dd3c, 0x1c2493f7, 0x5f10c5e9, 0xc23cbd6e,
- 0xf381aec3, 0x86f2bd5d, 0xc925f3bb, 0x167d76c7,
- 0xd544c23d, 0x3db981e8, 0x4faa24e7, 0xd6d5e5fc,
- 0xee252435, 0xc207b120, 0x1532c5dd, 0xc9ae6654,
- 0x550d8e87, 0xfc982fc4, 0xca3e1ffb, 0x3cfd73d4,
- 0xbfd8a52c, 0x9a675f28, 0xace69af2, 0x934369cd,
- 0x2ccee87d, 0x60b6abc5, 0x3e31fdd6, 0x90367e93,
- 0x4b1f45a8, 0xee11816b, 0x26aa4e75, 0x31e68a56,
- 0x587834b8, 0xb436aa39, 0x60b20bde, 0x740d8bef,
- 0x1d0356cc, 0x23cbb474, 0x14e45292, 0xdae455d3,
- 0x4ab5ed06, 0x2b34a1b5, 0x4e39243c, 0xa7a019cd,
- 0x7ad9e0c7, 0xca551f1d, 0x256318de, 0x0ae0e1c8,
- 0x2c94bc45, 0x8a30639c, 0x1243183d, 0x682b91e4,
- 0x5d193e08, 0x7d5b9736, 0x7992c858, 0xc7cc6b0b,
- 0x35523eb7, 0x06bc5835, 0xb6324673, 0x7679ab7d,
- 0x4f520f22, 0x84bf96e6, 0x5f89f846, 0xbc04bce9,
- 0x094ea11d, 0xc6bae7f1, 0xdddc8f0d, 0x9aee4aae,
- 0x4a43a716, 0xbc0d67cd, 0x6d9b09eb, 0xff971083,
- 0xf66611d8, 0x4d6157f0, 0x43b3239b, 0xa82ea565,
- 0xeffb5e86, 0xa705cbde, 0x2d7afd0b, 0x80942b2c,
- 0x7468e303, 0x9f6b48d1, 0xc28b123b, 0x0dbef60a,
- 0x9d0d85e1, 0xbd3357dc, 0xd35a1f77, 0x7b7ee000,
- 0xdd224ff1, 0xd46b692a, 0x96467b23, 0x10ca5e31,
- 0x8687c144, 0xb04ad7da, 0x5c10bb3e, 0xfd0a7289,
- 0xe3617069, 0x150d7480, 0x2e8f9de9, 0x4977e191,
- 0x34f24f4b, 0x9700093c, 0x3fe41a74, 0x84ce82d9,
- 0x984c34e4, 0xfa344c8b, 0xdb89a561, 0xd202e556,
- 0xce60c69e, 0xec16888f, 0x9c3712c3, 0xbdf9f979,
- 0x94139ed6, 0x61528928, 0xde87b41c, 0x6a3c245c,
- 0xf9774574, 0xad73d53a, 0x876a5fb8, 0xb6413dc5,
- 0xdb3e5324, 0x7445cd5e, 0xcd07d031, 0xae1548de,
- 0x818409be, 0x503694de, 0xc0f055f1, 0x3b4f791f,
- 0xf1a921bf, 0x98447f7f, 0x49a2dab9, 0x582ba48a,
- 0x3fa9fe44, 0x51fc0233, 0x41d4bdd3, 0x8c8c2e58,
- 0x9e2d3f93, 0xa3037c04, 0xfbe721dc, 0x22bcf9da,
- 0x0fb7ffbb, 0x9fd471af, 0xebf97185, 0x2d8543d1,
- 0x4477188c, 0xe2a4b44e, 0x31858468, 0x93835021,
- 0x4cf8e945, 0x35d3f81b, 0x7be516ab, 0x1b241f76,
- 0xe3a11153, 0xb10f7a37, 0x1e630ccb, 0xda847efb,
- 0x93d81181, 0x55a83268, 0x21d64d30, 0x1fe02004,
- 0x8606d4b2, 0x568c72eb, 0x82b9fc8b, 0xc30528ef,
- 0x0c412038, 0xd9960067, 0xe65d945e, 0xee746fbb,
- 0x6da22008, 0x6610dacf, 0x9056db07, 0x54167607,
- 0xf9c73906, 0xddea5291, 0xbacf5c69, 0xf3df9b69,
- 0x11feaff9, 0x0453a8b6, 0x3fe53f61, 0xe29a3dd4,
- 0xe7937c1f, 0x760c0e9a, 0x0bc18fe0, 0x95e2946e,
- 0x5659ec0d, 0x2827634d, 0x10c94b46, 0x7b9c0e0f,
- 0xa76c04af, 0x80311d62, 0xa513fd35, 0xc57dc2eb,
- 0x9c6aec8b, 0x6ad02dca, 0x56717e4c, 0x7cd17832,
- 0xf38e1886, 0x4b3cfd3e, 0xb0e9c0ce, 0x175e1cea,
- 0x9ff1f1c1, 0xff3257a8, 0xb4193253, 0x28165b0f,
- 0x167f1fc3, 0xf742786a, 0xe13b7301, 0x479c0959,
- 0x1a23c59b, 0xad5c1e7d, 0x97f9bc8a, 0xfc021a74,
- 0x79d8e144, 0xcdaaa3a6, 0xd40f2909, 0x534a25e1,
- 0xb312f873, 0x3bac337d, 0x727d02b4, 0xa5a20e75,
- 0x51101852, 0xf614121a, 0x20fe9116, 0xbed94fe8,
- 0x33a0988e, 0xbb2de4ae, 0x63034e39, 0x79d9c3a3,
- 0x3840d72b, 0xc2f5654d, 0xe0c5e869, 0x2ed8ad67,
- 0xaa1dd829, 0x119d0bb2, 0xd4c40331, 0xc121c991,
- 0x40ecbefd, 0x824c4915, 0x9956ea07, 0xcf85eb51,
- 0xf0b7bc59, 0xa361494b, 0x4c808069, 0xfdfd0a1d,
- 0xd6f966d6, 0x6365fb74, 0xc73c91d2, 0x279e9941,
- 0xacac90de, 0x91b5f00b, 0x1711ffb7, 0x2e2f1c2e,
- 0x8d0cbbe7, 0x93a07245, 0xa7b623ef, 0x35c87252,
- 0x82a4c86a, 0x4f7f36de, 0xcc3a6cb8, 0x88c866d1,
- 0xabfdf111, 0xdcc1aeea, 0x702e3253, 0x0d98c7e8,
- 0xd21a1cf5, 0x5e7ab282, 0xa2817de4, 0x2a018a1a,
- 0x47952cda, 0x1dff27e2, 0x1ff8eec7, 0x8ca93098,
- 0xc782faec, 0xef0d00f2, 0x88480c97, 0x8bd9317e,
- 0x6149085f, 0xf7af467f, 0x703c2efe, 0x3c351d57,
- 0x7d0a702e, 0x6a92b286, 0x1aa9a388, 0xc1a9964f,
- 0x2ba28b9b, 0x0a8f604b, 0xb0ebabc8, 0xa55d9957,
- 0xcb98cdaa, 0xa0f6f6df, 0x751d03fd, 0x4336044b,
- 0x6b9c0b98, 0x8c609a16, 0x29357cb3, 0x26473001,
- 0x46124389, 0xd92ba814, 0xc891b904, 0x11e72675,
- 0xe43420c7, 0x3b78f29a, 0x2643efcb, 0x06e44cb3,
- 0xe68b6aae, 0x350fd91e, 0x6eca3b2e, 0x08fd7f68,
- 0x31154efb, 0xdd481cee, 0x0aecd5c3, 0x1df7cc1c,
- 0xa7bac7da, 0x0154101c, 0xcb2cd202, 0xa7253a5b,
- 0x195bd5d6, 0xc86f712c, 0x781aed1b, 0xe61460a5,
- 0x69aaff9f, 0xdad36a76, 0x5d5b6810, 0xa4082fba,
- 0x8e5c2880, 0x0a2f109e, 0x4184bdd5, 0xf9e8e63d,
- 0x987dc281, 0xb8ecce8f, 0x42f5c73a, 0x1edfd6b8,
- 0x5f504024, 0xeaa6bfa2, 0x0e5d4904, 0x04247478,
- 0xfbfbf2d6, 0xc8977c6e, 0xff007c56, 0xec950a4c,
- 0x29e945b7, 0xab2ea384, 0x80994900, 0x648f17ad,
- 0x14a81b41, 0x38dc4013, 0x8e4510a3, 0x458c1b2a,
- 0x151f9f76, 0xf244bdc0, 0x6214b024, 0x83171a80,
- 0x3227a57a, 0x0b6a183a, 0x05fc6244, 0xae1f9b38,
- 0xb8150156, 0x828c7a0d, 0x9aa3fcb6, 0x3653a9de,
- 0xd3df54ee, 0xcbe74b3a, 0xad4864cf, 0xe02a96ec,
- 0xfa735b79, 0xbb8689da, 0xa9f6144f, 0xa6acae6a,
- 0xbf42e674, 0x332248bb, 0x6f17fdc6, 0x747a58c1,
- 0x8b38ed4b, 0x5b639be7, 0x045804b7, 0x90d7e58a,
- 0x449f8251, 0x61ff0d9a, 0x196d7b18, 0xe1d5f2a1,
- 0x6b45a77f, 0x9943e5cc, 0xd1e94039, 0x9ea45ac8,
- 0xacef5148, 0xb7304d4d, 0x90a2b367, 0xa3c615a5,
- 0xb102e6e3, 0x20b30c55, 0xa9e45e77, 0x012b61e2,
- 0xfd4f46fc, 0x11db75b7, 0xcd28b6c4, 0xdd64926b,
- 0xff95d8d6, 0x5d3e7c10, 0x8f01d1eb, 0x91db12ec,
- 0xb16a9f24, 0x59ede105, 0x05ad4502, 0x766cd29a,
- 0x114b7750, 0x7c03893f, 0x746394a9, 0xe4e71094,
- 0x4a4f2783, 0xe610aab2, 0x0a7980d6, 0xf0f32758,
- 0xfb5cfe04, 0xeb557aae, 0x33972bce, 0xa77728c7,
- 0x72ac6056, 0x6ca43233, 0x450a161e, 0x435f2f39,
- 0x89161c4e, 0x62b0fb79, 0x4abca503, 0x313c2518,
- 0xf13e0b63, 0xe3be6089, 0xd2f3e7e3, 0x8fa0b2a9,
- 0xcc674947, 0x5fa1f850, 0x6820f92f, 0x62fd0fd1,
- 0xfc66aeff, 0xa94f1417, 0x630e3bc2, 0x3e2eda38,
- 0x814907ea, 0x9502e76e, 0x20a4eaec, 0x3f31da60,
- 0x33414e93, 0xa9eed304, 0x30358865, 0x1b0c6640,
- 0xc07c4b42, 0x50a0f794, 0xa3ab6eab, 0xbd8053ca,
- 0x07767977, 0xda49b678, 0x9567e78b, 0x66ca8dd9,
- 0xb61b16cb, 0x8c308aa4, 0x49bab603, 0xab414aef,
- 0xab13befb, 0x25d9fffe, 0xadc2bacf, 0xd40380a2,
- 0x6ceec429, 0xb928c4dd, 0x8353458e, 0xaf9dd0ca,
- 0x1dd1e8ff, 0x36b526a3, 0xbc0e5ea7, 0xc43f6f45,
- 0x7d6869e8, 0x86bf1842, 0xf4e3697e, 0x13305510,
- 0x2613055f, 0x16dff0a6, 0x9343dd1b, 0x0d7af146,
- 0x4cd5602b, 0x9096386e, 0xef0c69d9, 0xfc828da3,
- 0x3790757b, 0x5a1604be, 0x85ceab33, 0x159cd5c5,
- 0x704fefbd, 0x03d2530f, 0xc3ab6110, 0xc152d54b,
- 0x4fa7e884, 0xf4da8bb9, 0xf33709d0, 0x7095aeb1,
- 0xa4f6aa20, 0xe1715054, 0x0a2859d0, 0xfcd772b8,
- 0x26e99e16, 0x2b1004a3, 0xbd6f8586, 0x9008c5ac,
- 0xc501917b, 0x461157ef, 0x579a3e4b, 0xce465660,
- 0x428d00b9, 0x976d9b22, 0x551bdca5, 0x2fd49d86,
- 0x4bf5a7e7, 0x60ebb7e6, 0x981e574d, 0x521fed95,
- 0x1d1bcea9, 0x3a571356, 0xbd0b7c1e, 0x3a76fdf8,
- 0x5130aa52, 0x40bfe307, 0x4a7536c1, 0x2b5d60f5,
- 0xa79ec54e, 0xb8764bdf, 0x4ec60969, 0x55faadfe,
- 0x26054b06, 0x212a8287, 0x67621fea, 0x0a3a9f26,
- 0xe344972a, 0x9b6eb14b, 0xfa459f61, 0x691f5f25,
- 0x2ba9603a, 0x8694065f, 0xc4a6b1f8, 0x14a768ef,
- 0x94020d3b, 0x179c90e9, 0x804cd4f2, 0x3b6568b2,
- 0x4046c102, 0x73f77d11, 0x488993ee, 0x8e101842,
- 0xca8f5762, 0x27417103, 0xc8ce9d40, 0x810dff8b,
- 0xea3411c7, 0x4c046e03, 0x6c9ed316, 0x7fa9211d,
- 0x7706a2a6, 0x506f311f, 0x7e1bb46f, 0x314fac6a,
- 0xc0835554, 0xe65db5d8, 0xc8583ec8, 0x7ca9cc21,
- 0x30f57d22, 0x750599a3, 0xf520e2d5, 0x14f07732,
- 0x055adad0, 0x33fc9f95, 0x79405cb8, 0xaf635c26,
- 0xc5051fa4, 0x01f91f77, 0xbea106fd, 0x3228f638,
- 0x8884a5ed, 0xd723ea43, 0xdd110d7d, 0x194785ae,
- 0xe60c56d2, 0x5241c47e, 0x7f3b3fa7, 0xb2934078,
- 0x3591414f, 0x70d7ae55, 0x4df9591b, 0x566c47df,
- 0x7a38adfe, 0xe3f90853, 0x772ac0b6, 0x72e49654,
- 0x011268ab, 0x89c22a92, 0xcf5d30da, 0xd0d3dd8f,
- 0x596bac9c, 0x1ff07d1c, 0xd8f35b74, 0x109812e7,
- 0xdfecb705, 0x39f47be0, 0x9f2d8b3c, 0x6d78bba0,
- 0x67cf8859, 0x4a852d4d, 0xeda1d0e4, 0xa29398a8,
- 0x96d0b639, 0xc560fb2f, 0x5628c057, 0x59bd87ad,
- 0xc2775969, 0x280deb38, 0x1e24e99a, 0x3f044836,
- 0x58adf2d7, 0xf7325dd4, 0x405ec8a9, 0xba64d004,
- 0xdc83a0b4, 0x93dba248, 0xf5bbfcf1, 0x988dc0e8,
- 0x477001ae, 0x0eceaf1c, 0x59a50b5b, 0xf47cdd05,
- 0x9b506014, 0x92b08da5, 0x76d58f5b, 0x201e9185,
- 0xad3ae16c, 0x97d45939, 0x92a76bff, 0x4b603b13,
- 0x6578dd6a, 0x9e7fe47d, 0xeaa8f87e, 0x6e914b28,
- 0x95ed4994, 0x873f7ea9, 0xe2271d9d, 0x3639ce14,
- 0xd66f875e, 0x50f0664b, 0x1b6c66e5, 0x1d5df7f6,
- 0xcd8e6dd0, 0xc32c30ad, 0x00eb7d98, 0x99b14966,
- 0x24a1dfb2, 0xa0ce4250, 0xaf04424f, 0x551b960d,
- 0xf984af3c, 0xf879c6b9, 0xdeab23d1, 0xe69a1c7f,
- 0x333c2628, 0xedc8ebe7, 0x2b820e22, 0x1a0301fc,
- 0xdab21431, 0xe26dcf84, 0xe077f727, 0xbee936dc,
- 0xe17794a0, 0x7ca79071, 0x5b78a8e8, 0x6f6162d7,
- 0x16c478d2, 0x9c38a40b, 0xd8036e50, 0xc7c79ec3,
- 0xd421dae8, 0x40f5ae17, 0x2f1b3a7e, 0x0c7547fd,
- 0x6596a461, 0x37b6faff, 0x9f50e7a7, 0xd0ca4941,
- 0xfd0fd1a0, 0xf7b5e454, 0xfa7e694d, 0x2c9d12d1,
- 0x523e9198, 0xa43ce6ab, 0x754debed, 0x6c329ffd,
- 0x8cb464d3, 0x9296bd07, 0xb0c94b13, 0x8b79edbd,
- 0x3ae66ff8, 0x7a6f73bd, 0x4c94ad17, 0xede21412,
- 0x6a521970, 0xc92ba31e, 0x0d2c2ffa, 0x91508bda,
- 0x6467d7ea, 0x44528e5c, 0xa50857ac, 0x8a7a3cc9,
- 0xef2577f2, 0x00ad2b4d, 0x69adaf79, 0x6724dc4e,
- 0xb7fefc9f, 0xc269eeb4, 0x22841b78, 0x275d52ab,
- 0x1c29a934, 0x30467267, 0xf3d6fe26, 0xe7182bda,
- 0xec81ca38, 0x752f34c8, 0xadf3cb46, 0x4eeccdc1,
- 0x1d667c1c, 0xcb53ebb2, 0x2103002a, 0x625dcc6a,
- 0x350641ec, 0x7819d810, 0x7c31af20, 0xbeb6f5b2,
- 0x310fc860, 0xfa40b5fb, 0x90620956, 0x2153ca3f,
- 0x924c79c8, 0x4e1a41ad, 0xd5c20603, 0x9f8a04c0,
- 0x743d2987, 0x1dd34953, 0x242b9ef6, 0x1babe9ee,
- 0x051d54b8, 0xf9498686, 0xe4a3d732, 0x42cdfeef,
- 0xc7afb586, 0x91da5279, 0xf1a8023d, 0x32571823,
- 0xdf112fac, 0xd5621774, 0x3de1598d, 0x586a3b88,
- 0x60af3b94, 0x0a88850e, 0x85ee67b0, 0xfca8c39c,
- 0xefc74b0a, 0x7103177b, 0xd3b65ba3, 0x368d5ecd,
- 0x5f99a46c, 0xb63ca199, 0xc144b0f6, 0x7dd42db7,
- 0x8767b74c, 0x023bdfac, 0x05256360, 0x194ad34c,
- 0xec7b2dcb, 0x9c6d10c7, 0xef5d0342, 0x1d6c2693,
- 0xa7de7b55, 0x92727976, 0xfe47e32d, 0xe56ab49b,
- 0xb8d0db47, 0x640ea6fa, 0x1f8eed5a, 0xb824bf88,
- 0x323677c4, 0xe4bbdb9e, 0xfeddc30c, 0x604dd61e,
- 0x87bc873a, 0xbd09fa6e, 0x241dc2ef, 0x905a52e7,
- 0xdb6d2135, 0x3cf21fe4, 0xaa40a791, 0xa2471859,
- 0x7317bb46, 0x3c12ce9f, 0x18f369b1, 0x030cb559,
- 0x442f37fb, 0x1fcf9814, 0x2217de64, 0xe2e68bdf,
- 0x943d8001, 0x1f1b8d8a, 0x576a886b, 0x96ead16c,
- 0xdb5e7caa, 0xc97d1c50, 0x0e6bb8ce, 0x6d082c04,
- 0x37a72738, 0x4d2ced35, 0xdcc6165b, 0xd50aa40b,
- 0xf1aba32a, 0x276000a8, 0xd6fc6901, 0x7f568c49,
- 0xc39160ab, 0xbaf88b7f, 0x0d3f7a24, 0x6e3f0dd0,
- 0x396f0ac4, 0x4fa1d091, 0x81f11830, 0xba59fcdd,
- 0xba8b74c9, 0x1d0fef4b, 0x07c4214b, 0x18dcd17e,
- 0x27619858, 0x62b7681c, 0x6a5fa01a, 0x25740bcb,
- 0x054419ba, 0x83dc3500, 0x38d1845f, 0xfcbe5436,
- 0x7aebaceb, 0xf18778ab, 0x511a5509, 0x05752e02,
- 0xa748b75f, 0xb9070941, 0x8b303eef, 0x192dba37,
- 0x919261f2, 0x78aeecb8, 0x04d24bec, 0x7b8460d5,
- 0x2cc387ca, 0xb94a2126, 0xb3f1f858, 0x384ada5b,
- 0x14fd4d78, 0x2fd7eeff, 0x4f73bcf2, 0x7895086c,
- 0xaf8b1b74, 0x5d7f9c27, 0xeb86aaf8, 0xe5ad98b9,
- 0x89081a19, 0x5344e545, 0x35a37b65, 0xd20b11ec,
- 0x34cb42b0, 0x7e5cbfea, 0x5836ce81, 0x2ed1bf98,
- 0x94c7fa73, 0x854d4090, 0x87488648, 0x357cfcd0,
- 0xa6949ca0, 0x4b1cbb7f, 0x0ead7bc3, 0x2a5d2f7d,
- 0xea3607d3, 0xbdd9a813, 0x715d55ae, 0x744d03fa,
- 0x23195439, 0x70faca06, 0xbb56c127, 0x30face9e,
- 0xecf00ec7, 0x8657185d, 0x453dcca6, 0xb3c28f0c,
- 0xeeaa6dec, 0x2596a28d, 0x7df3ec0e, 0x934f524e,
- 0xc7e4634b, 0xd778afec, 0x5c266a32, 0x8f5ffa83,
- 0xa95875d7, 0x46b6db48, 0xdbc1dca9, 0x19feecaf,
- 0xb5a05313, 0x1e73bb8b, 0xe74a2b88, 0x64656697,
- 0x9a36ed16, 0x282896d3, 0x697bca85, 0xb8b19d12,
- 0xe6bfc885, 0xca082fcb, 0xfec085f6, 0x54dee6ec,
- 0xf2837748, 0x1b1614f5, 0x63feba0c, 0x7a30024c,
- 0x2324905b, 0xf92c5bd2, 0x97dee61e, 0x04a916c6,
- 0x9c539aab, 0xe631118c, 0x4b14734a, 0x6d45208b,
- 0x66bbdfeb, 0xf12f50c5, 0x6901a54b, 0xa98ff372,
- 0xe34f310e, 0xb5031e84, 0x51dfcaf9, 0x67a71328,
- 0x41d50333, 0x363d3bce, 0x70386666, 0x69e73680,
- 0xbe1510f9, 0xa97d6780, 0xd79bbb72, 0x7f53cb8c,
- 0x6f8ec113, 0x0d1e7f23, 0x96dcdbc3, 0xb9558972,
- 0x7bf2b701, 0xaa02d861, 0x7bd7af1d, 0x6e093900,
- 0x9bfe9bc3, 0xe63eb914, 0x5d8c1275, 0x5bfc16f2,
- 0x33c86297, 0x5963f82e, 0xb901b15b, 0x6aef7879,
- 0x47436021, 0xbdbbf65b, 0x88011d3a, 0xa1bfc87c,
- 0x849033dc, 0x2a7c6a87, 0x43683723, 0x7126a39e,
- 0xc555f29e, 0x64836b66, 0x6fcfb8ff, 0x7bfebf43,
- 0x5f3c1971, 0x62d8f502, 0x0b0b6d9c, 0xa4dc3239,
- 0xedcee9eb, 0xbd8625ba, 0xb93543e6, 0xe4236428,
- 0x265b26a9, 0x0527cf2f, 0x39754033, 0x5c7973a2,
- 0x6fc21215, 0x57d033bb, 0xc60c3a72, 0xd78cdaf9,
- 0xdf7f808a, 0x905790ab, 0xd0f3134a, 0xcad29f56,
- 0x0a253c5f, 0xe2497090, 0x8b3bcc01, 0x98c8f66a,
- 0x5cea1937, 0x51e6e60b, 0x26aa3f7e, 0xdd84c770,
- 0x7731659a, 0xdb739572, 0x7c368ca9, 0xadf5a90d,
- 0xd4979acf, 0x6a5e5d36, 0x144c7881, 0x22ec1a06,
- 0xa8ef8edd, 0xb36ece19, 0xde73a8a8, 0xc6e58692,
- 0x83b1cb2e, 0x96e4169f, 0x5a5bb39c, 0xf77bbead,
- 0x89ddf55f, 0x0d28bc3f, 0xf7b0736b, 0x6e7d20c3,
- 0x59424289, 0x90f33454, 0x734af829, 0x4b93d588,
- 0x9dbc4eb3, 0x5bba339a, 0xeab22cbf, 0x5d2c5851,
- 0x131f804d, 0x6bb7bb7c, 0x6d515e30, 0xe12876e6,
- 0xcac64d1b, 0x80f4b263, 0xced14977, 0xe488f851,
- 0x71961454, 0x20ea4b91, 0xe2d3ab46, 0xd13c9bf4,
- 0x8b0575f7, 0x4ac25ea7, 0x1562be37, 0x4575f6ce,
- 0xf4784a4f, 0x418d8591, 0x2abc704c, 0xccdd4dd7,
- 0x61163204, 0x63173896, 0xe69773ea, 0xc39b7588,
- 0x02e82b7f, 0x030c5e96, 0x52d9c6fd, 0xa7450061,
- 0x7369e92d, 0xde041ecf, 0x6b028969, 0xfa40cfc5,
- 0x9069bafb, 0x7364c892, 0x074a1bc9, 0x7f335ef1,
- 0x1b3ae737, 0xf5afed4f, 0x3c29b4e9, 0xaf2cedeb,
- 0xa09cab6f, 0xfbbc9bb5, 0x1aa480d9, 0x9b18f1dc,
- 0x4a7725f8, 0x58d8e4ba, 0xdfac4731, 0xce6e8312,
- 0x6e2d21df, 0x05755bdd, 0x01abaf23, 0xa07d3769,
- 0x8cfa0ef0, 0x18e64860, 0x11fa10a4, 0x8818af44,
- 0x6bbb67fe, 0x4b74e96a, 0x8d910c9f, 0x82cba49e,
- 0x96681fac, 0xcd86e1e6, 0x4ee3e707, 0xf1c80e7b,
- 0xc92d7ffa, 0x43e03916, 0x4b87ca87, 0xad9f197d,
- 0x76e639d0, 0xc5633334, 0xe01cec33, 0xd5a55934,
- 0x4e5ba40a, 0x5925eab2, 0x72383326, 0xa2da4449,
- 0x128f2fc3, 0x4bc2f943, 0x815c1fa3, 0xeac488ba,
- 0xd1c3cd34, 0x006f3a63, 0x784c579d, 0x87818cac,
- 0x726364d1, 0xd6f5272d, 0x1f12538a, 0x8ce8b860,
- 0xb8b34f4e, 0xc6953e3c, 0x594bb1a0, 0x252c5587,
- 0x751186e1, 0xc744925e, 0xd50699e3, 0x85c88ca8,
- 0xd46b079e, 0x604e6557, 0xbcf489d1, 0xfaeb606c,
- 0x24c02cd1, 0x01869224, 0x12099284, 0x93fdc86f,
- 0xba3a4a24, 0xbb527125, 0xb4ffe340, 0xb42e90dd,
- 0x8ad65ac8, 0x1cecd5fd, 0x5dedca6c, 0xc20d5b01,
- 0xa0cf6aa9, 0x3d2915cf, 0x87c026b8, 0x4222a93c,
- 0x63fb05e2, 0x1248fbef, 0xdcfd4995, 0x7b3b96e5,
- 0x16819f78, 0x772d423e, 0x3c951590, 0x62a56f1c,
- 0xee0edc86, 0xcbc8c40a, 0xe3416f77, 0x12750cc7,
- 0xbc4678a3, 0xcdfdd877, 0x622fdbd9, 0x344151ac,
- 0x1e4c1f6b, 0x00d1d6ca, 0x9c3a381e, 0xb0eb9703,
- 0xa1db3943, 0xab1b2958, 0xa2a15582, 0xfd6063a2,
- 0xa3c4cfc8, 0xdf75852a, 0x5da747a6, 0x486a0e57,
- 0x9de47ca8, 0x08d2fd4f, 0x9666bc2a, 0x4d19c9d3,
- 0xbf524cae, 0xc6b27b99, 0x7aa44853, 0x8f66e1dc,
- 0xf5584f3a, 0x013ad42a, 0xe9c7c7f7, 0xf2a86626,
- 0xbd0a7728, 0x57156e15, 0xd6a000be, 0xef40e261,
- 0xf798d6f6, 0xa5f6967f, 0x64a010b8, 0xdea52623,
- 0x8c1aa73d, 0xd68ba687, 0x6a77b1ee, 0x1df83d5c,
- 0xdea9bc81, 0x5c154c70, 0x03ac675c, 0xdaedce0a,
- 0xadbb3215, 0x12fe81de, 0x6166798f, 0x8d5f89e7,
- 0x03b35c7e, 0xe3185635, 0x50ae5550, 0x2e835a0a,
- 0x288d560b, 0x029e79ec, 0x0f8a8937, 0x762ea0ad,
- 0xa9bc36fd, 0xe72901d8, 0xc67e8421, 0xe79d4b7b,
- 0x38b846b6, 0x0c1e0447, 0xef55bd28, 0x5d544024,
- 0x18f68b54, 0xe0b41294, 0xefdbe81d, 0x1b905cab,
- 0x71d21bf8, 0xdb2f276e, 0x79f5787d, 0xe509ee76,
- 0xfd38142e, 0x79e9f52d, 0x7bcab8e2, 0x1ec78269,
- 0xe90a374d, 0x249b1223, 0x2874281a, 0xa1bcfa6d,
- 0x8505f39c, 0x871492a1, 0x68643ecc, 0xfdee5a1d,
- 0xf71c0e59, 0x1c4c7b03, 0xbc223c3c, 0x69902c28,
- 0x58078012, 0xd3d0d1cc, 0x8ad5e993, 0x260e3944,
- 0x91b707ba, 0xb8e6db01, 0xf207be39, 0x61e2ac75,
- 0xddabab4f, 0x048e9bb4, 0x409eb891, 0x9b2860b8,
- 0x9983c366, 0x3bf51556, 0x02cf74d7, 0xdb9da7f7,
- 0x90c59550, 0x3ec14eba, 0xb3da42ae, 0xa1678ee3,
- 0xf5b3171a, 0xc4891311, 0x3956f0f1, 0x1c1e6198,
- 0xe10489ad, 0xe4af795a, 0x6ce359bc, 0x92db2c47,
- 0xb29d0bbe, 0xdcfc073f, 0xef8e0c56, 0x016e5c10,
- 0x55d28640, 0x23a73397, 0x63463e4f, 0xd05e7e5e,
- 0x33317dd6, 0xdfd4ee25, 0x8abb1147, 0x07920ad9,
- 0xe9ce1eb1, 0x4c563761, 0xb25af483, 0x833fc686,
- 0xfa26f8d8, 0xfc6d9706, 0xce287235, 0x1a4dedb3,
- 0x9e7e2244, 0xbc6d76ad, 0x454244dd, 0x1fa6f791,
- 0xd68d5d44, 0xd575c107, 0xa29f363f, 0xa4d82a2e,
- 0x54807dd8, 0x834288a7, 0x1bb3c0cf, 0xdf14c691,
- 0xf948a1dc, 0xe8f36e29, 0x995b9ddc, 0x285cfe79,
- 0xae873e12, 0x24512b6b, 0x2b5a7536, 0x12ed1f02,
- 0xfa33f1fe, 0xf8ae1287, 0x2d198673, 0x305f4bc0,
- 0x04e81749, 0x2ee39d5a, 0x9fb3ad43, 0xffa79dd9,
- 0x6e7552dc, 0xafd3b9a9, 0xe77a27e4, 0x3389861c,
- 0x88875f99, 0x6c3fb970, 0x1dd33d87, 0xad2da30b,
- 0xed61353d, 0x159b0258, 0x289afc18, 0x4d2f5a8b,
- 0x3e60b265, 0x289016c6, 0xc5e5126d, 0x70ecface,
- 0x1e8ca90a, 0x981b7bb2, 0xbe6cb8d4, 0x950b2832,
- 0x3ce849fa, 0x8605fece, 0x6f725305, 0x34749033,
- 0x45e47071, 0xf03b3fc3, 0xb01376f7, 0xf0fc9650,
- 0xe1479c89, 0x7f1e7f3f, 0xb444276a, 0x3daa38d6,
- 0x83b58e2c, 0x0b01c0f9, 0x057e6fee, 0xadae5a22,
- 0x2662781e, 0xf00dd6aa, 0x90a8af3b, 0xeaa7d3b4,
- 0x307a1bed, 0xa078467a, 0x2b6ec7e8, 0x5afecab1,
- 0x79dd1397, 0xfd7894e9, 0x936c2bf3, 0xb4cb94c8,
- 0xfbf88987, 0x5bc4a881, 0xf96c5691, 0x0775ac8b,
- 0x8d29216c, 0x4205bb21, 0x87227749, 0x77b45968,
- 0x2bc64816, 0xa8bd9961, 0x3406cf85, 0xf8bdd876,
- 0x95d22fbf, 0xfd3ffa19, 0x11370663, 0xfc444051,
- 0xf8ea818a, 0xd8316c19, 0xca863792, 0xf7da216c,
- 0x46949cca, 0xafb6749f, 0xa6ccd651, 0x3ba7ec03,
- 0x20be1947, 0x293b9573, 0x230c5ce6, 0x2190e64c,
- 0x24fb7c77, 0x5455e549, 0xf24ef784, 0xfd6ee2e3,
- 0x5135d6f7, 0x5a75c2ef, 0xf93a5e4e, 0xd7c27523,
- 0x047d2c00, 0x925b92ce, 0x8b8dbd5a, 0xd1a8851f,
- 0x3c36e267, 0x77e1d04a, 0x04ffbc6a, 0xe4372737,
- 0x25437178, 0xc219c406, 0x3b704354, 0x06529726,
- 0xc4d31af6, 0x8670d91d, 0xd6aea080, 0xef0816f0,
- 0x47a5f6e1, 0x96a9f010, 0x3718b52d, 0xf2b95c2f,
- 0xfcb10d89, 0x9930f255, 0x3725e7e4, 0x8031eeec,
- 0x7b1d3530, 0xc19bc696, 0x57e18b66, 0x9ca51015,
- 0x0359392b, 0x65bba057, 0xb3ae19d4, 0xfc80f9e3,
- 0x4216f017, 0x857c2552, 0x595afd26, 0x15a911e1,
- 0x4804e926, 0xdbce02f6, 0x96a66f55, 0x2d925a8d,
- 0x1c9ea6f7, 0xbd78e3ad, 0xcf074656, 0x32eb5a1c,
- 0x82c06e4b, 0xc9febae6, 0x28879bc5, 0xad5f3420,
- 0xe5628497, 0x27153186, 0xff595698, 0x8c1fad00,
- 0x3ffb627b, 0x9b080b87, 0xb1137fe3, 0x02bed087,
- 0x286780a2, 0xb8757a4a, 0xf801f348, 0xc48f3e72,
- 0x67418bd9, 0x7f612a53, 0xd7db1928, 0x800b0269,
- 0x8c0d57ff, 0xfcb68d2d, 0x7208ef04, 0x81bbc9f5,
- 0x855eeb1c, 0x45a57ee1, 0x6c40c1e0, 0x735a0b5b,
- 0xf4b38a8c, 0x2ac2c2f5, 0x0d14f9e1, 0xf02044f3,
- 0xbdb55030, 0x3d71fbff, 0x42dd1271, 0x3d311abb,
- 0x933ce178, 0x74a04d2c, 0x9a898c1b, 0x104325e3,
- 0x78615383, 0x7ce7f4e2, 0x64a054f6, 0xadceac90,
- 0x4ed286c5, 0x1af06c1a, 0x612f00e1, 0x868c8ed0,
- 0xa9daeea3, 0x6b98dcdf, 0xd8800984, 0xca1e88fd,
- 0x08e749f4, 0xc0496222, 0xffe27b59, 0xc499d775,
- 0x7ffc317f, 0xbeb3ecbf, 0xb6e9e56b, 0x77f0591b,
- 0xaa7faa6c, 0x59fa9f88, 0xf34c1c66, 0x3669b364,
- 0xa86e75ac, 0x1bdfe98e, 0xb91c7dca, 0x0c44ded5,
- 0xfcde4390, 0x741fc3ed, 0x69a37953, 0x3abc03e1,
- 0x2d23ce32, 0x7f12cb5d, 0x10869fae, 0xe08df47d,
- 0xb80c67eb, 0x841be480, 0x5c401872, 0xe7678c67,
- 0x82f70eb7, 0xa56aa21b, 0x176f381a, 0x04de078a,
- 0x5c43a8b5, 0xe46ed7ca, 0xf7bb9d1d, 0xe5f31be9,
- 0xfe0ebfce, 0x711c928f, 0x36a2bee9, 0xcdb69225,
- 0x6a7ffcea, 0xf6e763e5, 0xf1e1a209, 0x3aeebd5b,
- 0xaba20b8a, 0x5810a1ee, 0x6b545432, 0x5e2c21b8,
- 0x09585b25, 0xe3a11ced, 0x27846cf8, 0x76b22712,
- 0x2ec5e6d0, 0x18541334, 0x9bab9995, 0xc59b3a57,
- 0x207b1eb3, 0x29ae92fd, 0x87427c88, 0xc42654d9,
- 0x66072a41, 0x9738fa39, 0xbea0c2a2, 0xa93f9df5,
- 0xda2eb8f5, 0x3d51fffe, 0x78529632, 0x79cdb8ab,
- 0x2c704cf3, 0x94a263cc, 0xf621dcab, 0xd5e01733,
- 0xb0e58c76, 0xb909aae9, 0x49aba69b, 0x3b4b50b9,
- 0x6fc63bf3, 0xf3c1e17c, 0xe7664b06, 0xa50f40e3,
- 0x2b95da6e, 0x56ce065b, 0x9158df9e, 0xa86ebedb,
- 0x2a7edb43, 0x34c0645e, 0x524fa131, 0xab634ea2,
- 0x3c7128ae, 0x87051714, 0xb35f48f4, 0xa72d93e0,
- 0x65194924, 0x5c13657f, 0xcfc4d7bf, 0xef3f233b,
- 0xcc4c39c9, 0x751c7b6a, 0x4df76062, 0x2737a37b,
- 0x3dce16c9, 0x752b321c, 0x2ea9c22f, 0x670f44a8,
- 0x1ce3e4d6, 0x86f1e24a, 0xf68716e8, 0x03be1150,
- 0xe50c11e8, 0xdb88bd7e, 0x5d4d1806, 0xfd680781,
- 0xe6c89686, 0xdf2b301c, 0x8a547767, 0xe648917d,
- 0x1b02d1fb, 0x4cbec1a5, 0xad134e62, 0x3c5458e2,
- 0x80f1dbf6, 0x2d81d799, 0x3792881f, 0xeedf5aeb,
- 0x5ddf4505, 0x5ceaa231, 0x467cef8f, 0xf5885e21,
- 0x4ad7a22e, 0x82e064bf, 0xea77c2d4, 0x87cfc25a,
- 0x25abdf7c, 0x553ec8f0, 0x64a9c184, 0x8e25684b,
- 0xd1f9d1ef, 0xabb52b96, 0x03ab9d5b, 0x7f89d083,
- 0x50c4c292, 0x47e78a96, 0x456cc58c, 0xa0cf8aad,
- 0x545c8e36, 0x4586eefd, 0x298a750b, 0xef697975,
- 0x4dce0624, 0x119048cc, 0x84a5677b, 0x74f53d72,
- 0xa8ccf01a, 0x7375f0fc, 0xfe039200, 0x04b81b66,
- 0xcee20aa1, 0x398d32fa, 0xbf1611a8, 0x20f6ec20,
- 0xad535511, 0x77b38173, 0xb2eb6de4, 0x09723ab0,
- 0x201167f3, 0x4d8ed77d, 0xb19207ac, 0x2433a83f,
- 0x235d1a50, 0x136725d3, 0x91d2759f, 0xba128133,
- 0xa0234f53, 0x07be8967, 0xb88f5bf5, 0xc2985341,
- 0x7577ca64, 0x341f86d3, 0x7b5dce75, 0x9aa93835,
- 0x560ec5e0, 0x3d5d1a1e, 0x5bd41f29, 0x537c083c,
- 0x58efe68f, 0x9ba12bcf, 0x12333b34, 0xc40f1b00,
- 0xf5056370, 0x2aeda8c3, 0x4adb9c53, 0xfaa69efa,
- 0xa19557ca, 0x2bc25873, 0x740d4413, 0xfdc96ec5,
- 0x8c85d634, 0x58f03d23, 0xad45f948, 0x322bbf4c,
- 0x21b4552d, 0xd944f686, 0xe01a9db9, 0x8812e76c,
- 0x6bae3dd9, 0x692133bf, 0x987579e2, 0x96cf7ffe,
- 0xf3f0112d, 0xd7cfef00, 0x6e35e31f, 0xf61b96b5,
- 0x1645d2ea, 0x9a6d54e0, 0xbefd1245, 0xdae87f14,
- 0x56eb83de, 0xec5e7d1f, 0x9c023853, 0x771fe4ab,
- 0xece4538e, 0xacda1d06, 0x9fbaa127, 0xf717f714,
- 0x4e1a3df1, 0x4b1f58d4, 0x1c7c69ae, 0xf7aa8cc1,
- 0x48c5795d, 0x2b4a7839, 0x2f549eb3, 0xb17deeae,
- 0xb70c9639, 0xce18be08, 0x29cc7d87, 0x7dbebd98,
- 0x3708b02b, 0x580c175d, 0x61fe14c2, 0xedef9ebe,
- 0x6ab07642, 0x61e59251, 0xc2c6cd63, 0x5b44a72d,
- 0xa1d934dc, 0x4bba8f16, 0xd6bed796, 0x9ed4635c,
- 0x4bc7f0e3, 0xc9e84a74, 0x36cb3224, 0x71349c43,
- 0xfc216dc7, 0xa1f0e269, 0x921813c2, 0x6dfd38a4,
- 0xa160d1f9, 0xd0013ba2, 0xb01cb55e, 0x7fb06ae2,
- 0x6d060a20, 0xf321e0f3, 0x7b2bd14f, 0x57ff444f,
- 0x71561500, 0xf1d50771, 0xa30f2a0e, 0xf91ae7e5,
- 0xe46b561f, 0xd123ea4f, 0x0485bdbe, 0x26427e50,
- 0x0398399d, 0xb68cff28, 0x93ae74c6, 0x99bd6359,
- 0xd1a116f1, 0x87d464ad, 0xfb62112a, 0xddf2b528,
- 0x244cdc6e, 0x946bad29, 0xd24db484, 0xe0db5b0a,
- 0x23f15645, 0x581dde3f, 0x5ead934b, 0x0a4e768b,
- 0xca4b7134, 0x54eea26d, 0x3ac2fc6d, 0x1cfdacdc,
- 0x2b72db1d, 0xaf346626, 0x2cf087f9, 0x49f70c8b,
- 0x6115cc03, 0x190a6658, 0x9c5d23e0, 0xe49f8106,
- 0x8e7df080, 0x9d7c42a6, 0x5fd7212b, 0x5e4a732f,
- 0x38968ae9, 0xef65bea1, 0xd71ed34f, 0x7dd287df,
- 0x25fae5cb, 0xbf98a2e5, 0xbe196a29, 0xe7ff1c36,
- 0xce06477f, 0x5bc5defe, 0x281cedf4, 0xad3f6523,
- 0x74dba05f, 0xbc665231, 0xd467cd4f, 0x91f8962f,
- 0x33af9d7d, 0x04489e82, 0x8ae649a0, 0x9600f2c0,
- 0xb92341aa, 0x7f4cada0, 0xf9bb8dce, 0xb8e2ab84,
- 0x6a204931, 0xcd847483, 0xc1955877, 0xd680c1f7,
- 0xb331bc5e, 0x8f8b4b88, 0xdd339331, 0xfd745177,
- 0x8f05796e, 0xf3744f1e, 0x15936e1a, 0xb63269af,
- 0xaa5c9429, 0xd140fea5, 0xfeca6e63, 0x5b3d3df5,
- 0x188cd709, 0x1b31fbf7, 0x6fa460f3, 0xfe5a8d6a,
- 0x7d7357f9, 0xe024a932, 0xafce671e, 0x5c4a1ab3,
- 0xf28526ed, 0xccb7f64f, 0x4affef38, 0xa71bb42d,
- 0xb570f6df, 0x1cf39e4a, 0xa36edc29, 0x7863d050,
- 0x7cd4cacb, 0x98edea74, 0xdbba6a1c, 0xb4b368b6,
- 0x2417280b, 0x88713157, 0x2431dad4, 0xd7bfcd43,
- 0x226a5a63, 0xc41861aa, 0x31ab4635, 0x90ecc7b3,
- 0x6e32d2f8, 0x62b31865, 0x3a0a4560, 0x1b5873e1,
- 0x825983f7, 0x66d48f0f, 0xccccaa51, 0x06521343,
- 0xf2f0820e, 0xdb97a2fe, 0x9876f69b, 0x53a2c1c5,
- 0x22055f01, 0x554e5b14, 0x9707975c, 0x9f67825c,
- 0xa7641a4d, 0x31f66056, 0xc4b60c05, 0xf5975ead,
- 0xd37c4c98, 0x1b4ee33a, 0x24d0e94e, 0x25526b51,
- 0x58dd0968, 0xb7ce30e1, 0x1904f14a, 0xdb5d5738,
- 0x68a1e735, 0xc107dfe4, 0x6dcfb718, 0x85d0ed4f,
- 0xb9f7e5f2, 0x82d238c8, 0x29352162, 0xa77a3522,
- 0xa079166d, 0xa3bb9275, 0x2903169d, 0x61c980f4,
- 0xddc91413, 0xf010ba6a, 0x31c0b54e, 0xb8c96662,
- 0x095c0d76, 0xd8cec25d, 0xdeaa554a, 0xa4de2784,
- 0x0dd03033, 0x971ef5f5, 0x1c45995e, 0x9b363baf,
- 0xafdfa811, 0xc7ff05eb, 0xd2d7dbd9, 0x4bc1b145,
- 0xd2397d2d, 0xa279d171, 0x4e956b1f, 0xb2f7673f,
- 0x8e8ea35e, 0x7642504c, 0xb739ad78, 0x0a88c121,
- 0x4d8c27b5, 0x8a7ece52, 0x93fd2121, 0x8d923062,
- 0x26c234d2, 0xf140034c, 0x717c472c, 0x2e26ed56,
- 0x7adb8be0, 0x710b5063, 0x2ccaa6e1, 0xd617eff3,
- 0x8e48c710, 0x75091c92, 0xdf38967e, 0x9fcee5c3,
- 0x7c7c85a3, 0x8459301f, 0x2ab73b95, 0x10a220c8,
- 0x954da298, 0x0d3d765c, 0xc1cf5234, 0x83a209d2,
- 0x62fd8a04, 0x866d5c9a, 0xeebf64cd, 0xc16ad5cc,
- 0x0c318444, 0x2e853253, 0xb018e4bf, 0x23d70987,
- 0x6d577c67, 0x48baeb3d, 0x5d12bd44, 0x452679b5,
- 0xede886e4, 0x60d75e53, 0xfaeacd65, 0x956c3293,
- 0xc2c3e0f4, 0x6a614952, 0x85bfc57b, 0x2adc641f,
- 0x27bafb9f, 0x85453c9d, 0x8a0bf885, 0x54813714,
- 0x8c2da9ce, 0x9862e196, 0x53608eb9, 0x50cb1cce,
- 0x2e5fde04, 0x6001c4e3, 0xe7afb6e5, 0x35a1d538,
- 0xe5965475, 0x71550518, 0x25624264, 0x24b85892,
- 0x1f46861a, 0x5902ff04, 0xba886bdf, 0xaf6b111f,
- 0xe702147b, 0xb868b219, 0x5450e53d, 0x26400643,
- 0xc7cc3b00, 0xfe4a7f61, 0xcd0cec5d, 0x55fa74e5,
- 0xab4aece6, 0x594801f7, 0xa4c700b0, 0x263eafd2,
- 0xca5157c2, 0x87cbed00, 0x3fa19c0d, 0x30d1583b,
- 0x774a1bc2, 0x7ab8728b, 0x51b9da00, 0x11e7b913,
- 0xb621d527, 0x20e15cb5, 0x468ada88, 0x22cf6e59,
- 0x272f671f, 0xb7c6e619, 0x0cde1a07, 0x4b1040a6,
- 0x06ce0c54, 0x445887ea, 0x3497265f, 0xc57b1d5b,
- 0xcc28db4e, 0x142326cd, 0x269ec4c0, 0xda176039,
- 0x29387952, 0x00819916, 0x44bf30ce, 0x16682b6c,
- 0xcefb02de, 0x0a8f1c1c, 0xf329ccc6, 0xb7254388,
- 0xc0adbd5a, 0xa73db62d, 0xcf007f8f, 0x2193c371,
- 0x878bf5a4, 0x40133190, 0xed4e6469, 0xfd548f7a,
- 0x6de3ee2f, 0x7482390c, 0x7686cda4, 0xf0968c8a,
- 0xbd884ca3, 0xbe9f759a, 0x5e847e97, 0xb5751c67,
- 0x80164301, 0xaed7f727, 0xd64b6214, 0x54d4056c,
- 0x209bacdb, 0xf7a1dd4d, 0x373425b4, 0x220f5e83,
- 0x94619726, 0x9199b9ff, 0x7ca4009e, 0x3a9f4df3,
- 0x043091df, 0x598f1b88, 0x8e541a7b, 0x9993f3cc,
- 0xa7a32036, 0xc92d145f, 0x1c7710b7, 0xe844402b,
- 0x4db7621e, 0x5ad0026d, 0xbf78fc6b, 0xd864c7bf,
- 0x5511cf7f, 0xd1cf34ed, 0x3fd39550, 0xe9a1d9d0,
- 0xa5357ffa, 0x6cbb33bf, 0x9dc1eb2e, 0x6f187cb8,
- 0x5004e814, 0xedc31d16, 0xee64e9d2, 0x950a8aa5,
- 0x97262d0a, 0xc9e6db62, 0xad18ffbc, 0xc817ee0e,
- 0xc7e10ceb, 0xd41b86e4, 0x561ef40b, 0x9883c061,
- 0x25805f56, 0xa2627be3, 0xeff8c394, 0xb62fa8c0,
- 0x3d1f2f44, 0xcf84fce7, 0xb43e9a4e, 0x66ad46ac,
- 0x3fa2f210, 0x838fe161, 0x8e56451a, 0x06a906c2,
- 0xe8840faf, 0x5ac47e9b, 0x6a71b661, 0x2ec8cd2e,
- 0xe6e0e8f8, 0x9707b6ef, 0x99cc54fc, 0x81e846c5,
- 0x814eeb22, 0x8ada0add, 0x7d19266a, 0x69f7a703,
- 0x9aac18aa, 0x5b9cfc8c, 0xf919dfb4, 0xa94e43f1,
- 0xbb74a48a, 0x6cf705a7, 0x8f3e6307, 0x9794e695,
- 0x1651e6c8, 0xe89b31fa, 0x43f7ba10, 0x2a514f1c,
- 0x1e7bfed9, 0xa93bce47, 0x3a6e4532, 0x9e374769,
- 0x9c536590, 0x90b0b81e, 0xefbfdfe5, 0x69ca533c,
- 0x4ecbf634, 0x1b8c8263, 0x0374ec8f, 0xf702dbc7,
- 0xd045ec79, 0x192b0095, 0x5829de23, 0x881e4918,
- 0xbbdf15fd, 0x3f32a538, 0x288366e6, 0xcfb220b9,
- 0x3ab3180f, 0xa4bf51fd, 0xf4e01603, 0x713d18fc,
- 0xb909f63c, 0xdae85bc1, 0xd9b969ab, 0x0b2538f6,
- 0x2dd34ba7, 0xddd6e0ae, 0xc96bba5e, 0x7c9f4215,
- 0xf1f09f73, 0x6e7fc99f, 0x81f44af7, 0x13f118c5,
- 0xfa44cf12, 0x8b5e93c4, 0x6f707ee9, 0x4c81e0b4,
- 0x60969387, 0x8081f7e7, 0x05f90a32, 0x327f334a,
- 0xb0bc3d5d, 0x347b402d, 0xe7b67c17, 0x94ab5369,
- 0x47ceb456, 0xf22facf0, 0x4234359b, 0x54953e7a,
- 0xd2bb1870, 0xe223c3ba, 0x7b0ff382, 0x61963879,
- 0x5eb4e268, 0xd4bce3f8, 0x573a4335, 0x9c9979eb,
- 0xa2a9b2ee, 0xe86c6e4a, 0xefb9fbb5, 0x2b5759f0,
- 0x04c2b2b2, 0x4192fc64, 0x3ffbecb1, 0xf7308321,
- 0x2a8c4ffe, 0xc5f17893, 0xe83dddef, 0xc19b9577,
- 0x0bd28f37, 0x2135b42a, 0x7ecbc7ed, 0x972340c1,
- 0x0c576383, 0x17433c6a, 0x42ed452f, 0xb884852c,
- 0x1b584cd7, 0x165b59c0, 0xedae4aa0, 0xe4398ea1,
- 0xc40cdd64, 0x709d9c48, 0x24898031, 0x8b9bff2b,
- 0x6c024eaa, 0xe6fe9c19, 0xfcb23fc7, 0x6c0b4208,
- 0x3e111e68, 0xfa8f70bd, 0xd9ffdacc, 0x3a2ef4b7,
- 0xdf2037cd, 0x75d43850, 0x9e879700, 0xae1316e8,
- 0x9c7ffb47, 0xeaa9d230, 0xf9480bc0, 0xc69ca1c3,
- 0x9abf7e78, 0x8a4c9c38, 0xd8b4dd75, 0x83131c68,
- 0xcd2ffebb, 0xfde3d386, 0x51d9950c, 0x5a35007b,
- 0x73d4edc7, 0x7a3947ab, 0xc07ecb2a, 0xf9f7a977,
- 0x731a8c62, 0xc2ee4ddd, 0xa41b5e38, 0x18c3967b,
- 0xbeef769b, 0x27f78249, 0x44cd1694, 0x12624897,
- 0xfd2ed164, 0x60de1fa7, 0xcc7063c0, 0x1e5ffb83,
- 0x1cfac0d0, 0x386b1121, 0x22adc69d, 0xd406eb21,
- 0xde5959e3, 0xf053ad2b, 0x7798db5b, 0xf99cfa5d,
- 0x7b5391d0, 0xc982d53a, 0xc63e25bc, 0xa607c935,
- 0x554a53ba, 0x55dd374b, 0x610b228e, 0x975af7ba,
- 0x58abf083, 0x1bbb059d, 0xa210322e, 0xc9ac4c66,
- 0xd54aeb4d, 0x79ea4b22, 0x28fc7933, 0x578c8d15,
- 0x6510f9d5, 0x218213d6, 0xfb9d7a05, 0x49beb8dd,
- 0xf8a08a0a, 0x880fe164, 0xc41f266c, 0x830ff8a5,
- 0xb29e2611, 0x302f3065, 0x6ba9affc, 0xc0467ed2,
- 0xef11ac86, 0xc11edf26, 0xb7b23c2f, 0x608ca952,
- 0x032e2b74, 0x4dd90e3b, 0x181638df, 0x116a7204,
- 0xc43e188a, 0x882f6729, 0xf72658ab, 0xcb1a34d3,
- 0xab040797, 0xbf073fd3, 0x869f28ec, 0xbb56384c,
- 0x5c3586e3, 0x3adcb5bf, 0xfe52aa43, 0xb1c90e8a,
- 0x3da63282, 0x96de578b, 0x5a87e849, 0x407f540a,
- 0x489b4576, 0xc867c3bf, 0xec270d1b, 0x2681cd54,
- 0x0b58c35e, 0x31bda6f8, 0xa8a53574, 0xd72c5c17,
- 0xce4ae157, 0xd37a8963, 0xd19f1f67, 0x4adae3b6,
- 0xefed933c, 0x6109b0ff, 0x0678fec6, 0x8c4d0710,
- 0xcf427bf2, 0x99929120, 0x3b4be2ac, 0x6156ce40,
- 0xd82c7c0a, 0x45031039, 0x87aaf12c, 0x7fe780e2,
- 0x5bd1641a, 0x4a652116, 0xcbb0282c, 0x4cc6422d,
- 0x455b1ffb, 0x269b9ed0, 0x40154c8e, 0x858b5d90,
- 0x288b74a0, 0x93db3461, 0x0e8fcba0, 0xb5e229eb,
- 0x78f0b895, 0xf912c2b2, 0x1909c95a, 0x1977e7b5,
- 0x6790e9d4, 0x346aa36f, 0x8f746b89, 0x871e3209,
- 0x8d39520e, 0x3e1bd336, 0xdb9e1551, 0xf2397c8f,
- 0x3aadcec4, 0x78e3e450, 0xf3a3282f, 0x5d5f0097,
- 0xa4b0b527, 0x5ae0e620, 0x75d11fa7, 0xc26d3ca8,
- 0x1c346346, 0xae9995f5, 0xff82ac22, 0x88adb589,
- 0xf7cd6606, 0xa9f700bb, 0xbbbda493, 0x5ce3a134,
- 0x0b5bcdd2, 0xd08ebdbc, 0xb8f3aed9, 0x0bb5bbc6,
- 0xbd1b3cc8, 0xc0157f5c, 0xc3c1a169, 0x74f37092,
- 0xa47ceeb4, 0x8adb10ca, 0x728dd1c0, 0x7ae3da24,
- 0x4db77331, 0xc9672bd1, 0xe1dff5d2, 0x02dc7586,
- 0xd84b722e, 0x8a9a9785, 0x0573f800, 0x70ec48bd,
- 0x9b9e0dfb, 0x0023ddd0, 0x2865b11d, 0x4d94744f,
- 0x1511a892, 0xb8870149, 0xfae7b22e, 0xaf62fb18,
- 0x5bc02cdc, 0x3c141e07, 0x7b20f75c, 0xd23a008c,
- 0x3e44f105, 0xd70075a8, 0xf41a37d0, 0x173548c4,
- 0x650aebc1, 0x03a2fe59, 0x46d34565, 0x67844700,
- 0xb93672e4, 0x0b17aebd, 0x7e3b080c, 0x5d3a4468,
- 0x1bba2fcc, 0x33976b5c, 0xe53839a1, 0x58aff6ee,
- 0xbf254846, 0xd5a134fe, 0x534e36be, 0x90207d1a,
- 0xefdef4f2, 0x81237fb9, 0x26a0388b, 0x6be9f6f1,
- 0x79b05ddf, 0xd28d8216, 0xc44632d5, 0x6d947d94,
- 0x9182a6b8, 0x9c1700f6, 0x5d4cd8e3, 0xb98b66bd,
- 0x43c5d447, 0x468ec70e, 0x2f733f48, 0xa15cbf77,
- 0x7a1229bf, 0x25bac348, 0x1666e4d5, 0x112656ab,
- 0xa70a776b, 0x9442fd97, 0x99369f89, 0xdd584396,
- 0x584b3ead, 0xef970e3f, 0xc8f094c5, 0x2338430b,
- 0xf9741b19, 0x46cbf552, 0x7e44da18, 0x997fac2f,
- 0xc9728915, 0x166271b2, 0x25944ecd, 0xafd32f0b,
- 0x5a2aa891, 0xd173fc4f, 0xeeeb9841, 0x6355237c,
- 0xdec80496, 0x0b17fad9, 0x8a98cf2f, 0xb9e0b54d,
- 0xadd4629c, 0x190a9dbe, 0xbff95d93, 0xc395409f,
- 0xe32d0202, 0xe11ccbfa, 0xa9b9d56d, 0x19df6eed,
- 0x553e522d, 0xa5150e7c, 0x7cdd2477, 0xd5e50f71,
- 0x867dceb4, 0x5ad6001f, 0xf88f5e73, 0x1548cc85,
- 0xee19bb69, 0x723b54db, 0x7182737a, 0x2637ef3d,
- 0x0d07b151, 0xaab82782, 0x1a67f480, 0x427cbfd0,
- 0x76bafa88, 0x2201b5ea, 0xcd476d93, 0x6621fe11,
- 0xe71632e2, 0xf2babb88, 0x4751dfe0, 0x65ae2697,
- 0x715e35c9, 0xb4c68b5c, 0x4ea5d76d, 0x7964e9f5,
- 0x5d41f041, 0x9545f953, 0x3aeabf4a, 0x1e686a87,
- 0x4466e931, 0x1b085197, 0x3fd99ec6, 0x16d9ee38,
- 0x3b443801, 0x0c62be56, 0xde6a506e, 0x70248e0c,
- 0xd43fc5fa, 0xffcbbf1f, 0x0597777d, 0xc4d757e0,
- 0x2c3863a3, 0x406c484e, 0x5c93ccd2, 0xa1915b85,
- 0x5cef9263, 0xae54c85c, 0x80ab4b36, 0x5601ae18,
- 0x9d4b3896, 0x4bf6daab, 0xc9a1d31b, 0x3cdd788a,
- 0xd68a1f8e, 0x963eca4f, 0xcfacc55f, 0x5bf01c2a,
- 0xb8095201, 0x1b243c11, 0xe0be3993, 0x92dc9ee2,
- 0xdcb7a9fc, 0x1e297a5f, 0xb955d798, 0x7720ec7e,
- 0xbed66060, 0x406bcd05, 0xf07df4c8, 0x0f15fb66,
- 0x4cc4bc87, 0xf7fa2ff4, 0xf9df4483, 0x96ed18a1,
- 0x17684906, 0x50437e25, 0x2732ad5a, 0x090dc7ec,
- 0xd35e9357, 0xcd80ee47, 0xb2246342, 0x7c7cf4e3,
- 0xa6113203, 0xda27c828, 0xb5c6052c, 0xc88236b2,
- 0xb9717be3, 0x1dce1918, 0xc61d96ee, 0xdad16f5b,
- 0xa4edaa73, 0x09b62bbb, 0x6ad57010, 0xd5439798,
- 0x928d2ff7, 0xa77cbccd, 0xd1a74104, 0xd391b849,
- 0x582f4930, 0x987718f0, 0x9ce39f53, 0x30b123a3,
- 0x25fd3e8f, 0x53020467, 0x1b64a6ac, 0xe3348470,
- 0x1f78ea67, 0xc0f8d448, 0x5f27532a, 0x0fadce33,
- 0xcdbc62a7, 0x6c0d76ec, 0x9d7bb6e7, 0xd0540d19,
- 0x8d7ca1ed, 0x215a87b3, 0x5d5781c4, 0x692bd8c3,
- 0xf3378f13, 0xcd30e3af, 0x69404c11, 0x6eca1552,
- 0x0c259cd2, 0xb3ee39a7, 0xe8891fd1, 0xa175a5e8,
- 0xd9df300d, 0xd08f5352, 0x603ed07c, 0x99f600e3,
- 0xc930a060, 0x799719e0, 0x088f4e20, 0x7c1ddd7d,
- 0xf4b3a502, 0xd3c55950, 0x84a79d2c, 0xafc5c205,
- 0xa3b054ff, 0x1b95436a, 0x35d7e834, 0x7dba2f8a,
- 0x4fcd13d0, 0x73a066b5, 0x3e953765, 0x502968f0,
- 0x48685f18, 0x40d75838, 0x146de6fa, 0xf740666e,
- 0xcf192aa7, 0x12d75036, 0x54a1bd85, 0xf0b5ba44,
- 0x566525c3, 0x0b09fa0b, 0x1b13cb17, 0xffa7ac52,
- 0x6d3cb7fe, 0x664e7783, 0xce2c070c, 0x5a4620b0,
- 0x2885b271, 0x7b65bf03, 0x9b0d39d4, 0x3a7014e5,
- 0x08b92c70, 0xed569496, 0xb4c52a10, 0x7112b539,
- 0x17aa1a9f, 0xcb6e1e6b, 0x516eae6d, 0x4ef0f35c,
- 0x3c8c0d44, 0xbb9bd760, 0xe643da0e, 0xc9cface0,
- 0xf1011dfb, 0xb281e276, 0xa87f200e, 0x15e1d187,
- 0x823cb7da, 0x252b6fac, 0x0bfcf155, 0x008f7fea,
- 0xad82caf7, 0x1e5c40ad, 0xbf3b9a11, 0x4246331a,
- 0x803154e5, 0x0ffd9e62, 0x3e5d4acc, 0xd9ce46c7,
- 0x3e5a621a, 0x462d1772, 0x5d7cb636, 0x3bf8d751,
- 0xc0f09ff1, 0xd5d47ebe, 0x19d80c9c, 0x679f69ed,
- 0x72e6e407, 0x200029e1, 0x2c64f391, 0x643cda60,
- 0x5a5bfb05, 0xa904a860, 0xcdfb83a8, 0xa85208ac,
- 0x9f681117, 0xe5e4e0f4, 0x6905d4b1, 0x9fe6a725,
- 0xdbb8207a, 0xe2e0f1fd, 0xa8244e4d, 0x7cea2179,
- 0x9570026c, 0x93412c43, 0xd907c02a, 0xaaf792bb,
- 0x0e0936f9, 0xacebd3d4, 0x013c7b7b, 0x2b2bf6b0,
- 0x50cab382, 0x8ca022be, 0x7b6abbb5, 0x3de76e3b,
- 0xa5c5c4a0, 0x19cff42c, 0x5cdc0cf9, 0x063ed260,
- 0x6f5f9d21, 0x450617d5, 0x52ef21a3, 0x5b77bb8c,
- 0x2ca46d8f, 0x79006971, 0x00329d75, 0xa8d79c3a,
- 0x63603db1, 0x6c655820, 0x52402d3a, 0x78db9e76,
- 0x5bcc235c, 0xda5a72ed, 0xaa3b4490, 0x7578b248,
- 0xb8c0a56f, 0xc235b082, 0x22a49a70, 0x857540c7,
- 0xdf31602d, 0x85fb2110, 0x15dcadbf, 0x02983291,
- 0x344be753, 0x5304430e, 0xd19cfa2e, 0x851cdcd2,
- 0x3fa09c0c, 0xc26b2584, 0xaf620389, 0xce6775df,
- 0x347a74f5, 0xe433e672, 0xf14892f1, 0x4cc98dc4,
- 0xe280f3fc, 0x8feaee9d, 0x20dbacc0, 0x441250e2,
- 0x1b6097c8, 0xa2f2f494, 0x19f7234a, 0x24940434,
- 0x5465b1a8, 0xc5662a79, 0x4f31d1f4, 0x249ea959,
- 0x881b0f31, 0xb5762ca9, 0xc3af5796, 0x80608359,
- 0x8981a871, 0xfbe2cd9e, 0x7a1da627, 0xa4dfeb2c,
- 0x07f5da7e, 0x4a621101, 0x86d5fc65, 0x8b01d35c,
- 0x6ee3ec81, 0xd7c70c56, 0x13549171, 0x0dbb64be,
- 0x2fdadb74, 0xc1e1c1ef, 0x540a102e, 0xef635b56,
- 0xd28fb2e6, 0xe4ce6815, 0x8bc07adb, 0xd22226e7,
- 0xea5452e8, 0x0d636a22, 0x3f36e416, 0x65924428,
- 0xc689edc1, 0xec96af4e, 0x14d8bc2d, 0x0e77541b,
- 0x89c9722d, 0x10b56804, 0xb2d38782, 0x79ea1ea6,
- 0x2e861537, 0xfa167b5c, 0x364049a2, 0x59219c57,
- 0x69f573fe, 0xc6c2d492, 0x09f4230a, 0x24d926eb,
- 0xe4a045fa, 0x282fd868, 0x06d0d112, 0xa32ef962,
- 0x6d8ddf0d, 0x64e4bb75, 0xe2daf8b5, 0xfad8c656,
- 0x5b6213b6, 0x564867de, 0x7f396777, 0xba003008,
- 0xdcbce73b, 0x0276742c, 0xd1798208, 0xa73a9b0b,
- 0x3a3453d6, 0xbf0ab4b7, 0xb8f386d2, 0xb482f58e,
- 0x010c34a2, 0x5ab9ae11, 0x084342a1, 0x4de229d9,
- 0x7eb0019d, 0x6f9c48d1, 0x9b7c7254, 0xe72fe7f4,
- 0x61d3c6d0, 0x5f325f9d, 0x2c0dd201, 0x4e88ae87,
- 0xead0a615, 0x77377e76, 0xdec9367d, 0x7176424d,
- 0x8948bab3, 0xaecd7619, 0xa542cfad, 0xe114c986,
- 0x45a89d9b, 0xd65caf42, 0x959cc728, 0x8c46bc72,
- 0xee82cb66, 0xb74b127f, 0x888043ee, 0x45f215dc,
- 0x31757661, 0x954cc945, 0xa8d8fc3e, 0x89d7cc0e,
- 0x05fb1850, 0xbf55a4e0, 0x9d07b5d2, 0x8ed19aa7,
- 0xbd213124, 0x871dcadd, 0x88f3583c, 0xc533e4e8,
- 0xa193e265, 0x9184dfc8, 0x076fb6b8, 0x0c988f7f,
- 0x09aa99c2, 0x0202e9b4, 0x6089972e, 0x04683e2b,
- 0xeb162f9c, 0x4575cfe4, 0xe14e5bb6, 0x5536cc7f,
- 0x3e325a0c, 0xdf6ea889, 0xbe12bf6a, 0x8c270854,
- 0x823faf43, 0x1e190166, 0x4bf5f2ba, 0x1a0eec2e,
- 0xacf0b04b, 0x36b28a5f, 0xfa152239, 0x0a220498,
- 0x799202d3, 0xb9679758, 0xcfea054f, 0x559a74cd,
- 0x0c3b6b9f, 0xe5b176d3, 0xc861a763, 0x96a0a5f9,
- 0x9c2a76f0, 0x51c40c7b, 0xaec7424f, 0xec483091,
- 0xcf173270, 0x5e645d94, 0xd55fe28e, 0x3c7bd81a,
- 0xdef2414c, 0x6609653b, 0xd783e959, 0x5eecfa89,
- 0x17c428a2, 0xe04470e1, 0xeb0fdf02, 0xa1049ca5,
- 0x29a1a12b, 0x5421341c, 0x28173e87, 0xd0bbc827,
- 0x3ec3e501, 0x6a4585b0, 0x25bb6bfc, 0x377b41f0,
- 0xc73415ac, 0x19c84967, 0x34dacefb, 0x095677f7,
- 0xedaa36ac, 0x327c7594, 0x6f23fd0a, 0x69c351ca,
- 0xe8001214, 0xd8396899, 0x13da8cc6, 0x39a31562,
- 0x20c87663, 0x8d3059ae, 0x69d8bc6f, 0xd8b5f3f4,
- 0xf9601dca, 0x6f77676d, 0xc1b56c2f, 0x771e2935,
- 0xbf4ae95c, 0x23718ca7, 0x0c765f79, 0xd45e2d00,
- 0xb0d04243, 0x5f5feaf6, 0xf0460fd3, 0x7b7056c1,
- 0x899d8e9e, 0xed52bb18, 0x52685147, 0xf1dde703,
- 0x7d5be459, 0x294106fd, 0xd1645027, 0x20df9a18,
- 0xa20e6dce, 0x188c901e, 0xc5185655, 0xd57af73d,
- 0x4cce7042, 0x1717b7c8, 0x98ea58c2, 0x25877371,
- 0xa8d4a700, 0xa2352903, 0x490926aa, 0xbdde05b4,
- 0xc7399b70, 0x70947833, 0xf049aaf9, 0x71eedb1a,
- 0x61bfa5c9, 0x4b5c6202, 0xb02d0e70, 0x555dcf28,
- 0x10aead7e, 0x0cdcde62, 0x790ee757, 0xf19bcee1,
- 0x671af1c2, 0xc1e9a032, 0x10a1ec98, 0xfe276456,
- 0xae468a82, 0x4ffad70f, 0xe5bc85c5, 0x94ac79fc,
- 0xc6cb0e54, 0xe377d805, 0xdda376f6, 0x617fae47,
- 0x67bfcef5, 0x0cbdb05e, 0xc527ec76, 0x7ce4e25b,
- 0xdbd522e5, 0x01015c63, 0xc2f88b4d, 0x763516bc,
- 0xa6e3d01b, 0x11cf5fbf, 0xae998260, 0xa8bbc7fa,
- 0xa3a71f1d, 0xbe3c66b1, 0x7f01fc61, 0x7c76b159,
- 0x0a818527, 0x947fc14d, 0xd506d85d, 0x00fa3d7d,
- 0xb2559817, 0xab8fbb90, 0x1512e524, 0x9862b966,
- 0x2211ea00, 0x3655c2c2, 0xfe68365d, 0xaf4f4922,
- 0x93e4c4d3, 0x9ccf0e43, 0x519737b2, 0x012a1a4d,
- 0x3102ad44, 0x39cb3d83, 0xe25c92ff, 0x90803cd8,
- 0x82e8a160, 0x0df879f9, 0x172e2e59, 0x4555531c,
- 0xaa90ffaf, 0xaaa7551d, 0x8854dbff, 0x8d506eec,
- 0x554f911f, 0x75681d0d, 0xd81358c6, 0x9a4374e3,
- 0x07262862, 0x020d1289, 0x60a5d925, 0xe0a9da60,
- 0xab05f8ea, 0x5c1a6ddc, 0x520669df, 0x776c2e01,
- 0xe2d7eb1d, 0x1533d7d5, 0xd7ec9e1c, 0x8998bd4e,
- 0x1eaea14d, 0xf824320e, 0xd650bfc7, 0xe03e581d,
- 0xbb7811fb, 0xc06d47f1, 0xb016ffe2, 0x6ef636d6,
- 0x084bcbfc, 0x1c2931ac, 0x4b1d6d23, 0x5b52df0c,
- 0x6722deff, 0x6637ec34, 0x50d7cac4, 0xe93acf27,
- 0x0a5f1c96, 0x6691baa8, 0x196ac6c7, 0xde02c7d1,
- 0xc6654cc3, 0x92fc77ad, 0xcbddc53d, 0x8812077c,
- 0x2c24e386, 0x5dc3ae0d, 0x288ade1e, 0xa7b2980a,
- 0x9e074d68, 0xf56ebd28, 0xdc7407df, 0xf739962d,
- 0x4265150d, 0x67547248, 0xdba6123d, 0x9d901e31,
- 0xb5f7371f, 0x902a417a, 0xa5461e34, 0x8f95942d,
- 0xf9128b96, 0x246c3b84, 0xdbe723c8, 0x33af8832,
- 0x07947cd0, 0x3120ae67, 0xe2cb3f25, 0x561fd013,
- 0xec94aa93, 0x30d544a0, 0xb6146e73, 0x5f9eb72e,
- 0x4ef4974c, 0x7388faa8, 0x80ccd000, 0x1645ba2a,
- 0xc1931822, 0x5a8a90c4, 0x671a7821, 0x45cde72c,
- 0xcdf00e3e, 0x110e4534, 0x871b3a8a, 0x92871932,
- 0x389c033e, 0x518d3d39, 0x730bacdc, 0x224e87b8,
- 0x91a69e62, 0x67392c22, 0xc00fdc01, 0x7b4695ab,
- 0xac24e03b, 0x8b8b1c20, 0xa668ad83, 0xffd0c5f6,
- 0xf113ebe7, 0xeec07974, 0xd067e345, 0x30f784a4,
- 0x31dec475, 0xe7dc5b8c, 0x17fa9595, 0x6ed0f63f,
- 0x3b9e89d6, 0xee95b6d0, 0x09519cf1, 0x894685b1,
- 0x1a4f5783, 0xcd0c7c3a, 0x4a29d4a6, 0xa6297b75,
- 0x3113e482, 0x7d7c6671, 0xce65e003, 0x2961622e,
- 0x9de0f171, 0xd81bec53, 0xfe3337d4, 0x6a41a1a2,
- 0xdaf4c822, 0x35b83ec7, 0xbd65ba4a, 0x97712528,
- 0x04965784, 0x0ff7c2c2, 0xbadcd742, 0xa825284b,
- 0x034e703c, 0xae374dc4, 0x9c62ab4d, 0x49240dad,
- 0x3df6d1e9, 0x2671ba57, 0x284d6257, 0x8195e532,
- 0x81250fc5, 0x1cdfd75c, 0xd6018cd9, 0x55fac417,
- 0x95273244, 0x0882b932, 0xfba4a7c6, 0x3e3f7d12,
- 0xe02b2500, 0x28142bc2, 0x86b771c1, 0x76479eb7,
- 0x54189bf8, 0xd8098873, 0x1074c551, 0x11476fe8,
- 0xd7e328b0, 0xdfcd1c8e, 0x657861fa, 0x80644d26,
- 0x6e9995f5, 0x8e3d70f4, 0x1872816b, 0x950ca6ee,
- 0x8a4521ea, 0xeba371fe, 0x02320c81, 0x626a3d66,
- 0x3c71ce24, 0x11a6e15d, 0xb97efbb4, 0x60ffc428,
- 0x851831b4, 0x12283e5d, 0xc2be679a, 0x59737083,
- 0xc69d2df8, 0x29efd7ea, 0xd14e844b, 0xd723830a,
- 0x533dc25d, 0xdbedd2b4, 0x7fb501dd, 0x4a0dd00a,
- 0x264dc555, 0x6fd4a058, 0xcb4db177, 0xafd67e51,
- 0x6ff5bac1, 0x33f1af1b, 0x14c157e1, 0x2d11d0c1,
- 0xe15f5e13, 0xb43cd253, 0x88b86a2c, 0xa3fed30e,
- 0x9584f524, 0x5edf52c3, 0xe4983055, 0x37d01498,
- 0xd0275470, 0xdd2d0838, 0x05a6dc9e, 0xb448283a,
- 0x3e813cd5, 0x9d72aaad, 0x66d017ec, 0x1e55e244,
- 0xdec93a6e, 0xe514ccdf, 0xea794b51, 0x5f6e0aed,
- 0x9c99551d, 0xcc4949c3, 0xa35ba73a, 0x84cd2359,
- 0x3866e22a, 0x5409a77f, 0x573882a3, 0xcc31dbad,
- 0xa0268411, 0x40d8c5c2, 0xaab0d780, 0x3e52a338,
- 0x8030015a, 0xf6ecd2d5, 0x770d4674, 0x55b8f09f,
- 0xaf390b78, 0xe043eac3, 0x1fce72bc, 0x5c0a037c,
- 0x697e08aa, 0xd85bd8a9, 0x57481efa, 0x4916f2e9,
- 0x456ed05a, 0xae8cb722, 0x8f507d70, 0x76f6f39e,
- 0x2bdf5259, 0xf1f8d541, 0x2b50c778, 0xe5f9490e,
- 0x9d8b788e, 0x2baea68b, 0x34ba2d1e, 0x828cb929,
- 0x0f842b49, 0x76e0dde0, 0x5682f568, 0x66d1c5de,
- 0x634ef696, 0x212a8f6b, 0xa29756b8, 0x156219b6,
- 0x09a9fc7a, 0xb9249216, 0x4a7ae8b7, 0x53d14148,
- 0x13510bdb, 0x2131a2f7, 0x7df45c3e, 0xd50d3a2a,
- 0xae382656, 0x809eeddb, 0x78ddf724, 0x6edce7e5,
- 0xbb21c1f6, 0x081fc73e, 0x76869eea, 0xe06a86a5,
- 0xe4a2bd9c, 0xb78e5c40, 0x32ee8493, 0x7888aad3,
- 0x669131c8, 0x9a2c05a4, 0xbcf3d9c4, 0x3b412dde,
- 0x3cae2f74, 0x0744867d, 0xb7538ee3, 0xa520207c,
- 0x41289631, 0xe46e4aab, 0x1848e0d2, 0x19aad620,
- 0x30b327d8, 0x40c6f681, 0xae8dc046, 0x589dc9c7,
- 0xaa17e28f, 0x6dc85c0e, 0x74488e82, 0xc4208a25,
- 0x64d4617a, 0x5ee46a77, 0xffca0693, 0x5007f221,
- 0xcc4bf790, 0xe515c241, 0x27e79ffb, 0x1e38aa9b,
- 0x56197e79, 0xb435c115, 0x70e6ea5c, 0xe0a130b3,
- 0x77b85ff6, 0x85751cf9, 0x80e61f0d, 0xdd3868d7,
- 0x163e44b6, 0xfe3acca3, 0x1936a81d, 0xa1507e76,
- 0x04a15dcb, 0x624aa874, 0x388c1b87, 0x15360f93,
- 0x2e4a0833, 0xfd01216f, 0xe1ccb3dc, 0xd8f3105b,
- 0x6c07b2a3, 0x51ba0953, 0xe5400c7e, 0xcd086f8c,
- 0xfcc33cea, 0xd6035c96, 0x0eb2b33f, 0x1b265721,
- 0xfc44123f, 0x5bb66566, 0x74544487, 0x30ce8ed3,
- 0x557bb62e, 0x7e37f9ae, 0xce0cf72d, 0xe40b9628,
- 0xbd2cad80, 0x3c47fb99, 0x86c3716b, 0x14f19c64,
- 0xbfd75a2a, 0x6e6ebaaf, 0x5146233a, 0x0c574398,
- 0x2adeb48e, 0x1255340a, 0x1224d979, 0x647ab6c4,
- 0x7399aa83, 0x8ba6bab7, 0xb11f481d, 0x9a07a663,
- 0x12f4b1aa, 0x9dc75926, 0x10f33d85, 0xd147fd4b,
- 0xede5ad53, 0x5a7dc8bb, 0xd5e90467, 0x4cf132aa,
- 0x9198ea59, 0x21111e32, 0x01ef3a92, 0xb8e0e023,
- 0xb6353bcc, 0xd4833107, 0xa1625c21, 0xb6953811,
- 0x3f4d839c, 0x1001ca44, 0x65fdb0a2, 0x264ddffd,
- 0x6ffa6f31, 0x16b8e87d, 0x36462bcb, 0x48fcc93b,
- 0xa343a8b8, 0x8775ae4c, 0x9d99f458, 0x09ffe777,
- 0x35a61897, 0x92ef4fad, 0x73115358, 0x30e8b909,
- 0xe63b96cf, 0xbfe8eb51, 0x3f8ab778, 0xea8b03dc,
- 0xbe2260c6, 0x7f7cc442, 0x6cb62967, 0x4c35323c,
- 0x19f393da, 0x32c5e70a, 0x5e06843b, 0xef87551c,
- 0x13d9e5a7, 0x03ccc3bc, 0x6e69bd8e, 0xf9f06521,
- 0x684d9b89, 0xaaca7531, 0xadb35910, 0xcd89effb,
- 0x764761f9, 0x12351b73, 0xffc5dd64, 0x21210bc9,
- 0x640aa59a, 0xf2dfec09, 0x36d92a72, 0x07362c2b,
- 0xd1b9f122, 0xb54b00ce, 0xc05eaf0c, 0x61f9e747,
- 0x9b6cc9bb, 0x361a99e6, 0x2ea28616, 0x92b51282,
- 0x66a965dc, 0x93999800, 0x1bc8020c, 0xe5e9acd0,
- 0xb426c154, 0xd217569b, 0x489e1447, 0x9a066913,
- 0x671ed9e0, 0xd2cb03a1, 0x7b4d0ddb, 0xd3795f58,
- 0x768e4a58, 0x2279850f, 0xeeaed07c, 0xeb3e5af7,
- 0x3694bd4c, 0xad595170, 0x462f9ba2, 0xa37c9ea5,
- 0x2bb80262, 0x4fa7e8ed, 0xfae3d648, 0x3db9b455,
- 0x4518b3df, 0xcfecaf84, 0xfb4fc40f, 0x08e90140,
- 0xc89c4c7e, 0xfe94b9a1, 0x9513af4b, 0x1d90c5ee,
- 0x3d5d6a21, 0x56be9e74, 0xc7bfefdc, 0x61d41c68,
- 0x2dc29d7d, 0x46f5be73, 0x091ac556, 0xc1f10a05,
- 0x87d9e54b, 0xf83e8653, 0x17e28262, 0xeed60ac1,
- 0xc997e7df, 0xce95a43d, 0x1c033f7d, 0x642b6582,
- 0x61892ca7, 0x49a088d3, 0x936be1c9, 0x11d1486f,
- 0x782a6705, 0xe483befc, 0x8f476e91, 0x45b84525,
- 0xe2048cf9, 0x01d38134, 0x14c47aca, 0xacddb09c,
- 0xde347663, 0x115f90d4, 0x95672716, 0x0bd4f4c4,
- 0x36477877, 0xc14a78d8, 0xb14b4b4b, 0x6af2e0bf,
- 0xf313c909, 0x2f731e15, 0x5426fa60, 0x2d76cf6a,
- 0x47ffda79, 0x953d464a, 0x05768d14, 0x0f81f835,
- 0x98a06e6f, 0xd5a8b453, 0xc35f2c07, 0x15da054a,
- 0x584e2bb6, 0xd6126787, 0xf335c3a6, 0x070f1430,
- 0x02efef35, 0x4350f6f6, 0x2f1302eb, 0x888c76c0,
- 0x1fad1876, 0x3b284e92, 0x8ac49eac, 0x1c9116b8,
- 0x91ca04c0, 0x18f392b9, 0xe6b8f734, 0x6b1cc99d,
- 0x61649305, 0x8d14d72b, 0x6173c5d9, 0xaaf8e7fa,
- 0x16500d34, 0xe27bfb3e, 0xe6bf35c4, 0x386b8e30,
- 0x9fc1e9a4, 0x9f44bfb1, 0x37c899ed, 0x8235ea1f,
- 0x3044f5c4, 0x715e6b19, 0x638a2dfa, 0xc804120c,
- 0x045bd63f, 0x3c322ab6, 0xf6222404, 0xab4a2b6f,
- 0x0e8071b5, 0x5d0bd6d1, 0x84059106, 0xb581a9c9,
- 0x659c4796, 0x6eeb3f00, 0x5fafad87, 0xdeedc11d,
- 0x100cb39f, 0x405c0b2e, 0x24b08c9f, 0xa8fa5848,
- 0x342ec500, 0x18e8089e, 0xbec2f19d, 0xae085900,
- 0x5a2ac4b6, 0xdf23ea33, 0xd5cfda21, 0x0ade6068,
- 0xd5c41ba1, 0x184a9975, 0x35e1d998, 0xf015aa99,
- 0x730b911c, 0x658b33a8, 0x1a86c0b3, 0xce7496df,
- 0x7d234d7b, 0xa2e92853, 0x94fada37, 0x5c9161e0,
- 0xf4674e71, 0x0d842f6e, 0xf2065d2c, 0x1d72502b,
- 0xf5039fce, 0x484775b6, 0x1973bf73, 0xc4ba227f,
- 0xd65edf8b, 0x59463591, 0xd239638e, 0x96cf33a6,
- 0xd9197b41, 0xb8721cd0, 0x9eeca52c, 0x92a06327,
- 0x08f48d62, 0x18d0c9b6, 0xcad7d343, 0xfb072f8a,
- 0xb0c97b2b, 0xd88db393, 0xe72c5da2, 0x1c389579,
- 0x9adb7e4e, 0xd2cb1dbf, 0x209a9c94, 0x4220c981,
- 0x5bdc6ca5, 0xe3b078fe, 0xccf9dcf4, 0x6228bbd5,
- 0xcb7294c2, 0xc186fb0f, 0x27be619a, 0x4cf71d90,
- 0x4f2d1c45, 0x179f97c3, 0xf97727fd, 0x4c8cb801,
- 0x5a48ab57, 0x3b8db3be, 0x9b9932e8, 0x3727d15b,
- 0xd43e7d34, 0x59aab323, 0x78c972a8, 0x070e2f22,
- 0x91bbeee1, 0xf3112532, 0xfd43659e, 0xf51316e2,
- 0x6754e948, 0x58ce9072, 0x803d8f48, 0x4b32cf04,
- 0xeb4fe96f, 0x48ecfbf3, 0x0348e941, 0x74cd52c2,
- 0x669d7288, 0xaa17dacd, 0xc18283ed, 0xb2a046e6,
- 0x5926644e, 0xe3f4f200, 0xa88ce3e1, 0x1c9f67a8,
- 0x5e4a4d75, 0xd6a95fdd, 0x560a4bdf, 0xb986b661,
- 0x52a3cf3a, 0x9c341a96, 0xfc0d687a, 0xac1c9ccd,
- 0x5597940f, 0xc364389a, 0xc753eea0, 0x888a039b,
- 0x6835a25f, 0x337155c2, 0x28fefb3d, 0xf0b667d6,
- 0xc1966b48, 0xb0e458b1, 0x6b5c014c, 0x3df57166,
- 0x28b7de4b, 0x28cf6fc7, 0x8a99d5f6, 0x61f742e1,
- 0xce8896c7, 0x520de06d, 0xc98195a3, 0xfb79f11e,
- 0x83333890, 0x46a0b9ff, 0x987027b1, 0x5a99b9a2,
- 0x733abc25, 0x9df25e2f, 0xbb15d34a, 0xf79d19c0,
- 0x59453ee7, 0x3b46dc0a, 0x21aa97a5, 0x5be1073b,
- 0x6255a69c, 0x168f3960, 0x0b922f09, 0xcfb9b4f9,
- 0xeb85a443, 0x20538182, 0x40e6e529, 0x3da23239,
- 0xc4484958, 0x953533d8, 0xd5d6c7f2, 0xc5df7450,
- 0xbefa38da, 0x8c7935de, 0xbc7db0b9, 0x4847b56e,
- 0x50cd38b6, 0x4f886e38, 0x1efc2fc2, 0xf79b7eaa,
- 0xfdd91ea5, 0xcc26bfcd, 0x41b7947c, 0x50e172a9,
- 0x3aabc88b, 0x74891436, 0xd268ff36, 0xa3c4ca06,
- 0x0bb16d18, 0x717cd9bc, 0xec56c692, 0xdecfd1fb,
- 0x38c0e224, 0x96e9328f, 0x9d8b3c7e, 0x98f52ffd,
- 0x68a6d960, 0x73c5c885, 0xf25114e9, 0x58fa684a,
- 0xa072c8cd, 0x39062209, 0xd5b837ad, 0xc1282787,
- 0x806f7c5b, 0x69e239b7, 0xc828588a, 0xef590ebd,
- 0x8a1907a6, 0x5f6d2c0c, 0x2d2b5677, 0xd2cca905,
- 0x73ff0c85, 0xb65d45ce, 0x4ef87869, 0x7816f934,
- 0xc026bb7e, 0xfd1ce6a0, 0x5c853805, 0x71b1b312,
- 0xa6e0219c, 0xed4e89bd, 0xc42ec4f0, 0xe351c2be,
- 0x61af1ef5, 0xdaa0e9e0, 0x21e7672c, 0xd5deb556,
- 0xc90b54a2, 0x11eaa18c, 0xbad09356, 0xb1865003,
- 0x16367bfb, 0xfe849827, 0x07adb77b, 0xf6e9f366,
- 0x9a21fd47, 0x4f381abb, 0xd23bcaa8, 0x00d7a8d9,
- 0xfedf4ee7, 0x23ad6a8b, 0x0368ab53, 0x38141b62,
- 0x91e39b21, 0x3a3ee194, 0x88721894, 0xfb8b07ba,
- 0x89a47db7, 0x351d4a41, 0x4778ddac, 0x28352134,
- 0x499b8228, 0xca36d401, 0x660fbec1, 0xb7a041f0,
- 0x9d7191ce, 0xea22d95d, 0xc2653e09, 0xe85652af,
- 0x6a021612, 0xff66462e, 0x67b760df, 0xe7ef5c83,
- 0x6fe036a5, 0xcc4a2a0f, 0xcf9ee593, 0xfed06d4e,
- 0xc166e72c, 0x2638fe8c, 0xbd759388, 0x87bb1a0e,
- 0x99bb92cf, 0xbab768cb, 0xf171d306, 0x4b41fbb9,
- 0x9466a9d7, 0x1f1da28f, 0x88f021f0, 0xe97e8adf,
- 0x4c4edf26, 0x973121c4, 0x976eca75, 0x62603f28,
- 0x98455b1a, 0x22856a35, 0xc26d4ca9, 0x0878679b,
- 0x4d3cffc6, 0xba4bfdd3, 0x6b338d41, 0x75fd3040,
- 0xaa0b90f4, 0x0bfb49f2, 0xca63ea6c, 0xd5b9a617,
- 0x9fb3640f, 0x7121c54c, 0x0abd708a, 0xbea70041,
- 0x3798755c, 0xc01f4752, 0x4b6e1acc, 0x57371f21,
- 0x88cec024, 0x98239d76, 0x6885ae35, 0x36562a21,
- 0xb52722c9, 0xc6b8f152, 0x96706f5c, 0x309ca6d6,
- 0x4cd0662b, 0x9b859f81, 0x1f949629, 0x4561b934,
- 0x92af0e05, 0x2c4e9ce2, 0xa25e5651, 0xba8441f2,
- 0x41767331, 0x0e865959, 0x1088a032, 0x0b5056e6,
- 0xe545b255, 0xe4325357, 0x5d831ddb, 0xd9c25c02,
- 0x1fb917bc, 0xc04bb88f, 0x20e6b587, 0x363a7c6a,
- 0xacc4b3e4, 0xf96d4feb, 0x7773f96a, 0x2cf262c3,
- 0x924a8638, 0x16312b2a, 0x3451e718, 0xf02cde76,
- 0x8cab0a60, 0x3960442d, 0xde22a36f, 0xc52b2a50,
- 0x288fa4ac, 0xb21c5d47, 0xfad683b6, 0x4ce3ab14,
- 0x579d0ae3, 0x5250c865, 0x8fe443f8, 0x5e57b37f,
- 0xffdb9fdc, 0x743c99a9, 0x2fc52649, 0x89c5355c,
- 0x40bd2667, 0xde656547, 0x741cee38, 0x91fe7295,
- 0xfa1383cf, 0x3c8c70b5, 0x2b2b0115, 0xee377a3c,
- 0x3f024fdc, 0xabdeb5c7, 0x63c5ac1e, 0x614728e5,
- 0x4c9ac0d1, 0xcd714050, 0x4cd76c4c, 0x8b0ac295,
- 0x3f0a23d4, 0x26b1a5cf, 0x97101e38, 0x60444232,
- 0x37b82517, 0x80c22d78, 0x33c550a1, 0xc02c71ce,
- 0xfcc8b1de, 0x4e9941d0, 0xf7528b01, 0x46b648b7,
- 0x886d4e31, 0xc4149487, 0xa0c370a5, 0x970016d0,
- 0x43e3e5d6, 0x8afbdb95, 0x305841e6, 0x8555ecb7,
- 0xe5ebbdf4, 0xe1ab19bc, 0xb8324559, 0xa94abc7b,
- 0xd7b570e7, 0x71e5e62f, 0x87f14382, 0xaf8e300d,
- 0x5e1e4242, 0x493b0e69, 0xcaa1b1f8, 0xcee82bf7,
- 0x1b9a0c19, 0xdac3641f, 0x1f0fefb9, 0x5e180035,
- 0x691acda1, 0x58aa7efd, 0x36e3773f, 0xd41641ef,
- 0x7090766a, 0xcb133eea, 0xc618881f, 0x1b60ec4f,
- 0x8c8d67a2, 0xe87cfeeb, 0x2ba826ae, 0xd9d80c56,
- 0xb5f6d248, 0x7077eecd, 0xe67ac236, 0xe2ef605a,
- 0x76ac0fe2, 0x4c0ec422, 0xf3f106e3, 0xc9b82a12,
- 0xea68b3a6, 0x87ebaef7, 0x3ed418a2, 0x6cf05a07,
- 0x7b474f07, 0x5463726c, 0x49677735, 0x85a16624,
- 0x6b086835, 0x04a7c692, 0x3054ea16, 0xf32835d2,
- 0x9719ee3d, 0x4c7f59b2, 0xacc62188, 0x4441d359,
- 0x2193514e, 0x517ba9cd, 0x84534168, 0x3a02297b,
- 0x5b260b45, 0x210c0b34, 0x8ab2f13b, 0x3d31e7f8,
- 0xa2fb4747, 0xfdbe2d04, 0x75410c0b, 0x1c1b13b9,
- 0x5ccb85f3, 0xa06a64ed, 0x6969a796, 0x42c69e43,
- 0x45ca59fb, 0x5903c1de, 0x87bc3adf, 0x59a5ed56,
- 0xf9df0890, 0x55c423d0, 0x898c01e7, 0x3351b50a,
- 0x466763e5, 0x403e0fc1, 0xf9d45622, 0x8a123cc0,
- 0xdefef6e0, 0x7e4e1261, 0x5876aa8d, 0xebc0f276,
- 0x645fb389, 0xfb81b51a, 0xa4cf6279, 0xaf75dda7,
- 0x6d5b3633, 0x2805b0be, 0xaa95723b, 0x53fdea33,
- 0x4822c4cc, 0xe07b2e9b, 0xb04d1aa3, 0x24b068e5,
- 0x9c587a1c, 0xbf8cb9fe, 0x5776508c, 0x1b6228e6,
- 0x95029174, 0x68599aff, 0x72d279f5, 0x2df7b472,
- 0x1b6ce0ff, 0xccb87c5b, 0x28b34cb6, 0x351a8784,
- 0xd96ae788, 0x813f7058, 0x004c51c7, 0x3e0ec4fa,
- 0x7bd9e172, 0x7bb60516, 0x2c4ed5ca, 0x0bd7708a,
- 0xd8004287, 0xb847766d, 0xcc72ef13, 0x88b8abc8,
- 0x780bb9ec, 0x584fe787, 0x35a76a93, 0xe6f90a84,
- 0x02fe93e9, 0xfc548ef1, 0xa884ea83, 0xd06fc4ec,
- 0xc454a49f, 0x9e33fb40, 0x3455fd8f, 0x0324b606,
- 0x81626d9e, 0x209dae75, 0x075b4bcc, 0x14f1b18e,
- 0x36e13565, 0x4ae60c11, 0x6e9f5f7b, 0xceb6d6a9,
- 0xb31f7ab1, 0x7b10baa4, 0x2ee8d52b, 0x082ea035,
- 0x46cc75a9, 0xe6765cf9, 0x3021e399, 0xc4f50a44,
- 0xd2393f57, 0xb4a7346d, 0x298c5794, 0x3f1c3fe2,
- 0xf37fde93, 0x0830d435, 0x1868bc03, 0xda7d4049,
- 0xf4ed9427, 0xa8ee63cc, 0x46db896b, 0x0cb55b25,
- 0x022cfbf0, 0x920031c3, 0xf7be5666, 0x93e707c7,
- 0x77d3e86e, 0xb502bd11, 0xe18def05, 0x58075890,
- 0xb3299f8f, 0x978d158a, 0x3f3f7d71, 0x992f0ed6,
- 0x54e4baac, 0x9af31103, 0x7f23ae1e, 0xcddfb1c5,
- 0x8f1c5ee8, 0xc47d21fd, 0x2acab7b4, 0xab51ccb0,
- 0x3151c9cb, 0x069c3f8a, 0xf8fb54d8, 0x6c1ab4b3,
- 0xe1d00b2d, 0xdcfba085, 0x4e812ad9, 0xfbeb54f8,
- 0x3842c409, 0x08360642, 0x04d373d8, 0x43934023,
- 0xd0e6a96c, 0xcc9b6608, 0xd53e8a2f, 0xd72791f0,
- 0x2b61f2b6, 0x47684643, 0x753999af, 0x3487ef6b,
- 0x59d80818, 0x30a87a45, 0x431ad752, 0x61aab04b,
- 0xa6c28ed8, 0x6c1e72da, 0x88f934d7, 0x90f19f95,
- 0x4c182f6f, 0xe3859acf, 0x786903f2, 0xe8b43b69,
- 0x6f2f25f0, 0xe0430f68, 0xea6a24dc, 0xe21d8653,
- 0xf0a1ac3a, 0xa533e1fd, 0x134cff32, 0x643370b1,
- 0xfe3419c8, 0xae943ca3, 0x1bb832b9, 0x3ebd70fb,
- 0xb54dfbf4, 0xec790fa2, 0x914b96a7, 0x350c2864,
- 0x69599462, 0x2c5e120b, 0x2ab4ed44, 0x449c381c,
- 0x1c4d4719, 0xc34c6197, 0xbe5f7566, 0x6b8cc646,
- 0x7eaa2b57, 0xbdc78fa5, 0x021a4f2f, 0xcad3471d,
- 0xd491acd3, 0x841d54a7, 0x6e293eea, 0xdc33fe0b,
- 0x28bec482, 0xb9cdd43a, 0x3645b417, 0x68cf8f0e,
- 0x0c77c88b, 0x87ea3366, 0x6297fdfa, 0x0a2a6edd,
- 0x76266ae5, 0xd5ab5315, 0x1c160b01, 0x6d06e0e0,
- 0xbe5adaae, 0x4da3aad5, 0x87a88a0e, 0x65c548b1,
- 0xa0c4b311, 0x9de26c22, 0x71286bd5, 0xebce60e1,
- 0x07cb4bdf, 0x81bd0699, 0x585f919e, 0x3360c9dc,
- 0x3ad13e68, 0xad3e046b, 0x33fe4432, 0x47eae5d3,
- 0x6019e2e8, 0xfb6e850e, 0xec140d70, 0xe96cb516,
- 0x143c17bd, 0x1c69cf2d, 0x752e762d, 0x91025a6b,
- 0xd27da360, 0x949f4340, 0xdfefc075, 0x200e7194,
- 0x88456b3c, 0xf873d255, 0x6e659be1, 0x07f75e8d,
- 0x86f98e7c, 0x791b5790, 0x7e313f52, 0xf40e51b8,
- 0x06ea23e8, 0x212b47c5, 0x04aaa082, 0x967037ba,
- 0x1aadc12e, 0x872219b9, 0x6dfc9edb, 0x665114ef,
- 0xfce6888d, 0x84674668, 0xa2d99014, 0x7eba0ea9,
- 0xec04c21b, 0x6043e9da, 0x23b75ac6, 0xbd819ec7,
- 0x4a980613, 0xa8519f81, 0xf47fb1ea, 0xf202a67b,
- 0xcfae2b25, 0x243b9640, 0x3cdc2ae2, 0xc9694189,
- 0xd4f78ae6, 0xe8f3c9e1, 0x0ad19a6f, 0xe685185a,
- 0x237db448, 0x372611c8, 0x83461646, 0xf5960af0,
- 0x3caa0770, 0xd12f2300, 0x74d38edf, 0x1ca4bde3,
- 0x41b65454, 0xe994dad5, 0x0cb51473, 0x9595cec0,
- 0x0a161905, 0x77ad322b, 0x0cca0ab8, 0xe55fac68,
- 0xfd741f6f, 0xcd496a10, 0xef3ef74c, 0xdce0f9a2,
- 0x974f1d65, 0x7fbe6f8d, 0x1f397983, 0x65b190da,
- 0xf8ad60dc, 0x3afe5937, 0x38125cf6, 0xfa99804c,
- 0x55ad851b, 0x6b011e2c, 0xaf063d6b, 0xc625d28b,
- 0xe8d52c06, 0x240af361, 0xf3cd155c, 0x4c43e3df,
- 0x53517351, 0xbff2b3a9, 0x76de55ec, 0x717b945d,
- 0x9ca46159, 0x76b94177, 0x544f21c6, 0xfc0554f6,
- 0x1e255637, 0xfa2648a5, 0x66175b23, 0x4221ba09,
- 0x27b7ca0d, 0x40a41d36, 0xb576b6f2, 0xc058b379,
- 0x9d12c12e, 0xafb22112, 0x0b4efb38, 0x9fc4db0d,
- 0x1e5106d8, 0x008bf43a, 0x36d5a261, 0x0390d4c1,
- 0x58814521, 0xf0360311, 0x788fb46c, 0xd20083ee,
- 0xa6471124, 0x4957c104, 0x3696900d, 0x7b4bcdf8,
- 0xa6c33df3, 0xc59a4f0d, 0x31cf3ef2, 0x9f56e8f1,
- 0x6fbd1153, 0xcc133da6, 0x06dc4f70, 0xdc87ebe7,
- 0xd7769103, 0xdb1b6fa7, 0x4d27a4ce, 0x5aa2df8d,
- 0xb5c45cdd, 0xec5378de, 0x931a72ca, 0x4a8103fe,
- 0xfb9b2c86, 0x7f0002aa, 0x1103e5fd, 0xc2e0b472,
- 0x05e406b1, 0x53a3b2bc, 0x4074cf3a, 0x6c2d6159,
- 0xe0c9d51b, 0xa58f21d7, 0x951e5211, 0x7da68df2,
- 0x33f3f8c8, 0xfcf9835b, 0x416be47e, 0xa8fead8b,
- 0xf7a9c6a4, 0x09a503e1, 0x02582596, 0x3f3f9635,
- 0xd8b8ef32, 0xc79ad413, 0xa4535d47, 0x199fd36e,
- 0x96c2cdf7, 0x25014d3d, 0x8332ac03, 0xa8d03b58,
- 0xddb610d2, 0xc969e97e, 0xb6d6fe0b, 0xdff28770,
- 0x691361a7, 0xf1e352ac, 0xbe6e8632, 0x79406980,
- 0xe40fcdc3, 0xf2ad5d41, 0xa18fec2d, 0xea0a2ec0,
- 0x6881a1b2, 0xe37adae4, 0xd8394139, 0x6a7166c9,
- 0x14d7ed51, 0x0783746e, 0x907f78e7, 0xf67b4120,
- 0x9ea2b13e, 0x66c2f9d3, 0x44b4def4, 0x530797ed,
- 0x2eaac065, 0x0ba94033, 0x6c8888fa, 0x77bfb22f,
- 0xa44aa777, 0x2b501179, 0x2d8d5ad7, 0xfbe55696,
- 0xfd28297b, 0xd8ff3553, 0x3a71575e, 0x8e178194,
- 0xdd4c41d0, 0x58e83bf1, 0x476d321a, 0xc3e870e9,
- 0x26d1b852, 0xb4a65120, 0x5a26d46b, 0xff038f01,
- 0x22470eda, 0x6a8d53dd, 0x65bbb1a9, 0xd7b0dc3b,
- 0x6c9c8017, 0x9438fec1, 0xedac193e, 0xfe2f5d5e,
- 0xed73e772, 0x4019f1a3, 0xc157ae51, 0x54122040,
- 0xb04045f5, 0x882d4530, 0x29ebf3c1, 0x76ed099d,
- 0x6ff6366d, 0xe7f8ab16, 0xa5f2ceb3, 0x0f63476e,
- 0xaae5cd38, 0x07b5246a, 0xb8e1b30e, 0xa05d7d9f,
- 0x5fa1e2a1, 0x68cc00e6, 0x13588e6d, 0x598cf752,
- 0xee2c5036, 0x3d177f5a, 0xc2369ab8, 0x77a2c162,
- 0xc326d32b, 0x7a9d8e42, 0x0b96fd57, 0x14a40dbc,
- 0x9bc0df7d, 0x72d7166e, 0xbcb5cb57, 0x2d3ee27c,
- 0xaba25eab, 0xa681b901, 0xd41d5c36, 0xfd6a968d,
- 0x0180b3e4, 0x865d2607, 0x06aaf49a, 0x8e9147d5,
- 0xcbe9d8df, 0x1bbf0e56, 0xbc20597b, 0x1d4378cd,
- 0xb685366f, 0x69e2af37, 0x54d809bd, 0x58641336,
- 0xbfc8c751, 0xe69c39ea, 0x222988a6, 0xc8cb3e45,
- 0x9ee0c8ca, 0xf8cf88c2, 0x91fe1df6, 0x4375fa8f,
- 0xdda1d3d4, 0x794996e0, 0x1aac3b80, 0x8ccdf057,
- 0xf5604278, 0x0dee7181, 0x11c8602d, 0x033bc43d,
- 0x2668e498, 0x0c836135, 0xbc450504, 0x1f03c1d3,
- 0x7dbf90d0, 0x46d6fd92, 0xd18d3244, 0x2df2b77b,
- 0x76567ef8, 0x283703ab, 0xf8cec4cd, 0x42bed101,
- 0x5c263ecd, 0x9f7b6365, 0xc8f695cb, 0x4a73e653,
- 0x2a550c6e, 0xbbef5aa6, 0xd07bfa4c, 0x3320536d,
- 0xcce2966c, 0x2dc8eb11, 0x6ad8f142, 0x4df0dbc7,
- 0x3d7589e3, 0x47ad718c, 0x30ace76c, 0xc49e40d5,
- 0x1db0ee99, 0xd323fcaa, 0x5a417f22, 0x2762cc41,
- 0x2dfb790c, 0x48516f5a, 0x8d93b79b, 0x16350384,
- 0x244e1eb7, 0x4ae0fa65, 0x5b5affaf, 0xf9094b7d,
- 0x73ebb6fb, 0x0c3e674a, 0x22916b90, 0xb4057006,
- 0x9d9846fb, 0x1e5de062, 0xe985b8e0, 0x4f54bfb2,
- 0x6c91c808, 0x2e1261dc, 0x03384bc6, 0x12c4aa40,
- 0x82a18ca2, 0xdfcfa565, 0x678deb28, 0x21171665,
- 0xce842777, 0x4f013255, 0xf4facca2, 0x727a5484,
- 0x90b83dd4, 0x2fa958bf, 0x16b261c8, 0x2b7ad3a8,
- 0x778201c5, 0x09e6a61e, 0xb2065b13, 0x8382058f,
- 0x06227c2f, 0x6b231e58, 0x03f5914d, 0xe5ad5103,
- 0xf5181b85, 0x43832a61, 0xef3d0651, 0x80b0b55f,
- 0xaaee1078, 0xbfddbe9b, 0x5c1d25de, 0xdc7f0b6d,
- 0x681d4562, 0x589da81f, 0xc85d61d4, 0x945c0d4b,
- 0x675f91fc, 0xa9a1d887, 0x9ad99e05, 0x0c59c80a,
- 0x8d9faa09, 0x32bd3d7d, 0xa51b5de1, 0x453075c2,
- 0xf9068920, 0x4f3bd245, 0xb0c236a2, 0xdc97875f,
- 0x6c2a9456, 0xf13b77b2, 0xea43279c, 0x6c45f00e,
- 0xe23b335c, 0x7d9b4fa8, 0x13ed73e0, 0xb14ddc40,
- 0x267d60c7, 0xcc63a983, 0x326df747, 0x95e577f6,
- 0x15f9b759, 0xc740ae4f, 0xcb0534b4, 0x933fd825,
- 0xbfff11ad, 0x9b8a6b0f, 0xb7088acc, 0x7e36e7f4,
- 0xdcc26afd, 0x2d3d61a2, 0xf9d3641d, 0xe7b2af7c,
- 0x08fcfde6, 0x96d02518, 0x959eae0c, 0xf1ddea1c,
- 0x4e9b5561, 0x35ebd9a4, 0xef869bc5, 0xc2f01c99,
- 0x7fcfeb79, 0xec47fc6e, 0x1d35c0b5, 0x5a6f5b9b,
- 0x72759023, 0x426cb485, 0x4aa04781, 0x2297eac6,
- 0x46aade0f, 0x0252649e, 0x83ecc2d1, 0xff238309,
- 0x2311a9c1, 0x6e22ec43, 0x86952ab8, 0x2956c070,
- 0x1a346fa1, 0x9a31d8a3, 0xf00dc70b, 0x7ce30b3c,
- 0xb360f620, 0xccf8af9d, 0xdf2868f1, 0xb88a63dd,
- 0x8c30945a, 0xecb82b87, 0xbba3fafc, 0x736c3782,
- 0x870bfb60, 0x9e9e78e7, 0x4266d68d, 0x789636bf,
- 0xd1be37d7, 0x92177b7e, 0xcc9d14f5, 0x4b708af2,
- 0xf05bab5c, 0x25d45db0, 0x3391f049, 0x2525bbb9,
- 0xa075c6c7, 0xf7d709bd, 0x2ed5b6f3, 0xc9680cbb,
- 0x0ecd2b1a, 0x329c77b8, 0x4b49f433, 0x0df8084c,
- 0x0703b8bb, 0xa604d4dc, 0x73bf2ab3, 0xd841b3c2,
- 0x2ab1c007, 0x93f8f328, 0x2630b835, 0x59a9ed50,
- 0xba7cb3ae, 0xcf384031, 0x0ba90109, 0x8b474c42,
- 0x008aa928, 0x0db2a81c, 0x8927bb1a, 0x3f61249d,
- 0x179a4259, 0xf9b07f25, 0xa7e1a06f, 0xfd3b93b3,
- 0x8f1c5b03, 0x169d3859, 0x38ec8b45, 0x498f70cc,
- 0xcd463c8c, 0x6c242b10, 0xfaa0c1c9, 0x7dd5a746,
- 0x8c381258, 0xe0f8d70f, 0x5123e0e0, 0x9eec1595,
- 0x7c37f4c6, 0xed95de11, 0xa2a39413, 0x6a46e2ae,
- 0x64fa6577, 0xbe0e3305, 0xec061108, 0x98479bf6,
- 0x2d534b86, 0x58f1f0dd, 0xbc174919, 0x0e9e641b,
- 0x45631014, 0xdaaa85fe, 0xa567d7b5, 0xe5461e27,
- 0x5eb6a45d, 0xad8cb177, 0x3491d710, 0xe4121186,
- 0xea34e115, 0xfc4cf825, 0x8e9f0bdd, 0xdb76c575,
- 0x51b37455, 0x4e2e9cd7, 0xbbef23b2, 0x041cba06,
- 0x35a90ae0, 0xa4e44676, 0xf46eab94, 0xe1295be0,
- 0xe168f06c, 0xbd4a0741, 0xb178fc8d, 0xeb8d2690,
- 0xa788be7a, 0xb57a1f8d, 0xdb6737c4, 0xedd3d0b5,
- 0xa570e600, 0xce9fcca9, 0x567456ef, 0x86a5f81f,
- 0xdccce0ce, 0xa80dfe75, 0xcf0b0e0c, 0x328d2de5,
- 0x2e6b4cbd, 0x0b3784a7, 0x26e47d4a, 0x2e168e0e,
- 0x3b07380c, 0xe0f9dce4, 0x190dc0f3, 0xf39530de,
- 0xc809d681, 0x7849b877, 0x2548145c, 0x51d90b30,
- 0x08279197, 0x9e9e461c, 0x48f5f4f9, 0x9721b313,
- 0x7a98f550, 0xac92badd, 0xfc593d36, 0x296ae070,
- 0x607a6ecf, 0xd94d7b1e, 0xc9922a2d, 0x2b8d388f,
- 0xfdcc598f, 0xbde4df95, 0x11a4515c, 0xca3d6d95,
- 0x2eca17a3, 0x70034421, 0xb2e66a94, 0x8631db33,
- 0x28ce3e8b, 0xe3b1b545, 0x3c0a787d, 0xe11be074,
- 0x75a6a07e, 0x44e8a15e, 0xc8daff15, 0x9437b827,
- 0x5129caf1, 0x5766103c, 0x42e9a369, 0xbbeb2e3b,
- 0x83b45ee4, 0x25771500, 0x94156687, 0xb8633ce5,
- 0x389648f5, 0xd0415eb3, 0xc57e5b4e, 0xb550cc4b,
- 0xb5b40b88, 0xb2c96923, 0x2cbc20df, 0xf6c38102,
- 0x396c71c5, 0xbd165b6d, 0x78e3c566, 0x8e27145e,
- 0xa88f8863, 0x0edac0ef, 0x3dfadc83, 0xdae2eb68,
- 0xbc590603, 0xfa1ba9f7, 0x72bea0c9, 0x66adbfa7,
- 0xe541f5e0, 0x7c9713bd, 0x8a69ce69, 0x0213fe52,
- 0x132950ec, 0x3124fb49, 0xf9050bd3, 0xb13b6299,
- 0x060e94ac, 0x6662a4e5, 0x59df69ad, 0x093cb3ad,
- 0xd5a73a58, 0x81d62900, 0xf67ce182, 0x5f2a26d6,
- 0xf5bd27ae, 0x5756f504, 0xd2864100, 0xa065982a,
- 0x6b857bfb, 0x91fd0316, 0xb1ea68b1, 0x0311214a,
- 0x02e6e860, 0x8dc774d8, 0xab4fd4d4, 0x12182cf3,
- 0x3486ed5e, 0x5d021848, 0x45bd18d8, 0xa5367197,
- 0x63678ae3, 0xe3584740, 0x2409abc5, 0x09f77957,
- 0x8afb83fc, 0xbb71e7d4, 0xa388247d, 0xfd129f78,
- 0x50479631, 0x040ec490, 0x77ffa567, 0x3c357c14,
- 0xbe770316, 0x95e8489b, 0x8e1313f7, 0x577f1442,
- 0xb9b279ba, 0x7c8b0de0, 0x3b00be04, 0x8d0a326c,
- 0x7b0b26d9, 0xd013e93d, 0x83b0480c, 0x0ccfb8ed,
- 0x8df346b5, 0x1524b8bd, 0xe6622ff4, 0xcadd3b94,
- 0x461813f4, 0x2e86d7f0, 0x1ff70e7b, 0x9ade3726,
- 0xd86c7a4d, 0xc2de43d8, 0xaa987172, 0x4e7e91e2,
- 0x11e4a337, 0x3aaeabf6, 0x6366a917, 0x68caebbb,
- 0x23817841, 0x972e706a, 0xe7936a36, 0x45432399,
- 0x5916009c, 0x44dfd211, 0xdd10adf1, 0x5987da29,
- 0x6229335d, 0xd3ef7ab5, 0xdcfa4083, 0x851fde4a,
- 0x4f41fb0e, 0xd9088e95, 0xf16d87c1, 0xcfe96b84,
- 0xddd65fad, 0xdb7a2e4d, 0xa9b4267f, 0xefd34cee,
- 0xf9bc811b, 0xb24b0e13, 0x074aefe7, 0x8fa8f3fa,
- 0xf5e38560, 0xa760fc88, 0x71040551, 0x8db0159a,
- 0x22a61a14, 0xfbc68caf, 0x9d6c9004, 0xe9a15c30,
- 0x7b1af507, 0xff3a5466, 0x5cd984e0, 0x7ec401ba,
- 0x08b195d2, 0x21b70042, 0x4c78a8b6, 0x5abdc257,
- 0x848a85d2, 0x916aa39a, 0x4a068dc7, 0x8f6001eb,
- 0xdb976975, 0x7a82c00b, 0x84f3a7fd, 0x25113227,
- 0x1733e740, 0xa7caa954, 0x951afb03, 0x8bb953fc,
- 0xbf3d87d5, 0x21087dde, 0xbde02339, 0x6e8d7f3a,
- 0x64d03fd5, 0xbdbbe3b5, 0xb900a058, 0xae3d8886,
- 0x69314648, 0x103c8595, 0x313389d9, 0x43fdb183,
- 0xf62b152b, 0x0e7ad491, 0xcde6457f, 0xb491e524,
- 0x37ef01e4, 0x152404ff, 0x8d2e5104, 0xdf80cc41,
- 0xba8cc9a1, 0x6137e3e2, 0x761f7690, 0x9e74a543,
- 0x8eda924d, 0x106eda16, 0x2a25f095, 0xbab87e4a,
- 0x4ebed965, 0xcefdd142, 0x46b2bf33, 0x129581a8,
- 0x30bdd840, 0x13523957, 0x3f7eefe5, 0x866f131b,
- 0xb7c8ede1, 0xfed3e6a0, 0x9012d187, 0x553dad3c,
- 0x8ce8531c, 0xb2b37c76, 0x8616e40e, 0x15878517,
- 0xd3cdbee1, 0x64bb6e3f, 0x02621e58, 0x5a8c4508,
- 0xb4d628e5, 0x98782b01, 0xab6378d7, 0xc18746f4,
- 0xe94eb24d, 0x69a3c17d, 0xd09c60e1, 0xbbd5d12c,
- 0xa3eb73ee, 0x5d202d32, 0xac5a7e25, 0xe428776e,
- 0x5bd54f36, 0xbb4209ee, 0x65a02032, 0x243365c8,
- 0x4b2a311f, 0xf10646dd, 0x748ba36c, 0xc15c4a08,
- 0xf33280ff, 0x2dc7ee89, 0x8837292b, 0x82b96d0e,
- 0xd6b24d2c, 0x82028cd7, 0x71c33029, 0xe59d5794,
- 0x1927a33d, 0xef0de697, 0x0ea37a87, 0xa01dea8f,
- 0x74ed792f, 0xfe71cdf9, 0xc3f8740c, 0xbc51013e,
- 0xb23a95f4, 0x314ec964, 0x857ff2a9, 0x20095b84,
- 0xf2eb1c0b, 0x7fb93c27, 0x37a0c686, 0x61c33c64,
- 0xdb6a0d4a, 0x2e85cd51, 0x7b7701e8, 0x1b3c7e16,
- 0xe0a383b8, 0xd8e32a62, 0xa11696ab, 0xc680a360,
- 0x76fa369a, 0x6d881899, 0x9a2700fc, 0xde0fd12b,
- 0xaa2bdbf9, 0x4afa6594, 0x3133064a, 0xbe9d3a50,
- 0x4347b08e, 0xd9c930bc, 0x8472acb4, 0x05c395be,
- 0x5b14d602, 0x2b46c26e, 0xa9f4fdf2, 0x993e924a,
- 0x808e39f4, 0x0d1f434f, 0xe28ff969, 0x88443a65,
- 0x034f5d22, 0x1a142ff4, 0xf4200ff2, 0x01c2f2ab,
- 0x7589fe4a, 0x1d17bc63, 0x49218dc5, 0x6aa90dbf,
- 0x98e1ec14, 0x9fa62368, 0xd0625457, 0x0c69960f,
- 0x947952db, 0x33361207, 0x5f981397, 0x328bdf4a,
- 0x8deb0fcf, 0xa5f7f117, 0x2e4ffc18, 0x6ce21500,
- 0x4c0c4a6a, 0xd4a66fd2, 0x390c306c, 0x607ad605,
- 0xbc587215, 0xf6d8b97b, 0xfdcf559b, 0x5ea7224d,
- 0x1854779f, 0xe670a933, 0x4b196714, 0x279da541,
- 0xb495f829, 0x866cd554, 0xfcf460c3, 0x90bb440a,
- 0xb6f7b383, 0x25f9ce03, 0x29ae54a3, 0x22a43ca8,
- 0x987b77a9, 0xf7d2d536, 0x4dfe20b9, 0x0752789d,
- 0xb281049e, 0x28eec305, 0x33089e0d, 0x175b4b52,
- 0x5fdf4c3e, 0xc43b48a8, 0x18699c1d, 0x2aa1b570,
- 0x82666120, 0x7f70b94a, 0xaed37d0d, 0xf3b1b8a0,
- 0x7332fafb, 0x0ee9cef8, 0xebef9ccd, 0x651b4978,
- 0xe266f4d5, 0x4e2a2bf4, 0x691c313e, 0x94690b66,
- 0x94fd3199, 0x5bf98420, 0x9daa8413, 0x245183b8,
- 0xa80b653d, 0x301568be, 0xbef07a28, 0xbb4ba293,
- 0xff9f8d6c, 0x83176907, 0x699d2ec9, 0x77176048,
- 0xa4653568, 0x17741396, 0xf2b5aab1, 0xd9d4f1f9,
- 0xe5575096, 0x17a83fd4, 0x6f047711, 0x54f0411e,
- 0x9d672a58, 0x546ae427, 0x7277a067, 0x3752e180,
- 0x52d25d3f, 0x1e73a1f7, 0x683da477, 0x3fa1ce38,
- 0x9c3b6261, 0x1568a423, 0x5a327b48, 0x731a3f9d,
- 0x2987df6a, 0x52289e5a, 0x79338183, 0x69c8d017,
- 0xc0a3207a, 0xf8a90d3b, 0x6869622d, 0x439faf65,
- 0x28be5b52, 0x066d473d, 0x7561347c, 0xb885ff4b,
- 0x577c0e3d, 0xfb0ff41f, 0x478bd4e3, 0x313d51d7,
- 0xcb694173, 0xed1724fa, 0x64bbfa53, 0x9b27b810,
- 0xc6c12019, 0x9a0280a1, 0xef45c1ed, 0xe3ecf3ce,
- 0xa21ca237, 0x7a2f2d53, 0x1508a3ea, 0x6bb41fa9,
- 0x8b4016da, 0xb91c9b64, 0x3d7be421, 0x35ecb54a,
- 0x94dd3b52, 0x51234fed, 0xfc653faf, 0xf81ddca4,
- 0xa41ca592, 0x5de55bde, 0x23667674, 0x19671a5a,
- 0x1f8145ee, 0x353ae3c6, 0x6e011a6d, 0x50f93a52,
- 0xf361b6ae, 0x844b4e2a, 0x9e21ab21, 0x317c8828,
- 0x5ee67d13, 0x428b4bf7, 0xdb383a52, 0xcdaaecdf,
- 0x197af85f, 0x53fd1816, 0x4357fca9, 0xdffacbd0,
- 0xc8c1bca5, 0x8f4a4f2a, 0xe1a7c95e, 0x988bdf87,
- 0xc964b82d, 0x58ace38a, 0x0af343c2, 0xf2260a28,
- 0x79c884df, 0x44d3194d, 0xeb80d539, 0xe6d4519c,
- 0x17fc8176, 0x6072c359, 0xd06fac2e, 0x20d9fddf,
- 0xf8923abd, 0x48eb957b, 0xeb039f3b, 0x325b7032,
- 0xf384092b, 0x03940ac9, 0xa5eb34e7, 0x5cd0480c,
- 0x385270ec, 0x2cc6331b, 0x25dc15de, 0xe6b6b6d9,
- 0x70c7c581, 0xa21d09cd, 0xbda580b8, 0xbc028df1,
- 0xf831aa89, 0x7b3c07d6, 0x4de89b10, 0xba8968e6,
- 0x69f01f38, 0xf02b2c30, 0x7ad867e1, 0xbbf4b70a,
- 0xe2c8f388, 0x341f4477, 0x7778befc, 0x5d39b16a,
- 0x4db909fd, 0x61d4087c, 0x8f7dff65, 0x3eb26a1d,
- 0xbc909a4f, 0x73bb689c, 0xfe9d83b5, 0xc97e6c2d,
- 0x154e0f07, 0x6c6ae1c6, 0x12065966, 0x84d7297d,
- 0x2f42b976, 0x42ee5c92, 0x838e790c, 0x769f57b1,
- 0x5456f8ac, 0xfbea0e3d, 0xf5cfbf82, 0x313c427e,
- 0xe7fc478a, 0x909fbb69, 0xb427ae48, 0xae59cd2f,
- 0xb42adb37, 0xa3f334f6, 0x6aa1868e, 0x71cc9a8e,
- 0xc0839134, 0xea7726a6, 0xdc424d63, 0xf0a22233,
- 0x5c6a147d, 0x3ea57359, 0xd96c228c, 0x1e6101cc,
- 0x5da64fdd, 0xab7015e2, 0x94367c91, 0x6e3a2be4,
- 0xe2a99359, 0xbe3256a7, 0x38314426, 0x681e081e,
- 0xeb2a4a9f, 0xf373f054, 0x449de5de, 0x8b2931e5,
- 0x62ebd455, 0xd23e681e, 0x77f06d0f, 0xaa42c9b3,
- 0xf82046ac, 0x00aef2fc, 0xb5d1c8ff, 0xf725199e,
- 0x81baab74, 0x98c5c8ca, 0x13c43ec6, 0x00399be0,
- 0x497d5e8c, 0x99b9776b, 0x491039d9, 0x3101efa4,
- 0xb05cb290, 0x78f33530, 0x51d58579, 0xd79aae15,
- 0x5e194b9c, 0x8b59d65d, 0xe90d08b2, 0x35e060aa,
- 0x806fc41e, 0xf4d8053c, 0xd5aaeb30, 0x7dceb5db,
- 0xf028f0bf, 0xf83f3e2d, 0x70ff717f, 0xb2097935,
- 0xdbd52e41, 0x08bac03e, 0xa46f26a2, 0x73f83bb8,
- 0x2c0837ab, 0x3bacfdf5, 0xd5e76578, 0xc2a25576,
- 0xa25603eb, 0x9c532f96, 0x8a2424d1, 0xe96c3a01,
- 0x308132ea, 0xad280691, 0x560987d1, 0x18d0b431,
- 0x943ae1b3, 0x81f276be, 0x9f8dc385, 0x971e5ac7,
- 0x78d939f7, 0xbf375116, 0x16165c5e, 0x7da00a01,
- 0xb64d1d34, 0x04c9b7a4, 0xd4f01865, 0xb86c7327,
- 0x26236daf, 0x7cd6c1aa, 0x5973da89, 0x2153eed7,
- 0xaf565d59, 0x106e8c07, 0x22c31257, 0xed0eaac2,
- 0x9fd83bd2, 0x125efc59, 0x868c3eb1, 0xe8c7e651,
- 0x50901f05, 0x3a9471af, 0xcc4dbd36, 0xe92c83ff,
- 0x9f0eade8, 0x5eed5785, 0xbb2a402c, 0x107fb1ba,
- 0xdd437725, 0xa85c7831, 0x65bb6263, 0xb236a316,
- 0x73059fb4, 0x2374a6e2, 0x2c9a150a, 0xf31325fa,
- 0x094e9425, 0x1d04e097, 0x77ec8dda, 0x50f472eb,
- 0x6939e58b, 0xdc733aee, 0x61391354, 0xa03050b0,
- 0xa88cc609, 0x8137a48c, 0xcfcd6ad0, 0xc90fdbc1,
- 0xcbee5317, 0x527f2901, 0x361fd7f3, 0x66e64531,
- 0x9ac686d9, 0xa58bdb4f, 0xca82e3bd, 0x10c1947b,
- 0xf4e9d1b2, 0x1885268f, 0x602cffa2, 0x799e5146,
- 0x84769f28, 0xb9cd1299, 0x891a3759, 0x4ec906b6,
- 0xfddc037c, 0x9ce051ce, 0x4d10b62b, 0x093089ba,
- 0xd6c21e98, 0xa49dcb58, 0x85a7b837, 0x34be9773,
- 0x3f1c498e, 0xd23f2ca1, 0x4a675d6e, 0x3719657d,
- 0x2ff1f3b4, 0x3c5edfcf, 0x63eff1d8, 0x09acfbd5,
- 0x13e22b87, 0x5261f199, 0x6a352411, 0x6969bf65,
- 0xb8c135e9, 0x2d72024b, 0x20d13872, 0xe722f640,
- 0x12f874e4, 0x2db31b4b, 0x3ad3b491, 0xd841f695,
- 0x5aefd87b, 0xc6e95f4d, 0x540891fb, 0x000d660c,
- 0x23edbb8c, 0xe6522558, 0x65d88e35, 0x67faa0b5,
- 0x10f4fdf9, 0xfc87f7a6, 0xbe525b5e, 0x27ae652c,
- 0x7b0d2161, 0x729e6a99, 0x18cc9d55, 0xf0aea3e9,
- 0x0e626e47, 0x46583cfb, 0xd8cce253, 0x67562c4b,
- 0x89829b7a, 0x33d7e3fe, 0x57d6fcb5, 0x50970180,
- 0x7a63daa8, 0xc1b7e56e, 0x39a00303, 0x4e227d7e,
- 0xf9622dec, 0xb3d07f85, 0x4f104315, 0xcaff68cf,
- 0x459a7677, 0x3aa229a2, 0xf568e721, 0xcd018f24,
- 0x407760dd, 0x00eef9ea, 0x9a0ec730, 0xb54c6317,
- 0xa8972df2, 0xb5e77069, 0x1d195ecb, 0x3a65baad,
- 0xeed89a3a, 0xa35f2433, 0xead206da, 0x1acc8c7e,
- 0xba8d334a, 0xbf5aa074, 0xe8079d73, 0x04c36483,
- 0x1add8231, 0xb41e328b, 0xe25b343e, 0xb8e501fd,
- 0x9efb0484, 0xf23dd20c, 0x3448b1c4, 0x7ae5cf23,
- 0x8dbf5656, 0xa3f80e83, 0x3ef49d96, 0x0cea453a,
- 0xd9a36da8, 0x30673183, 0x6f88edba, 0xfcd7f66f,
- 0x8b65f9cb, 0xc2e3df02, 0x77f55a79, 0x55d72a8a,
- 0x76f0cc47, 0x3945c588, 0x3c9eabbe, 0x03a844d8,
- 0x7faf85c7, 0x4a99e62c, 0x715205bf, 0x3418c6c9,
- 0xe14ec1cf, 0x2586cf74, 0xa8205398, 0x2b5c19ed,
- 0x0cd804a4, 0xbad1b2ee, 0x3fcc48f8, 0xb91e3e27,
- 0x61faf3f2, 0xd9f1dbf1, 0xe67fb084, 0x70eeea0f,
- 0x48640cb9, 0x2b2a1819, 0xa0bdf40c, 0x1e4e138b,
- 0x726b3456, 0x5b575876, 0x385b2c7f, 0x119399ac,
- 0x92b94568, 0x830d128e, 0x03730036, 0x9b16626f,
- 0x3b1f0cc2, 0x04522fd3, 0xefe3799e, 0x757425ef,
- 0x41ba50f2, 0xf78c72d8, 0x82c24b2d, 0x9e4edc85,
- 0x4e0f8492, 0x632c8df1, 0xeb04c7a0, 0x3109643e,
- 0xa247d84a, 0x97de8486, 0xba275339, 0x2a71e81f,
- 0xe597d51c, 0x14953010, 0x202859e7, 0xb6d22732,
- 0xfe767835, 0xa3123fe9, 0x7bb93b69, 0xfc36be6a,
- 0x5c12c3da, 0x766f13c8, 0xa8eeacaa, 0xd896a751,
- 0x4d3bbeaf, 0x433119bd, 0xa4c9dd1f, 0x74765a8c,
- 0x408daa3e, 0x6a29b045, 0x36f05585, 0x3f20654b,
- 0xc5cac73e, 0xd8dce56f, 0x1b7b0538, 0xb9323d5c,
- 0x68721bc2, 0x423eb318, 0x793ea010, 0x2e8ddb34,
- 0x8c849ffc, 0x083469cf, 0x9b63354b, 0x5fea6204,
- 0x548bd058, 0xa88dafab, 0x4aa25a26, 0xa0a3bb87,
- 0xf1151f67, 0x2ef2ee48, 0x31e8e536, 0xca03cb97,
- 0x359f3aca, 0xcf187893, 0x0f376665, 0xcf0410c1,
- 0x25ede881, 0x20e37c72, 0xea988167, 0x77e1a294,
- 0x0f1581bf, 0xba27355b, 0xa643b909, 0xc5116f7a,
- 0xbfb230df, 0xfe475308, 0x3b94db9a, 0x9f5484fe,
- 0xf4a3952d, 0x32164194, 0xe9e55961, 0xa31292fa,
- 0x0607b801, 0x664abe7e, 0x18cfaa9c, 0x2a31ee99,
- 0xe6a9215b, 0x8551f3f1, 0x526ff97b, 0x0960fcfe,
- 0x081c76e4, 0x630d44ea, 0x02d59cf4, 0x00d70687,
- 0xa01348c4, 0x9c363fd8, 0xf52f2923, 0x3b978878,
- 0x32993df3, 0xb483f634, 0xbe3b793b, 0x318ad606,
- 0xcba532b3, 0xbb3ce420, 0x2ddce772, 0x6bd68cb7,
- 0x827b3b37, 0x59fc0819, 0x27821286, 0x15b18414,
- 0xc20b4eba, 0x949f522a, 0x09917dbe, 0x55b13e68,
- 0x1addbe6e, 0x02c996c8, 0xf9e7ac62, 0x542b4512,
- 0x079b0bec, 0xfc6a34ae, 0xf36c2179, 0x77188093,
- 0x35b667fb, 0x500be259, 0x4aaa482f, 0xcc6d62c6,
- 0xd4821506, 0x5a3a4a32, 0xb7b83c98, 0xed9202e2,
- 0xbbd03d52, 0x7fc10dc7, 0x685d7ce7, 0x2fe580b7,
- 0xa710a5b3, 0xd19955d6, 0xacc44881, 0xab4f239e,
- 0x75bf9e8b, 0x0501d606, 0x4e7bc981, 0x944846e7,
- 0x2360ea73, 0x7132a075, 0x30647ee1, 0x9b21da9e,
- 0x3173492a, 0x0a287e96, 0xaea5814e, 0x6fb9ede3,
- 0xf814d671, 0x85936648, 0xa3452e2b, 0x880b329a,
- 0x55594d06, 0x9f361752, 0xbdfb7ee4, 0xd8433132,
- 0x4c4a2c2a, 0x5656a72d, 0xe6db6e83, 0xd2189605,
- 0xe5fbeb91, 0xf0322e53, 0x6bcc58b1, 0xc49f0f48,
- 0x9b28ee72, 0xa8f58028, 0x6636c0ba, 0xa0307c12,
- 0x6d791ecf, 0x04dea8b5, 0xb4e18e27, 0x16700624,
- 0xf96d3606, 0xc75bac1f, 0x527ed907, 0xd127a44c,
- 0x52d54e09, 0x66594cb1, 0x03c55a97, 0xd25743f2,
- 0xa9c716de, 0xef8a56e0, 0x99bc103c, 0x53e8f42b,
- 0xac1ef337, 0x5abe3c67, 0x57d3e5d6, 0xc17ff9eb,
- 0xaf205e42, 0x8e733182, 0x275b53c2, 0x7c8c80bf,
- 0xe6428065, 0xf896878e, 0xda058744, 0x10fa6ec6,
- 0xfbec08a0, 0xb2ac39de, 0x7624585b, 0x1de913c5,
- 0x49dac70c, 0xaac77cfe, 0xa11ea00a, 0xbe70550f,
- 0xdf207b41, 0xf65d944e, 0x5013c2f8, 0x5614774b,
- 0x2cee2f83, 0xf404245b, 0x15b2669d, 0x90c5f2ca,
- 0x908cdd49, 0x3319008c, 0xb1a2f008, 0x9697e9db,
- 0x045e19db, 0x4b3a5cc6, 0x2ac2f153, 0xf211a10f,
- 0x6c9ced3a, 0x3ee4c758, 0xd817c408, 0x4f5a9126,
- 0xca18de83, 0xd88e041e, 0x016e7eaa, 0x5b780a5e,
- 0x5f997043, 0x171cf478, 0xb58f4781, 0x5baa936e,
- 0x2134eb3f, 0x41c97a25, 0x361a417f, 0x1161f55f,
- 0x070f7913, 0xaeac2ec1, 0x816520df, 0x1db225e7,
- 0xdfdd68d1, 0xf19a404c, 0x9caafd95, 0x182b8bf2,
- 0xa7c927e2, 0x26effee3, 0x06e34c19, 0x34eb7c71,
- 0xa707f1b7, 0xa86bb217, 0xf65223fa, 0x1150f15b,
- 0x8638fd58, 0x833e9b0c, 0x2be67143, 0x85244ef4,
- 0x264739f0, 0x06432cff, 0xa2ed6105, 0x5ac4be62,
- 0x981a255c, 0x97a5bb3e, 0xcec77ef3, 0x66bf320b,
- 0x75caf7ce, 0x85648346, 0xb3ea007a, 0x3c6f1e18,
- 0x5815f504, 0xf7b671da, 0x4442b943, 0xdf202a71,
- 0xec0d4356, 0x50d08f00, 0x911beb22, 0x33d00671,
- 0x71d46490, 0xf6c53dfc, 0x5525a3b6, 0x6a996168,
- 0x0ab2ad1f, 0xe8fbdfe3, 0x90fc4f22, 0xecfdc89c,
- 0x34eb1eba, 0x5f06cd50, 0x6afdb438, 0x7a0b8f1c,
- 0x862ecfed, 0x72802e59, 0xb7c97758, 0x90da65b4,
- 0xe1e3155a, 0x97a22dd4, 0xcbfdc0b8, 0x0b6a8ced,
- 0x7a4de14e, 0xee0b8c6e, 0x8cac47ac, 0x66557264,
- 0x87ebaa6c, 0x85cf1694, 0xbbd2b291, 0x3f65d911,
- 0xe12d4cdf, 0x1a63229a, 0xbff41172, 0xb5dad0b0,
- 0x573cefd7, 0x6f44f1a7, 0x9e7620c3, 0xf4c6ec29,
- 0xdc17294b, 0x57b9470c, 0x58463dbe, 0xedfcf1f9,
- 0xf1df4662, 0xc31796ed, 0xbe42d9d6, 0x8ca98426,
- 0x67e4de96, 0x31f8bc96, 0x88009a46, 0x500c111a,
- 0x968b209b, 0x0a6f0a85, 0x150b97ad, 0x90ac8eb3,
- 0x69e3d43e, 0x76002a1c, 0xc25f709d, 0xe09d0b76,
- 0x995a3f6d, 0xa9f5f35f, 0x82e7b678, 0x8f36fd7f,
- 0xc8c6303a, 0xac375598, 0x2e4d374f, 0x96157f0f,
- 0xb1fbb183, 0xc972be35, 0xf1f2184b, 0xf7dd9b10,
- 0x8f96f16a, 0x4d4e5bac, 0x4c98517d, 0x230a9372,
- 0x77431cf6, 0xe8f8a3f4, 0xdffce373, 0x184e6b01,
- 0x4f65855a, 0xf80c22b9, 0x62cf5f4f, 0x18272cf1,
- 0xb2c6e98c, 0xe72cfb69, 0xce52a3f2, 0x5ec853ce,
- 0xc5eb3d48, 0xfd3236fc, 0xde2d53aa, 0x5a51ce3b,
- 0x29caa98e, 0x5acff2e9, 0x2471d01f, 0x1b0eba32,
- 0xef026ea5, 0x9b5c71e4, 0x11163cea, 0x1886b2b7,
- 0x46064ce2, 0x50573fa2, 0x2b0f1a6e, 0xb0a5c4e4,
- 0x80a0dfad, 0x99df6a98, 0xbc094030, 0xe2d1914e,
- 0x0dbc1930, 0xe1dc8888, 0xe05e9171, 0x42ea777a,
- 0x46b19499, 0xd6190530, 0x348236ec, 0xbe0b93b8,
- 0x334fca62, 0xa31fedc5, 0xb17e84bb, 0x458f524c,
- 0xe236367c, 0xad6ddffc, 0x6fa3b705, 0x2457dd4f,
- 0xacb206bf, 0x33c6d7f0, 0x22a232ca, 0x372bb1c4,
- 0x92057e84, 0x14b02358, 0x90d3dea5, 0x941fca1e,
- 0x39668874, 0x29f8ccf1, 0x7ee0a47b, 0x0d025525,
- 0x3f1c0f4f, 0xf61124c5, 0xd3ff45f1, 0xf5115ddf,
- 0x7a32b730, 0x66d640d3, 0xceb4cd89, 0x294be9e9,
- 0x628d7eb6, 0x573093fd, 0x5e5fd116, 0x654c4313,
- 0x4ac06396, 0x679d8e6c, 0xf8385637, 0x882ee0c1,
- 0x82c95bc6, 0xb5e5699f, 0x1927b099, 0x2d024059,
- 0x511aa76d, 0xf7a652c4, 0xcc41d63f, 0x36957ef1,
- 0x326f88dc, 0x45eceb0a, 0xbfeb3cd0, 0xf4dae814,
- 0x95630d1f, 0xdaf300d3, 0xfdae1bb0, 0xa318210d,
- 0xdd69c157, 0xacd4e4fd, 0x7ea7a724, 0xe8db397d,
- 0xb8dfa5ca, 0x766cb107, 0x0e91d417, 0x39d28748,
- 0x4453d103, 0x894693b6, 0xc2f56cd3, 0x2d3b6cfb,
- 0x96820fdc, 0x53da38e5, 0x42af9dfc, 0x3fe10dd4,
- 0x1a97a9d1, 0x40bccd1a, 0x8f106193, 0x9d70b3e9,
- 0x71fdd31d, 0x11dc84cb, 0x01b2f90a, 0x712a8ddc,
- 0xc295091e, 0x42a6a761, 0x87ae3ee2, 0x426e84ee,
- 0xbaaedcbb, 0xf96a59a0, 0x815c5372, 0x2e0351f3,
- 0x09544cef, 0x25a9027a, 0x8b8341ab, 0x97976151,
- 0x7c328e31, 0x4e88f933, 0xd31e6de3, 0x21141597,
- 0x2849aec8, 0xecaecc4e, 0x57154cb6, 0x725d9f44,
- 0xba56aaee, 0x7d619ae7, 0x0c09fac9, 0xd81236bd,
- 0x667fc710, 0x033ae5f9, 0x50f745fc, 0x85e34787,
- 0x538cda7f, 0xd503dd16, 0x04da3c04, 0xeb3a8154,
- 0x62d9764c, 0x6b086500, 0x04a33f27, 0xfabaabe0,
- 0xdc280910, 0xba26391c, 0x1f31dc24, 0x2ed869cc,
- 0x14978055, 0xd6e9f23d, 0x79ba1932, 0xb8263187,
- 0x3c287053, 0x5813171d, 0xa20e5805, 0x1bf39bb5,
- 0x9c9caf7c, 0x8f0763a0, 0x88fc2538, 0x8ed5405e,
- 0x53fb37b7, 0x4e5e0f65, 0x59c1cb79, 0xf03df570,
- 0xccb6a599, 0x5ea4bf58, 0x5ea2e12a, 0x95bbc637,
- 0x08133508, 0x8b7194a5, 0x033182a4, 0xe5ad3e22,
- 0x12126d46, 0x335aded5, 0x4ee628dd, 0x090fbab1,
- 0x2e67e3ea, 0xa132d8fc, 0x1bb6ed44, 0xb2705a58,
- 0x2b7e751c, 0xe15ffcae, 0x62627cfe, 0xd5a498f8,
- 0x143c2b46, 0x844457ac, 0x7d4000b1, 0x2ecacfb3,
- 0x143c472c, 0xa0420c4f, 0x47833e22, 0x9f74eb78,
- 0x79dc5cc3, 0xd5e1b45d, 0x3bb00f31, 0x702739ca,
- 0x0a4c6c8c, 0xd627e632, 0x289c2b69, 0x1633d18d,
- 0x61d761af, 0x59c4182a, 0x4a9b111a, 0x4a52c8e9,
- 0x4708ad90, 0xdbd03373, 0x835b8a04, 0x05db663d,
- 0xe6ca7f1f, 0x2a08b5ac, 0x28583a42, 0x9ae3e9b3,
- 0x150b7d3f, 0x1842347b, 0x709a1f93, 0xaeda1fbf,
- 0x3bce401f, 0x8a1baa9f, 0x01290c32, 0x20647880,
- 0x6052019c, 0x7d186543, 0xcf304e84, 0xd3f7318e,
- 0x116d366b, 0xfaa3565e, 0x2e00cae6, 0x8438ca03,
- 0xf8522fa0, 0xb3357dcb, 0xf45193f8, 0x04508fe6,
- 0xc3a60001, 0x547aed43, 0xbe31030a, 0x357a2385,
- 0x4a77958a, 0x1d133ce4, 0xdf24e601, 0xba0db6a0,
- 0x702b799e, 0x643bcb34, 0xe33af8e0, 0xb90fbae5,
- 0x65571140, 0xd4bea20b, 0xe58b7cb2, 0xcd5e7c3d,
- 0x7153f7d7, 0x747ed174, 0xe6471dda, 0xd9e46017,
- 0x62de25c5, 0xece16d33, 0x36f5a1a0, 0xd82c503b,
- 0x9d472d1e, 0x34f3d3e6, 0x3e0fe08e, 0xe9a5f240,
- 0xd528ea27, 0xf6c1e417, 0x0ba5ea4e, 0xf7474725,
- 0x113c0c1f, 0xea4e468b, 0x4450efb9, 0xf6fe6ad6,
- 0xe399031d, 0xa3fc24f3, 0x9f1950a1, 0xc08196ff,
- 0x116ca5ec, 0x4786af82, 0x01e032de, 0xd04dc3f6,
- 0x0c9b90d0, 0x1ad17953, 0x7627ac6f, 0x59f5574c,
- 0xe1bc651c, 0xbca29c8b, 0x01450503, 0x8fd48513,
- 0x341bcbe0, 0x4b0126a8, 0x0a87cc95, 0xb8824433,
- 0x8578e83d, 0xba5acc14, 0xc80b9b2c, 0xb6e97cd9,
- 0xb649f23f, 0x3729b1f2, 0x38f54386, 0xf878b7a8,
- 0x33d407af, 0x741f5b8e, 0x075d7c35, 0xe1473094,
- 0xb3def3dc, 0x554c46ec, 0xed6c4bad, 0x21ee1788,
- 0xd99f10f0, 0x9bea4e3a, 0xc1aa7284, 0xf4a7f3d4,
- 0xecaed392, 0x3a50e2b1, 0xd341d311, 0x95f7af1f,
- 0xa8a4bc2d, 0x3c0a17d4, 0x647a847f, 0x1b85d21f,
- 0xc742629c, 0xb454877e, 0xc3714bdf, 0x1b4af075,
- 0x100dce7b, 0x4eea8191, 0x5f5dcfe1, 0xfb08b083,
- 0xdc3bb74a, 0x7904387d, 0x17120a99, 0xe18cb06c,
- 0x6f62f650, 0x79502b10, 0x2353b516, 0xc3f55109,
- 0x7825ab36, 0xe7cae711, 0xd47c9b20, 0x18c4066a,
- 0x1ecb5c39, 0x89388d3d, 0xcd5e1e7e, 0x22e09d54,
- 0x23573c6f, 0x531db85b, 0x6ccee43e, 0xc15cf1b5,
- 0x7d452fb4, 0x83fe1174, 0x47b32970, 0xcd9540bd,
- 0xa19e4d96, 0x2bc5a44d, 0x7bac4d43, 0x65be88f1,
- 0x1a3a73a2, 0xa4333b7c, 0x39875df5, 0x04b1055c,
- 0x167ef24c, 0x88a2dc6c, 0x7ccae5d1, 0x8780c88c,
- 0x157c40d6, 0x5abb3003, 0xd3fcf545, 0x984b3434,
- 0xed21e58a, 0x3ab1a5ff, 0x743770ba, 0x60f64534,
- 0xbee7070e, 0x7d890ff5, 0xda4e1665, 0x670e67bb,
- 0x63e7ec85, 0xf6e313c1, 0x79cf3b00, 0x7a92a4db,
- 0x9da0dc95, 0x2aa2faaf, 0x6dbf37a8, 0x128faf9e,
- 0x73fc7ae1, 0x3c17ba6f, 0xa39b42b4, 0xc187bdfe,
- 0x3f107194, 0xaeb79cef, 0x3c00fd96, 0x369ee475,
- 0x703304ee, 0xd9e48e46, 0xf15adda4, 0x82fcbc7b,
- 0xeef851dc, 0xd880a41a, 0xcbfc0ee7, 0x02c4fe03,
- 0x8c34a979, 0xa1ce5216, 0x60243594, 0x9bb078c6,
- 0x5fb87abc, 0xda3a8b9a, 0x7fd4b726, 0xf5cac6b3,
- 0xbe65fd2f, 0xeb76cb4b, 0x5aacdd07, 0x528d2ea4,
- 0x773c014d, 0x3b2bc521, 0x729011fd, 0x047d28a3,
- 0x7cee0602, 0xcbb6d384, 0x7c75e483, 0x88a2d2f3,
- 0x62fbbc54, 0x05df5ca3, 0x9f57ae1f, 0x9374ac97,
- 0x9ac7a900, 0x445c8ee8, 0x609ea023, 0xf33be914,
- 0xbbdfb7f5, 0x23713816, 0x600ca7d9, 0xd74c4b5c,
- 0xeeb82a27, 0x656ce577, 0x50ac829a, 0xed1a49fc,
- 0x8ab39272, 0xc5b82955, 0x740ff715, 0xa1692b0a,
- 0x9dd67528, 0x0d1f0071, 0x84a5464c, 0x955dccad,
- 0x96ca68a9, 0xc69f2148, 0xcc2fda23, 0xfca7f8fa,
- 0xa33f03d3, 0x48ca8480, 0x7e32a71b, 0x8f91a2c7,
- 0xa976a470, 0x8c5394a8, 0x764b0ac5, 0x8884f106,
- 0xbe5c8f61, 0xf07c911d, 0xe8c57ad7, 0x2e613171,
- 0x4a6ddbec, 0xdaa4761d, 0x82aa91e1, 0xd9725405,
- 0x92f3f354, 0x0bec2278, 0x66608c01, 0xa04099c5,
- 0x0f1825d1, 0x9cefb5e4, 0xd8ed966b, 0xf83e386c,
- 0x9bbd5026, 0xc3c0b291, 0x2f69486f, 0x85624022,
- 0x45b84bbd, 0xa1f91d90, 0x1e1efa94, 0x8a75d193,
- 0x9507b716, 0xa96976f9, 0x8359a6ea, 0x72aeeb28,
- 0xb1d4b727, 0xaea1c2b1, 0x61d3cbbe, 0x65ae2218,
- 0x7f724420, 0x3cac4251, 0x93ee0c1c, 0x64010c67,
- 0xab88919a, 0x0c10d388, 0xdf3daa06, 0x4a4b0997,
- 0x465a8813, 0x3f6c33db, 0xcbcf6a48, 0x4e33c2d6,
- 0xc79b5905, 0x6e3793aa, 0xe9ebce19, 0x5a849a33,
- 0x0490f96c, 0x808af010, 0xe9f617ca, 0xcc6d4602,
- 0x3d877302, 0x61a4129e, 0x432e46ab, 0xfdb64bc8,
- 0x4f317ebe, 0xf6848bbc, 0xff3bae1a, 0x9d70fb8a,
- 0x66df6ac7, 0x8a7f2aea, 0x59878b1e, 0x988a871d,
- 0x02d349c9, 0xec0d72c6, 0x73291262, 0xd955eded,
- 0xb02fff43, 0xaa2d723f, 0xaf73b857, 0xd074e773,
- 0xe696557c, 0xf6f6d303, 0x9ba2c0de, 0x90165398,
- 0xd382bc24, 0x4f902051, 0xcb761448, 0x73aa9756,
- 0x554ed1f5, 0x6c28d933, 0xa3ed9268, 0xbb09317d,
- 0xd001cee2, 0xd7ffe0cc, 0x59e04eb1, 0xd78e1b6b,
- 0x66e4392e, 0xa68f9f6f, 0x27f971d7, 0x211ce38f,
- 0x28f787fb, 0xbdc7b9dd, 0x22ad3abc, 0x7b7079db,
- 0x7b4298fc, 0x5ce79d65, 0xa7870345, 0x295f88ce,
- 0xfdce14ad, 0x122f7075, 0xaf27d4f6, 0xda2b1924,
- 0x9f5dfb98, 0x64405332, 0x0dd7e2bf, 0x31e7c1a0,
- 0x67959231, 0x2f0c1197, 0xe3846345, 0x55fc2aec,
- 0xd9f6e7a1, 0x4b68f5b0, 0x22c527d5, 0x3a10a5dc,
- 0x8f088ab2, 0xb8aeaa4a, 0x5d92c52d, 0xaf4d81b9,
- 0x3c550f85, 0x4b9c6eb0, 0xb25ee7f7, 0x345e3dbd,
- 0x721841af, 0xa0195140, 0xd3281d4c, 0x77f8b657,
- 0x6c2248da, 0xd29d40cf, 0x1b1c7201, 0x37d89a61,
- 0x90796492, 0xf15f6138, 0x38f4682a, 0xa1b6a5bc,
- 0x2b3ec6c7, 0x9f799827, 0x668f51f5, 0x960ae646,
- 0x8edac805, 0x1fe326bd, 0x4fdb8553, 0x240b3a41,
- 0xd57a8343, 0xaa77d835, 0xe773d2cf, 0xcd4c9311,
- 0x8f83e2aa, 0x41503f62, 0xd16e6afc, 0x72a8ee46,
- 0x85a50ea6, 0xb188874d, 0xa58fe21d, 0x984b3ad5,
- 0x676872bd, 0xc9785d88, 0x93b129e0, 0xf6dd66aa,
- 0x5f46d7db, 0x915bbbe4, 0xd5bb7a68, 0xdcffb9e5,
- 0xb2822f2e, 0x78337743, 0x122f446a, 0xf28389f7,
- 0x5c55061d, 0x9a965f10, 0xd1cdbf80, 0xbb1afeaf,
- 0xf9e58885, 0xeb0c6538, 0xe766d40b, 0x9a052186,
- 0xe468feca, 0xad66cb11, 0xc37252bf, 0xb6a22475,
- 0x56c3aac4, 0xb6e832e0, 0x5093fc20, 0xed827f33,
- 0x4f7d3149, 0xbf7637e8, 0x01065f64, 0xde875144,
- 0x7605fcaf, 0x6174a7e2, 0xeee5b92e, 0x942a7b17,
- 0xd6092543, 0xc9d42372, 0x2bf59900, 0x0b8360a1,
- 0x1157cedc, 0x5517c6ca, 0x06cf6c10, 0x5520ef08,
- 0x8fe1d847, 0x123bc0dc, 0xfd7d101d, 0x46f7c7bd,
- 0x69ebfab8, 0x02c05e70, 0x497b884c, 0x25038d06,
- 0x2f6488cb, 0x184f0cbf, 0x568580fe, 0x0addbcee,
- 0xc9836be8, 0x33d25f94, 0xfaf57137, 0xc1329b74,
- 0x2398f70a, 0x1af8d6b5, 0xc3b0b215, 0x4096b7cd,
- 0x6ff7eae3, 0xa7fbe0f9, 0x9063016f, 0x25b13428,
- 0xc14fc8b4, 0xe9162886, 0xd8a8af8b, 0xa3e82eb1,
- 0x922b7a7d, 0x2fbfbff7, 0xce7e5134, 0xa7d2592b,
- 0xa31d7b3b, 0xe35b479a, 0xddaf042f, 0x84a4e9a6,
- 0xccd9127f, 0xb4569f69, 0x6c0c2be2, 0x07b85dbe,
- 0x940ec892, 0x01d53d55, 0x33c7c773, 0xc741a6ee,
- 0x1ad4b26e, 0x84de8eeb, 0xc006e3ab, 0xebe7d0c1,
- 0x11b2ae46, 0xff569ef6, 0x023681c3, 0xff1786ca,
- 0xf34cf604, 0x381e282b, 0x882efa21, 0x9b8e1fb9,
- 0xa7c1a1a6, 0xbba7833b, 0xa041dae2, 0x2bd40bc8,
- 0x77836a98, 0x92b2b00c, 0xec94bbbf, 0x1eab3570,
- 0xd6cdb94f, 0x1a50e7be, 0x9f1f8065, 0x0c3d0124,
- 0xf58db470, 0xa9e2fd15, 0x534c9ae7, 0x48968a0f,
- 0x83f3c2fd, 0x4b3b1bd2, 0x5bde47b6, 0x86a06b48,
- 0x11934039, 0xbaa6067d, 0x7d75a2e2, 0x7da7e096,
- 0xb5b171c1, 0x0bf53cf9, 0x9cdec8de, 0x9551acdb,
- 0xc530438b, 0xbd671e7a, 0x1280842d, 0xf5d88af9,
- 0x1245df3e, 0xdf6b048b, 0x53edbcfe, 0x40ff2ed1,
- 0xe2cb8d61, 0x309e7e99, 0x1b6be416, 0xde3f6dd6,
- 0x3e13356f, 0x0fd0f8e5, 0x4906c31d, 0xbaf5a269,
- 0xa868c874, 0x73fcd3d7, 0xd7fde17f, 0x9ae13f32,
- 0x862f9c74, 0x30b5d589, 0xa62971f2, 0xacd23b52,
- 0x1fadf615, 0xe969e6a1, 0x58925d95, 0x26d9110b,
- 0x94282383, 0xdb7e87b4, 0x61f2dd84, 0x1ace18fa,
- 0x6e50e5c2, 0x8570c4b3, 0x4bb8132d, 0xbb1ec149,
- 0x434eeea0, 0x9010fbdf, 0x513baff4, 0xe18c2240,
- 0x6ad59662, 0xec453e06, 0x5abef1fb, 0x8bea5393,
- 0xa65537d3, 0xb418d400, 0x1304cf30, 0x372e758a,
- 0x9f02eb97, 0xd80c99ca, 0xb02edd9f, 0x73d9f559,
- 0x91260500, 0x16ec2d68, 0xf4950f12, 0x41bdb11a,
- 0x1f7f9a2f, 0xd1ccc1bf, 0xb6e38114, 0xada41bc8,
- 0xc6c877ca, 0x3d84ac90, 0xf2ff6f97, 0xf4db55b8,
- 0xb3dd1ca9, 0x0f95e403, 0xaf7aa610, 0xb778cbea,
- 0xd38c3729, 0x19445e31, 0x373971dc, 0xfd9dbdda,
- 0x4ee0fc8c, 0xa2831d78, 0x023379b4, 0xff7b5aaa,
- 0xd2fe9b62, 0x5ac6d8ab, 0x68bdd29c, 0xc5126f8b,
- 0x739e9f16, 0xe7b9e7b1, 0x26b4f5e7, 0xdd8d7179,
- 0xbfd97c58, 0x5dd2c6e7, 0x7b161782, 0xf04b2855,
- 0x3c644c2b, 0x24f6d67b, 0x9774e6ef, 0x15e138f8,
- 0x27095205, 0x72f60dab, 0xdf419dc3, 0xd0e8547f,
- 0x9e550ef9, 0xebf59032, 0x7aac934e, 0x4cf229ae,
- 0x68d40429, 0x52da6dce, 0x7633c388, 0x5991a40c,
- 0x9094a217, 0xceb564bb, 0xa470565b, 0x0c25cf95,
- 0xfbd5a738, 0x788154db, 0xdb99181c, 0x1f4b6c88,
- 0x595967d9, 0x15593c46, 0xe697197e, 0xdd423fa0,
- 0x8fa9750b, 0xbf1a16b5, 0xcbc93675, 0x2a160d35,
- 0x957aabf4, 0xc5d0f510, 0x56bf0671, 0xb369aaad,
- 0x2182b995, 0x0724c93a, 0xeacea072, 0x5c9c09bc,
- 0x9923e4d2, 0x09c0446d, 0xe84d7071, 0xaba523fe,
- 0x61b8db6f, 0x59de0329, 0x4fa29e20, 0x461a7cf5,
- 0xbc01f300, 0x76ed4e61, 0xf8eab270, 0x990eaed5,
- 0xdcc93fd7, 0x1ea665ae, 0xb19decc7, 0xb72c1b66,
- 0x6688b343, 0xe006019f, 0x099544a0, 0xdd3a530c,
- 0xf5e83f0d, 0x2c60d0c8, 0x88e01e7e, 0x9a19b32d,
- 0xc0ad1896, 0xc5fea7ce, 0x94017684, 0x2ac1ea84,
- 0xf51c37e3, 0x1c715b66, 0x69e4bc62, 0x71283993,
- 0x1c2f4e97, 0xf6d5e0e5, 0x0f05e60d, 0x4ec27480,
- 0x8b55c122, 0x3a188f9f, 0x74e3ade3, 0x23acfccb,
- 0x6b91d884, 0x21764b24, 0x1d985f2b, 0xf7250a48,
- 0x39e3a568, 0x18e90d0c, 0x2fb81478, 0x4a0b413c,
- 0x88b31e83, 0x11aebf51, 0xe2306214, 0x7c6a6ba3,
- 0xce73828d, 0x4254fd56, 0xc9f8df24, 0x676e1294,
- 0xb885f8c8, 0x88abb4b7, 0xb7396e2d, 0x1a1a390a,
- 0xc51220e5, 0x8a7cb695, 0x36086502, 0x1d82cc88,
- 0x1aab1b06, 0x1f134f4b, 0x77a734cf, 0xab22564f,
- 0x4eb87d47, 0x50e8dfa9, 0x11df8078, 0x18fd070d,
- 0xbef37f01, 0xa15afe65, 0xa52471d1, 0xa63ee5d3,
- 0x5be1cfb6, 0x23671d28, 0x117ad254, 0xd1b01766,
- 0xe30b8a65, 0x1cdddf83, 0x1bd7ebeb, 0xece2f6dd,
- 0x481cf4d1, 0x177f425e, 0x4a4f01bd, 0x2e010338,
- 0x61d0295b, 0x0416841e, 0xd5c746af, 0x52b4d0d5,
- 0x189b878b, 0xd308f655, 0x6897377f, 0xe2e15941,
- 0x5399bcec, 0x3fd3f5ff, 0xfdbf1836, 0x17806622,
- 0xc5d31e25, 0x3a1f55e3, 0x8f813296, 0x071b6bf7,
- 0x47a0808c, 0x365b7b8b, 0xa548aced, 0x21cbb8f0,
- 0xa18088d4, 0xfeb793e0, 0x01b69a2e, 0xecde0ac9,
- 0x0b433707, 0xe0b418d9, 0x134b8b72, 0x6a540fee,
- 0x126dab96, 0x21e11b8d, 0x67322574, 0x4594e729,
- 0x2963313b, 0x354596e3, 0x3b416341, 0x5df82051,
- 0x7865d8d2, 0x6c6649cd, 0x6761989c, 0x1c252b8c,
- 0x76220e24, 0x7db9b968, 0x60a889d6, 0xc9726070,
- 0xe289905e, 0x64445cb4, 0x7c37b688, 0x166b9f06,
- 0x431700fb, 0x48794bcd, 0xc9300724, 0x6b2f4aed,
- 0x1c98b16b, 0x19f61c61, 0xbd230ae7, 0x2e065918,
- 0xde69ad3b, 0xcff99480, 0xb2f9bae2, 0x801207a0,
- 0x030e5ae2, 0x623d9b3d, 0xc2156695, 0x2c0d53fa,
- 0x94fd0bd1, 0xf4cf45e9, 0x42597ea0, 0x59a49589,
- 0x87d27d6a, 0x8a66488f, 0xcc07048e, 0x06d6a76f,
- 0x89481e0f, 0x25dcdc68, 0x3e3c268d, 0x967d1b3b,
- 0x1e17a8ec, 0x3c32080d, 0xeff3600a, 0x7f0e224a,
- 0xad850f59, 0x0f2a4133, 0xaf1808c6, 0x1c6eb8a2,
- 0xfba7572b, 0xbb8ec03d, 0x4256627c, 0xf089ae59,
- 0xb9fd6230, 0xd03648a8, 0xb0c63f78, 0x54bc7913,
- 0x0bbc2bac, 0x0a94e32f, 0xdfec6161, 0x887f4dae,
- 0x465dd2a5, 0x0fa8dc1e, 0x4d1984da, 0x3356f309,
- 0x15f423e2, 0xc2a07e5a, 0xc19265bd, 0xf3c2ae0b,
- 0x8d86ef00, 0x81ce94af, 0x323a982f, 0xea38e1b8,
- 0xa36a3e8f, 0x5ef1518b, 0x5692a84f, 0xdd66efce,
- 0xb8a4c5f5, 0x0689776a, 0x295d73a5, 0x0ae6785d,
- 0x62f1ab65, 0xa9181f50, 0x3a4c6f3d, 0x0b9ab84e,
- 0x83a2a195, 0x919553d3, 0x4e7d43c6, 0xf0bf5d18,
- 0xce876130, 0x773caba7, 0x02f71c2f, 0x9b8eb6d8,
- 0x30c5db13, 0x2fda78a4, 0x9a358df7, 0xac3d9c3a,
- 0xf2a25ef7, 0xa7e710d0, 0x0986ac72, 0x98d73ef6,
- 0x4d1ac3ca, 0x7579abf6, 0xfda5f3db, 0xc040d8e1,
- 0x8a1cf285, 0xfc9960b7, 0x9c7dcd59, 0xdc78ff0d,
- 0xc5876405, 0xc2fb9c7f, 0xa6e9624f, 0xaca0f295,
- 0xb0eeccb0, 0x8f61b056, 0x1398a934, 0x52868c9c,
- 0x824d9994, 0x6cb08beb, 0x275136fd, 0x64978a31,
- 0xa879c151, 0x7c3ca445, 0xc6a16fae, 0xc18cdbfb,
- 0x2806bef0, 0xcaf9766c, 0xbac35157, 0x4a68238e,
- 0xd7a61559, 0xcdda9b45, 0x1eeaaeb7, 0xe9a7d37a,
- 0x37d676a3, 0xed994073, 0x085c6c91, 0x6f488598,
- 0x7f1a6a56, 0x574c8915, 0x9cff6c11, 0x52647cee,
- 0x67856ea2, 0xcc3a658a, 0x1979f070, 0x8201cf56,
- 0x40556f2c, 0x7848710b, 0x471e8559, 0xee1d6373,
- 0x3cd276db, 0x15760135, 0x8c2292b3, 0x087b5d32,
- 0x5c96ab0c, 0xe3b4d850, 0x3048501f, 0xa39df353,
- 0xd6a690cf, 0x56a9f6af, 0xa410ca91, 0xadfc674c,
- 0x91f2f212, 0xe565a922, 0x2ad441a0, 0x70f2dbbe,
- 0xb7ef1856, 0x5b39b7ce, 0x061dac3a, 0x95a60250,
- 0x032669f8, 0x75c7eca8, 0x918b90b7, 0x8afa15ba,
- 0x5f02eb32, 0xec4b53ca, 0x2ad61e09, 0xe663b16f,
- 0x453bbe0f, 0x4b52ad67, 0x704e835d, 0xb110aa6b,
- 0x6f80f344, 0xbd33126a, 0x3d730676, 0x61274d4b,
- 0x366f4ab7, 0x76b4fd92, 0x0cab4b03, 0xf08e91ae,
- 0x9a805c87, 0x9693d06d, 0x541332c7, 0xace1b771,
- 0xe450f25f, 0x08f15fde, 0x1d46af92, 0x38f1b34b,
- 0xdda5f95b, 0x42867f2a, 0x351ba162, 0x649dce1c,
- 0x647e0a6c, 0xe096fbc7, 0x1a4f214b, 0x052a167e,
- 0xa23c0c71, 0xef96e22d, 0x73adb4de, 0xb88d43e8,
- 0x37aed369, 0x51be874b, 0x0131999e, 0x6c4c3595,
- 0xd192977e, 0x6175c3fd, 0x01f6ca19, 0xa9575222,
- 0xd5d7f2d2, 0x0da0e86c, 0xaf2ca907, 0x0f912ecc,
- 0x11e3bb36, 0x807bcd4b, 0x16386d78, 0xe8eff9de,
- 0x39b84743, 0x198b7d0d, 0xa1cb0889, 0xbcf19a93,
- 0xfc9f8ffe, 0x013536e9, 0x4f2d060c, 0xa894b0a4,
- 0x7d1a0f45, 0xb73219cb, 0xf1abd7a3, 0x4192d3d0,
- 0xf66a8e04, 0x5ba565db, 0xf192eed0, 0x9de8fdd4,
- 0x80da2920, 0xae34b9cf, 0x7f27a72d, 0xc831d71a,
- 0x4d2a1ddb, 0x5c1fcadd, 0x7de9efab, 0xb5500cb9,
- 0x57d5e486, 0x5c76b5ad, 0xf462a1a8, 0xe8c98e95,
- 0xb48b3acd, 0xbeb35b86, 0x71df3948, 0x9d97d8f1,
- 0x4f5f549a, 0x85a3473e, 0xeef99b25, 0xb6c28677,
- 0x499445c9, 0xef8d708f, 0x928535f3, 0x827abf63,
- 0x8431726f, 0x8b561869, 0x802f4b7b, 0x50d11349,
- 0xa3eae78f, 0x109e8f42, 0xb31b2c45, 0x0041ab72,
- 0xea5dac3e, 0xe3692b0e, 0x371b5492, 0x4eebba99,
- 0xba1b85be, 0x5460a48f, 0x7b336263, 0x9ca28a9b,
- 0x153b3bbe, 0xff46bff0, 0x10367d0e, 0xc29a2a60,
- 0xb1d8caff, 0xc16c3aaa, 0x76f91830, 0x25a1fca7,
- 0x72dbf7a7, 0x44bc4924, 0xa42b11de, 0x24230012,
- 0x449d3abd, 0x64705b5d, 0x9a62ef85, 0xfcdd549e,
- 0x2df78089, 0x3a43088a, 0xb0f51665, 0x2e42cf5d,
- 0x53c68400, 0x6014dcc1, 0xca4863bf, 0x24f50528,
- 0x81a7dc99, 0x488f5d57, 0x59b97b41, 0x1a83808f,
- 0xa9723897, 0x10f66c26, 0xed9c7c6f, 0x921f0993,
- 0xd52c67d2, 0xb67a7765, 0xb987ea64, 0x991da05f,
- 0xfeb1e64f, 0x75000143, 0xd0efee3f, 0x69835455,
- 0xcca5874a, 0x4276c9a3, 0x938fbb52, 0xd2237864,
- 0x19afe2d8, 0x23ecca87, 0xeb640180, 0xe7755000,
- 0xc4a56e03, 0xa21121b9, 0xf3b043cf, 0x8e47e3a3,
- 0xc4121407, 0x8e8dadf8, 0xd5e26e64, 0xc2846083,
- 0x85293aa0, 0xd7affc50, 0x5fc89502, 0x459681b5,
- 0x3a554842, 0x64dadb74, 0x1e89aa6b, 0x2edf4555,
- 0x133f28ef, 0x5d4ee4f6, 0xa9cb2b84, 0x246f9078,
- 0xb2327a29, 0xa2e9f935, 0xaae618b2, 0xb5fc3e42,
- 0x5861276f, 0x82c619ac, 0x871d9434, 0x01d46376,
- 0xb9f5e432, 0x45267ba1, 0x655b9e50, 0x0394f543,
- 0xe1d5d3fa, 0xbed9d5a4, 0x028fb630, 0x4af00271,
- 0x924d203f, 0xc99a9522, 0x27b7480f, 0xa44f0bc3,
- 0xd775bad1, 0xcd812a88, 0x8de50e58, 0x67b8c119,
- 0x1b3ac68e, 0x201da61c, 0x90203805, 0xbf707db0,
- 0x71e19f2b, 0x531533d3, 0x5ba07475, 0xf0e0eec4,
- 0xd670f59e, 0x3e103ef6, 0x3c650bcd, 0x42d4e272,
- 0x25f4f1b6, 0xd60dcf77, 0xa1d51a81, 0x9a6de436,
- 0xea8fc06a, 0xe531316f, 0x7ce26a21, 0xc526af2e,
- 0x54e6ad81, 0x4377e550, 0xc506529f, 0x471d35fb,
- 0x4d238c39, 0x67917265, 0x4880982c, 0x0efb4af8,
- 0xbfa8d0f4, 0xdce08927, 0x1b74b544, 0x60cabce1,
- 0x20aef17d, 0xf743c1d7, 0x57a9ce5c, 0x76d4050c,
- 0x56f5e0ae, 0xc0b34226, 0x12c4c20c, 0xf824597b,
- 0xaa2050e5, 0x2ab4e1db, 0x3d5cdfa5, 0x58280f73,
- 0xe27495a6, 0x9d27f65c, 0xcaaf6bd6, 0x3b1811fd,
- 0xf82a33c3, 0xb8d15201, 0x8ec73ef4, 0x99ab20d5,
- 0x8f095885, 0xbdf47f05, 0xa4214b5a, 0x2e6f827d,
- 0x4592c3c0, 0x2dd3be25, 0x30a67d2a, 0xfedfdb14,
- 0xc111b856, 0xc61ff666, 0x76c1f441, 0xf55944f3,
- 0x4740b7c0, 0xdfbd6f4f, 0xd400a3f7, 0xbdbeb5f3,
- 0x4038ddb8, 0x0be66965, 0x2bf69e7f, 0x1c3d996e,
- 0xd7fe7a88, 0x8ee7e8fd, 0xc678056e, 0x111e4a47,
- 0x68cf2ae9, 0xd29d7245, 0x5b5dd367, 0xe6b2ab3f,
- 0x7111a7ab, 0xf2a21c5c, 0xd5435a9e, 0x86401cb9,
- 0x9a288246, 0xd4f9ea27, 0xd07da772, 0x1d5719ed,
- 0x8d8b5a88, 0x3f4191c2, 0x56cc0c1d, 0x549a79d6,
- 0xc3251a24, 0x614309f3, 0x99394b0a, 0x0a1c988e,
- 0xaa8bc076, 0xe4c8505e, 0x7d4dfa95, 0xb1a97f00,
- 0xfac7d971, 0xea8e2d74, 0x261ad1a4, 0x4fb37ea5,
- 0x1a106b19, 0xa281ee48, 0x5eebe79e, 0x9d9a08c3,
- 0xf4979b06, 0x5c3e5781, 0x017cebc9, 0x36402dbd,
- 0xaae8df09, 0xd7a0a6fa, 0xa4fd8bdb, 0x769b72ec,
- 0x93ba256b, 0x597b1b72, 0x8cb223d9, 0x45b105e4,
- 0x6ce12ab2, 0x4a4a6dc9, 0x69a68302, 0xa3ab0377,
- 0xf4026526, 0xd7c06d01, 0x86c99511, 0xbb487cef,
- 0x7305999e, 0x9ce8b2d9, 0x7baccd31, 0x9e6db792,
- 0x541fd437, 0x7102a4fd, 0x2cfd2af8, 0xe3fd541a,
- 0xc76717a5, 0x0e30fc09, 0x8f6de52b, 0x001a3062,
- 0xb645ac39, 0x2ec826c2, 0x20c04713, 0x7fe88da0,
- 0x0d37b0ab, 0x51719f08, 0xa9bbbeaf, 0xba657a73,
- 0x54804a7a, 0x1799c329, 0x41bd0c20, 0x13bd65ad,
- 0xc491ad3b, 0xb34e2edc, 0xb73d7c19, 0x604d1ad0,
- 0x161bf036, 0xd8515015, 0xcbf3f705, 0x3a880873,
- 0x6847b4de, 0x6f486a3a, 0xfdf96ca4, 0xcc0bb9bb,
- 0x32e51e25, 0x29e18480, 0x558c6689, 0xbe835c8b,
- 0xb431e806, 0x73db1d47, 0xd740ab4d, 0xafa0ad06,
- 0xce905d70, 0x67be6f62, 0x5b7770d5, 0x71c48671,
- 0x34b5fcd1, 0x68c914db, 0xa2c651f8, 0xe2d9a3e5,
- 0x27540d0b, 0xe49b84e5, 0x135d9648, 0xe3913a70,
- 0x677f3258, 0x50225f1b, 0x559e943e, 0x7557afe9,
- 0x25d663ac, 0x3f0444cb, 0xf6ea805a, 0x93917af6,
- 0x727e44b1, 0xcd50e43c, 0x0c319d01, 0x69a84d57,
- 0x1148a05a, 0xdd610d18, 0x31c5ebaa, 0xcfb9bc46,
- 0x4e91db57, 0x705d2475, 0xd9fc9519, 0xe350fbd2,
- 0x3368c7a5, 0xc9a8ee0d, 0x73e12c1a, 0xb4a755ff,
- 0xb6aa8968, 0x9af7ed1d, 0xbbca18e3, 0xf8268aa0,
- 0x5fb1a6bd, 0x0b8ec594, 0x8954f363, 0xdf113f29,
- 0x05635d61, 0x534b28ae, 0xed75117b, 0xdeff6cc2,
- 0x9e33a2f9, 0xa1a4299d, 0xc18e6840, 0x7f81ec41,
- 0x733d457f, 0x9c620573, 0x03d65d24, 0xafb2a17c,
- 0x906dbd63, 0xb800eee3, 0xf25df8c1, 0xcace4190,
- 0x80837262, 0xa7c477de, 0xa7dc3200, 0x7d13cf9c,
- 0x4b10e82e, 0xf8282d4d, 0x0c4a1521, 0x41c1f1d1,
- 0xa816fdac, 0x50894c29, 0xbf96e6e1, 0x15f37687,
- 0xd1f0c529, 0x5e8d445e, 0xc96157e3, 0x35bc6a4b,
- 0x17ab1d44, 0x4b32c7d4, 0xad07b3a6, 0xf57f72df,
- 0x222eedf8, 0x198ee973, 0xcdea7151, 0x0b558e7c,
- 0x5eae4c95, 0x4e035ee1, 0x80d1dd40, 0xe121f92a,
- 0xc9755a36, 0xf5cfeb7d, 0xc9fc70a3, 0x84771eba,
- 0x7b491be4, 0x0bc9927a, 0x70d1c4f9, 0x6169ed7c,
- 0x57eaa667, 0x265a5d02, 0xab8a9ab3, 0x66bcf428,
- 0x363a9f21, 0x8915d408, 0x8a4feb0a, 0x32df9e3f,
- 0xca0d330d, 0x299a8f5c, 0x6b04a1b1, 0xd58a7605,
- 0x557c5d7f, 0xf402d6dc, 0x3af34632, 0x3ebdcc80,
- 0x82842684, 0xde5662c2, 0x7c6ac0fb, 0xe7d92ee8,
- 0xce5abdba, 0x56806b13, 0x01b9095d, 0x9e20b335,
- 0xecb5420e, 0x2014aeb3, 0x6c6c21f2, 0x16137540,
- 0x2c74e373, 0x981e65e2, 0xdbf439ce, 0x2ce6414f,
- 0xbffc40d8, 0x5da3b06d, 0x3f122a5b, 0x2eb469ca,
- 0x2223ff44, 0x2d4dc939, 0x45dcd66a, 0x674a89c1,
- 0x34780db5, 0x69b18919, 0x0b03c2ae, 0xef8e95fd,
- 0xbcff533d, 0x25802d08, 0x5c5e98be, 0xd2d86627,
- 0xc36a8db0, 0xb7037871, 0x927764ff, 0x8f4486df,
- 0xdbc25d8b, 0xd7e45e48, 0x4368cedf, 0x4e1ab6c3,
- 0x01a13217, 0xb7a6a7d0, 0x80b476a7, 0xcc769d12,
- 0xd6a2e19e, 0xf1fa8984, 0xe9dd6f57, 0xfd51184f,
- 0x4127cf16, 0x93434013, 0xeaa14b68, 0xafda06d8,
- 0x24c50b72, 0xa8f4ac62, 0x925c050f, 0x24216919,
- 0x3e536e55, 0xb1ec1d2b, 0x025a17b6, 0xde102883,
- 0x1b1d43e9, 0x6db046f1, 0x60ad4400, 0xfa29891c,
- 0x0fa073d3, 0x2b8764c8, 0x6e7d5d67, 0x0583a1bc,
- 0x1cdfa417, 0xfecac7bb, 0xe4da5157, 0x8fa6e28f,
- 0x31f8ec29, 0x97faca9c, 0xd83ec2e7, 0x7af7c43e,
- 0x6843df73, 0xc94a901a, 0x3459cede, 0x66fe9d05,
- 0x101dbc3b, 0xb6f5077b, 0x3001478b, 0xaf0bb014,
- 0xb36e8113, 0x34deb613, 0xa0c2ea3a, 0x0016501c,
- 0xfaefe974, 0x351882b9, 0x54ed87da, 0xaf07d4a0,
- 0xcfa0bfac, 0xdede7ac0, 0x389ad36d, 0x70e20e49,
- 0x66d151dc, 0x04b3f189, 0x1f3e82a5, 0xf4f6dd3a,
- 0xc5dd1095, 0xb5c66d12, 0x127c8885, 0x91d11e89,
- 0xf7f78341, 0xe0479da8, 0x356a32fc, 0x6a08c056,
- 0xb084b999, 0x345215cc, 0xe0a0c381, 0xa2557263,
- 0xfb3740f8, 0x41b3a613, 0x015a4c2f, 0xa31586ee,
- 0xaf25d79a, 0xb5706d24, 0xe7d1f84f, 0xf7020c69,
- 0x1dda209c, 0xf544df92, 0xce713bdc, 0xc519d3c2,
- 0x22b85f04, 0xf4cfc44b, 0xa0b22bf7, 0x26d1b449,
- 0x23bf9d59, 0xb859c110, 0xd54dae1a, 0x36849959,
- 0x3fb1ee39, 0x4aa6f970, 0xeec7a300, 0x892069b8,
- 0x27229bf5, 0x7ce5ff86, 0x8f2001b1, 0x8880f8f1,
- 0xa4dfed1b, 0xd3a9f8a9, 0xb0e5128b, 0x7aaa96c8,
- 0x0763b52a, 0xab7ecd5d, 0x83f921df, 0x29d9092f,
- 0x81bb7b3f, 0x250f581d, 0xc84d593b, 0x17839bd2,
- 0x3363fe94, 0xc43193a0, 0x54422b16, 0xacbcd70e,
- 0x22ed0c08, 0x695daf74, 0x4a94c6f7, 0xe75eb314,
- 0x72406d5c, 0x85a582bb, 0x62e71d90, 0xa3602b62,
- 0x3e5bdcdd, 0xa3b2526e, 0x2aa86f25, 0x6985258e,
- 0x0ef6f163, 0xd39cbf76, 0x25e068e7, 0x2e821045,
- 0xff43de07, 0x53c28fa2, 0x9cd33c06, 0x08eab9ff,
- 0x5cbec3d6, 0x741b0d4c, 0xf3e9f2af, 0xb0c9ebcf,
- 0xd2fa5516, 0x6aceca4d, 0xb7aa170b, 0x91064556,
- 0x8c3a2725, 0x8a9cf497, 0x0bda8884, 0x5091f5dd,
- 0xc21a2b4c, 0x848bf319, 0xfb224655, 0x379c22ef,
- 0x73506767, 0x1e1131ba, 0x66db3867, 0x8c69bb23,
- 0x449f03d2, 0x267a0a8e, 0xfdd33f8d, 0x3d6384ba,
- 0xb3deef14, 0x1b592989, 0x6fc8693f, 0xb89b680f,
- 0x2a0ddd58, 0xd91a7dbd, 0x16dd9115, 0x2483fde8,
- 0x90cf607c, 0x35c059f5, 0x74006062, 0x52e379a9,
- 0x23183842, 0x1f1eef2c, 0x708e608b, 0xa50d19c0,
- 0x1f8ee404, 0x775c971e, 0x9d9e41a1, 0xe314268b,
- 0x34349f28, 0x5f6e1582, 0x26c53780, 0xc4d58acf,
- 0x0ee78d20, 0x2058cbca, 0xf3e2b6f3, 0x3ca00e9d,
- 0x5434f03e, 0x4a2daeca, 0xa5c1122c, 0xcc0da679,
- 0x2816db83, 0x2c590558, 0x78df041c, 0xf786c7c9,
- 0x0de08a99, 0x9aba69e0, 0xb37b43c6, 0xc0ed75c5,
- 0x19d1e903, 0x298b4329, 0x4ad528c4, 0x30c23938,
- 0xb59658bf, 0x5672c5a0, 0x4804924d, 0x405db429,
- 0x1b681fef, 0x74be288a, 0xf0c57c29, 0xd83f17c5,
- 0xfccc14c9, 0xd9b8872e, 0x6e5a55a6, 0x75624258,
- 0x537baa29, 0xbc7ca096, 0xfc9dae88, 0x17615045,
- 0xfd6ffbed, 0xc1c06167, 0x863c3739, 0x9af2ab8f,
- 0xc04373d3, 0x3ded464b, 0x17cd43dc, 0x6b3f48a5,
- 0x3bef12e7, 0x1a0d8bdc, 0xc484978d, 0x22dd16df,
- 0x1ad2f7a7, 0xb2778fb5, 0x25c5098d, 0x93df97b8,
- 0xc8c8d1f6, 0xce4fe7b6, 0x7d19ae1f, 0xf24e4d50,
- 0x145fe372, 0x33d3a8c2, 0x4530a371, 0xc0fb1ed9,
- 0x22438bac, 0x6bf2dc2c, 0xb4529cbe, 0xab3a2bc2,
- 0xd2018531, 0xb78f9c3f, 0x4af9304e, 0xef42eba7,
- 0xc2fc9af2, 0x07e22827, 0x995f32f9, 0xd091349a,
- 0xed1cca93, 0xf6bfdbe7, 0x950fe757, 0xae81983b,
- 0x27b3d01e, 0x0f7cbe7b, 0x4522467d, 0x155d82c8,
- 0xa4591670, 0xb19f2b93, 0x891ff2f1, 0x600a3376,
- 0x2158c825, 0x2281f93c, 0x7f2b80c2, 0x212c15bc,
- 0xeecbdebf, 0xf316e255, 0x1a2fee4c, 0x93f536ce,
- 0xe3b66d7d, 0x993c5641, 0xf3ef38e1, 0x98cb4502,
- 0xa8436dd0, 0x11c8bedf, 0xc2041795, 0x3c8fc217,
- 0xe279bcd6, 0x522df4b6, 0x303e987e, 0x2c46590f,
- 0x6149ec6f, 0xcd6307f8, 0xc4c47585, 0xfd6e778b,
- 0x94a2fc01, 0x004b032b, 0x1599a274, 0xac62aeef,
- 0x67654b19, 0x10139b48, 0x0a751aef, 0x454a0ce1,
- 0xdc7eee44, 0xa828a9ee, 0x4200680d, 0x354e8bbb,
- 0xe81e3765, 0xdd0b827b, 0x641cec43, 0x5e09ae5f,
- 0x238d61ad, 0x40dc7d08, 0x73430fb2, 0x4069f058,
- 0x06d575f5, 0x0f908ec0, 0xae16e61d, 0x6178e3ec,
- 0xfb5efebd, 0x9b493a1e, 0xf7530d2c, 0x439d6686,
- 0xbe1f1fe4, 0x1028bf71, 0x0c46a51c, 0x1a92019f,
- 0xd241495a, 0x2cd2621e, 0xc611292c, 0x21ca45aa,
- 0xc66549e4, 0x894069bc, 0x3e4d8e40, 0x9face010,
- 0x28d73480, 0x6ae84a2e, 0xe59c2acf, 0xa968d69a,
- 0x2fd9aeea, 0x9b220751, 0xadb65eaa, 0xdde40d3f,
- 0x32123e03, 0x6a5f0c91, 0x2da3f8f2, 0x47b617d3,
- 0x091dd2b1, 0xc3be1b66, 0x5ad4898e, 0xeabd5276,
- 0x83f177f3, 0x9bbcd47b, 0xf1fe41cb, 0x832e1e0b,
- 0xf4670093, 0x4ec4bef0, 0x28b575f1, 0x73d3f83b,
- 0x44a53523, 0xfe2427ba, 0x008e9b5e, 0x9032a368,
- 0x32ec0699, 0x56190075, 0xf2e8c746, 0xd4329896,
- 0x43609223, 0x0c63a187, 0xe2470ef9, 0x0e0a3ce2,
- 0x057443af, 0x87650c3c, 0xa914e81d, 0x1d0bc597,
- 0x1ce0d42b, 0xf3c346b4, 0x199d199e, 0xf776515c,
- 0x9a4b4fb8, 0x9eb770ec, 0xfd6377af, 0x557c6624,
- 0x6d1f4edf, 0x3c2bcde7, 0x169943a3, 0x416588be,
- 0xaee7a8bd, 0x30a466fd, 0x858c7909, 0xaddc0c95,
- 0x724f271c, 0xb98781d5, 0xf61d4eaf, 0x56b21720,
- 0xfecd34e9, 0xf702263d, 0x3f7c1cdc, 0x3be5ecd7,
- 0x1041f78b, 0xf555dcc1, 0x7f48d9c9, 0x9688b5b0,
- 0x0204a63f, 0xf722bb6f, 0x4c05653f, 0xb629c57c,
- 0x5e24fbe9, 0x0cfca8bb, 0xe9e2818f, 0x840130c1,
- 0x24e3daeb, 0xff164046, 0x870c0568, 0x4b468b3f,
- 0xa3278c9a, 0x2a51e673, 0xadc01ede, 0x49f11116,
- 0xed03001b, 0x7d648161, 0x0a1869a0, 0x77fbb639,
- 0x24574dbf, 0x021d75cd, 0x1b9c32e3, 0x5451ca22,
- 0x56ef408e, 0x3f6deb25, 0x3a03fa8c, 0xbdb2a173,
- 0xd5ea1c3a, 0xaed24134, 0xeb95299d, 0x0dc484dc,
- 0x2f194d75, 0x4464745e, 0x29e6a715, 0x62f4534a,
- 0x530f9cd8, 0x45f9b058, 0x7254909b, 0x1b25f5b1,
- 0x932cb503, 0x8ec1b821, 0x06a0198b, 0x229113b0,
- 0xd8a79b7c, 0x7ac11c1b, 0x5e591096, 0x602a0828,
- 0x4e30a8d2, 0x5b7f0c4b, 0x0a65c794, 0xff6b0735,
- 0x5f80c5cd, 0x441b895f, 0xc248b09e, 0x6ad068a6,
- 0xc78d9df6, 0x01ee5a2f, 0x373aa716, 0x30952950,
- 0x39e38d39, 0xfd8b8e4c, 0x972d2535, 0x4e7bf47a,
- 0xf71c92c3, 0xb95fa1b8, 0x1b3bb029, 0xdfdef2c2,
- 0x9e38562a, 0x16225a49, 0xc687ddce, 0xeffde1b1,
- 0x08f6c409, 0xbe2893db, 0x947655e0, 0x781053e1,
- 0x5b91ff4a, 0x2db8bb8e, 0xef3b1bc7, 0xe22a181e,
- 0xf358bec5, 0x99200e07, 0x179f5a3b, 0x0646ca17,
- 0x99e56253, 0xd2af0dd9, 0xfef16672, 0xb5a8763b,
- 0x565cfdbd, 0x963a853f, 0xd410b7bc, 0x6b7a9cf1,
- 0x52619189, 0x05297999, 0x54cf082c, 0x4b63e050,
- 0x0ddb5000, 0xedb72b99, 0x1684f632, 0xa1461542,
- 0xb852d7bb, 0xe202e66c, 0x1870f3e8, 0xd62a4aa9,
- 0x61d954d2, 0x807a26c1, 0x4a2318b0, 0xabed0549,
- 0xe9d15c0a, 0xbfebc9eb, 0x17034731, 0x2f145506,
- 0x04dca828, 0x6ed9bf3a, 0xe6694be1, 0x34e301d9,
- 0x75072c05, 0x8f254e29, 0xaa073c1a, 0x5efe2252,
- 0x20354141, 0xe332cbaf, 0x501c7ff4, 0x873a506b,
- 0x0e3a80ae, 0xa35312e0, 0x4c6d9043, 0xcfd1aae9,
- 0xecc5ff93, 0x53f9cbdc, 0xb09e5f6f, 0x1f124041,
- 0xde0e748e, 0x3dc34e66, 0xb0c7f92a, 0x3a405efa,
- 0x4463c275, 0xc2066be4, 0x60215c73, 0xc6a5af5b,
- 0x3d4f0e63, 0x52f1dd71, 0xc4cbad36, 0x7d763fc6,
- 0xe8eb4e11, 0xaa23d45a, 0xb7506628, 0x2d080baf,
- 0x2e36de40, 0x6db864ba, 0x7ee9b5fd, 0x5f8a55d7,
- 0x0d6e6b63, 0xb1ebda74, 0xd5fc5f93, 0x15488af6,
- 0x507b72b4, 0xced11fe2, 0xab92335e, 0x29a7e9c8,
- 0x0982831a, 0xa8ad1b05, 0x55dcdd06, 0x831689b0,
- 0x95341a59, 0x6b23a0b3, 0x7718d7bf, 0xa10e5cdf,
- 0x360a4200, 0xd524d2c3, 0xf625d8d7, 0x18dbf6e6,
- 0x829959b6, 0x8afb2c0a, 0x12e5df41, 0x8f7fca96,
- 0x61f0b8ae, 0x6d7f0f6d, 0x70a1e426, 0xb967a26b,
- 0xb7f9702d, 0x23d4e064, 0x16faf685, 0xb529ad50,
- 0xe5d12ffd, 0xb55ed3e6, 0xd13a3566, 0x569080ff,
- 0x8f847118, 0x6792123a, 0x227b5cd7, 0xba1b7e52,
- 0xcefedb78, 0x4ba524f3, 0xc09a5744, 0x2a073ed9,
- 0x33cb801a, 0x4051564c, 0xcdb61ae4, 0x7cea0ee0,
- 0x232ee349, 0xf46c7082, 0x801767ad, 0x8327b57b,
- 0xf28ece2b, 0x83a0a104, 0xf736b3ad, 0x193ccc93,
- 0x645323bb, 0xa0db66b6, 0xcefeb7d2, 0xd5a9404c,
- 0x7dce4a4d, 0x6ff71b5f, 0x5d79a9d9, 0xfc7e9049,
- 0x7e92c2d4, 0x38beca5b, 0xb672e4d7, 0xaf77c9ab,
- 0x861da8be, 0xdb01fecb, 0xf359b649, 0x582e7e7b,
- 0x6b3647d0, 0x8f8fb920, 0xee432235, 0x01af6455,
- 0x795fcf81, 0x793bf7fe, 0xa3ab8d51, 0xdeda8400,
- 0xf9f0a6a8, 0x9153d4ad, 0x2fd49f38, 0x406b7ec8,
- 0x8ab8473f, 0x08cb392e, 0x2b23d770, 0x315c5b7c,
- 0x57991715, 0xc4323c1f, 0x9659ea00, 0x584b00b3,
- 0x24b63a45, 0x250dd391, 0xa0a3c6c7, 0x3bf9e2a7,
- 0xe6381c38, 0xd06dbb44, 0xf50f38fd, 0x9ac2d746,
- 0x3820e0ca, 0x9308e312, 0x18cf0ff4, 0xf29f8246,
- 0x9991a358, 0x9b463405, 0x45fc42a4, 0xbf7a2843,
- 0xdedf2111, 0xcae6bfff, 0x78d19852, 0x993e220e,
- 0x344ceb92, 0xfae92b90, 0x00252090, 0x9d33a743,
- 0xb7143bf7, 0x155fbdad, 0xb06a6ee9, 0x7af6d4be,
- 0xca5741cd, 0x4a92fef2, 0x68faa852, 0xcf59e7cc,
- 0xa94cc063, 0xc92d70bf, 0x147e4c64, 0x8fc4f233,
- 0xb2b00225, 0x5f9b1073, 0x7368cbef, 0x1043c7ae,
- 0x5cba9f79, 0x31081635, 0xa4b09da2, 0x7bcc8aff,
- 0xbac4ad20, 0xb4bcfca1, 0x7780423b, 0xd70be548,
- 0xaadede85, 0x380ffc61, 0xa4a15064, 0xe7da99e4,
- 0x3b9b8dd5, 0x06fdc414, 0x7a72b76c, 0x8c1e9e9b,
- 0xe256670c, 0x7c0cb5bb, 0x3f638228, 0x24e39288,
- 0xad9214a0, 0xbf7f4be7, 0x48263398, 0x4520d5f4,
- 0xb81e4d5b, 0x4d57f30d, 0x4cdaa3a3, 0xc1be33b7,
- 0x8c77df28, 0xc4ff528b, 0xc51d4a57, 0x61bac598,
- 0x068a1bc0, 0x08a3ab44, 0xff262f66, 0x2ce177ae,
- 0x2ddd2f4b, 0xf3af55b7, 0x5f404ee3, 0x7b84dc8d,
- 0xaee842d7, 0x873ab41f, 0x90cbf2d0, 0xc876837f,
- 0x0da4e2ff, 0x9d44095c, 0xdacce369, 0x9df9d0be,
- 0xe594d5d9, 0x2e6ccefd, 0xaff59267, 0x88e63a97,
- 0xa2357c12, 0xbd96fe28, 0x1a79ef99, 0xface1d96,
- 0x15d88dc9, 0x60f22207, 0xfa95fe9e, 0x8cc8c144,
- 0x5957697c, 0x09501826, 0x1a7d9d71, 0xcd436092,
- 0xd6186af4, 0x755adf03, 0x63bdacec, 0x82c05cff,
- 0x671d5b8c, 0x2c659340, 0xa1da6cec, 0x8b232a30,
- 0x93eb820c, 0x41dbd71a, 0x8d96b5b0, 0xa2b0aa87,
- 0xa424b92e, 0xeda18dc2, 0x6facc0d1, 0x7a4135d3,
- 0x63843f35, 0x1c1920ba, 0x0433c37b, 0x06ad0db4,
- 0xf2b2e542, 0xf75df8ab, 0xbe706538, 0xd6029090,
- 0x91be4136, 0xb2394f18, 0x50ac7fb9, 0x04291d6e,
- 0xd7e56ab8, 0xda9ab692, 0xadf8f639, 0x2fbb17eb,
- 0xdf6d9b49, 0xb3758ef4, 0xc5615d52, 0xdfb79291,
- 0xe79b6c90, 0x43134d92, 0xfa34f822, 0x54a6f3f9,
- 0xae83894a, 0x0d7f7a83, 0x3f8824a8, 0x811353b7,
- 0x4a1f0fda, 0x547bb62b, 0x58f80bf4, 0x698f01d0,
- 0xb04a2fe6, 0x849cda6e, 0x4f2dc4c7, 0x6afdeedd,
- 0x6f4de756, 0xa9db007f, 0xb72dbdde, 0x56e31d4c,
- 0x276c0b92, 0x01429f8c, 0x982b92c8, 0x098f9281,
- 0xb016d86a, 0x64b0a733, 0x51d34aa1, 0x045ff5a5,
- 0x2878930d, 0xd2b6bf6f, 0x0184984d, 0x34ad84e7,
- 0xcfad67b1, 0x2f70cfd0, 0xf15f50da, 0xe3fd724c,
- 0x3b7b7588, 0x1b1940a5, 0x18e19c9b, 0x32f98d71,
- 0x7cb73e7d, 0x1154d745, 0x30ee268e, 0x5a5963c8,
- 0xb36e03ad, 0x052b4052, 0x57c10ae8, 0xfa833fd2,
- 0x040b25ab, 0x29d8de83, 0x91a9873f, 0xa0ad57a3,
- 0x8207a261, 0x3e60991c, 0x26410027, 0x32c5f604,
- 0xc9cd7cfa, 0x3bb24d2a, 0xfc7e6e7d, 0x44c82073,
- 0x504c8075, 0xbfaad041, 0xbb383ecb, 0x3fa88697,
- 0xfa08e265, 0xbfd92e12, 0xbb9dad80, 0xc7bb99e8,
- 0x8baea4f4, 0xf4b97217, 0x50b1e1c4, 0xa0560930,
- 0xd8089bda, 0x885d2e6b, 0x36a83f3b, 0x7edbe6c6,
- 0xa114bd37, 0x08dee9d3, 0x47278a67, 0x5bb55ef4,
- 0x17dc684a, 0x82c4344f, 0x2ebbafa1, 0x84b2325d,
- 0x951ac6a4, 0x3f50aae2, 0x4695a8ab, 0xebe61f22,
- 0xcc25e519, 0x62c91794, 0x3dc2872b, 0xdd5e4028,
- 0xe2dbfd35, 0xfc695391, 0x2a296e0c, 0x7c4a2ef9,
- 0x1d2f21cb, 0x03b79895, 0x6fd00773, 0x7b18e2e1,
- 0xe077c139, 0x80cb9583, 0x7e10e92d, 0x449703d6,
- 0x2adfcfa9, 0xe9444e49, 0xdb5df4aa, 0xa44f9f53,
- 0x48de1027, 0xdc68e587, 0x60b484f6, 0x6af828ad,
- 0xe2c6ef72, 0x77078867, 0xc660a832, 0x284710bd,
- 0x92786a18, 0xfb875ad4, 0x5400fe2a, 0xf0935b3b,
- 0x944cf0e4, 0xeec31e5b, 0xbe21f73b, 0x6a5c9da3,
- 0x68558062, 0xb219e125, 0x4b816339, 0x78dff006,
- 0x41ca6bc1, 0x0213b064, 0xccfba3df, 0xaa368951,
- 0xb2c5545d, 0x734badcb, 0x49167c7a, 0xcb39d780,
- 0xe5bffdfe, 0x62fcc725, 0x34c41ac8, 0x29c02273,
- 0x18731b2a, 0x5cb59ee8, 0x98a7d516, 0x4be46385,
- 0x7ef73714, 0x7b06697d, 0x32ff6e67, 0xd51f2042,
- 0xfc80722f, 0x3928b00e, 0x519dc535, 0xbead4eef,
- 0x68d047df, 0xc8b3d613, 0xcccdbd99, 0xb1fd7198,
- 0x11760138, 0x03fa355a, 0xfd693654, 0xd52fb67b,
- 0x117d29ef, 0xcf2ed83b, 0xc59e18e0, 0x541ed6c1,
- 0x6f9e892f, 0x2a6d5e92, 0xdab5f564, 0xa42f9832,
- 0xd998d3ce, 0x52bebc95, 0x821e782b, 0x9b797830,
- 0xe4e538dc, 0x4e18482a, 0x56d31f75, 0x6e246fc9,
- 0x33980c08, 0x119e2aa9, 0x0539a394, 0xfc12cab8,
- 0xc94c5e5f, 0x0e5413a5, 0xa7059709, 0x6b6c08cc,
- 0xc6a1dc49, 0x3df4f03e, 0xab777160, 0x4a12ce2a,
- 0xab1be938, 0x590b7f4b, 0xeb5325c1, 0x410418de,
- 0x1b3b34f4, 0x56b1d7cf, 0xbed0d3d1, 0xd23f70ec,
- 0xdb77531c, 0xec014217, 0xcbfa9635, 0x34200b99,
- 0x7bce0824, 0xb3a7bf0f, 0xb4797072, 0x287d1aa5,
- 0x1ba51af7, 0x770b984f, 0xc512e19e, 0x36cd12ac,
- 0x8270040e, 0x517ea552, 0x536f11d6, 0x5abae263,
- 0x89dbcf36, 0xcac374c2, 0xecebb3f3, 0x2084c3ab,
- 0xd4205b8b, 0xc2712830, 0xd2726ad3, 0xbbce34d5,
- 0x4c4e54c0, 0x8e7a6b9b, 0x93eb7db5, 0x30474f80,
- 0x41c48e0f, 0xc6ae5782, 0x5dc50dcf, 0x6d5da72c,
- 0x81eb1216, 0xbfc39e46, 0x528a1e62, 0xed374d8f,
- 0x1cbc4964, 0x02639707, 0xf601ded7, 0x3eb74e60,
- 0x2503df24, 0x09b3b716, 0x50f3b88a, 0xa511d1ab,
- 0xfe9138d9, 0x39c045ba, 0xd8b179ed, 0x9bd9de57,
- 0x49744017, 0x71ec0f05, 0xb6f3052f, 0x60991783,
- 0x95eb27ec, 0xa88ddc41, 0xd8ad08d3, 0x39eda54a,
- 0xeccf6d70, 0x3f47a952, 0x45fa957e, 0xb9f9e871,
- 0x94eb0c45, 0xc44dbac3, 0xbcefdd3e, 0xa02df323,
- 0x464eeea4, 0x5b37d7f9, 0xeec4c72f, 0xcbfa165a,
- 0x9a936039, 0xe66ad709, 0x72014620, 0xf5954cfe,
- 0x0618b2df, 0x0897d33c, 0x0da561d4, 0x606f5fb6,
- 0xdf5b4d3f, 0xe51a32ec, 0xfe41db23, 0x43479cad,
- 0xa6721ef6, 0xc1275942, 0x4fe70582, 0x4905566a,
- 0x71b57164, 0x46fc5c01, 0x649fa9f0, 0x69abaae0,
- 0x1e682afd, 0xd88c1bec, 0x67428b4e, 0x4b2f4f5e,
- 0x70b949fb, 0x0565e15c, 0xc3a91062, 0xe8cdd08f,
- 0x3bc7616c, 0xcdd83023, 0x007b117a, 0x298fb227,
- 0x88b5dd83, 0x741bbac4, 0xc6b91fa7, 0x654613b9,
- 0x6d6dc52e, 0xade83da4, 0xda7916d5, 0x8831d936,
- 0x87c6525e, 0xff29ea1e, 0xfb82b16d, 0x1b41b11e,
- 0x74c87921, 0x9fc4ddb4, 0x67008435, 0x8b15f3b6,
- 0x1a24e07a, 0x843e9fcd, 0x24119c24, 0xec576060,
- 0x9e1d3ad1, 0x99e29e8c, 0x1b304d4f, 0xca9eb591,
- 0x81defb41, 0x48c897ff, 0xdc879292, 0xc02a5607,
- 0x0f5fd451, 0x1b4ad7ff, 0x57afe60a, 0x8248b114,
- 0x7168870d, 0xde0a4953, 0xacf1ee95, 0x027330f3,
- 0x2dad966f, 0x26deb796, 0xbc55ac34, 0x4d499fc1,
- 0x6d83bbad, 0xbe606c98, 0xbbdaf046, 0x2c18465f,
- 0x6c4c67a0, 0x4b6aa92a, 0x9feaed42, 0x674bd7e2,
- 0x008bf80f, 0x1ab8c005, 0xf46c4f30, 0x9928438d,
- 0x8c133b47, 0xc86a2ca1, 0xaeadb664, 0xc7fecf71,
- 0xb13c882e, 0xafc3e937, 0xc809dadb, 0x31138a33,
- 0x785a0ea6, 0xbf038dea, 0xa3bd1fbd, 0xcb910d7e,
- 0x5c69974f, 0x19bc46b2, 0xa70a1efc, 0xc1b6e888,
- 0xf3baea63, 0x81dde9bf, 0xfa2c0793, 0x600f7bfb,
- 0xbae1624a, 0x88455ccc, 0xda07fe34, 0x0433d474,
- 0x5d3c1fbe, 0xfccc6222, 0x55cb08e0, 0x70393e11,
- 0x00c07a2e, 0xb2776182, 0x1e48407d, 0xa0c48c8e,
- 0x4b962829, 0x83934059, 0xcf47f5da, 0x75a15ceb,
- 0x36145150, 0xb9fa6ea0, 0x1a0a0371, 0x372f5741,
- 0x3ba286e1, 0x8098930f, 0xb1df967f, 0x9821903b,
- 0x47837056, 0xd90fde0e, 0x10673c63, 0xd75ce044,
- 0xcaf12a48, 0x2f7eba5c, 0x0998614f, 0xeeb9bfe0,
- 0xca429611, 0x9f4bf1d4, 0xbbff1d94, 0xc0c8c425,
- 0x1d924e41, 0xd662097b, 0x121fbb0f, 0xed364b46,
- 0x3c4e75a0, 0xd0c7d6de, 0xb6350e15, 0xd9b36910,
- 0xb31f727d, 0x7f440afa, 0xde78141f, 0x408a689b,
- 0x60cb0f61, 0x7b32ff1c, 0x443e72ab, 0x0e104b19,
- 0xbcca3deb, 0xaa043b3c, 0x2fe2a5e7, 0x6e71d66e,
- 0x250c6229, 0x8cb3c62e, 0x55fcf8ba, 0x0057d7e1,
- 0x5bf9b0fe, 0x3a4a4572, 0x88462068, 0x7d08f489,
- 0x82573e8e, 0xe970164e, 0x9cdc75cf, 0x86c7674b,
- 0xf54878e1, 0xc457c328, 0x366e4f2b, 0xac3dcc01,
- 0x1451846e, 0x8f5a5da1, 0x80ce2857, 0x6a0917bd,
- 0x12d35a2b, 0x4f2767f4, 0xe120462c, 0x99be17ff,
- 0x98d18df3, 0xa8f65dca, 0xff17bc24, 0xbf0e33c7,
- 0x250c27bb, 0x87e9dd6e, 0x34295aae, 0x346b7502,
- 0x7aaae55e, 0x2687ccf1, 0xdbf85c57, 0x5b8dbdd2,
- 0x52d1ed81, 0x614326ff, 0x439186f2, 0x02c6fd2c,
- 0xd99ffa67, 0x2ddd6e9a, 0x8ca86a6a, 0xbc686bbf,
- 0x641b265e, 0x8965d6cc, 0xe7305b90, 0xe205f84b,
- 0xa2e55022, 0xd4417cb3, 0x60cbedb6, 0xb7850271,
- 0xae24e27a, 0xc89499b1, 0xadccb280, 0xa3cd5e54,
- 0x1ec56c11, 0xa75d036c, 0x82d482a0, 0x09be52c1,
- 0xf0a1437c, 0x767d72d4, 0x49dafece, 0x0d0569d6,
- 0x9087bcab, 0x55de9b7e, 0x3f8ffa4d, 0x2589337e,
- 0xc0a6ec1a, 0xf13297ad, 0x7142df74, 0x318db6f6,
- 0xc60db447, 0x75864ea7, 0x731a931d, 0x37e7b9eb,
- 0x1e8e7260, 0x18bd245e, 0xc7d51eeb, 0xfb44e5f6,
- 0x9ae91cff, 0x780a3652, 0x4d49bb5e, 0x05ef4254,
- 0x96de67ea, 0xdc0e465d, 0xd18f5659, 0xfcc37e33,
- 0x25ffa1f2, 0xaae6c32e, 0x1dc94f67, 0x11859efc,
- 0xe11b5187, 0x6609bfec, 0x16474b47, 0x60a072e0,
- 0xd0acbbff, 0xd6fb9a59, 0xa78275b4, 0x35b09bb2,
- 0x0cd059b1, 0x661f1832, 0xc090d909, 0x14cc039c,
- 0x51997e7c, 0xc0f5aea8, 0x19153f78, 0xafc13431,
- 0xa4539bf3, 0x35b6647d, 0x577c0e56, 0x7466c128,
- 0xa8456d1c, 0xb700705e, 0x6c42811a, 0x091188da,
- 0x5821927e, 0x72caf44d, 0xe3bdd149, 0x24ac233c,
- 0xd64ca297, 0x4d321544, 0xd4d30672, 0x4a802fed,
- 0x24ef382a, 0x85e0dc03, 0x46336bfa, 0x98f2b240,
- 0xc441a234, 0x03c32613, 0x98de1c75, 0xdca8449e,
- 0x953761a5, 0xc4418567, 0x84ae35f6, 0xdfdac145,
- 0x405acb3d, 0x5b43adc2, 0xbd55fdfb, 0xccf5e096,
- 0x4932689a, 0x2775ff7b, 0x15fdb541, 0x428d0f1e,
- 0xd73830ec, 0x46b22482, 0x50f51c34, 0x278a5a20,
- 0xd32e8353, 0xa81aa6e0, 0x458d9d33, 0x6f90f679,
- 0x55649d22, 0x18ef9c74, 0xaf26b7a3, 0x8e8cae4f,
- 0xba029121, 0x99ead662, 0x5fb4f67c, 0xe31b73c1,
- 0xd15f0842, 0x4306905d, 0xfc879c78, 0xaa419d14,
- 0xd4889d38, 0xcd9c1d2e, 0x0a6c9f75, 0xcc72458f,
- 0x73e472ee, 0x4ad36515, 0xb559b4db, 0x0f12c440,
- 0xa883ac0c, 0xfd66d02b, 0x14d83fd2, 0x8b6463c5,
- 0x0b25da40, 0xa0b0c954, 0x070a0f3c, 0xbbade711,
- 0x248802e9, 0xe04f27f5, 0xfe00a72e, 0x1d1924aa,
- 0x82cd2f8b, 0x39a33d2f, 0xce4cab92, 0x7833e3a4,
- 0xed28d3fe, 0xc142c484, 0x3c4e3e0a, 0x2f03bdfb,
- 0x731c15cb, 0x3d834acc, 0x40cf17c4, 0x591db783,
- 0x71f3d7bf, 0x7910e9bf, 0xbc0efc7d, 0x95154836,
- 0x6a1a5725, 0x07e9403e, 0x9893569a, 0x5d560194,
- 0x0ed6eff5, 0x5f1dfa95, 0x603b0120, 0x178b35ab,
- 0xa37e8319, 0x3259ac25, 0x55d915eb, 0xf308b4ca,
- 0xfdbdd917, 0x207588f0, 0xdcfcaf21, 0xe08100b8,
- 0xd076fc4d, 0xa1d7b1f6, 0x36f437d2, 0x4c20303c,
- 0x9c25b595, 0xd503804b, 0xcd7473ff, 0x979ae295,
- 0x6b23dbe1, 0x93db002b, 0xfef090d5, 0x9fe9bbff,
- 0x5a23e174, 0x3132e20c, 0x556a4f46, 0x09cdfc66,
- 0xac401d82, 0x083b6f75, 0xa13f9e80, 0xf8ac02e0,
- 0x2f6b4195, 0x89029396, 0xf171b17e, 0x780ea561,
- 0x064d8fe3, 0x3183a4e1, 0xe4c1de43, 0x24757e0a,
- 0xd3b3562b, 0x60b35423, 0xbf3c8332, 0x72c08be9,
- 0x2823b6f6, 0x5968b3db, 0xcc689e6e, 0xc16b9f39,
- 0xc10e7dd5, 0xbf23fe26, 0x14f00e5c, 0x623b1324,
- 0x1e0910c4, 0x2d446981, 0x1759b03e, 0xfc07794c,
- 0xa1dffb05, 0x482062d0, 0x778bc506, 0xdd0061eb,
- 0xc7180c23, 0xd1f9e8fe, 0xae6fd816, 0xd052ae4c,
- 0xe7f7d983, 0x343e002a, 0xe8cd1bcb, 0x4c03afcd,
- 0x4e59bd1d, 0x390b41b3, 0xb9e414c9, 0x512ada78,
- 0xeba620d0, 0x6e9860dc, 0x2d29b23c, 0x98e52a71,
- 0xf7d38090, 0x21b214f0, 0x28bd6437, 0xf36d6c33,
- 0x12cf2a4d, 0x2519ac4a, 0x6eb25348, 0x6ede7a41,
- 0xfa176448, 0x512dd66a, 0x567a9ff5, 0xd11b65b3,
- 0x23f02e73, 0x325ccd7d, 0x34b9d579, 0x5db2150d,
- 0x12962623, 0xb185734c, 0x1f19ecda, 0x189df290,
- 0x699b71df, 0x54b37fd4, 0xc29e26e5, 0xa3677da7,
- 0xd02a23e9, 0xfaf73805, 0xfa8cabd0, 0x173b4c45,
- 0x53fb4e90, 0x1af38ee8, 0x3a9dcc15, 0x892f5fbf,
- 0xfd069c90, 0x22a3e682, 0x8e3450c2, 0x1a381218,
- 0xf4eb91db, 0xa01194c2, 0x0f9b5883, 0xf252dcdd,
- 0x56848fc7, 0x0a639c8e, 0xf54944b3, 0x799efd0c,
- 0x6d5d73f1, 0x911d3e69, 0x189e17a1, 0xfd2540ea,
- 0x601dbfba, 0x012e1011, 0xb336a96d, 0x8f043e71,
- 0xa451540d, 0x4af1ffce, 0x3de462dc, 0x72df9e88,
- 0x992f5631, 0x69110047, 0xc0d82a30, 0x50e5501b,
- 0x9a5a09d0, 0x3fdfbbff, 0x18eabfb3, 0x3f85edf7,
- 0x0122e30a, 0x3d46fc32, 0x9232a571, 0xcdb483d4,
- 0xfbee9430, 0x29fde39a, 0xb011cb09, 0x370ede2e,
- 0x8acf620e, 0x77959d82, 0x0bad2ba2, 0x54d4456f,
- 0xda4baa48, 0x90072258, 0x7456eb77, 0x0fc190a8,
- 0xfdf03fbd, 0x4bff110f, 0xce530a25, 0x6e59af1a,
- 0x0b8728cf, 0x2027276f, 0x7642e9d0, 0x71144999,
- 0xb2ad0f34, 0x1701d10e, 0x9c16f7e8, 0xd6b9a361,
- 0xb50a8b17, 0x9531badb, 0x1285dac5, 0xc5b6699a,
- 0x674482b4, 0xe37330d3, 0x22b64833, 0xeb8449f2,
- 0xea7f5b21, 0xc513fd28, 0x0425a578, 0xdf571d18,
- 0x2ee7e152, 0x1117300b, 0x1727c46c, 0x2d623554,
- 0xb0bb96ef, 0x546cbf44, 0x44b4cd17, 0x9580dceb,
- 0x1cefdbbe, 0x0ee3a9fe, 0x680d5a09, 0x8748de04,
- 0xba2d019d, 0x03d198be, 0x437bef46, 0x08a8158b,
- 0x666d01da, 0xd2b47790, 0xa929fb15, 0x649f4909,
- 0x021d59c1, 0x1a0cb4f1, 0xc32b00b9, 0x2193aa55,
- 0x655b49af, 0x7deb3084, 0xbbf22ec7, 0xdbd81b2c,
- 0x017a1835, 0x546f1d18, 0x53ef80c2, 0x4d3a0450,
- 0x31883045, 0x72f982f8, 0xb834f079, 0xbef44740,
- 0x5c822669, 0x14a57059, 0x2e5a4941, 0xe7b58287,
- 0xff9b7add, 0x0f1d8344, 0x7c26f7dc, 0x37b79b89,
- 0x77306fce, 0xe8d2978f, 0xd3ff01bc, 0x803eb0f9,
- 0x41df8a8d, 0x572b43c8, 0x077ce9b0, 0x4f6d8f73,
- 0x9db2f5e4, 0x0d36c068, 0x07f9bf4b, 0x0533da1c,
- 0x33313080, 0xe0b31dd4, 0x92467d67, 0x6c112966,
- 0x2d5c618b, 0x8745c04b, 0x9ce2ed1c, 0x92358b6c,
- 0xedd1d249, 0x2a16d0e2, 0x47640e5f, 0x7c21f7a9,
- 0x70d314cd, 0xd7c9be04, 0x19705097, 0xfbe8cb95,
- 0x4c730fee, 0xe5f5ec1c, 0x1b175e4d, 0xc0fbcf7d,
- 0x7e49b64a, 0x6c052a74, 0xf55d6188, 0x755fe007,
- 0x63dc2741, 0xfef82e88, 0xf9059d00, 0xfdf02f43,
- 0x4c530b39, 0xea345985, 0xfd97cc2b, 0x8ebae058,
- 0xf18d660b, 0x93d3f934, 0x353eb2e5, 0xc6e2b281,
- 0x51053e1c, 0x81e95136, 0xd6860530, 0x2b65f1ab,
- 0x92875153, 0x48a67186, 0xfc431047, 0xfb3b6394,
- 0x1ee13b4b, 0xd05cb927, 0x9fbaf824, 0x7b83ed92,
- 0x32fe6318, 0x23c28e43, 0x6dcb7621, 0x9df62220,
- 0x95f79b3e, 0xa785bf2e, 0xacbad3a4, 0xb79250e1,
- 0x293a177a, 0x5e952e4a, 0xed8b03a9, 0x3f414020,
- 0x41637692, 0x3e03de46, 0x201be444, 0x22d0bb98,
- 0x2898992a, 0x39e0ee43, 0x12353eb6, 0x53b92dbb,
- 0xf009f2ea, 0x3a609aef, 0xf40e6d67, 0xac2ff183,
- 0x6db24c8c, 0x816e2769, 0x7a9fc0b9, 0x9b9bde51,
- 0x03aa8efa, 0xbcd9a470, 0x41d64576, 0x10574d69,
- 0x1dcb0486, 0xc779307f, 0xc06c72be, 0x0072a2cf,
- 0x52520bf8, 0x59c7415c, 0x951956c4, 0x219fb6e7,
- 0x7f01864e, 0x77f188d5, 0xd9e0c040, 0x9440e98e,
- 0x2e4c0cd6, 0xa1be2cfa, 0xfbda86ab, 0x1247cd36,
- 0x6dbcaf7f, 0x9590a798, 0x2ad3c9ce, 0x9f29c807,
- 0x03513724, 0x5e6ee402, 0xdffe7c7f, 0x650168ec,
- 0xa9202eb6, 0xe32f3820, 0xbcfe9143, 0xfe35e6f0,
- 0x91f54ec5, 0x8aa67218, 0x22deab2c, 0xd47efd50,
- 0xc15df555, 0xa223f7ff, 0xaa6d7f8d, 0x296a2855,
- 0xf9668963, 0xdbf45ad8, 0xa982ccba, 0x11c16aee,
- 0xf7ec363c, 0x31c1d1b1, 0x8e27f2ae, 0xd5c3c48b,
- 0x4bd61cd4, 0xb751741a, 0x7ea97dfb, 0x4254b8db,
- 0x8ab783b2, 0xd11a46fc, 0xaf2419b4, 0x1f62e2ea,
- 0xfc69cc0a, 0x5c4d15a1, 0xa0424256, 0xc760dfa5,
- 0xbe3df54f, 0x7ac9d2e1, 0x65b0b968, 0x42fb846c,
- 0xd1359f4f, 0x4d022cce, 0x2beb80e4, 0x3282f10a,
- 0xb1a7225b, 0xa90c9c37, 0x757762e4, 0x31408bbb,
- 0xd9a40cb7, 0x61580b4c, 0xc6ff2ffc, 0xd3526e62,
- 0x7125f1d3, 0xf3189dda, 0x67d11f87, 0x648f45f5,
- 0xc5810520, 0x347920ff, 0x039e14fb, 0x97a42122,
- 0x4df6b4b3, 0xee851af3, 0x43acfad0, 0x9c9cd84b,
- 0x40b45baf, 0x362cf829, 0xd6cac8b4, 0x934a1376,
- 0x87cd42cd, 0x8e808070, 0x4fecdbd2, 0x071409bd,
- 0x7a5d6355, 0x2c67de3e, 0xd56606a1, 0x95d2e76c,
- 0x69e172f3, 0x856f9d05, 0x99e3a80e, 0x969ff6ab,
- 0x32dc03bc, 0x902d5997, 0xe9e088d6, 0xf6e8ea21,
- 0x3e71f23c, 0x987f783f, 0x2ed0e84f, 0x06735107,
- 0x1284430c, 0x3e75ab9e, 0x31ea53e0, 0xfbf26ca9,
- 0x0accdde8, 0x39b63851, 0xc5889929, 0x47cd276e,
- 0xb0b6cdcc, 0x9267af2e, 0x0b90c15b, 0x32516cd8,
- 0xf43f785a, 0x2854f889, 0xbca0e433, 0xd1708789,
- 0x2a3f9a80, 0x18f6b988, 0xba0f2ea6, 0x328e3a13,
- 0xead807e5, 0x6268894e, 0x6da5c47f, 0xe4ed9155,
- 0xe3b3aaa4, 0x8b7ed969, 0x0982d3cf, 0xae370314,
- 0x0c583276, 0x88bc65f2, 0x07e3cd24, 0x7991f209,
- 0x4e132010, 0xa5f1b475, 0x1f9a2e1d, 0x626b90ca,
- 0x36de636f, 0x892b837a, 0xb93f1016, 0x5c1be235,
- 0x48a90273, 0x5e83d92a, 0x5a5d0253, 0xc1b05ca7,
- 0x0365632a, 0x96c0d50e, 0x3e73af65, 0x77a6a728,
- 0xb788e908, 0xf3816701, 0xcb82095a, 0x67bdefa6,
- 0x012bf484, 0x7050ad6e, 0x9c917bc8, 0xbcbb9381,
- 0x48279c9d, 0xc60c898c, 0xbd6d0b52, 0x53a793e0,
- 0x07fb79bf, 0x9e3e81b1, 0x29c8ad2e, 0x06443670,
- 0x69b3e56d, 0x646ffada, 0xf4ba092d, 0xf2ababc3,
- 0x18d765f4, 0x26e7ea3c, 0x90cc6dda, 0xbc3caeef,
- 0x71fde7ed, 0x3d0bfb36, 0xa7eed78b, 0x0792f6c8,
- 0x4e24c346, 0xf1c0d50c, 0x22092fe1, 0xb67638c9,
- 0xa4c39abb, 0x1f6d4d49, 0x2db33879, 0x8719b757,
- 0x0cf9af3b, 0x05f6f20d, 0x397cd808, 0x9b2efff4,
- 0x090a5ab8, 0xe0e9f1bd, 0x8ad8d72d, 0xf615f757,
- 0x0ea6b24b, 0x22a7e4f5, 0x9a6ae841, 0x47f0eaed,
- 0xd733ba4a, 0x40acbfd6, 0x61e0c808, 0x69c3bbd9,
- 0xc82bd02f, 0x90b4249f, 0xc6acdb4e, 0x27108f86,
- 0xabb44e6b, 0x0afabefe, 0x69844572, 0x5da3199f,
- 0xdb29d3e9, 0x7fa1806b, 0xc5aa260d, 0x32747067,
- 0x93c1ce40, 0x429c6164, 0x0f5305cf, 0xd877ec14,
- 0x48607397, 0x5ca10fa7, 0x0ce1c5c6, 0x9439ca38,
- 0x8a94181f, 0xf4c9dcfc, 0x4a5b75ab, 0xdbd33a59,
- 0xb3e514ae, 0x5190445a, 0xa737a66e, 0x50caa538,
- 0x16b685c7, 0x77d24ba0, 0xdffe2cd5, 0x7e5faaf1,
- 0x74536a84, 0x7504d7ae, 0x5c841e22, 0xc0e8b92a,
- 0x6c693ae5, 0x8849c83f, 0xc7e663c8, 0xfa53d78a,
- 0x2c83ee85, 0x8beb903b, 0x5d25a8e3, 0x24ddc8cf,
- 0xd23d228f, 0x67284ff3, 0x7b008d51, 0x028ef6cf,
- 0xd5de32da, 0x4f767144, 0xda883262, 0x3fd69b08,
- 0x789fbb8c, 0xfeecf919, 0x86e69e4a, 0xb23af044,
- 0x92054c6e, 0x8744a5df, 0xf8ebb53a, 0xe28abc6e,
- 0x3c62ef29, 0x87651253, 0x4238e2fc, 0x85089dd3,
- 0xda531023, 0x2d2cb952, 0x61583808, 0xdb8cab2a,
- 0x9528e21f, 0xf01558ff, 0xbfb0ef31, 0xf66ace91,
- 0x0de8edc2, 0x726f75c2, 0xe9a6d88c, 0x08566d9e,
- 0x78747d76, 0x3b59f5af, 0x712e0495, 0xe69a31ad,
- 0xb8b2219e, 0xe8fb400c, 0x0a563156, 0x2e4719be,
- 0x145d6ec6, 0x2db7e400, 0x5b98599b, 0xcbd7b30d,
- 0xf317dac3, 0xc8a4dda3, 0x4578b8d4, 0x2f3d011a,
- 0x86f30242, 0x0c40b79b, 0x8bf4d12f, 0x07f1dfe3,
- 0x2573e8a0, 0x9ed44780, 0xe73ab2ad, 0x5bc1ff82,
- 0xa93d8c10, 0x2c53f221, 0x6bdcc01c, 0x64660fc5,
- 0x80539eea, 0x302bb3bf, 0xdfa7b28a, 0x122a5316,
- 0x6715b038, 0x23b7a887, 0x8d479bfb, 0x54ca95f3,
- 0x85d8283b, 0x38704f26, 0xcb6d30e2, 0x766075f5,
- 0x7b134605, 0xbed5389f, 0x20116bb8, 0xbbaa72ea,
- 0xf4cdd9ab, 0xa5c5d829, 0x02c79931, 0xc513cf6d,
- 0x078af118, 0x003986ef, 0xfb046b02, 0x8056e960,
- 0x35fcf612, 0xbc4f1480, 0xb25a81a8, 0x13adc516,
- 0xe3d57e06, 0x6e17904f, 0x8579e150, 0x5be5335e,
- 0x91e51add, 0x6472d95f, 0x1855f3a5, 0xfe87f775,
- 0x3e697fe7, 0x16a74175, 0xf33f4931, 0x72ede223,
- 0xa0ce98c7, 0x87c0fe9a, 0x3828c479, 0x2bc55330,
- 0xcb2e8cb7, 0x11775a0c, 0x0f99242d, 0x620258d5,
- 0x6e5704c7, 0x1f821f51, 0x2d52d551, 0x6dbe4c20,
- 0x63547624, 0x3662c46e, 0x5c84fe0d, 0x37e1ecdb,
- 0xd4f543b3, 0xa5e0b6a0, 0xd8acca14, 0x0ed788df,
- 0x145d9193, 0x00589986, 0x6bfa6c85, 0x721816ff,
- 0xd148e0d9, 0x3180b903, 0x9d1b99f2, 0x348946db,
- 0xf0a605c5, 0xf85044af, 0x5f07a66e, 0x05aadf49,
- 0x3e09d30d, 0xe9d8f881, 0x6b5ebb38, 0xcd8db1ae,
- 0xda24e06f, 0xf5fe635c, 0x4f0f56d8, 0x5893db64,
- 0x58d2f27d, 0xa562ca4d, 0xf158c9c8, 0x90262f46,
- 0x483d253a, 0xc83d8136, 0xb015f31a, 0xaf03425d,
- 0xde6010cc, 0x11fddefe, 0x1c64cf78, 0xfa5294bb,
- 0x0be3c5da, 0xd7514771, 0x69e2b4cf, 0x680b14e5,
- 0x19284641, 0xf0a17660, 0xbf782cee, 0xc718a7e5,
- 0xa7c245df, 0x48f444f3, 0xdf20562c, 0x19e68b1e,
- 0x2c8781b4, 0xc55c4e09, 0x75325b6c, 0xc7778332,
- 0x329c46a9, 0x19a377fd, 0xa129af6f, 0x583baa01,
- 0x2175a652, 0x84ae7a30, 0x460978e5, 0x2f65c7bd,
- 0x767e1f24, 0xd64e558d, 0x65ca2b8f, 0xc1497e1e,
- 0xfc796a68, 0xb9857c92, 0xb258a87e, 0x26521920,
- 0xeceddbd3, 0x9b601aa4, 0x64d93518, 0xe9b4fb00,
- 0xbbe81710, 0x250ec14a, 0x5372b49b, 0x31569029,
- 0x7ca2ace1, 0x22ada7bf, 0x020e482d, 0xdc372db5,
- 0x14a98db2, 0x38444921, 0x42fb59d5, 0xb5488716,
- 0x3b1281fd, 0x8e2dc654, 0xef55acc6, 0x3125db61,
- 0xbf600343, 0x50e76b36, 0x8f381c2b, 0x0e6f2172,
- 0xcc0e0219, 0x1b61210a, 0xa6a918b3, 0x3b1dff2e,
- 0xd1f23995, 0x9d00a692, 0x179a4d1f, 0x0e816ae1,
- 0x51dc48e2, 0xceeb5aba, 0x948511c0, 0x6b5ff1d9,
- 0x6a4abdc2, 0x34e9c74d, 0x65e3cf6f, 0xb86f1228,
- 0x7405f671, 0xea9af0ac, 0x8b955b4e, 0x7e52d8e7,
- 0x5948e9d2, 0x588693a0, 0x56bce808, 0x79d97095,
- 0x8c20f6b4, 0xb248f0bf, 0x49ada670, 0x02aaa2e4,
- 0xd0c27ecc, 0x1eb646c4, 0x8cb75096, 0xc16ab826,
- 0x6fe1e039, 0xce22b587, 0x41a83917, 0x278e33b0,
- 0x0df9670b, 0x4bdbb7ec, 0xe7abd1a3, 0xa535ea14,
- 0x8b6d53c3, 0xb6da14d4, 0xea91c661, 0xa1693463,
- 0x48e7b511, 0x28333684, 0x7255dd77, 0x036fc870,
- 0x6fa6e4c9, 0x509fee27, 0xc8ba0209, 0x01382fcc,
- 0x0c366f52, 0x072ef751, 0x835726bc, 0xeefc8f06,
- 0x4e543204, 0x822551c5, 0x647a534e, 0x0259cc37,
- 0x9e6a90f7, 0xdf09430a, 0x3a93206f, 0xf08860c6,
- 0x7f1a2440, 0x5835201d, 0x8dd0819a, 0x6688f7cb,
- 0x1f65d5ed, 0x81af9f50, 0x37341627, 0x80444f4e,
- 0x4b1b0ce3, 0x570901b9, 0x1164f900, 0x55bd4bd8,
- 0x05be2d51, 0x9c7229dd, 0x245abf2b, 0x1e8f50ca,
- 0x0cc58442, 0x55bdb522, 0xf39a5444, 0x1856d135,
- 0xb99b4cd6, 0x2409ffd0, 0x588ddf1c, 0x0bdf5202,
- 0x8e7b7dac, 0x9e0d2e24, 0x7c519b18, 0xb60f5839,
- 0x5bf4604c, 0x4144566a, 0x0f1ff011, 0xeea8165b,
- 0xa9f62d45, 0x9813a593, 0xe9a60409, 0x1d355581,
- 0x99354f2a, 0x0167c44f, 0x0fb8231a, 0x2140f3da,
- 0x2339db93, 0x91fa4511, 0x9e9e8ddf, 0xb4b43f1f,
- 0x4e915b6a, 0xce05c220, 0x77ba118f, 0xa9c0bd44,
- 0x3ff6ef33, 0x7c6cbd93, 0xd1d3071a, 0xe62e0eb5,
- 0x4b1baab8, 0xd5905210, 0x959b3b78, 0x8e808e87,
- 0x197650f3, 0x36f5b821, 0x8c1b7992, 0x1e2ee053,
- 0x074f57db, 0xb0004ec4, 0x6ae1d4ff, 0xdf10430c,
- 0xdab93503, 0x60c25839, 0x9636d4ac, 0xa92bfd3c,
- 0x65ee27b3, 0x8d30f047, 0x445d627c, 0x48e0e0d8,
- 0xde3c6596, 0xff4be906, 0xd689497b, 0x2bd0ef38,
- 0xa47e2d02, 0x0ad34c28, 0x21cbb74a, 0xc06ffebc,
- 0x7b8b844d, 0x4249381a, 0x0e019cd2, 0x70f47378,
- 0x37d1d969, 0x119ea3bf, 0xd48c6f2f, 0xb07cbb95,
- 0x5fdf6e50, 0x3c811846, 0x51584b9d, 0xe21ac784,
- 0xb9bee497, 0xfd4e44cf, 0xfdd14526, 0xdaffba37,
- 0x664089b9, 0x810054dd, 0x4196d34b, 0x7673e608,
- 0x8de2a38f, 0xb2513f03, 0xed2d064c, 0x927853ce,
- 0x05646afc, 0x75935f03, 0x772a59c1, 0x237e85a0,
- 0x2770cc2e, 0x335b1e63, 0x24610dc4, 0x8658a909,
- 0xf53bc839, 0x89b36a82, 0xfe6227bd, 0x7765fa68,
- 0x61c6c1f2, 0xdf5c28f2, 0x7bf6ac4f, 0x5f422e01,
- 0xee6d2660, 0x05c15302, 0xf99b82b6, 0x7d591269,
- 0x52fb0b79, 0x299bd507, 0xf696db80, 0xc83360e2,
- 0xfdca2ab8, 0x891b244b, 0xd4836793, 0x4044ab47,
- 0x77c6c06b, 0x64447b6d, 0xce8a026f, 0xa6a5ebcf,
- 0x8675f469, 0x3e91c935, 0x36318f4e, 0xb3596bdd,
- 0x28c0a114, 0x9d0b1da5, 0xf37837df, 0x792dcf74,
- 0x590e9fd1, 0x301493c0, 0x87ba74ca, 0x384bc17f,
- 0x5c259022, 0x9816c8ba, 0xd0e2b1aa, 0x88c885c6,
- 0xa3119272, 0x91822f5d, 0xcc775eb1, 0x73627504,
- 0xa0d61b38, 0x0eaeb4eb, 0x7523a3cb, 0x5a358200,
- 0xba247986, 0x31dc19f9, 0x87371fc1, 0x6c255530,
- 0x854cbab0, 0x6d061778, 0x63853aac, 0x61d2798d,
- 0x1b14ed4f, 0xe680f141, 0xccbde100, 0xaf97feff,
- 0xae1620b4, 0x7520b7ca, 0xd4864612, 0xb6e97e97,
- 0x390f7c3c, 0x8393de45, 0x7dfbb090, 0xa62b4e79,
- 0x89d4ff79, 0x7f6cb41c, 0x8c3d045b, 0xad13e0be,
- 0xc941ce86, 0xba2b48dd, 0x683239a9, 0x21bcad12,
- 0x5d92afa1, 0x1927068e, 0x83bfcc55, 0x813e9730,
- 0xe3d9ddb9, 0xf08b1f2b, 0xa9402271, 0xf61768ec,
- 0xe158e1d9, 0xedb72e85, 0xd8692051, 0xb9a6f89b,
- 0xdff617c2, 0x5701c322, 0x9f839e1c, 0x8acb8e16,
- 0x9d4b8870, 0xfb9a5b25, 0x62b45032, 0x79ccac62,
- 0xf6ae3428, 0x93df34c8, 0xf04fc1e8, 0xed3ee96c,
- 0xc910d298, 0x86456ca3, 0x1bd77c25, 0xfa1ee14c,
- 0xe0b41ee2, 0xc98a0039, 0xedf4740a, 0xaa3b09c2,
- 0x418bb017, 0x08b19648, 0x3764b08b, 0x5b6253c4,
- 0xfd7dee90, 0xd5f3c0ae, 0x1fb452d8, 0x76937c5f,
- 0x86a7602e, 0x5f6297ba, 0x418646c5, 0x4a44baae,
- 0xf291d068, 0x484e1284, 0xd499cfc9, 0x1a6c821c,
- 0xef31f9ce, 0x67afce23, 0x2d5ec400, 0x57bf4203,
- 0x54fe7df2, 0x549bf043, 0xe54a6b9f, 0xd7b9c718,
- 0x2ff04b4f, 0xd57a44d8, 0xe46a33aa, 0x01a15a80,
- 0x87f99bcb, 0x61731b51, 0x9a40183c, 0x94dddddf,
- 0xa64bf9c1, 0xbdd83c20, 0x3124ba09, 0x3cfece51,
- 0xe3096575, 0xf51ca11b, 0xd8b01462, 0x684ecfaa,
- 0xc88fcd28, 0x3c2c9222, 0xaf656df4, 0xb9b2ccd8,
- 0x4f11d16f, 0xe640e0fa, 0x08a4bcb3, 0x9159768a,
- 0x1cbc6291, 0x61741dc8, 0x67bfc84a, 0x13d2f920,
- 0x2f9e3a67, 0x3a052fad, 0x8586c74b, 0x4830fc8d,
- 0xe0325e0d, 0x56d34524, 0x85710ff3, 0x5c2e368c,
- 0xef165e27, 0x099bc507, 0x29e2a5d3, 0x1e03e4be,
- 0x552aa444, 0xc56cd34c, 0xee54ad1d, 0x15212944,
- 0x73b839d5, 0x5eb06362, 0x1fe82278, 0x4edd9784,
- 0x12047386, 0xa46defd8, 0x98975ed0, 0x5b7843f1,
- 0x76770324, 0x8ac36c50, 0x9c103dea, 0x7bc77f4c,
- 0xe57cb4c0, 0xbcdd4b78, 0x86e0c93a, 0xe416f211,
- 0xd529c7d2, 0x7688e7be, 0xa3445436, 0x8444e75c,
- 0x3de7f15b, 0x419bdccd, 0x7e93e2ea, 0x98dc95ac,
- 0xb7e9abd8, 0x30c5d5b8, 0xdc603ff7, 0x4e62563c,
- 0xc9a31230, 0x7dadd663, 0x566f85f4, 0x2de500d6,
- 0x506bc0b7, 0x13e1d310, 0x19cc041d, 0x848ef8b5,
- 0x14ae1696, 0xdfb2cf6e, 0x86a68d7c, 0x3b25c484,
- 0xfcf2367c, 0x0f99d40a, 0xac1eb1dd, 0x5c58e31c,
- 0xf9552270, 0x4bead251, 0xa51ba300, 0x47d9df78,
- 0xebc1fd0d, 0x2b4ef26f, 0x510046f2, 0xcaefd6ed,
- 0xbc49c9a2, 0x72995df5, 0x68f86878, 0x13d324f3,
- 0x9c30e08f, 0x4c553357, 0x403fcc91, 0x53a7a7fa,
- 0x751afe50, 0x9629e32e, 0x807e9cbc, 0x61f205b0,
- 0x67f32794, 0x7feb361c, 0x2dc24e39, 0xea0ce153,
- 0x4d0edd08, 0x281d41ec, 0x5f780de1, 0x66f5a54f,
- 0x438d66f9, 0x312233a8, 0x3f1e9847, 0xd67f75c9,
- 0x49d1b403, 0x8ab4bf04, 0x20707827, 0xd75bf764,
- 0x3db0d945, 0xddb48bea, 0x33b5b22b, 0x9dc9d872,
- 0x125aaa11, 0x23016e90, 0xb3db1977, 0x067cb9c0,
- 0x608cf93a, 0xf4347d6e, 0x937f2d9e, 0xdcb1a008,
- 0x913cd8ed, 0x54a55ab3, 0xf6ee9fb3, 0xb2be1711,
- 0x82e33f91, 0x228dc8e3, 0x2c8dda07, 0x6a14cb0b,
- 0x37cba2ff, 0x387e12e9, 0x34c600d7, 0x5b517118,
- 0x14a0801c, 0x64e9882b, 0xa33bd7ae, 0x34f67231,
- 0x9018d47b, 0x6afef0e1, 0xe55ab101, 0x13ab579b,
- 0x5cae1482, 0xdfa2be20, 0x6c0116c4, 0xb60110b1,
- 0x31ea72d0, 0xc501e008, 0x4893864e, 0x21ae1415,
- 0x476087fc, 0xe4d3a6b1, 0xf3c651ab, 0xd0f8407b,
- 0x75147d86, 0xbc473f0d, 0xf6fb5abd, 0x06cfda8c,
- 0xd113fa66, 0xb1726f00, 0x5e7d6a7a, 0x4e240a77,
- 0xd542b170, 0xc1791134, 0x36611e91, 0x9f3265e1,
- 0x429ff7ff, 0xfc8d6c18, 0x7ea29b45, 0x6ed89d8c,
- 0x99023f7a, 0x8fde3a83, 0x95c6c6e5, 0x027b7d9a,
- 0x9b3eaeff, 0x73ddeeea, 0xe9739512, 0x8e35626a,
- 0x048c535f, 0x8dfb5e76, 0x102580d3, 0x40d1c76d,
- 0x4ede7540, 0x2f045db3, 0x6f1f2ff6, 0x5e5c6936,
- 0x633d070c, 0xbc91762b, 0x2e5be68d, 0x1623b35a,
- 0x687dc993, 0xa3f63efe, 0xa6564723, 0x84fe7eac,
- 0x52f01836, 0xcac1838a, 0xad28e22d, 0x80b6ebc5,
- 0x44611fe6, 0xbd77a2b3, 0xbe887160, 0x0bc91072,
- 0x36f3771c, 0x119c644e, 0xa86ae2e4, 0x9cb9705a,
- 0x66c78689, 0xbfc8f95f, 0xcb978dd6, 0xd2d13205,
- 0xfdbc2313, 0xec6698f9, 0xcc8edd14, 0x908ad80c,
- 0x48a3b200, 0x9febfd7f, 0xfbde5b86, 0xf3378495,
- 0xe2b872f2, 0x7487a751, 0x62e485ab, 0x614a4be5,
- 0x031c4d79, 0xe4b7736d, 0x82a23999, 0x1be8151d,
- 0x422e7431, 0x116029e0, 0x876bd40c, 0xb77200cd,
- 0x78f73058, 0x2c9d85ca, 0xcc9d781b, 0xa24a2518,
- 0x6afd5cd2, 0x6a403d39, 0xa0380dfb, 0xd096d5c5,
- 0x14134136, 0x1b645458, 0xa3edb6bc, 0x2c4df9f7,
- 0x462d7abe, 0xdc30cc65, 0xb0c7c363, 0x633cc318,
- 0x7330fb01, 0xa9459131, 0xf7ed26ac, 0x70afc670,
- 0x4ecda1ad, 0xcf25e69b, 0x780eca0d, 0x3ae26f4c,
- 0x2b2fcd70, 0xa76e02b3, 0x0d366a36, 0x380a2800,
- 0x1970c343, 0xc9754277, 0x6d0d1295, 0xd065ce3a,
- 0x38a13c55, 0x4c23345b, 0xa8390d65, 0x50ef33f7,
- 0x64aee72a, 0x6e594a73, 0x4d900d3d, 0xe61abab8,
- 0x91738cc9, 0x50188457, 0x0d6071de, 0xbe4bd672,
- 0xaa3ebda3, 0x3090cb7d, 0x8f74422a, 0x7aa680e7,
- 0x92a9fee2, 0x13471252, 0xe16eeb97, 0xd516918e,
- 0x03d2cad4, 0x34ef9338, 0x3c6b99a0, 0x51039a63,
- 0x7b935775, 0xb38f12c0, 0xbe641a55, 0xaf253e07,
- 0xe3d2d033, 0xf958b031, 0x6357238d, 0xadbe6eb7,
- 0xdc380f54, 0xf000ca83, 0xeeb0778d, 0x66aa9263,
- 0x20641cf1, 0x61ba52d2, 0xb4935ed2, 0x3ccc973f,
- 0x2191f19c, 0x7eb97d03, 0x3ff1649d, 0xb511296e,
- 0xdf01ae1f, 0x66b07ca0, 0x7f1d65a8, 0x49de6561,
- 0x7176c65e, 0x99fbae8c, 0x194d8822, 0xf2709b59,
- 0xc9eb3952, 0x81fd0775, 0x75cd8c06, 0x8a053e1e,
- 0x067531cb, 0xd586dade, 0xe1c50505, 0xe5c814a7,
- 0x5225bff1, 0x7ad3e55c, 0xc839956e, 0x5ff8cad2,
- 0x8b2c17fb, 0xa8aeca4e, 0xbb420e26, 0x8778629c,
- 0x609ba6b7, 0x9095646a, 0x2a5b6b94, 0x83269b82,
- 0x0125c515, 0xc7921089, 0x118c8972, 0xce192d6b,
- 0x745964d7, 0x22aea96c, 0x5dd81fda, 0x22b9c926,
- 0x3372cd87, 0xf18f3504, 0x27a1d46c, 0x68c36ebc,
- 0xe31489a6, 0xde1d9da0, 0x3864c0e2, 0x1f828a1a,
- 0x067cedda, 0x42e4b0c8, 0xad811266, 0x7dc5019e,
- 0x8323bcd6, 0x3a2dca21, 0x12cc2427, 0x18c0eed0,
- 0x50344423, 0x2723890f, 0x58316b91, 0xc3ecd0b6,
- 0x3f23794c, 0x31e326fa, 0x9c894c83, 0x2b051e59,
- 0xdffa05be, 0x934f1ca6, 0x992a3056, 0x64744f25,
- 0xf917da6d, 0x3ff73ad5, 0x1b192c25, 0x1fa4861b,
- 0x99f7319b, 0xd7f14c0d, 0x3a59d0be, 0xd00faef3,
- 0x920234d8, 0xc358666d, 0x1209b81c, 0x922b826e,
- 0xe420227a, 0xe935fa1b, 0xc720c105, 0x4d2b24ae,
- 0x1ba29c2c, 0xd9dea5f1, 0xaac12ee9, 0x5b9995ad,
- 0xfee12188, 0x330a2e8a, 0xcae4c659, 0x3db1daa8,
- 0x93e01f23, 0x1806d738, 0xf85b17c2, 0xd5000fc8,
- 0x7f999185, 0x90f84116, 0x12bc69d2, 0xa427b36d,
- 0x52706ad7, 0x6554e7eb, 0x656f04cd, 0xb732fa55,
- 0x1e001fb6, 0x9515c121, 0x991746a0, 0xbfd8698d,
- 0x0a4b6311, 0x3eea4504, 0x7da833c5, 0xb85ff51e,
- 0xcb0d7c8f, 0xf9f2ed9d, 0xdf5b6980, 0x809e4200,
- 0x34ebc9b8, 0xc9884fc5, 0x5546af40, 0x7aa82e84,
- 0xf30e074f, 0x4686763e, 0x26e09a50, 0x9e81c298,
- 0x157e3306, 0xa3aa13c4, 0xb14fbe0b, 0x06e3340c,
- 0xe4addcdb, 0x647a2278, 0x74f3536d, 0x09891339,
- 0xd4cdd43a, 0x04dc1e26, 0xf349802c, 0x4cd759a3,
- 0xccfac681, 0x38671571, 0xe4b736d6, 0x6b9cde99,
- 0x98d6315f, 0x97b521ac, 0x00e6a544, 0xb9b7e5b8,
- 0x2f622b1f, 0x46c0833e, 0x977631e1, 0x918fe584,
- 0x358ada54, 0x22b9145c, 0x599b1c00, 0xce04a2e6,
- 0xdc25c77f, 0xfe36b8ee, 0x4ee6e51f, 0x26d79fa4,
- 0xf2eba569, 0x9d44ec06, 0xe391d6a3, 0x60267abc,
- 0x037582c8, 0xfb71db7a, 0xc7ebdaf7, 0x3f77de9f,
- 0xa2791ef6, 0x7692cf99, 0x1d42d301, 0xe57ecfde,
- 0x6b14a1b5, 0xf4e7f842, 0x9b1cd83f, 0x1e1425d1,
- 0x791e2f88, 0x60be64e6, 0xbc0f34a1, 0x435bb965,
- 0x981c911c, 0x5d0a1803, 0xfe495d2a, 0xcd5d61ca,
- 0xf970cf41, 0xedae50c5, 0xf7172a4b, 0xab0563a1,
- 0x457f9b9a, 0xa8e9bf24, 0x6ba86586, 0x8b86b043,
- 0x0e30d985, 0x42aff4b8, 0xcf4defbf, 0xf32824c7,
- 0x7589e433, 0x45a06efb, 0xfa83bca8, 0xc0817868,
- 0x20a34ab0, 0xb9637ff7, 0x8aa9ba88, 0xac799c8d,
- 0x9862097a, 0xdec64a5d, 0xeeacdc0f, 0xc13a24ee,
- 0x8885e0e9, 0x3cacb882, 0x09957561, 0xfbf43039,
- 0xf949e1fe, 0xa79ab300, 0x0118dbbb, 0x6f53833c,
- 0xa88db1e4, 0x94108270, 0xaa3bd807, 0x8170c5f6,
- 0xc2f3019d, 0xc1d5c85c, 0xcf565ab9, 0xfabba490,
- 0x8ff287df, 0x5683d997, 0xe8455d79, 0xa86d9b71,
- 0x1178099d, 0x184f70fd, 0xd0885393, 0x7b429e4a,
- 0x00212574, 0x3b1ec7c6, 0xa8713e0e, 0x6d719ec5,
- 0xcc9a1210, 0x8a5bb3e4, 0xd96fabc1, 0x8cc4b975,
- 0x71dc05d7, 0x0026b122, 0x4a985f80, 0xc0319094,
- 0xf28d7710, 0x47c8b4b8, 0x01f02a5f, 0x1f5aeae0,
- 0xc9591f3d, 0xfce70216, 0x51aee39d, 0xb4f12359,
- 0x327f1d53, 0x6d6b7b27, 0x2d5763bd, 0x65058235,
- 0x8763e4c4, 0xb58110de, 0xfea2d06d, 0x55b0e6bf,
- 0x94490e27, 0xeb056cde, 0x739dac88, 0x1e9bd42c,
- 0xd1312fc0, 0xc78807b5, 0x6d1cc64c, 0xb1ec7b47,
- 0x69ed55b5, 0x5e377672, 0x052763b1, 0x441c5ad2,
- 0xa19b308f, 0xdf50835e, 0x826a07f0, 0xe237ba75,
- 0x373328d0, 0xab1567be, 0xfcf090e8, 0x01b08f61,
- 0x6c6cff71, 0x55ff8530, 0x4fca2fac, 0xd8026b81,
- 0xbe5dc2fa, 0x7a045eb4, 0xa33affdf, 0x515359ae,
- 0xb2a5970d, 0x79cac5b8, 0xab7d508a, 0x6a9cfdba,
- 0xab891994, 0x03031abd, 0x5a386953, 0xb0d1400a,
- 0x7a067e6a, 0xa215992c, 0xa37f3634, 0xa864c69f,
- 0xd7d5f6f3, 0x7105b091, 0xdda56d97, 0x46693f32,
- 0x76f6ac3a, 0x277613a9, 0x684ffe3a, 0xc8ffc0cc,
- 0x44cb45ab, 0x0b6d1684, 0x1c929e9e, 0xfa375422,
- 0xb0fd3ba6, 0x01ac3322, 0x2ff3da35, 0x5b1d5c81,
- 0xe43d65e7, 0x0677b2d0, 0x9eb688d0, 0xf16b0c76,
- 0x8d631991, 0x66e970f6, 0xbea1b969, 0xa69b23ae,
- 0x0d4d1ee8, 0xeab5153d, 0x13cbd99d, 0xdba6a20f,
- 0x79c15708, 0x36d70762, 0xaea5be83, 0xf9d1f9d2,
- 0x289261e3, 0x42e78643, 0x4978ba45, 0x62973804,
- 0x943ae9c1, 0x720a74cc, 0x73b83f39, 0x29023556,
- 0xc1fca75f, 0x49f6402b, 0xc379c97c, 0x8d16a538,
- 0xc6a6807a, 0x49fd563b, 0xb8e07e56, 0xb56718e3,
- 0xa32753f2, 0x9368d9a5, 0xbe964ed3, 0xd0887abf,
- 0x68ff1701, 0x2eb03c4c, 0xa9033a35, 0xa1975045,
- 0x22398290, 0xdb5f88f8, 0x7ad83735, 0xfebc5905,
- 0x392d2bf6, 0xb28fd56e, 0xa42d3f39, 0x8cbb1bd7,
- 0x94f2da15, 0x6e1113ef, 0x01a79537, 0x34a61fc2,
- 0x2d34bcdb, 0x92a89b1a, 0x4d8e13b0, 0x679179e6,
- 0xcee7846e, 0x0635fa0b, 0xad431819, 0x18dfe09f,
- 0x98b59646, 0x5b530a3d, 0x501a351d, 0xa5dda362,
- 0x02f96e2f, 0x2f02304c, 0x4b5f5683, 0x035ce77f,
- 0x5152e01d, 0x814b554a, 0x0cc9b824, 0x6cbe65e7,
- 0x6d7c55aa, 0x2f2f230b, 0xa3961541, 0xb7e1fb47,
- 0x36cdaac2, 0xa3549fa1, 0x6e843a72, 0x885c6e5a,
- 0xe4d830bf, 0xecc4ef0f, 0x49ec6778, 0xfa473918,
- 0x6fbd52df, 0x2d601bac, 0x1927d18e, 0x9767d10f,
- 0x33455911, 0x39f4a11c, 0x5da36f3a, 0x3a6acb8c,
- 0x26dfe109, 0x75534f3d, 0xf9f524a6, 0x11621948,
- 0xafa3b70a, 0xc6e95bb5, 0x09ea9691, 0x86422021,
- 0x8abd8ae7, 0xd4a9257e, 0x63fcfd26, 0x62af01a0,
- 0x9a522121, 0x6035d404, 0x71dec5e5, 0xf52d7713,
- 0xab274c7d, 0xfa1f4cf9, 0x3590f75c, 0x2b21b464,
- 0xc5fb887b, 0x68930c16, 0x711f5ee2, 0xeeca896a,
- 0x3f4e4748, 0xd6ebcede, 0x46861136, 0xbfde5f95,
- 0x84475d44, 0x86c51fa4, 0xfba7e0fe, 0x2821131e,
- 0xb88099dc, 0x17c1c804, 0xf3928b6c, 0xfb12730f,
- 0x7bebef29, 0x77533cc2, 0xf61d53e3, 0x97c52679,
- 0x70b92c59, 0x0c52f0c8, 0x1c868739, 0x72fb8a61,
- 0x5dfeb379, 0xa3ddb8ae, 0x304540ad, 0xb9027ae8,
- 0xb118e925, 0x4af447ab, 0x1f08fabf, 0x6bf871cd,
- 0x4dd58222, 0xb3e99379, 0xc50f7ad3, 0xdc6e9981,
- 0xf8c54345, 0x04cc38f5, 0xbc339ca3, 0xd00643dc,
- 0x2fdaa410, 0x1fb648a0, 0x8d263f0d, 0xe0ccd7db,
- 0x0e8b4739, 0x948c1ce1, 0x6517dc67, 0x84360745,
- 0x15264166, 0x122930c4, 0x63889fff, 0xf86d6142,
- 0x0070abf1, 0xf9c2aa3c, 0x2ebf80db, 0x4bbcfb46,
- 0x1bca082f, 0x44cf8e0d, 0x80c2bf73, 0xb040fd58,
- 0xa014d4e4, 0x752d74f1, 0xd60c6daa, 0x22450372,
- 0x7ae80ec7, 0x9395e303, 0x6bac84cd, 0x7cdfb04b,
- 0x5056b882, 0xa3b015a7, 0xb3752d38, 0x11bebcce,
- 0xfe330827, 0x28f010ca, 0x2c1ec0e1, 0xe921a365,
- 0x0af770b7, 0xc1b5cf65, 0x3694b44e, 0x5d3e9718,
- 0x18c1fcf3, 0x6a81c8f4, 0x542a0afe, 0x5ef7acf5,
- 0x3fed458c, 0xbd0e32f6, 0xb5175fb2, 0x4c83dc6b,
- 0x1f238675, 0x8df4a26b, 0xe114ad19, 0x7359e392,
- 0x44ce1986, 0x7ce3f831, 0x7a064d48, 0xe1309c21,
- 0x343d2763, 0x9ac22765, 0xa9d39781, 0x0e771707,
- 0x2094dcf2, 0x83b214cf, 0x29e8bb49, 0xd5eb9775,
- 0xca9fa814, 0xa0d05e76, 0x8cbaff57, 0x7ba1279d,
- 0x8cb413d7, 0x81e9c63c, 0x4b67553e, 0xc5be4306,
- 0x9404f216, 0x7d98c4a0, 0x30ad3d03, 0x44cf2f12,
- 0x5a58c278, 0xec414c18, 0x7729b2b0, 0xc9686d46,
- 0x9d9a743d, 0x6fafe79a, 0x2ba77086, 0x91797abb,
- 0x34463a5a, 0x868ce6aa, 0xd0c3b0c4, 0x2ec6842a,
- 0xfdf9beb7, 0x21aec0ec, 0x50651501, 0x4ddca1da,
- 0x62a501c2, 0x65c86a4a, 0x2002be91, 0xdf1e15bf,
- 0x4ef3d79c, 0x0957a1f7, 0x869ce566, 0x64c21b6a,
- 0xbf46deb6, 0x0474ce95, 0xf98515e6, 0x4a46e10b,
- 0xc73e334e, 0xd3064659, 0x2314f759, 0x9eaf1885,
- 0x355703c1, 0x7fdcffe1, 0xa5262c9e, 0x7fa191d3,
- 0xc4eb661a, 0x4d5fbbb5, 0x169670a8, 0x2ddf976a,
- 0xa3edd956, 0x1a55b25a, 0x8552872c, 0x4feaca6a,
- 0xfc5e69aa, 0xab345774, 0x829c8f58, 0xb6c74537,
- 0xe8556b02, 0x96d39f1b, 0x7bed65bc, 0xc79f8d9a,
- 0xdacc2b32, 0x41b3698d, 0xe734d16a, 0x4aea7d43,
- 0xa164f1d7, 0x8cb73414, 0x084586b8, 0x481530d2,
- 0x6a3be457, 0xb2a8cc87, 0xa552ce0e, 0x00210190,
- 0x19fb8b78, 0x3716a7dc, 0xe4c1ab30, 0x6828a064,
- 0xf2ec97f1, 0x653bb883, 0x1d64afc1, 0xb4a8db3e,
- 0xcf1551c9, 0x9e07b3fc, 0x2fe26f69, 0xb231dccd,
- 0x4bb1c02d, 0x68dc3567, 0xc90e9214, 0xed98f214,
- 0x8cee4720, 0x2b1bf6fd, 0xda748ba4, 0x7e33659b,
- 0xa5423ad1, 0xf4a1b910, 0xcf02cc8f, 0xc351d2fa,
- 0x15213c25, 0xe375ae89, 0xa0ad4705, 0x099d0255,
- 0x5e560837, 0x4f7975b1, 0x4226fd39, 0x0f150f84,
- 0xb35053e7, 0x66ec2593, 0x8b3d2a9f, 0x500df7fd,
- 0x8d807ec3, 0x1546c058, 0xf1b36953, 0xf641b4ab,
- 0xa2c4eee7, 0x80874554, 0xa4cffb4a, 0x47bb038b,
- 0xdc85bc48, 0xf264af42, 0xfed4a8c8, 0x4545f078,
- 0xb48cbb08, 0xb38cb4d8, 0xa5d2f87f, 0x7afc6080,
- 0xdad36053, 0xb2cb85d7, 0x435601c3, 0x5fcd6c46,
- 0x4ff290f9, 0x28fe52a4, 0xa8d2953c, 0x969717d8,
- 0x111a060c, 0x81275f6c, 0x3ba503c0, 0x5d1b8f00,
- 0x8ed424bd, 0xa7aa2a6a, 0xe8b077b1, 0x7360c3c1,
- 0xe4cfea1e, 0xc9175efe, 0x31652f35, 0xa4ba80b4,
- 0xdef58c18, 0x3f50a8b5, 0xb3069a46, 0xb59c812a,
- 0x9d01a0d8, 0x5195e7cd, 0xd5cddca7, 0xf584fdd3,
- 0x7c37aecf, 0xf724feda, 0x517b5369, 0x5a242396,
- 0x7f897c75, 0xaa43aaa9, 0x1e0d3a27, 0x17d3530b,
- 0x9684c496, 0x9b177e63, 0x89b0c002, 0x2762754a,
- 0x1ce24045, 0xe9d3f9f5, 0x0b9c9008, 0x53d8ff66,
- 0xa432f4aa, 0x3b0ef1a0, 0x0cb09e9e, 0xb141e6da,
- 0x1abaef24, 0xbc4527fb, 0x6d64663e, 0xb81f07db,
- 0xc57f0569, 0xb3ccb323, 0x37c5ccb6, 0x5a48a5a3,
- 0x5f202e66, 0x249f5c48, 0x3ba3d909, 0x6775b383,
- 0xafffe78a, 0xe3b9a058, 0x4a173160, 0x80a37ce0,
- 0x1fb5d953, 0xba234f01, 0x650b070b, 0xab0e08f0,
- 0x12f58c9e, 0xd3adfca6, 0x7e7aa5e9, 0x4c8d3e40,
- 0x645381ac, 0xc80b92b7, 0x52824b6a, 0xfc6650fa,
- 0xe9875875, 0x00e440e4, 0x7e7a385b, 0x1d036de1,
- 0xc229f901, 0x1cdfe89a, 0x36b31fc3, 0xa409daf5,
- 0x1ffec98a, 0x34f2d356, 0xe39323f5, 0xcfd0edc4,
- 0x544dff14, 0x96561b29, 0x7e318225, 0xca283e56,
- 0x30e6f445, 0x98e1a40d, 0xbb9cdb9e, 0x61ef64ac,
- 0x36b93117, 0xb6d8db51, 0xf56ebaf0, 0x15fc55d0,
- 0x9f336d3d, 0xf04ba9c1, 0x45718234, 0xa5361c6a,
- 0x08c955df, 0xd1911bf1, 0x79515ea6, 0x39072fd5,
- 0x72503e65, 0x299b3b0f, 0x5ac12cda, 0x086413a2,
- 0x3c212316, 0x9a0a67dc, 0x478067ad, 0x03263094,
- 0x191f832f, 0xb0574027, 0x3c1c4b37, 0xae76fef6,
- 0x35119743, 0x246bae44, 0x43714400, 0xdc73a15b,
- 0x58fc478c, 0x2e853900, 0xb4349195, 0x525ff5ab,
- 0x816504da, 0xa3410190, 0xc518b2d4, 0xc200e979,
- 0x2da345fa, 0xaa1e13db, 0xc74ac107, 0xb40085b2,
- 0xaaacea2b, 0x6fdfc4b2, 0xc65b4e27, 0x2263ac78,
- 0xbf122069, 0x2b9ad054, 0x63daa966, 0x8b84eb31,
- 0x68f9b24c, 0x2a56c2d8, 0x842c9c42, 0x371509da,
- 0xd261b01b, 0x5a8ceacc, 0xc96ec155, 0x400d2767,
- 0x3b087aec, 0xfdf4ada0, 0xe8608529, 0xb7a63a4a,
- 0x5a8f086c, 0xbd578c4f, 0x9ab4b028, 0xdeacb315,
- 0xa8eafb1a, 0x576b7db0, 0x513a0804, 0x03cec626,
- 0x0e2fc89d, 0x88ee7af0, 0xcfbc25b8, 0x0ebe884d,
- 0xb61da6fb, 0x997631bf, 0x8b9e0c66, 0x2141918c,
- 0x2731586f, 0x2db3c681, 0xfd6d5c37, 0x00873fac,
- 0x480e2c71, 0x9d23681a, 0x150f2b98, 0x2a61f9d6,
- 0xb172abd5, 0x0e652dcb, 0xa7369fdf, 0x9336fd0c,
- 0x862164aa, 0x0aad4e83, 0xfa484dc3, 0x0ac9407d,
- 0x0d652975, 0x0e1c3834, 0x8fe438a5, 0x2f30e7ac,
- 0x7821d6b1, 0xd7dd6497, 0xe79bf71b, 0xa69c7f70,
- 0x8b935026, 0xe263ffd4, 0x3eb911cd, 0x11b4e9b1,
- 0x682ae6da, 0x791a8c98, 0x3ffa20ea, 0xc9bc62e1,
- 0x462ab761, 0x5668a7f5, 0x2db17b75, 0x06cf7333,
- 0xccfecf2c, 0x91ece6a3, 0x4fb67a8f, 0x7bc3e477,
- 0x9d6606a3, 0xec2c7c02, 0x5600620e, 0xcea8fca3,
- 0xc1dd7cb7, 0x3232f262, 0xeff6ee7a, 0x95dd43f7,
- 0xfc017fb0, 0x88dfb2fa, 0x0fb857cc, 0xab2704b4,
- 0x50c16dd9, 0xecd37325, 0x2fe34706, 0xb76d7960,
- 0xc892b7da, 0x1943d334, 0x79b4cbf5, 0xd2d8459f,
- 0x1418ad70, 0x5516926f, 0xd879cf48, 0xf68b5c6f,
- 0xa8d71c2b, 0x5b25b2aa, 0xdea9cc34, 0xc63eddf1,
- 0xf4ef0709, 0xaf7ebcef, 0xe025cbdd, 0xe958bd96,
- 0x7bfedc85, 0x38ef0fad, 0xcc75abcc, 0xc46b28af,

soc/intel/baytrail/microcode.bin

diff --git a/soc/intel/baytrail/microcode.bin b/soc/intel/baytrail/microcode.bin
new file mode 100755
index 0000000..42c63b4
--- /dev/null
+++ b/soc/intel/baytrail/microcode.bin
Binary files differ

soc/intel/baytrail/microcode_blob.h

diff --git a/soc/intel/baytrail/microcode_blob.h b/soc/intel/baytrail/microcode_blob.h
deleted file mode 100644
index cd4bf70..0000000
--- a/soc/intel/baytrail/microcode_blob.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include "M0C3067_0000031E.h"
-#include "M0C30678_0000082D.h"
-
-	/*  Dummy terminator  */
-	0x0, 0x0, 0x0, 0x0,
-	0x0, 0x0, 0x0, 0x0,
-	0x0, 0x0, 0x0, 0x0,
-	0x0, 0x0, 0x0, 0x0,

soc/intel/broadwell/microcode-M7240651_0000001C.h

diff --git a/soc/intel/broadwell/microcode-M7240651_0000001C.h b/soc/intel/broadwell/microcode-M7240651_0000001C.h
deleted file mode 100644
index df7fc77..0000000
--- a/soc/intel/broadwell/microcode-M7240651_0000001C.h
+++ /dev/null
@@ -1,1280 +0,0 @@
- 0x00000001, 0x0000001c, 0x07032014, 0x00040651,
- 0x4f9aa4c4, 0x00000001, 0x00000072, 0x00004fd0,
- 0x00005000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x000000a1, 0x00020001, 0x0000001c,
- 0x00000002, 0x00001331, 0x20140702, 0x00001331,
- 0x00000001, 0x00040651, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x54803536, 0x5b42092a, 0x9f337d90, 0x538e6ae5,
- 0xee797c87, 0x40b34be7, 0x2058da4a, 0x02665b1f,
- 0xa19308a3, 0x5b19c4b7, 0x4a1b425b, 0x7d6a74f6,
- 0x81624193, 0x3a559605, 0x5475280b, 0xe7319d58,
- 0x48624ca7, 0x507af030, 0x3b32d96a, 0x30164068,
- 0x5284d2f5, 0x725b2915, 0xf63c9280, 0x44b7c142,
- 0xe67ca7b3, 0xd6f163e7, 0xcdf51f3c, 0x41d180a1,
- 0xcc3931b1, 0xf7a544a9, 0x7f6bf77d, 0xfc45a45f,
- 0xf0985836, 0x652d7e2e, 0x0324b1f3, 0x24b9548c,
- 0x7bcae7a5, 0xdcdebf79, 0x27015922, 0x0c83c606,
- 0x3d2ceeb7, 0x61c5eec8, 0x6b6899c6, 0x3e500531,
- 0xf08bfa44, 0xb304a8f4, 0xcee8f713, 0x2912c786,
- 0xfae6c34c, 0xa5292960, 0x7d63e389, 0xaa257a01,
- 0x1fb25054, 0x963fc676, 0x5bcb9fd3, 0x58f369a4,
- 0xf6e3beb2, 0xa58b5eb0, 0x33c7eba4, 0x37fe8b66,
- 0x00714403, 0xf0fd0c4e, 0xaa122996, 0x9a55b184,
- 0x00201507, 0xc9fb6e3a, 0x11ab60c8, 0x80ff6e84,
- 0xc37aabdd, 0x0fc23175, 0xb0b18c34, 0xf1ec806c,
- 0x00000011, 0x93ec6a8e, 0xe7e59e0e, 0x8354a863,
- 0x6532cc70, 0x6b941f6e, 0xe6efb015, 0x813a0672,
- 0x4bd6a134, 0xe7d2ae2e, 0xb801fd17, 0xc6730db1,
- 0xffaf70c6, 0x99963a56, 0x552b2448, 0x06da244f,
- 0xbddb7094, 0xc41bbd43, 0x8566bdda, 0x8730b02b,
- 0x0ffc1836, 0x57f083f5, 0xbc7eb4f9, 0x93720c90,
- 0xb948e082, 0x646a29c2, 0xab785ca6, 0x22d6de29,
- 0xad6632ee, 0xf781c405, 0xab8c189f, 0xe9f84888,
- 0xdfc91edd, 0x7c42229e, 0x713f0b2e, 0xbfec8862,
- 0xd7041476, 0x30cdc9df, 0x6a884797, 0x4df51550,
- 0xe6e3d09a, 0x2b63aff3, 0xbe437a9a, 0x2bbc6a7e,
- 0x36cd4cac, 0x4c3a5d83, 0x22e35ba1, 0x2602cf9d,
- 0x90506b16, 0xad5e4dae, 0xfd02e76c, 0x41ecfaf1,
- 0x5885656a, 0xf1da2947, 0x9a6e02ea, 0x338ab563,
- 0x73de7a3e, 0x80131004, 0xd82962c5, 0x8e8c88ef,
- 0x7ae0d2fa, 0x3420c82a, 0x202e795c, 0x3a0d9404,
- 0x3d337908, 0xc1c8f56d, 0x1a9d5f9a, 0x8d294c4d,
- 0x054fa4f0, 0x1feb3cba, 0x1fcaf41f, 0x36ce8dfa,
- 0x15765644, 0x5741c08d, 0xd258e716, 0x67d51f76,
- 0xe16efcf6, 0x53877ae9, 0x5632053f, 0x3efc3569,
- 0x21202e38, 0x59367def, 0x73e8c31b, 0x5558b394,
- 0x3801fe26, 0xa291f1ad, 0xb853571c, 0x43d8845b,
- 0x919a9ede, 0x5eaf4d90, 0x986cb6b6, 0x822a630b,
- 0x0904e79e, 0xa20dcab6, 0x05470b25, 0x62dc1169,
- 0x0de7ce15, 0xd4cafd8a, 0x2216b4fa, 0x3ba658df,
- 0xf84db879, 0x94365ec0, 0xffd76c6b, 0xcf5003d0,
- 0x2ab8d6dd, 0xb87ce90c, 0x77b341c4, 0xe9bdd2d1,
- 0x05343cca, 0x0d0a7813, 0xcc23da22, 0xbbaef3c9,
- 0x82bb35d0, 0xc8d97e27, 0x062c07f0, 0x31fc6743,
- 0xa5d7b86e, 0xfb399a4a, 0xea0ca298, 0x45c56f0c,
- 0x9de334e0, 0x2b808722, 0xdcb90fee, 0x86880439,
- 0x4bb5520f, 0x2f8ccd3f, 0xb31154f5, 0x76b037c1,
- 0xc8cf720d, 0x9e53125e, 0x495ab1d6, 0xdc09098f,
- 0x90ff69e5, 0x4fb52efa, 0xe07dbe04, 0x505dce0e,
- 0x9930358e, 0xc7243a95, 0xacae76b3, 0x23702ced,
- 0x36ba2ba8, 0x12f6a4d6, 0x6291a5df, 0x43e09751,
- 0xd86e8606, 0xe5b8d173, 0x84cf7f38, 0x5a2a732d,
- 0xea8dec57, 0x075ab4bd, 0x3093ea05, 0x7ddc4623,
- 0x9eeac07d, 0x0bae6c5e, 0x1170d85f, 0x54585ce5,
- 0x424b5930, 0x6f962ed0, 0x6291c170, 0xda9a243b,
- 0x7a1aa460, 0x07fe426b, 0x3e0fbcef, 0xe6f65e2e,
- 0x16a76698, 0x2ee2c974, 0xd42dd042, 0x60b2d4c2,
- 0x84ca0de9, 0x1b321482, 0xd80847e7, 0x97cf9fc9,
- 0xabad4e62, 0x4c5e7534, 0xba474a3d, 0x4b386fe1,
- 0xb1d3bd4a, 0x66f2e748, 0xff997d29, 0x7f9a5ecb,
- 0x08b74697, 0xd5ff51e3, 0xf0e80f08, 0xbc8a3750,
- 0x96c2b150, 0x993ddd82, 0xb1fcad1a, 0x39c457ed,
- 0x8e7887a9, 0x951385c2, 0x5e192577, 0x5ece4be6,
- 0xd8aa0cce, 0xda9db0dd, 0xf0a65605, 0xcbe133fb,
- 0xd62d187c, 0x43d65c21, 0xd9ff512b, 0x2c1e670f,
- 0x94862f11, 0x2ad5876f, 0x0347f479, 0x837c9d9a,
- 0xd588cfb5, 0x3184bcbe, 0x4d29209d, 0xb11531fa,
- 0xcf60605f, 0x8582c22e, 0xf80aec84, 0x56770992,
- 0xb008270e, 0xe61f0247, 0x5b96ca82, 0xddf6a6d7,
- 0xa8fd309f, 0x5a37ebf0, 0x89c55922, 0xa1d3e943,
- 0xc7437f57, 0x8767c3b9, 0x2aace409, 0xd3ffea65,
- 0x01673382, 0x3062cc4d, 0xdc3ca70e, 0x72ec823f,
- 0x013dfcf0, 0x3cea3c0f, 0x5c6f9892, 0x0401238b,
- 0xd0f5c9a9, 0x83d5363a, 0x20594afe, 0xf31625f7,
- 0x36d9bf4d, 0x979d10e2, 0x82ec9621, 0x1575da7e,
- 0x1e48b107, 0xcf273476, 0x8f6bc6ce, 0xc468a1f1,
- 0x19304de2, 0x8a514ade, 0x0da8ed49, 0x89bba358,
- 0x4fcde67f, 0x1b236a87, 0xbd9c34c4, 0xc31e7624,
- 0x8d4e1b94, 0xca715a48, 0x57aab513, 0xdc01097a,
- 0x61536abc, 0x9ab66e22, 0xc3e9acac, 0xf9793dc1,
- 0x01d27d3e, 0xec783b0a, 0x7f8a7b0a, 0x8952bd32,
- 0x78f97900, 0xea165074, 0x6a3b9b4f, 0x6994be45,
- 0x97b278db, 0x2d7a1059, 0x2a9a584d, 0x3102f971,
- 0x3dd2edfd, 0x75d40781, 0xbd8bb3f7, 0x69c9e2ad,
- 0x2924453d, 0xf971a611, 0xc44c6a20, 0x6458ddf0,
- 0x344e948d, 0x99861094, 0xffc216ce, 0x46a544ac,
- 0xa0e12280, 0x2342bdd0, 0xd264153a, 0xef7c5510,
- 0x982fdb4b, 0xaa8061e1, 0xeeb4cb06, 0x1c4e24bb,
- 0x35137ad0, 0xd383e7b0, 0xb3515b98, 0x34ab789c,
- 0xc6677101, 0x3a179ec6, 0x8e1b7f83, 0xbc952258,
- 0x528cc506, 0xbb0ee496, 0x041a20c7, 0x435c1764,
- 0xc5ffbfe5, 0x7aadad66, 0xba7c49b5, 0x16961f55,
- 0x53a973b0, 0x82b7c322, 0x6108d300, 0x1e465f56,
- 0xde5b0cdf, 0x1db4c843, 0xdc84068d, 0x746b86a8,
- 0xe18bb690, 0x9c31e6c3, 0x3fbe45db, 0x9fcd70bc,
- 0xebf1e3bb, 0xf293ed6a, 0x9acc3c5f, 0xc2d8d4a7,
- 0xb4f10f0e, 0x8f08aade, 0x7ff658e3, 0x571f87e4,
- 0x53911020, 0x8eabc16c, 0x66de43e6, 0x86313e1d,
- 0x091638f2, 0x4fabd2cf, 0xf64a8806, 0x34a9f3c4,
- 0x342eb98c, 0x6da221f8, 0x5dc9ad3d, 0x3f235ca4,
- 0xf13aae29, 0xe58aae0d, 0xbb0f06b0, 0x0146ce07,
- 0xdb82eed1, 0xb8a5b35e, 0x5ad2f1af, 0xc904facd,
- 0x9cb2684d, 0x664cdcc1, 0x8b83058c, 0x3a144bad,
- 0xd818e9fb, 0x1a4378e3, 0x087ee2c7, 0xc45812e8,
- 0xd10705f1, 0x040bdc37, 0x24dcced6, 0x5d917109,
- 0x6544b517, 0x321bea6d, 0xb4c74b5a, 0x93b11971,
- 0xdbd04da0, 0x9180fdad, 0x9b5c205b, 0x8e123be0,
- 0x2752e398, 0x74ab49b4, 0x3b8090ae, 0x8e564f95,
- 0xae58ebb9, 0x7c2ab771, 0x8d8b4559, 0x4aae59b0,
- 0x3d57724b, 0x5324f318, 0x3f6b4f5b, 0xa7c2dd69,
- 0x75cc2f3e, 0x58d81e09, 0x724a5ddd, 0x00373586,
- 0xfe1bfc27, 0xebeed8c4, 0x9f4df4dd, 0xa3d7150f,
- 0xd4cf1d99, 0x77663800, 0xba7326ee, 0xf799bb1d,
- 0x17f711a1, 0x0b683496, 0x16734362, 0x1c1ec0fa,
- 0xbd7606d5, 0xde0ecfaa, 0x4fa3d7e1, 0x18b5cafe,
- 0x86ded1cb, 0x84eb26a4, 0xe15ad21b, 0x6222135a,
- 0x4813612b, 0xf435160d, 0x8bb9cdef, 0xc0febebc,
- 0x908ea268, 0x6114ec6d, 0xde72772c, 0x2de363f2,
- 0xac07caff, 0x4d1367d2, 0x5ccb4e20, 0xb8c2480c,
- 0xd40a88f1, 0x4c8aaf04, 0xec69eadf, 0x08d603d4,
- 0x1d6b72c2, 0x45cb2279, 0x9c18a457, 0xb1eefcd5,
- 0x6f5bbe8a, 0x8656da63, 0x5abd01ef, 0xbd3a0fa9,
- 0x07f8b848, 0x4723e8da, 0x1c8a7404, 0x0ee2c60d,
- 0xf4d73710, 0x2e98dd50, 0x42265393, 0x607cae51,
- 0x5ad2d65a, 0x443fae0a, 0x212bdac1, 0x94eff1e7,
- 0x8fd0d83d, 0xf3f48729, 0xaa613eeb, 0x532716af,
- 0x22f67b55, 0x197dd562, 0x30bbc619, 0x452ca5b8,
- 0x69125584, 0xbe8ffd8f, 0xcdc33841, 0x1afadf4f,
- 0x6c327b0a, 0x1ffee636, 0xbc3e313d, 0x2274f02f,
- 0x1d4bd1ab, 0xadf7f661, 0xc6ae5dba, 0x65c67cce,
- 0xd8ba01b4, 0x067ec15e, 0xcdd98197, 0xf63a814d,
- 0xa63ef3b1, 0x3a0f7ab7, 0x0b141297, 0xbd16dffd,
- 0x80de07c9, 0x5b855491, 0x775d7917, 0x79039980,
- 0xc4f0b5a2, 0x7ad189f3, 0x5b808e2c, 0x6e6c48f8,
- 0xea4b291a, 0x244153fb, 0xd866387a, 0x0fbad87f,
- 0x37fd2697, 0xe38d68cc, 0xd56bb9be, 0x0fe9183c,
- 0xfe4286c7, 0xa9238f4e, 0x57c6bafe, 0x7e7c64da,
- 0xf5f0b3c6, 0xf2174839, 0x9622aabd, 0xbfb9add1,
- 0x7a9d83f3, 0x22cdc940, 0xd0aed140, 0xb2842a1c,
- 0x19350ede, 0x844cea83, 0x03f824b6, 0x2d6a80d1,
- 0xcc7234f5, 0x64e522f9, 0x68463ec1, 0xc22ca25a,
- 0xf6fb480b, 0x92df3534, 0xcd143a85, 0xcba797d1,
- 0xab3040eb, 0xaa862cda, 0xeb8dbb5a, 0x72f87be7,
- 0x0574be93, 0x7967a4e8, 0xc43d5618, 0x95f48b0f,
- 0x605384f1, 0x49d7bbd0, 0x20e6ff24, 0x8891ad61,
- 0xbe37fb81, 0xa14cc9ac, 0x1737a15d, 0x0d8c64c8,
- 0xf31ed8cd, 0xaeba1a38, 0x99b73598, 0xfb58e711,
- 0xe2cd0a2a, 0xba3ae60f, 0x53874128, 0xca6bd9f6,
- 0xdaa3865a, 0xdf558d1e, 0x69c074ea, 0xd2d74d88,
- 0xd7924cfa, 0x9cfbba04, 0x560eb2ac, 0xb58eb3fb,
- 0xac0f471a, 0x8b9775a6, 0x04f93abd, 0x71830a7b,
- 0xabece5a2, 0x7d0b9603, 0x447e0437, 0x9b19fdf0,
- 0x2aeb904f, 0xb6c581ab, 0x69c4a6e6, 0x9e996bf9,
- 0x28345395, 0x8797c013, 0xab770f48, 0x02414cb3,
- 0xf1400aa8, 0x77b85d38, 0x6c1519d4, 0x68aa8d18,
- 0x4ad589f6, 0xde108567, 0x26ce3cc8, 0x855d739d,
- 0x4123b448, 0x0acfaf11, 0x3d1d706e, 0xcf6dfbc2,
- 0x02869b0e, 0x8ad4c4b5, 0xb118ed06, 0x19defc29,
- 0x955de3e2, 0x4246d3bb, 0x20d55907, 0x9263ee1a,
- 0xe3b1a896, 0x2aa64af6, 0xac652be4, 0xc319f5db,
- 0x1f87bdbc, 0x5d35a264, 0x915af64d, 0xa63f8b9d,
- 0x8b596f71, 0xb289a637, 0xbf4df8f4, 0x637223dd,
- 0x1c7b17aa, 0xb73cff48, 0x490b6e3b, 0xfb9cc770,
- 0xbdddc085, 0xf61b9342, 0xf632cb9c, 0x7a1273c8,
- 0xe12e5792, 0xc8874fda, 0xbac1a2cb, 0x2525df42,
- 0x14735a6b, 0x48b123d4, 0xbf80739f, 0xa5acac23,
- 0xe509b461, 0xd72e2e2c, 0x94553b2d, 0x61274a8a,
- 0xbad8722a, 0x9cde98cb, 0x497a8db7, 0x84bca500,
- 0x85ddf493, 0xcb5717a7, 0xdbada31f, 0x34e9d14e,
- 0xc23d20d7, 0xf3a32825, 0x688ea606, 0xecbc1379,
- 0xf7cc7e17, 0x98826691, 0x0a2fc103, 0xfa891b0d,
- 0x6031f829, 0x3d93a25c, 0x45ebed73, 0xd5e938b5,
- 0xb3a8e0cb, 0xd271fb09, 0x6c01ec65, 0x26528bfb,
- 0x358e2521, 0xde0ea304, 0x3aa0e26d, 0x06bbe682,
- 0x0e141d87, 0x80f84192, 0xd2ca916c, 0x38193f29,
- 0x1f26fcb8, 0x48b0f72c, 0xa9e5b9d4, 0x757b1925,
- 0x2171c824, 0x7a5cdb28, 0x67a9cd39, 0x58e682cf,
- 0xfe773460, 0x54f56488, 0x4fab4a18, 0xd5d62f56,
- 0xaa1ff73c, 0x663a3adc, 0x5b28b030, 0xcf7c2fae,
- 0xe86c08aa, 0x675ecdf9, 0x6c54904e, 0x59bac9cd,
- 0xe830b6b5, 0x9c72f3c8, 0xc2d2dfc2, 0x7eea1860,
- 0x3e68956e, 0xcabee365, 0x2abecc3f, 0xf5584efd,
- 0x97494ab2, 0x4547de19, 0x23b75177, 0xf5158de7,
- 0x8f887368, 0x82aa37f9, 0x45edb6b6, 0x8cd4567e,
- 0x35a853f1, 0xabdfdde1, 0x126a775d, 0x74971303,
- 0x92965554, 0x884af013, 0x01678e07, 0x5ce5e949,
- 0x0e92a0b7, 0xb4ae83b3, 0xb33f17e1, 0xc1eaae2c,
- 0xf4d8a373, 0x7aaa8222, 0xbdf9d56b, 0x4b34135f,
- 0x5ec53983, 0xd79506ad, 0x48931578, 0x907b2609,
- 0x129ca0e3, 0xd1fd7d15, 0xd6cff42e, 0xe91542cc,
- 0x006dd750, 0xd45db570, 0x0d6787cb, 0x41fac008,
- 0xa14abb50, 0xe3836ddb, 0xa08d7c2a, 0x0c42081e,
- 0x99231ac9, 0xc572a6d2, 0xedd8f7c7, 0x299a0245,
- 0x1dd8dc9d, 0x67f43cff, 0xe59c0063, 0xb53706a5,
- 0x4779de2e, 0x01d4ae62, 0xf1b3af1f, 0x04fe1683,
- 0xa6ae95d2, 0xc049f706, 0x35da73f9, 0x786c55fe,
- 0x45541fe0, 0x0b712835, 0x0ba80808, 0xfbfa8301,
- 0xf243658e, 0x3fa0a207, 0xf1ad361a, 0x1022cd47,
- 0x9931194a, 0x458118ba, 0x65b01c42, 0x9eaed094,
- 0xea3c1c7d, 0x1f54744a, 0x3a93c482, 0xb624d29f,
- 0x78015089, 0x0a68782b, 0xf5497256, 0x0d9422b2,
- 0xf79ca89c, 0xd0a62c46, 0xf6bfb279, 0x87639d4f,
- 0x853431ca, 0x7cbf82ce, 0xb0b8579f, 0x91dbf9ca,
- 0xa4b41a8d, 0x6cc03669, 0x0a8459aa, 0xa84998ee,
- 0xb0e5442d, 0xc1206664, 0x1d66b29c, 0x2aa662fe,
- 0x3ff230f5, 0xb3b9ea5e, 0x28d59572, 0x071a2784,
- 0x48ad8df4, 0xb672a99d, 0x431837c5, 0x312da9d2,
- 0x552f1f1e, 0xba76bf31, 0x0fde86fc, 0x3a4b0e5b,
- 0x27767132, 0x3207cd66, 0x7acd2d75, 0xa04c2b7a,
- 0xbeb5576e, 0xe69396d7, 0xdb471676, 0xc1155dd9,
- 0xedeff438, 0xad1fac56, 0x2bdd6c24, 0x1b6a29ed,
- 0x3150d31f, 0xfef32ddc, 0x4478c8cf, 0xe291fdb3,
- 0xbff85812, 0x07f945a0, 0x2be5471e, 0xcc38f9f9,
- 0x2372ce7c, 0x8a9ffc48, 0x4e76ee7a, 0x6f6edd41,
- 0x192c0cc1, 0xe2edaa52, 0x455a388c, 0x33f1129e,
- 0x3a0db93d, 0x3182e227, 0xd751be55, 0x8f36e600,
- 0x3cfdd41f, 0x4b9aef6d, 0x2f7793dc, 0xc53a7f45,
- 0x8fc9ed8e, 0x515715ae, 0x0fd65cf7, 0xd9a798e8,
- 0x515ac27f, 0xd45cbc76, 0x8bde099b, 0xff9917b9,
- 0x8aafd3e3, 0x5fa447d1, 0x7dcff5a9, 0xbba90ca7,
- 0x306066d0, 0xd8ce22e7, 0x9b82e925, 0x1878501a,
- 0x3c04683c, 0x8178343c, 0x2bf7e5ee, 0xe9e47825,
- 0x3b7e90d9, 0x4e702270, 0x66092537, 0x8c499ea6,
- 0xfa7d1ac9, 0x08ca5fe7, 0xcaf8de79, 0x1fed7575,
- 0xc0878a9c, 0xe4c7df3b, 0xd1192e90, 0xae1c68d1,
- 0x8ae43a18, 0x378c02d4, 0xbcfa07c2, 0xc9f916d7,
- 0x0e219276, 0xf56251a5, 0xfa7a412a, 0x34cf60f7,
- 0x518c5a65, 0x8bd147a9, 0x51043034, 0xb63867c8,
- 0x0ef93a61, 0x5913a6ab, 0x5f6fe3d4, 0x2ea3d257,
- 0x720d761d, 0x4b5c0dff, 0xa9a9067a, 0x3576ccf3,
- 0x52a971d7, 0xeba0bc8a, 0x609de37d, 0xe6cc6920,
- 0xf5a5622e, 0xd0c42306, 0xf9d9eca2, 0xc24b0b89,
- 0x317c001f, 0x99f19460, 0xeab46ee8, 0x14af43e9,
- 0xa56855a2, 0x335f45cd, 0xfc976335, 0x7fa14450,
- 0x36a6f269, 0xe6b4a19c, 0xb702c383, 0x3e161b8b,
- 0xcdf62b5e, 0xc79e2106, 0x11f6c5f3, 0x0528cf91,
- 0x76c17fda, 0x2092699f, 0xed122ee1, 0xd0442e54,
- 0xf533a93a, 0xc1dddb81, 0x4c48e8a9, 0x517fba08,
- 0xc05af246, 0x19ea1e1a, 0x7a53892b, 0xf81e9376,
- 0xa50e2b38, 0x3f269768, 0xd0d29924, 0x51e6eed6,
- 0xc4c07b1f, 0x1c5b173e, 0x80cbaab2, 0x8ba8b11e,
- 0xdc2b9580, 0xa5d279d3, 0xf264d55e, 0x5e0eb0ad,
- 0xae46c12b, 0xe1dde70b, 0x47f68516, 0x68dab0ba,
- 0xe978b014, 0xa0e24cc6, 0x961da73d, 0x60662676,
- 0x185f3c24, 0xd7da33ce, 0xe37e39b2, 0x64ee0f85,
- 0x53208460, 0x09262285, 0x165ef996, 0x66df340d,
- 0xd07ad742, 0x10423944, 0x5f72f0b7, 0xbb6389ed,
- 0xcba698f1, 0xa1b0f049, 0x800dc191, 0xb44316c1,
- 0x202e479d, 0x6ee045e5, 0x75250bdc, 0x703ca7c5,
- 0x4995125e, 0x3b14ec5f, 0x6b4ba5f4, 0x98d07673,
- 0x46098994, 0x6891156b, 0x59d5f5db, 0xc5d2152d,
- 0x84edbe62, 0x35e66a49, 0xa58b0a83, 0x1ad08594,
- 0x330f0018, 0x563a7d22, 0xa39da757, 0xa8eefd78,
- 0xb6d24f9a, 0x0b646c4c, 0x74c16db6, 0x8c91aed5,
- 0xad4dd608, 0x4e0dc1b5, 0xc8cf6685, 0xa617c47f,
- 0x9797a48e, 0xa60bdc57, 0x57423988, 0x573924b2,
- 0xd26d99bd, 0x1ea54b51, 0x4335e39c, 0x5f57c59e,
- 0xa2026ad0, 0xbe251997, 0xe782f773, 0xe825f32e,
- 0x23efe8d9, 0xd193811f, 0xb43a94ed, 0x0604c7b6,
- 0x015a8da6, 0xfde229c1, 0xe4a43b08, 0x404b8388,
- 0x6dfec830, 0x66eb6b3e, 0x02cd278d, 0x7b2a3b47,
- 0x53d2f2ec, 0x2d82c0f3, 0xb8156542, 0x8cb4e600,
- 0xc2b720b3, 0xa16af285, 0xb377d3cd, 0x4abb191b,
- 0x88c66fa6, 0x4a821c50, 0xb6a4bf28, 0xc09c062d,
- 0xfb856cf7, 0xa41125f7, 0x219c807f, 0x6f8bd4ac,
- 0xd6276165, 0x3f9ed781, 0x49ff1c61, 0xe3854da0,
- 0xba0e472f, 0xeae9f81b, 0xdab793d4, 0x573ad66c,
- 0x6ba2bf0f, 0x3ee93044, 0x399db579, 0x5626bcac,
- 0x25baa925, 0xc5ca7ab8, 0x2f630a5f, 0xeacb1efb,
- 0x435c8db1, 0xd8bb68fa, 0xd41b1fb3, 0x06434a60,
- 0xba285e40, 0xedab6511, 0xe265b9b0, 0x383fada9,
- 0xb908e96c, 0x6baaa59f, 0x0b327507, 0x1773282d,
- 0x4e9fbd60, 0xc701cd31, 0x62896b62, 0xed700f5f,
- 0x38df9e58, 0x97eaf308, 0xe707fdd1, 0xcc0e1c62,
- 0x2cdc90d5, 0x6fc314d5, 0x258b7893, 0x303a2879,
- 0x9559982c, 0xeed7400d, 0xc91c91f5, 0x9a56a47d,
- 0x27482786, 0x2b7a6e5f, 0xd1a6a9d8, 0xc2349e62,
- 0xe2f94d62, 0x891135cb, 0x9760ea82, 0xdd2c8d9f,
- 0x00b4cf61, 0x453b6c9d, 0x6c3619ff, 0x58096979,
- 0xf3ddd46e, 0xe9e4334b, 0x2f0b3f65, 0xcc91a583,
- 0xc42c72e1, 0xd8206185, 0x2cc5007b, 0x794967f7,
- 0x351d7c59, 0xc1836803, 0x96ef084d, 0xf7f2c8a0,
- 0x06e384f3, 0xf4e50073, 0xf99e8383, 0x511dad20,
- 0xa3181f7e, 0x76dd9820, 0x9056b6e6, 0x5e2eef9b,
- 0x1b708db3, 0x61cd4520, 0x21fb54a9, 0x8df6dfc4,
- 0x66768bc2, 0x84419abb, 0xb57efcaa, 0x666e4545,
- 0x5474db67, 0x3e25059a, 0x06221228, 0xa7395d62,
- 0xaa2f5904, 0x402ca4db, 0x93493a9a, 0xbfc2d6d3,
- 0x2a98403c, 0x7fb63164, 0xdfcea70e, 0xf7c90a2b,
- 0xd6d4a59e, 0xf0d591e7, 0x2307ddaa, 0x439cfbe4,
- 0xa81b20c8, 0x012393e1, 0x523ae00c, 0x6e249634,
- 0x12bc37f1, 0xc523a326, 0xc7580939, 0xab063148,
- 0xe1c7866b, 0xc9b1667a, 0x2fad1f24, 0xee522d95,
- 0x2fe92e48, 0x813c9a5c, 0x0b226aaf, 0x009d00e4,
- 0x42abf72d, 0x44f2133b, 0x3e898e0a, 0x78a512f2,
- 0x1c105e72, 0x08951b8a, 0x1e5a35de, 0x0e28e856,
- 0x5dcf985a, 0x63ff27b3, 0x5c0d4a53, 0x7c18da96,
- 0x11cddd39, 0xb29505c7, 0x41462446, 0x0ef1e2f4,
- 0x249f8562, 0xd178666d, 0xd98daa34, 0x561ac04f,
- 0x4de3646a, 0x16d77ee1, 0xc36a9c24, 0xde1f7dd4,
- 0x8a633eaf, 0x7ae16e67, 0xf1af0e65, 0x25287e88,
- 0x5c606845, 0x9439fdda, 0x6f5138aa, 0xdf97c6bf,
- 0x639a9ce9, 0xf41a89bd, 0xcedb500a, 0x3cf37ecf,
- 0x5bb9d77a, 0x34b8853e, 0x849b1429, 0x54653682,
- 0x6a020ed3, 0xf3b91a11, 0x6068efd5, 0xddb5289a,
- 0x02b64c69, 0x1eb2ba97, 0xa6c46e47, 0x2a4c1ecf,
- 0xa71712b4, 0x40895499, 0x4f37fcf1, 0x5cbc9ced,
- 0xc662b1cc, 0xac535570, 0x27ed6ca1, 0x2177a3d8,
- 0x675ce22b, 0xe3095c95, 0x688a52d6, 0x57f1fce6,
- 0x32ab2e87, 0x45c135b8, 0xf64859e0, 0xbbcdd921,
- 0x8b4075f5, 0x1b50ec22, 0xbba41e3c, 0x78307f4b,
- 0xcaafef45, 0xc8645a4b, 0xeb743b8c, 0x326f87d9,
- 0xe4448780, 0x4da186b4, 0x65e21fe9, 0x7894e394,
- 0xf9a430b7, 0x216908bc, 0x06856be1, 0xaaee6daa,
- 0x50c7d590, 0x6e6d448e, 0x0cc8679d, 0xb55a6229,
- 0x92ad5319, 0x85ad9493, 0x36163b75, 0xa84f841f,
- 0xa468af85, 0x51788616, 0x437ecc5c, 0x7603fe0a,
- 0xc94ee734, 0xe610511d, 0x881d2657, 0x620a2f81,
- 0x69b7c4d7, 0x490af3b2, 0x570d9ec8, 0xed541f39,
- 0x90573fc4, 0x11e8cb9d, 0xadaf811e, 0x54d4b616,
- 0xd5fccef5, 0x0b3d7e70, 0x66fe5859, 0xcb3c38ba,
- 0xe2917270, 0x2f0a5ac6, 0x60957f74, 0xa616db51,
- 0x492d4689, 0x4ead8e43, 0x26b31363, 0x19a57294,
- 0x48fc2866, 0xe4d3951f, 0xd959ac06, 0x5d754901,
- 0xfd996d94, 0x5abee864, 0x78dd567c, 0x9a2dbe1e,
- 0x7ac44435, 0xa7582eb0, 0x5999cb1f, 0x4206c12e,
- 0x9859660a, 0x248f194f, 0xa4dac482, 0x6ba3ad4c,
- 0x5f1cbc3c, 0x5485b5b4, 0xca4030be, 0x71f7e0a5,
- 0xdb0bf1d6, 0x5bc7b8e8, 0xb2285178, 0xaa4eba2d,
- 0x201a2ac2, 0x6617ca57, 0xadeb0c95, 0x5a256471,
- 0xc5bfa51c, 0xfd79f832, 0xc3153463, 0x6aa87186,
- 0x1e23d197, 0xc7b02eb4, 0xdd4875dc, 0x5c3c0776,
- 0xd9b6a2ff, 0x6a82f1cc, 0x0a5ee213, 0x72d5f081,
- 0x56ee7208, 0xb7b7b0d7, 0x28b52266, 0x6deeaf2e,
- 0x4fe1bd3f, 0xcd4af160, 0x3b31e610, 0x4bc8d92f,
- 0xd75853e9, 0x04a3662a, 0x50d193de, 0x363a900b,
- 0x7b04fe66, 0x99072e5e, 0x2daa5fb7, 0x011ab301,
- 0x565e6ab8, 0xbfa88876, 0x1073ddad, 0x19a942d8,
- 0xb5a45742, 0x43ce67d3, 0x880d6790, 0x6d09683d,
- 0x2bba28b3, 0x9e30b5d3, 0xa5e094b5, 0xbffb1f54,
- 0xda2866cf, 0x170061d2, 0x087bbd9d, 0xe9147714,
- 0xccf75aad, 0x5980ed14, 0xb9b54e0e, 0xb370cfce,
- 0xd4477c79, 0x29569a2e, 0xee03c3ff, 0x8db1ad92,
- 0x6b62fc38, 0x280fd928, 0x93e906e4, 0xc0fc86f7,
- 0x66ea89b0, 0x9585292b, 0xee3678b5, 0xf57ee940,
- 0x7113e57e, 0x68c6a0ea, 0x83f0ab09, 0xab5d7d82,
- 0xaa7c6d28, 0x7fbe8a3b, 0xabec0792, 0x101cfdbc,
- 0xa0772cf3, 0x9b1179b4, 0x720bb88f, 0x37780004,
- 0x6c92eada, 0xfaf5450a, 0xfd4c8f89, 0x240857d6,
- 0x64134ce9, 0xbabddc85, 0x7ccc36a8, 0x00b3fb82,
- 0xd494018f, 0x4b0c4ecc, 0xc51edeec, 0x7e94fe64,
- 0xe8071a49, 0x4e27faf2, 0x2acc3b75, 0xddefacf8,
- 0x5ac7088c, 0x93a44eff, 0x0b95d285, 0x53e5ddf0,
- 0xbd491bc8, 0xa18d7961, 0x730e2f58, 0x799e89ac,
- 0x861e1337, 0x94b7b76f, 0xb29b3ea9, 0x2b053a54,
- 0xd745754f, 0x3e597c54, 0x97b5e51a, 0xdd21897e,
- 0xcb3877af, 0x35cf2417, 0x1d6b6638, 0x6dd0be45,
- 0x5ab82db0, 0x2446a5eb, 0x70a6826e, 0xe326b14e,
- 0xa3658c00, 0x60c39ff8, 0x7c655475, 0x0ca4fdd0,
- 0x7315b3cd, 0x91ef3632, 0x917dcc35, 0x32dbda46,
- 0x66583842, 0xb5b5e9c7, 0x07bb1f42, 0xb7e1c698,
- 0x5b0f6474, 0xa14d16a1, 0xf7c69623, 0x240c07fc,
- 0x6edac9d1, 0xcb28d545, 0xdbbfa1e7, 0xe5b5ccfc,
- 0xc1421833, 0x8c06525e, 0x99f00d70, 0x41f1756a,
- 0x014b6db1, 0x0b0e4c9d, 0x7ba19462, 0x7ed7bdf2,
- 0x58460b8e, 0xa6ce6448, 0x1a1b2b90, 0xe43ada40,
- 0x3fc41eb2, 0xcb1faab6, 0x259ec598, 0xf221d105,
- 0x447ddf12, 0x784fa66e, 0x3896fbbf, 0xd607bd56,
- 0x5d1e9547, 0x075bffdc, 0xfd39e000, 0x8cd067f3,
- 0xdc91037f, 0x1cd74bf4, 0xfdae556e, 0xe9e56868,
- 0x06abe229, 0x72ecaf0d, 0x3dd95d46, 0x50655092,
- 0x8c6be8b4, 0x5882c6a0, 0x48ca02e6, 0xddd72bed,
- 0x81efbbc0, 0x50b69a75, 0xb29e4220, 0x3b2bb967,
- 0xb8600874, 0x7e4d9fa8, 0xf4af1198, 0x230409c5,
- 0x1dedeade, 0x0eb89456, 0x2dab1b30, 0x670e764e,
- 0x1b04935f, 0x7c2322f9, 0x1a509a7e, 0x994f97ff,
- 0x3c49c170, 0x446dde7a, 0x7e4c9251, 0x17663c09,
- 0x41d6c8cd, 0x928cceaf, 0xb65ddf36, 0x369fec92,
- 0x21d1bc44, 0x2d3f693c, 0x103fdafd, 0x37f61a5e,
- 0xd9c957c4, 0xd83f085c, 0x4faeb03f, 0x11d010ed,
- 0x3e40ddcc, 0x55f637e3, 0xe7a0c55c, 0x19959083,
- 0x7601f29d, 0x84240811, 0x2664346b, 0xa0ffb322,
- 0xcb360ff8, 0x9faa514e, 0xc7662f40, 0xc2a7cb3f,
- 0x56817170, 0xeb0fc302, 0x20b1fae4, 0x8117ef36,
- 0x160c02c7, 0x68308405, 0x5eb5a567, 0x870effb3,
- 0xdb0cd956, 0x41fa5f19, 0x6324c713, 0x6e776daf,
- 0x51e9d794, 0x57d7681a, 0xd6f6a968, 0xe7307598,
- 0xae05ac2b, 0x53294cfd, 0xdbfa3706, 0xac8d9743,
- 0x6fbfd6db, 0x3f4ea73a, 0x91c1059b, 0xf66e20d5,
- 0x8f53988e, 0xa0c4a0e3, 0x3d969b28, 0x7bfa0ff2,
- 0xe92c21d9, 0xe9537559, 0x539b62f7, 0xc33bd95b,
- 0x4de2a8bf, 0x85da648d, 0x670148c1, 0x4af7a7e5,
- 0xc8f69af3, 0x277cba64, 0xc316448a, 0x73e7f8be,
- 0x1b703345, 0x93c376e0, 0x0f53fd44, 0xe62bf3ba,
- 0x6f8ec391, 0x3c972ca9, 0x091ca3c6, 0x713e1e60,
- 0x9646b17a, 0x1c8d733a, 0x476f523a, 0xf78c4236,
- 0x35a9422d, 0x8a3bc243, 0xed1797a1, 0xc39d0fde,
- 0x82d4e0e2, 0x1a571aa6, 0xcb37073b, 0x8ce8b583,
- 0x0e46b21b, 0x8be5edfc, 0xc3264126, 0x6de50885,
- 0x3154140b, 0xeb03524f, 0x42907386, 0xf28eacbc,
- 0xd5babd2e, 0xb100d6bd, 0x709f76a3, 0x13b1642b,
- 0xd4560451, 0x148b14c2, 0xf2b7d130, 0x958baf5b,
- 0x722fb85f, 0x6ad8c4d7, 0xa050553c, 0x73952ded,
- 0x02a5cfc9, 0x02d778af, 0x81d56fd7, 0xabd587ee,
- 0x228e0dd7, 0xbb299ac8, 0x69a11126, 0xcc516bed,
- 0xe21a4b27, 0xfa888cb4, 0x58623b79, 0x6b408e00,
- 0xf629abcf, 0x21d9e338, 0x70027401, 0x6a09706e,
- 0xc3fdaec7, 0xe6450cd8, 0x6b36442e, 0x2604c9e1,
- 0x77cf42c0, 0x9b1e0522, 0x79340f54, 0xbf357f9f,
- 0xa7e01d5d, 0x1e998ad9, 0x6b62ec55, 0x2cc8ffd9,
- 0xca7262f1, 0x29759fc0, 0x3fb1e23f, 0x407b7e8b,
- 0x395d7b38, 0x7fc7cb0d, 0x4948cdd5, 0xac1cd1d1,
- 0x4bdb813a, 0x4b718f91, 0xacaa36fd, 0xa7c7997d,
- 0xcd147af1, 0x76993ad2, 0xd7119077, 0x237b6926,
- 0x6a8dfc22, 0x17f9ec46, 0x0b00917c, 0x9aae66c1,
- 0x2da74bca, 0x2f86482a, 0x6b721e26, 0x021553d7,
- 0x1754bf78, 0x569b3825, 0x5c00e561, 0x703103c8,
- 0x18e0004e, 0xd4f68c70, 0x96b64cf0, 0x200f3dcb,
- 0x18e446b0, 0x8f249d20, 0xbb66d4de, 0x8a7f6d01,
- 0x7ab85979, 0xadea84f7, 0x1d96548d, 0x6121759b,
- 0x669911e0, 0xdb91abd7, 0x52c1db11, 0x1d58473e,
- 0x81840d89, 0xb4723b6f, 0x2a6e48be, 0x7957eb22,
- 0x8bdfe7fd, 0x70e922f3, 0xaaf702c0, 0xfeed26cf,
- 0xe3cc0244, 0x2507c5b2, 0x7bb59f03, 0x8c3a76b4,
- 0xa03388da, 0x2f2b627c, 0xe8f29601, 0x20a1dfcf,
- 0x6c46841d, 0x10487f61, 0xb9e954a5, 0x3e21654a,
- 0x7a44e6a8, 0x034045dd, 0x8f1f192a, 0xe78808e9,
- 0x1e1ebb0c, 0x3e4e01c0, 0x1051faf8, 0x9f1ebf14,
- 0x1dcc581f, 0xdeb51e40, 0x93fc89d3, 0x38415c2e,
- 0x4d7c8e9f, 0x0042112a, 0x230348a8, 0x3afe6855,
- 0x7fa8aa29, 0xf11e0de0, 0x80b32965, 0xabda25bb,
- 0x32ab8cd8, 0x11bb816b, 0x3f8c8a40, 0xb99b9603,
- 0xe92ee1f4, 0x3d42efe9, 0x5cf83e52, 0xe9aba8fe,
- 0x5b0d3dd0, 0x162bf5d7, 0x23409250, 0x21df5d9f,
- 0x282d7c07, 0xbae82d2d, 0x204a34fb, 0x73c8cbda,
- 0x4ab2d458, 0xd33dc9c5, 0x3104d92f, 0x89e1ad5f,
- 0xd4ec1ebf, 0xece6e880, 0x2cc54cc3, 0xf50979aa,
- 0x08ab292b, 0xba7a1ba1, 0x42900cef, 0xb239e70e,
- 0x75438b52, 0x9fce69a4, 0x7aeac599, 0xc479a7ad,
- 0x95f4b513, 0xa4ad8fed, 0xe1381482, 0xfdb4f70e,
- 0xb7ddad0d, 0x6e12b0f7, 0x70aa2201, 0x93035ce8,
- 0xfe87d943, 0x6a7e80cb, 0xbe0c643d, 0xd3ab55b4,
- 0x4d3ffb16, 0x0dff6e18, 0xee2e77ed, 0xa3f0244b,
- 0x590474c7, 0x798d5547, 0x59ffa16a, 0x38df5e5b,
- 0x7aa158c4, 0x751e5482, 0xaaeba39e, 0x2ccd1221,
- 0x9bf44535, 0xf936f2fb, 0x34a9de69, 0x33ca175c,
- 0x0485855e, 0xc6c0aa01, 0xf633ef11, 0xf6c65488,
- 0xcfd4eb34, 0xe7452351, 0x74e63c2d, 0x43b23730,
- 0x3e6371ba, 0x16e216d4, 0x1bbd985d, 0x3d479c16,
- 0x4e8f0427, 0x283e2970, 0x44260f1e, 0x7c45e38e,
- 0x702bf17a, 0x1e629106, 0xfeeb31fc, 0xfe5a3c3b,
- 0x727dc41a, 0x3442e1e9, 0xfd3b7735, 0x85b0efd8,
- 0x250b13e9, 0x4a9766ff, 0x95ce8407, 0xbfb894ea,
- 0x97a5195e, 0xa6654a73, 0xec4faa90, 0x0b65e10a,
- 0xfb928cc9, 0x494b456b, 0xe7fa2204, 0x95373d0b,
- 0xd24b972d, 0x457ddac1, 0x7a747b27, 0xf318eb4b,
- 0x24e4a65d, 0xa3f0749a, 0xe717abe8, 0xba8c80bd,
- 0x7d52be30, 0x12c93c4e, 0x126f17ca, 0x905ade24,
- 0x72fd1b30, 0x86f10948, 0xde05d53a, 0x40c2d9e1,
- 0x3d29c294, 0x0205e0e1, 0x782e184f, 0x38e19d96,
- 0xc23e1505, 0xb0a3ee7b, 0xa629fc94, 0x67a0be1d,
- 0xf19c4cb3, 0x43663bf0, 0xc2d0be9f, 0x5f55643b,
- 0xdbceb2fe, 0x5dd84fc8, 0x5daa48fb, 0x4cf735b4,
- 0x0509a91d, 0xf349fff4, 0x5eb0f0ae, 0x4bc02c37,
- 0x0a7775f2, 0xe82c4183, 0xf3f68ecc, 0x911af63c,
- 0x4758828f, 0x8449f80f, 0x4c421119, 0x14647f5f,
- 0x779e2b9d, 0xe4ab1a44, 0x439fa920, 0x4bd8b75b,
- 0xf94c0001, 0xef2d4d79, 0x786942c2, 0x5e4aee3a,
- 0x81ce2390, 0xbfc706ba, 0x721c3386, 0xe404ed97,
- 0x574daa9d, 0x32470dd8, 0x3de30cef, 0xf334b67b,
- 0x06c3b886, 0xbcc51791, 0x343a49d2, 0x4c2805f7,
- 0x4bcd1e08, 0xb5ba4c59, 0xa38ad1f1, 0xb265705f,
- 0x164cf5c9, 0x5597e64c, 0xdbc173d6, 0x34cdc9ba,
- 0xbceb9e14, 0xc8fa1932, 0x89888990, 0xd8668a04,
- 0x3838d309, 0x74b87ec7, 0xabf16a63, 0xf2f31139,
- 0xf6e381b0, 0x1dcfb650, 0x312c061b, 0x63189215,
- 0x113d4d64, 0x949c8dca, 0x92d49315, 0x9329863d,
- 0x00dd9240, 0x6a932887, 0x311f620c, 0x76e0c797,
- 0x982d6768, 0x86c7a327, 0xc6e436c5, 0x0fa88a62,
- 0xb142307e, 0x313998ba, 0x6f973392, 0xeefee1d3,
- 0xecda4d45, 0x45beba7c, 0x80566f62, 0x2524d686,
- 0x3e294737, 0x1c54be7b, 0x12aba319, 0x055a50f2,
- 0x16df2b2c, 0x3f0197f1, 0x17c9d836, 0x5aa26984,
- 0x85354a95, 0xc1067d56, 0x59041931, 0x6967cfa9,
- 0xecd856ee, 0x795da2b2, 0xbe22954e, 0x46b3535c,
- 0x58f89824, 0xb6563ab5, 0xb5d81dbf, 0x34e0ca07,
- 0xcf31b877, 0xd225d056, 0x5d1f9423, 0x3046c941,
- 0x97f9c884, 0x803f7a49, 0xda51486f, 0x221e1ee1,
- 0xda39cba9, 0x06345732, 0xfe24ddd2, 0x232c7b09,
- 0x4bf1fc10, 0x3c8b1076, 0xc59a1e79, 0xeee28815,
- 0xfb516ed7, 0xd9c583ed, 0xa3d02109, 0x4122ede6,
- 0x0221b118, 0xf161c9ce, 0x98eb8c01, 0x00f25590,
- 0xb239c1b8, 0xa28e6a0c, 0x983e1180, 0xac518016,
- 0xb2275327, 0x862b2a0c, 0xebbcda8f, 0xfb3963b9,
- 0x7a2403ac, 0x696f018d, 0x255c9052, 0xf66330d4,
- 0xcb9a8503, 0x1928b8b0, 0xc4392666, 0x875bf29d,
- 0x93845c90, 0xd3ce822f, 0xafa84cdc, 0x34fee83b,
- 0x2e3704ca, 0x11d3dc2b, 0xe7b1c421, 0xcf6a02a2,
- 0xb9c16c95, 0xa8e012cb, 0xc1df0e21, 0x60fe0340,
- 0x91d01576, 0x99dbd24a, 0xc3da782b, 0x4b8ba245,
- 0x8ec7a2fa, 0x1b85f893, 0x76f719e8, 0xa5a81b30,
- 0xf411c6e8, 0xa0867ab5, 0xd084ba22, 0x91ca34e5,
- 0x809a3d35, 0x47b55eba, 0x0d447b76, 0x0105aaa0,
- 0x511ce927, 0xdb3e8fce, 0xdf281fec, 0x45c3511d,
- 0x14e70135, 0x3aac5c53, 0xde304341, 0x984e8b79,
- 0xfb51a149, 0x082abb5d, 0xd7c11288, 0x4706bd6d,
- 0x6de99f22, 0xcf0e88f8, 0x4869b59f, 0xfb1228a4,
- 0xeaeabbb3, 0x941c307e, 0x0858cb3f, 0xb0b8aab7,
- 0x2997fc2c, 0x08dc2ac6, 0xdaee8a9f, 0x009a2879,
- 0xe09227ee, 0xe760fa27, 0x808c753b, 0xed645a2a,
- 0xe7b35294, 0x875da6d5, 0x91a7d0f5, 0xa7e27bf9,
- 0x13d79171, 0xddc7ea8d, 0x871119f8, 0x05782f05,
- 0x1367dbda, 0x61abcf83, 0x6bf9962b, 0x0855c17a,
- 0x98d6b65c, 0x8b3e3bc1, 0xcd9f07c0, 0x5a8aacdd,
- 0x56de51e4, 0x633f7171, 0x618406bc, 0x26ad3679,
- 0xb78dd7b9, 0x9d6e1a11, 0x90860397, 0x2f778605,
- 0xa3ae2bbf, 0x77ab097a, 0x259e74e9, 0x49d0697c,
- 0x34ebe8b4, 0x8af23270, 0xe0cb58a5, 0xf42813a0,
- 0x2ab40d08, 0x45c38f5b, 0xe40768fc, 0xa00a7e81,
- 0xcb1622cb, 0x76932bbb, 0x380bbd03, 0x4e888e14,
- 0x57748f95, 0xebb3a9a2, 0x15268ab0, 0x5f0ca109,
- 0x197ed3fb, 0xa396cbc7, 0xdd4544d3, 0x72bcad87,
- 0x9bacf1c5, 0xc29a2586, 0xafff138a, 0x06ae187e,
- 0xfa09b8a1, 0xce61d82c, 0xe1cf706d, 0xb4b386c8,
- 0xd1e7a92f, 0xd8cf6f74, 0x8e04c16c, 0xbebc903a,
- 0x6daa28e1, 0x80609217, 0x566f0132, 0x0ced94da,
- 0xc578937e, 0xe9aa4250, 0x2b91dca3, 0x97e92316,
- 0xcd4cb9c4, 0x47e27a30, 0x7c7b2403, 0x08016d6c,
- 0x0bbe10d4, 0x1ed123b6, 0x06c96396, 0xf8a5bf6b,
- 0xad1072c2, 0xba941cc4, 0xe037e205, 0x83f168a6,
- 0xec6560ec, 0xfa40ca26, 0xd65cfc94, 0x1bdc826a,
- 0x6bd9c11d, 0xff5b007c, 0x266536f8, 0xfdcec273,
- 0x43f228e5, 0x90b4df14, 0x8a0af815, 0x5b094b39,
- 0x81557772, 0xa299eab7, 0x36c9f544, 0x20ac0b41,
- 0x98b35d1f, 0xa9257811, 0x8b139c37, 0xabe02e60,
- 0x09013c2d, 0x928f431f, 0xdfed27df, 0xf39322b0,
- 0x7afa38fb, 0x6be0a4a7, 0xd1e29fdd, 0x7d0ae420,
- 0x03a07c22, 0xcd4fb717, 0xba8dea2c, 0xe5eb6967,
- 0x4c6749c9, 0x1291af8e, 0xab638bff, 0x30bc3540,
- 0x4d87aac0, 0x8b05c47a, 0x5eefd021, 0x54f12af6,
- 0xc2b4058b, 0xf34cc743, 0x32c52d84, 0x5f3e8a3c,
- 0xbd01d895, 0x103da8b5, 0xa7a8c1ad, 0xda260c67,
- 0x7e50f04b, 0xfb8b5e03, 0xcce6b146, 0xd3c2c47f,
- 0x87a122ed, 0x2b993551, 0xfd71137d, 0x8a6053c9,
- 0x4856a2ea, 0x09c81bc3, 0x0bbc0386, 0x916dadc8,
- 0x5644c85f, 0x25e0b999, 0x8f9429e8, 0xee3ebc5c,
- 0xb7598fae, 0xd37bc93e, 0x45e2bc3a, 0x81d68b22,
- 0xa9adb1b2, 0x11e4d6ea, 0x54e2d2ab, 0xdcdb457e,
- 0x7eec508a, 0xf08f2924, 0x1d0f9df0, 0x51454db7,
- 0x877b20ac, 0x2b765a9f, 0x7ce268d6, 0xbc4ee5e7,
- 0xcf568649, 0xffb05d1e, 0x558af352, 0xca04227d,
- 0x2dee1df3, 0x78e75939, 0x84cda769, 0x235e7fc3,
- 0x034cbdc1, 0x4e9ce87e, 0x55bbfcba, 0x32e99c12,
- 0x8ddc91af, 0xabb90ee0, 0x0991018b, 0xcda3b110,
- 0x5c817e68, 0x5023abfd, 0x9c812b0a, 0x9b57eb07,
- 0xa18782db, 0xa0f91c06, 0x9bde0572, 0x3bb6fd14,
- 0x97e5111e, 0xd5c883fa, 0x8628514a, 0x001e90fc,
- 0xf3ba4bb8, 0x8e4e01c4, 0xce5afd59, 0x36b26bcb,
- 0xb7407dc9, 0xd5f49f87, 0x8a0cff32, 0x56505350,
- 0xb303dcca, 0xc971e593, 0xa4a51ee1, 0xd25f811b,
- 0x77f138e1, 0x35825a3c, 0x21568e0d, 0xcc6226a0,
- 0x1874d2c9, 0x164076a4, 0x5fd825a7, 0xcbc3bd4a,
- 0x4c7eb6b3, 0x67293518, 0x57c68c88, 0x8d3d80b5,
- 0xfaaf0fa1, 0x6e19db43, 0x0ff03a9e, 0xc90f8c44,
- 0xea5e4a53, 0xf57612df, 0x64153938, 0xea843b3a,
- 0xa32e589e, 0x86563c63, 0x0f2d8e96, 0xa9cf8cf5,
- 0x0c2f9151, 0xc0937d75, 0x5023556a, 0x254369bc,
- 0x19c8e66a, 0xd6dc36af, 0x508db6bc, 0xa56322f9,
- 0x3dd77c1e, 0x01137d6b, 0xcf1a44ac, 0x0e031252,
- 0xd2cd440b, 0x0fc5ef56, 0x59753f8b, 0xbaf85623,
- 0x85eb6dc3, 0xe5aee9d0, 0x4e0cc6a6, 0x1e68bdb0,
- 0x6708eec2, 0xc1f18bf9, 0x403cc612, 0x982e78e5,
- 0xd41a90b9, 0x3f73bacc, 0xf14c5c04, 0x421e5bcb,
- 0x670feaaa, 0x3f730685, 0x725bc072, 0xb756a547,
- 0xb4c4e653, 0xa77d83cf, 0x7a76b097, 0x30fc210d,
- 0x228d2cac, 0x41ee4179, 0x333422dc, 0x058604ee,
- 0x01138532, 0xbf028a4a, 0x0e9b8bb7, 0x9e4fefbc,
- 0x389ea6f8, 0x7bbb969d, 0x1a0ea648, 0x94a1378c,
- 0xf63df085, 0xce5865f9, 0xcde59d20, 0x31394f39,
- 0x342eeaf4, 0x6922775a, 0x3305a9d0, 0x0d5eda70,
- 0xc146f9e6, 0x5c5b8eb6, 0xa8ec5a3a, 0xf7271c8b,
- 0x1da14ba3, 0x12429600, 0x51f9021e, 0x6a64c06b,
- 0xb7be5176, 0x5c1ea01e, 0xc527a763, 0xd319b4e9,
- 0x2fdfb539, 0x304f0ab5, 0xab03e3a6, 0x7bdb9eb3,
- 0x64654823, 0x903577d3, 0xb78d0207, 0x98091543,
- 0x86a0d06a, 0xb908c1d3, 0x4200d06e, 0xae1d81d3,
- 0xf84b17a7, 0xfd873b86, 0xd573f9c7, 0x3cbbd2aa,
- 0xdca2b53c, 0xe4863a75, 0xd671623b, 0x80b5ed85,
- 0x02df2232, 0x55cb02a4, 0x52d44db3, 0x39bb74e9,
- 0x9b5f07af, 0x9b59fc4e, 0xe03360b5, 0xbe5a727c,
- 0x62985b5f, 0xf4054d9b, 0x0ef889dd, 0xeca27a0d,
- 0xd75e9a4a, 0x8475121e, 0x42969e5b, 0x92fc387b,
- 0xac5b3eea, 0xbeaecf23, 0xe41c3415, 0x1166550a,
- 0x91897285, 0x515d78eb, 0xb999b01b, 0x3270e601,
- 0x9925929f, 0x297a659d, 0x9a7542d8, 0x2fe3c326,
- 0x90434988, 0x49c09eb3, 0x8d959433, 0x851d5190,
- 0xb355ae5f, 0xc905b570, 0xdef48766, 0x3e1aef0f,
- 0xdd2d97b0, 0xda4d88c4, 0xaf4e3984, 0x03d1379a,
- 0x19d40f8d, 0x9c104c2f, 0x6969fe11, 0x37e274a3,
- 0xf971a5c5, 0x26ad6b15, 0x9f7f3ed0, 0xb8801c58,
- 0xc90b8ce5, 0x0e06de8f, 0xb38a51d5, 0x7507741e,
- 0xa5ca22ff, 0x92a4c7bd, 0xfacf82bf, 0xc8237ea8,
- 0x274b5ee3, 0xa00a735f, 0xe4b0a18d, 0x1654f1a8,
- 0x49d72f81, 0x427514c4, 0xd527afbc, 0x2b828199,
- 0xf2bce884, 0xa3ac6544, 0xef2feee1, 0x8a35a000,
- 0x76f75d2e, 0x8e9f3c56, 0x836c90dd, 0xe2171aaa,
- 0xd741bd23, 0xba1dfe6b, 0xe929a3f4, 0x93193cfc,
- 0xa1780246, 0xe08ebc81, 0xf201a38e, 0xeaa33380,
- 0xa0ad7bcb, 0xc55f1dbf, 0x3cad3d37, 0x343ef6c2,
- 0x2aba3d58, 0x8aee352a, 0x4d000028, 0x40aba8d7,
- 0x9e526b1e, 0xea0ca587, 0x43b5310d, 0x06a180b1,
- 0x4c7ef4d1, 0x1509e884, 0xbfe7434c, 0xd355a073,
- 0xc46dfca3, 0x87ae84ec, 0x547254e5, 0x07e76bcb,
- 0x0ab64ecc, 0x9d1b38d8, 0x2c0d037a, 0x2157e51b,
- 0x4ff2d37b, 0x82749dce, 0x5ed4035e, 0x10ba9087,
- 0xfcaf1e32, 0x904c84e0, 0x8f7fa1a4, 0x7c521be0,
- 0x14638166, 0xe190363e, 0x4406c3b1, 0x70cf4c95,
- 0xfd6f6d5f, 0xef3a82c6, 0x2b8ad973, 0xa18b8f83,
- 0x98df1272, 0xddfc2663, 0xccb3d374, 0x50200417,
- 0x24e5e9cd, 0x8e5bdb29, 0xf0e7d30c, 0x044e2365,
- 0x5aa3752c, 0x962903fa, 0x08096d80, 0x6ccc5019,
- 0x980d9276, 0xab06a0aa, 0x2c184dea, 0xd030d051,
- 0xfa2c286c, 0xc5ee6752, 0x0d01c775, 0x08dc0b9d,
- 0xe0e80e92, 0x07c3ae5a, 0x0afd83f3, 0xc75a5e13,
- 0x43aa4abf, 0x4fc573e3, 0xd5fef3f9, 0xc925bed0,
- 0x3dcd545a, 0x9c38a04a, 0xe76596c2, 0x58417a77,
- 0x5d41575b, 0xfe22a4e6, 0xf01166db, 0xfdec546f,
- 0xf68dc228, 0x8d98f2d6, 0xb9df8917, 0xcb77df27,
- 0xd96ea21f, 0x9ad30fae, 0xc14b4cf9, 0xd042d065,
- 0x7ef8a588, 0xe1290b57, 0xb63013dc, 0x2d8e3706,
- 0xc7b8b020, 0x269531ff, 0xf542b017, 0x3bffadbb,
- 0xf10befb8, 0x83d64aa6, 0xf249db6b, 0x5cb20a76,
- 0x77b917b4, 0x75b1928d, 0x54f9656b, 0x378d0b22,
- 0x1fddbaa6, 0x4fdfe289, 0x25d3a70a, 0x742aa440,
- 0x23d4dac0, 0x09f87b6e, 0x6cae4aac, 0x69cbddd9,
- 0xdae5c53c, 0xb3334174, 0xb9b286ec, 0xd00a2f16,
- 0xf85b0415, 0x6d940d46, 0x8dc206a5, 0x7934abfb,
- 0xff924615, 0x0ab97330, 0x534f3892, 0x5ccc3fb3,
- 0x8319bc0a, 0xe6aa2d53, 0x0c969180, 0xa8cef536,
- 0x1d47940c, 0x8f6d6b81, 0xea993c5d, 0x7b62cb80,
- 0xd3d8afa4, 0x41f69f3a, 0x0105c930, 0x1076a1ae,
- 0xfc1c513b, 0x934b3023, 0x6038edb9, 0x51547854,
- 0x70df12db, 0x5f80064e, 0xa3b849a8, 0x816f2ae4,
- 0x2fbfc976, 0xf9778cfa, 0x0dfcfd6b, 0x5cad2b8a,
- 0x6dba494e, 0xbcb2d6cb, 0x7411183b, 0x089609b4,
- 0x1108420d, 0xfb2fff13, 0xffe09b7d, 0x0448553f,
- 0x66b94fc8, 0xe57662aa, 0x5ae14576, 0x1ac17a3e,
- 0xda0af6a0, 0xcaad8b23, 0x2c2d5e25, 0xb5b838f2,
- 0x1c9f7373, 0x16aa1d98, 0x4974fec4, 0xa8f57a26,
- 0x45cbb8c6, 0x0a384ba3, 0x73c7a5a6, 0x8b7701e3,
- 0x04e94edc, 0xb23baf28, 0xd72ba468, 0xbd567619,
- 0x794dd424, 0x715f9d1d, 0x1d5aa5ca, 0xe6d1b5c2,
- 0xc4454ff9, 0x77a51c7c, 0x4563a2cc, 0x2de4a847,
- 0x759fbe2d, 0x26582948, 0x7e1f7c85, 0x2c02f945,
- 0x0cb38f9d, 0x730cc1b9, 0x4381e953, 0xac61b20c,
- 0xbaecb4ec, 0x2d60afae, 0x9ec1ddc8, 0x1e22d6ca,
- 0x6db5cdda, 0x389d72d0, 0x2f9f0126, 0x3e628849,
- 0x09b00e4d, 0x37ce1b77, 0xa45e7e32, 0xf32ece6b,
- 0xf1295641, 0x4b7f3e8c, 0xb0f32abe, 0x147fe08e,
- 0xd21d5fe9, 0x5dad1765, 0x68944f69, 0x4ca7b0fd,
- 0xdec6ed99, 0xce0fd6e5, 0x5a76053e, 0xff52d641,
- 0x7ba14a03, 0x12e9ac8e, 0x5da27afb, 0x9a178be3,
- 0x6383c4db, 0xc4997272, 0x14bd9ff5, 0x9a54d4fd,
- 0x62152ae1, 0xad16f69c, 0x70fca056, 0xdffe7858,
- 0x17ed0670, 0x94a7b667, 0x25086946, 0xaf8cdf34,
- 0xf0e2e989, 0x10c4fa9b, 0xcc6be9b9, 0xa7d41319,
- 0x5153504a, 0x5e60c244, 0x5e2bba45, 0x4f6837a4,
- 0x0514781c, 0xfb10bec6, 0x58fe9b40, 0x3f01b063,
- 0x99e20ba9, 0x7a9f08b4, 0x9153ef3f, 0x1c87637a,
- 0xc768ca0f, 0x6a005b91, 0xd81ec648, 0xa562b4f8,
- 0xf181de29, 0xed1e009d, 0x5caa39c8, 0x3f081868,
- 0xb1a7bfe9, 0xd911beb1, 0x6009bd89, 0xb6a6c69b,
- 0xc2b5b817, 0x57c51571, 0x50c2e0d9, 0x87a3244d,
- 0x5174f395, 0xe3928633, 0x6b5c7f64, 0x9499e8c4,
- 0xc42d555f, 0x119a0789, 0xdfbf0c46, 0x472f65d2,
- 0x68ff57dd, 0xe4ffd20d, 0xaa25a50b, 0x25e2e231,
- 0x37a2fbc1, 0xc14724ba, 0xee54f5b9, 0x617038d9,
- 0xa5513954, 0x679608b6, 0xb5011dcb, 0x11da66ec,
- 0xf9c03956, 0xf40e3d37, 0x5d1b5853, 0x2aa74bc2,
- 0xd6cd2c0e, 0x6f9e7f5e, 0x071520e0, 0xb859ee8a,
- 0x685ac308, 0x802cae93, 0x59a7321a, 0x733485eb,
- 0x72ba637e, 0xb47d7c18, 0x128b696f, 0xd2cebfec,
- 0xc7158d0d, 0xb4064407, 0xe536dd9d, 0xe9829009,
- 0x97dfaae4, 0x8c3d7201, 0x99610659, 0xd4718253,
- 0x9625f17a, 0x43fab7f2, 0x2621ca0e, 0x254319f6,
- 0x5a02e2b3, 0xddc9f52f, 0x2fe2779a, 0x4f6e0852,
- 0x4dbde8b7, 0x532cc790, 0x8c92d82b, 0x5d85a58c,
- 0x1589899f, 0xe9433e17, 0x123dbe9b, 0xeff94e38,
- 0xb7192345, 0xd10c04bc, 0x0a653c70, 0x27da65cb,
- 0x724c0366, 0x8660d570, 0x6f752fb1, 0x7a2f4925,
- 0x7433591c, 0x8698573a, 0x98d882f0, 0x7a03dcf8,
- 0x9bda5ed4, 0xa2a2a2b1, 0xe43ef0c5, 0x3b1dd256,
- 0x1761b2b2, 0x6e1e56dc, 0x5dd19888, 0xa2dae55d,
- 0xc575ee0b, 0x78453bac, 0x7b5da7f3, 0x47830f4e,
- 0xfd24ebe0, 0x709146a9, 0x5c0cce35, 0x529b2174,
- 0xf7c8d08b, 0xdd84cdb5, 0xe1c3ba98, 0x4b92ba9a,
- 0x9eeee319, 0x14f53b0d, 0x28d32f2b, 0x4b08c647,
- 0x6698fed7, 0xcdb26787, 0xb314b3ab, 0x376efcde,
- 0x345b5531, 0xb0ea7f68, 0x18ef8315, 0x3320c970,
- 0x6c75bfe6, 0x0ff165f7, 0x327eb8b7, 0xbe05f679,
- 0x79e8424c, 0x4dfa8aff, 0x1a29ad36, 0x6db0ff7c,
- 0x36d6c97e, 0xec2ddfdc, 0x2e43a8d3, 0x8375b77e,
- 0xbd3dd5ee, 0xd4b978a1, 0xcb0c6885, 0x28b7cb15,
- 0xb15cd265, 0xc61c5f1e, 0xd3add732, 0x41892c0d,
- 0x9a9d04b7, 0xb3e4cd6a, 0xfb7ab190, 0x51611b48,
- 0xe181f9a6, 0xac6b46cd, 0x81a68dd2, 0xade51f0e,
- 0xafea158c, 0xc66cca82, 0x843a4fd9, 0xcbcfba0a,
- 0xa06f84d8, 0x09ac26b0, 0x347494fc, 0x23a78093,
- 0x0a00ab9c, 0xfc305057, 0x194e6310, 0x62ced9c0,
- 0x03833b0b, 0x8afd5943, 0xbbc1dcf5, 0x0073973e,
- 0xdbac1e68, 0xb71ec7b6, 0xd91e0971, 0xcc7d4e64,
- 0x03da7794, 0x13c9636c, 0x032609e0, 0xbcd89537,
- 0x1eeba1e0, 0x750bb7d2, 0xb7338ac8, 0x947f7f6a,
- 0x95a8b1b3, 0xcdfd324a, 0x10e658da, 0x172e3dff,
- 0x93b2d8a7, 0x236a650e, 0x1f1b67ae, 0x224505bb,
- 0x3a73417e, 0xd74df883, 0x2a6e33a5, 0x9fb954f8,
- 0xd6ad9566, 0x2ddfa1c9, 0xab12586d, 0x9c6da60b,
- 0xc3ddbaba, 0x6d41b748, 0xaba9bf16, 0x7c224cc8,
- 0x4e39e5c0, 0x4aebe559, 0xc26fd2ee, 0x1f811a6e,
- 0xb73be5f7, 0x004010d3, 0xfceec8de, 0xbfb7f67f,
- 0x457967d2, 0x59a3b253, 0xec18b1dd, 0xcde0e0cf,
- 0x6d7bcddc, 0x5d1bd7b3, 0x8b51f8ce, 0x94e19b51,
- 0x83818da5, 0xa8fe8c7f, 0xf118acc8, 0x90d31135,
- 0x74576c4c, 0x86c9c5e9, 0xc72a8cdd, 0x59a2d7e6,
- 0x6806b96e, 0x50265477, 0x0a3d34ba, 0x41854d99,
- 0x8cf43e3d, 0x2711aed6, 0xe881c39b, 0x41a8830a,
- 0x6b846bc5, 0x9d5ab0d2, 0xf2149be7, 0x360a1df5,
- 0x26117995, 0x02b4aa7b, 0xe1950d6b, 0xdb5d271a,
- 0x9f3bf539, 0x88ffe82c, 0xc4ea1ac0, 0x5f5e53ec,
- 0xaad42738, 0x8c262ef6, 0xaf9b066a, 0xf0872d1c,
- 0x178cf011, 0xa18dabdf, 0x4acb6249, 0xaef7af0f,
- 0x86e1730a, 0x529de70c, 0x94d55aa3, 0xed4ca43c,
- 0x96d935ad, 0xd1e6904e, 0xc70aaf68, 0x65a666a8,
- 0xfe2054ba, 0xc8360f44, 0xd15ca0f3, 0xd225d942,
- 0x164d5a35, 0x9061be3c, 0xd93a0aeb, 0xbe3d28b0,
- 0xcf876a6e, 0x24ee344f, 0x663df9fd, 0x497cd718,
- 0x73c5d0ce, 0xaf6a540e, 0x1e517b55, 0xb64c3c08,
- 0x79ef0d4a, 0xa103f384, 0x6d89d6d8, 0xba9d484f,
- 0xe7a077bb, 0x374b7b13, 0xf6c34e4d, 0x6797d667,
- 0x595a49ca, 0x7e4ad667, 0x04c50855, 0x618c7a60,
- 0x32448985, 0xf6599a67, 0xcdbb0b5e, 0x69ab2030,
- 0x3cd5825f, 0xa94cdc5e, 0x4d2de10d, 0x8d941061,
- 0x6525b319, 0x398a6f78, 0xdaa5ee1d, 0xa8c5763c,
- 0xc6d0eccd, 0x42daa2d4, 0x46195a19, 0xadeb3676,
- 0x380335c8, 0x25aa588e, 0x7a0b88c1, 0xcb0034cc,
- 0x0b39d916, 0x4a86bb4e, 0x7466c566, 0xc1216dbe,
- 0xe0b939a5, 0xc0b27f60, 0x11fac0e9, 0x9d1648fc,
- 0x6d8ebe7f, 0x3646602a, 0xd75ff20a, 0x8eb4ac6b,
- 0x06bcb6a1, 0x7c0514fa, 0x76cccdc7, 0x3ecbfc25,
- 0x1d477a2c, 0x847c167a, 0x55f195a0, 0xe62708e7,
- 0x36b15203, 0x834b3209, 0xff0232ad, 0xe72e9662,
- 0x3dfd0370, 0x45f96511, 0x06caef0c, 0x1916d679,
- 0x48547dce, 0xdd2ac4aa, 0x056b9f0b, 0x025ece56,
- 0x2bacceb0, 0x16be23e1, 0x5a22b391, 0x69c870b2,
- 0x6e9612e0, 0x3f6d79ff, 0x2c8842f3, 0x08fe63ed,
- 0xeef07eac, 0x86fb2b9e, 0xf28000a3, 0x423bf4c2,
- 0x6dac5f60, 0xa3438d58, 0x221c5f0f, 0x82746b39,
- 0xe4d02d8a, 0xe1c52284, 0xfc5786b0, 0x16d31e93,
- 0x91d130cc, 0x05e3c67f, 0xd3851827, 0xfe1282c8,
- 0x7c3d8e8e, 0x102b79c1, 0x3d30a541, 0xb0f390b6,
- 0xb6e39ec3, 0x0bdece96, 0xc62e38c1, 0xc77f2649,
- 0xdf382702, 0x671f70d1, 0x02aad865, 0x1fb88588,
- 0xab6e9a72, 0x994a53a9, 0x33091d86, 0x00967d27,
- 0xab055a9a, 0xd10bebb9, 0xe06067ad, 0x2eefc272,
- 0x507b4f63, 0xa6776dc2, 0xd354b1e9, 0xf5333bde,
- 0xdc643d21, 0x5837246c, 0xf789b20b, 0x36817b21,
- 0xdd9500dc, 0xc7ee8e18, 0x318cceb6, 0xce7410f9,
- 0x80c25e64, 0xfb250ab8, 0x990d6ea8, 0x6a6d28e6,
- 0xf2b6d65d, 0x86d64352, 0x4a63f9b3, 0xaafdd365,
- 0xa48a865e, 0x24d13930, 0xa38880bb, 0x960f8796,
- 0xd37412c6, 0xd317c335, 0x648bc505, 0x2f447276,
- 0x1b2ac702, 0x318d25ac, 0x8f28a886, 0xb4121e07,
- 0xeb8b039d, 0x2bbbfbf6, 0xf3b5d76e, 0xdcfcf9c4,
- 0xeb49eff5, 0xaebe5efc, 0xffc4e443, 0xd383cc5a,
- 0xedff96fc, 0xc81c6590, 0x03112218, 0xd8f1a3e6,
- 0x2aa347df, 0xbb357bb2, 0x32ae2a23, 0x2be30bd0,
- 0x0fab4908, 0x28ca5809, 0x97cab691, 0x43b384f9,
- 0x5d53faaf, 0xe7773e12, 0xea09e2f7, 0x7e4d1759,
- 0x175eee68, 0x955f79a8, 0x9a19a259, 0xa01e0918,
- 0xd506b767, 0xb9edd62b, 0x5f96cc35, 0x23a9f9e0,
- 0x6c7a5f49, 0x1d11adac, 0x69abc8a0, 0xbb7a0e30,
- 0x01b98373, 0x4594385f, 0x2dceab59, 0xf0690368,
- 0x95c44885, 0x14c52e57, 0x9412d71d, 0x6b2eb5af,
- 0x7e17c99e, 0x443facdb, 0x47a5121a, 0x781825d6,
- 0xa7773fcf, 0x2bc971a5, 0xad314dbd, 0xda1f792a,
- 0x1cbe7bb5, 0x78c73ddf, 0xfb1084e6, 0x1520f3bf,
- 0xcbe64972, 0x6af27ff5, 0x78fa499c, 0x56e78809,
- 0xf157f62d, 0xd79cd556, 0xb3630d74, 0x0fe193f1,
- 0x3a525f15, 0xb8360770, 0xb9fc79eb, 0xc119c465,
- 0x9c4e6cea, 0x796ed2e0, 0x7ea5bf3a, 0xbbc96092,
- 0x7fab2abb, 0x51db14bb, 0x396fb289, 0x9bb1fe7f,
- 0xb78bc587, 0xa11e824a, 0x0e7ec7d0, 0x935ea888,
- 0xcd31816e, 0xe6ffad19, 0x25f4eefa, 0xcd85de99,
- 0xc4df9cf2, 0x325f2ba4, 0x30e92f74, 0x3228afaf,
- 0x1db42f19, 0x863d460c, 0x49f01598, 0x394dc72e,
- 0xf34c8102, 0x9bf324a7, 0x20bae348, 0x8ba1ef96,
- 0x7f83c9e1, 0xc872d3a2, 0xa2bf5a6b, 0x3ace9565,
- 0x93c1cfeb, 0x68da7bd0, 0xf66ffcc3, 0x7c615af3,
- 0x9d4a45f6, 0x7a767a88, 0x831963c6, 0x7da2017f,
- 0xb26a7c81, 0x763f4ca3, 0x3178f4d8, 0xfa65e5c2,
- 0xecfcd393, 0xfbe6c388, 0xa343179d, 0xd58f3c83,
- 0x7e2da10f, 0x53636d18, 0xed27af74, 0x6c576292,
- 0x374c90b4, 0x3bf07fe9, 0xa6519017, 0xe7e36ae7,
- 0x23cc0c0c, 0x86f11bb5, 0xe6faec68, 0x066d82d7,
- 0x0f74f757, 0xf4b15293, 0x80c69421, 0x77efed20,
- 0xbd25faf8, 0xd20be300, 0x03d66481, 0x99026974,
- 0x348674b6, 0xe745097e, 0x4cc1948f, 0x3901b58a,
- 0xba4cbe7b, 0xc7841132, 0x60eaeef6, 0xa21aee74,
- 0x471f2713, 0x4eedc729, 0xeb940a32, 0x9edb4cd7,
- 0x6ab917d6, 0x883a3380, 0x0cdaf1b1, 0x17c327b2,
- 0xed59beb2, 0x2817a78a, 0xad0fb637, 0x8af25604,
- 0x8377e0c9, 0x8153fcc6, 0x4dd06f5b, 0xc53460f8,
- 0x4613d1f8, 0x881ecb2b, 0x61635800, 0x3161f625,
- 0x2a514279, 0x3a979459, 0x80816f2e, 0xa43a2b79,
- 0xbe0b57d3, 0x88c380b9, 0xd6c1ba6b, 0xbb58c9c2,
- 0x0015479a, 0xa2d74dbb, 0xf6a12a17, 0x7f026911,
- 0x1b7b2c6e, 0x872776a2, 0xd229a1d7, 0xa8a18ad4,
- 0x92d4cae4, 0xed92ce50, 0x89c6940d, 0x532b136e,
- 0xd1d0a913, 0x768bc2b9, 0xa07c19a1, 0xd0114ab4,
- 0x3830fb81, 0xeefb1da4, 0xb82e25ff, 0x62dfe06c,
- 0x15171cd7, 0x3d0f7796, 0x36779b17, 0xec1bac6c,
- 0xa08ecfc7, 0x2a26390f, 0x11be1de5, 0x388c9834,
- 0xbb756fd5, 0x28a9ef0a, 0x82c55faf, 0x02106d73,
- 0xcfba07bc, 0xdfdae27f, 0x5189a7de, 0x1c0ed0b8,
- 0xb3cca2b2, 0x19054ab5, 0x49a89575, 0x9aeeb656,
- 0xc31b9b38, 0x954744f4, 0x8fc22bf6, 0xd8f39f19,
- 0xb7bd824d, 0xfafabb8e, 0x22e4d9b4, 0xdb0b426b,
- 0x661e1903, 0x36f24730, 0x14e23d23, 0x7d87c8cd,
- 0x9eb76c23, 0xe539b20f, 0x46ae2013, 0x76a59666,
- 0xbb2560c2, 0xc594b08b, 0xb050cc85, 0x467690fa,
- 0xa951958c, 0x1ffa21aa, 0x18c40d61, 0x39434b6c,
- 0x4b107901, 0x6256e70e, 0x70342211, 0xc552aa46,
- 0xda90d164, 0x9ca9210d, 0xaa32e33d, 0x211e3d00,
- 0x4e9b16c7, 0x186f92fa, 0xfd95c0a4, 0xea9bb1a9,
- 0x1d6288d3, 0x19d9277c, 0x8ee3a02f, 0x39457299,
- 0x6b8ea5d6, 0xebcc2af8, 0x3f1fb107, 0xf23e3e98,
- 0xa1c40be5, 0xc9459d51, 0xa48cf93c, 0x3571d2f9,
- 0x7c4dbf5a, 0xf77757c2, 0xaad01e4a, 0x970db9d9,
- 0x3ac71c1d, 0x78fad179, 0x4fb8bb3c, 0x70bba938,
- 0x83ede56f, 0x6161e971, 0x8d7c830d, 0x829bad0d,
- 0x0a21b8e6, 0x393d7463, 0x2c2076ab, 0xa74dd0e5,
- 0x94376e60, 0x1cd50531, 0x1aef6c72, 0x449868a7,
- 0x927ff54f, 0xbd5248f7, 0x32647753, 0xbaaa180c,
- 0xa2a45164, 0xdade9fd7, 0x6e4f3ee9, 0x42b79f19,
- 0x3fc2969a, 0x8d7b5000, 0x14fb647d, 0xb1c40e7e,
- 0x5488b76b, 0x74136e02, 0x351e40e2, 0x8306f650,
- 0xbdb35e09, 0xe561a0b2, 0xc0f53956, 0xd8d4590e,
- 0x410aa007, 0xc85562fb, 0x29bc516a, 0xf41ff6cb,
- 0x2368a2ec, 0x068684d3, 0xdfa5afff, 0x9b9c58df,
- 0xec1eb8db, 0x3a061b42, 0x8be5890a, 0x41900e66,
- 0xaa285397, 0xa068ea9c, 0xa193dcbe, 0x9f7ffb2e,
- 0x80aa5197, 0xe473d1c7, 0x801bccbc, 0xc435ef45,
- 0x582a76cb, 0x65283821, 0x8d4f1552, 0x4369a4b0,
- 0x6ffb58b6, 0x9d69709f, 0xc4989d21, 0x3c1ab5ff,
- 0xebad12db, 0xac330967, 0x3467f89f, 0x264f7e5c,
- 0x04be69ad, 0x4b3174d8, 0x3746242b, 0xc299d5b7,
- 0xc134a601, 0x7a9f5294, 0x4aecd319, 0x51154234,
- 0x0a5a7180, 0xadefbdb2, 0xfb3bf137, 0x55c839ad,
- 0x333ae081, 0xac7239b8, 0x96de5477, 0x3c562516,
- 0x819a43f7, 0xf0a93b64, 0x9017c9cf, 0xd90a96be,
- 0x956abd6b, 0xbe14d92d, 0xbff0b51d, 0x54bc4fbd,
- 0x7b582d3c, 0xd016ad18, 0xb9ea92e9, 0x404a1825,
- 0x96ad48c4, 0x01c30b60, 0xb71b764a, 0xc5e83022,
- 0x6bd6a3df, 0x99d752ed, 0xdba50160, 0x8ae6ae76,
- 0x974834b9, 0x7b43f985, 0x5930337a, 0x637da8a3,
- 0x498d3b46, 0xff545989, 0x636e4bbf, 0x36f5bd68,
- 0xab22e0e8, 0x5ba13795, 0x338b92bb, 0x8bfd201e,
- 0xd7cf5375, 0xe0f52c6b, 0x27811ca0, 0xa1420d9f,
- 0x6e594c9e, 0xc5f505a8, 0x08ffc79d, 0xed20c941,
- 0xb9428101, 0x064b4c52, 0x5eaadb2f, 0x1af0551f,
- 0x61f8af78, 0xf5e112f4, 0xb9e84b63, 0xcf725bb3,
- 0xa02a2e65, 0xc07babfa, 0x3f70eb00, 0x06d3f569,
- 0xc8284125, 0xa6619823, 0x729244b4, 0xd20ffaa6,
- 0x025af246, 0x2772f59c, 0xed130a74, 0x8d1ad807,
- 0x602f3466, 0x4c483502, 0xa984517c, 0xaf889784,
- 0x181f076c, 0xc2e7db4e, 0x21beddd1, 0x4f30741f,
- 0xf7569779, 0xec6d74bf, 0x8c6f878f, 0x28058e49,
- 0x3b6ae1fa, 0x016154a4, 0xd89b3eaf, 0x67893386,
- 0x4948c802, 0x72359f2d, 0xbd586e7c, 0xefade558,
- 0x66f5ebd7, 0x4d903956, 0xb7c7573a, 0x98bf67f0,
- 0xa9c6a6b5, 0x31652d15, 0xc71a8f90, 0x747cc66d,
- 0x0ca883d4, 0xb47a5b85, 0x7b3f7a41, 0x63655254,
- 0x61b86ffb, 0x85c20b37, 0xe2f8ac44, 0x2a23083e,
- 0xe611c93d, 0x542036b7, 0x3082a731, 0xdbc5fe01,
- 0xd7a03fe2, 0xfb351402, 0xaa21517b, 0x958a55b4,
- 0x868b20b2, 0xa9f4ff87, 0xaafde28e, 0x090917f7,
- 0x90fc5886, 0x89ffc27c, 0x135846c0, 0x5157ffff,
- 0xaddfe6e0, 0x420de05f, 0x4c4ff192, 0x501b2d8f,
- 0xeb0b326b, 0x57ab5ded, 0xdb1086e8, 0xab76fbe9,
- 0x170991f0, 0x3dbfe9f3, 0x1cc24909, 0xdb2e3aea,
- 0xff55a932, 0xfb9ea5c5, 0xb5d7ab5b, 0xd1f06c5f,
- 0x1f190a72, 0xbaa1792d, 0xe96c8d78, 0x575b58e6,
- 0x06d241bf, 0x8844c3bb, 0x4e3016b2, 0x32fd4d0e,
- 0x45f69dcd, 0x2d1ac976, 0xca23164a, 0xebf0d020,
- 0x01b45f50, 0xe387be3b, 0x10851359, 0xb0e532a0,
- 0xfdd14b4c, 0x06c09ba1, 0x6ff3fa57, 0x7bb3ae24,
- 0x392efe9d, 0x288291a3, 0x763fed12, 0x6878dc1a,
- 0x6f4bd552, 0x7eb83b3b, 0x38702104, 0x10a0cc2c,
- 0x327dfe3d, 0xab265a51, 0xa8ed1d06, 0x31ec5087,
- 0xdbae25da, 0x30006363, 0x6b3445fc, 0xc5a1ab21,
- 0x984990b4, 0x6b2e9d74, 0xd309190f, 0x62682a13,
- 0xceab4e75, 0x18065ca5, 0x7681d95c, 0xff3767b9,
- 0x7951b0d8, 0xa43d8e9c, 0xe3e2f297, 0xff2914b6,
- 0x9c93dcbb, 0xd961ec4a, 0x890eaf4f, 0xf4d16c4f,
- 0x82f4b510, 0x8c669bd9, 0x144fece7, 0xf6814ed7,
- 0xdef133cd, 0x9d4df9d0, 0x19f610c8, 0x7eccfbd8,
- 0xa70e28b6, 0x9129380d, 0x15b1c5db, 0xf0f0d86f,
- 0xe74153f5, 0x5313e291, 0x9bdcf917, 0xb775a537,
- 0x8850c86f, 0x96790a6d, 0x5e382798, 0x153d624f,
- 0xbf1211c9, 0xf39ba580, 0x6698bba9, 0x9d0b3816,
- 0xbcbfb5f8, 0xd4654d05, 0xae53ae6a, 0x409b5cb2,
- 0x8fbdcb5d, 0x9edbf86f, 0x2f8a1515, 0x0901c1cd,
- 0xed2de425, 0x68a3de2f, 0xcc3cbeb7, 0x65ca347b,
- 0x2927ad97, 0x18c232cd, 0x2a3bf2ed, 0x00346946,
- 0xca3d4eb8, 0xd571e640, 0xe77c0f5e, 0xe67a4ba9,
- 0xd1d535be, 0x0b210d76, 0x0956d69f, 0xa5da366e,
- 0x54266ae5, 0xf5411644, 0xfe133067, 0xf67f5fa6,
- 0xa90f5006, 0x9120820b, 0x1e85d6a1, 0xdf497a0b,
- 0x820f2b5c, 0xd19fe47e, 0x7a5ee8b4, 0x6f9c999d,
- 0xac580753, 0xbc7608d4, 0x78c48ee6, 0x7e39844a,
- 0x21df5f29, 0xea7dcffa, 0x9ce59f50, 0x8baec77b,
- 0xf758e8e7, 0x7e0a0568, 0x38058ec8, 0x9bcda57d,
- 0xff4af641, 0xe62cb5c4, 0x94a42d0f, 0x7808c674,
- 0x914e3f26, 0x9c7f08c6, 0x89b0fae3, 0x61f9152e,
- 0x36424903, 0xda042fa9, 0x0481c199, 0x06d71286,
- 0xa4aeac50, 0xc0bd99d4, 0xa6e2cb34, 0xc4e5cfc9,
- 0xc6ca7c48, 0xb7616475, 0x365449dd, 0x79d9d5ad,
- 0x24329b9a, 0x65e7095b, 0xaa3e336d, 0x06749e1f,
- 0x04a5963c, 0xe507cd8f, 0xd278050c, 0x7360cecd,
- 0x2c4abfa4, 0x0b612f7d, 0xb655108b, 0xdb3bb735,
- 0xc0fdb880, 0x34b3e5c5, 0xc2952b93, 0xc99b3aa7,
- 0xe7051d39, 0xe3344f7b, 0x31241fe5, 0x8c958ee5,
- 0xdde4cc87, 0x880130f3, 0xfd28d5b3, 0xb15d852b,
- 0x83d7cb4a, 0x7bf26fc0, 0x2d9e3c36, 0xab0304f3,
- 0x435c930b, 0xc5ebc70d, 0x08416b31, 0x89acdfeb,
- 0x12c9e83e, 0xaa05968c, 0x9e5a67d8, 0x3bac1b48,
- 0x5d32c0ab, 0x330309a8, 0x4b99deaa, 0x8f1ecd35,
- 0x80d1d798, 0x6707bf8f, 0x25bb560c, 0xb9145b28,
- 0x47e43b2e, 0x9dea75b6, 0x95fe6f30, 0x9fb167b7,
- 0x7aef02dd, 0xabf4b3d1, 0x98d09d41, 0x62031949,
- 0x1ed7a5d2, 0x3a9a8588, 0x17f98a61, 0x4709c106,
- 0x4f176243, 0x38231698, 0x45351109, 0xe1a1fe25,
- 0xa20ec597, 0xf82f221c, 0xa2bd42c1, 0x774e0012,
- 0xc33a0a5b, 0xd05da439, 0xdfd64aa2, 0x2f548ef4,
- 0x56ab9995, 0x2b7a856f, 0xd403cc27, 0x80ccd469,
- 0x44b4868c, 0x642f9dbd, 0x5ceab8c0, 0xa4066663,
- 0x6889d201, 0x13df6b3f, 0x483b67e1, 0x5af914cb,
- 0x136c2bc2, 0x916dbd9a, 0xb510adb8, 0xe2144042,
- 0xb657206b, 0xd528fb40, 0xa5de9ecf, 0xb72a58d5,
- 0xff8ddfd2, 0xf5d5192d, 0xabbd5164, 0xf17238ad,
- 0xda3417df, 0xc76d7271, 0x1eb6138c, 0xfb7bd846,
- 0xa3b8c4f0, 0x3e91b6e1, 0x4de3ea12, 0x3198bebf,
- 0xe57471e5, 0x1861ff72, 0x102c0ed3, 0xb303d5fd,
- 0x6e5e307b, 0x5d90e1e1, 0x3e880a5e, 0xc308cd29,
- 0x58785225, 0xa706f09a, 0x9954d5f4, 0xb2d05edb,
- 0x836a8223, 0xf0209294, 0xca8dff3d, 0x663e840e,
- 0x97a9d7f7, 0x197978c3, 0xb96a6943, 0x47649766,
- 0x9f3c9f85, 0x4678ed6c, 0xd359a4f7, 0x20d56684,
- 0xccf6f6ce, 0xa420d806, 0x0203bf82, 0x93d31115,
- 0x90e9f008, 0xcaa788eb, 0xda2a558c, 0xbe0ded55,
- 0xc987b6c8, 0x471b16d6, 0x3cec879b, 0xaf4fe676,
- 0x559afe9b, 0x27e3b79a, 0x5be24aef, 0x8b085772,
- 0x9e147677, 0x0de2cc8a, 0x23a132f8, 0x31ee16c5,
- 0x86c707ca, 0x1db85924, 0x0d0c0e14, 0x5db87d36,
- 0x4cabff3b, 0x6d947820, 0x0ff434c9, 0xc5c5760d,
- 0x2a88448d, 0xcdf0b1c6, 0xb3d86c54, 0x80ae749c,
- 0x49410a98, 0x1851caf8, 0x6350e1a0, 0x504c1297,
- 0x09a88652, 0xf3506173, 0xb85689a4, 0x5a799576,
- 0xbf0c2ce0, 0xf0d5538a, 0x28f214f7, 0x8643b5df,
- 0x20819c7d, 0x71cd2bb7, 0xbdb27657, 0x72dd4ed4,
- 0xc84545c2, 0x9a08eaee, 0x16326fce, 0x2d4342c2,
- 0xab008c9c, 0x00204ceb, 0xa993c9ef, 0xb7c3c076,
- 0x75218534, 0xb14eb69d, 0xf718cccf, 0xb81e5e67,
- 0xff55fc53, 0x970bbbad, 0xda2f1a45, 0x256f333d,
- 0x1ff0f5a8, 0x2eb661a5, 0x0337ef90, 0x57e1656e,
- 0x4a9b07ee, 0xacf54f2e, 0x9717abea, 0xb5bb714c,
- 0x1792f7a6, 0x81cdd7e8, 0x62a12406, 0x761f99f7,
- 0x072a3a97, 0xe22bd93e, 0xf100ec03, 0xc8e0a791,
- 0x361145f7, 0x36e15247, 0x2ee9386a, 0x1d439e0d,
- 0xea8b8df7, 0x674afbe1, 0xe33b5da1, 0x23690868,
- 0x9fd72a8c, 0xf7dd3c7a, 0xed75f0e8, 0xaf8c3031,
- 0x198afbff, 0x92010eba, 0x7748e906, 0xdd8844cc,
- 0x00affff6, 0x24d46ac1, 0x90df95f0, 0xdd0c2aa4,
- 0xce2104aa, 0xe23e4620, 0x142b9215, 0x769d8186,
- 0x6ec121a8, 0xdd309c46, 0x7fb0b89b, 0x8016afdc,
- 0xf3708954, 0xce3d39be, 0x52476650, 0x9e827030,
- 0x0ca77a29, 0x7df3a31e, 0x4fca9715, 0xc59ad4a2,
- 0xbb26442d, 0x3f8a3cce, 0x81e09ea3, 0x94919687,
- 0x958c6a31, 0x06508982, 0x32988dab, 0x3a276ce9,
- 0x0208f157, 0xcf8367d3, 0x163ba3bf, 0x17159607,
- 0xf265d581, 0xaad84b54, 0x63a9365d, 0x80af00dc,
- 0x257f8001, 0x772dfd0d, 0x367eecf1, 0xdaa6aa96,
- 0x0f6a5c10, 0xd5acf51d, 0x7872c2e5, 0x79708bf6,
- 0xc40f652b, 0xf62bc7ca, 0x22952a96, 0x5cffcdfa,
- 0xfab55a3f, 0xcf5256b9, 0x27de0e02, 0xdace9547,
- 0x92db78cf, 0xfa005e20, 0x3ec98153, 0x1647c3e5,
- 0xe386397a, 0x039b0510, 0xb02c2fee, 0x0428ecb9,
- 0x7e889fff, 0xc39d8bf9, 0xadfacddc, 0x64f2ca0b,
- 0xa82acc83, 0xbacf9264, 0x656e28d5, 0x53014b7b,
- 0x014a593c, 0x43ae7d08, 0x4e5e660f, 0x6b548f42,
- 0xbd1c298c, 0xfae46cb0, 0xb2983391, 0x5461c49e,
- 0xc4d0be21, 0xae949561, 0xe719d444, 0xb9e88874,
- 0xae19b604, 0xc8df3646, 0x1354ab60, 0xe47f58ab,
- 0x4f827aac, 0x83344c8c, 0xc0233ae0, 0x2118c6ec,
- 0x93e3f597, 0x1b5b0281, 0x0ddc480f, 0xfb7c17b6,
- 0x6fad8d4e, 0x1dae9191, 0x09d78e21, 0x53ca75ee,
- 0xb9c4f84d, 0x610154ce, 0x7f113f51, 0x33332eff,
- 0x2e8bf6ed, 0x9a960f02, 0xf4287ef4, 0x494b8b99,
- 0x8bd01fe5, 0xe0baa3b7, 0x39cd90ff, 0x12fd7ef8,
- 0xf41687dd, 0x62bff535, 0x7e8b1b36, 0x0bda14b7,
- 0x7d179fce, 0x9faf161d, 0x03b14666, 0xb356ecb0,
- 0x3f2b190d, 0x38846643, 0xb9a3442a, 0x4c56f86a,
- 0x05ad857a, 0x54789c95, 0x3ad47233, 0x392744bc,
- 0x0b7f7d75, 0x28a7ed56, 0x15a84f5a, 0x1b02dfc6,
- 0xbc8df094, 0x82690988, 0x7a390885, 0xa1bbe4a9,
- 0xdc71d353, 0x6d26f0e0, 0x86660dd5, 0x23248a1c,
- 0xb1517a0c, 0xd9d8d09f, 0x63fc6034, 0x65b2e78c,
- 0xf9633cf0, 0x97db9ebb, 0x7b9aaafd, 0x351328d8,
- 0x8c9d13b8, 0x78b7a2b0, 0xfd60f60b, 0xf98e9794,
- 0x159071ab, 0x85c5654c, 0x9fb0bf2d, 0xf870e501,
- 0x52474957, 0xe2f03cc7, 0x9f966cc9, 0x390a72a3,
- 0x5096b069, 0xd616565e, 0xcc98c4cf, 0x84998bed,
- 0xe76237ef, 0xa7be56ab, 0x8a050904, 0x2eedcd6d,
- 0x033a7054, 0x95a0eecd, 0xc952457a, 0x490e57ff,
- 0x0a93414f, 0x7ee5be6b, 0x31b637d6, 0xa4a09d0e,
- 0x00cd2ed0, 0x9a106b5e, 0xb56d3501, 0xf4fea131,
- 0xa05f6692, 0x50a4d745, 0x53aefb25, 0xefa92b0d,
- 0x81513e81, 0x2d1bb9cc, 0x664d4f1e, 0x9a4314a4,
- 0xeaca641d, 0xa91ad134, 0xadf4747a, 0x143b7cd3,
- 0x7dad81ce, 0xf5f9e604, 0x79853b12, 0x69789d1e,
- 0x30428e5e, 0xca324ec5, 0x0fcc78e5, 0xc53e6fca,
- 0x4d35b7b3, 0x3197723e, 0x6875a6d3, 0xd4e337b0,
- 0x306810cf, 0xeb665343, 0x7a87f334, 0x54b48e76,
- 0xbcca9639, 0x97015ef7, 0xf7489ffb, 0x51137556,
- 0x3a00e23a, 0x1601a20a, 0xa56142e9, 0xcf3f6686,
- 0xe011d298, 0x12040cce, 0xc35370a9, 0xf0334d1c,
- 0xf3ad5d2c, 0x0e8b90f9, 0xa3e960c4, 0x4594364c,
- 0xb2c67fab, 0xb9fde2ea, 0x14c177c0, 0xff37d1d1,
- 0x9caff287, 0x9ff37fec, 0x65ddd0e0, 0xa3af5640,
- 0xe58b14af, 0x20eb11f2, 0x92bbee51, 0xea08071f,
- 0xa7307967, 0x40c64879, 0xcd048a82, 0xc67bcb55,
- 0x796d61d0, 0x2f64447c, 0x363bfe30, 0x9471cc2d,
- 0xffc9abdc, 0xadd4ae51, 0x69f84501, 0xa00f2dd8,
- 0x41ba0692, 0x086ae228, 0x399c227a, 0xf5857bb9,
- 0x81c407e6, 0xfb89d225, 0xbe135bda, 0x4628c85e,
- 0x16075b1e, 0xbd4e9bff, 0x10d56cf4, 0x7b8324ad,
- 0x107bc662, 0x145a6ac4, 0xbb843ce2, 0xc3b2ee37,
- 0x32e46fdd, 0xebfbff21, 0xf7f879ef, 0xe9120cf8,
- 0x07a8692b, 0xdb3178f9, 0x252ab16e, 0xa1a18aae,
- 0x5ffd978c, 0x0c930ad0, 0xb9c5ab5c, 0xf313f14a,
- 0x0a263adf, 0x4a9e5ce5, 0x200cbf81, 0x51760e33,
- 0xdc46fc9b, 0xbc4074f8, 0x457c18fe, 0xa4b32e67,
- 0x6b1ddef7, 0xc7a43160, 0x7401a555, 0x121ff4af,
- 0xd570ca26, 0x96834b82, 0x22708c95, 0xe03ca738,
- 0x0dbe1c49, 0x3ddadd32, 0x7ccc33ff, 0xe6901061,
- 0xb1d60fdc, 0x0da12ead, 0x6b127930, 0xa8a1b7a6,
- 0x5874d1b0, 0x4dc510a8, 0x10ccdaca, 0xc6261fd7,
- 0x9a1f640d, 0x0830fb74, 0x88d32e04, 0xa423cb97,
- 0xab47c146, 0x9622a2aa, 0x645cb863, 0xdee11ddf,
- 0xa86e42bd, 0xf9abfe02, 0xe90a884e, 0xd8f7c9e3,
- 0x0e00e7ac, 0x974bd00b, 0x2ae3ae6f, 0xb3769668,
- 0x12af4a65, 0x8168fcb9, 0xd2347009, 0x6eb7cb98,
- 0x3d7ded18, 0xa992905b, 0xcc639b5b, 0x070f435c,
- 0xd7975257, 0x9a14b13d, 0x60a83c28, 0x3f75d649,
- 0x8e4c0293, 0x36fae022, 0x016f50c6, 0xd1a11a06,
- 0x37565aec, 0xf013fdf4, 0x573f3c06, 0x6143253c,
- 0xe476aa9d, 0x5fb1f168, 0xdb947737, 0x8ecb1d59,
- 0x078034ec, 0x34de29ba, 0xa6355e48, 0x26d200dd,
- 0x5ed91fa4, 0xfe209ec2, 0xf07f0e96, 0x0c85decd,
- 0xdc4826aa, 0xbcd6160e, 0x58fae767, 0x3abc4cb7,
- 0x3e53766c, 0x454f65e6, 0x8e6d022b, 0xcd19b787,
- 0x290f55af, 0x1fd62d64, 0x8acd2656, 0xca329872,
- 0xec09529a, 0x532ea97c, 0x83779692, 0x2330688b,
- 0x83e13072, 0x7da1462b, 0x629bed72, 0xd553318c,
- 0xa5274b10, 0x5251883a, 0xbca83ba4, 0x66f4380e,
- 0xc6bf0e55, 0xb4f7af61, 0x2e22487a, 0xf9b51c4b,
- 0x4edb1462, 0x254d1810, 0x6855fdff, 0xbf652c08,
- 0xb475e20d, 0x49d2b19d, 0x75869421, 0x342a175a,
- 0x4911a63b, 0xfecb43c8, 0xa173e5f6, 0x599ea60a,
- 0xad383364, 0x4b414fd1, 0xc73cd9f0, 0xc1bae2b2,
- 0xff3421ee, 0x0ef8dcd2, 0x516a1b2f, 0xb35d9270,
- 0x78fad230, 0x64753c9d, 0x4ee0c049, 0x3efae84f,
- 0x332a450f, 0x5df8fe97, 0x697565d6, 0x5ef8c9b1,
- 0xa6fbae64, 0x128ac0e1, 0xf95129a6, 0x1cf53bcd,
- 0x04435183, 0xb058ca3f, 0x1a3a086e, 0x9562c50f,
- 0x8c90e9ea, 0xa0df4f23, 0x5334155b, 0x16c62826,
- 0x680f3213, 0xecd3e8f7, 0xb3836f13, 0xfbb84b82,
- 0x3e45ca63, 0x39ce4c83, 0x39bc92e7, 0xa1a067a5,
- 0x9dc60770, 0x9b32e09f, 0x78a7cb2b, 0xcd1f68ef,
- 0x8cdd261d, 0xa88f0fac, 0xb3ce9949, 0x83471661,
- 0x33383459, 0x44246d99, 0xcc9c4fcc, 0x1f8d89ed,
- 0xbc75b0b6, 0xd15b7a15, 0x0516ab7f, 0xecf3553d,
- 0x64ab1dfb, 0x431ec543, 0x35d4ffdd, 0xbe1d1dce,
- 0x3cec9a68, 0xc9f5fe6b, 0x48f216ad, 0x21d5458c,
- 0xb4e89c33, 0xdf6fc2a1, 0x75a82ce8, 0x9772d2b8,
- 0x50f0ee84, 0xf89dd66c, 0x1af93b95, 0xc82bdb01,
- 0x4241204a, 0x38a0852a, 0x83a563e2, 0xcc579e3f,
- 0x64c3ff4a, 0x55a489db, 0x09f3e441, 0x47e6f47c,
- 0x0ebc9ed3, 0x65a93ed6, 0xbd282038, 0x3a84f7ca,
- 0xe9aea1cb, 0xba382a96, 0x0b7f4464, 0x82c2da22,
- 0x08cd24d7, 0x1f7c415b, 0x08592b5b, 0x1fd07e86,
- 0x866322ef, 0x0c13e720, 0xab129b1f, 0xad307bb0,
- 0x9dd275dd, 0x4736eb09, 0x56472906, 0xa06de3ef,
- 0x051f600d, 0x788bf911, 0xe84b13c8, 0xc69eb604,
- 0x2a7ef36d, 0x35930deb, 0x277db8f7, 0x324b23ff,
- 0xc99f7ddc, 0x022fb9e0, 0x376faa11, 0x880d3142,
- 0xe0364be6, 0x3d736920, 0xfe801b4c, 0xc79e26b6,
- 0xb15bc802, 0x7a203cc6, 0x2e41cee3, 0xaf4ecc90,
- 0xf00b3388, 0x472e4cba, 0xf5c5fa9e, 0x499282ea,
- 0xae3c37d4, 0x9c4dc51d, 0x4447b018, 0x96f3c04e,
- 0xdbf895ad, 0x78277314, 0xc8322681, 0x4799a312,
- 0xa1f59724, 0xcdbd0a94, 0xaf0e344b, 0xfce052bb,
- 0xdebb9269, 0x5b708031, 0xa6dd155f, 0x28a8e97e,
- 0x47a4d35d, 0xbca41db8, 0xd44e8c89, 0x8ea4cfd4,
- 0x2087643e, 0x5c5361a0, 0x19d5b038, 0xe1a44e71,
- 0xbaaa5865, 0x32985d2e, 0xb30cb132, 0x8346f712,
- 0x72122d8a, 0x9da8fe8b, 0x8ad3b0b9, 0xb86020c6,
- 0x96076c4d, 0xaf15e5dd, 0x4eb7694e, 0xcb66e0f9,
- 0xc0cc7811, 0x9f62498c, 0xf7628eb1, 0xb40f5782,
- 0xe3909967, 0x5268c0ea, 0x5ed85a84, 0xeddcfc66,
- 0x2aab8bcc, 0x67d9cc4c, 0xdad309a9, 0x4fb8f216,
- 0x87b670ff, 0x8046968e, 0x1005493e, 0x7aff15cc,
- 0x18a3b0ff, 0x275e0830, 0xe794620c, 0x84ff92f0,
- 0xefe38a1e, 0x5f13f4d9, 0x5b65eb4e, 0x0e3b130b,
- 0x28c7a40d, 0xd2e79e8a, 0xa979057b, 0x865238ac,
- 0x11c29a5c, 0x9c4a67b0, 0x3a4033e5, 0x5cd9ce4d,
- 0x446f5f03, 0x3eb976ec, 0x0db06dfb, 0x7d91aba4,
- 0xfe5a51ae, 0xaa1fc1aa, 0x84faba78, 0x74e7675a,
- 0xb8b6c3d2, 0x2bf10867, 0x372e7c86, 0xe41e6e82,
- 0xa4a14b4b, 0xccd7934d, 0x9dfd2ab8, 0xf85e71fa,
- 0x0b03de17, 0xab711a2e, 0x0c3667b5, 0xc1168ffd,
- 0x8f136051, 0x404a38d9, 0x4b1c5b34, 0xea938905,
- 0xd7e8ca3f, 0x76e7c24d, 0xd12d7b32, 0x83d3d1e7,
- 0xcbdf10fa, 0x56c9a35b, 0x487ddb54, 0x2625fb37,
- 0x58115a05, 0xd7ba9677, 0x32485abd, 0x7f1cf033,
- 0x1363fcf5, 0x498429a7, 0xcee7b643, 0x4a143dfd,
- 0xc7277108, 0x540a1db1, 0x8f382d79, 0xe6d57a47,
- 0x7573ff7c, 0xab24a417, 0x038c794e, 0x3d554bae,
- 0x7701c302, 0x7503f382, 0xd78eb998, 0x981f748f,
- 0x8674777e, 0x50d1d36a, 0x720d2a1c, 0x5a73a23e,
- 0x6c11d5d5, 0x5a50129d, 0xb102a470, 0xa7725c61,
- 0x50367f63, 0xb40cb199, 0x36e40d6a, 0x351e6215,
- 0x844a1961, 0xd7e04ed3, 0x840dd7fd, 0x6d1cca8a,
- 0x8e87c6fa, 0x71577bfa, 0x0f332230, 0xee23eda7,
- 0x693f76e9, 0x3c8ed3c4, 0x6a72fca5, 0x91bc7dde,
- 0x8353ad65, 0x7fd77a7f, 0xc9fb1685, 0x63d52396,
- 0xc58586cf, 0x1513f259, 0xd0b1b6c1, 0x50ccee15,
- 0x4bf40990, 0xd78a2a7a, 0x4e356a76, 0x9db0a659,
- 0x8472ca4c, 0xc74eeff6, 0xe5548c38, 0x4ca3343d,
- 0xa380a749, 0xfcbba8c7, 0xec8b5df2, 0xf290a3f6,
- 0xda4fc91c, 0x4e037ff3, 0x369ee32b, 0x1e4f0d76,
- 0xe771cddf, 0x165aed55, 0x28b0b90b, 0x67d033e5,
- 0xbd763f03, 0x5bd5e38e, 0x4295e5a3, 0xa293db4f,
- 0x5f607ab4, 0x5322a0d0, 0xc94c8c94, 0xeceded4d,
- 0x73785c71, 0x17e0bf88, 0x7f5c0911, 0x98d8710f,
- 0x567d8325, 0x4761278a, 0xb8f49fd0, 0x22ae4f2c,
- 0x5b913027, 0x31da1fbb, 0xa859ccd5, 0xf628dcd8,
- 0x0c08f212, 0x757dd74a, 0xa3483622, 0xa4afab73,
- 0xf85495fc, 0x79aeba4c, 0xf760fedf, 0x37e9980a,
- 0x70afa8a8, 0x771fccd3, 0xabe409ae, 0xa3caf014,
- 0xc61bb263, 0xdf6f080a, 0xa1b1a7a1, 0xd4cb1433,
- 0x772173b1, 0x127e2a84, 0x6078ed37, 0xe9ae0d72,
- 0x068deb2e, 0x538509b0, 0x3745ca8c, 0x80411c2a,
- 0xdc0af1f1, 0xbf1bd266, 0xddb1e7da, 0xe58b0f03,
- 0x8cf24e18, 0xb082104a, 0x3f3bf7f5, 0xbc52c82b,
- 0x7c289318, 0x91621c7e, 0x61ba7282, 0xe057ef2a,
- 0x2c7490ec, 0x636ed4f9, 0xef4ee885, 0xc2102cd3,
- 0x03b096fa, 0xa721a20f, 0xe2e2de9b, 0xdf99ee9c,
- 0x63e87140, 0x98f04a3b, 0x998a1415, 0x47d425d5,
- 0x81e18b1e, 0xfd75cd73, 0xda911e2f, 0xa131759c,
- 0xe609c123, 0x8bcf7251, 0xa062ca69, 0xf1254c75,
- 0xca0c3afa, 0x2b620162, 0x8f05cdc7, 0xf5e35e5d,
- 0x694d0ada, 0x9c30edcd, 0x91fcd15b, 0x7c4da71f,
- 0x8133bb65, 0x60c41108, 0xc8fe6ebe, 0x24baed41,
- 0x327b23e2, 0x3823edbd, 0x77a223e9, 0xeb2d7390,
- 0x16068273, 0xe63bfd53, 0x0f29df30, 0x27d62905,
- 0xf0ac1652, 0xe6f5f20d, 0xfee7aab7, 0x6e6aa877,
- 0xb61f6c21, 0xca0b9dde, 0x16b8384c, 0x8eab3c80,
- 0x0de85346, 0x3d3d32e5, 0x58663398, 0x0b0b33e9,
- 0xd154d1f5, 0x5c747425, 0xe4228b0b, 0x856dcb01,
- 0xa716d47f, 0x805c4ca7, 0x1d815217, 0xd8a0cf3f,
- 0x42f34017, 0xba088929, 0x80a2cd8a, 0x517ffe63,
- 0x20aa7c69, 0xa72d7746, 0x165e2f6a, 0x93e5568d,
- 0xf8f31ded, 0xd1598f8a, 0x2fda6076, 0xa31b5c80,
- 0x8d43b7f2, 0x7d2375c1, 0x2a00e4b7, 0x1040cf38,
- 0x264e88d7, 0xc8abe360, 0xdfe13c3e, 0x3b750fb9,
- 0x406183c3, 0x78bc2427, 0x334b01d1, 0xc26cad7a,
- 0x88b72b50, 0x1bc1d63c, 0x32810eca, 0x80f6a523,
- 0xa141a57f, 0x32ce732c, 0x68556d26, 0x72a0dc26,
- 0xdd25e4c0, 0xa61f2404, 0xe1592e10, 0x4698acc1,
- 0x7d80e659, 0x0913ddf7, 0xda82f04b, 0xb788cd43,
- 0x3de72856, 0x8bc444d2, 0x1d3dc87b, 0x2380fbc0,
- 0x434fd2d0, 0xa37cc127, 0xa5806f48, 0x2bbd90ae,
- 0x0c4d4ebe, 0x6a9306ba, 0xac3254d9, 0xd7cefc84,
- 0xc98c0ca7, 0xea8bb1c6, 0x16851fe0, 0x02c28a65,
- 0x76324463, 0xac6c62c3, 0x9bb2ce0d, 0xe7f220ba,
- 0x59a250af, 0xf432731f, 0x555c8843, 0xb0fbdbf5,
- 0xc4f37431, 0x64d68150, 0xb9da0993, 0x9321efd2,
- 0x67e301bf, 0xf6c6ea44, 0x3092635a, 0xd1ebed53,
- 0x02115815, 0x22815a78, 0x74c011ea, 0x303b0004,
- 0x317bc945, 0x79fffdb5, 0x0f5aed16, 0xaf6eabb2,
- 0x93624d52, 0x8d9cdf73, 0xd5656d1a, 0xbc7a2d44,
- 0x880f264f, 0x1db87830, 0x2db5e687, 0x89d6bac3,
- 0x7d3e0955, 0xb3b5db9f, 0x0d9405b8, 0x22f818be,
- 0x292e26fd, 0xb461ebc9, 0xa6b5ddab, 0xa6e4f23e,
- 0x2a088cfb, 0x9fc5b8d6, 0x59b210a7, 0x1498dd36,
- 0xe4e9feaf, 0x1a47f3b7, 0xfc5693bb, 0x52076044,
- 0xe2074937, 0x9762fcfa, 0x0700fd20, 0xc324f305,
- 0x3a7e03a2, 0xc766ab10, 0xa17541e4, 0xbce64eaa,
- 0xe68c5ae4, 0x5bf60a02, 0xf89f055e, 0xf13ccc98,
- 0x969b0106, 0x22191c6d, 0x8d2e0add, 0x33738386,
- 0xd3363e1a, 0xf2e5e217, 0x6bf72eb3, 0xa2159955,
- 0x322bc2f9, 0xdce59e07, 0x1a403d7a, 0xd40da160,
- 0xce583705, 0x705b002e, 0x53e38536, 0x0b46b6f4,
- 0xc889d7c7, 0xf282eac8, 0x864fc78f, 0x2de9689f,
- 0xed001e5a, 0xdafae8d0, 0xc3407619, 0x2ae6a6ea,
- 0x69713a02, 0x7bb17fcc, 0xfec1da98, 0xa607c8e6,
- 0x99e36005, 0x11e5b59f, 0x8ec18208, 0xf067d7f4,
- 0xe8a608b5, 0x26207dd2, 0xc7cb8146, 0xbaf6d7ad,
- 0xf47df435, 0xc54522c7, 0x748a8b8e, 0x99e794eb,
- 0xf2bf9683, 0x52f62b6c, 0x82b46215, 0x572d1d5e,
- 0x04c0f1df, 0xe6509ba2, 0x970a88ff, 0x152fc27f,
- 0xb93c6389, 0x0146abd0, 0x871834e7, 0x5eb57bc0,
- 0xaa0aeb71, 0xa52b0f4c, 0x241780a7, 0x64793af4,
- 0x5aaf4d43, 0x3cdbee68, 0x3dca4e19, 0xbaeebf0b,
- 0x320a8567, 0xe11a3bd2, 0x9b1d91a6, 0x810d70ce,
- 0xd1283978, 0x0d125cae, 0xb013fa71, 0x2bc20620,
- 0x3d5d2ff7, 0xde44d71c, 0x7fc69f0d, 0x4ad2e8af,
- 0x2f14b582, 0x6853bf2b, 0x68919517, 0x9d5f6509,
- 0xd9fab7ca, 0x7a6ce651, 0x8f982024, 0xb5547784,
- 0xae74490a, 0x714065fa, 0x405372cc, 0x3a58a46f,
- 0xe78230ca, 0x55cef9c0, 0xdbcad2d7, 0x962ea979,
- 0x33832922, 0x9673c257, 0xe2a54fc7, 0x758afe4a,
- 0x697c69cf, 0x1d03764f, 0x3c472146, 0x11bf0aad,
- 0x07d02cc8, 0x61d2ba2b, 0x1c8b3139, 0xa8e1b0dc,
- 0x2c90ea31, 0x6103556e, 0xd0e94b78, 0xe3314ab1,
- 0xd2cf23ca, 0x04763ea4, 0x4cffeb72, 0x25ec80ed,
- 0x63aaba43, 0xaa340488, 0x85e9a636, 0xfcdd73c1,
- 0x14ddf111, 0xec29eec7, 0x8acfbdae, 0xd545844c,
- 0x222077aa, 0xb3914d02, 0xd0828004, 0x3dfbaecb,
- 0xa9b3094b, 0xef71cf12, 0x553fb47d, 0xc1d0cd93,
- 0xd7ba76a0, 0xfae66db4, 0x18c47d41, 0x3aa84d32,
- 0x175836ff, 0xdd3c5f15, 0xe45bc3da, 0x2cc8d22f,
- 0x33bcf111, 0x1318ceed, 0x859f7c6d, 0x5346115c,
- 0xae7ac501, 0x7d10961b, 0x6df6c9e1, 0x07a9a3ae,
- 0x13e284a8, 0x658ef9f8, 0x20245391, 0x9822ef01,
- 0xc1457049, 0x4cdb8fce, 0xf466eb27, 0xf0e3554f,
- 0x644780ba, 0x4fa1bd26, 0x82f5f7c9, 0x367fbc36,
- 0x75aac234, 0x8950f1e4, 0x73eef9b8, 0x106b26d4,
- 0x154ac50f, 0xc928a55a, 0x8aecdff8, 0x6bea8c50,
- 0xf819b422, 0x4dde53cf, 0x83e2d7bb, 0x711b4da1,
- 0x8c63329c, 0x0117361e, 0xbdf6b395, 0x3ce2ad71,
- 0x13afbd7d, 0xd9363170, 0xc07606b5, 0xb3e57512,
- 0x34eeef15, 0x9d308933, 0x5d1f96ab, 0x6bdc81f3,
- 0x74e0ad20, 0x436731ce, 0x924dd479, 0x39e04f1d,
- 0x15e3fc6c, 0x89c73eb1, 0x56d7a3f1, 0x6d90ae82,
- 0x1b85ef26, 0x328fcad2, 0x28acd6ad, 0x221ece3b,
- 0x918ee52d, 0x869de6a0, 0x8e67660a, 0x57a65605,
- 0xc16e2019, 0x5b1a8b07, 0xbb76a606, 0xb864e189,
- 0xb42f7ec3, 0xddd14d1a, 0x2d9b60ea, 0x06ab5c4a,
- 0x3a5f0e8a, 0xd8a2925f, 0x69c60a15, 0x31aacc3d,
- 0xb696029e, 0xf1db51f3, 0xf5a2fc5c, 0xf865e873,
- 0x12838c07, 0xac5402f5, 0x4a4d06c9, 0xd376714f,
- 0x99afff3e, 0x8faa34e1, 0xc41d60b4, 0x9771a02b,
- 0xf054ae7b, 0xedf372df, 0x825d7c86, 0xe3072c73,
- 0x0005e224, 0x31c57f28, 0xc16a1696, 0xf53e5497,
- 0x7ef862ed, 0x7c6aa7fa, 0x78a74bed, 0xf95a114e,
- 0xaa361ba1, 0xa191f3cf, 0xed1a7af2, 0x2f551a17,

soc/intel/broadwell/microcode-MC0306D3_FFFF0010.h

diff --git a/soc/intel/broadwell/microcode-MC0306D3_FFFF0010.h b/soc/intel/broadwell/microcode-MC0306D3_FFFF0010.h
deleted file mode 100644
index 2b954af..0000000
--- a/soc/intel/broadwell/microcode-MC0306D3_FFFF0010.h
+++ /dev/null
@@ -1,1088 +0,0 @@
- 0x00000001, 0xffff0010, 0x07022014, 0x000306d3,
- 0x6a251c3a, 0x00000001, 0x000000c0, 0x000043d0,
- 0x00004400, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x000000a1, 0x00020001, 0xffff0010,
- 0x00000000, 0x00001061, 0x20140702, 0x00001061,
- 0x00000001, 0x000306d3, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x10d33c84, 0x5135f3ea, 0xaad3b9ce, 0x370732ff,
- 0xb3187746, 0x9ac2b4e1, 0x5b38db95, 0xfb09ed26,
- 0xe1d4113f, 0xc3085503, 0x1367060c, 0x9bf7efea,
- 0x2b756eb6, 0x2ee07b69, 0x7cfd1dc4, 0x9811c8b2,
- 0x86cf4036, 0x20534caf, 0x37046580, 0x432b4e6c,
- 0x6a3a2e54, 0x88a74dfc, 0x81a503f6, 0x67736b51,
- 0xbc2b11b7, 0xbcf3adc9, 0x96c8eefe, 0x688bcc49,
- 0x16c4f996, 0xe0175cd2, 0x454d7a58, 0xa67afd13,
- 0x098d9e42, 0xf86d2ec2, 0x738a67a6, 0x26c4ad17,
- 0x08666776, 0x050d971d, 0x68998a7c, 0x21ac9cf9,
- 0x29e27b61, 0xd61cfd7d, 0x3500ff83, 0xd4123687,
- 0x27b72496, 0xe9b867f6, 0x62920d71, 0xe159dd34,
- 0x3991c6ba, 0x367a5719, 0x7af5e9df, 0x5cb9fd11,
- 0xf5988469, 0x4153f210, 0x24b194a9, 0x8c563988,
- 0xac5bfd38, 0xd271e693, 0x16e9b292, 0x0c6583d0,
- 0xd2501a4f, 0x9896af00, 0x6665aa9f, 0x0f3a8de9,
- 0xc8f0db5f, 0x60b7a546, 0xe3a52963, 0x0ea3eb39,
- 0x0d8c08ab, 0x2f5faa26, 0x1d3cbd56, 0xa8596256,
- 0x00000011, 0x55ccefcd, 0xadcfd53d, 0xa8b54e10,
- 0x43ce01b2, 0xcddf2a5a, 0x1b3de1b2, 0x024efb41,
- 0x7815f12a, 0x77bd8a6a, 0x3b853e85, 0x0a2cb8d2,
- 0xdf5d38d3, 0xbf01f605, 0x0b6f6cf2, 0xa5400746,
- 0x938f8e2c, 0x511d7d89, 0xe2aa03ba, 0xc2ab558d,
- 0xa577801f, 0xfe99cd6b, 0xdeaf4c7b, 0x4d3343ae,
- 0xecd56e0c, 0x3ce1d096, 0x03744bfc, 0x3b933173,
- 0xe519759d, 0x2d5ea8be, 0xb455f95a, 0x5e04f852,
- 0x5b7093d5, 0xc634ad91, 0xcd8839f5, 0x1ea77bc4,
- 0x2f3e3523, 0x6b132b7e, 0xbe48e6fb, 0x65626813,
- 0x54131f92, 0x8b710dff, 0x9e603646, 0x784bff2b,
- 0xd90293b8, 0x334b5436, 0x0280fb5f, 0x2dd41e29,
- 0xc3bdbd20, 0x756f9144, 0x8cf467f4, 0xd045b0c0,
- 0xd89694bd, 0xe7e01b0d, 0xa7665360, 0xb7f67329,
- 0x20139111, 0x66863efa, 0xda2a4f79, 0xa8a129e0,
- 0xbb6f4436, 0x16f63f6b, 0xe4ef4446, 0x1024e8c9,
- 0x1150673c, 0x169781bc, 0x10c922bf, 0xc803b59f,
- 0x514fce0d, 0x31f4ea31, 0x9443e843, 0xd289b519,
- 0xd1d12dc7, 0x430e94ce, 0x8880f260, 0x8053c217,
- 0x4e58c08a, 0x25bfa0ee, 0xe0545f0f, 0x31dd536f,
- 0xcf94c10f, 0x7714dad2, 0xc1a687ce, 0x43a6aefc,
- 0x9dfaf699, 0xc1b5007d, 0xb7dbaafd, 0xf0680d80,
- 0x6fce66c2, 0x222ebaff, 0x37f1f82e, 0xc1f7c230,
- 0x35247939, 0xee9e70ff, 0x5b539a2d, 0x0216a521,
- 0x4e0fb986, 0x797d1a9d, 0x88e46c0a, 0x53fde70e,
- 0xa410dec2, 0x24c9e1ba, 0x4fb95a39, 0xaa21a4f2,
- 0x0d047ec2, 0x95f21514, 0x60e342e7, 0xc9c8eb5e,
- 0x55a8b4b3, 0x338b3a34, 0x3a0c5517, 0xd2c1d19c,
- 0xaaab932f, 0xa71af859, 0x596b6b2e, 0x2dc5e1d3,
- 0xcbc950bd, 0x1134ec77, 0xecaf4543, 0x57b8bc7f,
- 0x4bc66253, 0x79f1b994, 0x69e29c55, 0x18276356,
- 0x037ac5a9, 0x728eab6b, 0xdd21d51a, 0x738cef32,
- 0x9599722d, 0x1dd05ae4, 0x22d06e6a, 0x75c1cde0,
- 0x949f1edd, 0xe0909f7c, 0x50e439b4, 0x32516b66,
- 0xc3784a24, 0xa49cb178, 0x11679610, 0xcf3e5332,
- 0x3d03804b, 0x224a88ed, 0x08a98efe, 0xaf7d3eae,
- 0xba14c582, 0x13f0cf93, 0x65fff6c0, 0xbe4c9a3e,
- 0x34309345, 0x2f4b479a, 0x4be410fb, 0x73bd9f5c,
- 0x9ade520a, 0x6095c916, 0x2c9b8493, 0x9ce27151,
- 0xef84c6f2, 0x02536213, 0xc69c2e48, 0x7a1b0593,
- 0x0fa823c9, 0x57ff8a8b, 0xcb5120d8, 0x73d1e49e,
- 0x38fcb16d, 0x93165cb4, 0x7207d21a, 0x2cfca2b5,
- 0x8922d17f, 0x65b65fd2, 0x39e1cd83, 0xd307bd67,
- 0xf3e4175c, 0xdb7fb4ce, 0x5ed09e9d, 0x5a20d551,
- 0xcefdd7fd, 0xa2e25611, 0x52936e79, 0xe62d494c,
- 0x4a4f8e7e, 0x103a04b5, 0xe0806adc, 0x466c7211,
- 0x4a58a157, 0x718ccb3f, 0x429a1996, 0x09f73a66,
- 0xdaf53eec, 0x40c466ec, 0xe6f7ca2a, 0x9a8293e2,
- 0x1ab20525, 0x6800f236, 0xadf9110e, 0xdeef284d,
- 0xf4ff2567, 0x3875cefe, 0x144bcc23, 0xe85500f6,
- 0x7cf1aa2a, 0xa079dbc8, 0xaf7ae1c8, 0x3835e85b,
- 0xa5e8cd78, 0x8133d26b, 0xbc8f90e8, 0x418f4ff0,
- 0x3ba8053e, 0x02abe8d0, 0xfc6f5caf, 0xbb3ff41e,
- 0xa33f1688, 0x4577ac37, 0x17f6c481, 0xf84d6e33,
- 0x3755530f, 0x54ef96b0, 0xa8ad852b, 0x7ceb8490,
- 0x01a058c8, 0x2abbd4a6, 0xd26fc2b8, 0x1a863296,
- 0xef96105f, 0xdecd5842, 0x6eddd540, 0xc8b72419,
- 0xb725ece2, 0x031f73f4, 0x1394ed68, 0x044433f5,
- 0xe228bc8d, 0xe6653122, 0xcb1b1ea7, 0x91814a0f,
- 0x2c4e0203, 0xf4df992f, 0x748ad83e, 0x4955353a,
- 0x27b8ed38, 0xf09074f9, 0xb5fc059f, 0xc8c87753,
- 0xc5275550, 0xc545ced3, 0xa7760521, 0x01296e85,
- 0xfef10f59, 0xbbcb0540, 0x524e1197, 0x2947eb03,
- 0xb114aa3a, 0x66f3f4f6, 0x2a943e9b, 0xcf5db2a5,
- 0x27d2dc0c, 0x0d188883, 0x44e6f0e7, 0x89efa185,
- 0x4c74a64b, 0x273b4f7a, 0xe71afefc, 0x84ecb07f,
- 0x67ddaa2f, 0x0a169262, 0xcba03750, 0x64987add,
- 0x3edbd52a, 0x8abdc1cd, 0x3d7a2ece, 0x8a189e49,
- 0x6eb34b8a, 0xd9e0d994, 0xdaa53746, 0xbd64678d,
- 0x6d362592, 0xa3f42f6b, 0xc35633c3, 0x398eab3d,
- 0x208c1c8c, 0xc4a88f12, 0xd4010d72, 0x956d911e,
- 0xf043ee49, 0x00f2f510, 0xb0f0e1c0, 0x82ceafc4,
- 0x05bfbdb2, 0x88b2b297, 0xb6cea039, 0x0472393c,
- 0xf0117f38, 0x5ed230c9, 0x2f5ab638, 0xe0ae275f,
- 0x0d6eae29, 0xc0dbbddb, 0x01bd8795, 0x7162e3ae,
- 0x049a5093, 0x0519151f, 0x98dfe9b5, 0x947144d9,
- 0xb61d350c, 0xd190ed78, 0x63ea0bb4, 0x90531193,
- 0xde5fb76e, 0xe7e2c9d8, 0x4f6bbe26, 0xb7c39864,
- 0xe686f905, 0x28165288, 0x89e6bd60, 0x5888366f,
- 0x03ed7eac, 0x31018c8d, 0x2da4c464, 0xf5fe04ed,
- 0x35ccd1b1, 0x33b5860b, 0x1a233fa7, 0xed0c0be2,
- 0x64c81a38, 0x36b5a905, 0xf9a4a5ff, 0x4bef53fc,
- 0x122585ab, 0xd2a470b1, 0xa5d593dd, 0x1d1e745f,
- 0x0ce02120, 0xf839e98a, 0xc7269c02, 0x37ad8033,
- 0xc675a3b1, 0xcccad7c6, 0x55acb3ed, 0xac8a9bab,
- 0x88ba90bf, 0x925991f7, 0xf3537254, 0xfc433115,
- 0xfac9d769, 0x0f69cec2, 0x98e8d84a, 0x6909981c,
- 0xd8e37e3c, 0x32e14387, 0xfd26207d, 0xe4dbd085,
- 0x2304770f, 0xb405a419, 0xb8ab8623, 0xe85ede17,
- 0xc4454b30, 0xb0ec30ce, 0x5bf12fde, 0x1abdcbad,
- 0x02afba83, 0x9e76905f, 0x0d7768d5, 0xd662eb0c,
- 0xc586ed78, 0xd710b92f, 0x29aedb61, 0xaf2f9eba,
- 0xde50ffef, 0xbedecf32, 0x95ff9374, 0xac224939,
- 0x3f257efd, 0x21c477b7, 0x1dfb7ecb, 0x157c0629,
- 0xcc94a695, 0xc709518e, 0x72496bbf, 0x44d68580,
- 0xd651cd9d, 0x5b36446c, 0x6efa1bac, 0xc9dc5f4a,
- 0xfde12946, 0x2a177fc6, 0x4f8a1d49, 0x16c3ece3,
- 0x5e322dd4, 0x78524cf8, 0xf284706c, 0xe8f256da,
- 0x6e0bdd15, 0xace40e74, 0x98cac740, 0xdda92247,
- 0x2ada3978, 0x8fd65aa6, 0x0db18f0f, 0xc2599d66,
- 0xe4ffdaf9, 0xa47df3cd, 0x00709bf9, 0x67c0f182,
- 0x5fd455c4, 0xd272c62c, 0x986afe10, 0x1d63f3d5,
- 0x68eb7a3a, 0xe54002e3, 0x0af49799, 0x0fc40648,
- 0x57d2c82d, 0x5ff7e5eb, 0x9b758838, 0x67d0cebd,
- 0xf9f160b5, 0x3d61ccde, 0xef95235f, 0x4ace9d1f,
- 0x43cecb48, 0x21412059, 0x4fecb5e4, 0xa49c24b4,
- 0xff47e365, 0xd866d529, 0xdb7af13f, 0x5eceda69,
- 0x88e317e1, 0xa5543fdd, 0x623b7131, 0x2513d152,
- 0x0ade96ff, 0xa24800ed, 0x2ad63ee3, 0x13eb076d,
- 0xa9c49ad2, 0xbc60ecae, 0x8aaac34a, 0xcdcbaecf,
- 0xabfa7a22, 0x76b24ca3, 0x3d1bb6a6, 0x747edc02,
- 0x3a6adaef, 0xa8928b91, 0x2ec84487, 0x86515744,
- 0x91ca4f0d, 0x82e63bc7, 0xc8ab4c35, 0xdcbd34dd,
- 0x533f6aa0, 0x39e1c634, 0x2b0dfb99, 0x6c3bbe56,
- 0xd222adae, 0xdee35ce7, 0xefaa1066, 0x46c0d664,
- 0x88eae4b0, 0x84e1c6dd, 0x56fac635, 0x154f6692,
- 0xd59be802, 0xf0cafa82, 0x4be2696a, 0x3557d651,
- 0x8db33c87, 0xcc35b197, 0x5e96ef0c, 0x3a06428b,
- 0xf958ba99, 0xe1887cad, 0x684c0073, 0x182ee4a2,
- 0x13cdf247, 0xb3c264f7, 0x89a4c204, 0x9a76bbe5,
- 0x12721e84, 0xa548a555, 0xc249df28, 0xe827f8be,
- 0x1f13beac, 0x9b4ce727, 0xe1e414b4, 0x54ad8b18,
- 0xd8720232, 0x2422aa17, 0xab0e1ce3, 0x223027e9,
- 0xd497456a, 0xa55dcedc, 0x6cba766b, 0x82a3ff29,
- 0xd410cadc, 0xb8995c4f, 0xd6674af7, 0xc6adb0ec,
- 0x1d0256fb, 0x051743d5, 0xf0e6d11d, 0x142bbb74,
- 0x800a9d15, 0x047fa9fe, 0xa042d28a, 0xa6161c1d,
- 0xbb7c4f40, 0xadb00bbe, 0x1ed84f3e, 0x39c7038d,
- 0xdcfb0a76, 0x2d77d72b, 0x0b9fd2fa, 0x7d87e7c4,
- 0xcd11a212, 0xf9e93d98, 0x13761993, 0x7ef74b96,
- 0xc74b3f78, 0x1b521f5c, 0x97720416, 0xae7e7d42,
- 0xd57d5a19, 0x19ae9a3b, 0x81f7ff27, 0x5514060a,
- 0xae3af4da, 0xfe9ec101, 0x4be4b53b, 0x60bc35d9,
- 0x81bf45af, 0xe8e04d7f, 0x822ea223, 0x568d83e9,
- 0x4e394abc, 0x9c68e5db, 0xec09c483, 0xfc96b322,
- 0xac374303, 0x0022dc2e, 0x45be810c, 0x3ce1e42f,
- 0xfc044ea4, 0x09d7d077, 0x6b5a4353, 0x143e2f42,
- 0x4f023155, 0x5d89766b, 0x223f041c, 0x742b5196,
- 0x008b12c1, 0x5f4a2293, 0x9e36affe, 0x9758315d,
- 0xd5a19407, 0xa2445725, 0x5da6eb65, 0x665a20aa,
- 0xec4b0408, 0x4d2efaf1, 0x7c49337f, 0x4e909c1f,
- 0xf7c9ba0a, 0x2ec89b45, 0xc97d08e7, 0xe8575949,
- 0xc405a9b1, 0x68536a39, 0x5b95dda4, 0x3c55af8d,
- 0xd41245b7, 0x114e2695, 0xba9fd11a, 0xa7b9c9a6,
- 0x4410c1e8, 0x1f907bc4, 0x09e7cd91, 0x11b6c1fc,
- 0xf96914ef, 0xeb17a336, 0xb9e45590, 0x3884f9a4,
- 0x94c2fb97, 0xb6f1065a, 0x32e43826, 0x84349de2,
- 0x758e23b3, 0xa6e2d866, 0x0f657d77, 0x514d7ccc,
- 0x45f29354, 0x2b094c7d, 0x033071f2, 0x183dd640,
- 0x357fa091, 0xe5c803ef, 0x94e4d6d8, 0x25c53c3a,
- 0xae5c1d24, 0x5be804be, 0x895d7dc9, 0x17b18011,
- 0x02cbf8c1, 0xf8436767, 0x2b6dd76e, 0x744fed43,
- 0xc19a95f8, 0x5268d7bf, 0xc96f81d3, 0x6c363f06,
- 0xaa2b72c8, 0x91b36f54, 0x8faf845d, 0x83c8e65d,
- 0xdb134ad1, 0x32d9611c, 0x0d220246, 0x678ca138,
- 0xbf9a28f4, 0x3992c27d, 0x4eeed1ac, 0x23cdcf25,
- 0x6b9bfd39, 0x371ac7ff, 0x0341c56a, 0x2bd70c26,
- 0xf843569a, 0x2890d0fd, 0x4ef4ccd4, 0xa78055ca,
- 0x6066e3b2, 0x948087dc, 0xe5403f07, 0x3b0eacd7,
- 0xa0cd963c, 0xf8e804b8, 0xb1f21634, 0xe60089ec,
- 0xb43c80ea, 0xccc9c94c, 0x3a4c2fcf, 0x1bd9d4e3,
- 0x5abcc14c, 0x508f1211, 0xb066a748, 0x839d8ee8,
- 0x5636646f, 0x62cc41f1, 0xd5413b31, 0xaff999a1,
- 0x9b8347a2, 0x4ee8e520, 0x66551fa5, 0x2e82aea6,
- 0x81167f0e, 0xfe8b421b, 0x224febee, 0x60c9a920,
- 0x98e76f3b, 0xef8b75fd, 0x41c7db3a, 0x7869cf73,
- 0x3ca3a4ce, 0x2606867a, 0x252da693, 0x4bebf089,
- 0x7bdec4be, 0x174f293c, 0x6a165360, 0x46d16037,
- 0x8d484d2c, 0x9ce71782, 0xb62541e7, 0x69f01344,
- 0x6da46cb1, 0xd9c223b1, 0xe7ede905, 0x8715b76f,
- 0x64d03cd1, 0x38d956fb, 0x2955d5a2, 0x415dcd22,
- 0xd3951748, 0xed521795, 0xc7fae97d, 0xb44532ad,
- 0x87c042fe, 0x5f57e097, 0x2124e1c7, 0x04601c12,
- 0x8e7bc307, 0xf8c7abe8, 0xd3fe7a86, 0xb947a6d3,
- 0xd6b7c3f1, 0xe18e577a, 0xbeadf83f, 0x9dfcce0c,
- 0xe4ab27d3, 0xaa12fd13, 0x9084c2a7, 0xd322d3c0,
- 0x7783aa68, 0x303fdad5, 0x7972b988, 0x46bfbd49,
- 0x06970d90, 0x05d7ff8f, 0x5bc8b497, 0x927b0e9d,
- 0x91be9f61, 0x0a47fb93, 0xc35ab4c1, 0x74495add,
- 0x05939e04, 0xd9cde83f, 0x8140d31f, 0xcb11ef31,
- 0x903035eb, 0x5e4b8d88, 0xaa6f58cc, 0xd218f09c,
- 0x68bb102b, 0x4644208b, 0xd040244e, 0x20f3bd67,
- 0xfc90da66, 0xd209cef7, 0x38513a95, 0x60740af5,
- 0xeeb881d4, 0x9d5bc23b, 0xc63d912e, 0x2e6d4f77,
- 0xd2268a82, 0x64580675, 0x02e83ca2, 0xf9ca5993,
- 0xcf6afde1, 0xcbb9edfc, 0x383e65fd, 0x64da6644,
- 0x1e9051cf, 0xc4ae5d56, 0xfdeb0e81, 0x939423b3,
- 0xe8a36294, 0x885c09ff, 0x562ac9d0, 0xffd43f93,
- 0xcf9d91f9, 0x33c41332, 0xb262188a, 0x625efa3e,
- 0x61f57fff, 0x8dcb5476, 0x64d98389, 0xe2d11efa,
- 0xf270c812, 0x05cbc288, 0x6bd74a37, 0xd4a90421,
- 0xaf9a2777, 0xf0238bd1, 0x8268cf4e, 0x3535398e,
- 0xa2badbba, 0x3012db8f, 0x650fddd4, 0x005a5253,
- 0x657c524b, 0x444add60, 0x539a373e, 0x63c13972,
- 0x4dd0b633, 0x2f7c594b, 0x3950abbd, 0xa310aca7,
- 0x93a07313, 0xdf8b5330, 0x5689c541, 0x4b050799,
- 0x0d2d9ed5, 0xe2666fbb, 0x1a1471e9, 0xd0d790b5,
- 0x77892416, 0xbb89b281, 0x01e0313b, 0x17e07fa7,
- 0x67484345, 0xa7c967e7, 0x33827881, 0x04ef77fd,
- 0xb6d42200, 0x14337042, 0x3e9a1ac3, 0x46e0ddb3,
- 0x46dd06ec, 0xcf363261, 0x2b72270e, 0x65445dbe,
- 0x4f42b725, 0xb6075b41, 0x2b4f6d5b, 0xa70a47b9,
- 0xa6387c36, 0xb34750e1, 0x6e0f9a3b, 0x758db076,
- 0x8b6c88a1, 0x9934ca5e, 0xee945ac0, 0x7f63c6e5,
- 0x1a694049, 0x37b66f96, 0x1d8f3bf0, 0xccd33847,
- 0x73940bb4, 0x698c4d75, 0x9d842ac2, 0x397e539d,
- 0x148b8c02, 0xb85f87a5, 0x36810368, 0xc5b27787,
- 0x3da33072, 0xcd6e1fd9, 0xbcd54d59, 0x0e1c87f6,
- 0x4ea36f01, 0x8cc28c04, 0xca4998ed, 0x67d64949,
- 0x32f49d4b, 0x7af05681, 0xa17f2357, 0x87c5029b,
- 0x5e239a5e, 0xfdc70bb4, 0x7917a33f, 0x359d31ce,
- 0xe5e8bf40, 0x7dbb54dc, 0x1e5c4652, 0x96f23e80,
- 0x94ff3afc, 0x1916db6e, 0xb8abc275, 0xc6ed8f06,
- 0xb7989c1a, 0x132ce865, 0x7dbdb589, 0x9fc28b63,
- 0x0496a52f, 0x041ab62c, 0x8b91a1f4, 0x0c4718fe,
- 0xb989eb5a, 0xc6f4da1d, 0x07bd8a6f, 0x156c779a,
- 0xfcfcc49b, 0x3dc0c9f9, 0xa63a717d, 0x60b280da,
- 0x2619d67d, 0x9c42d7ab, 0x28bac19f, 0xa7fcd8d3,
- 0x77ce0653, 0xf0e87136, 0x0df2d37a, 0xeb36ef90,
- 0x34178dec, 0x5a593c74, 0x16f0ce31, 0xae2aefb7,
- 0x87629f44, 0x6225461b, 0x189d5e4b, 0x04359e7b,
- 0x09c71ef0, 0xe8bd52ab, 0x4009689c, 0x4aec1256,
- 0x1c8d80f0, 0x423ac0e6, 0x0b7984c2, 0xdcfc7642,
- 0xca2fba79, 0x25004586, 0x2ff3a382, 0xe19d687c,
- 0x4d71509e, 0xfbb9bcf9, 0xc4d4a64a, 0x12170978,
- 0x8ce36cc9, 0x690d46da, 0xb843a793, 0xcb1dc1a5,
- 0xea03efd7, 0x26ed8d9c, 0xb1e3a724, 0x91449a45,
- 0x9eb5cdc2, 0xd1200da6, 0x4b9405a2, 0x0144b568,
- 0x34bcf685, 0xdc01660f, 0xffc974da, 0xf1022adf,
- 0x2bc91732, 0x2126dfee, 0xee4f0a33, 0xe53a5bbf,
- 0xe27a2a61, 0xf6113864, 0xc8170279, 0x3b429d50,
- 0x54990a68, 0x5f41033d, 0xd84dc58e, 0x5abb14ce,
- 0x8e91f11e, 0x276957bf, 0x2cd4ac18, 0xaffdc797,
- 0x044e88fe, 0xdc139d65, 0x8f882e2b, 0x1940d468,
- 0xdca778f0, 0xac0639f7, 0x4a5fe861, 0x54624e9d,
- 0x48452787, 0x1dddc714, 0x960055c3, 0xef3e4197,
- 0x7710b495, 0x0f10362a, 0xba397277, 0x48933e1c,
- 0xb82866e7, 0xe1b0f95d, 0x07c61bee, 0x9af9ca30,
- 0x890b8bfc, 0xdaa9ee78, 0x5d78dae6, 0x81045e7b,
- 0x4f0bdb65, 0x0843f506, 0xa24805cc, 0x03fd1f98,
- 0xd017a642, 0x2c225675, 0x8712a634, 0x72c27638,
- 0x32f918fa, 0x6da9f658, 0xabc713fd, 0x54409efd,
- 0x6e8d7f68, 0x2fd462dd, 0xc78142f1, 0x03617103,
- 0xcf90cb8b, 0x8cc4db7d, 0xfd77350c, 0xc5760c58,
- 0x3355daae, 0xcfd298a3, 0x250b5b95, 0x2c0a797a,
- 0xe47f062e, 0x207e942e, 0x68a85554, 0x8f8bec88,
- 0x6cf2b3a7, 0xdd9cfbcf, 0x77da56c0, 0x395c9ff3,
- 0xddc948bb, 0xeeb7cc43, 0x2d5a9eb9, 0xd76e7cf0,
- 0x949f8863, 0x66a92e3f, 0x091a3dca, 0xa7a71e58,
- 0xff133c74, 0xaf1ca6da, 0x2cd31b81, 0x322bfc48,
- 0xeac5d142, 0x3aa10c21, 0x129a0677, 0xcf5e813d,
- 0x1fd76bfb, 0x83c241ef, 0x2b752e0e, 0x7ce561c7,
- 0xe620b75b, 0x8cb5e5ae, 0x7fe55c9c, 0xf336d027,
- 0x6830d9d6, 0xc86f788a, 0x04aa903c, 0x226fb45e,
- 0x25569ab5, 0x14db3db6, 0xfdca2f52, 0xd7ae0845,
- 0xd3ddf63d, 0xaa991b19, 0x0deae63b, 0x4b8c0b80,
- 0x88fe96ff, 0xfa4015d1, 0xd64a7737, 0x8cde2001,
- 0x52c5c953, 0x60bec37c, 0xb57f919a, 0xecf33633,
- 0xd65bb5f7, 0x9bf7e9ba, 0x0213b159, 0xd9f2daff,
- 0xe10acf39, 0x416e47f6, 0xdb8a2ac8, 0x484d1ec8,
- 0x5acd305f, 0x9772c681, 0x51965a2a, 0xc50ba8fc,
- 0x35b99226, 0xb2f4dfdb, 0x97cbe0f9, 0x76a83466,
- 0x301b2743, 0x662b1879, 0xf14466f7, 0x3c512ba4,
- 0x90d8e115, 0x3ca12cb2, 0xb4deef8d, 0xf55c0cff,
- 0xb30b5bcf, 0xa1e61027, 0x9f2cb3e2, 0xa7d5fde3,
- 0xc2d7c33a, 0x17a12ee4, 0x623bbd8b, 0xb0c141f9,
- 0x1ac187b1, 0xe84bb26a, 0x08729228, 0xb1bda5d7,
- 0xda659696, 0xb58881ea, 0x8abd56b2, 0xcb34ba6b,
- 0x3a822d13, 0x02cb8c92, 0xc8937fb1, 0xd01c7e1b,
- 0x67314272, 0xd4d5feca, 0x96d155ce, 0x9183f463,
- 0xddbcd4fd, 0x8a762683, 0x872d3f68, 0x318e932f,
- 0xd892328b, 0x82cfe110, 0x111a21d7, 0x58892a8a,
- 0xd887a412, 0x8bea7729, 0x64e809c2, 0x08abad30,
- 0x857dd565, 0x413a4f14, 0xae98836b, 0x05fdd2bd,
- 0xfc1b5b02, 0xf6d0b5c4, 0x7530b97d, 0xf6cd028d,
- 0xc9e32039, 0xcd5646ab, 0xa97987d2, 0x9c9c8ca9,
- 0xcfacedcf, 0x9fb5607f, 0xf5576f53, 0xce7ebd36,
- 0xbe793f13, 0x068e7b1d, 0x75a874bd, 0x715531af,
- 0x3b280dc3, 0x45b7acdf, 0x91f6ad57, 0x00b0e0d8,
- 0xa82ff53a, 0x028f60f5, 0x48b899a1, 0xc6d53be4,
- 0x95c5ed6f, 0xc92b626c, 0xdb187659, 0xd8e645d5,
- 0xa101d6ac, 0x00f03a15, 0xf33ec522, 0x5fbd3223,
- 0x5798d88c, 0xcdf36fd2, 0xe8d623c5, 0x23c2b8a4,
- 0x9b166c7e, 0x837339c7, 0xf8203c1b, 0xcc5ef7c7,
- 0x790d7f17, 0x32e4b040, 0x5d39f17a, 0xea444171,
- 0x8f324f77, 0x654b6fc1, 0xd558de10, 0xf62c9d57,
- 0x65698326, 0x7543f60a, 0x25068be6, 0x2dcbd222,
- 0x2cef9550, 0x96ba75a5, 0xb2420ef4, 0xdb9fdc15,
- 0x7db73207, 0x57f66346, 0xc78ca728, 0x17719eb4,
- 0xfe03090c, 0xb6b5ac15, 0x9adc5d05, 0x3cc4bf44,
- 0x1ea2d4d8, 0x3200f937, 0xe465150a, 0xc159f8a0,
- 0x0489b80e, 0x90f36892, 0xe05c2d2c, 0xf77e7ebe,
- 0x6e10240c, 0x4ba24295, 0x2a79a0ff, 0xf5bd438e,
- 0xe6d71c00, 0x46a9d067, 0x85863380, 0x2371615d,
- 0x6f4ebfb2, 0xbefb93e0, 0xad6f695f, 0x11350894,
- 0xb1bc15b5, 0x9725c7b8, 0x7987288a, 0x6ec83510,
- 0x6e109032, 0x92eb2e3c, 0x1d6067ac, 0x6e1b04cf,
- 0xa0017e5d, 0xdf928cba, 0x1a1f41f6, 0x06eef9f9,
- 0x7d867a2f, 0x8ed9265a, 0xc2404273, 0xe5e31b7e,
- 0x0dee39a6, 0xb5a70cca, 0xcd0f6126, 0x62a56d8f,
- 0x8a9fa2bf, 0x18944541, 0x0b02a7be, 0xcdc85420,
- 0x5f2e415b, 0xf2f17235, 0x7c5926d7, 0xd9a50651,
- 0xfa7665fb, 0x2e845bc4, 0x2a220038, 0x845b59f6,
- 0xfe08b04a, 0x0edc57ee, 0x58437c79, 0x8e6300a2,
- 0xdbbb71bf, 0x510d6535, 0x1e2e0b1d, 0x7da58caa,
- 0x5dc40f86, 0x6d5b74b8, 0x8f25d682, 0x61a622c5,
- 0x6cda283f, 0x531f08d5, 0x6dbb5606, 0x7cead721,
- 0x98d2cf24, 0x76aefc4a, 0x6830aa08, 0xa0d5863a,
- 0x3e1d5385, 0xde975d50, 0x0f915cf4, 0x55cfec36,
- 0x62d7f21c, 0x7f8953d7, 0xf435d53b, 0x856ccd42,
- 0xf9eacd65, 0x0357dde3, 0x861fd0d1, 0x482ea553,
- 0xe0d88833, 0x6ed59c4a, 0xbac6a4d3, 0x800b4fe5,
- 0xbaf2318c, 0xa8e93a41, 0x9659b284, 0xfb1c517c,
- 0xe626bc6a, 0xe12f1718, 0x76d49717, 0x1eb4108c,
- 0xf29f93f3, 0xa57ba3f8, 0xb05b8736, 0x7df3615c,
- 0xd9f08b1e, 0x3c45e27e, 0xedcd46d8, 0x389a0a47,
- 0xa78f7923, 0xbf651e84, 0x32f77752, 0xc1976135,
- 0x05d4a266, 0x6743ade9, 0xd87dc149, 0x9aefed2d,
- 0x8483fb8c, 0xc52a098d, 0xb4503985, 0x0ecbbe7e,
- 0x03a139d3, 0x4dc22002, 0xa753f6e0, 0xb7f87a68,
- 0x2226a478, 0xe7bf5e09, 0xd10dc25c, 0xa0f2cfc0,
- 0x0162ce9a, 0x0a32326a, 0x58af600c, 0xc2f974d4,
- 0x18afe983, 0x5a4d2952, 0x26c1cdf3, 0x0e2ee561,
- 0xd4fed0a5, 0x7ea64ab4, 0xdff4b74c, 0x4a43a19d,
- 0xecbeac15, 0x08badb12, 0x21227b2d, 0xaad49bd5,
- 0x5c334c94, 0x913fd0fe, 0x0bb973a9, 0xd3c41534,
- 0x6b563134, 0x2a4ccd98, 0xb2424e3f, 0xcd4730b4,
- 0x6c47887b, 0xbd883773, 0xa9d9aaca, 0xb3572d39,
- 0x514639fd, 0x06b9849a, 0x7472ac59, 0x1919b2ac,
- 0xe0f31bb0, 0x41d51e08, 0xe596b4f7, 0x9739d4dc,
- 0x6a6271c9, 0xa9ad95d7, 0xd2a34c1a, 0x81eb269c,
- 0x3093f028, 0x4f0e3bd8, 0x5a985a05, 0x3b587592,
- 0x0cd7fe42, 0x0d98d31d, 0x0c8078fe, 0x886af0fa,
- 0xf8a7268f, 0xf7add825, 0x13c17d80, 0xfb022420,
- 0x6b2a360a, 0x68efe7ad, 0xce7203f9, 0xd852d18d,
- 0xc680f399, 0xb8fb6f39, 0x2aa7f1ce, 0x7111437f,
- 0x355f6b06, 0x038e21ad, 0x8e5e5ad1, 0x4f902cc7,
- 0x880af0b4, 0xfdf55706, 0xc0cd99b8, 0xd75675b0,
- 0xff7e2b7a, 0xc46bd7b2, 0x22f5da68, 0x6b182e8d,
- 0x88cc245d, 0x37142d55, 0x53890b72, 0xe58d82f2,
- 0xa534209a, 0x2045d3a9, 0x4955fd9f, 0x8d933654,
- 0xd9cd95d7, 0xf00302c2, 0xa48fab0b, 0xaf573c59,
- 0x82b014d6, 0xb42e1b06, 0x43b4d2a4, 0xe90c1961,
- 0xd67ee71b, 0x9ef78d9a, 0xb5b75930, 0x2b6f16ed,
- 0x15c658f7, 0xc585308f, 0x52ee622d, 0x868896cc,
- 0x37711c62, 0x67f50b9a, 0xb656f779, 0xdc9bf2b2,
- 0xe4023bc4, 0x1e46b333, 0xc310085e, 0xd530fdd6,
- 0xf16a3ff2, 0x91556caa, 0xf9ddb1a5, 0xc181a993,
- 0x5b34c859, 0x92dba0d7, 0xccaf1b5e, 0x99751cdc,
- 0xecafa0a2, 0x7c3898d7, 0x7a3753a8, 0xe876ba1e,
- 0xcb34099f, 0xea7ad693, 0xf2a00507, 0xbaa2e9b8,
- 0x4f8ff4ed, 0x54e0ec2c, 0xd2f28383, 0x84745e51,
- 0xab789db0, 0x8481b924, 0x4adb38ef, 0x27967c28,
- 0x77aa9df4, 0x25e3fec5, 0xb0d82d65, 0x5bff868d,
- 0x2e1601cd, 0xfd6dfa28, 0xec0defcc, 0x1433527f,
- 0xe3607d72, 0x3b213681, 0x0cb9b758, 0x5e8230b5,
- 0xa5fe2938, 0x03aeb9c2, 0xa141ff8b, 0xb7b8c5e4,
- 0xbd0aaef9, 0xbf99ac9c, 0xbd0a75c2, 0xa6e04389,
- 0x27b09e23, 0x4e174887, 0x92582645, 0x3ded2071,
- 0x4780cd7a, 0x2203ded2, 0xf912e069, 0x97b20678,
- 0x68606eb8, 0xeed60cb8, 0x9d1123c5, 0x7d4ae12b,
- 0xf9d368e6, 0xe5010a37, 0xe2aaf18c, 0xc1fa1e70,
- 0xc52a00af, 0xb7d0da93, 0x6f5baa28, 0xdb676e79,
- 0x7e2144ba, 0x1467e2f4, 0x0ce16dca, 0xbb5344f7,
- 0x94b0d824, 0x566c8f33, 0x4a4ca95c, 0xab5b99b8,
- 0x1ac7c0c1, 0xd054edfb, 0xec19c505, 0xe446a37b,
- 0xff63da78, 0xf4b7fb94, 0x3980bd01, 0x8301e9bb,
- 0x969cd5cb, 0x348bb9d4, 0xb1b5c97d, 0xbe6ea5f7,
- 0x592640dd, 0x4f75be6f, 0x5eee2f4e, 0x6f93c2f1,
- 0xce35e206, 0xad0fa9ce, 0xa3b88c44, 0xfc4cec63,
- 0xd642fa11, 0xc4f11ac9, 0x219affba, 0x68973568,
- 0x80a40920, 0xb5fdb551, 0xad01947a, 0x628e6eb7,
- 0xfd6e7b36, 0x270dfa7c, 0xf0de1a20, 0xed913037,
- 0x279867a5, 0x368e482e, 0xe1f616fd, 0x4b915684,
- 0xa07bc997, 0x52e0e886, 0xa14cbe55, 0xdc81d053,
- 0xe56bcc0e, 0xd3afad48, 0x26a24e3d, 0xbf7e8587,
- 0xc0bdeb35, 0x27c7baaf, 0x9b83e7c0, 0xa3b84599,
- 0x75fce158, 0xf46d3bd3, 0x85a17bbe, 0xe51c7a1e,
- 0x9f227e2c, 0x87a891d8, 0xcc99a702, 0x96bc4343,
- 0x3cfad23b, 0x5b4f8b27, 0x7a6b5c72, 0x8735f319,
- 0xe00dc6c1, 0x0b70d649, 0x1df426fd, 0x034807c3,
- 0x91360e4d, 0x9346f4a0, 0x391b3e66, 0x8c8f783d,
- 0x7b78edba, 0x54233daf, 0x4cbb8b19, 0xfa3aee3d,
- 0xd4b6d81b, 0x290b834d, 0x53fdc7b0, 0x8c533bae,
- 0xc1bc3df9, 0xc29cc74a, 0x9e95057f, 0x94ca33ef,
- 0x02beea6d, 0x9e8788c0, 0x34364ae4, 0x6340413d,
- 0x15c7e26c, 0xf56fc185, 0x99ff16a6, 0x7c41afa8,
- 0x7ac9e02e, 0xa80280c7, 0xb57c19c1, 0x5790f684,
- 0x72962892, 0x215a64bd, 0xddad1697, 0x115d02d1,
- 0xbaa37fcc, 0x9f2a2d59, 0x0f4b4972, 0x5a98b654,
- 0xf0367916, 0x4236c046, 0x198aac7a, 0x0b93e5e6,
- 0x1da2f313, 0x993fc934, 0xca3cf006, 0xe19e707d,
- 0xe40f8fa0, 0x5d66219f, 0x57fd2765, 0x2b004b0b,
- 0xfb1a1ec3, 0x09f68cbe, 0x41131e48, 0x4f8207b7,
- 0x9ec36dd0, 0x4a42f678, 0x90045769, 0x83d73cfb,
- 0xae976eb5, 0x5bd21372, 0x94e4148f, 0x4667d52b,
- 0x20c62f43, 0xf02e21dd, 0x9f29b5d0, 0x1c712655,
- 0xd96ab699, 0x9177f5b3, 0x3e66d06b, 0xccc746a9,
- 0xb8daf417, 0x4527de48, 0x09571384, 0x6c2ab355,
- 0x975050af, 0x6fc7ef4d, 0xba97b08c, 0x3167bcda,
- 0x05bd65f9, 0xc044f2ba, 0x247f8929, 0x2377c208,
- 0x56061fb2, 0xfe1da794, 0x9b2204d1, 0x20628814,
- 0xe241f3bf, 0xdc09bd1b, 0x84c2ad0c, 0x92ae64f9,
- 0x2847e1f8, 0xee9bffc7, 0x4661550c, 0xa6452037,
- 0x2137c192, 0xd0c93189, 0x4d9598f0, 0x6259cdc6,
- 0xd215e916, 0xed7da493, 0x6a08d008, 0x28c6cbb6,
- 0xcb96f629, 0xdf4eb175, 0xc162f73e, 0x1c101e82,
- 0x3a7685fc, 0xceb08248, 0x649145ae, 0x3e8c55a6,
- 0xdd78e0dd, 0x214f109b, 0x39a3f05c, 0xbd4bfcdb,
- 0x5a38bb03, 0x7b078686, 0x552a6eb0, 0x47215841,
- 0xc6a9fe2b, 0x4de24654, 0xd3758a32, 0x44031c86,
- 0xe5df0b4e, 0x4be04fc1, 0x2ba37995, 0xe15b7d94,
- 0x24cf9d1e, 0x32fed11d, 0x7f79cb0c, 0x943ff977,
- 0x65e31c7a, 0x0475c5f5, 0xf25c8cb3, 0xaf94d63b,
- 0x35afc594, 0xcad6806d, 0x21eee184, 0xaeb906a3,
- 0xd45e1c48, 0x7a55b641, 0xb338600c, 0xe49bf241,
- 0x4d31d141, 0x348d87aa, 0x43a88576, 0xd448e017,
- 0xa6b3bef5, 0x17905f8f, 0x3d6b2b0d, 0xe981a973,
- 0x931cb674, 0x3d4b796f, 0x1f1225e9, 0x99b3b9d1,
- 0xda4557c4, 0x61e49e8e, 0x8f89991e, 0x52997e1a,
- 0x4f8b6940, 0x21ebf073, 0x3684b73c, 0x6a68337f,
- 0x77c61045, 0xeea1be5d, 0xb4ba0488, 0xbbb363bc,
- 0xb324735c, 0x61e51637, 0x42ce6c47, 0x1ee3dba0,
- 0x523d3cfc, 0x9bf50984, 0xe581ed76, 0x76c502ee,
- 0xba48acf1, 0x3005daed, 0xe641ee9e, 0x050b4099,
- 0x9d89205c, 0xbd91d15b, 0x2831f59f, 0xc5a2b7e2,
- 0xd26b7c12, 0x79a2dc86, 0x27fd7534, 0x7f07f0ef,
- 0x959216f5, 0x880c3353, 0x485cdad9, 0xb8e4263f,
- 0x88ed4fc3, 0x681d195c, 0xbe67150a, 0x0247c919,
- 0xa6271625, 0xd2c048a9, 0x37431776, 0x6c0494c0,
- 0xae094608, 0x00e7f6cf, 0x76b051e4, 0x339509c1,
- 0xa130c889, 0x046403b7, 0x9d6265b8, 0x7718e9d9,
- 0x93f22ad6, 0x2d04bbba, 0x0333763f, 0x48cd8dc7,
- 0x11715310, 0xf3c5c212, 0xc24df77a, 0x5c15091a,
- 0x72615448, 0xe8a20621, 0xec95fe38, 0xf92bdda4,
- 0x0edb3fde, 0xf0e2fdb8, 0xa88e89a5, 0xfc4a6f67,
- 0xe6b29f3b, 0x02f4cfea, 0x0a29bd35, 0x33e8b91c,
- 0x5fa6adbe, 0x23c14f59, 0x7b522c9a, 0x9ac96564,
- 0x0ab2e161, 0x847ad31f, 0x3a329f2c, 0xfead5e7e,
- 0x5d816e1f, 0x42a08562, 0xc71d11f3, 0x9359ae94,
- 0x19b49e5f, 0x6a506bde, 0xa558f9ee, 0xcd09ff72,
- 0x157dc995, 0x75797e8b, 0x8cb24880, 0x6905e66e,
- 0xafbb162f, 0x739a3183, 0x976bebdb, 0xb84ec55d,
- 0xb351d21d, 0x806125ca, 0x5262268f, 0xac837b94,
- 0xef042c59, 0x26b976e0, 0x699d3a84, 0x899b1629,
- 0x4b6adc2b, 0x75ff6ebd, 0x1508627b, 0x12b7dbc6,
- 0xf9023f32, 0x03c41833, 0xae930d99, 0x0c68a202,
- 0xbcc11466, 0x02ad7ef2, 0x4a18a876, 0xd7daba0c,
- 0x6d3e2d24, 0x6cfd2fb8, 0x62846356, 0x8f6effd7,
- 0x1a887d78, 0x8f8696d2, 0x3dbf1731, 0x2118af8a,
- 0x0a3f96f8, 0xa554e8de, 0xa12dd3f3, 0xc31abbc2,
- 0xfad4385e, 0x7753a186, 0x2d107ecb, 0xca21b86f,
- 0x0ebde088, 0xa2f25476, 0x9d7c50fc, 0x0e53ed0d,
- 0xabaeb7dc, 0xe85b514a, 0x4d1f8e49, 0x4f3ace76,
- 0x86dd8dc2, 0x311effc0, 0xb2cfea1f, 0x86c2ccba,
- 0x3d493036, 0x061e7e0a, 0xd84ed9c1, 0xcd438c68,
- 0xd96cc506, 0xe8682312, 0x502d7cc1, 0x1f074f87,
- 0xfe412442, 0x8cf0bfe4, 0xb57535c3, 0x53ad7bd5,
- 0x06caa806, 0x23cd7fb2, 0x44632988, 0x2961f19e,
- 0x67385209, 0xbeb2e966, 0xbd42b308, 0x5c1d7fb3,
- 0x2d1c9316, 0x2923eead, 0x0ded12bd, 0x70b0ef36,
- 0xa2c84cd9, 0x4d231e4c, 0x7851a1a7, 0x4de53278,
- 0x2f588d90, 0x6659aab5, 0x5807365d, 0x2db999c0,
- 0xc1f0010f, 0x66f30649, 0x085058a4, 0x393bed10,
- 0x67f027f1, 0x541ccda1, 0x4ef5a73b, 0xca6bb4ff,
- 0xe59895e9, 0x81e236d7, 0x76b8e104, 0x6fb180f2,
- 0x0e9cd557, 0x00b47910, 0xa981f200, 0x2637db4a,
- 0xe339c583, 0xaa0051e7, 0x7747e5b4, 0x5f8724d0,
- 0x0d0ccb2a, 0xb5c55bc0, 0x0c2d24bb, 0x158af140,
- 0xae9db863, 0xc670e1b9, 0xcafb6285, 0xb1940fd8,
- 0xd2e2f4d9, 0x8f4f9d3a, 0x0fb44cbb, 0x7e12d699,
- 0x2b2bd044, 0xba6d03a4, 0x37b0468b, 0x98bbf3b5,
- 0xfbb8d8f9, 0x9f248319, 0x19abe32a, 0xda9c40f7,
- 0x216701ba, 0x49526ac7, 0xf2be6f36, 0x3891b905,
- 0xcd42c6b7, 0x6e03730c, 0xc6c0e3a7, 0xa1987492,
- 0xc811b616, 0x7e3d88a9, 0x753e56f7, 0x91a90018,
- 0x15c447c0, 0x3b17dbed, 0x2a11ad60, 0x9477b9fb,
- 0x75094c02, 0x58c31045, 0x63b22748, 0x47af54d4,
- 0x9d6583d1, 0xb602db16, 0x27a0088e, 0xd41c80bd,
- 0x078c1e75, 0xa697bef8, 0x8126d26e, 0xbfae878e,
- 0x3f6efae1, 0x2cc1d1d5, 0x1ad71563, 0x96df253a,
- 0x3e3358e0, 0x0f178855, 0xcd2dab65, 0xcc269e96,
- 0xefd1a4f9, 0x539477a8, 0xbf3d7f01, 0xa3c1ac35,
- 0x754a3d96, 0x669ffc9e, 0xc60c2a59, 0xbb16477b,
- 0x52ecac02, 0x47f35403, 0xac4627cf, 0x574a29f5,
- 0x97bde744, 0xaabbc29c, 0x7b2e83aa, 0xfdd17949,
- 0x12cef292, 0x031d2880, 0xc101a334, 0x1ceb6942,
- 0xeaa8581b, 0xe0c14a51, 0x6846b66e, 0x1bd398bd,
- 0xddacc1bd, 0xf05f3027, 0xfff6f727, 0xcf55f258,
- 0x43257fa4, 0xde22356e, 0xbb72d4b7, 0xc3e401ce,
- 0x2364cd19, 0x1769a9b5, 0xac8a6042, 0xea0d431b,
- 0x5923d993, 0xcc6b7c23, 0x39307964, 0x5bc4aaa5,
- 0x7b144413, 0x107ca5d4, 0xe10192f7, 0x4b1d0063,
- 0x0e571f27, 0x5d7dba93, 0x26db4e18, 0x3b51caca,
- 0x577cac3c, 0xa480f83f, 0x37f6f5f1, 0xba7c938e,
- 0xd860a731, 0xf226b906, 0x3d1c4992, 0xa980bfeb,
- 0x8faf6536, 0xf27cebc8, 0x823891f7, 0x8d877151,
- 0x0331e01e, 0xf5cc95e8, 0xb2b29419, 0xde83667d,
- 0x68ce0b80, 0xc69dc9a5, 0x9fdd7c29, 0xf8fba2e9,
- 0x77abe86b, 0x0c5dfdd0, 0x26cbfe84, 0x35d2a52e,
- 0xef7db5c3, 0x9cb81617, 0xb52d9441, 0x817bdd86,
- 0x2ae4f409, 0xb879e322, 0x5661174e, 0xa5a18de3,
- 0xc3ade438, 0x78ec5960, 0x7b103c7b, 0x2193d878,
- 0x32f08c7c, 0x42976e82, 0xab0867cf, 0x104677cb,
- 0x8329e315, 0x2a368ee7, 0xbf9e6c3f, 0x7cdf896d,
- 0x63f828e0, 0x2ab272f1, 0xb26ea341, 0x9b7e2629,
- 0x6e9bd833, 0xb3854af4, 0x96b1ef6a, 0xea9b6592,
- 0xe6e013e6, 0xc3820c5b, 0x6f5a6220, 0xb75b3567,
- 0xa42cb0b9, 0x8fb548bb, 0xcfff5979, 0x979d91ce,
- 0xb13bc9b8, 0x673e79cd, 0x492fe687, 0xb7ba2648,
- 0x64ccb212, 0xfb543f88, 0x277ff01e, 0xec20a52e,
- 0xb2296fa0, 0x322e74f3, 0x24d0d4d1, 0x03505df8,
- 0x69dc3a7d, 0xa566599d, 0x20c31f7d, 0xee5bd1f0,
- 0x67330476, 0xaed8d573, 0x9b62c233, 0x20cefda4,
- 0x2e33256f, 0x46508926, 0xd3320a20, 0x76cdca63,
- 0xa91ba331, 0x25e93993, 0x4b0e0132, 0x29c837bc,
- 0x9bd487b2, 0xbcd8c521, 0x782b0e0c, 0xd848a100,
- 0x5f26ef2f, 0x94f30206, 0xef66e0c8, 0xed53c059,
- 0x93554cb6, 0x9625cb5a, 0x41fe144a, 0x96c67865,
- 0xea11e45c, 0x6888c5da, 0xaa1dc3ba, 0x29a10939,
- 0x0e4ad56f, 0xb2980a6e, 0x14d07a68, 0x43202e29,
- 0x63c99bb1, 0x479837e7, 0xa3e51598, 0x1b10d440,
- 0xe12d60f0, 0xfdeaa393, 0x751205da, 0xb831d092,
- 0x26833df4, 0x2ae55a7f, 0x231be6e7, 0x3bd668ce,
- 0x848352cf, 0x62bbab65, 0x95ebfdda, 0x88f20a57,
- 0xe74a86ef, 0x251927e4, 0x8b99fccf, 0x332ebee6,
- 0x634411c1, 0x15666f72, 0x4ddc73d4, 0x7997bbf5,
- 0x96e8fa5a, 0x0ad45882, 0x1d1f7c24, 0xa25f7fee,
- 0x95ee1751, 0xa3b656ec, 0x2021eb73, 0xb3bb3693,
- 0xa97c2283, 0x38633213, 0x80b81cc0, 0x334ce9a0,
- 0x41375ee5, 0x24347b99, 0x98d2ddb3, 0x9e1726d3,
- 0xf0a8022f, 0x0f134ede, 0x44be9e28, 0xf827f5b0,
- 0x6df48bf2, 0x8d9d9bc2, 0x4fd15f07, 0xbdc157e0,
- 0x118428ab, 0xbc2d8e0d, 0x0b604386, 0xc6f180e9,
- 0x3f474089, 0x54de30ce, 0x0d0da374, 0x1792dc7c,
- 0xb9a271cd, 0x17e98274, 0x8725e4d8, 0x0d169712,
- 0xa1518c7f, 0x253096ad, 0x51d7f233, 0x5e8faddc,
- 0x2808be53, 0x174a6e0c, 0xba86a1c2, 0x98cca2fa,
- 0x417383f8, 0xe5978b57, 0x99f43641, 0x4d293d51,
- 0x450141fe, 0x6a96f3c8, 0xc8c8677d, 0xbda2ec04,
- 0x12be20cd, 0xa7cda086, 0xda21d3a5, 0x0e8be9bb,
- 0xf40631b7, 0x91467e23, 0xc6f09312, 0x83613b12,
- 0x81da9c4f, 0x80198116, 0xdad19494, 0xc5d3e635,
- 0x1e5cfaf5, 0x850f173b, 0x2cca4022, 0xfc757d5b,
- 0x07fc9103, 0x12cc2c45, 0xd7f3c464, 0x26c90d7e,
- 0xa04e750c, 0xe1cca271, 0x3dda9264, 0xda567d38,
- 0x9e3066f5, 0xf7fd5999, 0x08111fd8, 0xfc76580c,
- 0x8a13f16a, 0xf7e1b476, 0x5f3434d5, 0xa52c965a,
- 0x42e8ad99, 0x249a6347, 0x1d13a355, 0x6b17701d,
- 0x901185a4, 0xc50b6462, 0x2c4dbd61, 0xc74f4735,
- 0x3d1dde43, 0x84f7b921, 0xc3060704, 0x250b28e2,
- 0x036f3bf9, 0xd1f023a2, 0xda40aec8, 0x6140ef41,
- 0x58d87fe8, 0x039891e2, 0xbd187a0e, 0xa4ff16d7,
- 0x43e1b111, 0x6a3f4d6d, 0x9d028c10, 0x9ce3fd6b,
- 0x0896ac1d, 0xa3606262, 0x6a9c65f3, 0x8b1d295d,
- 0xc059e027, 0x7a4b67ad, 0xcab0bd44, 0xe43d1486,
- 0x078c5830, 0x89de4c18, 0xaad1992a, 0xd38258c6,
- 0x26cef574, 0xf42e5861, 0x09727140, 0x08d78503,
- 0x5bcc7b38, 0x8763f064, 0xb45c10a9, 0x53aea628,
- 0xbd6ba731, 0x1ebb1f73, 0x2b4e9529, 0x85a6ede6,
- 0x89bded7c, 0xbf12a8ac, 0x3bb46e44, 0x41a589a8,
- 0x6b7861b1, 0x490613d7, 0x3e06226d, 0x688ae488,
- 0xf58119af, 0x2e03925c, 0x2ee2756f, 0xb3dc7a40,
- 0x9c4dbdc3, 0x5a1d921c, 0xe2d446bd, 0xd9b6ec17,
- 0xa47d74d1, 0xed231a1c, 0x1a592a1a, 0x1e9b3e1a,
- 0xea8df403, 0x5f9fb0c5, 0xa99640b1, 0xb2a2ce58,
- 0x5883712d, 0x06a844e3, 0xeb26f8e0, 0xaaf17987,
- 0x5667fdcb, 0x5b7dfe6f, 0x1a0e7c78, 0xdad14f2c,
- 0xf228fb4d, 0x24ca0bfa, 0x17e07709, 0xcbd545b0,
- 0xe20e3134, 0x96ca6f27, 0x24d8e4a2, 0xcfb48e24,
- 0xdcc1b9ce, 0xd50b1dfd, 0x6dfaa2ff, 0x2cb8fc64,
- 0x5228eef8, 0xacfe8a2f, 0x1fbce9ef, 0x9fa74d73,
- 0x0cca7cde, 0x5d4e021b, 0x9f06871b, 0x36107093,
- 0xa1f28059, 0x6dbafa9d, 0xb9346ec7, 0x2c39cdfc,
- 0x4c3ffa51, 0x7426d72d, 0xea66b084, 0x1278c08c,
- 0xdd8c1a8b, 0x88ada48c, 0xb50eafca, 0x63e4c8b3,
- 0x4c0d5bc4, 0x142222e7, 0x4b5ad5f3, 0x946e5401,
- 0xe562686c, 0x36fc6be9, 0x342e0063, 0x811bbb2d,
- 0x5b0d15e2, 0x31ff5c36, 0x0b317779, 0x305fdf94,
- 0xe9549d9c, 0x2ce6e673, 0xfa149eba, 0xfdb871b0,
- 0xcaf9eb52, 0xcc285a64, 0xd77bdd15, 0x69c4e71e,
- 0xf6f38ff3, 0xe2d1cab4, 0x060e46eb, 0xd74f7a52,
- 0x927334c7, 0x59e6eeb5, 0xd0298c01, 0x634a8c8a,
- 0xd5c9a783, 0x3156b7e4, 0x483058c8, 0xf1d53f86,
- 0x7c400e07, 0xbb84382a, 0x6b17403c, 0xdceecacf,
- 0xb6833efb, 0x452fd3e7, 0x9b8aa623, 0x8792e8c5,
- 0xdb23b93d, 0x6dcf4cd9, 0x540980fd, 0x791ad937,
- 0xee441f41, 0x2bf6c8bd, 0xba80f8e4, 0x2d8e02c6,
- 0xa28aaab3, 0x7fc745ab, 0x1e24e3af, 0xcf895e07,
- 0x2cd347a5, 0x0ac67408, 0xcbae54ee, 0xb3b76622,
- 0xd72dd7b3, 0xab23f09c, 0x8cd5f504, 0x60ac551d,
- 0xe74349de, 0x908b326f, 0xa0936377, 0x52d27d68,
- 0x0dca3eab, 0x70600b2f, 0x4df41c92, 0xfa4177bf,
- 0xab625810, 0x35952e0a, 0x78347f40, 0x9accbad6,
- 0x80e76601, 0x333f2693, 0x88cb1641, 0x4c73988d,
- 0x6e36bec6, 0x1e59adbf, 0xd38dfee8, 0xd372ba32,
- 0x0c4143a2, 0x2cff48ca, 0x0b9848a7, 0x7f9c324b,
- 0x7a546bf2, 0xb8bd8b7f, 0x31c86d93, 0x631f8064,
- 0xaa3c6382, 0x23d4e9f6, 0x3649fbc1, 0x5ce228c9,
- 0x3f1d1399, 0x94a2baaf, 0x77d4b540, 0xa5c893a9,
- 0xf1551a49, 0x7eda3387, 0xc0f554bf, 0x6b8e889e,
- 0x89b285b6, 0x843d7d76, 0x26759d8a, 0x31e6a48a,
- 0xc8f910a9, 0x9e09646d, 0x1bf0887b, 0x8a42e516,
- 0x69eb6219, 0xd67b39f1, 0x1bf54242, 0xe2898566,
- 0xacfb9abe, 0xf9ec45cc, 0xb3fc5810, 0x747370e2,
- 0x18abe2b9, 0xe8887c2d, 0xd9c04e9d, 0xc2dc1417,
- 0xb0dbd1c8, 0xa29d7412, 0x545dabc6, 0x7b2b2c5c,
- 0x3131b60b, 0x4d13aee6, 0xb345a81c, 0x5d91b7d9,
- 0x19389f66, 0x53d66ab6, 0xe16e9b88, 0xe9319c62,
- 0xc8d61b90, 0xffcff3ce, 0x85fa37c5, 0xdb4d940f,
- 0xaf4d39ad, 0xa4d32aaf, 0xfec47d58, 0x1df1b6ac,
- 0xd6a4736b, 0x7caf5969, 0x22bb3f33, 0x2bc42080,
- 0xd2ddc678, 0x8671b635, 0x6463885d, 0xb0bc987c,
- 0x2a3bec77, 0x6f467f2f, 0xb688c138, 0xecf1d0cd,
- 0xd42a491d, 0x43ee9900, 0x1a050f3d, 0x626ad115,
- 0x11cb944c, 0xd12c0ada, 0xe642c2f0, 0x09868c76,
- 0xd625232e, 0xb57ed534, 0xa52b37e3, 0x599e2713,
- 0x9dcddf43, 0x15908f44, 0x618c34ec, 0x12346d74,
- 0x0fd5f43d, 0xcc8a749a, 0x28c7ce51, 0xab790e85,
- 0x241c49d8, 0x6353c8b3, 0xab084bee, 0x033c7851,
- 0xfe24e4bd, 0xec5df3ec, 0x7b7a97af, 0x4cb958a5,
- 0x2e0acbe3, 0x3a456be5, 0x2246b352, 0x237cfbc8,
- 0x9239a212, 0xf769e35c, 0x1e0ced3c, 0xbec19260,
- 0x1a3971b5, 0xf7fad8d8, 0x7f315804, 0xa1f20a52,
- 0x3531ca5a, 0xd69562c5, 0x61b1b8c7, 0xb2966d64,
- 0x2a86880e, 0x1dad2183, 0x0f124f55, 0x4d8f95c5,
- 0x48f22f68, 0x86108de0, 0x6818256b, 0xfb49b17b,
- 0x9162c1e0, 0xcceaa00c, 0x1b70bcab, 0x90cc8cf7,
- 0x5112d0ea, 0x738695b2, 0x74967e89, 0x45422f79,
- 0xab1f8142, 0xc6a9e328, 0xb405ead1, 0x72d9f13c,
- 0xb1132163, 0x8441bbc3, 0x1dca37f5, 0xbbfa84ad,
- 0x7fd9dae5, 0x868aa1ed, 0xc0d214eb, 0x52b94954,
- 0x042a49c3, 0x67d6aba2, 0xb04a10b9, 0x12626778,
- 0xedbc5b58, 0x26fe7db6, 0x05cc02ff, 0xf05b93c0,
- 0xdd28c5dd, 0xc0e8f7b6, 0xd1952270, 0x492e86d9,
- 0x733a6ab8, 0x97f0e762, 0xc277b315, 0x207bae30,
- 0x62b18576, 0xa87be383, 0x75b47de7, 0x71654cf6,
- 0xebe5c393, 0x0146a66e, 0xc229d8e9, 0x4ce9aec2,
- 0xc0835dea, 0x26e68ed8, 0x169c5341, 0xa5dd2853,
- 0xb5b476e8, 0x8389b44f, 0xda71bb79, 0x41c66619,
- 0x4e52798e, 0x6da84880, 0x0ce5c0cd, 0xdd4da889,
- 0x34ef641b, 0x27b020f5, 0xaf2b67db, 0x9de4debd,
- 0x37427915, 0x0f25feb4, 0x0c0ee7cc, 0x1b324d9e,
- 0x307f2c6e, 0x5771871e, 0x72e817a6, 0xcf02b6ae,
- 0x1d0b6ddd, 0x560f5a25, 0xbd857dc8, 0xfb27e4f0,
- 0x4073bd31, 0xd2f5e3e3, 0x02c13db4, 0xd3abbb67,
- 0xfa354973, 0x6b103da5, 0xd5f422d9, 0xb96fba74,
- 0x54a6af06, 0x92ab7c27, 0x8cf506f5, 0xf32eae35,
- 0x52804927, 0xe342df32, 0x9a830e5c, 0x0f29282a,
- 0x76a84159, 0x1d67bb5a, 0x9eace297, 0x22ecce99,
- 0x5a50534c, 0x23742e83, 0x879802fc, 0x4fb14dc3,
- 0x08578e23, 0x6e07d913, 0x2b7f04b5, 0x7143695d,
- 0xe3c00675, 0x4ffe12ab, 0xfcf239e7, 0x07988646,
- 0x3e028808, 0xffa92b70, 0xe0a4983c, 0xba725578,
- 0xd5b9a6f8, 0x98d02235, 0x30586d81, 0x4ff955b6,
- 0xbd6311bf, 0xd01ef581, 0x8ca3ff9b, 0x85addcab,
- 0x7853db0c, 0xdba09b60, 0xe5f0b23b, 0x0b717755,
- 0xc975322a, 0xa2788d2e, 0xb64a06da, 0x440ed7aa,
- 0x527508b5, 0xbb640570, 0xbdd40c8c, 0xa382f705,
- 0x868a3913, 0x0ae11e7a, 0xec7d6d02, 0x85ea41ff,
- 0xd1048c6b, 0xda870fda, 0x2ae6f815, 0x5d24e26f,
- 0xafa72760, 0x61b56160, 0x4a75dc9d, 0xed8a7c83,
- 0xfdb05b07, 0x65478a75, 0x14e557fc, 0x7588350b,
- 0xf40ad263, 0x4cb831f5, 0x90388d9a, 0xf5056b8c,
- 0xa2673bd9, 0x490ae87c, 0x7557280f, 0x5cf607ad,
- 0xf0a7bd77, 0xf1e64efa, 0x2a3aec2a, 0x70d951ee,
- 0xe58fe6e8, 0xa11f32a4, 0x4beb6f2b, 0xa3725110,
- 0x6db2a091, 0x8a698858, 0x5299df97, 0x0ae5e62c,
- 0xa9fdec89, 0xb1838f15, 0x8b3995d7, 0x43963418,
- 0xe4a6c30d, 0x41520619, 0x1d18b481, 0x5cb3e2fd,
- 0x3f081874, 0x57269d09, 0xa0b5a54f, 0xdf7bdb42,
- 0x7cc4b50f, 0xef414e39, 0x2e0f249c, 0xed1b661e,
- 0x7901649a, 0x0bc75b9e, 0x936b26b3, 0x8ff40e47,
- 0xc4fa1eb2, 0x7a64f2f4, 0x875bd077, 0x88ead711,
- 0x68959297, 0x07204abc, 0xad011e59, 0x24a0cd7e,
- 0x2fdcb26b, 0x2574f0d9, 0x0dbd3897, 0x3aa08fae,
- 0x99bcf015, 0xa3b80f2c, 0xa4db9ec0, 0xa68dd712,
- 0xf20d89cd, 0x36f782dd, 0xcb5d3cf5, 0x6c3a2bab,
- 0x6730b232, 0xe6c0aa64, 0xb037a8b8, 0x9e01ee30,
- 0x51e45ba5, 0x493a0e33, 0x7f9fcd83, 0x9d34cf75,
- 0x71480cc7, 0xc90de6c8, 0x1f3a527b, 0x45ff2042,
- 0x8d6be405, 0x7f73ae0c, 0xba765c64, 0x0ad0647a,
- 0x50dd487a, 0x36587af2, 0xbe3544ca, 0x03f087ca,
- 0x3ac4d749, 0x2cfc99df, 0x3e36578d, 0xa4ee1e34,
- 0xb8d5edfa, 0x6a3c56fa, 0x08595b58, 0x3641449f,
- 0x83cb63f4, 0xe21d781b, 0x3f7376d1, 0x3e5519bc,
- 0x83098eaa, 0x2629aed6, 0xaecab3bd, 0x3a35bd86,
- 0x9c94f388, 0x149d6563, 0x3f55d385, 0x11e36afa,
- 0xd4537bc0, 0xd8c41d95, 0x05be0728, 0x7c89b3b8,
- 0x0d6105c7, 0xa7a9d20d, 0xb6b715e8, 0xa8ae3f80,
- 0x4de79620, 0x09eacbad, 0xee3398a9, 0x17df9df5,
- 0x17be1459, 0x1d36a3ec, 0x39dbbe9c, 0x398713e2,
- 0xedbc6b52, 0x1269d55a, 0xf164fcbf, 0xf39b9303,
- 0xda4d5bac, 0x383c6300, 0xfe67d07e, 0xd7ab2d49,
- 0x05cab919, 0x829e73d4, 0x997539d4, 0x87335625,
- 0x7d806858, 0xf1fbf4f0, 0xb52db2ef, 0xe559bc41,
- 0x0e5f4124, 0x74f4a7b0, 0x5df8786c, 0x7426ab33,
- 0x3b6309f7, 0xc01ce056, 0x6fa398a9, 0x9281106f,
- 0x79b7efff, 0xd2d53fdc, 0x58573c60, 0x23e3bcf1,
- 0x4b6802df, 0x861928a9, 0x136c43e4, 0xb4d2b83f,
- 0xb9cdfd3b, 0xf6ebc551, 0x94a58373, 0xba8b08c2,
- 0x3dfbd4dc, 0x81ec9639, 0x2400ae39, 0xd57634c4,
- 0xf1909bb4, 0x35211e33, 0xf90c1a95, 0xede63fc2,
- 0xa6ff6a8a, 0x03019f57, 0x638fedaf, 0x3f08c32a,
- 0xef44c2fe, 0x192be636, 0x65065249, 0xd92ed3ca,
- 0xb01b4d0c, 0xedbc892d, 0xe254f592, 0x5fa231f0,
- 0xef67678a, 0xcf9af85f, 0x49fb312b, 0x7a034dcc,
- 0x26774c4d, 0x83ad53f8, 0xc589fa48, 0x70467c0c,
- 0x90d7ba83, 0x7364b446, 0x670a28c1, 0x9c413fd8,
- 0x029c7b7b, 0x56202d80, 0xa921b3b9, 0xe81420ae,
- 0xb6f4a79a, 0x740ae45d, 0xad61b781, 0xb430bd0e,
- 0x003c8536, 0x3d766704, 0xb3d3ab22, 0x7e7c5c70,
- 0xf80fc991, 0x9f64f222, 0x2d915c44, 0x4f6193f9,
- 0xe1abb1a3, 0x7b82cf39, 0x135d486a, 0x88fe5af5,
- 0x2f9779e1, 0xd2fdc972, 0xd1811806, 0x9c83722e,
- 0xc60086ea, 0xaf84f962, 0x36e6fb7f, 0xa61aa4dd,
- 0x01e1bb77, 0x1c751390, 0x1b77e7f4, 0xe2be36d6,
- 0xb8292297, 0xb2f054b8, 0x1e701bfc, 0x25170bdd,
- 0x6c2c6d1a, 0xcc657a4f, 0x9ee5dc50, 0x0b155065,
- 0x1780e086, 0x78534504, 0xa9d28d97, 0x63ff34c4,
- 0x2d6fc0ac, 0x37c7c572, 0x2454d67a, 0x2077773a,
- 0xeecadc25, 0x82bf1048, 0xe85205c2, 0x2c0139ea,
- 0xe3c16534, 0x870f0910, 0x2b7df30e, 0x689e3adb,
- 0x920f3f94, 0x8a092202, 0xb622606c, 0xf95ca422,
- 0x56e2c6b4, 0xd9772b5b, 0x142a693d, 0x28a6fe17,
- 0xc304b8c5, 0x64aaf0e8, 0x326ac610, 0xc9ef14e8,
- 0x7db4e199, 0x8fa80dba, 0x186f9a1c, 0xed139c43,
- 0xbc1a02ca, 0xd2622d7b, 0xd5785197, 0x67532359,
- 0xe6251f7f, 0x24791a01, 0xa6f9617a, 0x068f379a,
- 0x9658702f, 0xcd15c86e, 0xeb63c3d1, 0xbf1faba7,
- 0xfaa82239, 0x60ec95b8, 0x75f32268, 0x607586c3,
- 0x67e9bbc7, 0xf83ab0e5, 0xc8c424b3, 0x8e0e625d,
- 0x7a76425e, 0x9688584c, 0xcf1191b9, 0xacb7af01,
- 0x8fc7effa, 0x9b06e815, 0x9ae32587, 0x335871e6,
- 0x5598bd8d, 0x5103eb01, 0x945be170, 0x910c7e25,
- 0x43977685, 0x4283ee84, 0x544a0378, 0x862609db,
- 0x3e362679, 0x00da3609, 0xae9e717d, 0x864fbda0,
- 0xc9e7306d, 0x0a9fcffa, 0x2005ca99, 0xa9fea274,
- 0xb46fe47a, 0x2bbfa8f6, 0xbc008fab, 0xcf0c2db9,
- 0x8ad12948, 0x8a1937cc, 0x2624d4d2, 0x78450219,
- 0x7f342366, 0xf96aa90b, 0x4470d76e, 0x3e720ccc,
- 0x591f445e, 0x27af4cdc, 0x3d14c836, 0x0a6ab01e,
- 0xb57c960a, 0x1d537c4c, 0x18a74c89, 0x95604e16,
- 0xe755f0b9, 0x422baebd, 0x65faf8f4, 0x6a6df86a,
- 0xc882aaf9, 0x684f6855, 0x3929a889, 0x41691397,
- 0x9ea53159, 0x32d4dbc0, 0x93847a41, 0x2c1d393c,
- 0x80020c5f, 0x259339b0, 0x8cd51f9f, 0x6838e9a8,
- 0x166840aa, 0x61f979dd, 0x40343536, 0xb1fd9a47,
- 0x8bf2cd23, 0xb68b9c6a, 0x7b698187, 0x9816802c,
- 0x98bb39fa, 0x3ceb6d39, 0x17acbdca, 0x74ae92e4,
- 0xc9f546ae, 0xa624d60e, 0x7dfacb4e, 0x89cd454a,
- 0x20a3a0a4, 0x3ff1abc7, 0x5bef9982, 0xe0049752,
- 0xd2d85fd7, 0xfcd880f3, 0xd8a7009a, 0x4877e331,
- 0xa0a84f42, 0x05561b0c, 0xa5b1f278, 0x41463fd8,
- 0x6c6ff170, 0x57a3af47, 0x0640bc5d, 0xc844af89,
- 0xa0605721, 0x5f8cc946, 0x6dbc2cde, 0xc28b804c,
- 0x6f04314d, 0x63d21346, 0x9bcde6a7, 0x17719258,
- 0xc51ac26d, 0x466fc45b, 0x6174dc34, 0x19d6b3df,
- 0xc7ff264b, 0xf877cdda, 0xa8a600a3, 0x202d1fb7,
- 0x4b8e090f, 0xd39358f8, 0x1ee17661, 0x1e40ffca,
- 0x75e35ba4, 0xe59a0c4d, 0x0a61adf4, 0x14d1e00c,
- 0xbbc93b14, 0xc303b2b3, 0xb20be9a3, 0x7af82e0e,
- 0xfc8d41d4, 0xd9a9f2c7, 0xf12b6eeb, 0xcaa4f967,
- 0x0553b2ec, 0xec31a51d, 0x53fa5204, 0x3b8056e9,
- 0xd7ec1934, 0xbb939a0b, 0x45ca5cdb, 0xa984404e,
- 0xbf5d8c7b, 0xab13bd09, 0x71edce02, 0x1e20f68c,
- 0xb9512246, 0x9810f0f3, 0x5aece9a4, 0x0d23fd0d,
- 0xd317aac2, 0xdf39c8d8, 0x90afcf4d, 0x3dcbdaa4,
- 0xeddbf868, 0x2bcc028d, 0xf9df9b58, 0x27c0fbde,
- 0xb020139f, 0x0972a6a2, 0xea8a27b3, 0x3c2d9baf,
- 0xb300c74e, 0x5fe2906f, 0xf84bb184, 0xb9645b29,
- 0xa8005104, 0x60851a9c, 0xfef0aaa1, 0x169e2106,
- 0x443853f8, 0xbbf653cf, 0x7689b59f, 0x6a920bc4,
- 0x74ca6239, 0xef0e08a5, 0x4ff0dd2a, 0xf8135e14,
- 0x8cf91335, 0x31cf4ac3, 0xd8f42205, 0xf205d095,
- 0x23823bd6, 0xa1d39214, 0x364a5a2e, 0x3a2ff48c,
- 0x7c0d90ef, 0x5955bc5b, 0xcdf49a80, 0x7862500b,
- 0x75505049, 0x9930060b, 0x64cf68fa, 0x6d06afae,
- 0x7259bde3, 0x38493f2e, 0xf9a89c54, 0xec8c1a6d,
- 0xf38d50fb, 0xe4ab264a, 0x9c5d5122, 0xa82e8b35,
- 0xcdf07db8, 0xa74e7e27, 0x5dd6d0cd, 0xbf5cbb8f,
- 0x8162b9f7, 0x6bddaedf, 0x090b3ef2, 0x9b025c4d,
- 0x2bf26547, 0x86caa384, 0xa8259276, 0xf989d33a,
- 0x5488f614, 0x31fcf03b, 0x52a3132f, 0xc2837991,
- 0x83509a0b, 0x2c3fcdee, 0x0537ae30, 0x8bc1ba60,
- 0xcb16f1bd, 0xf5460c9c, 0x8a166a55, 0xc9f88c22,
- 0x2e718e3b, 0xe454a0a0, 0x99df8eeb, 0xfe4e7adc,
- 0x6e36e222, 0xe5bb9d47, 0x3a419c64, 0xfeb5694d,
- 0x2e196303, 0x53b8d25b, 0x14928e84, 0x8fda33b9,
- 0x247eaf10, 0x3edd371b, 0x8b4ca1c2, 0xe7ca3d0d,
- 0xec2bb908, 0x1c7dd6a5, 0xd3d1468a, 0x8d2834d0,
- 0x7e41df91, 0xd89c37b4, 0x737dfca8, 0x3c566c9c,
- 0x46c7cb03, 0x5cd71a59, 0xac854ccc, 0x1597a611,
- 0x652f5f4e, 0x005dd848, 0xb7aa8966, 0xa155d075,
- 0x0a87d1fd, 0x546d265d, 0xbb33b450, 0xb492d8e0,
- 0xf9a1694e, 0xd4244a92, 0xc7c26f5c, 0x225f6159,
- 0xf49f3afd, 0x776ff30f, 0x704f26fd, 0x1b1f560c,
- 0x6a87e915, 0x0d7cdeb7, 0x3aeb9a4d, 0xf4ed2c52,
- 0xd13efa01, 0x3ec1eced, 0x0a130d64, 0x71b6a3ae,
- 0xeee3bfa1, 0xa7d77964, 0xac3d2d56, 0xc1d2aa3c,
- 0x25055366, 0x724b29d1, 0x2ce9de7b, 0x2bd603da,
- 0x28a341f2, 0x36e57918, 0xf0c0c0cd, 0x25de9990,
- 0x372f6e73, 0xd5393f89, 0xd5dad0b4, 0x30743212,
- 0x6f4f7843, 0x456f16a2, 0xc85e73df, 0xc20c95e9,
- 0x030f90f7, 0x98b37b3a, 0x7e8f3bb9, 0x4fe285c9,
- 0xc7765899, 0x6f4dbf22, 0x15c60881, 0x62e5d001,
- 0x74d7822a, 0x815a7a25, 0x80f1ebd7, 0xcc9b102b,
- 0xb7b4ad55, 0x6f65878d, 0x69c4d9dc, 0xdebae9b7,
- 0xc3c2ec6a, 0x857c1e76, 0x31f559b3, 0x7942abb4,
- 0x90d183a5, 0x4fa03963, 0x84bcea25, 0xad93d50c,
- 0x94da5ff3, 0x229373aa, 0x46900b70, 0xa3745b60,
- 0x22a3b687, 0x8a0a8412, 0x028ad475, 0x51332404,
- 0x91280c7e, 0x0f686770, 0xd50a8e90, 0xc7dc1520,
- 0x1b163c11, 0xc10b2636, 0xb7c5233a, 0x146b3459,
- 0x01e08e6d, 0x88a89dd7, 0xa6e2f988, 0x55591de7,
- 0x20ae60c3, 0x23bf3334, 0xea09a5a8, 0x3226d181,
- 0x4ebfbafc, 0x21ceb10a, 0x984174a4, 0x610904dc,
- 0x1624edfd, 0xc91fc912, 0x48ff79be, 0xed3d16d0,
- 0x8232721c, 0xc1ed594a, 0x0778ccc6, 0x7f161551,
- 0xcd9ae8ba, 0xe53dac03, 0x96e9b8fb, 0xb7088571,
- 0xb80974ea, 0x8b8a0338, 0xaa3809f0, 0x72e7da59,
- 0xd9fd5685, 0x8ed0048c, 0x953be388, 0x753408dd,
- 0xae94085b, 0x94abadb7, 0x52ba35e8, 0x127e02e1,
- 0x639fbde9, 0xaf650d0d, 0x04f9c1f3, 0xddec0f69,
- 0xef92d0ff, 0xfdb2a0bb, 0x78c31f55, 0xdfcd1253,
- 0x21f9b437, 0x6d96b9ae, 0x9ab508bc, 0x2a843675,
- 0x836c9a99, 0x7c7933ee, 0x9af932b9, 0xbfa49cd6,
- 0xb1f7c2f3, 0x953cead5, 0x90bee0e2, 0xda99315d,
- 0x62140637, 0xdcdf410c, 0xc3751d69, 0xfc75bc7c,
- 0xfbeabdfb, 0xe0f67c5e, 0x8ac9d95f, 0x07870825,
- 0x8484278b, 0x3a559cf3, 0x3264049f, 0x295974c6,
- 0xc5a808e1, 0xd5d6e802, 0x701cbe5b, 0x7e9245f6,
- 0x49644d13, 0x92457586, 0x2f145d1f, 0xc5670497,
- 0x210fc22a, 0xf09026f9, 0x9b3675c0, 0xb5d99a50,
- 0x9f8b5bf7, 0x6e737ca0, 0x0794339a, 0xd2746376,
- 0xcf24ffc3, 0x6aaaf9d1, 0xb96c0ce5, 0x91e61488,
- 0x954539ef, 0x513fa42b, 0xd66203ee, 0x2e09f57a,
- 0xe47207a6, 0xad33d43f, 0xf99924fd, 0x30ceb1c7,
- 0x5ebaad14, 0xd7ce7d0a, 0x771c2104, 0x6f3597b7,
- 0x2648ec14, 0x84059481, 0x02da1467, 0x6004b004,
- 0xc156e54f, 0xdb1d5a66, 0x398f291f, 0x6cf58bd6,
- 0x71faa784, 0x9b38720a, 0xbe0622bb, 0xcf5b38ff,
- 0xc404b47a, 0xdcdcb0c1, 0xef1efa54, 0xb60eed45,
- 0x4d443f41, 0x58e51159, 0x1d253fb2, 0xaba2c5c3,
- 0x11872665, 0x9e513c97, 0x0d493f56, 0x2bf87766,
- 0x69f6e4fd, 0x1e91a4ae, 0x4b61f4ec, 0x2e5e0626,
- 0x6e6ace05, 0xc43b98db, 0xac8e8669, 0xf95ec0d8,
- 0xad89ff8e, 0x88f90972, 0xf9b05589, 0x3c13846d,
- 0x4448316c, 0xcc4800c2, 0x8f01c44f, 0x1f28885e,
- 0x29136dcf, 0x14ee9bda, 0x183400c9, 0x0f8eec65,
- 0xf01a70c0, 0xefcd882b, 0x28089a41, 0xf1960283,
- 0x6a304282, 0x4e1846a5, 0xd97d243a, 0xb6aba532,
- 0x68cf2bc0, 0xc1b511cb, 0x2bc1f3f5, 0x5659f855,
- 0x6687b98e, 0x79b48a18, 0x72682b2d, 0x66f75745,
- 0x333d9d9c, 0x7624f823, 0x43152327, 0xc913c367,
- 0x694db566, 0x2cf3faf6, 0xde4ee783, 0xf54fd25f,
- 0x92eb9984, 0x62f71803, 0x5c3ec0c0, 0x3e1d4a05,
- 0xbcfd6911, 0x1756d97e, 0xee11b924, 0xf9a803d2,
- 0x63fc94c8, 0x458b2f0f, 0xfb2ae45d, 0x067cd6cd,
- 0x45fc990b, 0xe1403710, 0xaceb4834, 0x3a76ccd4,
- 0xc340814a, 0xadb1cc38, 0x96a1ae39, 0xe81ea938,
- 0x6435318f, 0x6a0180aa, 0x6b2f20b6, 0x61df9ef2,
- 0xbf941e53, 0x79f5ddb9, 0x0d848c5a, 0x3fc2fc47,
- 0x5cff32d4, 0x95d49bf5, 0x65b05a2c, 0x4a6c7418,
- 0x08f9a25d, 0xe36a10ee, 0x445fbb8d, 0x69749917,
- 0x1f0902d3, 0x7941330a, 0x0abf18b8, 0xdb28171b,
- 0x02640aef, 0xe560a1c5, 0x73d720be, 0x5da8b445,
- 0xeadc4577, 0x02682b95, 0xcc302e8f, 0x37634591,
- 0x5a1e5645, 0x8ad209d4, 0x6b99432a, 0x3718ce84,
- 0xccea20b1, 0x0cec519c, 0x2ae37495, 0x010ca622,
- 0x93b1667b, 0x839be883, 0xb096407d, 0x6bdc582b,
- 0x405beef9, 0x6811023c, 0x580359c5, 0xbed39e8f,
- 0x4f0937e7, 0xb586624f, 0xb52b4cea, 0xdcaf93b0,
- 0xcb833f5d, 0x157f06ca, 0x3d54dba9, 0xe1af3819,
- 0x605e8d3b, 0xa4e5cb9d, 0x05ac943a, 0x7724d8a0,
- 0x633fb407, 0xc86c2326, 0x81c77ac0, 0xc52769e8,
- 0xf84a2a36, 0xe2a70a00, 0x196bd072, 0x35fd95c4,
- 0x6c7d3276, 0x3464ba66, 0x0bd21489, 0x984b1c10,
- 0xb794524b, 0x7c8a4e7d, 0x703eb5ca, 0x053eb7a6,
- 0x48c3c863, 0xe7cd55ee, 0x6a108a96, 0xa7f28770,
- 0xe68890ae, 0x598c0913, 0xd85d8d18, 0x0cb27cf1,
- 0x08055f9e, 0x412433d3, 0x8b015149, 0x968b4075,
- 0xaf7df070, 0x9ee63edf, 0x792a72ce, 0x992c0d00,
- 0x9779df2a, 0xce170353, 0x78c5cbae, 0xbf2464b0,
- 0x977bf73b, 0xdb452bb4, 0x6fe55359, 0xd3c129f9,
- 0x1f8500fe, 0xe378b969, 0xa9995fdc, 0xb4d10467,
- 0x38856651, 0x019ca81d, 0x7eac2d66, 0x61101584,
- 0x0e5e2380, 0xd1bfbd8e, 0xcdb75ce9, 0xc4f91f6d,
- 0xf9334a14, 0x2bba6273, 0x21222d99, 0x91832118,
- 0xf8223c69, 0x5aeb1319, 0x57fe1ccf, 0x0d14f39b,
- 0x9f4109c8, 0x062397cb, 0x8a061fa4, 0x92ca82d1,
- 0xd17c8373, 0xb0540892, 0x2e60ec53, 0x628127f0,
- 0x2dfa2fe5, 0x7421e577, 0x35996217, 0x05ca69be,
- 0x4f3ae334, 0x0c9b9154, 0x379adfd2, 0xed84bef1,
- 0xb948de03, 0xcd869ae6, 0x8da93fea, 0x5181c335,
- 0xe14e2dff, 0xcd3fa00c, 0xfcf62e2c, 0x5f10d3c2,
- 0xe86d2227, 0x1a4171c9, 0x951cf0cb, 0xa4f60f3c,
- 0x4256bef6, 0x3e44737a, 0xfba4e163, 0x2e2d16c6,
- 0x45c50d5a, 0x96a8c08d, 0xda3753ae, 0x0bbc18db,
- 0x6af63d90, 0x15e1506c, 0xecc48116, 0x5f2c1881,
- 0xe20c9719, 0x18b3ace3, 0xb71ed8ae, 0xdd99d2cf,
- 0xd46a33f8, 0x6d825283, 0x00eacaab, 0x5784c8ad,
- 0x3442727e, 0x2fb8c3e0, 0x1b527761, 0x23b57599,
- 0xb572276e, 0x3ce4ac6b, 0xbc76a6c5, 0xe115f85c,
- 0xa101ebf1, 0xd362e78b, 0x6f755bb4, 0x9a516124,
- 0xee8bbbd7, 0xbf2b453e, 0xfa0ee0ee, 0x6bdf2401,
- 0xca60b393, 0xcba69624, 0xddf381a4, 0xa0851e9b,
- 0x0c33c7a1, 0x8db2b7dd, 0xe100bcab, 0x793ddf15,
- 0x02206774, 0x2bd4c624, 0xf45b10be, 0xb87a3e59,
- 0xf1bb9661, 0x5a63a609, 0x16c50fb6, 0xa1094c43,
- 0xe96fd079, 0x6c4344b2, 0xb49e47f6, 0xe38292a2,
- 0x27179eb7, 0x2b2bf898, 0x7893b536, 0x82dfe5ca,
- 0x3a3b8201, 0x65b63392, 0x7ccf9846, 0xa0c95525,
- 0x142c18cd, 0x4cba26e8, 0x51b58007, 0x233b0bbe,
- 0x0ab86635, 0x7cbe802e, 0x62541116, 0xb1670d7b,
- 0x1405b57f, 0xf9a6826f, 0x8c84cea7, 0x2c034a26,
- 0x82590047, 0x510ad1d4, 0x317f2e44, 0x624856c7,
- 0x0d53db3f, 0xdeee6f08, 0x95ddedf7, 0x660abc20,
- 0xd01feeeb, 0x6ea13ccc, 0x1a158967, 0x9d67c0c9,
- 0x3c62fbd3, 0x851dc52a, 0x2da0d838, 0x460e571d,
- 0x09c4527a, 0x0020de5b, 0x3c6a90a7, 0xf4dbdebb,
- 0x975313f7, 0xb3ff5265, 0x7fed63c7, 0x81fbed1d,
- 0x1cdcb185, 0x69d78b29, 0x9d5b813a, 0x4e340dce,
- 0x138d7f1a, 0x6bd01d9c, 0x38847ee7, 0x4f6e82cb,
- 0xe5f115b9, 0x681c7306, 0xc2290e84, 0x66083fc5,
- 0x1ea902bc, 0xa3942b4f, 0x8d2095ce, 0x0874aef4,
- 0xd8aa225e, 0x5f18181a, 0x66a00ce6, 0xca7415e2,
- 0xa1e6de21, 0x2d00cbef, 0x2f312795, 0xec4bfaee,
- 0x9c77978a, 0x75da7ffb, 0x4fb0f02a, 0x787a8e03,
- 0x2f7938e9, 0xdf53314b, 0x75c7c3ed, 0x5f74cc87,
- 0x677dc857, 0x25b593c7, 0x892531dd, 0x5b6c2f9a,
- 0xdb81e45d, 0x4e566ef1, 0x7e700ddd, 0xae578f9e,
- 0xcd22b7ac, 0x68dccf95, 0xf9ad9f1d, 0x5fd1907f,
- 0x5fbac465, 0x2dd2f353, 0x4fb4a194, 0x98ebba9c,
- 0x8ef8e873, 0x0d83e5a2, 0x9ad91cd9, 0x31d67aba,
- 0x37f567cd, 0xf6608dd8, 0xc9f15dbd, 0x7ca27d0d,
- 0x51f47bbb, 0xf4dc049c, 0xb2218cde, 0x83e8bc32,
- 0x4dcfe51e, 0xa7e9f9ce, 0x20fb6160, 0x9cb01b7a,
- 0x02299fb9, 0x1bee3b19, 0x21e81857, 0x32221d31,
- 0xe313bb11, 0x81a1efb6, 0xe3f1e910, 0x43aaab21,
- 0xb0f9bd0c, 0x14bdf9a2, 0x5e2358e1, 0xd755bfe0,
- 0xe41c6f5a, 0x4e534e12, 0x01ff6b4a, 0x087f7f6a,
- 0xb19668f0, 0x179a7afb, 0x0c3209d9, 0xbe1e3186,
- 0xecc8955b, 0x7647a8f6, 0x49de5280, 0xb7ff2ddf,
- 0x893d79a2, 0x0c2791af, 0x689b0921, 0x1881fa6d,
- 0x7e367597, 0xc30f9f15, 0x92bb2d5a, 0x3d98f1da,
- 0xb7a57e1d, 0x4228c798, 0xa2ab6b7b, 0x5778fa8b,
- 0x83a6918f, 0xa55f1b54, 0xea9fb5f6, 0x43fab0d4,
- 0xfbb2fb03, 0x69158efd, 0x53e8e345, 0x8065c2b4,
- 0xd86a812b, 0x87aa6e4d, 0x7647f3ba, 0xc2d3761d,
- 0xe67bdb2f, 0xec9f077f, 0x2f8b6942, 0x9222bf72,
- 0x1889c995, 0x69e0b6b0, 0x875cc3e3, 0xa926b149,
- 0xa72a34ac, 0x7099062f, 0x66bef7e4, 0xd0fe6331,
- 0xdbd7443e, 0x395ca345, 0xba700698, 0x8978262e,
- 0xbf61ed0e, 0x43b2d11f, 0xdaf77d24, 0x52232cf9,
- 0x113e7536, 0x88b154ab, 0x3083af78, 0x97ae40dd,
- 0x608313d9, 0x5ab463f2, 0xe4803a5c, 0xd77c6af0,
- 0xdab6eb37, 0x5c333bca, 0xe40bbbc2, 0xd41fed76,
- 0x1423e422, 0x8479f31f, 0x4cbd356c, 0x25100886,
- 0xad84e18f, 0x19e54ac1, 0x2a99f004, 0x2a878779,
- 0x5fc42d6a, 0x5a6a10b4, 0xb0f4c833, 0xae778649,
- 0x7128537f, 0xadad2c5e, 0x24f91fc4, 0xf2514b0f,
- 0xe7fa42c7, 0xb20d35b7, 0x49ac5e1f, 0x440c2c22,
- 0xd81b34db, 0x5309de25, 0x340c4f22, 0x62350846,
- 0x62ea039d, 0xc9e0f959, 0xcb56d744, 0x0fc6b5ca,
- 0xe240581d, 0x187d9829, 0xa1373631, 0xcafd4540,
- 0x34d0afa0, 0x5e2608f8, 0x2ca08662, 0x3c916f89,
- 0x5e7274b6, 0xf83e58b9, 0xfb834192, 0xfe11b4b5,
- 0x21dde53d, 0x782e7c84, 0xca247bdf, 0x7bcd5338,
- 0x49f83851, 0x95b096d6, 0x0dd866cd, 0x685724ca,
- 0xc8aa3773, 0x9018e216, 0xf4190695, 0x8c4b6e94,
- 0x3a0671d4, 0xd8997592, 0x222fe7c9, 0x2623c9d3,
- 0x327aa0d7, 0x9e1794c2, 0x0a0bb3c3, 0x6cd3671b,
- 0x1bb3bb4e, 0xd139d797, 0xa3adc4a7, 0xf4246d67,
- 0x230cb774, 0x553b0638, 0xbc8bbc56, 0x5397e9d5,
- 0xc26ed341, 0xb81bdd0a, 0xc1176e19, 0x45e60e50,
- 0xa26ee624, 0xd5fa3aef, 0xa28794c8, 0xaf1993ac,
- 0xede7170c, 0x3ccd0a47, 0x733faa6c, 0xaec8cca3,
- 0x1d7e74d4, 0xa48de0f8, 0xbfc008f1, 0xbf9c6005,
- 0x8506a8a7, 0xc04d704e, 0x67065415, 0xa32886fa,
- 0xe37aa2ec, 0xbc089645, 0x03af6c14, 0x794e6834,
- 0xf87012ea, 0x4f385ce0, 0x39f73c05, 0xc3d75b08,
- 0x1674cedf, 0x43d1e2a5, 0xebf1b7be, 0x5b3b4b3a,
- 0x7e6df1ce, 0x0613b3fd, 0xa5db6978, 0xc7caff53,
- 0x96b0108f, 0x601cb4bf, 0xde46d211, 0x828b6b32,
- 0x52e78553, 0x743aaf80, 0xf2d8cfc2, 0x5be370f9,
- 0x7ef4cc3c, 0x772fd625, 0x41e5658c, 0x44cd5c1b,
- 0x71c5dcae, 0x9017d706, 0x729e334c, 0xb292c990,
- 0x51e82a17, 0xa2840cad, 0xc7e9518f, 0xa181096d,
- 0xc01c988e, 0x8691c806, 0x92cd7033, 0xfcbc81ce,
- 0xae250082, 0x285194ef, 0x4c5e7800, 0x4855ac18,
- 0x06acf515, 0x8ed6d93f, 0xf583a62d, 0x1d8d9f11,
- 0x94d8ef69, 0x326f449d, 0x1ba2f7d6, 0x1b055014,
- 0x09db36f3, 0x2e2430a6, 0x5d905cac, 0x938948a6,
- 0x40905cd4, 0x665fc374, 0xbfa87fd2, 0x1ee766e7,
- 0xd393dcf6, 0x601ef0ce, 0xc0ed3f09, 0x280181c4,
- 0xdd848627, 0xf85685c8, 0x356c8a83, 0x7eff287b,
- 0x779899db, 0x9ddffad7, 0x21d647dd, 0x907c4483,
- 0x1e3f8e4f, 0x02ce2291, 0xce169039, 0x92cf5562,
- 0x74653c8e, 0xbd2838ff, 0x57302c63, 0x0d616605,
- 0x025fd5bc, 0xbf88ca95, 0x8198871b, 0xf4b0192c,
- 0x25d4b65f, 0xcf012782, 0x0918b438, 0x28789115,
- 0x21dc1471, 0x382e9106, 0x6bafff6b, 0xb8fa48ad,
- 0x04b0d4bb, 0x2b0513d5, 0x52223233, 0x5d008f5c,
- 0x6d5e167d, 0x3d87f2bd, 0xd2204033, 0xfa946278,
- 0x8b5cafb8, 0xafe0e0c6, 0xdb45282e, 0x353e194e,
- 0x29970feb, 0xc130dc37, 0x43f6d2b0, 0x566585fe,
- 0x9f51d2b8, 0xb8b032ad, 0xace2370f, 0x7249ddf7,
- 0x16b3ee7a, 0x6d23855b, 0x33c737d9, 0xa7bb0e23,
- 0x2a9cef4b, 0x21f1ea76, 0x863eaeb4, 0xdc076ab6,
- 0x23a45f8f, 0x700a0817, 0xf3fabdad, 0xb1302b38,
- 0xe3616d6d, 0xd92bb66b, 0x2d5c661d, 0x4b8aadb2,
- 0x18ee2329, 0x05df0b20, 0x4b96d565, 0x6da42df0,
- 0xec2f38b2, 0xfc11b440, 0x6e66a8ec, 0xd923723e,
- 0x8fe0f722, 0x0721702d, 0x099a5300, 0x2ec8aea1,
- 0x8cf80bc1, 0xca6e9152, 0x113953dd, 0xc31cf9a3,
- 0x86ac6d95, 0x84dbd20d, 0x213a941e, 0xcfe09297,
- 0x9fa5080e, 0x4c983621, 0xbac2658f, 0x33a3c43c,
- 0xfef8ce4a, 0xdc543d7c, 0x9d97bb9e, 0xceea4e8c,
- 0x4bd4b509, 0x14400852, 0x2b64bacd, 0xe27af680,
- 0x9a09f9bd, 0x0d2f1f77, 0xae5a85de, 0x62eb7e3b,
- 0xb5dd97c6, 0x7c1458ac, 0x753492be, 0x7aeb2ae7,
- 0x720d12b2, 0x80fb6196, 0x2fc7b5e5, 0x3725d575,
- 0x38e8439d, 0x8049c832, 0x5a708bb1, 0xd5418802,
- 0x26990359, 0x31cd28bc, 0x349afc0e, 0x26b7b0ac,
- 0xba9af5eb, 0x44427299, 0x6e99771d, 0xd5ffdd7e,
- 0x603f66b9, 0xaaa83d07, 0x035d0219, 0xaf5992a0,
- 0x7e55e337, 0x855c960d, 0x0a5bab07, 0x6552279b,
- 0xb5b7bff7, 0xc44f4b0e, 0x5a66d81e, 0x739c09c9,
- 0xdf9ab639, 0xe72d00df, 0x528a7682, 0x12ce8d13,
- 0x2d3f86e9, 0xd7b5671c, 0x58ac53d9, 0x553686a7,
- 0x64c45914, 0xf43f7e47, 0xd5799470, 0xa8456e42,
- 0xb140dfa1, 0x65aaa452, 0x1c66edf7, 0x0f7802d9,
- 0x578d2c7f, 0x49271f89, 0xfdd58d15, 0x6ed577b1,
- 0xa47df9a3, 0x0b9f2c14, 0xb8a6525b, 0x245cff48,
- 0x94421a7d, 0x91b2247d, 0x9fb8614e, 0x00fa2183,
- 0x0661bab7, 0x6c7b39ee, 0x0f2ed28f, 0x6ae9ab1a,
- 0xcc6a097c, 0x68a6551a, 0x3c79b86d, 0x147f2c2d,
- 0x8542f28f, 0x3a832502, 0x03768b4e, 0x3be7ec6d,
- 0x01df90d8, 0xe7161507, 0x122a81c1, 0xd93bf36c,
- 0xe3921860, 0xcf5bdffb, 0xbbe44e3b, 0x79f043cc,
- 0x3f620fba, 0xf045ba2b, 0x4bce3ab5, 0xc9a9b085,
- 0x550bd359, 0xff169881, 0xe63da0bb, 0xf1c6c36f,
- 0xd39b8767, 0x872aef49, 0xe7414aa0, 0x0a4f04c2,
- 0xb8cdcefc, 0x135a5f34, 0x344760ed, 0xd00f9340,
- 0x9391d9e8, 0xba782b9a, 0x25d42530, 0xb4fe6539,
- 0xd56c9c5c, 0x1b9e0128, 0x859ee1cd, 0x2954ba9f,
- 0xe9944e22, 0xf448886a, 0x9c9c247b, 0xacdc40d4,
- 0xfbfaa144, 0xff767be9, 0x73c08f78, 0xd16028ef,
- 0xb5a17a43, 0xba4d7dc1, 0x397b4bb8, 0xd850f99c,
- 0xb6fc563b, 0xfff2b4fd, 0x35486c91, 0xfef035e0,
- 0x442ff5a1, 0x2b9e4f04, 0xd1d0639a, 0xddb80a4c,
- 0x6a5c5470, 0x95185df1, 0x0d65f9d2, 0x78b11287,
- 0xe07972f3, 0xc91e30a6, 0x0fee2147, 0xbff4f124,
- 0x0943f488, 0xd46c2de6, 0xbc7d58b7, 0x489ce432,
- 0xc73d23f7, 0x55666fd5, 0xd4314902, 0xf7cab902,
- 0x46f67f53, 0xcd8dd99f, 0xa709ba57, 0x329c8202,
- 0x7ee68771, 0xd953252c, 0x5edbfd6f, 0xe71a39bd,
- 0xe79d3164, 0x89e9731c, 0xa7a06b56, 0x6b910e4b,
- 0xda2f029a, 0x1a203b71, 0xd79aac7a, 0xc2e368ca,
- 0x15fc9285, 0x9c8019ae, 0xc13e0e09, 0x4da2e4b4,

soc/intel/broadwell/microcode-MC0306D4_0000001F.h

diff --git a/soc/intel/broadwell/microcode-MC0306D4_0000001F.h b/soc/intel/broadwell/microcode-MC0306D4_0000001F.h
deleted file mode 100644
index c2a0b1b..0000000
--- a/soc/intel/broadwell/microcode-MC0306D4_0000001F.h
+++ /dev/null
@@ -1,960 +0,0 @@
-0x00000001, 0x0000001f, 0x02272015, 0x000306d4,
-0x98f2cb63, 0x00000001, 0x000000c0, 0x00003bd0,
-0x00003c00, 0x00000000, 0x00000000, 0x00000000,
-0x00000000, 0x000000a1, 0x00020001, 0x0000001f,
-0x00000000, 0x00000ef1, 0x20150227, 0x00000ef1,
-0x00000001, 0x000306d4, 0x00000000, 0x00000000,
-0x00000000, 0x00000000, 0x00000000, 0x00000000,
-0x00000000, 0x00000000, 0x00000000, 0x00000000,
-0x00000000, 0x00000000, 0x00000000, 0x00000000,
-0x1f069ea2, 0x0a2306ff, 0x173ff07a, 0x7b99c8cc,
-0x7f22922d, 0x170430cd, 0x429e138d, 0x318f580d,
-0xe1d4113f, 0xc3085503, 0x1367060c, 0x9bf7efea,
-0x2b756eb6, 0x2ee07b69, 0x7cfd1dc4, 0x9811c8b2,
-0x86cf4036, 0x20534caf, 0x37046580, 0x432b4e6c,
-0x6a3a2e54, 0x88a74dfc, 0x81a503f6, 0x67736b51,
-0xbc2b11b7, 0xbcf3adc9, 0x96c8eefe, 0x688bcc49,
-0x16c4f996, 0xe0175cd2, 0x454d7a58, 0xa67afd13,
-0x098d9e42, 0xf86d2ec2, 0x738a67a6, 0x26c4ad17,
-0x08666776, 0x050d971d, 0x68998a7c, 0x21ac9cf9,
-0x29e27b61, 0xd61cfd7d, 0x3500ff83, 0xd4123687,
-0x27b72496, 0xe9b867f6, 0x62920d71, 0xe159dd34,
-0x3991c6ba, 0x367a5719, 0x7af5e9df, 0x5cb9fd11,
-0xf5988469, 0x4153f210, 0x24b194a9, 0x8c563988,
-0xac5bfd38, 0xd271e693, 0x16e9b292, 0x0c6583d0,
-0xd2501a4f, 0x9896af00, 0x6665aa9f, 0x0f3a8de9,
-0xc8f0db5f, 0x60b7a546, 0xe3a52963, 0x0ea3eb39,
-0x0d8c08ab, 0x2f5faa26, 0x1d3cbd56, 0xa8596256,
-0x00000011, 0x2a593a4f, 0xb52e7bbd, 0x7cd01657,
-0xf70d6b59, 0x337fb705, 0xbabc09ac, 0x0452df97,
-0x9f518ce9, 0x0a7c0b04, 0x42d3d1f9, 0x802111e6,
-0x32074009, 0xaf90e869, 0xdd5d6191, 0x577d8a86,
-0xa7e4abac, 0xff3d169a, 0xa17905cc, 0x2c3b3ba4,
-0x977b6fcd, 0xddae635b, 0x0b375e0f, 0x4eed4cbb,
-0x18837bc6, 0x7295b246, 0x73200955, 0xd7485a79,
-0x824828b4, 0x7c659693, 0x9c308a06, 0x4d26eac3,
-0x33947df7, 0xf5843aec, 0x3b46d360, 0x2f3e395d,
-0x5581f89f, 0xb6dd812f, 0xb3fd2254, 0xbdab661a,
-0x0f1f4148, 0x7f5b44e6, 0xd0a65879, 0x1a79dfd4,
-0xb75968ba, 0xec08bf8e, 0x154636ea, 0xb0b2c61e,
-0x75d450c8, 0x71ec9307, 0xdce3f377, 0x8e824aa1,
-0xd0e1e50a, 0xd1a68b08, 0xa775d4dd, 0xf574718b,
-0x4bbc0953, 0x943f216d, 0xda241781, 0x1c989056,
-0xf4e27335, 0x690ff365, 0xc77f546e, 0xe4ad9bad,
-0x0e419f89, 0x4bbe4bdd, 0x7035046a, 0x104e638d,
-0xa390f35f, 0xa30af773, 0x5dc6837a, 0x29a8ad38,
-0x0134fe92, 0x6bd3e97e, 0x586d2448, 0xabf1d8a0,
-0x508466e0, 0x90cdb82c, 0xdabc79a4, 0x9444410b,
-0x634565f2, 0xb148c374, 0xedcc1fe0, 0x65fe10b7,
-0xb9f88fed, 0xbba28ad6, 0x56dbb716, 0x64cce345,
-0xe8ef71dc, 0x02406b4f, 0x60a5978e, 0x98bd787f,
-0x0a38ac22, 0x737604e0, 0x3f0e40f8, 0x5a7e61ee,
-0x11b8d362, 0x2cd29805, 0x74aab2c4, 0xa390397e,
-0x02ca2bda, 0x8baa6f3a, 0x40d95ecb, 0x8b4e2e79,
-0x610f41a7, 0xc92e115d, 0x3ce0cfbe, 0x0d934d77,
-0x69963610, 0x29954d77, 0x730701d6, 0x30ae19f7,
-0x18d2a089, 0x240dc6cd, 0x71e13a5b, 0xfa628cd4,
-0xd20c0c99, 0xa8db0927, 0xebad5740, 0xe5c4fdce,
-0x6f9d9aba, 0x1485b3cb, 0x0f981688, 0x1b824b52,
-0x136b5942, 0xfe17994f, 0xa7750af0, 0x2b8e7975,
-0xe317c775, 0x63fd9fc4, 0xc890a20c, 0xb11f7e28,
-0x252fa2cc, 0x0b116346, 0x3053ddbd, 0x069485cb,
-0x6d541484, 0x2d22dd62, 0x8fbf3ee3, 0xa2972fd9,
-0xa005615a, 0x7567a7fd, 0xa8fbab78, 0x659506d5,
-0x4f9c6408, 0x10d6a3fc, 0x286b17bb, 0x24af34d1,
-0xaf408d0d, 0xd95b1532, 0xc4402eb1, 0x11cf7487,
-0xf52abd2c, 0xa2b1b870, 0xeece45a3, 0xa8a950fd,
-0x2054b109, 0xca55d0fa, 0x2990813b, 0x090037cb,
-0x359b14c2, 0xe31dd9b3, 0x69a09a44, 0xb3a31e84,
-0xf4b24efe, 0x1f514a41, 0x41e43b7e, 0xd0fd2a94,
-0x318a10e3, 0xd48fc882, 0xcf5ecaaa, 0xc3b47da6,
-0x0d9f1894, 0x807c6b11, 0x3d181412, 0xa3fc3273,
-0xc9ed337f, 0x62726161, 0x520bc25b, 0x7fa91ac6,
-0x1e8a960e, 0xa6a0fc74, 0x74fa1e5e, 0x1fa14c43,
-0x48fffd50, 0x893560f8, 0x49dea111, 0xb57a531a,
-0xd4996b39, 0x41a51f0a, 0xf3b67079, 0x5a7e8d27,
-0x6947ab77, 0x15855bb7, 0x8559f1d7, 0xb3006868,
-0x8dede562, 0x9d0beda3, 0xd6b1782b, 0x5cbdf71f,
-0x29d41975, 0x75384176, 0x92c33e5e, 0x3a5b6fb5,
-0xa1599851, 0xa98b867b, 0x914bab8d, 0xbb770f27,
-0x431924ec, 0x07c9005a, 0x0055f3d8, 0x01138760,
-0xf61f54be, 0xc59887ab, 0xd8337a99, 0xc6b1aacd,
-0x7adb6637, 0xaf27f2da, 0xcd7027b6, 0x03920e35,
-0xbf04d0a5, 0xc6884a82, 0xbc362c54, 0x8a68994d,
-0x8e9c5850, 0x6fa9814f, 0x630503dd, 0x26042124,
-0x51daa167, 0xb3062744, 0x4645182c, 0x0230be07,
-0x6f7a1129, 0xe0069375, 0x2b928c01, 0x9caf9e5d,
-0xbc228697, 0xc5229801, 0x11a177dd, 0x35181787,
-0x0fb9d896, 0xbc9bdaca, 0xebc4a2f8, 0x3281d0d1,
-0xd2158f48, 0x13e8217f, 0x0dee3566, 0xb4e65d72,
-0x1aff874a, 0xa6f90e31, 0x4f520dc5, 0xd27c6bbf,
-0x5d72bf65, 0x7c719006, 0xa47d54fe, 0x460ac971,
-0xce644fbc, 0x3465e1f2, 0x28c89b4a, 0xc76e238b,
-0x8593b611, 0xbc6e2ad9, 0x02d5a4ac, 0x85215725,
-0xdb600dff, 0x4a0a8d9f, 0xe10d999d, 0x8e09e020,
-0x381c69a3, 0x13a8afba, 0x6f576457, 0xc7f682f8,
-0x1b88ae68, 0x376b6a56, 0x96fc730a, 0x444a2c71,
-0x394f572b, 0xf12a0625, 0xa983894f, 0xa7a096a8,
-0xd8f74329, 0xdf4d7b68, 0x426d336f, 0x3fdbdf01,
-0x2c95ce01, 0x1d41aa69, 0x177527aa, 0xa1bf272b,
-0x01b4de5d, 0x5ab30538, 0xf2649aaf, 0x6b66640e,
-0x3f570264, 0x441433c9, 0xb1037ee1, 0x61fd32b3,
-0x24e42353, 0x9e247832, 0x6665833b, 0x3440b5b6,
-0x4c33b8f9, 0xe1ddfe81, 0x0d0544b9, 0x0473d7da,
-0x271313bc, 0x448b3a22, 0xe4256ca6, 0xf691678f,
-0x0c9cbdc3, 0xe365c81d, 0x00f26298, 0x9cc13562,
-0x8db7fcbb, 0x80ea90b7, 0x036a0fa6, 0x24a39ca8,
-0xe29e78ea, 0xd13502c4, 0x51cebde6, 0x6aa1cd50,
-0x94aee873, 0x748ef7d9, 0x04d612fc, 0x2ff10090,
-0xca826a51, 0x9cfd93c1, 0x8562d7ff, 0x937e0eda,
-0x44468a5c, 0x5821ac56, 0x22178775, 0x7f7313cf,
-0x32eb440d, 0x4450394f, 0x086e6899, 0xca81800c,
-0x1a8558dd, 0x972114b6, 0x011fb0ad, 0x4e09814d,
-0xe9313cad, 0xafff4b70, 0xfd14c73b, 0xc0a5f7c6,
-0x6f0f8582, 0x9c64d8b3, 0x293b350d, 0xef257971,
-0xeed493bc, 0x54d8938d, 0x4d93c058, 0xe5da13ef,
-0xf44f4c79, 0x32403820, 0x032067ec, 0x8216a9dc,
-0x3ddc0f67, 0x2ce1efc1, 0x56c3cc91, 0xab3dff74,
-0xb3671ae5, 0x5e5ac8af, 0xcfc87eca, 0x278d9280,
-0x89e2dc85, 0x99cd4f50, 0x689f3739, 0x20bdac39,
-0xc61df12e, 0xf4edef62, 0xa7fce9fd, 0x79012987,
-0x00b54a13, 0x330c50d7, 0xfc9eb591, 0x323159e7,
-0xc7cb3e80, 0x455cc5da, 0x62022e3d, 0x96c817b3,
-0xd44ed159, 0x18c306d7, 0xe3df9dee, 0x23226798,
-0xaa762905, 0x3614f43b, 0x82a40076, 0xb78ff5d8,
-0xc619af0d, 0x6ce6d22e, 0xdeb4bd1f, 0xd5b5d911,
-0x3a15c9f4, 0x1ebe8824, 0x722b8028, 0x0641dcd0,
-0xcef0fea1, 0xa7594f1a, 0x8a37a77b, 0xde4c71fe,
-0xe6c79d61, 0x30a7585f, 0x60f6e116, 0x28489413,
-0x5a44249a, 0xea505cb5, 0x687210b0, 0xdb90c6dc,
-0x470d5fb8, 0xd422557d, 0x8a8e3c59, 0xefddd8ec,
-0xfd13d958, 0x7b4a5c21, 0x68bac3d3, 0x91d0b6a0,
-0x967f9f2b, 0x35f6250f, 0xeb92edb0, 0xb93a7a37,
-0x0a33e0af, 0x992c8961, 0xa7a37669, 0x802f3cc7,
-0x101373bb, 0x9ca031d9, 0xf12f2d5f, 0x3f6581cb,
-0xe55e5ca4, 0x3c031f3f, 0x22540279, 0xab048602,
-0x1b9d9643, 0xccb336e7, 0xb2e11620, 0x452b412c,
-0xa6744f91, 0xa6055916, 0x2765667e, 0x3198c842,
-0x01de31d9, 0x945bad45, 0x513e08ca, 0x9f0f6aa2,
-0x2af56c95, 0xba1b4c0c, 0xa593b463, 0x5fe348c0,
-0x74d744e7, 0x0b6a15c7, 0x96fd9fa5, 0x2671eaf7,
-0xfc0c0a66, 0xc218a60c, 0x6e3c8f3b, 0x5dd55cc7,
-0xcddd4adb, 0x5e13b715, 0x82206d2c, 0x286ad62e,
-0x8584b302, 0xc1d126c3, 0xbb57d76a, 0x1deda9e7,
-0x5d11b59f, 0x61d68fdc, 0x370983e6, 0xeda38511,
-0x9bef12cc, 0x72a541a5, 0x4b8633e5, 0x53cdaf9a,
-0xb1e9f468, 0xffece346, 0xe6172179, 0xb00abc12,
-0xf3a86fe8, 0x6e441faf, 0x0d68aad8, 0xa545ca13,
-0x2c9b3947, 0x38464fba, 0x154e8905, 0x9b3ac69b,
-0x6e746ff2, 0xe51cf4aa, 0x02abc927, 0xda8fd698,
-0x05422ee3, 0xe718ef25, 0x66bafec8, 0xf091162a,
-0x2b3d1a5d, 0xc41ccdb0, 0x35e060f5, 0xd285ca22,
-0x13341778, 0x0714ba27, 0x394636c3, 0xb45eb252,
-0xee80adcb, 0x48f464b2, 0x8e4b3b1d, 0x8dec8b22,
-0x8b9c8396, 0x2232db45, 0x9e35d49f, 0x27abd3c4,
-0xee2f0380, 0x17584c70, 0xdee0c263, 0xf8ae8075,
-0x5e43cdf7, 0x880757a6, 0x1dd1eaa3, 0x478c30e1,
-0x93912e65, 0x1633570e, 0xe6c39a52, 0x45ed6199,
-0x35d4bec5, 0x6204559c, 0xf2e89bc9, 0xdc10c8c4,
-0x8af43fc1, 0x6662912d, 0x1e3bd55d, 0x304b5347,
-0x3309f391, 0x75aff0fe, 0x9dbb7d5e, 0xb1adc682,
-0xf5c6b0bd, 0x465d5b34, 0x561fa3be, 0xa78b8ee1,
-0x4953ac94, 0xc112164a, 0x45a74008, 0x478dac28,
-0x26d95270, 0xde7a028c, 0x557be388, 0x3f0d51cb,
-0x225ecd21, 0x97a840bc, 0x574ee89b, 0x8aa9305a,
-0xaf8a9249, 0x06c5a6f2, 0x59277a21, 0x08ba62b4,
-0x0c7a2688, 0xf7b941c0, 0x0f6684e4, 0x89472784,
-0x48fbb705, 0xb46fcaf9, 0xa8118053, 0x4cf16106,
-0xf510e50a, 0xe80f2649, 0x7f9a0054, 0x3b172775,
-0x33beb354, 0x2115537d, 0x49b61c1a, 0x1f2b5c80,
-0x9408414c, 0xe1b774cb, 0xfd1d3387, 0xcc7d97bb,
-0xf0d19db9, 0x4ec47822, 0x23f9bd91, 0x730b1d2e,
-0x4d91471b, 0x6b79f37d, 0x448ec7dc, 0xf55acfbc,
-0xc80b369a, 0xa807cda6, 0xcb8cb42d, 0xab26e377,
-0x5395f4be, 0xa985eef6, 0x614f2af0, 0x4f84916d,
-0x681a54b5, 0x8454477b, 0x2c48aa08, 0x28c8a1e9,
-0xe40e564d, 0x8b47f4fa, 0xe62660b1, 0xf182c03f,
-0x0c7b3a8c, 0x78643e54, 0x59bb7bfe, 0x5191b0e6,
-0x71122db4, 0x124067c8, 0x132b495f, 0x68ee54b5,
-0xe2533e49, 0x6b785e5d, 0x71add1f5, 0x2e80eaec,
-0x3a8110d1, 0xd8e3087b, 0x634cdc37, 0xf35df095,
-0x3f806dc3, 0xf64168ef, 0xf3e9e89b, 0xf03b4ee7,
-0x9de86a06, 0x9fa9168d, 0xba36447f, 0xaef8ddbe,
-0x7e73670d, 0x193eeeca, 0xf05816fa, 0x1e82d19f,
-0xec691133, 0x9d63b271, 0xd1696964, 0x2a1479c2,
-0x23867f98, 0xa35a20dd, 0x00879806, 0xa02526aa,
-0xc7f3d8c6, 0x1ecd7f35, 0x08d89131, 0x4ecb97bf,
-0x055eaa59, 0x416ae0e0, 0xc9b44afe, 0x250208ae,
-0x3f9958b3, 0xeb3b547e, 0xd2529709, 0xafc3e174,
-0xb7dd032f, 0xc32da07c, 0x9e013a09, 0xb08a03fe,
-0x97772eb6, 0x1b3e3efd, 0xe9397c50, 0x3df52cc8,
-0xb0041c45, 0x717d7173, 0xca5c6ecf, 0x78d69107,
-0x5d933e65, 0x526f5ec1, 0x48ece316, 0xf299f5c1,
-0x38152782, 0xbf12838f, 0x7c15e69a, 0xe9a4593e,
-0xaf783165, 0xadcbaa68, 0xd2f113b6, 0x82d74721,
-0xd552232f, 0x23b05ebe, 0x35f28349, 0x6b0e290b,
-0x02de01cb, 0x83b5aa2d, 0xbc9614dc, 0xa1302b70,
-0x4b79cf69, 0x83ce8e2b, 0x071e3902, 0x5daa2f8a,
-0x61d313dd, 0x7b1f30b6, 0x084b3fd5, 0x01661017,
-0x1e71622d, 0xb405d6df, 0x8d1c5e96, 0xc16e34db,
-0x65dc0028, 0xfee70038, 0xe028d11c, 0x90590a9e,
-0xad683414, 0x984a735c, 0x34fe173a, 0xeec8510e,
-0x46529302, 0xb8d1c706, 0x71b5e5d5, 0x49c8617a,
-0x54b7f4ed, 0x9ce0b678, 0x87ef6716, 0x37891ee8,
-0x5c71c111, 0xd131cd04, 0x4002762d, 0xf6244078,
-0x7a1c889f, 0x54ad6360, 0xe88a93df, 0x56eaba09,
-0x6c9ed942, 0xc2fa7206, 0x594392bc, 0x61b8b106,
-0xe93dc648, 0x4b012f8f, 0x90321046, 0x624f365f,
-0x2d0266f8, 0x7801bfc2, 0x2473cc0c, 0xef1e3024,
-0x719be625, 0xebb42588, 0xc10f9a7e, 0xcf8ae808,
-0x32987754, 0x6e3c28ad, 0x387f2d67, 0x25988963,
-0xd1f33148, 0xae2362be, 0x9140b1b4, 0x07511c4a,
-0xe6cea485, 0xa850d2f4, 0xe0542b1e, 0x1e3cf0ed,
-0xa6cfaaf8, 0xb52876ef, 0x25381cdc, 0x36ebb0de,
-0xa667aaab, 0xdabadc1a, 0xfbba6f8f, 0x40dede85,
-0x79211be9, 0x1475424c, 0x87b75232, 0x9d21cc0c,
-0xe19a47ce, 0xaed9ec0e, 0x196ce8d8, 0xeb87ac70,
-0x5976c265, 0x028c0d27, 0xf74cc2ea, 0x1af7739b,
-0x080ae051, 0x40a7a918, 0xde1144ed, 0xa0d34124,
-0xd6d8c263, 0x2b7bb99a, 0x8ca1ce82, 0x01bdb504,
-0x1c5ef0db, 0xeea3a156, 0xc640148e, 0xcd4e8959,
-0x4b36c193, 0x87974ae6, 0x29fe50ed, 0xb909b134,
-0x275d61a4, 0xfc37ca27, 0x413e3950, 0xa613a055,
-0x19624706, 0x60aafb9e, 0xa642eade, 0x5f57bbe4,
-0x77c4751d, 0xd3401b7f, 0x62281fa5, 0x9a5a08c2,
-0xaa1b75ff, 0x33b0954b, 0x9f25a8f0, 0x6345fa5f,
-0xf8fd9705, 0x18fa8384, 0x767b035e, 0xd7784ed0,
-0x33aaae82, 0x6be2318c, 0xe55a0ee8, 0xc04a9666,
-0xc63c1e49, 0x797df76e, 0x64802482, 0x7e3e087b,
-0x94ae944a, 0x4fc1a6a9, 0x76c62181, 0x57e493d1,
-0x3f37203e, 0x0569bf47, 0x1223a515, 0x9ee66973,
-0xe77e8f13, 0xd73dd26c, 0x0ed91eb5, 0x73aca35d,
-0x5f8f088f, 0x04b84d54, 0x7fd3f4fd, 0xb00db0fc,
-0xe6783c7e, 0x2f021769, 0x920dcd17, 0x2f9a9d2d,
-0xaaffef0f, 0x0a418724, 0x879fa461, 0x881376ba,
-0x03445b44, 0x11d51c5e, 0x56e0c9f6, 0x4da948ef,
-0x7145b5a0, 0x7dd1a1e7, 0xcad5591a, 0xf3bfe894,
-0x0f1bdaa9, 0x09b12841, 0xc090b19b, 0x240976a9,
-0x224f490d, 0xce1bc8d1, 0x31f56ede, 0x35c39aaa,
-0x9260c63d, 0x126cfb50, 0x3afde290, 0x2d658500,
-0x202ef14a, 0x12b196a1, 0x8e8aee9f, 0xc74d544e,
-0xd265de28, 0xb81d0de7, 0x2e3cee2e, 0xbe816023,
-0xb5c558e3, 0xf9790bae, 0x251d1bb4, 0xc7105e8a,
-0x659777e4, 0x48f4fdb1, 0x445edd4a, 0x364cd241,
-0x40dc3c3e, 0x7c139286, 0xe9a5b56c, 0x3738ab41,
-0x79b40389, 0x1c97d7f8, 0xc78e7ff8, 0xc2000ed9,
-0x1e6690c2, 0x9dd5dc73, 0x71f2ec88, 0xc6ddd5e6,
-0x003d8b55, 0x3d107cca, 0xe396f3b6, 0xd1372f86,
-0x1336b0c7, 0x92cd51bb, 0x5bcc1731, 0x885b0fb2,
-0x8a01d90b, 0xae4bc2d1, 0xf3b6458a, 0x85b4b795,
-0xeecaef1f, 0x7e53bfdd, 0xa8865e9b, 0x9c7a31f1,
-0x64ed41ab, 0xc21ebaa4, 0xbc4dc6f3, 0x95d82eb3,
-0xdf6d5703, 0xe9c54be7, 0xaf968841, 0xa7e0428b,
-0x98a3eb44, 0x51ec3077, 0xd93dafd1, 0x2cd84aae,
-0xeb16e4c1, 0x22e9acb9, 0x2d14fbb4, 0x8f43c00d,
-0x2078629c, 0xd30474e0, 0x5f2e7042, 0x64f836c8,
-0x3f19c483, 0xdefc9c1e, 0x15e748e7, 0xb759d7d0,
-0x4dede366, 0xa6db8d20, 0x0402cc86, 0x73e6f7cb,
-0xa8bfece1, 0x07608a5c, 0xb19baf66, 0x856195b6,
-0xbce061ab, 0x52ff2a15, 0x49ea31f4, 0x547a507e,
-0x9b827120, 0x53dfd0c0, 0x1785c6ad, 0x692e62e4,
-0xb25357d3, 0x2d9654b7, 0xad5b27eb, 0x4c29f8ce,
-0x87a3f033, 0x66629ec0, 0xc3acfaa2, 0xa29cd80c,
-0x0f87658e, 0xa4bc2d2e, 0xce69b0f7, 0x4e2a82fd,
-0x1f1f9eb5, 0x21fbf4d0, 0x96d20ed5, 0xf41a25fe,
-0xf6ccaeba, 0x033e5b6a, 0xd55afc63, 0x403efc01,
-0x1c738a55, 0x32d8444b, 0xdb0dfd17, 0x98f5b763,
-0x00ef82e5, 0x008ed544, 0x57ab6173, 0x513780d1,
-0xb0694df1, 0x3748d9ad, 0x3cd91cdd, 0x7c86b2d5,
-0xb4ac089b, 0x86a37949, 0xdf957211, 0x693d9ee7,
-0xbdc77a56, 0x1b0b8507, 0x836a6f94, 0x6ff94c04,
-0x400269ee, 0xa612ce74, 0xdbd0714b, 0xbcce4dfc,
-0x42bd4e87, 0x75399f96, 0x725b14fc, 0xcc401aae,
-0x3710e081, 0xd9201b35, 0xea0c84ea, 0x4b8f3b3d,
-0xcd50223a, 0xbea4e901, 0x6788c3eb, 0x3182eb28,
-0x1939389b, 0x9d63cd7f, 0xf39a9928, 0xad8a5fd9,
-0x88006cf8, 0xdf78e093, 0x4411e76f, 0x4047d52b,
-0x136ff827, 0xcd250e3e, 0x34511b56, 0x588457d0,
-0x07d438cd, 0xc5fc6cb4, 0x09687297, 0xdf92ae91,
-0x33deb829, 0xdc2afe9c, 0xd6d85006, 0xde5a3b50,
-0x69721a5f, 0xdeaec7bb, 0x711c2523, 0xc51258ca,
-0x278e258a, 0x997fb66b, 0x01a2fff5, 0x2c76c25b,
-0x63353c80, 0x68dac3ad, 0x0daadacf, 0xaf0674e0,
-0x20762991, 0x86c3ba7e, 0xb5ec502b, 0x1dd5d7a1,
-0x8f8c2a99, 0x1e4bd148, 0x9682596e, 0xad0ab57c,
-0x613510fb, 0xbdc07ad3, 0xf1a0ea8e, 0x2a2d44e1,
-0xd4cfe792, 0x317b3158, 0xd4199c43, 0xb2e41b8a,
-0xee03df7a, 0x94c4d2a0, 0x86cbb98a, 0x641c353f,
-0x7fb885f3, 0x98e053d1, 0xe30263cf, 0x281ef91b,
-0xee0cbd1a, 0xbc721f58, 0x07d7d346, 0xc6d2a0e1,
-0x38b0012f, 0x1efa8bdd, 0xfd3e24e2, 0xd575d264,
-0xa69a0c18, 0xc16da4ca, 0xd3292c1d, 0x664d6af7,
-0x001400ab, 0x2812b834, 0x9c0d7ee0, 0x1a16960f,
-0x4b14fa2e, 0x210a5a20, 0x6b49ee35, 0xa7c85348,
-0xe2c2bdb3, 0x1aa87da2, 0x01072881, 0x38ce0114,
-0x2dee475c, 0x16053358, 0x7490c59a, 0xaccc2b66,
-0xa01566d9, 0x92211575, 0xe7791906, 0x2b20a635,
-0x99c8a266, 0x9eaf000a, 0xdd30518c, 0x6dc28f7e,
-0x539abd0d, 0xe79abf2e, 0x08dd29a7, 0xdf7a7e27,
-0x7a9c63b4, 0x38741bbf, 0x5f0d57e7, 0xfc25b4f9,
-0x5f8f7095, 0x254e6ebb, 0x82b3fe34, 0x153e6c32,
-0x5ee0e912, 0xa5902a47, 0x50d872ac, 0xe1652343,
-0x027db2eb, 0x5862549d, 0xad3145f7, 0xc59d6047,
-0x35068f4b, 0xaec8a5e3, 0x8c92a645, 0x0ca022cb,
-0xe770ca78, 0x94f37158, 0xcdc25fad, 0x184b5d45,
-0xdcf5ed1e, 0x4136bcd3, 0xddc05f20, 0xe42e9335,
-0xf51caf82, 0x5438bf31, 0x38cf3ba6, 0x7342173a,
-0xc31d2a77, 0xd468e588, 0xf45cb7ee, 0x4f6047bf,
-0x437e9256, 0x000bd44c, 0xabbdd98a, 0xfa432714,
-0x5c3194a3, 0x430a1019, 0xb0c8cc47, 0xad3953bf,
-0xa5d9b67b, 0xfac42d35, 0xdb10db40, 0x16980d77,
-0xf723b80e, 0x5667cb48, 0x1e97cd71, 0xdd143d5c,
-0x13431e43, 0x55efe397, 0xaac1405b, 0x5b58ea72,
-0x03c7e143, 0xf9ccc443, 0xef487a57, 0x518867af,
-0xbbf345f7, 0xb5719fbe, 0x2b769f21, 0xb670398c,
-0x99653f47, 0x8b1294d1, 0xcaf443e8, 0x9fdb1911,
-0x6eb4238c, 0xbd09c3df, 0xebe271cd, 0x253918bf,
-0x15256bb5, 0x9b038752, 0x62994ed4, 0xc6b9bbd8,
-0x59a86deb, 0x93e6d3f3, 0x8984ef1f, 0xa6aa6a87,
-0xfb457670, 0x343ab5a1, 0x897bca28, 0x05a8c533,
-0x9df39afe, 0xf415b462, 0x17ca34dc, 0x6c258a53,
-0x537df2f5, 0x54781a56, 0x80bd3611, 0xa14d525c,
-0x808c25d0, 0x3b03bc3b, 0xb7910e40, 0xa7d47a27,
-0xf6464579, 0xa7bdec3b, 0x913ace0a, 0x4fbe037a,
-0x097aded5, 0x38db17f5, 0x3af17741, 0x85eed4b0,
-0xcc27c19b, 0xeb0fc178, 0x1d27bf99, 0xdbe83d1d,
-0x5be099f2, 0xe63de74b, 0x27bf4d72, 0xb5772545,
-0xaeb3036f, 0xb2fbb01f, 0x87672d87, 0xc85dad91,
-0xd79dac3a, 0xb9a72b79, 0x926d5574, 0x2b436a55,
-0xa43e2397, 0x767b52d4, 0x54525fa8, 0x3b772538,
-0xe4aab8a8, 0xfcfcba2c, 0xbbbcf34f, 0x920b794e,
-0xbaa1b6ba, 0xe8709ed1, 0x0351bac4, 0x8c400515,
-0xc1f20bb6, 0x8750d6c8, 0x057ae04d, 0xdf79b16c,
-0xb5545463, 0xfb444ee7, 0x32229f3d, 0x3e044d22,
-0xf73c2c29, 0xcfa58cec, 0xe6212f6c, 0x7dbadef6,
-0x7268a6be, 0xee112911, 0xc2aa1e09, 0x821689a7,
-0x341e89aa, 0x183b2cbd, 0x1feb6652, 0xc17e0aa4,
-0xf9865ddf, 0x04bfa436, 0x227ff502, 0x4768f03e,
-0xf1670a85, 0x475ba969, 0x684a813a, 0x42e44f99,
-0x43ebde01, 0xc2c8ea5d, 0x41e659d3, 0x16b90304,
-0x9abc7c22, 0x2f63583b, 0xfed6230f, 0xc52baec7,
-0xb98372e2, 0xd5a341cc, 0x7e9e949e, 0x3e33d9a1,
-0x2e075580, 0x3516b5f2, 0xd3050ab4, 0x039570a9,
-0x11331061, 0xf36efced, 0xe92973a0, 0x3b086d9e,
-0x4b33e5cf, 0x614afaf4, 0x75fe1cff, 0x87f4111e,
-0x34ae55e8, 0xcd84ff31, 0x302a2247, 0x7d15c462,
-0xf769a2f1, 0x3483d210, 0x60b596df, 0x57931eaf,
-0x798db80b, 0x88c3ba5a, 0x1b556d23, 0xa18a4639,
-0x41eb3780, 0x3bbffd75, 0xeee5f6fc, 0xa7ae0061,
-0xd3186015, 0xa7e1ffcf, 0x050c267e, 0xb7c1d65a,
-0x3b4948bd, 0x9cdd525e, 0x115a27ed, 0x2ce376f1,
-0x57aa6b77, 0x2bcdce85, 0x8efd5c4d, 0xbd7dc796,
-0xbe636628, 0x608b0625, 0x57abf463, 0xc2c5cc09,
-0xad9952d1, 0x95fce3e8, 0xe303594c, 0x452ff90b,
-0x04aa6ca9, 0xb5d03cf9, 0x7e286f02, 0x21a01962,
-0xc945b368, 0x859ba756, 0x5d47faa5, 0x586f7331,
-0x407120e4, 0x236b41dd, 0x32aecdb5, 0xf5955d6b,
-0x5ca64aa4, 0xd52a62a8, 0x4e59a1d3, 0x92fee48d,
-0xbc40ea60, 0xfe83fb4b, 0xa0cca1ec, 0xd49fa467,
-0x0cb1c449, 0xa7fb4a7f, 0x81396a5b, 0x852d6adf,
-0x73d80abd, 0xc9c42957, 0x05249e74, 0x66f0ee02,
-0x5fefa552, 0xcc363ecb, 0x2372a7e4, 0x4a298134,
-0x9748aad5, 0xc35bb3f3, 0xfd793da5, 0x414469c1,
-0x6b6b390d, 0x16ac6b6a, 0xac3755af, 0x5fed79c5,
-0x6c4b2a09, 0x4434a034, 0x2087737d, 0x21701fa8,
-0x50b28c3d, 0x6e17b2b6, 0xd4798c39, 0x52f80a1b,
-0x0b0f8ecc, 0x822afd99, 0x66f3884a, 0x2e6afc98,
-0xca5ab829, 0xfc077d35, 0x469dfcf1, 0x7b0511a9,
-0xea788e04, 0x23320c18, 0x44bf109c, 0xc13701c3,
-0x704b1f8c, 0x1bde329c, 0x6c77ae8a, 0xc0e39ee6,
-0xf8a7c5ac, 0xcb004bce, 0x83703453, 0x58e633c6,
-0x8e6112ba, 0x755eb3f4, 0x515f69f4, 0xaad7c783,
-0x9cf8a94b, 0x02d3aaa5, 0xc70a185f, 0xa9b73bdb,
-0x7df3e387, 0x35e4858a, 0xe61f3331, 0x3ca367fa,
-0xb2f67e7f, 0xd93a9a70, 0x8147a8be, 0x5c8cd0ec,
-0x6a1ecf0b, 0x99891fda, 0x59e53ba8, 0xa1b9e0cc,
-0x0415f2cb, 0x5e49b62d, 0xa830178b, 0x7c0fad53,
-0xdc61ffdc, 0x97561c0a, 0xd067d48b, 0x63b87817,
-0x48d9806e, 0x07a4f3f2, 0x1fbe0bc4, 0x5f9e4499,
-0x6bd7cb79, 0xf599aa3b, 0xcdc89f2a, 0xc5cbba79,
-0x5be53374, 0x6da5ea1a, 0xea26dc9f, 0x10bfdda2,
-0x6bc77cdc, 0x30e51a43, 0xcad57aa5, 0x50c518aa,
-0xcaebc03c, 0x768eb4dc, 0xa3250f05, 0x902ed578,
-0xbe424811, 0x80b1d6b4, 0x3e1b1dea, 0xa5fb86f7,
-0x11cc5601, 0x26ac6b8e, 0xceeb0c27, 0xfa7b918d,
-0x22873dea, 0x898f4eb9, 0xb7f3e958, 0xd2927321,
-0xde65a6d5, 0xe8f078ec, 0xe21317c5, 0xa1058eb0,
-0xa08242e8, 0x9c64219e, 0x0868b4de, 0x3fb16b88,
-0x6674516f, 0x1a7fd6ad, 0x702916c4, 0x7911e2d2,
-0xd828d411, 0xbdfcfdb1, 0xa3080a68, 0x05f56aeb,
-0xefa98cad, 0x6c4ff3f5, 0xb527f081, 0x110866c3,
-0x2f08ac56, 0x1a3c02e1, 0x06aa15b0, 0x1986e73d,
-0x614c3e39, 0xd3a92e89, 0x3a39a0d1, 0x355cc8c2,
-0x2bcdeeab, 0xd54298a9, 0xb93bf35a, 0xc1641f4f,
-0x9da1302a, 0xb732367a, 0x94a58ace, 0xefd937f4,
-0x9d5b74b5, 0x372b82c0, 0x47d5e9fe, 0xe2b50278,
-0x53f38eb2, 0xdec29353, 0xeb2bc8a2, 0xa069d19d,
-0x1540718c, 0xfccbca1e, 0x282002f0, 0xb3027bea,
-0xdc0b2916, 0x672cc35e, 0xddf868bb, 0x0f4ac8ee,
-0x981f694d, 0x38047925, 0x8fd8622b, 0xb36935f9,
-0xf4cc98fe, 0xbc6aae70, 0x83787550, 0x21a0ff54,
-0x6a60a164, 0xde92fe12, 0x4a27da24, 0x46536c19,
-0x07849d3e, 0x3ac73fd7, 0x74b5d72e, 0x223729dd,
-0xbec3aee4, 0x4502f2af, 0x3c59791d, 0xc8da682f,
-0x3fcf370f, 0xc29cfb07, 0xacb5ab7b, 0x78f1dfe0,
-0x7482343d, 0xca9e4c15, 0x87365883, 0xd88688a6,
-0xf74af3f2, 0x54f1c12e, 0xbce15db6, 0x27d60856,
-0x05e39a6a, 0x0eef82ae, 0x04097868, 0x2771f800,
-0xf15566db, 0xad41a104, 0x07474703, 0x79b675a1,
-0x2c8f0b70, 0xa3ad098e, 0x847c67c6, 0x9f7e5c4e,
-0x28b9ed3e, 0xc93dbc2f, 0xc627e2cd, 0xeba67c78,
-0xdbdc5484, 0x7d30d4ae, 0xa6380785, 0x8b3420b6,
-0x438f4254, 0x0bea88c0, 0x671bb967, 0xed79eb1c,
-0x1f8fa6fc, 0x177b3f5b, 0xf05ee11e, 0x3ea6bbf2,
-0xd2b47190, 0x855bad70, 0x127bd36b, 0xc8ad1a44,
-0xf3f42a3f, 0xac3497d7, 0x9cfa9851, 0xb7d1c13b,
-0x5373d24e, 0x21ff3e0d, 0xafae6ef3, 0xa4013206,
-0x73eeddaf, 0x42c156b2, 0xc7fe2dd3, 0x145bf184,
-0x2fe6dab6, 0xd1b144bc, 0xa6c308d9, 0x12dbf5b6,
-0xd4257d15, 0x57e981e3, 0xa5dfc494, 0xff157ac1,
-0x024cadbd, 0x6e949933, 0x8b4cbe62, 0x12043c49,
-0x749e3ee4, 0x9f40b99a, 0x6b8c2052, 0xe9dca3b3,
-0x3caadac7, 0x0d64d8c7, 0xbe0b2cb9, 0x4ec30497,
-0xa2f57e52, 0x99b2ed18, 0xd98754d7, 0x37d5cc4a,
-0xb99021d7, 0x7a49c9e6, 0xf79e2af6, 0xc7cdaad1,
-0x81c1fb99, 0xae29b4ca, 0x20415b46, 0x5a5371cb,
-0x0fc36751, 0x2dfed914, 0xd407638f, 0x25efe5df,
-0x84b00494, 0xb5977793, 0xd417fc81, 0x00af5d73,
-0xa2ca1569, 0x1ec76fbd, 0x82ca9d4b, 0xa3e86497,
-0x1fc8a46d, 0x7bf3e175, 0x9a503c48, 0x02118c16,
-0x7a25c4d1, 0x31332427, 0xbb882bb2, 0x19cbee5d,
-0xac520e13, 0xef1f5584, 0x756a82f5, 0x64ac6bdb,
-0xd1a323fa, 0x3cf6e026, 0xb2bb85a1, 0x8a296440,
-0x9d5b1c26, 0xf64b13a9, 0x7d94ae23, 0xb818836d,
-0xccd27476, 0x1e531d3a, 0xe759909e, 0x61330930,
-0x945d45bb, 0xde189499, 0xd3a97b03, 0xdbf820d4,
-0x5c48b363, 0x54e60f56, 0x91e1a643, 0x44fc0c35,
-0x76af2cde, 0xe9892d0c, 0x2a9a95ca, 0xa76d2b5e,
-0x7dc456ad, 0x4efad0a4, 0xcf0b5016, 0x789a6fe2,
-0xbd3f052e, 0x296feeca, 0xbe091740, 0x6d11f3b3,
-0xb3bbebaf, 0xb94783ef, 0x884117ca, 0x00323b08,
-0xc166bb09, 0xd7c1ae38, 0x5b45b53c, 0x36c635ec,
-0xb60f46c0, 0x8a760954, 0xa270ea22, 0x46941bf1,
-0xec6d90d2, 0x592f49af, 0x22e81fc4, 0x7fbfc686,
-0x6fc884c9, 0xd0b25f5f, 0x1b23b14e, 0x32cbbfc5,
-0xecb629b8, 0x70a98de5, 0xadf50207, 0x194b2262,
-0x5a4fa0a4, 0xf43f1f08, 0xe33e6165, 0xcf8b3f31,
-0x38bc5569, 0xa8805acf, 0x7a843227, 0x81d0b0f3,
-0xec7f3143, 0xfe2bbe62, 0x9f2b24aa, 0x14231203,
-0xa5a6da36, 0x714a74c6, 0x330e6e67, 0xabefbaef,
-0x1b1dd580, 0x2ca2bd8e, 0xc467996f, 0x00d34079,
-0x00429a29, 0x6bcde5e6, 0xec69c13a, 0x3140cece,
-0xcc2a82fd, 0x2500c0c8, 0x513c5921, 0xedd4f49e,
-0x74cb8913, 0x6e3e6293, 0xb1c67753, 0x8b67d3f4,
-0xa4b1c752, 0xfc6a834b, 0xb7a0d714, 0xc944c9c1,
-0x4fc9b470, 0x061b0c18, 0xf696f3c2, 0x3776dacc,
-0x0c99f829, 0x30fe44ac, 0x21367a94, 0x04737096,
-0x034cecb7, 0xfc2d2dd6, 0x11d28c96, 0x254649d4,
-0x80717d44, 0x491d7517, 0xe3167aa4, 0x5189f4ca,
-0x9b91d6f4, 0x3d1e5076, 0x2194a1a7, 0x5ebbdeb9,
-0xb9f49728, 0x02cf4226, 0xf2a0abce, 0xab254dd2,
-0x6ae93909, 0xaa70382f, 0xc366e65e, 0x7ca562bd,
-0x783c6456, 0x01c9d2ee, 0x65317fbd, 0x364653f8,
-0x4e9a7d20, 0xd0ae9cb9, 0x361552ce, 0x9b5e9cc2,
-0x57726910, 0xf49e6625, 0xcc26972c, 0x451a80b4,
-0x521d4c93, 0xaacb9500, 0x76cf9df2, 0x7e2db3e3,
-0x1d0b83de, 0xa6d69891, 0x144932e4, 0xa442a722,
-0xe41fc78c, 0x8a73f99d, 0x20899441, 0x8481179e,
-0x92275284, 0x2ce6f668, 0x938f92c9, 0xd218589e,
-0xa0df5300, 0x2fb7ac43, 0x5767316a, 0x32cd7b53,
-0xe997a490, 0xdca1715d, 0xf5f17c33, 0x621f49df,
-0xe3d7b99f, 0x7c8f4331, 0xe1025d25, 0xc2fa0d4a,
-0x6a9da8f4, 0x0395b004, 0x228a8c81, 0x2b4fafb0,
-0x9427abfe, 0x6ce86103, 0xdb212ee4, 0x88e19cea,
-0x3e8f9936, 0xf1187f22, 0x0c86de30, 0x02b81dea,
-0x0c0807bd, 0xdb1c6a83, 0x76b08d81, 0xe43f6354,
-0x824f70d8, 0x4ce0cb31, 0x4c3fe027, 0xf4b250e8,
-0x955c602e, 0x59da7004, 0xcc54f568, 0x6d72c94e,
-0xffc0a445, 0x1866a927, 0x37d0eafe, 0x584abb12,
-0xfa46faec, 0x59408c15, 0xdc85068b, 0x47cc74ae,
-0x475ede79, 0xb6f137c8, 0xc55e1567, 0xbfa37cf5,
-0x8d062147, 0x2ea225a2, 0xf043aab0, 0x62707350,
-0x9919c8d8, 0x90e58692, 0xe4c7c1c5, 0xcaa3be78,
-0x6c38b413, 0x1f289b32, 0x6bb32460, 0x5e70ef1f,
-0x479f2c77, 0xf5069948, 0x0da50955, 0xe17a1878,
-0xe8151e76, 0x14b20607, 0x41aa91e8, 0x82e9108d,
-0x31d48770, 0xf7c9c360, 0x4fe655b7, 0x55cf43ad,
-0xbd6f4553, 0xf3b8ef92, 0x1e5bb4e3, 0xd8e2eb5c,
-0x6c909f55, 0x37387817, 0x00eb07d7, 0xf8fb0885,
-0x63525d50, 0x4d24a430, 0x6b89499e, 0x289202a0,
-0x77a99b3b, 0x70f86943, 0x59ab6e09, 0x93a9327c,
-0x63987247, 0x0df65544, 0x159eca84, 0x53e6de2d,
-0xe8c16662, 0xe199fab0, 0x89bcbb13, 0x2943b530,
-0x90f99cd0, 0x00f64ae1, 0x43ab81fe, 0x727c247b,
-0xa34ee11f, 0x241f1a09, 0xb151d900, 0x6edb9e4f,
-0xa7280421, 0x8b2513d6, 0xe4bb5cd3, 0xa7059c7d,
-0x04727235, 0xc36cb645, 0xf2f2a112, 0x35251a1b,
-0xa92f75b8, 0x1d600bcd, 0x0e8c657c, 0xefe9f4b6,
-0x79f682ec, 0xe5794115, 0x36c509d9, 0xdca60128,
-0x04eb9063, 0x079199dc, 0x0cfe47fa, 0xa27b9a97,
-0xc8507c51, 0x2f310f61, 0xb6fea3b4, 0x195ce36b,
-0x9b64eff1, 0xc744137b, 0x1c14f0b8, 0xf63020a7,
-0x70abf5ca, 0x6b8dec25, 0x690ad42a, 0x23f10e91,
-0x5e888995, 0x5d82b97f, 0x9cf9e5ae, 0x07b299c5,
-0x8064add5, 0xd6e2e320, 0x1eff6f3c, 0xb51450c3,
-0xcbc80f7e, 0x27a67315, 0xccc201c5, 0xe50149b2,
-0xe07f5351, 0xe79dfc1c, 0xd224454d, 0x427a0f88,
-0xce46c609, 0x5c006c2f, 0xbbb766b1, 0x4824f8d0,
-0xc64e6399, 0x13c8d1af, 0x377e4e91, 0x0b093cd4,
-0xe7f074c7, 0x9bc527b9, 0xc61a885c, 0xd918d982,
-0x94426afa, 0x27d4133d, 0x7658a44e, 0xb13a9f49,
-0xc9fc779b, 0xe1d1de65, 0x503dad61, 0x08982649,
-0x80e1a8f1, 0xf6e284ae, 0x02d135a7, 0x820500aa,
-0x53bc7901, 0x19dfc3a4, 0x8cf5ccd0, 0x3582803f,
-0xbaaed821, 0x4ac3cf21, 0x98a349be, 0x74b1ec4d,
-0x2c2293e1, 0x16c4d205, 0x7dfa9861, 0x6f7bd464,
-0xd2631ea1, 0xdd8f2846, 0xeb65369d, 0x5661713c,
-0x4311a686, 0xf12d41d0, 0x9abaa411, 0x809c8f50,
-0xe858c916, 0x1322b8e9, 0x398e253c, 0x80269944,
-0x3a763bca, 0x485ff4dc, 0xea43f63a, 0x366ac8cb,
-0x50f6c323, 0xe4488cb4, 0x6fb7aba2, 0x8e8fe968,
-0x7b471e4d, 0xe757a264, 0xc2c6b30e, 0xafa8d30e,
-0x118e05ee, 0xb3c366d6, 0x393d420f, 0x342fe6a5,
-0x926b1808, 0x6ae9cea7, 0xe124edda, 0x7232bc5e,
-0x640cae9d, 0xf2ce0342, 0x03c2b056, 0x82fccf1c,
-0x1a2b1f2c, 0x379c694b, 0x1b3c877f, 0xb40ae070,
-0xac553eb6, 0x3e983a84, 0xc63aa51c, 0xbb42c5c3,
-0xc9de0a7c, 0x4d4c414d, 0x7eb8613e, 0xe448468d,
-0x87b81f7e, 0xa68e38e4, 0xf244c178, 0x50949caf,
-0x65658218, 0x1b59a702, 0x8e75541c, 0x4c4162f7,
-0x357203c8, 0x7e2f41b5, 0x732ab282, 0xc5a7cb65,
-0x35efdf16, 0xd635dc11, 0xa46f05ca, 0x7991e6c4,
-0x4aa81e5f, 0x8964efd4, 0x07bed236, 0x13cd5b6f,
-0xcffef4e0, 0x2c7e35a5, 0xaa307373, 0xde63886f,
-0x31d0bd36, 0x306f5fb4, 0x57116cde, 0xff2aff5d,
-0x273d748a, 0x6e199a7f, 0x607b6595, 0xbd80d275,
-0xe9eb047e, 0x0c8535f5, 0x70c131e4, 0x17f7a0f7,
-0xa197d4e6, 0xd37cc42d, 0x9e7504b0, 0x280135f0,
-0xa2651713, 0x293a38b6, 0x961c7649, 0xaaf961d4,
-0x736f1444, 0xd45825ea, 0xf4e409b3, 0xa53a3856,
-0xb65c87a5, 0x699b15df, 0x9eed1189, 0x679fb567,
-0xe407d9c0, 0x8b2d3656, 0x4b7a165f, 0x166008b1,
-0x85ad570c, 0x2178ba57, 0x5eed7b6a, 0x3f607980,
-0x47cadf46, 0xcea68c10, 0x80d4b283, 0xba7b78b7,
-0xa3a9247d, 0xd6235130, 0x4d5280db, 0x9b4fb981,
-0x2c646ace, 0x6337b0e2, 0x7d1fcdeb, 0x1b253f55,
-0x8377d75b, 0x36b0148a, 0x271f1dcf, 0x1947a673,
-0xd0f7b589, 0xf466f9f4, 0xd6575cc2, 0x4afbb7b5,
-0xe2e699f8, 0xf54b7805, 0x523716fd, 0x54e7cb11,
-0xd394b2a5, 0xca02df8c, 0x69fd17ac, 0xc741f088,
-0xe2897b93, 0x0150c5f3, 0xab38c8dd, 0x09a73d2f,
-0xba08c03e, 0xaa9fbb8a, 0x2172a607, 0x12934bcc,
-0x04b43c78, 0x1743d8f6, 0xdead3b3a, 0xdefd6063,
-0x311a1e55, 0xea2b27e4, 0x40021203, 0xa401ab04,
-0x3bb5769a, 0x43b32d32, 0xf184bd39, 0x55ba5935,
-0x4b25c78c, 0x112907e6, 0xc9388673, 0xa7ef8ce5,
-0xbe376f8b, 0x1a225ede, 0x06177213, 0x11e2bd7a,
-0xbe49a8e0, 0x17034e09, 0x9caf0592, 0xbaddbcda,
-0xc98d520e, 0xf307787d, 0xad54a7f7, 0xc3008240,
-0x83476b29, 0xda3400ca, 0x18beef48, 0xe0b1dcb2,
-0x7a2f0372, 0x0156cb91, 0x2ff8ad1d, 0x16176226,
-0x5559453a, 0xadd9f47f, 0x6b90e3e9, 0x79dd10ad,
-0xecc0aece, 0xc0523c49, 0xeb362dca, 0x523945c4,
-0x6e38a992, 0x9feace3b, 0xfde2f22b, 0x86bd74c3,
-0x17e95623, 0x68483f6a, 0x47faf18e, 0xc9bea8e4,
-0x507b0b39, 0x162b3053, 0x07cb056f, 0x7de4b370,
-0xb01246b7, 0xd172fb21, 0x32892d37, 0xf44c43aa,
-0xad38255e, 0xa700f6f7, 0x1b325e0d, 0x7d22f75b,
-0x46fb70f3, 0x49345c01, 0x798be810, 0xe15fc196,
-0x3aca2046, 0x0f4ba115, 0x3e9bc941, 0xe85cdc25,
-0xc6ca50f4, 0x3a3e5d95, 0x6604709f, 0xee0c4ac1,
-0x2392ee8f, 0x812b55be, 0xf897f6aa, 0xb57c3b99,
-0xd8341711, 0xaa56da31, 0x9684018f, 0xbd2bf15d,
-0x1d4161d0, 0x140b443f, 0x46bcd69f, 0xf8b4cb08,
-0x06e44957, 0x4d8fdd3e, 0x83e1b508, 0xf8295c42,
-0x4400ca95, 0x9eabc6cc, 0x40d9198d, 0x50d75572,
-0x19e476ff, 0x461aa909, 0xb0012469, 0x225fd2bc,
-0x00ee00d9, 0x03456312, 0x3cdc8398, 0xd609165e,
-0xfe4a0c5b, 0xde7e8882, 0x13c1629f, 0xf13cab1a,
-0x860f7af8, 0x8e6c24e6, 0x9425de55, 0x3b4714f2,
-0xe7d3e395, 0x4c0c37db, 0x0b424ee1, 0x729469ef,
-0x746bc36c, 0x85b69d17, 0xae89a724, 0xc00b7ff7,
-0x868d6f2e, 0x48acccc5, 0x71f7b721, 0xb46b21de,
-0xd49b2bf0, 0x43c8ccb2, 0xf9d1ff06, 0x98e4ffd8,
-0x24ada1b2, 0x85f74a70, 0x898f056e, 0x5c443878,
-0xb091cf2b, 0x5ef07a57, 0x170be378, 0x31082d96,
-0x1bbe61b3, 0x63792d55, 0x51dd6738, 0x5bef308b,
-0x468da107, 0x31e2b797, 0x5f37f429, 0xb99a03e1,
-0x9d193921, 0x98ba9f95, 0x4772d75b, 0x75c23367,
-0x6f1b2f38, 0x71c64ce7, 0x32fe889b, 0xcc97a277,
-0x026af15a, 0xa2718129, 0xfa7b32af, 0x7c933d7b,
-0x21121980, 0xb1c66544, 0x053aa326, 0x50d8180c,
-0xc24cfb7c, 0x905e7f7a, 0x41c2043b, 0x0ee3f0c9,
-0xb67ac955, 0x1b82bdd8, 0xadafeb24, 0xdabcbeb1,
-0x045cfe53, 0xe4a1434e, 0xac10fbea, 0x114319c3,
-0x01450bb1, 0x623a9db9, 0x03059df5, 0xa29072a0,
-0xa06d82ff, 0xa8e167de, 0x1cd88bcd, 0x8900dc88,
-0x980fc34c, 0x9896ff22, 0x6cb1ff87, 0xc60a33b3,
-0xdd69f0d4, 0x8ddd1db9, 0x1c8e8248, 0xb7d07093,
-0x7a9ecba0, 0xd1838c7b, 0xb1d7b8d1, 0x419fe83b,
-0xf0fad856, 0xa032c47b, 0x76d8ddd9, 0x1ce0738d,
-0x34a08f73, 0xd47f3aac, 0x69efd177, 0xbdb254eb,
-0x73f1c46a, 0x28870ded, 0x5da26c16, 0x8bbdb723,
-0x162706d1, 0x47742c42, 0x6506e789, 0x28b863a3,
-0xa2bc8737, 0xcf637134, 0x5dd7b40a, 0x6cc820c0,
-0x3513a9bf, 0x7f703854, 0x581f71e4, 0xacb8eae6,
-0x074687fa, 0x26486348, 0x492ac1ad, 0x47ce2645,
-0x1a048b1f, 0x9f5ec436, 0x540976d2, 0x21689779,
-0x9941ccda, 0x68c29b25, 0x03e724ec, 0x46e206d4,
-0xcc46923a, 0x41da9ca5, 0xfd06e856, 0x23dedc38,
-0xf835e008, 0xb437e601, 0x9a113722, 0xc71f60d2,
-0xd9b2413f, 0xd9c52025, 0xb1ab200b, 0xf38f459d,
-0xa0bd7f2d, 0xd2467881, 0x76b944e4, 0x15b06497,
-0x26117e02, 0xfccf7de0, 0x5c800bc7, 0xbb6e7273,
-0x7d3efdc7, 0xdde559ac, 0x4613077c, 0x59444b30,
-0x9ef61b47, 0xa3a6e5ff, 0xb2724c0a, 0xfd9b523e,
-0x58e0da4f, 0xa10b5721, 0xec02dfdd, 0x83ca1a01,
-0xb836d393, 0x6cc3056b, 0x4eca9fc6, 0x759d1351,
-0x932a54ca, 0x12600393, 0x3a4bfa0c, 0xa37825b3,
-0xbd18ea08, 0x90e309ad, 0x9d9c4f51, 0x50f6120d,
-0x57128d19, 0x944ef2be, 0xe4713b4e, 0xff9617e4,
-0x1eee595f, 0xd67e4eab, 0xe26cd027, 0x89bbfacd,
-0x025dbd33, 0x6d6f6292, 0x8494e639, 0x97e4e008,
-0x0cebbac4, 0x20412abd, 0x7c4cc152, 0x054c49db,
-0xfb73eccb, 0x709e3b0c, 0x55825983, 0xd1864d4f,
-0x4d5c5e94, 0x176ffb32, 0xd24627a5, 0xd7b67cde,
-0xd6086e4b, 0xa61e0789, 0xcfca4a39, 0x1a9a3b4a,
-0x08f976df, 0x73da6448, 0xb9005bad, 0x044ee258,
-0xa5446ebe, 0xda7bd8a4, 0xb1cb2baf, 0xef91a6f1,
-0xc551e214, 0x6fc65158, 0xbd41aef9, 0xe870d886,
-0x6d2e4e55, 0xb423ed0f, 0x3b717f6b, 0x381f6c1a,
-0x78dc6ca4, 0xc315ff83, 0x2a8bd063, 0xec22f14d,
-0x9acf9d86, 0x15d19705, 0xce63226a, 0x37fbbc77,
-0xf4bf79ca, 0x61031407, 0x6fd7bf52, 0x2b42b926,
-0xc73e9511, 0x652169d3, 0x7a9f4d75, 0xb635cba9,
-0x453f5777, 0x712509ad, 0x9992bbdc, 0x918a9900,
-0x5226f9b6, 0xf4d32149, 0xa47bd3c1, 0x07b5d406,
-0xac6e77e6, 0x9d801366, 0xd1300e39, 0x42f0c17f,
-0x398d4469, 0x66e31bd5, 0xd18823d6, 0x51839e1c,
-0xd3dae053, 0x9c0fbbfd, 0x11b80b5a, 0x08b8f4b4,
-0x7565f6ad, 0xc1a558ee, 0x373a80e1, 0x098bde72,
-0x7a78473f, 0x173aa4d5, 0x95ef6e52, 0x22e4d923,
-0xf6605a53, 0xc39ce09d, 0xcfe6fb0b, 0xa96245cc,
-0x74e77c57, 0x31aa4340, 0xa408ffb9, 0x22b1e7ba,
-0x06d98397, 0x53900c62, 0x8c01ab86, 0x10a8abf5,
-0x9562883f, 0xf978b207, 0xf34ae4de, 0x3d85e919,
-0xdf8843d7, 0xeb88ad99, 0x740acd33, 0x457f39d3,
-0x0f5320ab, 0xa583fa42, 0x5e2e81a4, 0x741a6439,
-0xbaaf5bff, 0xd2749649, 0x1b6b40a0, 0xb56ba31a,
-0xf5d44abb, 0x6282f4f3, 0x3e135d4c, 0x99e36997,
-0x028e3a6f, 0x88b0d059, 0x492ee3cc, 0x86fb8fc0,
-0x94e9f7f9, 0x8d497b26, 0x26a3bb57, 0x9841c46d,
-0xf025a833, 0xff81ef00, 0x1adf6a4a, 0x7ae7f289,
-0xda5fec1d, 0x2fc6f43c, 0x106d3b35, 0xd36ca2da,
-0x1cf7d6a9, 0x47491300, 0x4ef42fb3, 0x74189b82,
-0x63f537cb, 0x7a25dd10, 0xaa5f269d, 0x4106cf66,
-0xb32c0176, 0xe7ac1871, 0x6f3e2261, 0x3e44842f,
-0x05fb4d96, 0x588941a2, 0x6336b626, 0x0656d74d,
-0x4ca997ff, 0x8c306636, 0x9a3aa159, 0xab1a0912,
-0xfa579dd3, 0x12804997, 0x372426d5, 0x98d09dd3,
-0xe57648f9, 0xee8be2e4, 0x3065696a, 0x280c4527,
-0x7e4f159c, 0x78ddeadd, 0x03db1b90, 0xd3daa77a,
-0x2dbda850, 0x1f97c7d9, 0x91943c78, 0xa90d9e9c,
-0xf8987454, 0xd5dfdeef, 0xe8bc48ac, 0x56c78095,
-0x7a705114, 0xc29b47c6, 0x87cfe9d1, 0xc4123176,
-0x9c021d8e, 0x0dd1fa9b, 0x721c1a7c, 0x73411d6a,
-0x36db1570, 0x62fa69db, 0x39fb9460, 0xe69e66da,
-0x588e66d0, 0x24dba9e3, 0xc6e2ada1, 0xf13caa34,
-0x8ed47bc1, 0xcee97354, 0x0c846c40, 0x0862b7df,
-0x6bea8115, 0x38337313, 0xc44ccc7d, 0xa6bbbaed,
-0xd2d1bbc9, 0x19b05935, 0xad4dc29f, 0xecdf8428,
-0x4229937d, 0x1076f9d9, 0xdc9bff47, 0xd16acb5f,
-0xca0a89ac, 0x70125c74, 0xc003d071, 0xff46f020,
-0x70a729ec, 0x1d8f8389, 0x15c676d4, 0x2b80840d,
-0x891fa316, 0x78461498, 0x2cb7ed4c, 0x284ae978,
-0xc2e668d5, 0x54c98bdf, 0xe3b5cc3c, 0x50167eb4,
-0xd997b788, 0xb5b7be32, 0x4850edc6, 0x467eb34b,
-0x4da08d96, 0x4328385a, 0x7a6cf7ae, 0xbaeee6ff,
-0xd03de36d, 0x12183ebd, 0x30201b8d, 0xca0d9ea3,
-0x4dfafd18, 0x9cd7d3fe, 0x48d78fba, 0x9044b767,
-0x9bc5dc90, 0x43dfca8b, 0x8c4963f7, 0xbdad681d,
-0x110f1587, 0x2a04616d, 0x6eac42e8, 0x617203fd,
-0xa3c180a1, 0xb8bdcfe9, 0xf272d231, 0x04eadf76,
-0xcdc60f69, 0x5d95c38f, 0x70670699, 0x5614a7eb,
-0x82dc4497, 0x82150a3d, 0x9acf8396, 0xb9a56eb5,
-0x586350c9, 0x7eb4d2e9, 0x45863ec4, 0xd8965b9f,
-0xcb7b4d2a, 0x49a6c421, 0xb9e7369e, 0x2cb4d67b,
-0x64f31370, 0x5db94a3e, 0x8798fa34, 0xf0ed3e05,
-0xe4881e27, 0xc47f3ec4, 0x9bfae6ab, 0x0f462748,
-0x9025a4da, 0x96223fb6, 0xc8100766, 0x3ec8f817,
-0x37c58781, 0x50870f11, 0x2c5ba1d2, 0xa22fc79a,
-0xc640e487, 0x6fef4195, 0x87e037ae, 0xf6da0a0a,
-0xf04deb24, 0xe7781705, 0x31b84d0d, 0x61ac586e,
-0xf3190828, 0xe60961ec, 0x1c76febd, 0xbde17769,
-0x163ee67c, 0xc346416c, 0xdec99d98, 0x671f6fed,
-0x3733ab50, 0x602080dc, 0x3b444619, 0x7abd5155,
-0x47de47c0, 0x1258022b, 0x7f62feee, 0x8e317325,
-0x53cf7502, 0x2f579ce3, 0xa3e8d105, 0x464d6de0,
-0xa3b0e6b3, 0x159b61cc, 0x2e1dba05, 0xc2ab3757,
-0x614b13ac, 0xe6666f7f, 0x513edc78, 0x19b878af,
-0x2af660af, 0x8a61701d, 0x56051e45, 0xefa3958d,
-0x95e17702, 0xd48567a6, 0x4d2dbb5c, 0x599cf1cd,
-0xdb946262, 0xd2102a51, 0xcd14afff, 0xd00e1579,
-0x5ab08815, 0xcc61d98c, 0x1a63a742, 0x1ef964a1,
-0x44f5d961, 0xc41ec021, 0xc9fe4beb, 0x3e5ebb24,
-0x51efcfe3, 0x0a0cd7f5, 0xf627fb85, 0x2686b3be,
-0x7b77ce5b, 0xee2434b2, 0x7540e195, 0x37a1775b,
-0xfeda89da, 0xeb7d8cab, 0xdf8d914f, 0x4edfde85,
-0x194ebe45, 0x9fa55010, 0x96551b37, 0x47ab9013,
-0xd01fc87c, 0xc1cb71c8, 0xa1ae6775, 0x3e009469,
-0x99a62dc0, 0x594baf33, 0xaa681ae7, 0xff209513,
-0xcd3967be, 0x35383a5e, 0x4dcd5fa1, 0x5182a17f,
-0xc856a87e, 0x4b50b13e, 0x1f1253eb, 0x1b3276de,
-0x022e67d3, 0x3583c0cf, 0xfdd69844, 0x46f23c6d,
-0x7446facf, 0x36363d5f, 0xd9db492f, 0xa6fd7386,
-0xe99afc05, 0xbbb62ce1, 0xb9e81344, 0xbdecf570,
-0x8a3ec6e7, 0xd8ca75b0, 0x6c5e0d7e, 0x0f35bad9,
-0x3de6a842, 0x5f2a42aa, 0x8c4ba1f0, 0x57c90e20,
-0xcae637f6, 0xc6332e69, 0xaca7d450, 0x65bd2955,
-0xdbbbcafa, 0xdd640f68, 0x3828ca54, 0x459ac425,
-0x164612be, 0x6789af20, 0xb2e098a5, 0xf486bfed,
-0xfffa6044, 0x90cba153, 0xe8a0c2dd, 0x4fa0dc4b,
-0x4131946b, 0x5c045fe0, 0xad4210f5, 0x2ee3c5bc,
-0x7e0de436, 0xcabb149e, 0x11d22eb2, 0x23fd0d51,
-0xa124a657, 0x0a2f636b, 0xe56c4df2, 0x0f94bf71,
-0x7c1d1848, 0x0b296a79, 0x47936ef2, 0x59f96927,
-0x6ff51374, 0x1456e25f, 0x1cfa9875, 0x16316160,
-0xfed106ec, 0x48f89ce3, 0x76d54bf8, 0x43ca1909,
-0xec24be61, 0x5fa147d8, 0x1a8862e9, 0x79d1fdda,
-0x1065f4a6, 0x8e2e2c4b, 0xaf5ffdaa, 0x83a4835d,
-0x8599213a, 0x12ca452c, 0xc282bf03, 0x8faa033a,
-0x2a35bd6f, 0xc0e6dddf, 0xa952f1f0, 0x1c45c1b5,
-0x4e4a6b02, 0x3d61369e, 0x9f0ecadd, 0xc78ddf9e,
-0x4de2a565, 0x1534c845, 0xaa827bac, 0xfa3e3895,
-0x91da5ed3, 0x627aac15, 0x5b0dfc7a, 0xe6af39c9,
-0x023c0007, 0xf6e2f19c, 0x93a7a1da, 0xbbdb6d6d,
-0x76ba63c6, 0xe88fe1bf, 0x6db188fe, 0x6aac8f92,
-0xc7e750b4, 0x4c9e14b0, 0x25573a67, 0x1459cb9d,
-0x5efb003a, 0x58a8b21b, 0xf0968258, 0x67c9428b,
-0x8ea06e36, 0x3f848e56, 0x563778e4, 0xa326560a,
-0xd35b54cd, 0x7800c68a, 0x5f70b724, 0x1dea0216,
-0x42986c1c, 0x4f6d0b04, 0x9f64ef36, 0x1c155b22,
-0xab7c92f7, 0x4cf7c918, 0x5c00d112, 0xfd6d4846,
-0xd9629807, 0x75ed851b, 0xa5cdfb98, 0x3ba5f272,
-0x662b5460, 0x8ef26a9c, 0xc08710f2, 0x4ce04d2e,
-0xa08fd8bf, 0x43cc36cc, 0xa05b2ee9, 0x126deb93,
-0xa41a1190, 0x92890e37, 0x2471aa32, 0xbc7f3b24,
-0x4bd8bc81, 0x4aaeec14, 0x435b0abb, 0x6d5370e6,
-0x59409ab0, 0x5a287ce5, 0x0a5fd3d1, 0x31a53142,
-0xe1a15585, 0xce60ead3, 0x0353cca9, 0x61824eca,
-0x311f1b4a, 0xa15c548f, 0x18c93e5a, 0x56920bdb,
-0x328a3d93, 0x1ff65dae, 0x4a526f52, 0xf1000afe,
-0x97fdf358, 0xdfb1fb15, 0x6d712c83, 0x6a6cd6fa,
-0xa4cf47fb, 0x09908e57, 0x4c72e3d8, 0x87724938,
-0x6c69f558, 0x75fa6127, 0x74ef2196, 0xbf8dadac,
-0x5692c2b3, 0xc3a7ff98, 0xceb650f9, 0x3f564033,
-0x1c756117, 0xe8214e98, 0x623a8727, 0xb89e534e,
-0x9d042829, 0x35f6c6eb, 0xfb49cf58, 0x724cb26a,
-0xcad698ff, 0xec2190b5, 0x90992523, 0x6c3ea7f4,
-0x4fe3310f, 0xcc951b64, 0x53451c33, 0x989cb42a,
-0x7b8f503d, 0x29e0009a, 0xb5070e19, 0x4960aafc,
-0x23419b3d, 0x07f20a84, 0x66a4c1b8, 0x23733f16,
-0x4777742d, 0xdbca13e1, 0x24e5c36d, 0x8f68c696,
-0x96ab8fd7, 0x4527cec5, 0x8895a688, 0x93c18927,
-0x323706f9, 0xda4a1dbe, 0x576b71ee, 0x3075fa9e,
-0x86aa1801, 0xf0282664, 0x936e8a69, 0x0f368037,
-0xf1706d24, 0xd64c811b, 0x57aa469e, 0x689c05f4,
-0xd78a9519, 0x97893979, 0xd460e68e, 0x2e832359,
-0xfe6e85b5, 0x14e6e72f, 0xb6ece7e1, 0x38c52ac5,
-0xae8d2b88, 0x369e46d2, 0xe6c994e8, 0x4d60b201,
-0x51cc90cb, 0xd6039c7c, 0x45e3f29d, 0x41ff20ce,
-0x82b27efc, 0xca594fc7, 0x5b435f92, 0x3b403505,
-0xbf96fc68, 0x35275f79, 0xa13701dc, 0xa3132312,
-0x84b87c7c, 0x15c81945, 0xa8349100, 0x4200b3e9,
-0x2c19c44c, 0xe236b9ad, 0xd77eb9b8, 0x99db024e,
-0xe7b159db, 0x824c6208, 0x86a6b54f, 0x5350efa0,
-0xaf98ee31, 0xc458d17a, 0xfb20d021, 0xe4392bd6,
-0x8e4b1647, 0xa2e71971, 0xfab533da, 0x04f501c3,
-0x04a9d4e5, 0x4454a3c4, 0x00b77d9b, 0x1b38d0f0,
-0xc6097b97, 0xab68a077, 0xd183c733, 0x5ba51612,
-0x70fbc349, 0x0ab3d8de, 0x3e635a9f, 0x2c8219a2,
-0x8f81ee09, 0x2f3e09eb, 0xffc509c7, 0x5fc68d18,
-0x8c43faf0, 0x0fb82249, 0x68b1b8c9, 0xb803fb39,
-0x0a9d60fd, 0xa22ea21c, 0x5a930767, 0x76f2f749,
-0xd531a71c, 0x960ed8f6, 0xcfb5502e, 0x613c3b0f,
-0xda337ea7, 0xf5e3930b, 0xa6496d75, 0x7de1708e,
-0x9724bcb4, 0x36c2bfb5, 0x02d1caba, 0xabea5f91,
-0x898fe784, 0x104f4378, 0x6df2da57, 0xe6532be0,
-0xc7168a6d, 0x563eb024, 0x079f5b76, 0xca6860a4,
-0xdfe1c51e, 0xbbbda2f7, 0x99ed9a1e, 0x355330d2,
-0x9ba83641, 0x0a07c657, 0x7b332e26, 0x192067ad,
-0x7bff42d5, 0xca6865f5, 0xf827f9e4, 0x9d474a08,
-0xa9d40f54, 0xd70d9a5e, 0x8732cec3, 0xf44d23ff,
-0xb7609320, 0xe781aeb2, 0x78111c3a, 0x06930b61,
-0x2e283879, 0x4cbc9851, 0x60c88e5e, 0xac9d96d8,
-0xf6f8974f, 0xd595b01a, 0x519fb410, 0x23bb1865,
-0x4c7c4dde, 0xe3741291, 0x6f76ba44, 0xd5e6d0b0,
-0xa6cde5b0, 0xd3f4aae7, 0xe0eae7d4, 0x8d714e13,
-0xcef05839, 0xe2801b3e, 0xb127a512, 0x835464a6,
-0x641fd93a, 0x7dd8ff2c, 0xa06122cb, 0x72243d2d,
-0xf22b2146, 0x19b72b59, 0xe5f4370e, 0x37f98429,
-0xcc72529a, 0x0f6922ed, 0x94d89417, 0x6a59bb22,
-0xb013be01, 0x659fea5a, 0x2b1796e4, 0xb8368996,
-0x396f5481, 0x8e13ff19, 0x58689eb1, 0x67e9c6e2,
-0x605ca668, 0x11761ad0, 0x9ad8beb8, 0xf77fb14d,
-0x92a7706a, 0xaf3c62c0, 0x9d3b4069, 0xe9af0506,
-0x419caede, 0x98a9d531, 0x25b64f03, 0x3ab749ac,
-0xbf94e844, 0xc4cb28b4, 0x5b604165, 0x7318ebfd,
-0x7ee5d6c9, 0xbc2e998b, 0xed01b741, 0xd74d0d2d,
-0x446fbf13, 0x88893c58, 0xea0b790d, 0x702c0d37,
-0xc6e82e47, 0x932bb446, 0xd03f6d04, 0xf840d45a,
-0xf42094b9, 0xda9588d6, 0x6a7e161c, 0x75432873,
-0x82cdb8c5, 0x5b543ecb, 0x7bf336f6, 0x872aa1a7,
-0x9ce37a07, 0x52ad4fcf, 0xb39f7e16, 0x8f354b23,
-0xb9e939d6, 0x88d20c00, 0x1e15b7c3, 0xb086c99d,
-0xb7907bf9, 0xd473e3a0, 0x0ee16fcb, 0xbe91117c,
-0x20b53453, 0x50accd95, 0x2608c1cd, 0x195039c3,
-0xba0d55d7, 0x8f0a4ea2, 0x0c31b6d0, 0xeefa0c68,
-0x850ce08f, 0x32aaeeeb, 0x1dd76060, 0x605c98b8,
-0x4e6961ac, 0xaeec33f5, 0x00d336b9, 0x049d8a0c,
-0x32ee203f, 0x9c14a845, 0x9079b737, 0x38583b6d,
-0x2c3a926b, 0xa3b253e4, 0xff3d14e8, 0xd858152d,
-0x600dc742, 0x8a284be3, 0x0ccdd7fb, 0x4116756a,
-0xe20d06f6, 0x5143473a, 0x339a9a6c, 0x9fad19a9,
-0x4e21cfd9, 0x54a88dd5, 0xb25b8156, 0xbf969adb,
-0x0a4a6a36, 0x82fae31d, 0xd8583707, 0x61e3f438,
-0xb8ba5919, 0xc77e6771, 0x5498d896, 0x44abf578,
-0x934e4d16, 0x20f23000, 0xa451a721, 0xca5e0d29,
-0xe13122bd, 0x3218eed1, 0x3f5b11a5, 0xc4645147,
-0x0ea6556d, 0xcf02bf7f, 0xcbd26197, 0x45c5da76,
-0xa3522301, 0x32e30067, 0xc07cbea8, 0x5ebe7e5a,
-0x79a668d6, 0x198c1dea, 0x73023029, 0xab13eca9,
-0x12835789, 0x3472e8b3, 0xcd76292f, 0x0e474d59,
-0xb99fda86, 0x08bcce56, 0x2d67e236, 0x04606d8c,
-0x4521e7a6, 0xfc35c123, 0xc642480d, 0xed383abb,
-0xa8ea8493, 0xe35300c9, 0xc456ae6e, 0x8a7e0dc6,
-0x9988506a, 0x636d59d3, 0xff9e9c75, 0xba8c1c9d,
-0xf985b454, 0xf2474d8d, 0xda510f46, 0x4423b104,
-0xdedf0f10, 0x29026079, 0xd3036e9d, 0xcfa5dd44,
-0xdec218f3, 0x6ef4a6c4, 0x6f5a24d7, 0x488203d1,
-0x905af981, 0x851343ab, 0x70526b35, 0xad090e6a,
-0xf56f3da6, 0x5ae1c78c, 0x09075324, 0xb2ea12c4,
-0xa9deef07, 0x4cab60fb, 0x00b23f47, 0x561e883a,
-0xa28331c9, 0xd814eea5, 0xf24a931f, 0xcbdf3ebc,
-0xa0f6cc11, 0xec128d53, 0x16b047db, 0xa242c9e5,
-0x4c37425d, 0x5aa99da8, 0x2bbb2696, 0xf2e32a6d,
-0x6aba6a08, 0x13b3b5af, 0xbe637290, 0xf05113a6,
-0x97c53787, 0x799bae2b, 0xd7615b45, 0x4e0b2583,
-0x6c9822ae, 0xdc2de37d, 0xe542f0e8, 0x7f1a1aae,
-0xfac41c0f, 0xdb4e8dd4, 0xbcc94f20, 0xebf8c8b0,
-0x16b7ae62, 0x0fabccfb, 0xd041c085, 0x661c1346,
-0xf78b900a, 0x5aff6e60, 0x21a17d82, 0x21418ddb,
-0x749f40af, 0x669e6480, 0x9c17c747, 0x49926226,
-0xe22659c5, 0xd5e0f02e, 0x50e92645, 0xf5de1eca,
-0x156e9949, 0x166dc0a8, 0x9916d0d0, 0x6364cdb8,
-0x9eef716f, 0x1fd63e0c, 0xe4f84b16, 0x4a67f38e,
-0xf9e09d13, 0x64f6f622, 0x358f4544, 0xa69263f0,
-0x87e1eff9, 0xfd75108f, 0x21b86cd7, 0xce6527d0,
-0x4cb7e14f, 0xb62e5293, 0x76c12367, 0x612dfa18,
-0xd61d14ce, 0xa950079e, 0xd98e1817, 0x1c5255c6,
-0xad6c2032, 0xa9d6c8ab, 0xc80aaa18, 0x608dd6e0,
-0x31b456ce, 0xf566c0d8, 0xcd7c2778, 0xb9030a4a,
-0x3dd8a881, 0x8b0a9f6a, 0x79b12889, 0x493838fc,
-0xdc06141c, 0x0c39bc47, 0xb9f9ee67, 0xc5715c17,
-0xa39de0c8, 0x79ecc41f, 0x81695402, 0x1c9eebe4,
-0x960d2fe2, 0xb8c132be, 0xb896c9e0, 0xd73eb989,
-0xefdebe70, 0xe99e338c, 0x0f2e2649, 0x676129c5,
-0xf14b34b3, 0xa9b4a82f, 0x71f2b63a, 0xfb5b22d9,
-0xeffd2af1, 0x2112f763, 0xd781abda, 0xeb80fa0c,
-0xd084e659, 0xcabccb2a, 0x12216c3a, 0x3cad1c0a,
-0x2034b647, 0x1765f145, 0xd1c1cd96, 0xc17aa742,
-0x98422f32, 0xb264e6e5, 0xa263eef3, 0x1576900d,
-0xaaaaa9db, 0x36085803, 0x858327f9, 0x4956ccad,
-0xcea59244, 0x2fb7ceb8, 0x1563c495, 0xd6b3ace8,
-0xebeb190e, 0x193ae4d6, 0x871cf03c, 0x61531d91,
-0xc518cde4, 0x36534733, 0x8b1f2600, 0x1d0dbe00,
-0x92dc4594, 0x7bc8e20f, 0x55e7bf7f, 0xb7affc7c,
-0x54b667e0, 0xfbd63e04, 0xf8763504, 0x27670ab4,
-0xf1695712, 0x779666e4, 0x1fb4ba69, 0x54fa726c,
-0x53c48fdb, 0xf2210977, 0x52894d6b, 0x229f8c1d,
-0x77c593e8, 0xb8a3a7d2, 0xbff690ba, 0x4991c82a,
-0xbfe1292d, 0x98b786e2, 0x59b1ce1d, 0xb62496c0,
-0x4bc1ec70, 0x109a4721, 0x36a9ce56, 0xbf270be9,
-0x83287a53, 0x65cc7e28, 0xb7f61eaa, 0x532fc31f,
-0xd1e46c14, 0xe06a2f15, 0x26aec364, 0x3bcad4cc,
-0xaf983207, 0x232e2c3c, 0xc6a795df, 0x2303a057,
-0xef9dfebb, 0x7d09dbdc, 0xfd177f48, 0xe23c5f81,
-0xb50457c5, 0x21845566, 0x85e2899d, 0x1f57b959,
-0xdb5d71ce, 0x85fe4c25, 0x6b783e5d, 0x98b0d273,
-0xde7e02d4, 0x30107e4c, 0x988aa2f5, 0xa6e946d5,
-0x3f2165fe, 0x875a68b5, 0xc3b54b83, 0x3e6088d3,
-0x008f6a51, 0x8b6c542d, 0x45fc08c1, 0xa7736af8,
-0x792c203a, 0xfc910b97, 0xf53d0144, 0xdb1e9bd5,
-0x3608e76f, 0x6b44ee87, 0x72947f6c, 0x9849a2f5,
-0x606a24e3, 0x5d9b3c95, 0xec1766c1, 0x7189361c,
-0x2276487c, 0xe03f68ef, 0x88f744aa, 0xff4c28d0,
-0x62f21669, 0xde85ee8c, 0x7deb1c8a, 0x171fca29,
-0x50b1fc73, 0x66eb9b78, 0x82f1d175, 0x5e84de44,
-0xb57cde6b, 0x326a635e, 0x0086c71e, 0xa797af7d,
-0x28b1c811, 0xba3612d5, 0xd02cfe99, 0xd0dd4e2c,
-0xdfbf1550, 0x39e88d79, 0xa3bf75f4, 0xcb855cb8,
-0x8e4ec0a6, 0x565faba1, 0xd804bd02, 0x8dc5a019,
-0xf6de3c71, 0x526b00e6, 0x7de83c4d, 0xdbc7897f,
-0xf72304ea, 0x429a1abd, 0xd9e85b21, 0x991b9eda,
-0xc4dba74c, 0x2da74841, 0x9fb46bf9, 0xe9a56f18,
-0xc5a91a58, 0xfdb6752d, 0x218b5739, 0x66a19a64,
-0xf3dd0c8e, 0x1c9803db, 0xacb9da17, 0x8f3d1290,
-0xd7d8cb05, 0x51171578, 0x27986c34, 0x42e2346e,
-0x57d2b282, 0x2581ff26, 0x3012b7f9, 0x6c53bf97,
-0x37accec2, 0xf6d93c10, 0xa3aaef7f, 0x73585d49,
-0x88f37122, 0x103d9cc3, 0x14664ea5, 0xf352b47d,
-0xfca4f772, 0xdee05429, 0x36b4fc8f, 0x2b69262b,
-0x87e76ce0, 0xd2bd2308, 0xbc5da94b, 0xdf439fa6,
-0x9f57cc82, 0x221bbcf2, 0xc31d0e1e, 0xe5001bf1,
-0x13e404d5, 0xab839b9d, 0x14e4b0f1, 0xc64a7570,
-0x3837a7e6, 0x16c5053d, 0x0349538a, 0xd5cb787d,
-0x975f0900, 0xd995cf1a, 0xe5c7a12f, 0x0cdf141a,
-0x9bb68f2e, 0x74253dbf, 0x55ec966b, 0x8c9f8094,
-0x2d184417, 0x022c6233, 0x7abaf110, 0xfa52ba99,
-0xc4fe1b5a, 0xb0a4ef0c, 0x5d1e0f7b, 0xf80d19ee,
-0x5b59b9d3, 0x1f5afce9, 0x87229391, 0x39688d1a,
-0x531d606a, 0x0a9545e7, 0xe6eee24c, 0x1b52cd65,
-0x88beecfb, 0xae925794, 0x012e786a, 0x3534bb81,
-0x290b734f, 0xe26f537d, 0xf6e4268d, 0xa719334a,
-0xd8b3f62d, 0x421939b0, 0x3e430196, 0xbaf44584,
-0xae13641a, 0xc910c1d3, 0xe3cc655f, 0x098ef291,
-0x175d159c, 0x6325e32f, 0x025d235b, 0xfde5b75b,
-0x3f8020d2, 0x82440319, 0x04a8b480, 0x530dae47,
-0xe0a5a6a1, 0x481010d7, 0xa5b5cf7a, 0xdde4dd02,
-0x9b5e16a2, 0x597d633a, 0x16babcea, 0x7fedcffc,
-0x2f7229fd, 0x17d1a845, 0x1792b6ea, 0xe5a971be,
-0x9c573ab7, 0xfd3ef969, 0xe8b9c5a1, 0xe1a5fdf1,
-0x9a739bdd, 0x561b6315, 0xba208573, 0xe1ee29ce,
-0x8513328b, 0x3acd455d, 0x443ff9ce, 0x98877bf5,
-0x20dfe5ec, 0x5d8f96a1, 0xa2bf6d17, 0xa6d1dcc7,
-0x5c917fdc, 0xce344177, 0xaa543554, 0xeedd7c40,
-0x335f7b0b, 0x1363fb1a, 0x7070614d, 0x08f03bcf,
-0x9d42b97e, 0xe14057d0, 0xa02bde86, 0x712670b1,
-0xb9fbefbf, 0xc016fe61, 0xd39fe348, 0x8fbe670d,
-0x9871a31c, 0xd8c5bb66, 0x1bd0406e, 0x5eb07cca,
-0xcf5f629e, 0xf9cb4030, 0x8ec76bb0, 0x169a40b8,
-0x472bf89f, 0x6621ff3f, 0x90833591, 0x3dd64ef0,
-0x8b562e92, 0x2d8d3c3b, 0x8ef85051, 0x466f9f14,
-0x26b316a8, 0xed7f68a0, 0xd1516758, 0x1fc644e3,
-0x5b377510, 0x523d77ca, 0x5e2bc504, 0x470b8642,
-0xc2f4d410, 0x6a5820cd, 0x8dc740a7, 0x50e891f5,
-0x25ddb183, 0xead6e048, 0x55469030, 0xd55dce0b,
-0x3e680a37, 0x38aa0b62, 0x6db1774c, 0x49a20f1a,
-0x25d43a63, 0x1865254a, 0x8fae86af, 0xba850279,
-0x765fa9bb, 0x257e27b8, 0x386acd68, 0x40e7ab0e,
-0x08ff7ea9, 0xeb206d15, 0xfbe8cede, 0xef17f143,
-0x0f15dab5, 0x016c8cfd, 0x259cd156, 0x1deb9e1c,
-0x604e7b05, 0x887b5f4c, 0x47dc3cd5, 0xfd7e69d3,
-0x0d110770, 0xe999a314, 0xc20195b4, 0x736df31b,
-0x50f736fb, 0x399a0225, 0x277f5684, 0x0363a2bb,
-0x009f06c1, 0xd92e70a8, 0x6a2b6926, 0xda9fc796,
-0xd32708ef, 0x2d8e3f23, 0xc7e6bfa3, 0xdc9e8c7c,
-0x5f359b12, 0x879a6ed1, 0x58b932be, 0x09fc8dde,
-0xd4cd6a0e, 0xa8de595a, 0xee2c6d65, 0x185349b4,
-0x2ed60e5c, 0x8638cd82, 0x23c2764f, 0x89f88e71,
-0xca488843, 0x0c9163fd, 0xb9d8f14b, 0x6a0fe226,

soc/intel/broadwell/microcode-MF2306D2_FFFF0009.h

diff --git a/soc/intel/broadwell/microcode-MF2306D2_FFFF0009.h b/soc/intel/broadwell/microcode-MF2306D2_FFFF0009.h
deleted file mode 100644
index 775a064..0000000
--- a/soc/intel/broadwell/microcode-MF2306D2_FFFF0009.h
+++ /dev/null
@@ -1,1088 +0,0 @@
- 0x00000001, 0xffff0009, 0x12192013, 0x000306d2,
- 0x4218a30f, 0x00000001, 0x000000f2, 0x000043d0,
- 0x00004400, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x000000a1, 0x00020001, 0xffff0009,
- 0x00000000, 0x00001011, 0x20131219, 0x00001011,
- 0x00000001, 0x000306d2, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x60dcadd9, 0xa4e450f7, 0xa10e9ad8, 0x056947aa,
- 0x6c53d792, 0x100ed262, 0x0e01ba87, 0x72e1b0a2,
- 0xe1d4113f, 0xc3085503, 0x1367060c, 0x9bf7efea,
- 0x2b756eb6, 0x2ee07b69, 0x7cfd1dc4, 0x9811c8b2,
- 0x86cf4036, 0x20534caf, 0x37046580, 0x432b4e6c,
- 0x6a3a2e54, 0x88a74dfc, 0x81a503f6, 0x67736b51,
- 0xbc2b11b7, 0xbcf3adc9, 0x96c8eefe, 0x688bcc49,
- 0x16c4f996, 0xe0175cd2, 0x454d7a58, 0xa67afd13,
- 0x098d9e42, 0xf86d2ec2, 0x738a67a6, 0x26c4ad17,
- 0x08666776, 0x050d971d, 0x68998a7c, 0x21ac9cf9,
- 0x29e27b61, 0xd61cfd7d, 0x3500ff83, 0xd4123687,
- 0x27b72496, 0xe9b867f6, 0x62920d71, 0xe159dd34,
- 0x3991c6ba, 0x367a5719, 0x7af5e9df, 0x5cb9fd11,
- 0xf5988469, 0x4153f210, 0x24b194a9, 0x8c563988,
- 0xac5bfd38, 0xd271e693, 0x16e9b292, 0x0c6583d0,
- 0xd2501a4f, 0x9896af00, 0x6665aa9f, 0x0f3a8de9,
- 0xc8f0db5f, 0x60b7a546, 0xe3a52963, 0x0ea3eb39,
- 0x0d8c08ab, 0x2f5faa26, 0x1d3cbd56, 0xa8596256,
- 0x00000011, 0x90cab116, 0x0e040e30, 0xd347b746,
- 0x60a21d1a, 0xd6be9b2c, 0x4b45f3f8, 0x4c9f9895,
- 0x71624dde, 0xc9c2d232, 0x2c3e4884, 0xd50de558,
- 0xb2215b04, 0xea8e09bf, 0x51d7cfd4, 0xd288b7cd,
- 0xc56200cd, 0x7b35c8b7, 0x7efb18fc, 0x8ccc42b7,
- 0x308b55da, 0xc91a08b3, 0x7d122c6e, 0xbd62a0aa,
- 0x65c1171c, 0xa485a771, 0x03a8f12c, 0xe90e07fa,
- 0x55fdbf8a, 0x8e479b93, 0x3ed879ac, 0x17aa3978,
- 0xcf82b042, 0x22bcb074, 0xaddb3933, 0x32fd00b1,
- 0x347ab750, 0x6d2142fa, 0x046ae713, 0x2e2bfa45,
- 0xb597e339, 0x70d86bc7, 0x6f0fd994, 0x57b225f6,
- 0x12a0db1a, 0x475b29df, 0xa5a56fdc, 0x74da2980,
- 0x901db0e3, 0xc574be49, 0xfb71d343, 0x1dad8d1b,
- 0x82de7760, 0x92eb14aa, 0xe1b0f244, 0x73d4f475,
- 0x4d8598a6, 0xea08353b, 0xe491af06, 0x4d0402e0,
- 0xc5a719e7, 0x06ee0e61, 0xc300bdf8, 0xe929060f,
- 0x422d6721, 0xdb2e2923, 0x849977e1, 0xb721f8d8,
- 0x1489a38a, 0x4ea362e1, 0xb5544404, 0x29b7b6b5,
- 0xb9467e1e, 0xb6a573ee, 0xa197f784, 0x3d8a563d,
- 0x3021a920, 0x228d2a9d, 0x42ad7645, 0xa5a41a0e,
- 0x64afa2b5, 0xaa7de848, 0xf8749a8f, 0xe0e93b95,
- 0xc9033385, 0xac9abe32, 0x0511c7f5, 0x48ed3483,
- 0x37cdcaa3, 0x44f857b7, 0x8f0d8931, 0x87531352,
- 0x792265db, 0x978c9f15, 0x70d04944, 0xfcf1c5f5,
- 0x2bf9391b, 0x944e902b, 0xe2ea9bcf, 0x5e8443cc,
- 0x08d91892, 0x9cbfcc80, 0x49317133, 0xec45a8e3,
- 0xa13f80d8, 0xaa718e22, 0x2ba22e08, 0x2ab3aece,
- 0xe6e47fb9, 0x89a2a54a, 0xad5c63fc, 0xde5d1791,
- 0x95c2f6cc, 0x651f0b35, 0x2d3712c0, 0x37a3b34e,
- 0x366c5ff7, 0xff2f1373, 0x73fd3f21, 0x883dcc99,
- 0x723a5552, 0x82ad9770, 0xb962ad18, 0x99e02541,
- 0x38dbfbaa, 0xe8ac0a04, 0xc8de2eb3, 0x8b3526b6,
- 0x860ee4d6, 0x18d5abbf, 0x44ab0a68, 0x17b2491c,
- 0x16745351, 0x01219370, 0x441c7a6f, 0x5abed659,
- 0x1de122cf, 0x9272e352, 0x0d41ec76, 0x1a814149,
- 0xb77e6086, 0xdbca84ee, 0x3836808f, 0x0013eeed,
- 0xe6a8fa02, 0x4967bf1c, 0x9aa60708, 0xbffb9bdb,
- 0x0f9a1e2a, 0xb6ad6fd5, 0xf80e5a06, 0xc5c02e14,
- 0xa97f7853, 0xd1313de0, 0xce6d086e, 0x2b84fd27,
- 0xcf946267, 0x2592a173, 0x31461442, 0x9f916969,
- 0x0a82297a, 0x2662bfb3, 0xdea00742, 0xdc7dc6f3,
- 0xa4169ea3, 0x18367c67, 0x5b32a88b, 0xa5c49b29,
- 0x1dc6d4c2, 0xc7bbb15d, 0x763efa0f, 0x86bcb021,
- 0xe342da14, 0xc1f524e6, 0x3fb25d07, 0xc95facb5,
- 0xbac2e017, 0xb46425e4, 0x0e4ed37c, 0x3e2e0643,
- 0x0e4923d5, 0x0808d43d, 0xb8290fed, 0x9c13b38f,
- 0x5af54b12, 0xe52c28f9, 0x4f0e7520, 0x31d23033,
- 0x7ffd77d6, 0x3fd6a6ec, 0xa240c9f6, 0xc0d2e7d0,
- 0xf21322f5, 0x9a11ce94, 0x0dea1e5d, 0x54195ec4,
- 0x131902ed, 0xbe9d2fac, 0x6e2fe66c, 0x77ba266c,
- 0x60fff3c1, 0x26423e88, 0xa1113c26, 0x04e4b990,
- 0x6f377b8e, 0x19ad39c3, 0x48e73dfd, 0x70224deb,
- 0xb58c15f5, 0x2dd6ab84, 0xa341d89d, 0x94a1f39f,
- 0xdcdc46d6, 0x2bd6ec0e, 0x54c549a3, 0x9050b2ba,
- 0x2eb0dbe7, 0xace8bf18, 0xdf56ecf4, 0x8893fc94,
- 0x6432e94f, 0x35376b1d, 0x134c4258, 0xe94bfed0,
- 0x14d3b85c, 0x57bbb532, 0x1e9684db, 0x9807ea4f,
- 0xc6b43292, 0xd7f59cae, 0xfb5883cf, 0x725ba2cb,
- 0xc6f02596, 0x538a8e81, 0xa5136f90, 0x497459c4,
- 0xba645c2e, 0x23218d30, 0xb775bc86, 0xd0e34625,
- 0xfd1065ae, 0x3f0bbb0f, 0x6004224b, 0xf6a6ae86,
- 0x37dea01c, 0x9a368723, 0xda4a7a86, 0x6f7582f8,
- 0xd528c630, 0xd74842c0, 0xae825db4, 0x41426f8e,
- 0x60cd01a9, 0xf0982f32, 0xa8d0f194, 0xfd1a2924,
- 0x85297030, 0x993747a1, 0x5900e9a4, 0xb806c570,
- 0x6665a0e7, 0x5c5c606c, 0xa482052e, 0x3586ceb7,
- 0xbe34a09a, 0x6d58da9c, 0x9c16214a, 0x77ca2413,
- 0xeff1c03d, 0x26bdb02b, 0x7e92c547, 0x7d1c9ccc,
- 0x901781bf, 0xe06ca3ec, 0x0068f014, 0x4f037a36,
- 0x66f1e220, 0xe932bbc7, 0x35f71129, 0x491299d5,
- 0x96dd255d, 0x56140c48, 0xb9d9e9d8, 0x5887b654,
- 0xb4f00c09, 0xcac8a128, 0x08061536, 0x156d0a53,
- 0x58fd722c, 0xf8ccae65, 0x4c423ed6, 0x5085dcb6,
- 0x8d0a4c58, 0x5118e592, 0x720d0e07, 0x32695cf4,
- 0xf47583cc, 0xf5a360b9, 0xec68c6b3, 0xdb0b23bd,
- 0x63dd835b, 0xb46e45d6, 0xa26e3679, 0x882d0205,
- 0xfd1e47a4, 0x5e8f4fe2, 0x2394c20a, 0x5bce06ce,
- 0xe0652d89, 0x1638aa4a, 0x5863895f, 0xdb7e13df,
- 0x0baeb5c0, 0xb28bb54d, 0xdaacd6e9, 0xf90ac314,
- 0x6add6021, 0xed119aac, 0xdc6d04a1, 0x471ead10,
- 0x962c88c9, 0xfdc72b61, 0x0e22af57, 0x146a42c3,
- 0x34822bae, 0xd83b4b11, 0x1c3a2415, 0x0e0727a2,
- 0x566e88a3, 0x4b47cf5e, 0x853639c7, 0x215b716c,
- 0xee2e2600, 0xaf2f7ba8, 0x090ff22c, 0x34392116,
- 0xa6b296ac, 0x55e79700, 0x35246cf5, 0x086ddb6b,
- 0xc01e8683, 0xf6e013f0, 0xe792446b, 0x86ff93eb,
- 0x05aa2844, 0xaebc8787, 0x1593f6d0, 0x604b0cea,
- 0x69b5616f, 0xdda86324, 0x7ba648ca, 0xf33a5c5f,
- 0xa0aef658, 0x1bc7f6c2, 0xb2ce4a17, 0xc83e3e90,
- 0x1d3471ab, 0xaa361ce2, 0x33f2fca3, 0x0105f18f,
- 0xc27017fd, 0xf3416a6a, 0xfa21e77d, 0x6a889e68,
- 0xb31c3c49, 0x532f9608, 0x78a9b0f4, 0xf7a0720e,
- 0x1d387e41, 0x882da2d0, 0x400753f4, 0x9343c148,
- 0xda9f747c, 0x9b988343, 0x69ece870, 0x8e45b698,
- 0xa1e885bb, 0xb1d2f776, 0x8bdf9fbc, 0x988675b8,
- 0x6c3800df, 0xedfe4ea2, 0xed70c58e, 0x129307cf,
- 0xdcbdde56, 0x7d603fa3, 0xc1ddaf53, 0xf566a221,
- 0x611af0b7, 0x491709a6, 0xf6796c46, 0x03c2dd09,
- 0x20086a5d, 0xa56d3c4e, 0x21838c3e, 0x741bf887,
- 0xc47d1e10, 0x197d7b3f, 0x19abae48, 0x8abffda8,
- 0x94435b72, 0xa11b897a, 0x6ec815ac, 0x4c6b3739,
- 0x0f4d4593, 0x0dc528b1, 0x9ea4eafc, 0xe3af5be4,
- 0xa09856b0, 0x4bb60468, 0x34fce4fb, 0x34cd957d,
- 0x20cdc911, 0x7f9fe9df, 0xe2391995, 0x1a2321d7,
- 0xa34c246b, 0x79a899ee, 0xd52abee4, 0x9a846264,
- 0xc0b4fbf4, 0x3a632892, 0x9c27c222, 0x1420cf14,
- 0x9cf93d04, 0x86fb1630, 0x968387c7, 0x0d112814,
- 0x43aece1a, 0xef85dc1a, 0x203a9857, 0xd1003708,
- 0xb39d7773, 0x7e5779f1, 0x508b45d4, 0xa405466b,
- 0xe57343c6, 0x940fac2a, 0xb7a50d24, 0xe0fab30c,
- 0x3576bb69, 0x1aaf0431, 0x2d15232e, 0x303fdc31,
- 0xe13f2053, 0xfb33e941, 0x4e2b238b, 0xd4ec4f24,
- 0xe63f9c36, 0x6e4f9a38, 0x540def86, 0x06266f87,
- 0xce6b1e32, 0x8e0b9478, 0x26b2d339, 0x9ff9b40b,
- 0x204575b8, 0x946a0473, 0xb78a9ebe, 0x3a5309dd,
- 0x9f0eb17c, 0x1a064211, 0x85f47105, 0x0cb89d9f,
- 0xebd7b379, 0xd5c975a8, 0x9d52f464, 0x592a5bf4,
- 0x6f501956, 0x77578fdb, 0xa0e62c23, 0x6e3dd1e3,
- 0xc8774186, 0xe053f68f, 0xece83dc5, 0xc38d39f9,
- 0x18f92077, 0x343d3efb, 0xb35d2c11, 0xdb5cde6b,
- 0xdfcaf3ec, 0x218e1dc5, 0x686ca7be, 0x97b191be,
- 0xea2008e9, 0x32c1fefc, 0x0cffe063, 0xf7bb6146,
- 0x08b326e0, 0x2357455d, 0xa0dbebfe, 0x3cdb6cd3,
- 0x1e9f5ef6, 0xc51c7891, 0xd8d1fad7, 0x990bc89e,
- 0x273ec572, 0xfca8183a, 0x43bcca27, 0x99d670f9,
- 0x4eaea6f1, 0x927e1c1d, 0x0ae4b5ab, 0x346b589e,
- 0x0bf98ede, 0x47941bd5, 0x5da1b808, 0x7aadcba5,
- 0x17123c86, 0x3d58244b, 0xfecdb4ab, 0xe9c9f379,
- 0xf6ed0fde, 0x48ce0701, 0x15031801, 0x6dc08d12,
- 0xe2b0fefd, 0xfa919920, 0x2be7b549, 0xa0690325,
- 0xf4423306, 0x0291c221, 0x99e3f0f4, 0x2a0213b7,
- 0x652b0769, 0x461e57c6, 0x9cf49672, 0x1b8bc086,
- 0x88c7410c, 0x85129bf0, 0x536ae506, 0x60ff4af5,
- 0x134acbe9, 0x413c6069, 0xf12375e2, 0xcdfcc5a9,
- 0x36969c82, 0xd77fb84a, 0x3b1cc035, 0x6449616f,
- 0x9c350286, 0x4570139a, 0xe54e3afd, 0x52675e36,
- 0x4d53c27e, 0x9744c74e, 0xaa66ba08, 0x1f5d449d,
- 0xae4153cd, 0x6d096a28, 0xe6bdb07c, 0xd0e87cdd,
- 0xad5ac1d1, 0xcd7153c8, 0xb313634b, 0xfa507906,
- 0xefd74671, 0xcbd126ea, 0x51418e17, 0x43ec6973,
- 0x4c28d874, 0xce7c2fb7, 0x59627e9b, 0x0d71d899,
- 0x1679ce3a, 0xe7578b23, 0x7b5c43e4, 0xe93d2313,
- 0x0b09b9f4, 0x62e26321, 0xc08da4ad, 0xd03e459f,
- 0xc705d09a, 0xfabd5d2b, 0xd817fcb4, 0xc61fbe8c,
- 0xa216cbc0, 0xa844f721, 0xb1c44147, 0x383a2589,
- 0x1c26ed0a, 0x66e837ab, 0xf2c158ac, 0x91ab35a5,
- 0x4ac10d6e, 0xce73a342, 0x8ab5e6a7, 0xdd4e6278,
- 0x37ae66b3, 0x3c21ffd7, 0x575d7013, 0x68c5ed99,
- 0xa4bb530f, 0x9c233812, 0xda6817c5, 0x3eda3a7e,
- 0x02e81b6f, 0x57b8b9eb, 0x6b3f1bad, 0xc267a085,
- 0x7f9ece08, 0x9b72eb5a, 0x25861ce3, 0x7821c4b9,
- 0x87fd9a93, 0x80683eb8, 0xd203432a, 0x9281544f,
- 0x9385bd78, 0x7c75f0ee, 0x20a72d75, 0xfe9b3d5d,
- 0x0309006c, 0x7c295280, 0xf91efe20, 0xc1f9db0c,
- 0x7873af11, 0x816dd3e1, 0xc750c0d3, 0xc038fb60,
- 0x4934e055, 0x660fc920, 0x8611b0c0, 0x5fcdb814,
- 0x8c8eb7c5, 0x769da935, 0x08138d4f, 0x5b4fae17,
- 0x6991be76, 0xfef63442, 0xef554565, 0x119ac2a4,
- 0x7237898b, 0xbbfddec5, 0x396b9e2c, 0x7cd52890,
- 0xdcec9de6, 0x83c47ede, 0x34a05845, 0x0c210e8a,
- 0x65810421, 0x63eade0b, 0x0ba1c957, 0xbec6d006,
- 0xc36e7402, 0x2784fa19, 0x7a3e246a, 0xcf110e8b,
- 0xc3f4dd61, 0xe9a8d6ec, 0xfb63b0ce, 0x7cc2e35d,
- 0x6d8b1883, 0x14369707, 0xd6c37e16, 0xb634047d,
- 0x25c02b3d, 0x7ddc3504, 0x5aad3917, 0x663f641a,
- 0x399cb455, 0x54becc41, 0x23c2b715, 0xe039d8fb,
- 0x51e80309, 0xf20f1460, 0x6bde63bf, 0x8064aadc,
- 0xc4037a27, 0x60ece5f5, 0x0b6b72bd, 0x3b804ca9,
- 0x1b908ced, 0x6fba1773, 0xe415203c, 0xd9823431,
- 0x446ea0e9, 0xe7d21771, 0x903d3805, 0x3f512124,
- 0x19414ce9, 0xabd95d7d, 0x2363ff6d, 0xba47b061,
- 0x4382c277, 0x63b01743, 0xbec54415, 0xdd06dd91,
- 0x7ce565fb, 0x8660d02b, 0xf13e4e5c, 0x71241c8d,
- 0x505f298d, 0x42d4a434, 0x1bb5254f, 0xb4502dfa,
- 0xf76a59ca, 0x6185caef, 0xddd5b940, 0x13577870,
- 0xd79c5b38, 0x814245f5, 0x14beb2d0, 0x28ce5345,
- 0x439b8dfb, 0xcb4e9b67, 0x0441d3d8, 0xcc0640c7,
- 0x4d868505, 0xda87621c, 0xe4795039, 0xd586c8ea,
- 0x8308073a, 0x78559ce3, 0xc4f93658, 0xe8df85ba,
- 0x9aed2c23, 0x1ef7c4b3, 0x4613829c, 0x0bfe4683,
- 0x1b7a1f2a, 0xd85f2584, 0x74fae5a6, 0x7d64660c,
- 0xf1d6cdc0, 0x1db730d3, 0x03650f53, 0x4809a85e,
- 0xd5c41303, 0x2239e054, 0xf1a6de34, 0x53e4a8d5,
- 0x28b166e9, 0x40dae4a1, 0x5e6cdb6f, 0x924b3867,
- 0x48188d16, 0x4855da97, 0xef986afc, 0xf65f1c49,
- 0x7914b1f3, 0x10c182b8, 0xdadc1cee, 0x0e7422e3,
- 0xfc308219, 0x67098cc9, 0x5380b7ed, 0x65f7d3a6,
- 0x711e0657, 0x59e7cabf, 0xb1c47735, 0xf7e0034a,
- 0xab62300c, 0x2f636eaf, 0x746ac675, 0xcb7b4bda,
- 0x01f117cd, 0x8af07a1e, 0x39616883, 0x22a8e329,
- 0x80fa99e5, 0xfc48b995, 0x9c43516e, 0x40411674,
- 0x52647c1e, 0x29659ea1, 0x5f8b6429, 0x8ad95229,
- 0x5a77c499, 0x3fe94266, 0xe21d84cb, 0x15140834,
- 0xeb6e862a, 0xf93cfeb8, 0xd1435c17, 0x2ed2d4d6,
- 0xe94b371f, 0x1dfa1a35, 0xf8eefd0c, 0xfc502190,
- 0x3022d1e7, 0x8e98dc70, 0xb3941c72, 0x48ce162e,
- 0x04def7d2, 0x05505c46, 0xce8253fd, 0x727f4df1,
- 0x5cf5d8a0, 0x125b5812, 0x1b1b715e, 0xaa322065,
- 0x846ed704, 0x86f73cf7, 0xbe585d0c, 0xac05cff0,
- 0xe6762d2a, 0xd6409b1f, 0xfeadc485, 0x14eeca23,
- 0xf75ed62e, 0xc4c19528, 0x16b1ee8f, 0x34137e4c,
- 0xeaa695c2, 0x5a2c7542, 0x40f886f9, 0x6e901f70,
- 0x59265bf3, 0x54dbf006, 0x98ebf58e, 0x0d88e5e8,
- 0x95b34bf2, 0xb3375ead, 0x027495a2, 0xceebe58d,
- 0xf9351f6f, 0x97f088fa, 0x86ce4b3b, 0xad4c488a,
- 0x2134e0f6, 0xc61fd37c, 0x47e6b2d5, 0x55d2a66c,
- 0x57471792, 0x5cc3af34, 0x69cb3eb2, 0xd3f4e2cc,
- 0x371d07e5, 0xe72a5df5, 0x6ae73a0e, 0x82d06141,
- 0x50d338d6, 0xb097808e, 0xa928f699, 0xce757e78,
- 0x2371b850, 0x5c54c120, 0x94cee629, 0xb67686a3,
- 0x09ad4704, 0xf0a155b7, 0xcc179b36, 0xa6aeced0,
- 0xb3f51661, 0x9cbcd13f, 0x94e8c76e, 0x024361f6,
- 0xcd887436, 0x2bf4d7a1, 0xf7c17b37, 0x133e8eeb,
- 0x3ea6a45f, 0x520d492e, 0x742d90e8, 0x2ce299fd,
- 0xd0a875d5, 0x0a5a57f2, 0xcaae21e5, 0x9086856d,
- 0x8ac23fa2, 0xe7b4d462, 0x4999f32d, 0x60274da4,
- 0x6a5ee783, 0xca34744a, 0x7f64c6ee, 0xf699a281,
- 0x5ece3f79, 0xe7afc768, 0x7836a20a, 0x390502fe,
- 0xaf39bfe1, 0x5f8c0721, 0x0f5aac11, 0xd3052ccc,
- 0xba7c23aa, 0x6da80adf, 0xf4634e0e, 0x2663505d,
- 0x117d649c, 0x5fc39b44, 0x1ec1cc7f, 0x0e666e4e,
- 0xd3279646, 0x32862aca, 0x90ce9078, 0x9b18c91f,
- 0xba531b12, 0x73f42de1, 0x5a374359, 0x3aa5989b,
- 0xad23fc0f, 0xcde1c203, 0x2389c404, 0xf1d6b5c4,
- 0x86cb6fba, 0x2ae50b83, 0x30aacd67, 0x20b657df,
- 0xbb25fdb7, 0x04b5c269, 0xaea481af, 0xe89b2fae,
- 0x2ca04b4b, 0xe6b53b3c, 0x55ac73f1, 0xceceba11,
- 0x3b317b02, 0xf920f5c7, 0x2112e25f, 0x9f1399a5,
- 0x3b5aed97, 0x82fa3db6, 0x32da32ce, 0x61aa356c,
- 0xd9eef8a3, 0x5ad1a4a8, 0xbb0cc345, 0x7f25edea,
- 0xd9ae7b9b, 0x22575550, 0xd3ef4ba6, 0xb9ade338,
- 0x942e2317, 0x2f5e3e65, 0x6e6dd63d, 0xc7837067,
- 0xba1be094, 0xc07d82eb, 0x3b241ff9, 0x92844bbe,
- 0xeea2e10f, 0x2a194f95, 0x133ba864, 0xdf698784,
- 0x7e632e2f, 0x99d5dcb9, 0xfa78c04f, 0x2d02fbce,
- 0xb7597402, 0xe60a3216, 0x0f213875, 0xcb448cd9,
- 0xcc024c70, 0xa47a7983, 0x6fcef001, 0x34a50c04,
- 0x0b5a4a5b, 0xd36e43f6, 0xc86c5f31, 0x3add4a92,
- 0x7f046e63, 0x7456031d, 0x4cac381b, 0x23bc33be,
- 0xfa562030, 0x86b4ac9a, 0x80f47e71, 0x83d06b96,
- 0x56eb1b14, 0xc4dc487c, 0x7fd6b538, 0x17173b7b,
- 0x9c4586c3, 0x691b85b8, 0x7ff336c8, 0xc5b6593e,
- 0x3f6ccc20, 0xbf268878, 0xcaff2726, 0x122aee01,
- 0xe43c6e44, 0xb72b3568, 0x4e1697fa, 0xe51dad88,
- 0xd5eec231, 0x7fe6b74e, 0x7e4cb0dd, 0x924a4b42,
- 0x35745453, 0xe39021dc, 0xe961be10, 0x41b255b5,
- 0x40921705, 0xb979c943, 0xeb9c766d, 0xa6d1e044,
- 0xceec56a6, 0x073f7166, 0x66ef10bd, 0x820bab05,
- 0xf8cfdd84, 0x3ac5a605, 0x8f0e8aff, 0x7f289d22,
- 0x72aafac8, 0x607e9d8c, 0x7a204ee4, 0x7d69e188,
- 0xb733f89f, 0x216c50a1, 0x1775d87f, 0x92cb5854,
- 0x16726cb0, 0xaada1cdc, 0xceab8da0, 0x5ac08515,
- 0x7222d621, 0x2d3bf547, 0xb2a46d39, 0x0a55e404,
- 0xd0f96092, 0x0a43bbfd, 0x779d431b, 0xd609119d,
- 0xe697cc29, 0xc4e32548, 0x113046c7, 0x92d36739,
- 0x949850b4, 0xcca28eff, 0x9b782d07, 0xf1fb4163,
- 0x7658cd91, 0x3c8bf795, 0xffe6a68e, 0x75bc1e62,
- 0xcdc63834, 0xd1c34186, 0xb579135b, 0xc7eb7d2d,
- 0xd3452086, 0x679e302d, 0x0747bee7, 0x25318574,
- 0x758eefe7, 0x12a3b686, 0x2a2c7026, 0x53957f5b,
- 0xa68abe52, 0x2f4b07be, 0xec811b09, 0x28784687,
- 0x475bde35, 0xf4a568a2, 0xa18bdf37, 0x885986b3,
- 0x99b2a57a, 0x2733dfed, 0x1d4f2eca, 0x7709ed9f,
- 0x0871af03, 0x44bdf6df, 0x39f9442f, 0x845c147c,
- 0x729d2f05, 0x18338f18, 0xccb3c963, 0xfc7ad8aa,
- 0x99a2f4fc, 0x8623ad7a, 0xfbf465d8, 0x35d1c38a,
- 0xb4f128a3, 0xd42f5685, 0xcbed5c09, 0xf0025603,
- 0x3777cd54, 0x7b420f01, 0x8f6b58bd, 0xfa0aef03,
- 0x8afa1826, 0x48de3c1c, 0x2bc4310f, 0x95253743,
- 0x11b55236, 0xd54775a9, 0xde3fff8b, 0x6b3f5bc7,
- 0x06dc676e, 0x7b8f3f71, 0x50375e23, 0x1c17605e,
- 0x480e3072, 0x10d2dbff, 0x7f64178e, 0xb4655d95,
- 0x89f6a71c, 0x055850f5, 0xf131342d, 0x4019b083,
- 0x35f83286, 0x3f2802d6, 0x1ccad590, 0x8d30bbc9,
- 0x0db48257, 0x623f5161, 0x4f0a481b, 0xaa474fdb,
- 0x56c1009d, 0x53465fb2, 0x4f924a49, 0xfd639965,
- 0x532fa28e, 0x54cd2cc2, 0x61288c49, 0x8a2bcce3,
- 0xa5675c7b, 0xe12a3be0, 0x08e66dbc, 0x8b7414c2,
- 0x635888d4, 0xa263d533, 0x50db6461, 0xf8199d4e,
- 0xb8f1667f, 0xed571290, 0x9f1d222c, 0xd9add4b7,
- 0x66037020, 0xfa0d25ac, 0x7cd3c0d0, 0xce280271,
- 0x1932ba92, 0xd6be5076, 0xd7b3d11d, 0xf1fb5981,
- 0xd8c6a441, 0x58cdff75, 0x808a2b55, 0x6d973a34,
- 0x319de89c, 0x27769381, 0x056768af, 0xf878d036,
- 0x9f63efb1, 0x6135e150, 0xba675883, 0x81042913,
- 0x2550419d, 0xddbe61d5, 0xc81a8da9, 0xe9089ba7,
- 0xa5dd3918, 0xdab05623, 0xac841d16, 0x7a864bdf,
- 0x46ae5d33, 0x3180fbd3, 0x8e230a5b, 0x1f8d9fa7,
- 0xc174d6cd, 0xd0522dfa, 0xed499bae, 0x9fe63278,
- 0x813ab3fc, 0xdc3e2d0a, 0x0ed5951d, 0xf51ee2d4,
- 0x592c2bca, 0xad780575, 0xb86b8caa, 0xb4ab113a,
- 0x890b756b, 0xdfb71bbd, 0x47ac5f8b, 0x0f68e078,
- 0xc112fc4f, 0xe0e409d4, 0x4a5cc89c, 0x1bf61256,
- 0x49ce9b62, 0x18e47e44, 0x6e01609a, 0x916190f8,
- 0x8e1d1bbb, 0xbdaec593, 0x6d5114e1, 0xaf91d407,
- 0x062cc782, 0x957dbe4b, 0x4de1f42b, 0x318afaa9,
- 0x2f1067ad, 0x6687998f, 0xe7f887b5, 0xe9cbc3ea,
- 0xcd552a52, 0x45fcaacb, 0x1f4a1e4e, 0xa87e4274,
- 0xb418aa40, 0xdf7f30cc, 0x5a044a5b, 0xf797bc5d,
- 0xe8ba9054, 0x261f08c3, 0xf611337e, 0x9a30fd97,
- 0x29e9daab, 0x59113c28, 0xe79046ed, 0xc6175e4b,
- 0x11db74ea, 0xa671fd1c, 0x7bd62061, 0xd5b5d377,
- 0x4b900be9, 0x5e5226ac, 0xf3b663a3, 0x3166e685,
- 0x097259d4, 0x482a03e5, 0x401fdd84, 0x8cd79939,
- 0x4b18a6bb, 0xa7f79818, 0x04d794a9, 0x6e9ba6c5,
- 0xd53f0063, 0x18265a15, 0x978b673b, 0xdca20ad1,
- 0xf8909d73, 0xc3215238, 0x93fdabd3, 0x715d53bb,
- 0x0f26a37a, 0xc9eb821d, 0xf27257d7, 0x0bcd73d3,
- 0xa1fcf2d2, 0x4ab25bf8, 0x1167cddb, 0x202c00a7,
- 0x697afe18, 0x4bdf8fdd, 0x7532710e, 0x9829abb2,
- 0xa24ebb8a, 0x56f66505, 0x6e91067f, 0xf31f7c76,
- 0x87aa0191, 0x501fe66a, 0x640a3180, 0xefa32181,
- 0xaaea0e03, 0x47aa7a2d, 0x1cc55c2a, 0x154ccb03,
- 0xf6f717a3, 0x2aea78ad, 0xf4d6132b, 0xc78a6acf,
- 0x123cdf52, 0xff4bf2e7, 0xda02924d, 0xfe03ab9b,
- 0x755b6f25, 0x9d4a5428, 0x38e816ef, 0xac958ddd,
- 0xf688caf4, 0xd565bd38, 0x0a2f534f, 0x3af3dc2e,
- 0xe6b9af6d, 0x67d5e6ba, 0x3e322b23, 0x6d65d663,
- 0x558ebe4c, 0x7fc567a5, 0x2aa6b0cb, 0xdb23312c,
- 0x95ef5f3e, 0x79419a81, 0x8150fef9, 0xd453b954,
- 0x661e23b0, 0xde16a0b7, 0xa007dc74, 0x9a9c28e9,
- 0xde5becbd, 0x5f34bb32, 0x1852ea78, 0xc7312271,
- 0x3da2a26c, 0x36b6f593, 0xac766916, 0x37c63eb6,
- 0x972c3928, 0x4453ba46, 0xfda8992d, 0x059b3982,
- 0x846a03a1, 0x639648c8, 0x0b655eba, 0x77c9d10d,
- 0xe2d5adc8, 0x2f76cd22, 0xcb817adf, 0x20b42438,
- 0x72340883, 0x02494a75, 0x2dab7976, 0x00cbc5af,
- 0xfe356cd2, 0xbde2c706, 0xbf6321bc, 0x330a9fc4,
- 0x0d9c78ee, 0xc8134ad8, 0xb6d331e9, 0xfa6d61a8,
- 0xfcb3f05a, 0x6f728e48, 0xa051cd9a, 0x6a47dc1b,
- 0x62d967b9, 0x06447515, 0xde7feee7, 0xd2306a03,
- 0x71ddf8da, 0xa20fb50f, 0x1f233990, 0x3b8c7328,
- 0x7e6b3149, 0xa0927d88, 0x316eeef3, 0x73532916,
- 0xc1a2c9eb, 0x0b84f1f6, 0xe5d42a13, 0x9235e6f7,
- 0xb5c53568, 0x77e7fc23, 0x87133210, 0xa50378d6,
- 0xa6c761ec, 0x0ed2ad00, 0x5048961f, 0x69352031,
- 0x274d9f59, 0x900cecf3, 0x15b846d1, 0x6f41240f,
- 0xb0bac716, 0xfd913172, 0xa9ee7733, 0x415ca79d,
- 0xc7adb3a7, 0x1b21b7f1, 0x46f97f7d, 0xcb666a59,
- 0x45c1e930, 0xe178cfed, 0xb0a4e287, 0xd4565967,
- 0xd5e1b84c, 0x35f2ccc8, 0x69576869, 0xb5ed3da9,
- 0x69e48e1e, 0x00c070ce, 0x22c1ed82, 0x3b0302be,
- 0x58fca488, 0x5b027e58, 0xdea55117, 0xe1b14089,
- 0x5a5e34a1, 0x604059bb, 0xb67bbc68, 0xa2ee3188,
- 0x5339bf75, 0x44eeaee9, 0x130297fb, 0x0ac960a2,
- 0x1dbe6756, 0xa0b6afe7, 0x89f4a68a, 0xd9761d47,
- 0x0313bf98, 0x8c2a9a4e, 0x5335bd7f, 0xec1f7210,
- 0xb899b3c2, 0x8c76f63f, 0x324b1123, 0xc79cc31d,
- 0x70defa52, 0x1f9d068f, 0xfe68684f, 0xfc34f99a,
- 0x497e2ba9, 0xafde1a2e, 0xd3e5efc9, 0x7a767f96,
- 0x4854cff5, 0x86d26e2a, 0x756d3858, 0x4b138d76,
- 0x8ebf96d1, 0x504b2cfd, 0x2b342daa, 0x3bce0fcd,
- 0x4c1329bc, 0xaaa0b662, 0xd826add9, 0xba2294ca,
- 0x328f227c, 0x8b11dc5c, 0x641069b8, 0x85d2f558,
- 0x8db40b5b, 0x22ba2372, 0xdcde53c5, 0x79406548,
- 0xda717c22, 0x3edcdbbb, 0xd3bf588c, 0x4d21dc09,
- 0xbfbe0835, 0x445d79c2, 0x9186154b, 0xd8757931,
- 0x6cc2fda5, 0xee5bec7a, 0xa406a703, 0x1f382345,
- 0xeda58f77, 0x138a5396, 0x8f330eeb, 0x8c0bfe6d,
- 0x406170fa, 0x1a26c83e, 0x89da729d, 0xc0a36a93,
- 0xab107add, 0x895b0dba, 0x44c72fdf, 0xafb497f2,
- 0x07e595dd, 0x82f10ac6, 0x05533816, 0xa508c8e4,
- 0x06967120, 0x843fc145, 0x088a9254, 0xc9fa8c99,
- 0xf8c9e485, 0x10166a50, 0x93098cbf, 0x8bd33259,
- 0xbfe45bbf, 0x4593eada, 0x4ded8aeb, 0x8da9b4fc,
- 0x6500a2c5, 0xcb0ed4a3, 0x9b875b07, 0xbbf626f9,
- 0x65f9a0e8, 0x95bee21e, 0xadc6f514, 0x2530164a,
- 0x6a3cc255, 0x8dc4e14d, 0x8e600ee4, 0xc7c2edfd,
- 0x2c00aed0, 0x902a3b97, 0x39069f67, 0xc1d66342,
- 0x935a7012, 0xdb4bdae1, 0xfd5e6d06, 0x5474664b,
- 0xe7051ffd, 0xbee1e0bd, 0x5acf1aaa, 0x3a6a5f92,
- 0x9130e4fe, 0xe9ee424c, 0x4a475aea, 0xff851640,
- 0x69c24a9c, 0x4a055b88, 0x24d7028e, 0xb8f5a11b,
- 0x7b451dce, 0x36b90efa, 0x0816c853, 0x36247966,
- 0x457b7fb4, 0x082dda9a, 0x6e515ab8, 0x09784a04,
- 0x279e3e51, 0xebce6723, 0xc3f87fae, 0xd22884e6,
- 0xcc61399e, 0x36e7194c, 0xfc9035e0, 0xd0d0cf09,
- 0xe538fe52, 0xfcf309b3, 0x24e7cc29, 0x7dfeb54f,
- 0x7bb9c289, 0x5b5ace34, 0xbc048587, 0x181c6ba7,
- 0x68a21ec9, 0x067922d2, 0x256d6392, 0x96c3ce60,
- 0x7beaccaf, 0x11635cd2, 0xe9f2e8c7, 0x864eb506,
- 0xdbc5369d, 0x98201a87, 0x81805dfb, 0xcdb68451,
- 0x4bde831c, 0x52c9a44e, 0xccb7ebc8, 0xdd04cf8a,
- 0xff631388, 0xc6b4a68b, 0x5b9e8643, 0x0b783754,
- 0x330e86c1, 0xa3146d54, 0x23129703, 0xe0f462dc,
- 0xa0e27e2d, 0x03b413f8, 0x97aeb991, 0xd93f60c9,
- 0xe6816707, 0xf9f7623b, 0xf6737142, 0x9546adbb,
- 0xd701e5f6, 0x6df8ddeb, 0xcda63487, 0x0663f283,
- 0x921a49f8, 0x298d6b62, 0xe6d0c061, 0xf9a351c9,
- 0x21fc5a29, 0xf80360e9, 0xfa40159e, 0x68a67bc5,
- 0x16b26133, 0x672d361f, 0x31a15e46, 0x0b2e2ead,
- 0x2a7982a9, 0x5350d494, 0x0bbb2836, 0x8eb00983,
- 0x4efb127e, 0xabc5254f, 0x5830b321, 0xc36b67eb,
- 0x3be1629a, 0x9fa8974a, 0xfeb63ab4, 0x19224f6f,
- 0xc7ff35c4, 0xc9f50be0, 0x7b352263, 0x632d81b4,
- 0x23cc9877, 0xa1d20d50, 0xa1bb25fa, 0x68739501,
- 0x09a740f7, 0x5c99f10b, 0x927e7d8b, 0xaaa48590,
- 0xf8c85d0e, 0xb78afbf3, 0xc7e64477, 0xc1744f7f,
- 0xdd94991e, 0x0c8fc3cf, 0x8d8ed675, 0xbe527132,
- 0x427a946e, 0x1378322d, 0x549df0bd, 0xba2258a0,
- 0xf6b5391b, 0x75c73dc7, 0xb50023c0, 0xa9ee16fb,
- 0x9f1fdf02, 0x5db168c0, 0x866c520e, 0xab4137da,
- 0x05615ade, 0xea30a15f, 0x709f68eb, 0xd24862c0,
- 0x5af24b5c, 0x5a4b0579, 0x1c44e1ea, 0xe66bddb7,
- 0x08b0c7f7, 0x201c61c7, 0xc2aff628, 0x93763863,
- 0x921586f2, 0x3130137c, 0x46b381f2, 0x7d1bc7eb,
- 0xbebde217, 0x42af3319, 0xf2ced318, 0x52cee723,
- 0x63586e1b, 0xfcbdc19a, 0xb2505e9b, 0xabbc98ce,
- 0x7e706262, 0x40a52361, 0x98ff4565, 0x30dbe4db,
- 0xa4743710, 0xc5275397, 0x4d39c879, 0x5c68fa8d,
- 0x02a4fb6d, 0x765c1aba, 0x228e3b92, 0xd04752e8,
- 0xa95e7e69, 0xbf760bbe, 0x3eb46677, 0xa601e376,
- 0x72ddfdcd, 0xd7a4a683, 0x97dbb641, 0x86a7e27e,
- 0x942cfe36, 0x4088cf58, 0xa7d3f1c5, 0x0d97794c,
- 0xcfa57b9d, 0x8894c96f, 0x79562a3c, 0xbd2eafe3,
- 0xe07ad19d, 0x0136fdfa, 0x4d5cf83f, 0x522dfcb1,
- 0xe4ef93cb, 0x4fc31ac5, 0x67676d1c, 0x7d2e3bb3,
- 0xf3d89c14, 0xf09d83d6, 0x01fb8b26, 0xf8062cfa,
- 0x0b3d9aad, 0xbe5702a4, 0xee1d769c, 0x12b573ac,
- 0xc4a7a43c, 0xe19b7d65, 0x09fc15f8, 0x688556e6,
- 0x67f3ff37, 0x46860995, 0xca2ad83c, 0xe0413f37,
- 0x7cbc74f0, 0x3f1395fd, 0xfb4f1db9, 0xde029a4d,
- 0x3ae29aad, 0x770623c8, 0xf7f367dc, 0xc08a2a66,
- 0xaf8f8d83, 0xbd247a9d, 0x977a00bc, 0x483d13ec,
- 0xe53cdb66, 0xf6ed2acf, 0xb38826b7, 0xcde53a2e,
- 0xf1936f7e, 0xeaf64b9f, 0x590390a8, 0xdedf8298,
- 0x187173f6, 0x079ba901, 0xce905c53, 0xe3b7bdf1,
- 0xf4bc2b1d, 0x92670795, 0x9ffe5e01, 0xde676ad9,
- 0x11b031ab, 0x8b36b068, 0xbc50c114, 0x2292479d,
- 0x48e5c480, 0x731b1223, 0xa9bf2216, 0x0caea825,
- 0x13be48ba, 0xfb00d6ab, 0x130ea973, 0x44110a8b,
- 0x8de72774, 0x98996fc5, 0xdaf7e6c4, 0x4feaff06,
- 0x4db97c3f, 0x5b025a0b, 0xe2e49643, 0xc0f2e737,
- 0x91a75aa2, 0x003d9592, 0x94a01495, 0xc33c69ed,
- 0xc562cf5f, 0x6c743acc, 0x111e592f, 0x842b7050,
- 0xb1297d34, 0xd44d4b80, 0x7350b0c8, 0x59c39193,
- 0x68b31697, 0x6495fdff, 0xaafa67d1, 0xcd1f5f46,
- 0xf5bb17d1, 0x78b7e743, 0x6931f3d1, 0x87b90ecb,
- 0x8c7aa961, 0x398b83c9, 0x580c192e, 0x7666a8cd,
- 0xfd45b4e8, 0x8593f2a0, 0xe2dfd37d, 0x16567816,
- 0x16c10d33, 0xbe038067, 0xafafbb44, 0x83637c33,
- 0xcdca84b9, 0x3c516321, 0xf198ddf0, 0x7bdc4b7c,
- 0x11880844, 0xca6b670d, 0x3d57b609, 0x7196ffad,
- 0xacf163c1, 0x08d1eb86, 0xea8fb4ae, 0xc1d5affe,
- 0x26fa287e, 0xecade3c5, 0x5000416f, 0xf7cf603b,
- 0xc17b0ca5, 0x4cacc97a, 0x217b1442, 0x42ac4d77,
- 0x938309a1, 0x561d06a9, 0x1bd39686, 0x8b560889,
- 0xa85b8309, 0x191e5458, 0x51a7c28e, 0x519c77e9,
- 0x460b1fd0, 0x4fb27662, 0xc13033ce, 0xa25f2b45,
- 0x38b507bb, 0xa7743f25, 0x2cf52299, 0xf8d1a303,
- 0xe0def3f8, 0x787cd345, 0xb8bbdb12, 0x953e00d2,
- 0x16d60be6, 0xfc00bc63, 0x185b0ef5, 0x0264cd05,
- 0xda62f4e7, 0x9a7ae78e, 0x8f97b28c, 0x890d45b7,
- 0xb0b7764c, 0x2a57f4da, 0x6c2bc675, 0x151ecc64,
- 0x4ee7e8be, 0xedabe1ee, 0x1746de0a, 0x98f58e8d,
- 0x93334686, 0xaa77e498, 0x7fe049a0, 0x0a6ed9b1,
- 0x251146f1, 0x18f92378, 0x293b93a5, 0x67697c76,
- 0xbcbd1e34, 0xb64d5372, 0x49e24c2c, 0xc642ac96,
- 0xad2ca528, 0x7b22c2ed, 0xa509b8af, 0xc2e1f8b9,
- 0xb493316f, 0xaeff84d8, 0x3b8203b7, 0x989f56ad,
- 0x6b2c87d1, 0x036e2bac, 0x5a854fcf, 0x160aa0d0,
- 0x54dd376d, 0xe88e0861, 0x89949ad8, 0xe7ce6297,
- 0x4958a424, 0x6067f7b8, 0x4424dbf8, 0xb8fcf27e,
- 0x88490419, 0x2867674a, 0x125c5fc6, 0x30b40e53,
- 0xa36645ac, 0xd2132796, 0x9633255a, 0xf5d9a47a,
- 0x23e2778a, 0x07994dbd, 0x2cac2037, 0x662ff0db,
- 0xdcd76674, 0x240e2e46, 0x68eb9947, 0xf47c01a7,
- 0x0f78eebf, 0x75f2c7e6, 0xf4ea2a54, 0x833f7869,
- 0x19aaea84, 0x71f43bc7, 0x1e8bad09, 0x93552f9c,
- 0x57bc3fc0, 0x90f65a10, 0x2cb23682, 0x536863d7,
- 0x642c8e70, 0x17aa1ad5, 0x95390357, 0xa0300b25,
- 0x787919b1, 0xbb1c7630, 0x5d6afad9, 0xda23ca3e,
- 0x17a408d7, 0x54a2bbd4, 0x199e3300, 0xe301ac6a,
- 0xcb021156, 0xaa3982e0, 0x906a5e15, 0x050e23d8,
- 0xe091ef1b, 0xd8f6e478, 0x22efbe5e, 0xf37fc04c,
- 0x88f3f7f0, 0x751824d7, 0xb4bbcc32, 0xe1b667e7,
- 0x59326f7b, 0xc5c474e0, 0xb8abab00, 0xee9383b3,
- 0x01d8914d, 0xa7e95c24, 0x6a93ac10, 0xe0bccd1e,
- 0xf174f290, 0x4351b48d, 0x78b49e91, 0xb2eae046,
- 0xfaa39124, 0x274be1f1, 0xa860b8f9, 0x6d12d876,
- 0x1c4f08ac, 0x2e31b4dc, 0x2cc62112, 0x3860e4ae,
- 0xe1cbfd43, 0x1a153233, 0xb08fa237, 0x0e67f4e4,
- 0xce687d17, 0x3e66f9f9, 0x1b10cdcd, 0x498d6218,
- 0x1659a1c1, 0xf127900d, 0x377fae38, 0x07c4e3a7,
- 0xe43b9dee, 0x8c5bf70b, 0xa95a3bf8, 0x1141b347,
- 0xadee4f86, 0x74893714, 0x5b8bf395, 0xb2418987,
- 0x3e716c6f, 0x6056cede, 0xc664361e, 0x630e6949,
- 0xce1bd0c0, 0xdb87f09c, 0x63c33f7a, 0x04de7e67,
- 0x44a3af83, 0xb31aac95, 0x954073a4, 0xf155cfc1,
- 0x5706fd07, 0xec36d3ec, 0xb9a62d76, 0xa7fbd558,
- 0xe1be62c6, 0x2cb0f254, 0xdaf8147c, 0xc018f5a8,
- 0x15e9f7ea, 0xf8e41b6b, 0xaa47efd2, 0x869d9340,
- 0x08a9579f, 0x53d043e3, 0xd7e8ecda, 0xa94b8af1,
- 0x019447b3, 0xbb9340f8, 0x86631524, 0x56119d33,
- 0xf56ccfff, 0x90277fba, 0xfe80743e, 0x3c4f7210,
- 0xe9ae478e, 0xbf28e0d7, 0xc1ba190a, 0xc6e1f336,
- 0x3348bdc5, 0xba301b06, 0x109c28a9, 0x93f00944,
- 0xde71dedb, 0x75db5a8e, 0x3fd50476, 0x502177f1,
- 0xef867f0e, 0xc697a9cf, 0x2fb33834, 0xc2ae73a1,
- 0x0ef411e7, 0xaca15582, 0xa631b708, 0x5e29a326,
- 0x19d4fb1e, 0x0e14bbbb, 0x69b9da7c, 0x9adf734c,
- 0xaa3cbf09, 0xf49a1914, 0xedc06e2a, 0x2e26907c,
- 0xe4e7b0f3, 0x555e18bd, 0x64b9378c, 0xc015228c,
- 0x6652b24c, 0x964f67df, 0x53e52747, 0x437f0435,
- 0xf5eaae4d, 0x67e627a8, 0x88922d96, 0xacefb73d,
- 0x196b3dab, 0x18df6f1d, 0x1fb1e3a4, 0x41368e0e,
- 0xe6b38563, 0x2217d9b7, 0xd60fcd57, 0xc6e54482,
- 0xe13857b7, 0x9608f663, 0xa98387d0, 0xd0dc79e9,
- 0x5eb66007, 0xa6d47edc, 0x216ce2ff, 0x774fbfab,
- 0x015327b3, 0x601bc15e, 0x11008332, 0x9530321f,
- 0x81f5a229, 0x1ec81430, 0xa9b62b58, 0xad7106c6,
- 0x316ccc64, 0xaf84878f, 0x57196f56, 0x337e718e,
- 0x599624b5, 0x783bbb19, 0x0bd61790, 0x5ea38aeb,
- 0x80924f04, 0xfb90c004, 0x517a5a49, 0x72dc2f94,
- 0xc67f6691, 0xa5fa6d1b, 0xf37258d2, 0x052a2710,
- 0x2265b5d6, 0x1ff7543f, 0x8d98d31a, 0xd07d518e,
- 0xc693a93b, 0xe322f235, 0xfd5a13a6, 0xf4b5bec7,
- 0x6a879bf6, 0xb5c9c3c5, 0x02b4c679, 0x79126fcc,
- 0x9471f8ca, 0x240b738f, 0x82d6eed8, 0x5cebe2ab,
- 0xd0ce0802, 0xc352d955, 0xab391b94, 0x255e337b,
- 0xe24e9d28, 0x590b078f, 0x6f02bdcf, 0xa798c871,
- 0x032a8771, 0x4c177274, 0xe6e5f8fd, 0x5802dd90,
- 0x99c73404, 0x3d6d3858, 0x888fee18, 0x54fe3a75,
- 0xd1de4ef6, 0xe70daa9e, 0xd8117486, 0x5e724f88,
- 0x7484de9a, 0x416b0091, 0x649600dd, 0x79cfdc3f,
- 0xdf187828, 0xfb82fa6a, 0xe1373450, 0x99b1b237,
- 0x625c568c, 0x346de1e2, 0x3d09ae1c, 0x61e47376,
- 0x3b3e6b1b, 0x143a8e94, 0xe8f18ca6, 0x930210e2,
- 0xc7ad686f, 0xd79827d0, 0x843e3682, 0xb8df98e7,
- 0xdbb1452f, 0xfd7718fb, 0x050c794d, 0x620c3ed3,
- 0x37a9b4e9, 0x930917b0, 0xcf005633, 0x37881383,
- 0xbccfabf2, 0x1ef2b275, 0x5373eb32, 0xf720edd7,
- 0xf7e2c7be, 0xf510f803, 0xe0af57df, 0xed683137,
- 0x3b1824d7, 0x4e518264, 0x75ca2a31, 0x8e665a08,
- 0xda2f2631, 0x90f2e624, 0x0b7f10ed, 0x13c77405,
- 0xbc8f1852, 0x50efce03, 0x6f37e62c, 0x2146f0ac,
- 0xcba12673, 0xb0cf7aa3, 0x62c260c6, 0x914a686e,
- 0x4f88de7d, 0xe08828e4, 0x836ade2e, 0x1169dea1,
- 0xfa527a96, 0xdb0b67db, 0x81c54c3f, 0x3242a174,
- 0x3720d1eb, 0xa2d66d86, 0x3aa9d815, 0x2f50dd70,
- 0x7ebd695b, 0xa23ce46e, 0x809e2b62, 0x80868a12,
- 0x9fb19fde, 0x063cf06c, 0x5fb5c6be, 0x02305e67,
- 0xb07a8437, 0x802d6f3c, 0xa3ae466f, 0x78b26abc,
- 0x1b794720, 0x32909b4d, 0x341790e7, 0xe970c75d,
- 0xe486e869, 0x77ff3164, 0x2af5bb86, 0x8cbe9546,
- 0x0c554b7f, 0x1d6733f9, 0xc8a2e9dc, 0x55be433a,
- 0xa8822719, 0xc3bb4f7d, 0x8ff63bad, 0xccfca1d7,
- 0xfbd989c3, 0x00cc0aed, 0x62d8ea04, 0x28db507e,
- 0x9b010be7, 0x5ba82df9, 0xc5033952, 0xbb36456a,
- 0x503bedc2, 0x7f34a7d8, 0x4c95f684, 0xa9fe83c0,
- 0x2119ef47, 0xb140a84c, 0x110d1d3e, 0x29d56f44,
- 0x6d005db8, 0xb5266ffb, 0x5cd3945d, 0x2245bf69,
- 0xc0240f64, 0x1ab59295, 0x3dbfbe90, 0xce0195d8,
- 0xeb62d7af, 0xc674e175, 0xb9a0b91a, 0x04f4fd68,
- 0x5034bc19, 0xb5f1e1d0, 0x4d17664b, 0xf3a3b573,
- 0x45bd805d, 0xec3af23f, 0x83026378, 0x7b5796e6,
- 0xedafef9a, 0xcc728ce5, 0x8e7b49b5, 0x30b6e2ea,
- 0xd624ca20, 0xf92dc17d, 0xe1cf296a, 0x5391caed,
- 0x993eb46a, 0x7eadd9ee, 0x20e03f32, 0x10309bda,
- 0xc42a95b2, 0x264c9739, 0x47d678a3, 0x5aca4b99,
- 0x27c8bd0c, 0x08dc0c8e, 0x41a0d977, 0x84495d9a,
- 0xb3e7c7f5, 0xbb7208c3, 0xeeffd6af, 0x99728ae8,
- 0x96e3acc5, 0x46c5b5f0, 0x4e9692c7, 0x4a2856b6,
- 0xa6e70afd, 0x0ebfa9d7, 0x5a617dfe, 0x136458c5,
- 0xe81577fb, 0x9a346ce6, 0x2276bd4b, 0x19872c41,
- 0xebeeaf79, 0xf1eee391, 0x3a092d4b, 0x6d480ae7,
- 0x11cbc262, 0xfd19181e, 0xcd2baf7b, 0xf3d3b630,
- 0x7e02cd19, 0xeafa37c0, 0xfc3ab903, 0x19d7d5ea,
- 0x1522555d, 0xe659e8af, 0x4241187a, 0x0c95a038,
- 0xf7a8c439, 0x2ba81067, 0x8537a7da, 0x3fffa8f8,
- 0xa86c8fe5, 0xee860d78, 0x9cdde285, 0xe59c35d1,
- 0xf3423ace, 0x3b9f18d6, 0xe6b4d111, 0x6307359e,
- 0xc10d0c18, 0xdd6a1283, 0xd61b5cdb, 0xa52c1e9f,
- 0x1cf0ee74, 0x207bfe55, 0xab0c199a, 0x6680655f,
- 0x458ac1c5, 0x59669d48, 0xde00456a, 0xfa24fb02,
- 0xdb25e6b3, 0x4759b8d5, 0xc297affa, 0xd24e5878,
- 0xf79ba7bd, 0xcb7ec9d8, 0x8df35387, 0x29ee1378,
- 0x296aa1a2, 0x0292c907, 0xf2a42aec, 0x2d91514a,
- 0xcff397e1, 0xdd316608, 0x6d45c90a, 0x361936da,
- 0xed008c30, 0x24fa496f, 0x5c1ecc6c, 0xd239ade4,
- 0x143fcedc, 0xeb5a8ea5, 0x893127d2, 0xa1c06528,
- 0xfeab6608, 0x8f773eff, 0x17b1cd39, 0xb6cdb5f1,
- 0xae013c68, 0x6757a0e1, 0x236096f1, 0xa994b205,
- 0x7c717a31, 0xdf765300, 0xcf9936c7, 0x5d5edb37,
- 0xeaa7c17c, 0x73ae0a85, 0x4f0a3a26, 0xadf63001,
- 0xeeabbc57, 0x65e37d8c, 0x93e64068, 0xc5686912,
- 0x810e38bb, 0x1c89b1e6, 0xdb5c9e5a, 0x217f4efb,
- 0x054ca07a, 0x90624ad1, 0x4f1212c8, 0x9099eb4c,
- 0x8ca443a3, 0x99887edb, 0xb8428dd8, 0x60ad4105,
- 0x9153afa4, 0xefdf8bcd, 0xb82041ce, 0x22c39153,
- 0x4ba5ab79, 0x73b4a621, 0x45a91da2, 0x9d7597c7,
- 0xe501fdaa, 0x45a8fce2, 0x2b32624d, 0xcef2645e,
- 0xc88eead4, 0x72bbee6a, 0xb63e6cb9, 0xc17830fc,
- 0x5fc477f0, 0x56f8f783, 0x8742083a, 0xd3bdf98f,
- 0x2222e3ce, 0xf20cd44a, 0xa3c8f166, 0xfb70b222,
- 0x88cf7d3c, 0x97064ca0, 0xa81e37c3, 0x2045a54e,
- 0xec70f5d7, 0x8461dad2, 0x0478a8a7, 0x88753a88,
- 0x9753a230, 0x982cff7a, 0xafeff6b7, 0x7913a243,
- 0x44e314b1, 0xb71105e0, 0x9d0e8204, 0x237c3118,
- 0x4d8873df, 0x0368c70b, 0x432f8cb4, 0xfd493409,
- 0xafea07a6, 0x4afb576d, 0x8e517d06, 0x7a3b84f6,
- 0x1bae9381, 0x8f62e882, 0xa9f1e783, 0x9824163a,
- 0x8054f277, 0xe62e9cbd, 0xc39dde1b, 0x24e232f8,
- 0x5acdaacb, 0x27074e5b, 0x5383d8ff, 0xd28f6398,
- 0x4bd1d713, 0xd6282ec9, 0x4cc38f04, 0x02432175,
- 0x18386f71, 0x3cf5efea, 0xa4913139, 0x5ab9eb4c,
- 0x63ec6690, 0x0b882807, 0x6ae93e1e, 0x25a6cd92,
- 0x71fa0fb7, 0x5c4d0517, 0x507a5f0b, 0x9ad2772b,
- 0x7d3f0e07, 0x3205aa7a, 0x7c946116, 0x6b243eaf,
- 0x7d33f31e, 0x45c18845, 0xdae4efc6, 0xa9047dfe,
- 0xd178dcd1, 0x6aa30ca9, 0xdeabd81f, 0x2876c341,
- 0xde3095a5, 0x8f93d022, 0x9a78e64b, 0x147aa0a0,
- 0x5dfeb2f9, 0x158167ff, 0x1335d1b4, 0x675d6ea6,
- 0x066f0909, 0xc9324702, 0x68a75527, 0x740aa84f,
- 0xea686192, 0x78af651b, 0xe99f5db7, 0x09cbc101,
- 0xdbee388f, 0x1694ff29, 0x30d9ed06, 0x1d4a9a16,
- 0x0c60ca8f, 0x2ca66130, 0xb4ec8db1, 0x6171e7b1,
- 0xef850685, 0xf54862d4, 0x16c0dadf, 0x12f2dfc9,
- 0x2b243a21, 0x52a919a8, 0x8d5f31e7, 0xc088c5ce,
- 0x7a19e823, 0xc1e6b67e, 0xa4f9108d, 0x8db0d42a,
- 0x7875a613, 0xa255a349, 0xd97b2cb6, 0x559065be,
- 0x6fcd2ef6, 0x8d1171bb, 0x8f18fddb, 0xe595af9d,
- 0xfcc7b725, 0xd4dd9eab, 0x8eb142c2, 0x0dba44ee,
- 0xbc15e3c2, 0xdd4ac8ae, 0x983f0570, 0xbde2b8f4,
- 0x05d637bf, 0x9b743557, 0x09715719, 0x0ff8e59a,
- 0x149f663e, 0xeebf9293, 0x3c185a86, 0x6840c25e,
- 0xc55135f1, 0xa2f18168, 0x8bcfe5d5, 0x6fccbd86,
- 0x3788ec27, 0xf329aa1c, 0x58660612, 0x16117c7e,
- 0x14f2d445, 0x4920e0b0, 0xff40c550, 0x3b63926c,
- 0x0381f602, 0xfdea61fa, 0x2e38a30e, 0xfc5126c0,
- 0xab87149e, 0x5feec484, 0x637981b0, 0x8c0f6a85,
- 0x104a7e55, 0xa90838d3, 0xa939d5b4, 0xbe2af69d,
- 0x1a317bd4, 0x4a9b5f22, 0x63d814d9, 0xc85123be,
- 0x7e1481ef, 0xa603d165, 0xb7e841fe, 0x30ed4470,
- 0x863de857, 0xe32a5888, 0x1cd57a0c, 0x43c1cdfb,
- 0x04674312, 0xc35d2105, 0x371e3da1, 0x0d1e1e4a,
- 0x4b40954c, 0x390999f6, 0xe716caa2, 0x652a4e26,
- 0xd5c0cd7f, 0xec4ae3f0, 0xa3d608ec, 0x1dededb3,
- 0x182ed1cc, 0xe489b2ad, 0xb054197c, 0x42c190a8,
- 0xa8506f5b, 0x6418f784, 0x92d4c59f, 0x4b418817,
- 0x5d201fe1, 0x5a9a37d2, 0xb0091aff, 0x1fe39f66,
- 0x84780a91, 0xe6064a1b, 0x1cd45cbe, 0x6c755ad5,
- 0x4caf827f, 0x75dd9197, 0x3729cec0, 0x8aca424d,
- 0x776e9d2e, 0xef760768, 0xdf4198de, 0x9f05d70b,
- 0xef057918, 0xec188356, 0x4ece4eb0, 0x772f0f1d,
- 0x362ff7e3, 0x4a03ec39, 0xca53b1ac, 0x73c28a2e,
- 0x40e5b160, 0x16e86af3, 0xa0cbdb1c, 0xa6aed291,
- 0x0ab81158, 0x0c7f02b0, 0x275ae7bf, 0xe0d7c4a9,
- 0x5522d0ba, 0xdae982a3, 0x8a0b4523, 0x894f1444,
- 0x7756510f, 0x1c9b8981, 0x5f069df3, 0x7c8c7760,
- 0xa3ee5d29, 0xd06d000b, 0x7728c354, 0xc1c4591b,
- 0xfde7cbd0, 0x544700a4, 0xdffce270, 0x32d2487b,
- 0x2ca88ecb, 0xe7cce47b, 0xf83288bd, 0xdd339922,
- 0xbdd47228, 0x76db965e, 0x431c0f8f, 0xba5d25a3,
- 0xcd834ae9, 0x86921f22, 0xe4877ac2, 0x3e1b5b95,
- 0xd5234c8f, 0xc7e7385e, 0x928ddc50, 0x0e4a0fa2,
- 0x8050e130, 0x82f33e5c, 0x58138b8c, 0x09dc5478,
- 0x2c289b5f, 0x15b50b6e, 0xe644f3c2, 0x1ec32392,
- 0x6329f8d3, 0x4bec7bba, 0xf287393f, 0x6ddfdc28,
- 0x19279547, 0xd959cbe9, 0xde36bdfe, 0xd331cb85,
- 0xfb54623f, 0x27312ff7, 0xa130674d, 0xf685a278,
- 0x66568885, 0xf91e7b16, 0xd6d478f9, 0xeb3e71e3,
- 0x12539a50, 0x59daf29a, 0x1ea64234, 0xe969a7c4,
- 0xacaa2ce2, 0x8f0031dc, 0x1d08a790, 0xac89aea9,
- 0xc2a043c8, 0x6bcf4143, 0x946fface, 0x1adef1ab,
- 0xebf52457, 0xd475c20b, 0x3a39c57f, 0x30c9780c,
- 0xc0f043ef, 0x5b5a39be, 0xe645e543, 0x255f0ba3,
- 0xab3b85c4, 0x21759224, 0x756cd543, 0xb7742f3a,
- 0xaf97507c, 0xa2453bde, 0x96b1f799, 0xfec73877,
- 0x9c34bf8e, 0xdf9231db, 0xeedff688, 0xf67910c3,
- 0xde6024ae, 0x0a62d30e, 0x65d1c88c, 0x3011e133,
- 0x39f50d0b, 0xfd243709, 0x2da0e404, 0xdb4e401c,
- 0xf3aff2f8, 0x6047fc17, 0xf0e9ead3, 0xdf1ae302,
- 0xaabdc780, 0x5b63e544, 0x22bed644, 0x4dcf2470,
- 0x19d2a919, 0x903382c1, 0x2e402150, 0x4872f3f9,
- 0x0d4ca05e, 0x0a3d9ae2, 0xe61503aa, 0xaf5aa08c,
- 0xaad5d0d9, 0x38340bfc, 0x8a5d80d3, 0xac4102b2,
- 0x4370fc0d, 0x9bfe01a7, 0xf615110a, 0x4f503457,
- 0x498dd852, 0xf300128d, 0xeaf6bfd7, 0x768fb7bf,
- 0x83ef2619, 0x05514fe9, 0xd50aa19a, 0xf86947f2,
- 0xfc74994b, 0xfd5c9a73, 0x38e27cac, 0x6b262e0c,
- 0x34be3f6e, 0x87cb6bb3, 0x3dbdd583, 0xb8e9c34c,
- 0xb311507a, 0x79935daf, 0x263da6ae, 0x7ad52658,
- 0x319fada4, 0x5e71607e, 0x761fd4e5, 0x00f87dcf,
- 0x09270f2d, 0xd93aff66, 0xfb26e3a9, 0xdb25947c,
- 0xc5629920, 0x45e5085c, 0xd936f257, 0x317f73a2,
- 0x39a0e9ba, 0xa26e9f7c, 0xe1dd2b14, 0x60b43ee8,
- 0xc735576f, 0xf0f57ce3, 0x15a992cc, 0x85e2e70f,
- 0x41252493, 0xa00fc96e, 0xee0d164e, 0x9a2fd342,
- 0x17bb6ddc, 0x43bb570e, 0x4d76b6ac, 0xd4936e7f,
- 0x986a6732, 0xe4c03135, 0xc6b14bc4, 0x55ba9b73,
- 0x9034db90, 0xfe753761, 0xf7975632, 0x2a178d8b,
- 0x322b692a, 0xb31a855d, 0x362689d5, 0x20780137,
- 0x79bbbd00, 0xbceaae8a, 0x224a74e8, 0x0fb909fd,
- 0xb890dff6, 0xd4089bfa, 0x926d8b60, 0x6f5c0e24,
- 0x71977fb0, 0x46413ccf, 0x513ca99d, 0xe2d8c8ae,
- 0x7a4252d0, 0xeeed8154, 0xc680e6c1, 0x5a8c66ac,
- 0xa855ccd6, 0xffdef525, 0x5f968fe1, 0xfb8756aa,
- 0x1a5cb2c4, 0xeac328f6, 0x93a4e911, 0xb5a09138,
- 0xba9ac8a8, 0x4191c901, 0x53ec0c31, 0x85c96494,
- 0x4f972ed2, 0xf9f71b28, 0xdabcb423, 0xe82713ac,
- 0x4d72f3df, 0x831af5df, 0x1715e437, 0x8b6f6a68,
- 0x76252952, 0x8cc152b0, 0xbea262b4, 0x102f1560,
- 0x18a2c2f6, 0x5839d7cd, 0x7ac4e51c, 0xaa94091e,
- 0xa25211d9, 0xc1c30509, 0x669b09b0, 0xc44c6de2,
- 0xa9b78ae1, 0x8790646c, 0x78049e2e, 0x22edab05,
- 0xf68a2e25, 0xbeb03399, 0xa47f6039, 0x279e4d42,
- 0x66629c7e, 0x6ce2d290, 0xa688d117, 0x2acac477,
- 0xa3587cf4, 0x3f6a4bbe, 0xee014b78, 0xeb8a8f51,
- 0x41d49058, 0x28ec1df3, 0x2bbf4908, 0x8c46e525,
- 0xbb7e6a2b, 0x2ef264a7, 0x80f2ea8c, 0x1bdcc09e,
- 0x359a9f19, 0xff25ddb6, 0xd23c07aa, 0xd7a6999b,
- 0x6650425b, 0x6e0e62de, 0xf0efedd0, 0x67b5d110,
- 0xf2853e31, 0x22e72b2b, 0xcf42eedf, 0x19a1ade4,
- 0x5ec9217e, 0x979d620b, 0x4716de11, 0x4dc51dcd,
- 0x07c751ac, 0xa18ec017, 0xa9360d50, 0x5f5567b9,
- 0xaa29ee88, 0x359acec2, 0xffe70d66, 0xe0a4d339,
- 0xa30b0041, 0xffbdc17e, 0xea9a34b5, 0xdf5ef104,
- 0x8e2b9779, 0x6118b665, 0xa3e9bfc8, 0x4582c1de,
- 0xf41570a0, 0x067a2ae6, 0x381e704c, 0xc919a87d,
- 0x4fa95cbc, 0x151cbe8c, 0x07aacaa6, 0x46d48b01,
- 0xd87a8dbc, 0xdec805d4, 0x91526f9a, 0x0086f881,
- 0xe9b56bb4, 0x92c84ec8, 0x0c1defa4, 0x140f7fc0,
- 0x59af67a0, 0xe4b7064e, 0xc743ac3f, 0x03daf36f,
- 0x3beb03d1, 0xafa266e6, 0x0841dbf8, 0x2f5c8573,
- 0x1d8ebedc, 0xec7784e8, 0x574fe13a, 0x8dd6d989,
- 0xd084f5e3, 0x718fffa8, 0xc6ceb8a1, 0x056ff3e7,
- 0x8213e34b, 0x8d65a185, 0x5cebf134, 0xeabeb5b4,
- 0x22161265, 0xc05581f8, 0x9871f6fd, 0xba60da2d,
- 0xdba85220, 0x5e8660b0, 0xd88c8f67, 0xaabcb748,
- 0xddcb74b4, 0xfb404f6a, 0xbbdd2ed7, 0x4b7b3501,
- 0x7d71379c, 0x9e72eb89, 0x69e385c6, 0x7c6c1427,
- 0x3ddb8cb7, 0xafa28900, 0x16592d8f, 0x1e00232f,
- 0x3f01c408, 0x92bf2031, 0x284c780c, 0x3446ad71,
- 0xe85881b7, 0x3eeed4da, 0x343526b0, 0x4fa3a536,
- 0x7e555986, 0xf68db7a0, 0x3b6dc978, 0x83c0fcbb,
- 0xe6621f11, 0xb5655e40, 0x0ce1f9a2, 0xc09fd28c,
- 0x78ddfcd8, 0x9472bfed, 0x74547420, 0x725903ee,
- 0xdbd220d5, 0xe3881f96, 0x4146a6b7, 0xb04cbdfa,
- 0x4fe69746, 0xe17334f0, 0xac460fbc, 0x49b29cc9,
- 0x9d5ecaff, 0x1248a36e, 0x9f6dc260, 0xdaab7b50,
- 0x96dfc49a, 0xb5f1366b, 0x817e4272, 0xed869802,
- 0x6d908607, 0xa2c5b9fe, 0xc0efd578, 0xbbb42a02,
- 0xed1d3c7c, 0x3cf29a98, 0xa8249ed9, 0x7a29768e,
- 0x97ada287, 0xaecf9ead, 0x26d483a0, 0x17216d12,
- 0x2eca6e6b, 0x77e0c2a7, 0x329158b6, 0xa4c61d43,
- 0xc903e068, 0x6561939c, 0xec320289, 0x079ff8e3,
- 0x24d8cdd5, 0x9b4e370c, 0x90672bb1, 0xb6c7aaf9,
- 0x8dd0ac13, 0x36adc925, 0xd262e319, 0x6dbebf09,
- 0xef8f288e, 0xeea4ad16, 0xc93f3706, 0x48849c65,
- 0xf7f780dd, 0x55f3fa2f, 0x5896c272, 0x6e743071,
- 0xaf675bdb, 0xe16f4c3e, 0xec48aad7, 0x9fb145a6,
- 0x90086058, 0xdae0d020, 0xa50f73c3, 0x4e43b7e0,
- 0xfc103a19, 0x2f3fcbde, 0xeaeca2d8, 0x74910aa1,
- 0xd40fa076, 0xb718e2a3, 0xa9fb6add, 0xd0a5bc70,
- 0x05d17b2c, 0x594954de, 0x59bf3f5e, 0x41624d25,
- 0x60770de2, 0x9d32f8e3, 0x0e7588c1, 0x1f3677b0,
- 0x21c379f3, 0x3fcbb7ac, 0x79764479, 0x37c20880,
- 0x7d491746, 0xb03d6fc6, 0x691e3054, 0x57542bfa,
- 0x959cc18d, 0x22ee98a5, 0x6110a373, 0xd429b7fc,
- 0x9181496c, 0x17e5e56d, 0xf7b69960, 0x81c3f770,
- 0x11c2ec89, 0xb1a132b7, 0x54286945, 0x0a1b4eaa,
- 0x8cb1b5cd, 0x9ed6cd13, 0x0a6477ee, 0x724a5b35,
- 0x3550905c, 0x79d6d986, 0x37724798, 0x5ba2169c,
- 0xd122657b, 0x79fbd815, 0x26aee21e, 0xd6e7243f,
- 0x62c48828, 0x0562d740, 0xa1bbe8a3, 0x9ae5dbaa,
- 0xeb3ec654, 0xeeac837f, 0xa54bba8c, 0x7fac6536,
- 0xffa8c35b, 0x061f8bfa, 0x7d9533ec, 0x78f87477,
- 0xcabd108e, 0x5bcf62f1, 0x58d83fef, 0x05e6a00f,
- 0xd5e4cff0, 0x4c44180f, 0xf21050b4, 0x255cbabb,
- 0x8f4ae68d, 0xaa822b11, 0x1c3bb1b5, 0x347c77cb,
- 0x366ef0d6, 0x0f742f69, 0x3d5e3fc3, 0x7e4dec5e,
- 0xe6515e83, 0x101f8de5, 0xd8237dda, 0x0d700c40,
- 0x13ac76ba, 0x008f46d3, 0x9f1a0edf, 0x0eeace4e,
- 0x1596d8f4, 0x46d843c9, 0xd1aeb9be, 0x72e09971,
- 0xa93353ba, 0xb9c3c6aa, 0x73b4947d, 0xc62131e2,
- 0x2a92f319, 0xb09606d4, 0xcb133c6e, 0x0d5d85ec,
- 0xa757b193, 0x00785404, 0x16e66999, 0x4f76e608,
- 0xbfd6b3bd, 0x3e3d93e6, 0x6f63d7dd, 0x8c3dfb98,
- 0x6a102833, 0xa91ea02c, 0xd1070130, 0xb6bf3c3e,
- 0x21fb4b30, 0xdf6297fd, 0xed73d0ad, 0xf791741e,
- 0x8518ea52, 0xadb6b7ff, 0xe2bd4fe0, 0x5c844be4,
- 0x3a5567c8, 0x4f6ec218, 0xdc67a1c3, 0x59f2b806,
- 0x646ad07d, 0xe5abd80a, 0xbf0eb949, 0x03e4844e,
- 0x3ac74739, 0xa2bce00d, 0x08c21c92, 0xf0e6759c,
- 0x8fd20178, 0x79ff53e1, 0x2bd18ac1, 0x4fdf3ddf,
- 0xfc54f10a, 0x7665fff2, 0xd98cd3ff, 0xfe2ba8e2,
- 0x52dd9a64, 0xc3d1f3b0, 0x15f41c0f, 0x7669f39b,
- 0x9072e300, 0x9efa554f, 0x0fb67177, 0xdbcfc4ac,
- 0x861ec40d, 0x8f6fa82c, 0xe2de1597, 0x4964d065,
- 0x8f15846a, 0xc382e6e2, 0x58770e9f, 0xa09bb14b,
- 0x708eb67f, 0xa49f057f, 0x83b11fcb, 0xb0d34112,
- 0x7a9a5daf, 0xafd33ba5, 0xe5d89e53, 0xc1afc620,
- 0x229da718, 0xddf2759f, 0x45c0efb1, 0x9d5da4a6,
- 0xd5230d44, 0x7ebf292f, 0x3996a3f1, 0x7bb08a21,
- 0x8fe43e7f, 0xcefe1068, 0xae1c2659, 0x3e682d77,
- 0x31b27947, 0xde0620e2, 0xc2d11457, 0x39f82f72,
- 0xd4bdea10, 0xd4048eb7, 0xb8efda7a, 0x6c34ce7f,
- 0xedf09103, 0x58d1b66c, 0x02a70f28, 0x732b9b67,
- 0xbdd49541, 0x2e2cf321, 0xb1cdb375, 0x8dde29db,
- 0x601f6b01, 0x785529e8, 0x41ad52a9, 0xed71153f,
- 0x07c79c1f, 0x9e461531, 0x501068ef, 0x2dc5363d,
- 0x33cef6d4, 0x064ad3a2, 0xfaaa9bfb, 0xf76c5b83,
- 0x9289e370, 0x0154d7cd, 0x83d0e636, 0x4b3842ba,
- 0x2cae0edd, 0x5ce95b31, 0x3db27a61, 0x0f51b0ca,
- 0x95bda166, 0x8df62ddf, 0x2cc5641e, 0x3b300f09,
- 0x26e76f94, 0xfd78be19, 0xc6792770, 0x22d84fe2,
- 0xd8eb196c, 0xe31d6b01, 0xdb03bb74, 0xf6e121ac,
- 0xc1cdde3a, 0xe4c11ad4, 0xb4bc4bf2, 0xceb0e8b8,
- 0x4ea9774b, 0x16a5e47b, 0xaa971fec, 0x1194532e,
- 0x9128d77d, 0x03bc2c57, 0x87c7e234, 0x7d6b1d7e,
- 0x78cee50f, 0x776a5ead, 0x07a11696, 0xfa84a709,
- 0xfea6994f, 0xed358a6f, 0xdeb08ffc, 0x5d2f6dc5,
- 0x2755ef28, 0x846a53fd, 0x63db6af1, 0x76ecd9c2,
- 0x17258c17, 0x34295fc7, 0x397dbd9b, 0x9e4cee04,
- 0x4be32c1b, 0x132d214e, 0x5bbcce39, 0x9a2625a4,
- 0x0ab4a812, 0x16bf4dfc, 0x59119f94, 0x539c8bec,
- 0xb3fc6822, 0x1925d683, 0x52918b41, 0xa70912fb,
- 0x707d6f19, 0x2eb3abc2, 0xc1346a8b, 0x77b15003,
- 0xf9b94f05, 0x93de2cec, 0x8b5dd8a8, 0x6da2d243,
- 0xe983be77, 0x3900428d, 0x89ca7386, 0xfeeb986e,
- 0x809e485e, 0xe6e278f9, 0x0878a9a2, 0xa885bce2,
- 0x760c8195, 0xd32bbe96, 0x8fae0dd5, 0xdc34b30d,
- 0x16ae4373, 0x145399ab, 0xb15e8d82, 0x985afd4a,
- 0x940e003d, 0xaeebaf5b, 0xd480e43a, 0x8739a867,
- 0xbabf7203, 0x4a9a3cf1, 0x921ba29c, 0x3297b9ea,
- 0x95fa0d58, 0x4d3b4b0b, 0xb2d5664c, 0x46e2119c,
- 0xcca14ac4, 0x976a18e3, 0x2897eaa4, 0x027121e9,
- 0xed13e632, 0x6b6f0121, 0x56c171f6, 0x706a9172,
- 0x6544f1b1, 0xb6ff2537, 0x3574b6b9, 0xf8652021,
- 0xf4232bb5, 0x70af56bd, 0x49c4647a, 0xf844d462,
- 0x029cd35d, 0x556c1755, 0xa8175a9c, 0x52eb80f2,
- 0xc11acf51, 0x318533a5, 0x512efd2f, 0x52ed6298,
- 0xec6ced43, 0x711e465f, 0xfbff9bd2, 0x218a90db,
- 0x87fdd5e9, 0x72b4193b, 0x9936e8c1, 0x5d4aec55,
- 0xec0330ec, 0x93587390, 0xca7d3e24, 0x23cb68e2,
- 0x118dd06f, 0x2886289c, 0x91512d10, 0xa6b6a2c1,
- 0x664301c5, 0x88b752b7, 0x64898d8a, 0xeb640624,
- 0x23d0d326, 0x72a1f775, 0x92d6f0eb, 0x4dd8738f,
- 0xd078d93a, 0x06753e1c, 0x9cf0c82c, 0xf00cc737,
- 0xfc0ecc80, 0x33143b0c, 0x4dbc5b7d, 0x48b0f487,
- 0x949f695c, 0xeb6e3068, 0x1aee517a, 0x8eabd9d1,
- 0xb93e0ffc, 0xc4b49583, 0xd910f46d, 0x2844c6c2,
- 0x24dc24d7, 0xa46eba6d, 0x554136eb, 0x7f7829ad,
- 0x01a0ac92, 0xf119a06b, 0x8062e710, 0xf10ccaf2,
- 0x6dd59f14, 0x5ac0ba38, 0xd3a4dde1, 0xc64cae46,
- 0xb72a8bb3, 0x52ef37f5, 0x343766ed, 0x5fb6a469,
- 0xa5c94b87, 0x8e6b898f, 0x0e2b0d8e, 0xbe8acd6f,
- 0x82233d64, 0x5e86a977, 0xa776c960, 0xcacf60d5,
- 0xa57f2025, 0x52ea9bd0, 0xb295e953, 0xb1270add,
- 0xf15658c5, 0x5a6d399a, 0x34c8fb55, 0x40fc94f0,
- 0x3b83bd2a, 0xf894c342, 0x15f0179f, 0xf1ebf249,
- 0xe985b001, 0xd36553bc, 0x45b449b5, 0x66e02d8e,
- 0x0fedbd4d, 0xce5a6f83, 0x44991f4d, 0x3e77771a,
- 0x557e741e, 0xcb9c8fb7, 0x6f96d05f, 0x6bc3ad7c,
- 0xfe74f377, 0xabb544f9, 0xc8e5c138, 0x042cef42,
- 0x36e6e463, 0x6d16afab, 0x2f2b9bd3, 0x32079836,
- 0x51769d1e, 0x8cc04292, 0x525565be, 0x01d56797,
- 0x720ad744, 0x2b5df827, 0x7c6e7011, 0xde5bf3d3,
- 0xef9d6a47, 0xbf01585c, 0xe1603753, 0x01e68b5b,
- 0x58d8acf0, 0x361a243c, 0x3776bb5e, 0x85a6ecf0,
- 0x63c02a88, 0xaed9b0ca, 0xe40c2f4f, 0x514ea59e,
- 0xd7bb50a6, 0x7001b952, 0x6ca0a02f, 0x67e8539b,
- 0xe1f361c8, 0xe3716e13, 0xd586fef9, 0xfaf596b0,
- 0x4640fa6d, 0x80705225, 0xacb7d58c, 0x7fae4071,
- 0x26ee2f89, 0x48b8d5dd, 0xf4574eff, 0x98a58c8b,
- 0x618e6e9a, 0x347e98ab, 0x5cd6cfae, 0x4f5b528e,
- 0x771d54b4, 0x21516d45, 0xf38af4d4, 0xec0b3b4b,
- 0x14e6034f, 0x7fbd2f59, 0xe6239e0b, 0x5ebc33b9,
- 0x570813e7, 0x60d71433, 0x2e1904a6, 0xd812f1e2,
- 0xcc3fdb32, 0xaf49475a, 0x1ae1a880, 0xe51fc578,
- 0xb55554c1, 0xf949cc2c, 0xeabe1429, 0x2960311f,
- 0x53230b20, 0xa5a3894e, 0x20446134, 0x74c8b394,
- 0xb8431124, 0x076686a6, 0x2a0150a0, 0xfb6c2ce8,
- 0xc8e5fbbe, 0xd0d0fa89, 0xe8665995, 0x9ce4ca40,
- 0x4eadf970, 0xe072ed22, 0x452c3086, 0x2764ed1b,
- 0xd448e31d, 0x4c8c021a, 0x99c64394, 0x2ba2d7c7,
- 0x8934267c, 0x8cb9794e, 0x3199ceee, 0x04d33b9f,
- 0x088b031e, 0x24943620, 0xe2f9107f, 0xb4abbd6e,
- 0xb38eaaa1, 0xa57c73ed, 0xce94691d, 0x04d698c2,
- 0x4e7fb748, 0xf2c08794, 0x686c6194, 0x43444a75,
- 0x1d58410c, 0x7dabdc47, 0xdd74abbf, 0x3ec0abc1,
- 0xb7b670d2, 0x7b0de6c2, 0x8a9f70f9, 0x6ccc208a,
- 0x6ce3de6f, 0x551fb837, 0x8d025ec4, 0xc7442d5a,
- 0x40f816f7, 0x2094a730, 0xfe1f6937, 0x80d0db62,
- 0x183becf2, 0xd35d3f49, 0xcc998142, 0xb6739af0,
- 0x97b0368c, 0x441b052c, 0x70ca379a, 0x577e6cdd,
- 0x7437d170, 0xb787ea6b, 0x6d3b604f, 0x3b09f548,
- 0x97f7c5b4, 0xfcf26e94, 0xb6f45efb, 0x79a8935b,
- 0xbecadb7d, 0xeb675066, 0xe6c22273, 0xd2cf07b8,
- 0xc0861fb9, 0x5cfd6a54, 0x365d62b9, 0xa609756d,
- 0x7b72e7f7, 0x102f49fb, 0x90027250, 0xda9eb6b2,
- 0x65fba88c, 0x62fa6f4e, 0x6e879917, 0x7d927e47,
- 0x8002767c, 0x79151e4f, 0xe66a40fe, 0x1f2439d6,
- 0x17a01a2b, 0x897cebd5, 0x2ad301cf, 0x43d218d7,
- 0xc715e53a, 0xcee15463, 0x90bb7eb7, 0x167ee2c2,
- 0x550941e6, 0x1c8a8a47, 0xd740f5b5, 0xdf8251ff,
- 0x6df5fc79, 0xc2430fd2, 0x7201d76c, 0xc5002d57,
- 0xbaeec9a5, 0x4843f217, 0x728f1a02, 0xceb636b1,
- 0x63743721, 0x6ddd4de1, 0x4a67f6f0, 0x8a2a1ab6,
- 0x8c44023b, 0x15f9cc7b, 0xaa420aea, 0xabd03e1e,
- 0xbbfb1f2b, 0x1bb238bb, 0x2c5f33d6, 0x926fe3d2,
- 0x737922c0, 0xcb0eccd7, 0x8e3b46c5, 0xc348f724,
- 0x54b0eb04, 0x385da1f9, 0xea039a00, 0xdaf6e3d6,
- 0xd258a9b2, 0xf43a1c73, 0xeee7349a, 0xe6b7901d,
- 0x01be8c8b, 0x882b3a06, 0x38c02aa1, 0xc49b2165,
- 0xcb388a1d, 0x74210862, 0xc434cbfc, 0x8e500a12,
- 0x508803ac, 0x8043dabd, 0x2cecf15b, 0x048e5649,
- 0xfe645dab, 0xeaceb60b, 0x8311ca61, 0xab9f4511,
- 0x7a0ffa90, 0x3411961b, 0x7b2c4f72, 0x73130c5c,
- 0x643632f0, 0xdca6055e, 0x4b8cd13b, 0x7a52e0cc,
- 0xb1d00e0e, 0x54ae56a7, 0xe0ec71b2, 0x1b6e774a,
- 0x2ab8e5e8, 0x9672b8a7, 0x025ac7b4, 0x6b08cdcc,
- 0x32ccedf5, 0xb1141149, 0x12fa8126, 0x373afaab,
- 0x83e42c76, 0x0159c8a2, 0xb13cf6bf, 0xd8da66d3,
- 0x24b60bdd, 0x8b5b060b, 0x402b300d, 0xfff0c83c,
- 0xf6a8ea62, 0xac272df6, 0x53086cb5, 0x4ea409a2,
- 0x6cb249e2, 0x4ea1be62, 0xb879b594, 0x315f2c8b,
- 0x55762201, 0x7a7d3b17, 0x383e6c9a, 0xf0e5b411,
- 0xa6ddddfd, 0x1f0d69d7, 0x40207544, 0xcec14837,
- 0x82a869dd, 0xadb4a24f, 0xb42dfde2, 0xee6daca2,
- 0xfd993731, 0x2b3a9667, 0xa5efb2dc, 0x60ab758b,
- 0x904823e5, 0x8b397ec6, 0x583bdc39, 0x2f684911,
- 0xcad9fa2a, 0x19ff56df, 0x0a2fe1a5, 0x5c509a75,
- 0xc596710d, 0xacb8dfac, 0x2394f499, 0xe1ce4e85,
- 0x849e2e31, 0xca844ddc, 0x77e773a5, 0xa7282ff6,
- 0xb7419e7a, 0x9f162e55, 0xae797c86, 0x48eaba22,
- 0x7658346f, 0x9f68d435, 0x8ff92ee8, 0xafb8bac3,
- 0x27d12c8d, 0x24d39bc5, 0xddf983a7, 0x15df80e6,
- 0xf1874da4, 0x6f1cfffd, 0xfc90c1e5, 0x086a24af,
- 0xe2b7a6d1, 0x29c2dd81, 0x03fe3085, 0x2b6ca57c,
- 0x294dd96c, 0x9c919f8a, 0x1e8b3e28, 0x641bb984,
- 0x9b164c7d, 0x3bf59568, 0xc2732dfe, 0x3ae42a9b,
- 0x51ffd5ef, 0xb46f3080, 0x5a8fc9ec, 0xc850715b,
- 0x6c9b29ea, 0x327043ad, 0x85fb278a, 0x0a03d808,
- 0x4bfc9cc7, 0xd5da3807, 0x40438ce5, 0xbf4ba07b,
- 0x348ef9c3, 0x68981b8c, 0x04fd77b8, 0x808eaed4,
- 0x4024f961, 0x43c60bf6, 0x33ce96c7, 0x2641e352,
- 0xdde4129b, 0x2f263f1d, 0x046ab1df, 0x913a20a5,
- 0x9e147635, 0xe2bfff03, 0x728ab89d, 0x63fa4abb,
- 0x3acafd43, 0xf09a0b18, 0x34f8efeb, 0x47150130,
- 0xf1ac1beb, 0xa01721b9, 0xe38d5aad, 0xfd56a4d9,
- 0x892ab9ab, 0xea173f66, 0xc9b77a86, 0x47307a51,
- 0xd84571cc, 0xb96c7c28, 0x5468cf27, 0x3d1bc060,
- 0x2cf06fb0, 0x7e2a059a, 0xe76aa885, 0xc7d202d3,
- 0xf987735f, 0x7bf69df9, 0xa4193b44, 0xc4072f63,
- 0x63991b95, 0x945d2547, 0x20fc01a1, 0x0b402cea,
- 0x1cfecda1, 0x196c9850, 0xc94a7a8f, 0x45cbde21,
- 0x21c0ca0d, 0x8e9bb55b, 0xb6ed98ae, 0x0249a938,
- 0x30e011e1, 0x27c8d7c2, 0x9e80e963, 0xe6d92f0b,
- 0x04e474f9, 0xe1d709f1, 0x1a53d51d, 0x0353c881,
- 0xfa068cfd, 0xe02b14a9, 0x89246dd0, 0xb116fa1c,
- 0x0c75dbc0, 0x5960758c, 0xa7617739, 0x601e7af3,
- 0x0b145e7b, 0xecab38b4, 0x9cd6d9dc, 0x24922fe7,
- 0x5392ed2f, 0xd520c878, 0xbf49bfee, 0xcde77d02,
- 0xe0d5c3d4, 0x58af2dce, 0x0fa35621, 0xfead6943,
- 0x4d134689, 0xedd86ec4, 0x1c585bad, 0x5dcc5011,
- 0xe693cdad, 0x08bc39ef, 0x4d5c2eb8, 0x562fc8ea,
- 0x5722d5a0, 0x4b6d1a81, 0xd918439a, 0xffb036b8,
- 0x0875f77a, 0x2aa45832, 0xe57f674e, 0x82865775,
- 0x0777538a, 0xf6e2a2c6, 0x05800e76, 0x8aec959e,
- 0xd48b20cd, 0xf654b1c5, 0xf69d4a1f, 0xa67f1175,
- 0xe7659527, 0x6556a72f, 0xc668df31, 0x24ee119a,
- 0x29ab3c17, 0x18add733, 0xca05fc8d, 0xc06bb38a,
- 0x889ac6ff, 0xed44ec98, 0x9e6e95d2, 0x2b0d6d52,
- 0xea3452bb, 0x34243ed0, 0xc8a08a5d, 0xc1bbab18,
- 0x5e581153, 0xbac12814, 0xd2357305, 0xcb70d646,
- 0xf487b1d6, 0xfcd1e9dd, 0x21777851, 0x5b92f071,
- 0x67c845e9, 0x6321ea09, 0x827f7274, 0x22c01684,
- 0x798684cb, 0xba8ef875, 0xf1278dfb, 0x1c5cb755,
- 0x18fd2615, 0xad58062b, 0xc4300928, 0xa0d3104a,
- 0x712a1440, 0x8894b46c, 0xfb4b84d4, 0x55cbf0c7,
- 0xfedf3627, 0x2ea77c79, 0xa1b78735, 0xd6e5a364,
- 0x35965a2d, 0x8bc0e5db, 0x9cd0194a, 0x11ddd727,
- 0xe08db7fc, 0x4df6fc69, 0xd17f011a, 0xfae3c4b8,
- 0x2c3c5c73, 0xa467c3cb, 0x89f6501d, 0xaf32cb3a,
- 0x380dc067, 0x41596623, 0x22a7d4a8, 0xbe8b0434,
- 0x0f7800df, 0xab523ed0, 0x9d7dc989, 0x5ec4bcf6,
- 0x4f022e80, 0x99b97f3b, 0x4faaf990, 0x03a13ca5,
- 0x820ab836, 0x6adb2a3e, 0x5ce24831, 0x8ed91c35,
- 0xe620f720, 0x55d25cf9, 0xc54fbcbf, 0xa5fc7938,
- 0xc87a81f1, 0xd74e02b9, 0xf64cf87c, 0x623fa08a,
- 0x0cce5093, 0xa36151ee, 0xb866b3eb, 0x84910e75,
- 0xf661e712, 0x3a05d594, 0xdcddb707, 0x21ebcff5,
- 0x885e5df6, 0x78bba2ae, 0x8e476778, 0x1a96a94a,
- 0xfb21c330, 0x0ba8c353, 0xbd43c2f2, 0x2e90c656,
- 0x3cf1ea31, 0xc0376d4c, 0x7da645b9, 0x17a721dd,
- 0xf36d91bf, 0xef039f41, 0x170fb94f, 0x412eb43a,
- 0xca9bb538, 0x79dbf629, 0x53d8e9d6, 0x6c2873a3,
- 0xb20aa7b0, 0x411ea772, 0xd3940300, 0xe3eeb2b1,
- 0xb1447842, 0xfa968e41, 0xf86f6d53, 0xea74a6e4,
- 0x50017ed1, 0x137b64ef, 0x57aa89e6, 0x58bcfdbf,
- 0x313df290, 0xeee35be7, 0xff6371aa, 0x7824087e,
- 0x6a6af46a, 0x5eb17e3e, 0x66aa29f1, 0x390d2224,
- 0x9a3103f4, 0xe917080f, 0x8f14c563, 0x7fa6073a,
- 0x3dc5a464, 0x83429234, 0x33e53a2e, 0x53ac6111,
- 0x66c554d2, 0xbc1aa8c6, 0xa6c8643b, 0x3dea0eca,
- 0x30449e5d, 0x2a9877e5, 0x559ca66d, 0x6514aa69,
- 0x6c69e2a4, 0xdbfe8dfb, 0xfdf29c50, 0x6f437112,
- 0x51d9f7d1, 0x030c0ae4, 0xb1805d8e, 0xa58131b6,
- 0xf8f278b0, 0x8c213886, 0x64704d93, 0x494d9951,
- 0x2c6021ab, 0xff3efcae, 0x36834cdf, 0xccd660bf,
- 0xc058237d, 0xbd527c49, 0x16574e3d, 0x235ea78c,
- 0x670a728f, 0xc3ea2598, 0x87d9124b, 0x4b147e87,
- 0x31b49aff, 0x16bd0265, 0x2ee20101, 0x8782f2e1,
- 0xfba8663d, 0xa89589ee, 0x83b536c7, 0x27fcab8b,
- 0xcca38f50, 0x1b0bad50, 0x308efb8b, 0xd8c736ed,
- 0x7730e97b, 0x91ea5131, 0xfbcc9fbe, 0x29365daa,
- 0xe02916f6, 0xf0c27e05, 0xceda5df1, 0x34ee39a3,
- 0x1375df92, 0x710a961e, 0x450ed796, 0xcdae04b7,
- 0x89b701c0, 0x1280670a, 0xb0477c8d, 0x8e18717e,
- 0x4b1f7f00, 0xfbaa0da9, 0x5adbcf4e, 0x11244a8b,
- 0x65846f9c, 0xe5c460bd, 0x75992da6, 0xa302551a,
- 0x073443d7, 0x1c8b99d1, 0x6fec0447, 0xc1a17c28,
- 0x931f3aea, 0x6fa840bd, 0x6f6d19bd, 0xac13195a,
- 0x2e4cc277, 0xb0a7f22b, 0x3b66eb78, 0x118dc92f,
- 0x99bf634e, 0xfdc075d3, 0x3812edf6, 0xa9bc9863,
- 0xa73adaab, 0x26eebd69, 0xfcacdf51, 0x219f808f,
- 0x3a860155, 0xeffed15c, 0xa68b41a9, 0x51341a4d,
- 0x94262c2a, 0xcfa064ee, 0x4add813b, 0x1f9a2384,
- 0x95b0c413, 0x10b1c740, 0xcfcb4015, 0xd47df89f,
- 0xcb1ced78, 0xe82e2b5d, 0x0509bfbe, 0xd6e567cd,
- 0x47c63990, 0x2797cd61, 0x0b23673b, 0x02c9558e,
- 0xd10f8637, 0xb0b74f37, 0xf815f24d, 0xcff48230,
- 0x63b2632a, 0xb505c39e, 0x2ee5ecd6, 0x7e275fff,
- 0xdc528dcc, 0x181e426e, 0x0f61bbb2, 0x5b805240,
- 0x6ed556d2, 0x021b8d45, 0x7a399a7e, 0x038ddd4f,
- 0xa3830f78, 0xcba6400d, 0x250da41f, 0x269e4863,
- 0xc40dee2e, 0xf31b451d, 0xe12831ec, 0x0233f1db,
- 0xfde934c5, 0xb72dc8d5, 0xc7059be7, 0x34a11f1d,
- 0x02abc4a0, 0x48bfb4eb, 0xafdaaa5f, 0xff416152,
- 0x9a47b765, 0x42f8cfe9, 0x85b7d7d8, 0x5bd1c0a5,
- 0x6e630534, 0x3dbbf977, 0xba09d82d, 0x82d0bfc3,
- 0x5127bb6c, 0xdc15a078, 0xa17fb836, 0xa1fcf1b7,
- 0x652dc96b, 0xad3f7c1c, 0x8ba84f6e, 0x8b454c78,
- 0xd78ff2f1, 0x9449c56a, 0x2bc9ab5f, 0x15d39aae,
- 0x501a09f2, 0x2f94aadb, 0x4fbb92d4, 0xc3f86f8f,
- 0xd7372c17, 0xe69d7c19, 0xf0e03d13, 0x0221c7dd,
- 0xb41a6236, 0xd9d517ef, 0x6267dfa1, 0xfc341357,
- 0xb128aa71, 0xed797b03, 0xbf7ec359, 0x97d4ba34,
- 0x47c127de, 0x8dafe9e7, 0xc33227c4, 0x9b8b5274,
- 0x6fd5ecd1, 0x9751158b, 0xe3045a12, 0x6bd7a121,
- 0x32f09731, 0x063ac542, 0xdc800b17, 0x107d33c7,
- 0xada5c07b, 0xa6ec05b4, 0xe5681e29, 0x65c5d6bd,
- 0xdd811551, 0x0eed9893, 0x5532e0c7, 0x766e6d14,
- 0x74f5c2b7, 0x8c3a64e4, 0xede1d969, 0xfc70b733,
- 0xf1dbc965, 0x919af426, 0xe19121d8, 0xeffc6577,
- 0x5e87b1cb, 0x62c19cb3, 0x51358ff6, 0xdd366c74,
- 0x78830da7, 0x6885d628, 0x4855c5d4, 0x729df091,
- 0x736e2e59, 0xa29a58ac, 0x28d0a070, 0x5b2d472b,
- 0x319b794d, 0x218f1457, 0x10f56298, 0x00977b80,
- 0x9766ce20, 0x5109c226, 0x057b67ac, 0x432a7df7,
- 0x915a8464, 0x1f75cc31, 0x9019204c, 0x8e4ba49d,
- 0x80a5a121, 0xbda48f11, 0x12d69925, 0xf18f6be3,
- 0x0472067e, 0xc61d82aa, 0x474ed278, 0x0fd576f4,
- 0x821d8a25, 0x190aacd0, 0x407fbcfd, 0xc6f8a72c,
- 0x616e1154, 0x9f03dc6a, 0xcce5c742, 0x6bfbc28e,
- 0xad360bb0, 0x72389018, 0x45ee84b0, 0x58b68943,
- 0xac08e844, 0xa2ab1783, 0xb10d1dcb, 0x51784a73,
- 0x0ff46a4c, 0xe76d72c8, 0x9605e763, 0xfa200113,
- 0x8f6615af, 0x1434afb7, 0x151ab4b7, 0x2b96c172,

soc/intel/broadwell/microcode.bin

diff --git a/soc/intel/broadwell/microcode.bin b/soc/intel/broadwell/microcode.bin
new file mode 100755
index 0000000..7fc2096
--- /dev/null
+++ b/soc/intel/broadwell/microcode.bin
Binary files differ

soc/intel/broadwell/microcode_blob.h

diff --git a/soc/intel/broadwell/microcode_blob.h b/soc/intel/broadwell/microcode_blob.h
deleted file mode 100644
index 757fa58..0000000
--- a/soc/intel/broadwell/microcode_blob.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include "microcode-M7240651_0000001C.h" /* Haswell ULT C0 or D0 */
-#include "microcode-MF2306D2_FFFF0009.h" /* Broadwell C0 */
-#include "microcode-MC0306D3_FFFF0010.h" /* Broadwell D0 */
-#include "microcode-MC0306D4_0000001F.h" /* Broadwell E0/F0 */
-
-	/*  Dummy terminator  */
-	0x0, 0x0, 0x0, 0x0,
-	0x0, 0x0, 0x0, 0x0,
-	0x0, 0x0, 0x0, 0x0,
-	0x0, 0x0, 0x0, 0x0,

southbridge/amd/avalon/PSP/PspEarlyUnlock.sbin

diff --git a/southbridge/amd/avalon/PSP/PspEarlyUnlock.sbin b/southbridge/amd/avalon/PSP/PspEarlyUnlock.sbin
new file mode 100644
index 0000000..0ebfa13
--- /dev/null
+++ b/southbridge/amd/avalon/PSP/PspEarlyUnlock.sbin
Binary files differ

southbridge/amd/avalon/PSP/PspReleaseNote.txt

diff --git a/southbridge/amd/avalon/PSP/PspReleaseNote.txt b/southbridge/amd/avalon/PSP/PspReleaseNote.txt
index cbf88b8..42040ff 100644
--- a/southbridge/amd/avalon/PSP/PspReleaseNote.txt
+++ b/southbridge/amd/avalon/PSP/PspReleaseNote.txt
@@ -2,18 +2,18 @@
 // PSP FW Delivery Release Note
 //
 // Copyright 2014, Advanced Micro Devices, Inc.
-// Image Version number: PSP BootLoader: 0D.01.01.22, PSP SecureOS: 0D.01.01.22
-// Date:   08/14/2014
+// Image Version number: PSP BootLoader: D.1.1.4D, PSP SecureOS: D.1.1.4D
+// Date:   07/06/2015
 //----------------------------------------------------------------------------
 
 Files:
 	PspBootLoader.Bypass.sbin - PSP bootloader with HVB bypass enabled
-	PspRecovery.sbin       - PSP Recovery boot loader
-	PspSecureOs.sbin       - PSP secure OS, signed with production key version
-	PspNvram.bin           - NV storage pattern used to populate the SPI-ROM.
-	PspTrustlets.bin       - PSP Trustlet binaries
+	PspRecovery.sbin       	  - PSP Recovery boot loader
+	PspSecureOs.sbin          - PSP secure OS, signed with production key version
+	PspNvram.bin              - NV storage pattern used to populate the SPI-ROM.
+	PspTrustlets.bin          - PSP Trustlet binaries
+
 
 Features and fixes:
-
-- Enabled TPM2.0 for ML A1.
-- Fixed some bugs in NVStorage and low-level driver.
\ No newline at end of file
+- Rollback //depot/psp/stg/fw/1.0/fw/mars/src/bios_mailbox.c to revision 4 to avoid timing issue;
+- Code base updated to CL#30102;

southbridge/amd/avalon/PSP/SmuFirmware.sbin

diff --git a/southbridge/amd/avalon/PSP/SmuFirmware.sbin b/southbridge/amd/avalon/PSP/SmuFirmware.sbin
index a106061..1385414 100644
--- a/southbridge/amd/avalon/PSP/SmuFirmware.sbin
+++ b/southbridge/amd/avalon/PSP/SmuFirmware.sbin
Binary files differ

southbridge/amd/avalon/PSP/trustlets.bin

diff --git a/southbridge/amd/avalon/PSP/trustlets.bin b/southbridge/amd/avalon/PSP/trustlets.bin
index 655a047..9eefd08 100644
--- a/southbridge/amd/avalon/PSP/trustlets.bin
+++ b/southbridge/amd/avalon/PSP/trustlets.bin
Binary files differ

southbridge/amd/kern/PSP/PspAgesaS3Resume_prod_CZ.csbin

diff --git a/southbridge/amd/kern/PSP/PspAgesaS3Resume_prod_CZ.csbin b/southbridge/amd/kern/PSP/PspAgesaS3Resume_prod_CZ.csbin
index dbc83e2..ca9d2e7 100644
--- a/southbridge/amd/kern/PSP/PspAgesaS3Resume_prod_CZ.csbin
+++ b/southbridge/amd/kern/PSP/PspAgesaS3Resume_prod_CZ.csbin
Binary files differ

southbridge/amd/kern/PSP/PspBootLoader_prod_CZ.sbin

diff --git a/southbridge/amd/kern/PSP/PspBootLoader_prod_CZ.sbin b/southbridge/amd/kern/PSP/PspBootLoader_prod_CZ.sbin
index 892808f..b7b9b73 100644
--- a/southbridge/amd/kern/PSP/PspBootLoader_prod_CZ.sbin
+++ b/southbridge/amd/kern/PSP/PspBootLoader_prod_CZ.sbin
Binary files differ

southbridge/amd/kern/PSP/PspRecoveryBootLoader_prod_CZ.sbin

diff --git a/southbridge/amd/kern/PSP/PspRecoveryBootLoader_prod_CZ.sbin b/southbridge/amd/kern/PSP/PspRecoveryBootLoader_prod_CZ.sbin
index 79f95ce..f8d00a4 100644
--- a/southbridge/amd/kern/PSP/PspRecoveryBootLoader_prod_CZ.sbin
+++ b/southbridge/amd/kern/PSP/PspRecoveryBootLoader_prod_CZ.sbin
Binary files differ

southbridge/amd/kern/PSP/PspSecureOs_prod_CZ.csbin

diff --git a/southbridge/amd/kern/PSP/PspSecureOs_prod_CZ.csbin b/southbridge/amd/kern/PSP/PspSecureOs_prod_CZ.csbin
index 7cebeac..c04925f 100644
--- a/southbridge/amd/kern/PSP/PspSecureOs_prod_CZ.csbin
+++ b/southbridge/amd/kern/PSP/PspSecureOs_prod_CZ.csbin
Binary files differ

southbridge/amd/kern/PSP/PspTrustlets_prod_CZ.cbin

diff --git a/southbridge/amd/kern/PSP/PspTrustlets_prod_CZ.cbin b/southbridge/amd/kern/PSP/PspTrustlets_prod_CZ.cbin
index 7138676..961ebe5 100644
--- a/southbridge/amd/kern/PSP/PspTrustlets_prod_CZ.cbin
+++ b/southbridge/amd/kern/PSP/PspTrustlets_prod_CZ.cbin
Binary files differ

southbridge/amd/kern/PSP/ReleaseNote.txt

diff --git a/southbridge/amd/kern/PSP/ReleaseNote.txt b/southbridge/amd/kern/PSP/ReleaseNote.txt
index 51bb25d..f522b88 100644
--- a/southbridge/amd/kern/PSP/ReleaseNote.txt
+++ b/southbridge/amd/kern/PSP/ReleaseNote.txt
@@ -1,29 +1,22 @@
-//----------------------------------------------------------------------------

-// PSP FW Delivery Release Note

-//

-// Copyright 2015, Advanced Micro Devices, Inc.

-// Image Version number: PSP BootLoader: 0.2.0.2B, PSP SecureOS: 0.2.0.2B

-// Date:   Apr 28, 2015

-//----------------------------------------------------------------------------

-

-Content:

-	PSP FW Deliverables for Carrizo Bring Up.

-	This Build is compiled using the ARM license from the AMD license server.

-

-Files:

-	PspBootLoader_prod_CZ.sbin    - PSP offchip BootLoader, signed with production key version

-	PspRecoveryBootLoader_prod_CZ.sbin    - PSP offchip Recovery BootLoader, signed with production key version

-	PspAgesaS3Resume_prod_CZ.csbin - PSP Agesa S3 resume, signed with production key version and compressed

-	PspSecureOs_prod_CZ.csbin      - PSP secure OS, signed with production key version and compressed

-	PspTrustlets_prod_CZ.cbin      - PSP secure OS system trustlets, not signed but compressed

-

-Features and fixes:

-1. BUG462694: [CZ DDR4] S3 Resume failed with PC A05A/BB07 in Agesa code. WARNING! Does not compatible with weekly BIOSs prior 05/06

-2. ENH464884: fTPM HLK Stress test fixing instability issue on Win8.1 and Win10.

-3. ENH464884: fTPM Fix 192 Gy curve value. Updated fTPM Trustlet.

-4. OBS460342: Update White List for Token Secure Unlock.

-5. Code base updated up to CL#29115.

-

-WARNING!

-New Agesa S3 Resume binary image (PspAgesaS3Resume_prod_CZ.csbin) does not compatible with old BIOSs

-prior May 6, 2015.

+//----------------------------------------------------------------------------
+// PSP FW Delivery Release Note
+//
+// Copyright 2015, Advanced Micro Devices, Inc.
+// Image Version number: PSP BootLoader: 0.2.0.35, PSP SecureOS: 0.2.0.35
+// Date:   July 15, 2015
+//----------------------------------------------------------------------------
+
+Content:
+	PSP FW Deliverables for Carrizo Bring Up.
+	This Build is compiled using the ARM license from the AMD license server.
+
+Files:
+	PspBootLoader_prod_CZ.sbin    - PSP offchip BootLoader, signed with production key version
+	PspRecoveryBootLoader_prod_CZ.sbin    - PSP offchip Recovery BootLoader, signed with production key version
+	PspAgesaS3Resume_prod_CZ.csbin - PSP Agesa S3 resume, signed with production key version and compressed
+	PspSecureOs_prod_CZ.csbin      - PSP secure OS, signed with production key version and compressed
+	PspTrustlets_prod_CZ.cbin      - PSP secure OS system trustlets, not signed but compressed
+
+Features and fixes:
+1. ENH466357: Reduce PSP/SMN clock back to 300 MHz as a temporarily workaround for eCZ B10/A10 fused parts.
+2. Code base updated up to CL#30190.

southbridge/amd/kern/PSP/SmuReleaseNotes.txt

diff --git a/southbridge/amd/kern/PSP/SmuReleaseNotes.txt b/southbridge/amd/kern/PSP/SmuReleaseNotes.txt
index 240b20f..ed7bd44 100644
--- a/southbridge/amd/kern/PSP/SmuReleaseNotes.txt
+++ b/southbridge/amd/kern/PSP/SmuReleaseNotes.txt
@@ -3,6 +3,41 @@
 +--------------------------------------+
 
 +--------------------------+
+| Version 18.56.0          |
++---------------------------+-------------------------------------------------------------------------------
+|        * Date (dd/mm/yy)
+|                12/06/15
+|
+|        * Features enabled
+|                -NONE
+|
+|        * FuseDoc
+|                1.30
+|
+|        * Change Log
+|                SMUCZ-535 - PROCHOT events will trigger GFX_CU_PG reduction
+|
++------------------------------------------------------------------------------------------------------------
+
++--------------------------+
+| Version 18.55.0          |
++---------------------------+-------------------------------------------------------------------------------
+|        * Date (dd/mm/yy)
+|                11/05/15
+|
+|        * Features enabled
+|                -NONE
+|
+|        * FuseDoc
+|                1.30
+|
+|        * Change Log
+|                SMUCZ-529 - Exit bypass before programming SCLK DID to reduce Di/Dt
+|                SMUCZ-518 - Protect all DFS programming by VDDNB critical
+|
++------------------------------------------------------------------------------------------------------------
+
++--------------------------+
 | Version 18.54.0          |
 +---------------------------+-------------------------------------------------------------------------------
 |        * Date (dd/mm/yy)