| /* Machine description for AArch64 architecture. |
| Copyright (C) 2012-2013 Free Software Foundation, Inc. |
| Contributed by ARM Ltd. |
| |
| This file is part of GCC. |
| |
| GCC is free software; you can redistribute it and/or modify it |
| under the terms of the GNU General Public License as published by |
| the Free Software Foundation; either version 3, or (at your option) |
| any later version. |
| |
| GCC is distributed in the hope that it will be useful, but |
| WITHOUT ANY WARRANTY; without even the implied warranty of |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| General Public License for more details. |
| |
| You should have received a copy of the GNU General Public License |
| along with GCC; see the file COPYING3. If not see |
| <http://www.gnu.org/licenses/>. */ |
| |
| /* In the list below, the BUILTIN_<ITERATOR> macros should |
| correspond to the iterator used to construct the instruction's |
| patterns in aarch64-simd.md. A helpful idiom to follow when |
| adding new builtins is to add a line for each pattern in the md |
| file. Thus, ADDP, which has one pattern defined for the VD_BHSI |
| iterator, and one for DImode, has two entries below. */ |
| |
| BUILTIN_VD_RE (CREATE, create) |
| BUILTIN_VQ_S (GETLANE, get_lane_signed) |
| BUILTIN_VDQ (GETLANE, get_lane_unsigned) |
| BUILTIN_VDQF (GETLANE, get_lane) |
| VAR1 (GETLANE, get_lane, di) |
| BUILTIN_VDC (COMBINE, combine) |
| BUILTIN_VB (BINOP, pmul) |
| BUILTIN_VDQF (UNOP, sqrt) |
| BUILTIN_VD_BHSI (BINOP, addp) |
| VAR1 (UNOP, addp, di) |
| |
| BUILTIN_VD_RE (REINTERP, reinterpretdi) |
| BUILTIN_VDC (REINTERP, reinterpretv8qi) |
| BUILTIN_VDC (REINTERP, reinterpretv4hi) |
| BUILTIN_VDC (REINTERP, reinterpretv2si) |
| BUILTIN_VDC (REINTERP, reinterpretv2sf) |
| BUILTIN_VQ (REINTERP, reinterpretv16qi) |
| BUILTIN_VQ (REINTERP, reinterpretv8hi) |
| BUILTIN_VQ (REINTERP, reinterpretv4si) |
| BUILTIN_VQ (REINTERP, reinterpretv4sf) |
| BUILTIN_VQ (REINTERP, reinterpretv2di) |
| BUILTIN_VQ (REINTERP, reinterpretv2df) |
| |
| BUILTIN_VDQ_I (BINOP, dup_lane) |
| BUILTIN_SDQ_I (BINOP, dup_lane) |
| /* Implemented by aarch64_<sur>q<r>shl<mode>. */ |
| BUILTIN_VSDQ_I (BINOP, sqshl) |
| BUILTIN_VSDQ_I (BINOP, uqshl) |
| BUILTIN_VSDQ_I (BINOP, sqrshl) |
| BUILTIN_VSDQ_I (BINOP, uqrshl) |
| /* Implemented by aarch64_<su_optab><optab><mode>. */ |
| BUILTIN_VSDQ_I (BINOP, sqadd) |
| BUILTIN_VSDQ_I (BINOP, uqadd) |
| BUILTIN_VSDQ_I (BINOP, sqsub) |
| BUILTIN_VSDQ_I (BINOP, uqsub) |
| /* Implemented by aarch64_<sur>qadd<mode>. */ |
| BUILTIN_VSDQ_I (BINOP, suqadd) |
| BUILTIN_VSDQ_I (BINOP, usqadd) |
| |
| /* Implemented by aarch64_get_dreg<VSTRUCT:mode><VDC:mode>. */ |
| BUILTIN_VDC (GETLANE, get_dregoi) |
| BUILTIN_VDC (GETLANE, get_dregci) |
| BUILTIN_VDC (GETLANE, get_dregxi) |
| /* Implemented by aarch64_get_qreg<VSTRUCT:mode><VQ:mode>. */ |
| BUILTIN_VQ (GETLANE, get_qregoi) |
| BUILTIN_VQ (GETLANE, get_qregci) |
| BUILTIN_VQ (GETLANE, get_qregxi) |
| /* Implemented by aarch64_set_qreg<VSTRUCT:mode><VQ:mode>. */ |
| BUILTIN_VQ (SETLANE, set_qregoi) |
| BUILTIN_VQ (SETLANE, set_qregci) |
| BUILTIN_VQ (SETLANE, set_qregxi) |
| /* Implemented by aarch64_ld<VSTRUCT:nregs><VDC:mode>. */ |
| BUILTIN_VDC (LOADSTRUCT, ld2) |
| BUILTIN_VDC (LOADSTRUCT, ld3) |
| BUILTIN_VDC (LOADSTRUCT, ld4) |
| /* Implemented by aarch64_ld<VSTRUCT:nregs><VQ:mode>. */ |
| BUILTIN_VQ (LOADSTRUCT, ld2) |
| BUILTIN_VQ (LOADSTRUCT, ld3) |
| BUILTIN_VQ (LOADSTRUCT, ld4) |
| /* Implemented by aarch64_st<VSTRUCT:nregs><VDC:mode>. */ |
| BUILTIN_VDC (STORESTRUCT, st2) |
| BUILTIN_VDC (STORESTRUCT, st3) |
| BUILTIN_VDC (STORESTRUCT, st4) |
| /* Implemented by aarch64_st<VSTRUCT:nregs><VQ:mode>. */ |
| BUILTIN_VQ (STORESTRUCT, st2) |
| BUILTIN_VQ (STORESTRUCT, st3) |
| BUILTIN_VQ (STORESTRUCT, st4) |
| |
| BUILTIN_VQW (BINOP, saddl2) |
| BUILTIN_VQW (BINOP, uaddl2) |
| BUILTIN_VQW (BINOP, ssubl2) |
| BUILTIN_VQW (BINOP, usubl2) |
| BUILTIN_VQW (BINOP, saddw2) |
| BUILTIN_VQW (BINOP, uaddw2) |
| BUILTIN_VQW (BINOP, ssubw2) |
| BUILTIN_VQW (BINOP, usubw2) |
| /* Implemented by aarch64_<ANY_EXTEND:su><ADDSUB:optab>l<mode>. */ |
| BUILTIN_VDW (BINOP, saddl) |
| BUILTIN_VDW (BINOP, uaddl) |
| BUILTIN_VDW (BINOP, ssubl) |
| BUILTIN_VDW (BINOP, usubl) |
| /* Implemented by aarch64_<ANY_EXTEND:su><ADDSUB:optab>w<mode>. */ |
| BUILTIN_VDW (BINOP, saddw) |
| BUILTIN_VDW (BINOP, uaddw) |
| BUILTIN_VDW (BINOP, ssubw) |
| BUILTIN_VDW (BINOP, usubw) |
| /* Implemented by aarch64_<sur>h<addsub><mode>. */ |
| BUILTIN_VQ_S (BINOP, shadd) |
| BUILTIN_VQ_S (BINOP, uhadd) |
| BUILTIN_VQ_S (BINOP, srhadd) |
| BUILTIN_VQ_S (BINOP, urhadd) |
| /* Implemented by aarch64_<sur><addsub>hn<mode>. */ |
| BUILTIN_VQN (BINOP, addhn) |
| BUILTIN_VQN (BINOP, raddhn) |
| /* Implemented by aarch64_<sur><addsub>hn2<mode>. */ |
| BUILTIN_VQN (TERNOP, addhn2) |
| BUILTIN_VQN (TERNOP, raddhn2) |
| |
| BUILTIN_VSQN_HSDI (UNOP, sqmovun) |
| /* Implemented by aarch64_<sur>qmovn<mode>. */ |
| BUILTIN_VSQN_HSDI (UNOP, sqmovn) |
| BUILTIN_VSQN_HSDI (UNOP, uqmovn) |
| /* Implemented by aarch64_s<optab><mode>. */ |
| BUILTIN_VSDQ_I_BHSI (UNOP, sqabs) |
| BUILTIN_VSDQ_I_BHSI (UNOP, sqneg) |
| |
| BUILTIN_VSD_HSI (QUADOP, sqdmlal_lane) |
| BUILTIN_VSD_HSI (QUADOP, sqdmlsl_lane) |
| BUILTIN_VSD_HSI (QUADOP, sqdmlal_laneq) |
| BUILTIN_VSD_HSI (QUADOP, sqdmlsl_laneq) |
| BUILTIN_VQ_HSI (TERNOP, sqdmlal2) |
| BUILTIN_VQ_HSI (TERNOP, sqdmlsl2) |
| BUILTIN_VQ_HSI (QUADOP, sqdmlal2_lane) |
| BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_lane) |
| BUILTIN_VQ_HSI (QUADOP, sqdmlal2_laneq) |
| BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_laneq) |
| BUILTIN_VQ_HSI (TERNOP, sqdmlal2_n) |
| BUILTIN_VQ_HSI (TERNOP, sqdmlsl2_n) |
| /* Implemented by aarch64_sqdml<SBINQOPS:as>l<mode>. */ |
| BUILTIN_VSD_HSI (TERNOP, sqdmlal) |
| BUILTIN_VSD_HSI (TERNOP, sqdmlsl) |
| /* Implemented by aarch64_sqdml<SBINQOPS:as>l_n<mode>. */ |
| BUILTIN_VD_HSI (TERNOP, sqdmlal_n) |
| BUILTIN_VD_HSI (TERNOP, sqdmlsl_n) |
| |
| BUILTIN_VSD_HSI (BINOP, sqdmull) |
| BUILTIN_VSD_HSI (TERNOP, sqdmull_lane) |
| BUILTIN_VD_HSI (TERNOP, sqdmull_laneq) |
| BUILTIN_VD_HSI (BINOP, sqdmull_n) |
| BUILTIN_VQ_HSI (BINOP, sqdmull2) |
| BUILTIN_VQ_HSI (TERNOP, sqdmull2_lane) |
| BUILTIN_VQ_HSI (TERNOP, sqdmull2_laneq) |
| BUILTIN_VQ_HSI (BINOP, sqdmull2_n) |
| /* Implemented by aarch64_sq<r>dmulh<mode>. */ |
| BUILTIN_VSDQ_HSI (BINOP, sqdmulh) |
| BUILTIN_VSDQ_HSI (BINOP, sqrdmulh) |
| /* Implemented by aarch64_sq<r>dmulh_lane<q><mode>. */ |
| BUILTIN_VDQHS (TERNOP, sqdmulh_lane) |
| BUILTIN_VDQHS (TERNOP, sqdmulh_laneq) |
| BUILTIN_VDQHS (TERNOP, sqrdmulh_lane) |
| BUILTIN_VDQHS (TERNOP, sqrdmulh_laneq) |
| BUILTIN_SD_HSI (TERNOP, sqdmulh_lane) |
| BUILTIN_SD_HSI (TERNOP, sqrdmulh_lane) |
| |
| BUILTIN_VSDQ_I_DI (BINOP, sshl_n) |
| BUILTIN_VSDQ_I_DI (BINOP, ushl_n) |
| /* Implemented by aarch64_<sur>shl<mode>. */ |
| BUILTIN_VSDQ_I_DI (BINOP, sshl) |
| BUILTIN_VSDQ_I_DI (BINOP, ushl) |
| BUILTIN_VSDQ_I_DI (BINOP, srshl) |
| BUILTIN_VSDQ_I_DI (BINOP, urshl) |
| |
| BUILTIN_VSDQ_I_DI (SHIFTIMM, sshr_n) |
| BUILTIN_VSDQ_I_DI (SHIFTIMM, ushr_n) |
| /* Implemented by aarch64_<sur>shr_n<mode>. */ |
| BUILTIN_VSDQ_I_DI (SHIFTIMM, srshr_n) |
| BUILTIN_VSDQ_I_DI (SHIFTIMM, urshr_n) |
| /* Implemented by aarch64_<sur>sra_n<mode>. */ |
| BUILTIN_VSDQ_I_DI (SHIFTACC, ssra_n) |
| BUILTIN_VSDQ_I_DI (SHIFTACC, usra_n) |
| BUILTIN_VSDQ_I_DI (SHIFTACC, srsra_n) |
| BUILTIN_VSDQ_I_DI (SHIFTACC, ursra_n) |
| /* Implemented by aarch64_<sur>shll_n<mode>. */ |
| BUILTIN_VDW (SHIFTIMM, sshll_n) |
| BUILTIN_VDW (SHIFTIMM, ushll_n) |
| /* Implemented by aarch64_<sur>shll2_n<mode>. */ |
| BUILTIN_VQW (SHIFTIMM, sshll2_n) |
| BUILTIN_VQW (SHIFTIMM, ushll2_n) |
| /* Implemented by aarch64_<sur>q<r>shr<u>n_n<mode>. */ |
| BUILTIN_VSQN_HSDI (SHIFTIMM, sqshrun_n) |
| BUILTIN_VSQN_HSDI (SHIFTIMM, sqrshrun_n) |
| BUILTIN_VSQN_HSDI (SHIFTIMM, sqshrn_n) |
| BUILTIN_VSQN_HSDI (SHIFTIMM, uqshrn_n) |
| BUILTIN_VSQN_HSDI (SHIFTIMM, sqrshrn_n) |
| BUILTIN_VSQN_HSDI (SHIFTIMM, uqrshrn_n) |
| /* Implemented by aarch64_<sur>s<lr>i_n<mode>. */ |
| BUILTIN_VSDQ_I_DI (SHIFTINSERT, ssri_n) |
| BUILTIN_VSDQ_I_DI (SHIFTINSERT, usri_n) |
| BUILTIN_VSDQ_I_DI (SHIFTINSERT, ssli_n) |
| BUILTIN_VSDQ_I_DI (SHIFTINSERT, usli_n) |
| /* Implemented by aarch64_<sur>qshl<u>_n<mode>. */ |
| BUILTIN_VSDQ_I (SHIFTIMM, sqshlu_n) |
| BUILTIN_VSDQ_I (SHIFTIMM, sqshl_n) |
| BUILTIN_VSDQ_I (SHIFTIMM, uqshl_n) |
| |
| /* Implemented by aarch64_cm<cmp><mode>. */ |
| BUILTIN_VSDQ_I_DI (BINOP, cmeq) |
| BUILTIN_VSDQ_I_DI (BINOP, cmge) |
| BUILTIN_VSDQ_I_DI (BINOP, cmgt) |
| BUILTIN_VSDQ_I_DI (BINOP, cmle) |
| BUILTIN_VSDQ_I_DI (BINOP, cmlt) |
| /* Implemented by aarch64_cm<cmp><mode>. */ |
| BUILTIN_VSDQ_I_DI (BINOP, cmgeu) |
| BUILTIN_VSDQ_I_DI (BINOP, cmgtu) |
| BUILTIN_VSDQ_I_DI (BINOP, cmtst) |
| |
| /* Implemented by aarch64_<fmaxmin><mode>. */ |
| BUILTIN_VDQF (BINOP, fmax) |
| BUILTIN_VDQF (BINOP, fmin) |
| /* Implemented by aarch64_<maxmin><mode>. */ |
| BUILTIN_VDQ_BHSI (BINOP, smax) |
| BUILTIN_VDQ_BHSI (BINOP, smin) |
| BUILTIN_VDQ_BHSI (BINOP, umax) |
| BUILTIN_VDQ_BHSI (BINOP, umin) |
| |
| /* Implemented by aarch64_frint<frint_suffix><mode>. */ |
| BUILTIN_VDQF (UNOP, frintz) |
| BUILTIN_VDQF (UNOP, frintp) |
| BUILTIN_VDQF (UNOP, frintm) |
| BUILTIN_VDQF (UNOP, frinti) |
| BUILTIN_VDQF (UNOP, frintx) |
| BUILTIN_VDQF (UNOP, frinta) |
| |
| /* Implemented by aarch64_fcvt<frint_suffix><su><mode>. */ |
| BUILTIN_VDQF (UNOP, fcvtzs) |
| BUILTIN_VDQF (UNOP, fcvtzu) |
| BUILTIN_VDQF (UNOP, fcvtas) |
| BUILTIN_VDQF (UNOP, fcvtau) |
| BUILTIN_VDQF (UNOP, fcvtps) |
| BUILTIN_VDQF (UNOP, fcvtpu) |
| BUILTIN_VDQF (UNOP, fcvtms) |
| BUILTIN_VDQF (UNOP, fcvtmu) |
| |
| /* Implemented by |
| aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>. */ |
| BUILTIN_VALL (BINOP, zip1) |
| BUILTIN_VALL (BINOP, zip2) |
| BUILTIN_VALL (BINOP, uzp1) |
| BUILTIN_VALL (BINOP, uzp2) |
| BUILTIN_VALL (BINOP, trn1) |
| BUILTIN_VALL (BINOP, trn2) |
| |
| /* Implemented by aarch64_ld1<VALL:mode>. */ |
| BUILTIN_VALL (LOAD1, ld1) |
| |
| /* Implemented by aarch64_st1<VALL:mode>. */ |
| BUILTIN_VALL (STORE1, st1) |
| |
