| /* |
| * NOTE: Autogenerated file using genpinctrl.py |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <dt-bindings/pinctrl/stm32-pinctrl.h> |
| |
| / { |
| soc { |
| pinctrl: pin-controller@48000000 { |
| |
| /* ADC_IN / ADC_INN / ADC_INP */ |
| |
| adc1_in5_pa0: adc1_in5_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, ANALOG)>; |
| }; |
| |
| adc1_in6_pa1: adc1_in6_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, ANALOG)>; |
| }; |
| |
| adc1_in7_pa2: adc1_in7_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, ANALOG)>; |
| }; |
| |
| adc1_in8_pa3: adc1_in8_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, ANALOG)>; |
| }; |
| |
| adc1_in9_pa4: adc1_in9_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| adc1_in10_pa5: adc1_in10_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| adc1_in11_pa6: adc1_in11_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, ANALOG)>; |
| }; |
| |
| adc1_in12_pa7: adc1_in12_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, ANALOG)>; |
| }; |
| |
| adc1_in15_pb0: adc1_in15_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, ANALOG)>; |
| }; |
| |
| adc1_in16_pb1: adc1_in16_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, ANALOG)>; |
| }; |
| |
| adc2_in5_pa0: adc2_in5_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, ANALOG)>; |
| }; |
| |
| adc2_in6_pa1: adc2_in6_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, ANALOG)>; |
| }; |
| |
| adc2_in7_pa2: adc2_in7_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, ANALOG)>; |
| }; |
| |
| adc2_in8_pa3: adc2_in8_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, ANALOG)>; |
| }; |
| |
| adc2_in9_pa4: adc2_in9_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| adc2_in10_pa5: adc2_in10_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| adc2_in11_pa6: adc2_in11_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, ANALOG)>; |
| }; |
| |
| adc2_in12_pa7: adc2_in12_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, ANALOG)>; |
| }; |
| |
| adc2_in15_pb0: adc2_in15_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, ANALOG)>; |
| }; |
| |
| adc2_in16_pb1: adc2_in16_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, ANALOG)>; |
| }; |
| |
| /* CAN_RX */ |
| |
| can1_rx_pa11: can1_rx_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF9)>; |
| bias-pull-up; |
| }; |
| |
| /* CAN_TX */ |
| |
| can1_tx_pa12: can1_tx_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF9)>; |
| }; |
| |
| can1_tx_pb9: can1_tx_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF9)>; |
| }; |
| |
| /* DAC_OUT */ |
| |
| dac1_out1_pa4: dac1_out1_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| dac1_out2_pa5: dac1_out2_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| /* I2C_SCL */ |
| |
| i2c1_scl_pb6: i2c1_scl_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pb10: i2c2_scl_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pb13: i2c2_scl_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_scl_pa7: i2c3_scl_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_scl_pb6: i2c4_scl_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF5)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_scl_pb10: i2c4_scl_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF3)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* I2C_SDA */ |
| |
| i2c1_sda_pb7: i2c1_sda_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_sda_pb9: i2c1_sda_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_sda_pb14: i2c2_sda_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_sda_pb4: i2c3_sda_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_sda_pb7: i2c4_sda_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF5)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* SDMMC */ |
| |
| sdmmc2_cmd_pa1: sdmmc2_cmd_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc2_d2_pb3: sdmmc2_d2_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc2_d3_pb4: sdmmc2_d3_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc2_d5_pb9: sdmmc2_d5_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF7)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc2_ck_pb12: sdmmc2_ck_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc2_d0_pb14: sdmmc2_d0_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF11)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc2_d1_pb15: sdmmc2_d1_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF11)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* SPI_MISO */ |
| |
| spi1_miso_pa6: spi1_miso_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_miso_pa11: spi1_miso_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_miso_pb4: spi1_miso_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_miso_pb14: spi2_miso_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi3_miso_pb4: spi3_miso_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF6)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_MOSI */ |
| |
| spi1_mosi_pa7: spi1_mosi_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_mosi_pa12: spi1_mosi_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_mosi_pb5: spi1_mosi_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_mosi_pb15: spi2_mosi_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi3_mosi_pb5: spi3_mosi_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF6)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_NSS */ |
| |
| spi1_nss_pa4: spi1_nss_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi1_nss_pa15: spi1_nss_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi1_nss_pb0: spi1_nss_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pb9: spi2_nss_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pb12: spi2_nss_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi3_nss_pa4: spi3_nss_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF6)>; |
| bias-pull-up; |
| }; |
| |
| spi3_nss_pa15: spi3_nss_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF6)>; |
| bias-pull-up; |
| }; |
| |
| /* SPI_SCK */ |
| |
| spi1_sck_pa1: spi1_sck_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi1_sck_pa5: spi1_sck_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi1_sck_pb3: spi1_sck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pa9: spi2_sck_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF3)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pb10: spi2_sck_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pb13: spi2_sck_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi3_sck_pb3: spi3_sck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF6)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* TIM_CH / TIM_CHN */ |
| |
| tim1_ch1n_pa7: tim1_ch1n_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF1)>; |
| }; |
| |
| tim1_ch1_pa8: tim1_ch1_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF1)>; |
| }; |
| |
| tim1_ch2_pa9: tim1_ch2_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF1)>; |
| }; |
| |
| tim1_ch3_pa10: tim1_ch3_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF1)>; |
| }; |
| |
| tim1_ch4_pa11: tim1_ch4_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF1)>; |
| }; |
| |
| tim1_ch2n_pb0: tim1_ch2n_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF1)>; |
| }; |
| |
| tim1_ch3n_pb1: tim1_ch3n_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF1)>; |
| }; |
| |
| tim1_ch1n_pb13: tim1_ch1n_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF1)>; |
| }; |
| |
| tim1_ch2n_pb14: tim1_ch2n_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF1)>; |
| }; |
| |
| tim1_ch3n_pb15: tim1_ch3n_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF1)>; |
| }; |
| |
| tim2_ch1_pa0: tim2_ch1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF1)>; |
| }; |
| |
| tim2_ch2_pa1: tim2_ch2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF1)>; |
| }; |
| |
| tim2_ch3_pa2: tim2_ch3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF1)>; |
| }; |
| |
| tim2_ch4_pa3: tim2_ch4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF1)>; |
| }; |
| |
| tim2_ch1_pa5: tim2_ch1_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF1)>; |
| }; |
| |
| tim2_ch1_pa15: tim2_ch1_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF1)>; |
| }; |
| |
| tim2_ch2_pb3: tim2_ch2_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF1)>; |
| }; |
| |
| tim2_ch3_pb10: tim2_ch3_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF1)>; |
| }; |
| |
| tim3_ch1_pa6: tim3_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF2)>; |
| }; |
| |
| tim3_ch2_pa7: tim3_ch2_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF2)>; |
| }; |
| |
| tim3_ch3_pb0: tim3_ch3_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF2)>; |
| }; |
| |
| tim3_ch4_pb1: tim3_ch4_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF2)>; |
| }; |
| |
| tim3_ch1_pb4: tim3_ch1_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF2)>; |
| }; |
| |
| tim3_ch2_pb5: tim3_ch2_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF2)>; |
| }; |
| |
| tim4_ch1_pb6: tim4_ch1_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF2)>; |
| }; |
| |
| tim4_ch2_pb7: tim4_ch2_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF2)>; |
| }; |
| |
| tim4_ch4_pb9: tim4_ch4_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF2)>; |
| }; |
| |
| tim5_ch1_pa0: tim5_ch1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF2)>; |
| }; |
| |
| tim15_ch1n_pa1: tim15_ch1n_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF14)>; |
| }; |
| |
| tim5_ch2_pa1: tim5_ch2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF2)>; |
| }; |
| |
| tim15_ch1_pa2: tim15_ch1_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF14)>; |
| }; |
| |
| tim5_ch3_pa2: tim5_ch3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF2)>; |
| }; |
| |
| tim15_ch2_pa3: tim15_ch2_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF14)>; |
| }; |
| |
| tim5_ch4_pa3: tim5_ch4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF2)>; |
| }; |
| |
| tim15_ch1n_pb13: tim15_ch1n_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF14)>; |
| }; |
| |
| tim15_ch1_pb14: tim15_ch1_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF14)>; |
| }; |
| |
| tim15_ch2_pb15: tim15_ch2_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF14)>; |
| }; |
| |
| tim16_ch1_pa6: tim16_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF14)>; |
| }; |
| |
| tim16_ch1n_pb6: tim16_ch1n_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF14)>; |
| }; |
| |
| tim17_ch1_pa7: tim17_ch1_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF14)>; |
| }; |
| |
| tim17_ch1n_pb7: tim17_ch1n_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF14)>; |
| }; |
| |
| tim17_ch1_pb9: tim17_ch1_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF14)>; |
| }; |
| |
| tim8_ch1n_pa5: tim8_ch1n_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF3)>; |
| }; |
| |
| tim8_ch1n_pa7: tim8_ch1n_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF3)>; |
| }; |
| |
| tim8_ch2n_pb0: tim8_ch2n_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF3)>; |
| }; |
| |
| tim8_ch3n_pb1: tim8_ch3n_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF3)>; |
| }; |
| |
| tim8_ch2n_pb14: tim8_ch2n_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF3)>; |
| }; |
| |
| tim8_ch3n_pb15: tim8_ch3n_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF3)>; |
| }; |
| |
| /* UART_CTS / USART_CTS / LPUART_CTS */ |
| |
| lpuart1_cts_pa6: lpuart1_cts_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart1_cts_pa11: usart1_cts_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart1_cts_pb4: usart1_cts_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| lpuart1_cts_pb13: lpuart1_cts_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_cts_pa0: usart2_cts_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pa6: usart3_cts_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pb13: usart3_cts_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| uart4_cts_pb7: uart4_cts_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RTS / USART_RTS / LPUART_RTS */ |
| |
| usart1_rts_pa12: usart1_rts_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| lpuart1_rts_pb1: lpuart1_rts_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart1_rts_pb3: usart1_rts_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| lpuart1_rts_pb12: lpuart1_rts_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_rts_pa1: usart2_rts_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pa15: usart3_rts_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pb1: usart3_rts_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pb14: usart3_rts_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| uart4_rts_pa15: uart4_rts_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RX / USART_RX / LPUART_RX */ |
| |
| lpuart1_rx_pa3: lpuart1_rx_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF8)>; |
| }; |
| |
| usart1_rx_pa10: usart1_rx_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF7)>; |
| }; |
| |
| usart1_rx_pb7: usart1_rx_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF7)>; |
| }; |
| |
| lpuart1_rx_pb10: lpuart1_rx_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF8)>; |
| }; |
| |
| usart2_rx_pa3: usart2_rx_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF7)>; |
| }; |
| |
| usart2_rx_pa15: usart2_rx_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF3)>; |
| }; |
| |
| uart4_rx_pa1: uart4_rx_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF8)>; |
| }; |
| |
| /* UART_TX / USART_TX / LPUART_TX */ |
| |
| lpuart1_tx_pa2: lpuart1_tx_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF8)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pa9: usart1_tx_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pb6: usart1_tx_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pa2: usart2_tx_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pb10: usart3_tx_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF7)>; |
| bias-pull-up; |
| }; |
| |
| uart4_tx_pa0: uart4_tx_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF8)>; |
| bias-pull-up; |
| }; |
| |
| /* USB_OTG_FS */ |
| |
| usb_otg_fs_sof_pa8: usb_otg_fs_sof_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF10)>; |
| }; |
| |
| usb_otg_fs_vbus_pa9: usb_otg_fs_vbus_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, ANALOG)>; |
| }; |
| |
| usb_otg_fs_id_pa10: usb_otg_fs_id_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF10)>; |
| }; |
| |
| usb_otg_fs_dm_pa11: usb_otg_fs_dm_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF10)>; |
| }; |
| |
| usb_otg_fs_dp_pa12: usb_otg_fs_dp_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF10)>; |
| }; |
| |
| usb_otg_fs_sof_pa14: usb_otg_fs_sof_pa14 { |
| pinmux = <STM32_PINMUX('A', 14, AF10)>; |
| }; |
| |
| }; |
| }; |
| }; |
