DEFINED_PHASES=install prepare | |
DESCRIPTION=A Verilog simulation and synthesis tool | |
EAPI=2 | |
HOMEPAGE=http://www.icarus.com/eda/verilog/ | |
KEYWORDS=~amd64 ~ppc ~sparc ~x86 | |
LICENSE=GPL-2 | |
SLOT=0 | |
SRC_URI=ftp://icarus.com/pub/eda/verilog/v0.9/verilog-0.9.1.tar.gz | |
_eclasses_=eutils c89e7605f1414fa0f33eae391db1b5d3 multilib d9b509f8ec69d5fd4789bd320d50e6d0 portability 0be430f759a631e692678ed796e09f5c toolchain-funcs 39ac4a2f99e342286758b5e753f4fb8b | |
_md5_=03314d61fd260a650b40d0f6e17d1f08 |