| #objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp0-names=numeric |
| #name: MIPS CP0 register disassembly (numeric) |
| #source: cp0-names.s |
| |
| # Check objdump's handling of -M cp0-names=foo options. |
| |
| .*: +file format .*mips.* |
| |
| Disassembly of section .text: |
| 0+0000 <[^>]*> 40800000 mtc0 \$0,\$0 |
| 0+0004 <[^>]*> 40800800 mtc0 \$0,\$1 |
| 0+0008 <[^>]*> 40801000 mtc0 \$0,\$2 |
| 0+000c <[^>]*> 40801800 mtc0 \$0,\$3 |
| 0+0010 <[^>]*> 40802000 mtc0 \$0,\$4 |
| 0+0014 <[^>]*> 40802800 mtc0 \$0,\$5 |
| 0+0018 <[^>]*> 40803000 mtc0 \$0,\$6 |
| 0+001c <[^>]*> 40803800 mtc0 \$0,\$7 |
| 0+0020 <[^>]*> 40804000 mtc0 \$0,\$8 |
| 0+0024 <[^>]*> 40804800 mtc0 \$0,\$9 |
| 0+0028 <[^>]*> 40805000 mtc0 \$0,\$10 |
| 0+002c <[^>]*> 40805800 mtc0 \$0,\$11 |
| 0+0030 <[^>]*> 40806000 mtc0 \$0,\$12 |
| 0+0034 <[^>]*> 40806800 mtc0 \$0,\$13 |
| 0+0038 <[^>]*> 40807000 mtc0 \$0,\$14 |
| 0+003c <[^>]*> 40807800 mtc0 \$0,\$15 |
| 0+0040 <[^>]*> 40808000 mtc0 \$0,\$16 |
| 0+0044 <[^>]*> 40808800 mtc0 \$0,\$17 |
| 0+0048 <[^>]*> 40809000 mtc0 \$0,\$18 |
| 0+004c <[^>]*> 40809800 mtc0 \$0,\$19 |
| 0+0050 <[^>]*> 4080a000 mtc0 \$0,\$20 |
| 0+0054 <[^>]*> 4080a800 mtc0 \$0,\$21 |
| 0+0058 <[^>]*> 4080b000 mtc0 \$0,\$22 |
| 0+005c <[^>]*> 4080b800 mtc0 \$0,\$23 |
| 0+0060 <[^>]*> 4080c000 mtc0 \$0,\$24 |
| 0+0064 <[^>]*> 4080c800 mtc0 \$0,\$25 |
| 0+0068 <[^>]*> 4080d000 mtc0 \$0,\$26 |
| 0+006c <[^>]*> 4080d800 mtc0 \$0,\$27 |
| 0+0070 <[^>]*> 4080e000 mtc0 \$0,\$28 |
| 0+0074 <[^>]*> 4080e800 mtc0 \$0,\$29 |
| 0+0078 <[^>]*> 4080f000 mtc0 \$0,\$30 |
| 0+007c <[^>]*> 4080f800 mtc0 \$0,\$31 |
| \.\.\. |