| foo: | |
| mfsr $r0 ,$CPU_VER | |
| mfsr $r0 ,$CORE_ID | |
| mfsr $r0 ,$ICM_CFG | |
| mfsr $r0 ,$DCM_CFG | |
| mfsr $r0 ,$MMU_CFG | |
| mfsr $r0 ,$MSC_CFG | |
| mfsr $r0 ,$PSW | |
| mfsr $r0 ,$IPSW | |
| mfsr $r0 ,$P_IPSW | |
| mfsr $r0 ,$IVB | |
| mfsr $r0 ,$INT_CTRL | |
| mfsr $r0 ,$EVA | |
| mfsr $r0 ,$P_EVA | |
| mfsr $r0 ,$ITYPE | |
| mfsr $r0 ,$P_ITYPE | |
| mfsr $r0 ,$MERR | |
| mfsr $r0 ,$IPC | |
| mfsr $r0 ,$P_IPC | |
| mfsr $r0 ,$OIPC | |
| mfsr $r0 ,$P_P0 | |
| mfsr $r0 ,$P_P1 | |
| mfsr $r0 ,$INT_MASK | |
| mfsr $r0 ,$INT_MASK2 | |
| mfsr $r0 ,$INT_PEND | |
| mfsr $r0 ,$INT_PEND2 | |
| mfsr $r0 ,$INT_TRIGGER | |
| mfsr $r0 ,$SP_USR | |
| mfsr $r0 ,$SP_PRIV | |
| mfsr $r0 ,$INT_PRI | |
| mfsr $r0 ,$INT_PRI2 | |
| mfsr $r0 ,$MMU_CTL | |
| mfsr $r0 ,$L1_PPTB | |
| mfsr $r0 ,$TLB_VPN | |
| mfsr $r0 ,$TLB_DATA | |
| mfsr $r0 ,$TLB_MISC | |
| mfsr $r0 ,$VLPT_IDX | |
| mfsr $r0 ,$ILMB | |
| mfsr $r0 ,$DLMB | |
| mfsr $r0 ,$CACHE_CTL | |
| mfsr $r0 ,$HSMP_SADDR | |
| mfsr $r0 ,$HSMP_EADDR | |
| mfsr $r0 ,$SDZ_CTL | |
| mfsr $r0 ,$MISC_CTL | |
| mfsr $r0 ,$BPC0 | |
| mfsr $r0 ,$BPC1 | |
| mfsr $r0 ,$BPC2 | |
| mfsr $r0 ,$BPC3 | |
| mfsr $r0 ,$BPC4 | |
| mfsr $r0 ,$BPC5 | |
| mfsr $r0 ,$BPC6 | |
| mfsr $r0 ,$BPC7 | |
| mfsr $r0 ,$BPA0 | |
| mfsr $r0 ,$BPA1 | |
| mfsr $r0 ,$BPA2 | |
| mfsr $r0 ,$BPA3 | |
| mfsr $r0 ,$BPA4 | |
| mfsr $r0 ,$BPA5 | |
| mfsr $r0 ,$BPA6 | |
| mfsr $r0 ,$BPA7 | |
| mfsr $r0 ,$BPAM0 | |
| mfsr $r0 ,$BPAM1 | |
| mfsr $r0 ,$BPAM2 | |
| mfsr $r0 ,$BPAM3 | |
| mfsr $r0 ,$BPAM4 | |
| mfsr $r0 ,$BPAM5 | |
| mfsr $r0 ,$BPAM6 | |
| mfsr $r0 ,$BPAM7 | |
| mfsr $r0 ,$BPV0 | |
| mfsr $r0 ,$BPV1 | |
| mfsr $r0 ,$BPV2 | |
| mfsr $r0 ,$BPV3 | |
| mfsr $r0 ,$BPV4 | |
| mfsr $r0 ,$BPV5 | |
| mfsr $r0 ,$BPV6 | |
| mfsr $r0 ,$BPV7 | |
| mfsr $r0 ,$BPCID0 | |
| mfsr $r0 ,$BPCID1 | |
| mfsr $r0 ,$BPCID2 | |
| mfsr $r0 ,$BPCID3 | |
| mfsr $r0 ,$BPCID4 | |
| mfsr $r0 ,$BPCID5 | |
| mfsr $r0 ,$BPCID6 | |
| mfsr $r0 ,$BPCID7 | |
| mfsr $r0 ,$EDM_CFG | |
| mfsr $r0 ,$EDMSW | |
| mfsr $r0 ,$EDM_CTL | |
| mfsr $r0 ,$EDM_DTR | |
| mfsr $r0 ,$BPMTC | |
| mfsr $r0 ,$DIMBR | |
| mfsr $r0 ,$TECR0 | |
| mfsr $r0 ,$TECR1 | |
| mfsr $r0 ,$PFMC0 | |
| mfsr $r0 ,$PFMC1 | |
| mfsr $r0 ,$PFMC2 | |
| mfsr $r0 ,$PFM_CTL | |
| mfsr $r0 ,$PRUSR_ACC_CTL | |
| mfsr $r0 ,$FUCOP_CTL | |
| mfsr $r0 ,$DMA_CFG | |
| mfsr $r0 ,$DMA_GCSW | |
| mfsr $r0 ,$DMA_CHNSEL | |
| mfsr $r0 ,$DMA_ACT | |
| mfsr $r0 ,$DMA_SETUP | |
| mfsr $r0 ,$DMA_ISADDR | |
| mfsr $r0 ,$DMA_ESADDR | |
| mfsr $r0 ,$DMA_TCNT | |
| mfsr $r0 ,$DMA_STATUS | |
| mfsr $r0 ,$DMA_2DSET | |
| mfsr $r0 ,$DMA_2DSCTL |