| config SERIAL_CPU_INIT |
| bool |
| default y |
| |
| config WAIT_BEFORE_CPUS_INIT |
| bool |
| default n |
| |
| config UDELAY_IO |
| bool |
| default y if !UDELAY_LAPIC && !UDELAY_TSC |
| default n |
| |
| config UDELAY_LAPIC |
| bool |
| default n |
| |
| config UDELAY_TSC |
| bool |
| default n |
| |
| config UDELAY_TIMER2 |
| bool |
| default n |
| |
| config TSC_CALIBRATE_WITH_IO |
| bool |
| default n |
| |
| config TSC_SYNC_LFENCE |
| bool |
| default n |
| help |
| The CPU driver should select this if the CPU needs |
| to execute an lfence instruction in order to synchronize |
| rdtsc. This is true for all modern AMD CPUs. |
| |
| config TSC_SYNC_MFENCE |
| bool |
| default n |
| help |
| The CPU driver should select this if the CPU needs |
| to execute an mfence instruction in order to synchronize |
| rdtsc. This is true for all modern Intel CPUs. |
| |
| config XIP_ROM_SIZE |
| hex |
| default ROM_SIZE if ROMCC |
| default 0x10000 |
| |
| config CPU_ADDR_BITS |
| int |
| default 36 |
| |
| config LOGICAL_CPUS |
| bool |
| default y |
| |
| config CACHE_ROM |
| bool |
| default n |
| |
| config SMM_TSEG |
| bool |
| default n |
| |
| config SMM_TSEG_SIZE |
| hex |
| default 0 |
