make: Fix makefile depend generation

The main goal of this is to fix "make --question -C cryptoc" behavior
for projects that depend on this library (Chromium EC, Cr50).

Without this fix, when invoking make with the --question flag,
a full build of all *.o was triggered, minus libcryptoc.a.

This was because the "-include $(DEPS)" make step depended on *.d
files. That would then trigger the primary "$(obj)/%.d $(obj)/%.o"
rule, which [yes generated .d files, but] generated the objects.

The following article explains the art of makefile depends quite well:
http://make.mad-scientist.net/papers/advanced-auto-dependency-generation

BUG=none
TEST=make clean; make -q && echo Fail
    # No CC builds should occur and no Fail was emitted
    # Before this change, the make -q would trigger a build
TEST=make clean; make || echo Fail; make -q || echo Fail
    # No Fail should be emitted
TEST=make
     touch include/cryptoc/sha.h
     make
     # See sha.o, hmac.o, and libcryptoc.a being remade
TEST=make
     touch include/cryptoc/util.h
     make
     # See hmac.o, util.o, and libcryptoc.a being remade
TEST=make
     mv include/cryptoc/util.h include/cryptoc/utill.h
     # Change header reference in util.c and hmac.c
     make
     # See hmac.o, util.o, and libcryptoc.a being remade
TEST=# Run the following for a few minutes
     while true; do \
       make clean &>/dev/null; \
       make -q && echo Fail; \
       make -j &>/dev/null; \
       make -q || echo Fail; \
       make clean &>/dev/null; \
       make -q && echo Fail; \
       make &>/dev/null; \
       make -q || echo Fail; \
       echo -n .; \
     done

Change-Id: I1ec8a9acca06d8475011563365b57a16f65b2e84
diff --git a/Makefile b/Makefile
index 863a53b..f0f9ef1 100644
--- a/Makefile
+++ b/Makefile
@@ -46,15 +46,17 @@
 
 # Special target which allows to trigger re-compiling of all sources without
 # linking a library.
+.PHONY: objs
 objs: $(OBJS)
 
 $(obj):
 	@echo "  MKDIR   $(obj)"
 	$(Q)mkdir -p $(obj)
 
-$(obj)/%.d $(obj)/%.o: %.c | $(obj)
+$(obj)/%.o: %.c | $(obj)
 	@echo "  CC      $(notdir $<)"
-	$(Q)$(CC) $(CFLAGS) -c -MMD -MF $(basename $@).d -MT $(basename $@).o \
+	$(Q)$(CC) $(CFLAGS) -c \
+		-MMD -MP -MF $(basename $@).d -MT $(basename $@).o \
 		-o $(basename $@).o $<
 
 .PHONY: clean
@@ -62,6 +64,6 @@
 	@echo "  RM      $(obj)"
 	$(Q)rm -rf $(obj)
 
-ifneq ($(MAKECMDGOALS),clean)
+# Don't forget, this include line can trigger builds for the $(DEPS),
+# so do not provide a rule to make %.d.
 -include $(DEPS)
-endif