| From 70e69bbd3ea48c7ab85a21c0d14426e7694aed9b Mon Sep 17 00:00:00 2001 |
| From: Hsin-Yi Wang <hsinyi@chromium.org> |
| Date: Mon, 21 Dec 2020 18:42:46 +0800 |
| Subject: [PATCH] CHROMIUM: arm64: dts: mt8183: Add gpu node and opp lists |
| |
| Add gpu node and its opp lists. |
| |
| BUG=b:174290214 |
| TEST=boot with kukui ToT |
| |
| Change-Id: I9f4c9e3f5958513fc4ce03e68b4a44339405053c |
| Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> |
| Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2605963 |
| Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
| --- |
| .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 15 +- |
| arch/arm64/boot/dts/mediatek/mt8183.dtsi | 245 +++++++++++------- |
| 2 files changed, 166 insertions(+), 94 deletions(-) |
| |
| diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi |
| index ae549d55a94f..95bcec38cd3a 100644 |
| --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi |
| +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi |
| @@ -280,8 +280,21 @@ dsi_out: endpoint { |
| }; |
| |
| &gpu { |
| + supply-names = "mali","mali_sram"; |
| mali-supply = <&mt6358_vgpu_reg>; |
| - sram-supply = <&mt6358_vsram_gpu_reg>; |
| + mali_sram-supply = <&mt6358_vsram_gpu_reg>; |
| + operating-points-v2 = <&gpu_opp_table>; |
| + power_model@0 { |
| + compatible = "arm,mali-simple-power-model"; |
| + static-coefficient = <2427750>; |
| + dynamic-coefficient = <4687>; |
| + ts = <20000 2000 (-20) 2>; |
| + thermal-zone = "cpu_thermal"; |
| + }; |
| + power_model@1 { |
| + compatible = "arm,mali-g72-power-model"; |
| + scale = <15000>; |
| + }; |
| }; |
| |
| &i2c0 { |
| diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi |
| index f90df6439c08..00041ebe7210 100644 |
| --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi |
| +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi |
| @@ -197,91 +197,6 @@ CLUSTER_SLEEP1: cluster-sleep-1 { |
| }; |
| }; |
| |
| - gpu_opp_table: opp_table0 { |
| - compatible = "operating-points-v2"; |
| - opp-shared; |
| - |
| - opp-300000000 { |
| - opp-hz = /bits/ 64 <300000000>; |
| - opp-microvolt = <625000>, <850000>; |
| - }; |
| - |
| - opp-320000000 { |
| - opp-hz = /bits/ 64 <320000000>; |
| - opp-microvolt = <631250>, <850000>; |
| - }; |
| - |
| - opp-340000000 { |
| - opp-hz = /bits/ 64 <340000000>; |
| - opp-microvolt = <637500>, <850000>; |
| - }; |
| - |
| - opp-360000000 { |
| - opp-hz = /bits/ 64 <360000000>; |
| - opp-microvolt = <643750>, <850000>; |
| - }; |
| - |
| - opp-380000000 { |
| - opp-hz = /bits/ 64 <380000000>; |
| - opp-microvolt = <650000>, <850000>; |
| - }; |
| - |
| - opp-400000000 { |
| - opp-hz = /bits/ 64 <400000000>; |
| - opp-microvolt = <656250>, <850000>; |
| - }; |
| - |
| - opp-420000000 { |
| - opp-hz = /bits/ 64 <420000000>; |
| - opp-microvolt = <662500>, <850000>; |
| - }; |
| - |
| - opp-460000000 { |
| - opp-hz = /bits/ 64 <460000000>; |
| - opp-microvolt = <675000>, <850000>; |
| - }; |
| - |
| - opp-500000000 { |
| - opp-hz = /bits/ 64 <500000000>; |
| - opp-microvolt = <687500>, <850000>; |
| - }; |
| - |
| - opp-540000000 { |
| - opp-hz = /bits/ 64 <540000000>; |
| - opp-microvolt = <700000>, <850000>; |
| - }; |
| - |
| - opp-580000000 { |
| - opp-hz = /bits/ 64 <580000000>; |
| - opp-microvolt = <712500>, <850000>; |
| - }; |
| - |
| - opp-620000000 { |
| - opp-hz = /bits/ 64 <620000000>; |
| - opp-microvolt = <725000>, <850000>; |
| - }; |
| - |
| - opp-653000000 { |
| - opp-hz = /bits/ 64 <653000000>; |
| - opp-microvolt = <743750>, <850000>; |
| - }; |
| - |
| - opp-698000000 { |
| - opp-hz = /bits/ 64 <698000000>; |
| - opp-microvolt = <768750>, <868750>; |
| - }; |
| - |
| - opp-743000000 { |
| - opp-hz = /bits/ 64 <743000000>; |
| - opp-microvolt = <793750>, <893750>; |
| - }; |
| - |
| - opp-800000000 { |
| - opp-hz = /bits/ 64 <800000000>; |
| - opp-microvolt = <825000>, <925000>; |
| - }; |
| - }; |
| - |
| pmu-a53 { |
| compatible = "arm,cortex-a53-pmu"; |
| interrupt-parent = <&gic>; |
| @@ -1203,7 +1118,7 @@ mfgcfg: syscon@13000000 { |
| #clock-cells = <1>; |
| }; |
| |
| - gpu: gpu@13040000 { |
| + gpu: mali@13040000 { |
| compatible = "mediatek,mt8183-mali", "arm,mali-bifrost"; |
| reg = <0 0x13040000 0 0x4000>; |
| interrupts = |
| @@ -1212,15 +1127,159 @@ gpu: gpu@13040000 { |
| <GIC_SPI 278 IRQ_TYPE_LEVEL_LOW>; |
| interrupt-names = "job", "mmu", "gpu"; |
| |
| - clocks = <&topckgen CLK_TOP_MFGPLL_CK>; |
| + /* |
| + * Note: the properties below are not part of the |
| + * upstream binding. |
| + */ |
| + clocks = |
| + <&topckgen CLK_TOP_MFGPLL_CK>, |
| + <&topckgen CLK_TOP_MUX_MFG>, |
| + <&clk26m>, |
| + <&mfgcfg CLK_MFG_BG3D>; |
| + clock-names = |
| + "clk_main_parent", |
| + "clk_mux", |
| + "clk_sub_parent", |
| + "subsys_mfg_cg"; |
| + |
| + power-domains = <&spm MT8183_POWER_DOMAIN_MFG_CORE0>; |
| |
| - power-domains = |
| - <&spm MT8183_POWER_DOMAIN_MFG_CORE0>, |
| - <&spm MT8183_POWER_DOMAIN_MFG_CORE1>, |
| - <&spm MT8183_POWER_DOMAIN_MFG_2D>; |
| - power-domain-names = "core0", "core1", "core2"; |
| + #cooling-cells = <2>; |
| + cooling-min-level = <0>; |
| + cooling-max-level = <15>; |
| + }; |
| |
| - operating-points-v2 = <&gpu_opp_table>; |
| + gpu_core1: mali_gpu_core1 { |
| + compatible = "mediatek,gpu_core1"; |
| + power-domains = <&spm MT8183_POWER_DOMAIN_MFG_CORE1>; |
| + }; |
| + |
| + gpu_core2: mali_gpu_core2 { |
| + compatible = "mediatek,gpu_core2"; |
| + power-domains = <&spm MT8183_POWER_DOMAIN_MFG_2D>; |
| + }; |
| + |
| + gpu_opp_table: opp_table0 { |
| + /* |
| + * Note: "operating-points-v2-mali" compatible and the |
| + * opp-core-mask properties are not part of upstream |
| + * binding. |
| + */ |
| + |
| + compatible = "operating-points-v2", "operating-points-v2-mali"; |
| + opp-shared; |
| + |
| + opp-300000000 { |
| + opp-hz = /bits/ 64 <300000000>; |
| + opp-microvolt = <625000>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-320000000 { |
| + opp-hz = /bits/ 64 <320000000>; |
| + opp-microvolt = <631250>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-340000000 { |
| + opp-hz = /bits/ 64 <340000000>; |
| + opp-microvolt = <637500>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-360000000 { |
| + opp-hz = /bits/ 64 <360000000>; |
| + opp-microvolt = <643750>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-380000000 { |
| + opp-hz = /bits/ 64 <380000000>; |
| + opp-microvolt = <650000>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-400000000 { |
| + opp-hz = /bits/ 64 <400000000>; |
| + opp-microvolt = <656250>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-420000000 { |
| + opp-hz = /bits/ 64 <420000000>; |
| + opp-microvolt = <662500>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-460000000 { |
| + opp-hz = /bits/ 64 <460000000>; |
| + opp-microvolt = <675000>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-500000000 { |
| + opp-hz = /bits/ 64 <500000000>; |
| + opp-microvolt = <687500>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-540000000 { |
| + opp-hz = /bits/ 64 <540000000>; |
| + opp-microvolt = <700000>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-580000000 { |
| + opp-hz = /bits/ 64 <580000000>; |
| + opp-microvolt = <712500>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-620000000 { |
| + opp-hz = /bits/ 64 <620000000>; |
| + opp-microvolt = <725000>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-653000000 { |
| + opp-hz = /bits/ 64 <653000000>; |
| + opp-microvolt = <743750>, /* Supply 0 */ |
| + <850000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-698000000 { |
| + opp-hz = /bits/ 64 <698000000>; |
| + opp-microvolt = <768750>, /* Supply 0 */ |
| + <868750>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-743000000 { |
| + opp-hz = /bits/ 64 <743000000>; |
| + opp-microvolt = <793750>, /* Supply 0 */ |
| + <893750>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| + |
| + opp-800000000 { |
| + opp-hz = /bits/ 64 <800000000>; |
| + opp-microvolt = <825000>, /* Supply 0 */ |
| + <925000>; /* Supply 1 */ |
| + opp-core-mask = /bits/ 64 <0xf>; |
| + }; |
| }; |
| |
| mmsys: syscon@14000000 { |
| -- |
| 2.32.0.402.g57bb445576-goog |
| |