| From e2fd950a38645d9fa2cf2852e034cb0022acb106 Mon Sep 17 00:00:00 2001 |
| From: Po-Ting Chen <robin.chen@amd.com> |
| Date: Wed, 5 May 2021 20:46:36 +0800 |
| Subject: [PATCH] UPSTREAM: drm/amd/display: Add swizzle visual confirm mode |
| |
| [Why] |
| To support a new visual confirm mode: swizzle to show the specific |
| color at the screen border according to different surface swizzle mode. |
| Currently we only support the Linear mode with red color. |
| |
| Signed-off-by: Po-Ting Chen <robin.chen@amd.com> |
| Acked-by: Stylon Wang <stylon.wang@amd.com> |
| Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| (cherry picked from commit 793c82eebb0dc7345d207689b2d20326db68cb2c) |
| Signed-off-by: Sean Paul <seanpaul@chromium.org> |
| |
| BUG=b:187300590 |
| TEST=Tested with single/multiple displays, suspend/resume, hotplugs on volteer/trogdor/dedede/zork, build tested on amd64/arm64-generic |
| |
| Change-Id: I4ef6b78e6fe3d78771e92670d17514d5dc022afd |
| --- |
| .../drm/amd/display/dc/core/dc_hw_sequencer.c | 21 +++++++++++++++++++ |
| drivers/gpu/drm/amd/display/dc/dc.h | 1 + |
| .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 ++ |
| .../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 2 ++ |
| .../gpu/drm/amd/display/dc/inc/hw_sequencer.h | 4 +++- |
| 5 files changed, 29 insertions(+), 1 deletion(-) |
| |
| diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c |
| index ee3eef5a1f44..15f987a63025 100644 |
| --- a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c |
| +++ b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c |
| @@ -403,3 +403,24 @@ void get_hdr_visual_confirm_color( |
| break; |
| } |
| } |
| + |
| +void get_surface_tile_visual_confirm_color( |
| + struct pipe_ctx *pipe_ctx, |
| + struct tg_color *color) |
| +{ |
| + uint32_t color_value = MAX_TG_COLOR_VALUE; |
| + /* Determine the overscan color based on the top-most (desktop) plane's context */ |
| + struct pipe_ctx *top_pipe_ctx = pipe_ctx; |
| + |
| + while (top_pipe_ctx->top_pipe != NULL) |
| + top_pipe_ctx = top_pipe_ctx->top_pipe; |
| + |
| + switch (top_pipe_ctx->plane_state->tiling_info.gfx9.swizzle) { |
| + case DC_SW_LINEAR: |
| + /* LINEAR Surface - set border color to red */ |
| + color->color_r_cr = color_value; |
| + break; |
| + default: |
| + break; |
| + } |
| +} |
| diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h |
| index 5a53630f3b44..39a5e37b77af 100644 |
| --- a/drivers/gpu/drm/amd/display/dc/dc.h |
| +++ b/drivers/gpu/drm/amd/display/dc/dc.h |
| @@ -318,6 +318,7 @@ enum visual_confirm { |
| VISUAL_CONFIRM_HDR = 2, |
| VISUAL_CONFIRM_MPCTREE = 4, |
| VISUAL_CONFIRM_PSR = 5, |
| + VISUAL_CONFIRM_SWIZZLE = 9, |
| }; |
| |
| enum dcc_option { |
| diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c |
| index 270d888d4594..aed7a4a2a8a1 100644 |
| --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c |
| +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c |
| @@ -2434,6 +2434,8 @@ void dcn10_update_visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx, |
| hws->funcs.get_hdr_visual_confirm_color(pipe_ctx, color); |
| else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SURFACE) |
| hws->funcs.get_surface_visual_confirm_color(pipe_ctx, color); |
| + else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SWIZZLE) |
| + hws->funcs.get_surface_tile_visual_confirm_color(pipe_ctx, color); |
| else |
| color_space_to_black_color( |
| dc, pipe_ctx->stream->output_color_space, color); |
| diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c |
| index 9b3569f027b9..b1c35831bb2d 100644 |
| --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c |
| +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c |
| @@ -2291,6 +2291,8 @@ void dcn20_update_visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx, |
| hws->funcs.get_surface_visual_confirm_color(pipe_ctx, color); |
| else if (dc->debug.visual_confirm == VISUAL_CONFIRM_MPCTREE) |
| dcn20_get_mpctree_visual_confirm_color(pipe_ctx, color); |
| + else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SWIZZLE) |
| + hws->funcs.get_surface_tile_visual_confirm_color(pipe_ctx, color); |
| |
| if (mpc->funcs->set_bg_color) |
| mpc->funcs->set_bg_color(mpc, color, mpcc_id); |
| diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h |
| index 7eacebe9f1ba..6ab659027c77 100644 |
| --- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h |
| +++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h |
| @@ -272,5 +272,7 @@ void get_hdr_visual_confirm_color( |
| void get_mpctree_visual_confirm_color( |
| struct pipe_ctx *pipe_ctx, |
| struct tg_color *color); |
| - |
| +void get_surface_tile_visual_confirm_color( |
| + struct pipe_ctx *pipe_ctx, |
| + struct tg_color *color); |
| #endif /* __DC_HW_SEQUENCER_H__ */ |
| -- |
| 2.17.1 |
| |