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chromium / chromiumos / third_party / kernel-rebase-patches / ba418e97732e54f14a683795e612e8b91d4b5134 / . / 5c8f14d336e262abce9b0552f275d677677df1ca23695e8a93bbbae8.patch
blob: 9b4bca8a312ac53f18576dc0bd7f942dbb93aae0 [file] [log] [blame]
From 70705513fafa5e036495fc0d38aba16db209d2bf Mon Sep 17 00:00:00 2001
From: Douglas Anderson <dianders@chromium.org>
Date: Tue, 8 Sep 2020 14:43:48 -0700
Subject: [PATCH] CHROMIUM: arm64: dts: qcom: Add sc7180-pompom-r1
Pompom has two kernel-visible changes from pompom-r0:
* TP_INT_ODL change from GPIO58 to GPIO0
* DMIC_SEL change from GPIO18 to GPIO86
We're not modeling DMIC_SEL in the device tree yet (and it's also not
on any trogdor variants except pompom), so that one is easy.
For TP_INT_ODL it's a bit zanier. TP_INT_ODL is the new name for what
used to be called TRACKPAD_INT_1V8_ODL. GPIO0 is the new official
place for all (or nearly all?) boards going forward. That means that
the correct thing to do is to move / rename this in the main
trogdor-dtsi file and then have all "older" revisions (pretty much
everything at this point) override it.
This change is at least moderately ugly because trogdor.dtsi is now
upstream but trogdor-r0 is not (and probably never will by) nor is
pompom (not quite ready). For now I think we'll have to do this as a
CHROMIUM patch and sort it out once we have an actual upstream board
that moves TP_INT_ODL.
NOTE: pin-names are copy-pasted from EE-provided spreadsheet and
sanity-checked.
For testing, I did this to reverse-engineer:
cd /build/trogdor/var/cache/portage/sys-kernel/chromeos-kernel-5_4/arch/arm64/boot/dts/qcom
for dtb in sc7180-trogdor-*.dtb; do
dtc -I dtb -O dts ${dtb} > ${PATH_TO}/${dtb}.dts;
done
BUG=b:166812622, b:163613554
TEST=Build and boot
TEST=Reverse-compile before and after and see dts files seem sane.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Change-Id: If0b6de0cdeb1f66d7d0066e4d0ddc5319b56f0a8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2398983
Commit-Queue: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
---
arch/arm64/boot/dts/qcom/Makefile | 2 +
...e.dts => sc7180-trogdor-pompom-r0-lte.dts} | 6 +-
.../dts/qcom/sc7180-trogdor-pompom-r0.dts | 159 +++++++++
.../dts/qcom/sc7180-trogdor-pompom-r1-lte.dts | 4 +-
.../boot/dts/qcom/sc7180-trogdor-pompom.dts | 44 ---
.../arm64/boot/dts/qcom/sc7180-trogdor-r0.dts | 322 ++++++++++++++++++
6 files changed, 488 insertions(+), 49 deletions(-)
rename arch/arm64/boot/dts/qcom/{sc7180-trogdor-pompom-lte.dts => sc7180-trogdor-pompom-r0-lte.dts} (56%)
create mode 100644 arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r0.dts
delete mode 100644 arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dts
create mode 100644 arch/arm64/boot/dts/qcom/sc7180-trogdor-r0.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 890019c88aec..8fa04add401d 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -51,6 +51,8 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r3-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-limozeen.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-limozeen-nots.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-limozeen-nots-r4.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r0.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r0-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r2.dtb
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-lte.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r0-lte.dts
similarity index 56%
rename from arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-lte.dts
rename to arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r0-lte.dts
index 8185e58c9581..91f47953aa18 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-lte.dts
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r0-lte.dts
@@ -5,10 +5,10 @@
* Copyright 2020 Google LLC.
*/
-#include "sc7180-trogdor-pompom.dts"
+#include "sc7180-trogdor-pompom-r0.dts"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
- model = "Google Pompom (rev0+) with LTE";
- compatible = "google,pompom-sku0", "qcom,sc7180";
+ model = "Google Pompom (rev0) with LTE";
+ compatible = "google,pompom-rev0-sku0", "qcom,sc7180";
};
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r0.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r0.dts
new file mode 100644
index 000000000000..18e3597b5343
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r0.dts
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Pompom board device tree source
+ *
+ * Copyright 2020 Google LLC.
+ */
+
+/dts-v1/;
+
+#include "sc7180-trogdor-pompom.dtsi"
+
+/ {
+ model = "Google Pompom (rev0)";
+ compatible = "google,pompom-rev0", "qcom,sc7180";
+};
+
+&trackpad {
+ interrupts = <58 IRQ_TYPE_EDGE_FALLING>;
+};
+
+/* PINCTRL - modifications to sc7180-trogdor.dtsi */
+
+&trackpad_int_1v8_odl {
+ pinmux {
+ pins = "gpio58";
+ };
+
+ pinconf {
+ pins = "gpio58";
+ };
+};
+
+/* PINCTRL - board-specific pinctrl */
+
+&tlmm {
+ gpio-line-names = "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "AP_TP_I2C_SDA",
+ "AP_TP_I2C_SCL",
+ "TS_RESET_L",
+ "TS_INT_L",
+ "",
+ "EDP_BRIJ_IRQ",
+ "AP_EDP_BKLTEN",
+ "AP_RAM_ID2",
+ "",
+ "EDP_BRIJ_I2C_SDA",
+ "EDP_BRIJ_I2C_SCL",
+ "HUB_RST_L",
+ "DMIC_SEL",
+ "AP_RAM_ID1",
+ "AP_SKU_ID2",
+ "PEN_IRQ_L",
+ "FPMCU_SEL",
+ "AMP_EN",
+ "P_SENSOR_INT_L",
+ "AP_SAR_SENSOR_SDA",
+ "AP_SAR_SENSOR_SCL",
+ "",
+ "HP_IRQ",
+ "AP_RAM_ID0",
+ "EN_PP3300_DX_EDP",
+ "AP_BRD_ID2",
+ "BRIJ_SUSPEND",
+ "AP_BRD_ID0",
+ "AP_H1_SPI_MISO",
+ "AP_H1_SPI_MOSI",
+ "AP_H1_SPI_CLK",
+ "AP_H1_SPI_CS_L",
+ "",
+ "",
+ "",
+ "",
+ "H1_AP_INT_ODL",
+ "",
+ "UART_AP_TX_DBG_RX",
+ "UART_DBG_TX_AP_RX",
+ "HP_I2C_SDA",
+ "HP_I2C_SCL",
+ "FORCED_USB_BOOT",
+ "AMP_BCLK",
+ "AMP_LRCLK",
+ "AMP_DIN",
+ "PEN_PDCT_L",
+ "HP_BCLK",
+ "HP_LRCLK",
+ "HP_DOUT",
+ "HP_DIN",
+ "HP_MCLK",
+ "TRACKPAD_INT_1V8_ODL",
+ "AP_EC_SPI_MISO",
+ "AP_EC_SPI_MOSI",
+ "AP_EC_SPI_CLK",
+ "AP_EC_SPI_CS_L",
+ "AP_SPI_CLK",
+ "AP_SPI_MOSI",
+ "AP_SPI_MISO",
+ /*
+ * AP_FLASH_WP_L is crossystem ABI. Schematics
+ * call it BIOS_FLASH_WP_L.
+ */
+ "AP_FLASH_WP_L",
+ "",
+ "AP_SPI_CS0_L",
+ "SD_CD_ODL",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "UIM2_DATA",
+ "UIM2_CLK",
+ "UIM2_RST",
+ "UIM2_PRESENT",
+ "UIM1_DATA",
+ "UIM1_CLK",
+ "UIM1_RST",
+ "",
+ "EN_PP3300_CODEC",
+ "EN_PP3300_HUB",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "AP_SKU_ID1",
+ "AP_RST_REQ",
+ "",
+ "AP_BRD_ID1",
+ "AP_EC_INT_R_L",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "EDP_BRIJ_EN",
+ "AP_SKU_ID0",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "AP_TS_PEN_I2C_SDA",
+ "AP_TS_PEN_I2C_SCL",
+ "DP_HOT_PLUG_DET",
+ "EC_IN_RW_ODL";
+};
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dts
index 0202f03eafe6..250fae6126b6 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dts
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dts
@@ -9,6 +9,6 @@
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
- model = "Google Pompom (rev1) with LTE";
- compatible = "google,pompom-rev1-sku0", "qcom,sc7180";
+ model = "Google Pompom (rev1+) with LTE";
+ compatible = "google,pompom-sku0", "qcom,sc7180";
};
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dts
deleted file mode 100644
index 9fa888af82e6..000000000000
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dts
+++ /dev/null
@@ -1,44 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Google Pompom board device tree source
- *
- * Copyright 2020 Google LLC.
- */
-
-#include "sc7180-trogdor-r1.dts"
-
-/ {
- model = "Google Pompom (rev0+)";
- compatible = "google,pompom", "qcom,sc7180";
-};
-
-/delete-node/ &ap_ts;
-&ap_ts_pen_1v8 {
- ap_ts: touchscreen@10 {
- compatible = "hid-over-i2c";
- reg = <0x10>;
- pinctrl-names = "default";
- pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
-
- interrupt-parent = <&tlmm>;
- interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
-
- post-power-on-delay-ms = <20>;
- hid-descr-addr = <0x0001>;
-
- vdd-supply = <&pp3300_ts>;
- };
-};
-
-&panel {
- compatible = "kingdisplay,kd116n21-30nv-a010";
-};
-
-&ap_sar_sensor_i2c {
- status = "okay";
-};
-
-&ap_sar_sensor {
- compatible = "semtech,sx9311";
- status = "okay";
-};
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-r0.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-r0.dts
new file mode 100644
index 000000000000..2585df73a1a8
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-r0.dts
@@ -0,0 +1,322 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Trogdor board device tree source
+ *
+ * Copyright 2019 Google LLC.
+ */
+
+/dts-v1/;
+
+#include "sc7180.dtsi"
+
+ap_ec_spi: &spi0 {};
+ap_h1_spi: &spi6 {};
+
+#include "sc7180-trogdor.dtsi"
+
+/ {
+ model = "Google Trogdor (rev0)";
+ compatible = "google,trogdor-rev0-sku0",
+ "google,trogdor-rev0-sku1",
+ "qcom,sc7180";
+
+ panel: panel {
+ compatible = "auo,b116xa01";
+ power-supply = <&pp3300_dx_edp>;
+ backlight = <&backlight>;
+ no-hpd;
+
+ ports {
+ port {
+ panel_in_edp: endpoint {
+ remote-endpoint = <&sn65dsi86_out>;
+ };
+ };
+ };
+ };
+};
+
+&ap_sar_sensor_i2c {
+ /* Not hooked up */
+ status = "disabled";
+};
+
+&ap_tp_i2c {
+ /* Pullups are missing on r0, but it seems to work at 100 kHz */
+ clock-frequency = <100000>;
+};
+
+&cr50 {
+ interrupts = <21 IRQ_TYPE_EDGE_RISING>;
+};
+
+ap_ts_pen_1v8: &i2c4 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ ap_ts: touchscreen@10 {
+ compatible = "elan,ekth3500";
+ reg = <0x10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
+
+ interrupt-parent = <&tlmm>;
+ interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
+
+ vcc33-supply = <&pp3300_ts>;
+
+ reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pp3300_ts {
+ gpio = <&tlmm 106 GPIO_ACTIVE_HIGH>;
+};
+
+&sdhc_2 {
+ status = "okay";
+};
+
+&sn65dsi86_bridge {
+ enable-gpios = <&tlmm 14 GPIO_ACTIVE_HIGH>;
+};
+
+&trackpad {
+ interrupts = <58 IRQ_TYPE_EDGE_FALLING>;
+};
+
+/* PINCTRL - modifications to sc7180-trogdor.dtsi */
+
+&ap_suspend_l_neuter {
+ pinmux {
+ pins = "gpio20";
+ };
+
+ pinconf {
+ pins = "gpio20";
+ };
+};
+
+&bios_flash_wp_l {
+ pinmux {
+ pins = "gpio42";
+ };
+
+ pinconf {
+ pins = "gpio42";
+ };
+};
+
+&edp_brij_en {
+ pinmux {
+ pins = "gpio14";
+ };
+
+ pinconf {
+ pins = "gpio14";
+ };
+};
+
+&en_pp3300_dx_edp {
+ pinmux {
+ pins = "gpio106";
+ };
+
+ pinconf {
+ pins = "gpio106";
+ };
+};
+
+&h1_ap_int_odl {
+ pinmux {
+ pins = "gpio21";
+ };
+
+ pinconf {
+ pins = "gpio21";
+ };
+};
+
+&pen_irq_l {
+ pinmux {
+ pins = "gpio104";
+ };
+
+ pinconf {
+ pins = "gpio104";
+ };
+};
+
+&trackpad_int_1v8_odl {
+ pinmux {
+ pins = "gpio58";
+ };
+
+ pinconf {
+ pins = "gpio58";
+ };
+};
+
+/* PINCTRL - board-specific pinctrl */
+
+&pm6150l_gpio {
+ gpio-line-names = "AP_SUSPEND_L", /* TODO: Remove if doesn't work */
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "";
+};
+
+&qup_uart3_default {
+ /* account for swapped Bluetooth TX/RX and RTS/CTS lines */
+
+ pinconf-cts {
+ pins = "gpio39";
+ };
+
+ pinconf-rts-tx {
+ pins = "gpio38", "gpio41";
+ };
+
+ pinconf-rx {
+ pins = "gpio40";
+ };
+};
+
+&tlmm {
+ gpio-line-names = "ESIM_MISO",
+ "ESIM_MOSI",
+ "ESIM_CLK",
+ "ESIM_CS_L",
+ "FP_TO_AP_IRQ_L",
+ "FP_RST_L",
+ "AP_TP_I2C_SDA",
+ "AP_TP_I2C_SCL",
+ "TS_RESET_L",
+ "TS_INT_L",
+ "FPMCU_BOOT0",
+ "EDP_BRIJ_IRQ",
+ "AP_EDP_BKLTEN",
+ "",
+ "EDP_BRIJ_EN",
+ "EDP_BRIJ_I2C_SDA",
+ "EDP_BRIJ_I2C_SCL",
+ "HUB_RST_L",
+ "PEN_RST_ODL",
+ "AP_RST_REQ",
+ "AP_SUSPEND_L",
+ "H1_AP_INT_ODL",
+ "FPMCU_SEL_OD",
+ "AMP_EN",
+ "",
+ "AP_SAR_SENSOR_SCL",
+ "AP_SAR_SENSOR_SDA",
+ "AP_SKU_ID2",
+ "HP_IRQ",
+ "AP_RAM_ID0",
+ "",
+ "AP_BRD_ID2",
+ "BRIJ_SUSPEND",
+ "AP_BRD_ID0",
+ "AP_EC_SPI_MISO",
+ "AP_EC_SPI_MOSI",
+ "AP_EC_SPI_CLK",
+ "AP_EC_SPI_CS_L",
+ "BT_UART_CTS",
+ "BT_UART_RTS",
+ "BT_UART_TXD",
+ "BT_UART_RXD",
+ /*
+ * AP_FLASH_WP_L is crossystem ABI. Schematics
+ * call it BIOS_FLASH_WP_L.
+ */
+ "AP_FLASH_WP_L",
+ "P_SENSOR_INT_L",
+ "UART_AP_TX_DBG_RX",
+ "UART_DBG_TX_AP_RX",
+ "HP_I2C_SDA",
+ "HP_I2C_SCL",
+ "FORCED_USB_BOOT",
+ "AMP_BCLK",
+ "AMP_LRCLK",
+ "AMP_DIN",
+ "PEN_PDCT_L",
+ "HP_BCLK",
+ "HP_LRCLK",
+ "HP_DOUT",
+ "HP_DIN",
+ "HP_MCLK",
+ "TRACKPAD_INT_1V8_ODL",
+ "AP_H1_SPI_MISO",
+ "AP_H1_SPI_MOSI",
+ "AP_H1_SPI_CLK",
+ "AP_H1_SPI_CS_L",
+ "AP_SPI_CLK",
+ "AP_SPI_MOSI",
+ "AP_SPI_MISO",
+ "",
+ "",
+ "AP_SPI_CS0_L",
+ "SD_CD_OD",
+ "RFFE6_CLK",
+ "RFFE6_DATA",
+ "",
+ "WLAN_SW_CTRL",
+ "BOOT_CONFIG_0",
+ "UIM2_DATA",
+ "UIM2_CLK",
+ "UIM2_RST",
+ "UIM2_PRESENT",
+ "UIM1_DATA",
+ "UIM1_CLK",
+ "UIM1_RST",
+ "",
+ "EN_PP3300_CODEC",
+ "EN_PP3300_HUB",
+ "WMSS_RESET_L",
+ "AP_SPI_FP_MISO",
+ "AP_SPI_FP_MOSI",
+ "AP_SPI_FP_CLK",
+ "AP_SPI_FP_CS_L",
+ "AP_SKU_ID1",
+ "AP_RAM_ID1",
+ "RFFE4_CLK",
+ "AP_BRD_ID1",
+ "AP_EC_INT_L",
+ "SDM_GRFC_3/BOOT_CONFIG_1",
+ "QLINK_REQ",
+ "QLINK_EN",
+ "SDM_GRFC_2/BOOT_CONFIG_4",
+ "PA_INDICATOR/BOOT_CONFIG_2",
+ "SDM_GRFC_1",
+ "RFFE3_DATA",
+ "RFFE3_CLK",
+ "RFFE4_DATA",
+ "PEN_IRQ_L",
+ "AP_SKU_ID0",
+ "EN_PP3300_DX_EDP",
+ "SDM_GRFC_5/BOOT_CONFIG_3",
+ "WCI2_LTE_COEX_TXD",
+ "WCI2_LTE_COEX_RXD",
+ "RFFE2_DATA",
+ "RFFE2_CLK",
+ "RFFE1_DATA",
+ "RFFE1_CLK",
+ "FORCED_USB_BOOT_POL",
+ "AP_TS_PEN_I2C_SDA",
+ "AP_TS_PEN_I2C_SCL",
+ "DP_HOT_PLUG_DET",
+ "EC_IN_RW_ODL";
+};
+
+&uart3 {
+ cts-rts-swap;
+ rx-tx-swap;
+};
--
2.32.0.93.g670b81a890-goog