| From a17fe09df51ee3884b076b32abbafea7475ccdde Mon Sep 17 00:00:00 2001 |
| From: V Sujith Kumar Reddy <vsujithk@codeaurora.org> |
| Date: Mon, 28 Sep 2020 15:19:04 +0530 |
| Subject: [PATCH] BACKPORT: FROMLIST: arm64: dts: qcom: sc7180: Update lpass |
| cpu node for audio over dp |
| |
| Updaate lpass dts node with HDMI reg, interrupt and iommu |
| for supporting audio over dp. |
| |
| BUG=b:147399356 |
| TEST=check DP audio on lazor with patch series |
| |
| Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> |
| Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org> |
| (am from https://patchwork.kernel.org/patch/11803283/) |
| |
| conflict: |
| Fix order of include. |
| |
| Change-Id: Ib418d977c1e13dd749f1c9a6d28655f5ff7dec60 |
| Signed-off-by: Cheng-Yi Chiang <cychiang@chromium.org> |
| Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2455636 |
| Reviewed-by: Douglas Anderson <dianders@chromium.org> |
| Signed-off-by: Stephen Boyd <swboyd@chromium.org> |
| --- |
| arch/arm64/boot/dts/qcom/sc7180.dtsi | 23 ++++++++++++++--------- |
| 1 file changed, 14 insertions(+), 9 deletions(-) |
| |
| diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi |
| index 889d04d4b201..4255b553ea4b 100644 |
| --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi |
| +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi |
| @@ -20,6 +20,7 @@ |
| #include <dt-bindings/reset/qcom,sdm845-aoss.h> |
| #include <dt-bindings/reset/qcom,sdm845-pdc.h> |
| #include <dt-bindings/soc/qcom,rpmh-rsc.h> |
| +#include <dt-bindings/sound/sc7180-lpass.h> |
| #include <dt-bindings/thermal/thermal.h> |
| |
| / { |
| @@ -3565,17 +3566,21 @@ lpasscc: clock-controller@62d00000 { |
| #power-domain-cells = <1>; |
| }; |
| |
| - lpass_cpu: lpass@62f00000 { |
| + lpass_cpu: lpass@62d87000 { |
| compatible = "qcom,sc7180-lpass-cpu"; |
| |
| - reg = <0 0x62f00000 0 0x29000>; |
| - reg-names = "lpass-lpaif"; |
| + reg = <0 0x62d87000 0 0x68000>, <0 0x62f00000 0 0x29000>; |
| + reg-names = "lpass-hdmiif", "lpass-lpaif"; |
| |
| iommus = <&apps_smmu 0x1020 0>, |
| - <&apps_smmu 0x1021 0>; |
| + <&apps_smmu 0x1021 0>, |
| + <&apps_smmu 0x1032 0>; |
| + |
| |
| power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>; |
| |
| + status = "disabled"; |
| + |
| clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>, |
| <&lpasscc LPASS_AUDIO_CORE_CORE_CLK>, |
| <&lpasscc LPASS_AUDIO_CORE_EXT_MCLK0_CLK>, |
| @@ -3584,16 +3589,16 @@ lpass_cpu: lpass@62f00000 { |
| <&lpasscc LPASS_AUDIO_CORE_LPAIF_SEC_IBIT_CLK>; |
| |
| clock-names = "pcnoc-sway-clk", "audio-core", |
| - "mclk0", "pcnoc-mport-clk", |
| - "mi2s-bit-clk0", "mi2s-bit-clk1"; |
| - |
| + "mclk0", "pcnoc-mport-clk", |
| + "mi2s-bit-clk0", "mi2s-bit-clk1"; |
| |
| #sound-dai-cells = <1>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| - interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; |
| - interrupt-names = "lpass-irq-lpaif"; |
| + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; |
| + interrupt-names = "lpass-irq-lpaif", "lpass-irq-hdmi"; |
| }; |
| |
| lpass_hm: clock-controller@63000000 { |
| -- |
| 2.31.1.607.g51e8a6a459-goog |
| |