| From 95be4cfd3e6b2ff3a24e08b2fde03c7aeab010ae Mon Sep 17 00:00:00 2001 |
| From: Wojciech Macek <wmacek@google.com> |
| Date: Mon, 13 May 2024 10:55:11 +0000 |
| Subject: [PATCH] CHROMIUM: mt8195: port legacy soc_max DTS bindings |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| Upstream bindings do not include: |
| - sustainable-power value, |
| - passive trip point at 68 degC. |
| |
| Both above are required for Cherry as using upstream version of |
| DTS causes severe performace degradation. |
| |
| Port legacy bindings from kernel 5.10. |
| |
| This patch shall be removed once mainline kernel supports |
| all required features. |
| |
| UPSTREAM-TASK=b:339741475 |
| BUG=b:337997758 |
| TEST=webGL & confirm soc_max exists in /sys |
| |
| Change-Id: I65c7fd934813bb6e0f7e7079f85047854bfd5ef4 |
| Signed-off-by: Wojciech Macek <wmacek@google.com> |
| Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/5528010 |
| Commit-Queue: Łukasz Majczak <lmajczak@google.com> |
| Reviewed-by: Łukasz Majczak <lmajczak@google.com> |
| --- |
| arch/arm64/boot/dts/mediatek/mt8195.dtsi | 445 ++++++++--------------- |
| 1 file changed, 150 insertions(+), 295 deletions(-) |
| |
| diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi |
| index 758a89319acec6e6b37c8af8c8e9b1801567c88f..2d1693594d88f7e63f8fac491e7b4017c70f85d9 100644 |
| --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi |
| +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi |
| @@ -1117,15 +1117,19 @@ spi0: spi@1100a000 { |
| status = "disabled"; |
| }; |
| |
| - lvts_ap: thermal-sensor@1100b000 { |
| - compatible = "mediatek,mt8195-lvts-ap"; |
| - reg = <0 0x1100b000 0 0xc00>; |
| - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>; |
| + lvts: lvts@1100b000 { |
| + compatible = "mediatek,mt8195-lvts"; |
| + #thermal-sensor-cells = <1>; |
| + reg = <0 0x1100b000 0 0x1000>, |
| + <0 0x11278000 0 0x1000>; |
| + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>, |
| + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>; |
| clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; |
| - resets = <&infracfg_ao MT8195_INFRA_RST0_THERM_CTRL_SWRST>; |
| + clock-names = "lvts_clk"; |
| + resets = <&infracfg_ao 1>, |
| + <&infracfg_ao 2>; |
| nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; |
| - nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; |
| - #thermal-sensor-cells = <1>; |
| + nvmem-cell-names = "e_data1","e_data2"; |
| }; |
| |
| svs: svs@1100bc00 { |
| @@ -1426,17 +1430,6 @@ mmc2: mmc@11250000 { |
| status = "disabled"; |
| }; |
| |
| - lvts_mcu: thermal-sensor@11278000 { |
| - compatible = "mediatek,mt8195-lvts-mcu"; |
| - reg = <0 0x11278000 0 0x1000>; |
| - interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>; |
| - clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; |
| - resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; |
| - nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; |
| - nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; |
| - #thermal-sensor-cells = <1>; |
| - }; |
| - |
| xhci1: usb@11290000 { |
| compatible = "mediatek,mt8195-xhci", |
| "mediatek,mtk-xhci"; |
| @@ -2023,7 +2016,7 @@ power_model@0 { |
| static-coefficient = <162868>; |
| dynamic-coefficient = <2649>; |
| ts = <(-199560) 37873 (-665) 9>; |
| - thermal-zone = "gpu0-thermal"; |
| + thermal-zone = "soc_max"; |
| }; |
| power_model@1 { |
| compatible = "arm,mali-tnax-power-model"; |
| @@ -3613,419 +3606,281 @@ dp_tx: dp-tx@1c600000 { |
| }; |
| |
| thermal_zones: thermal-zones { |
| - cpu0-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; |
| + soc_max { |
| + polling-delay = <1000>; /* milliseconds */ |
| + polling-delay-passive = <100>; /* milliseconds */ |
| + thermal-sensors = <&lvts 0>; |
| + sustainable-power = <4000>; |
| |
| trips { |
| - cpu0_alert: trip-alert { |
| - temperature = <85000>; |
| + threshold: trip-point@0 { |
| + temperature = <68000>; |
| hysteresis = <2000>; |
| type = "passive"; |
| }; |
| |
| - cpu0_crit: trip-crit { |
| - temperature = <100000>; |
| + target: target@1 { |
| + temperature = <90000>; |
| + hysteresis = <2000>; |
| + type = "passive"; |
| + }; |
| + |
| + soc_max_crit: soc_max_crit@0 { |
| + temperature = <115000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| - |
| cooling-maps { |
| map0 { |
| - trip = <&cpu0_alert>; |
| - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| - }; |
| - }; |
| - }; |
| - |
| - cpu1-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU1>; |
| + trip = <&target>; |
| + cooling-device = <&cpu0 |
| + THERMAL_NO_LIMIT |
| + THERMAL_NO_LIMIT>, |
| + <&cpu1 |
| + THERMAL_NO_LIMIT |
| + THERMAL_NO_LIMIT>, |
| + <&cpu2 |
| + THERMAL_NO_LIMIT |
| + THERMAL_NO_LIMIT>, |
| + <&cpu3 |
| + THERMAL_NO_LIMIT |
| + THERMAL_NO_LIMIT>; |
| + contribution = <3072>; |
| + }; |
| + map1 { |
| + trip = <&target>; |
| + cooling-device = <&cpu4 |
| + THERMAL_NO_LIMIT |
| + THERMAL_NO_LIMIT>, |
| + <&cpu5 |
| + THERMAL_NO_LIMIT |
| + THERMAL_NO_LIMIT>, |
| + <&cpu6 |
| + THERMAL_NO_LIMIT |
| + THERMAL_NO_LIMIT>, |
| + <&cpu7 |
| + THERMAL_NO_LIMIT |
| + THERMAL_NO_LIMIT>; |
| + contribution = <1024>; |
| + }; |
| + }; |
| + }; |
| + cpu_big1 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 1>; |
| |
| trips { |
| - cpu1_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - cpu1_crit: trip-crit { |
| + cpu_big1_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| - |
| - cooling-maps { |
| - map0 { |
| - trip = <&cpu1_alert>; |
| - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| - }; |
| - }; |
| }; |
| - |
| - cpu2-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU2>; |
| + cpu_big2 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 2>; |
| |
| trips { |
| - cpu2_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - cpu2_crit: trip-crit { |
| + cpu_big2_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| - |
| - cooling-maps { |
| - map0 { |
| - trip = <&cpu2_alert>; |
| - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| - }; |
| - }; |
| }; |
| - |
| - cpu3-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU3>; |
| + cpu_big3 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 3>; |
| |
| trips { |
| - cpu3_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - cpu3_crit: trip-crit { |
| + cpu_big3_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| - |
| - cooling-maps { |
| - map0 { |
| - trip = <&cpu3_alert>; |
| - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| - }; |
| - }; |
| }; |
| - |
| - cpu4-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU0>; |
| + cpu_big4 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 4>; |
| |
| trips { |
| - cpu4_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - cpu4_crit: trip-crit { |
| + cpu_big4_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| - |
| - cooling-maps { |
| - map0 { |
| - trip = <&cpu4_alert>; |
| - cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| - }; |
| - }; |
| }; |
| - |
| - cpu5-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU1>; |
| + cpu_little1{ |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 5>; |
| |
| trips { |
| - cpu5_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - cpu5_crit: trip-crit { |
| + cpu_little1_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| - |
| - cooling-maps { |
| - map0 { |
| - trip = <&cpu5_alert>; |
| - cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| - }; |
| - }; |
| }; |
| - |
| - cpu6-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU2>; |
| + cpu_little2 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 6>; |
| |
| trips { |
| - cpu6_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - cpu6_crit: trip-crit { |
| + cpu_little2_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| - |
| - cooling-maps { |
| - map0 { |
| - trip = <&cpu6_alert>; |
| - cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| - }; |
| - }; |
| }; |
| - |
| - cpu7-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU3>; |
| + cpu_little3 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 7>; |
| |
| trips { |
| - cpu7_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - cpu7_crit: trip-crit { |
| + cpu_little3_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| - |
| - cooling-maps { |
| - map0 { |
| - trip = <&cpu7_alert>; |
| - cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| - <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| - }; |
| - }; |
| }; |
| - |
| - vpu0-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_ap MT8195_AP_VPU0>; |
| + cpu_little4 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 8>; |
| |
| trips { |
| - vpu0_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - vpu0_crit: trip-crit { |
| + cpu_little4_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| - |
| - vpu1-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_ap MT8195_AP_VPU1>; |
| + vpu1 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 9>; |
| |
| trips { |
| - vpu1_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - vpu1_crit: trip-crit { |
| + cpu_vpu1_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| - |
| - gpu-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_ap MT8195_AP_GPU0>; |
| + vpu2 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 10>; |
| |
| trips { |
| - gpu0_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - gpu0_crit: trip-crit { |
| + cpu_vpu2_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| - |
| - gpu1-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_ap MT8195_AP_GPU1>; |
| + gpu1 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 11>; |
| |
| trips { |
| - gpu1_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - gpu1_crit: trip-crit { |
| + cpu_gpu1_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| - |
| - vdec-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_ap MT8195_AP_VDEC>; |
| + gpu2 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 12>; |
| |
| trips { |
| - vdec_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - vdec_crit: trip-crit { |
| + cpu_gpu2_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| - |
| - img-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_ap MT8195_AP_IMG>; |
| + vdec { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 13>; |
| |
| trips { |
| - img_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - img_crit: trip-crit { |
| + cpu_vdec_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| - |
| - infra-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_ap MT8195_AP_INFRA>; |
| + img { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 14>; |
| |
| trips { |
| - infra_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - infra_crit: trip-crit { |
| + cpu_img_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| - |
| - cam0-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_ap MT8195_AP_CAM0>; |
| + infra { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 15>; |
| |
| trips { |
| - cam0_alert: trip-alert { |
| - temperature = <85000>; |
| - hysteresis = <2000>; |
| - type = "passive"; |
| - }; |
| - |
| - cam0_crit: trip-crit { |
| + cpu_infra_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| - |
| - cam1-thermal { |
| - polling-delay = <1000>; |
| - polling-delay-passive = <250>; |
| - thermal-sensors = <&lvts_ap MT8195_AP_CAM1>; |
| + cam1 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 16>; |
| |
| trips { |
| - cam1_alert: trip-alert { |
| - temperature = <85000>; |
| + cpu_cam1_crit: trip-crit { |
| + temperature = <100000>; |
| hysteresis = <2000>; |
| - type = "passive"; |
| + type = "critical"; |
| }; |
| + }; |
| + }; |
| + cam2 { |
| + polling-delay = <0>; /* milliseconds */ |
| + polling-delay-passive = <0>; /* milliseconds */ |
| + thermal-sensors = <&lvts 17>; |
| |
| - cam1_crit: trip-crit { |
| + trips { |
| + cpu_cam2_crit: trip-crit { |
| temperature = <100000>; |
| hysteresis = <2000>; |
| type = "critical"; |
| -- |
| 2.46.0.rc2.264.g509ed76dc8-goog |
| |
