blob: f2aef768082765b5d5f356108dd771a7ae33465d [file] [log] [blame]
From fe06ab32ef36f2150381903e025416312a421359 Mon Sep 17 00:00:00 2001
From: Rajendra Nayak <rnayak@codeaurora.org>
Date: Thu, 15 Jul 2021 12:44:14 +0530
Subject: [PATCH] CHROMIUM: arm64: dts: sc7280: Add all details needed for EAS
enablement
Add capacity-dmips and dynamic-power-coefficient values for
the sc7280 platform. Both capacity-dmips and dynamic-power-coefficient
values are scaled and hence can't be sent upstream.
BUG=b:177048532,b:200605792
TEST=boot on senor and make sure energy models are registered
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Change-Id: I5df84176062ebd8d083d52fbcd9bf5ce6d53f8bd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/3120909
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Commit-Queue: Douglas Anderson <dianders@chromium.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 66f1eb83cca7e73b34a341e1ba21fc1419538caa..3b82661d84f4905e972d894cdee790aeb34579f7 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -174,6 +174,8 @@ CPU0: cpu@0 {
enable-method = "psci";
power-domains = <&CPU_PD0>;
power-domain-names = "psci";
+ capacity-dmips-mhz = <539>;
+ dynamic-power-coefficient = <100>;
next-level-cache = <&L2_0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
@@ -201,6 +203,8 @@ CPU1: cpu@100 {
enable-method = "psci";
power-domains = <&CPU_PD1>;
power-domain-names = "psci";
+ capacity-dmips-mhz = <539>;
+ dynamic-power-coefficient = <100>;
next-level-cache = <&L2_100>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
@@ -223,6 +227,8 @@ CPU2: cpu@200 {
enable-method = "psci";
power-domains = <&CPU_PD2>;
power-domain-names = "psci";
+ capacity-dmips-mhz = <539>;
+ dynamic-power-coefficient = <100>;
next-level-cache = <&L2_200>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
@@ -245,6 +251,8 @@ CPU3: cpu@300 {
enable-method = "psci";
power-domains = <&CPU_PD3>;
power-domain-names = "psci";
+ capacity-dmips-mhz = <539>;
+ dynamic-power-coefficient = <100>;
next-level-cache = <&L2_300>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
@@ -267,6 +275,8 @@ CPU4: cpu@400 {
enable-method = "psci";
power-domains = <&CPU_PD4>;
power-domain-names = "psci";
+ capacity-dmips-mhz = <1024>;
+ dynamic-power-coefficient = <520>;
next-level-cache = <&L2_400>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
@@ -289,6 +299,8 @@ CPU5: cpu@500 {
enable-method = "psci";
power-domains = <&CPU_PD5>;
power-domain-names = "psci";
+ capacity-dmips-mhz = <1024>;
+ dynamic-power-coefficient = <520>;
next-level-cache = <&L2_500>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
@@ -311,6 +323,8 @@ CPU6: cpu@600 {
enable-method = "psci";
power-domains = <&CPU_PD6>;
power-domain-names = "psci";
+ capacity-dmips-mhz = <1024>;
+ dynamic-power-coefficient = <520>;
next-level-cache = <&L2_600>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
@@ -333,6 +347,8 @@ CPU7: cpu@700 {
enable-method = "psci";
power-domains = <&CPU_PD7>;
power-domain-names = "psci";
+ capacity-dmips-mhz = <1024>;
+ dynamic-power-coefficient = <520>;
next-level-cache = <&L2_700>;
operating-points-v2 = <&cpu7_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
--
2.43.0.472.g3155946c3a-goog