| From f3f091ca46a396603cb0f1804a3c87f6296c6d58 Mon Sep 17 00:00:00 2001 |
| From: Frederic Chen <frederic.chen@mediatek.com> |
| Date: Wed, 11 Sep 2019 17:33:26 +0800 |
| Subject: [PATCH] BACKPORT: FROMLIST: dts: arm64: mt8183: Add DIP nodes |
| |
| This patch adds nodes for Digital Image Processing (DIP). DIP is |
| embedded in Mediatek SoCs and works with the co-processor to |
| adjust image content according to tuning input data. It also |
| provides image format conversion, resizing, and rotation |
| features. |
| |
| (am from https://patchwork.kernel.org/patch/11138503/) |
| |
| Signed-off-by: Frederic Chen <frederic.chen@mediatek.com> |
| |
| cherry-pick from v4.19 and change the title name |
| |
| BUG=b:177195002 |
| TEST=build pass |
| |
| Change-Id: I25457d399328646854fa2b5287052355b511bd14 |
| Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> |
| Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> |
| Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2831206 |
| |
| [rebase61(tzungbi): |
| Squashed: |
| FIXUP: BACKPORT: FROMLIST: dts: arm64: mt8183: Add DIP nodes |
| ] |
| Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> |
| --- |
| arch/arm64/boot/dts/mediatek/mt8183.dtsi | 17 ++++++++++++++++- |
| 1 file changed, 16 insertions(+), 1 deletion(-) |
| |
| diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi |
| index e7651f1dd68d2fb1b73286b6bed0c7c4a8515b15..18b9386ba9fb9e8ffc9c834872bf6a1ba6dda67b 100644 |
| --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi |
| +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi |
| @@ -1660,7 +1660,7 @@ mmsys: syscon@14000000 { |
| mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; |
| }; |
| |
| - dma-controller0@14001000 { |
| + mdp3_rdma0: mdp3-rdma0@14001000 { |
| compatible = "mediatek,mt8183-mdp3-rdma"; |
| reg = <0 0x14001000 0 0x1000>; |
| mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; |
| @@ -1874,6 +1874,21 @@ imgsys: syscon@15020000 { |
| #clock-cells = <1>; |
| }; |
| |
| + dip: dip@15022000 { |
| + compatible = "mediatek,mt8183-dip"; |
| + mediatek,larb = <&larb5>; |
| + mediatek,mdp3 = <&mdp3_rdma0>; |
| + mediatek,scp = <&scp>; |
| + iommus = <&iommu M4U_PORT_CAM_IMGI>; |
| + reg = <0 0x15022000 0 0x6000>; |
| + interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_LOW>; |
| + clocks = <&imgsys CLK_IMG_LARB5>, |
| + <&imgsys CLK_IMG_DIP>; |
| + clock-names = "larb5", |
| + "dip"; |
| + power-domains = <&spm MT8183_POWER_DOMAIN_ISP>; |
| + }; |
| + |
| larb5: larb@15021000 { |
| compatible = "mediatek,mt8183-smi-larb"; |
| reg = <0 0x15021000 0 0x1000>; |
| -- |
| 2.43.0.429.g432eaa2c6b-goog |
| |
