e3a7a88017a08daeb7e751971f429e5a0900e2c51305b1e3d76b109d.patch

From 2459cf82b05f27a0245162bfd2afcf8203248a7d Mon Sep 17 00:00:00 2001
From: Rob Clark <robdclark@chromium.org>
Date: Fri, 23 Oct 2020 14:00:57 -0700
Subject: [PATCH] CHROMIUM: HACK: drm/msm/dpu: Give each CRTC a dedicated
 cursor and primary (except for coachz)

Most of the issues that caused us to pin the planes to a single CRTC are
fixed, except for b/168868719.  We are pushing to get hw overlays
enabled on coachz, so re-work the previous hack to let us re-enable hw-
overlays on a per-board basis to avoid disrupting shipping devices.
Once the remaining bug has been fixed, and we have some confidence that
there are no other bugs that we missed, we can revert this patch.

BUG=b:176990056, b:187095776
TEST=verify primary/cursor planes are pinned to one CRTC except for
coachz

Signed-off-by: Rob Clark <robdclark@chromium.org>
Change-Id: Ib76eef92d195c08d470b740365dc558efdc2fac5
Reviewed-on: https: //chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2773884
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Commit-Queue: Stephen Boyd <swboyd@chromium.org>
(cherry picked from commit 30aef5779b6108baaea00750064338bf0ed145c2)
Signed-off-by: Matt Turner <msturner@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/3564538

[rebase61(tzungbi):
    Squashed:
	FIXUP: CHROMIUM: HACK: drm/msm/dpu: Give each CRTC a dedicated cursor and primary (except for coachz)
]
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>

Change-Id: Iae2f9f264ddfb16a272745525f7b18bce7afbefa
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c   | 23 +++++++++++++++++++----
 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c |  2 +-
 2 files changed, 20 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 723cc1d821431046cde8a1bf38ee553643600d10..2735a458eb14e95f415af4e4915c762afa8a18f6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -715,6 +715,9 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms)
 	struct drm_crtc *crtc;
 	struct drm_encoder *encoder;
 	unsigned int num_encoders;
+	unsigned cursor_idx = 0;
+	unsigned primary_idx = 0;
+	bool pin_overlays;
 
 	struct msm_drm_private *priv;
 	const struct dpu_mdss_cfg *catalog;
@@ -725,6 +728,8 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms)
 	priv = dev->dev_private;
 	catalog = dpu_kms->catalog;
 
+	pin_overlays = !of_property_read_bool(dpu_kms->pdev->dev.of_node, "chromium-enable-overlays");
+
 	/*
 	 * Create encoder and query display drivers to create
 	 * bridges and connectors
@@ -742,21 +747,31 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms)
 	/* Create the planes, keeping track of one primary/cursor per crtc */
 	for (i = 0; i < catalog->sspp_count; i++) {
 		enum drm_plane_type type;
+		unsigned possible_crtcs;
 
 		if ((catalog->sspp[i].features & BIT(DPU_SSPP_CURSOR))
-			&& cursor_planes_idx < max_crtc_count)
+			&& cursor_planes_idx < max_crtc_count) {
 			type = DRM_PLANE_TYPE_CURSOR;
-		else if (primary_planes_idx < max_crtc_count)
+			possible_crtcs = BIT(cursor_idx);
+			cursor_idx++;
+		} else if (primary_planes_idx < max_crtc_count) {
 			type = DRM_PLANE_TYPE_PRIMARY;
-		else
+			possible_crtcs = BIT(primary_idx);
+			primary_idx++;
+		} else {
 			type = DRM_PLANE_TYPE_OVERLAY;
+			possible_crtcs = (1UL << max_crtc_count) - 1;
+		}
 
 		DPU_DEBUG("Create plane type %d with features %lx (cur %lx)\n",
 			  type, catalog->sspp[i].features,
 			  catalog->sspp[i].features & BIT(DPU_SSPP_CURSOR));
 
+		if (!pin_overlays)
+			possible_crtcs = (1UL << max_crtc_count) - 1;
+
 		plane = dpu_plane_init(dev, catalog->sspp[i].id, type,
-				       (1UL << max_crtc_count) - 1);
+				       possible_crtcs);
 		if (IS_ERR(plane)) {
 			DPU_ERROR("dpu_plane_init failed\n");
 			ret = PTR_ERR(plane);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index ff975ad51145658314abb3f1356e3fbfb11b91d2..6aa522ea246fe6106ed002cd5c225f3cc8402e5b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -1394,7 +1394,7 @@ struct drm_plane *dpu_plane_init(struct drm_device *dev,
 	num_formats = pipe_hw->cap->sblk->num_formats;
 
 	pdpu = drmm_universal_plane_alloc(dev, struct dpu_plane, base,
-				0xff, &dpu_plane_funcs,
+				possible_crtcs, &dpu_plane_funcs,
 				format_list, num_formats,
 				supported_format_modifiers, type, NULL);
 	if (IS_ERR(pdpu))
-- 
2.43.0.429.g432eaa2c6b-goog