Intel BT 7265: optimize settling timer in wakeup flow.
This is firmware patch for Intel Bluetooth 7265 (StP D1)
StP D1 FW Patch Version: 0x39(57)
This patch contains the following fixes on previous 0x38(56):
- Relax the oscillator settling timer configuration (PLL Settling time: 330us to 1ms and OSC Settling time: 5ms to 7ms)
- Optimize LPM/ULPM threshold logic (LPM:18 to 24 slots, ULPM: 24 to 30 slots)
- Optimize patches in BC transaction interrupt handlers
BUG=b:64035404
TEST=the last bytes output by the command "hcitool cmd 3f 05" change:
- ......... 50 19 14 0F 38
+ ......... 50 19 14 0F 39
TEST=P0 and P1 sanity test cases and all are passed on Eve
Change-Id: Icca1bed0b2b8e0e473ce97524b55010dc29788ff
Signed-off-by: Amit K Bag <amit.k.bag@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/1332487
Reviewed-by: Dan Jaklich <djaklich@chromium.org>
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Reviewed-by: Andrew de los Reyes <adlr@chromium.org>
Commit-Queue: Dan Jaklich <djaklich@chromium.org>
Commit-Queue: Andrew de los Reyes <adlr@chromium.org>
Tested-by: Dan Jaklich <djaklich@chromium.org>
Tested-by: Andrew de los Reyes <adlr@chromium.org>
Trybot-Ready: Andrew de los Reyes <adlr@chromium.org>
diff --git a/WHENCE b/WHENCE
index ae0fa96..d0d66fe 100644
--- a/WHENCE
+++ b/WHENCE
@@ -2443,7 +2443,7 @@
File: intel/ibt-hw-37.8.10-fw-1.10.3.11.e.bseq
Version: BT_StonePeak_D0_REL_50_0002
File: intel/ibt-hw-37.8.10-fw-22.50.19.14.f.bseq
-Version: BT_StonePeak_D1_REL_55_00001
+Version: BT_StonePeak_D1_REL_57_00001
File: intel/ibt-17-16-1.sfi
Version: BT_JeffersonPeak_B0_B0_REL0329
File: intel/ibt-17-16-1.ddc
diff --git a/intel/ibt-hw-37.8.10-fw-22.50.19.14.f.bseq b/intel/ibt-hw-37.8.10-fw-22.50.19.14.f.bseq
index 783aa23..b06bbd7 100644
--- a/intel/ibt-hw-37.8.10-fw-22.50.19.14.f.bseq
+++ b/intel/ibt-hw-37.8.10-fw-22.50.19.14.f.bseq
Binary files differ
