| #ifndef __ACPI_H |
| #define __ACPI_H |
| |
| #include "types.h" // u32 |
| |
| void acpi_bios_init(void); |
| u32 find_resume_vector(void); |
| |
| #define RSDP_SIGNATURE 0x2052545020445352LL // "RSD PTR " |
| |
| struct rsdp_descriptor { /* Root System Descriptor Pointer */ |
| u64 signature; /* ACPI signature, contains "RSD PTR " */ |
| u8 checksum; /* To make sum of struct == 0 */ |
| u8 oem_id [6]; /* OEM identification */ |
| u8 revision; /* Must be 0 for 1.0, 2 for 2.0 */ |
| u32 rsdt_physical_address; /* 32-bit physical address of RSDT */ |
| u32 length; /* XSDT Length in bytes including hdr */ |
| u64 xsdt_physical_address; /* 64-bit physical address of XSDT */ |
| u8 extended_checksum; /* Checksum of entire table */ |
| u8 reserved [3]; /* Reserved field must be 0 */ |
| }; |
| |
| extern struct rsdp_descriptor *RsdpAddr; |
| |
| /* Table structure from Linux kernel (the ACPI tables are under the |
| BSD license) */ |
| |
| #define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \ |
| u32 signature; /* ACPI signature (4 ASCII characters) */ \ |
| u32 length; /* Length of table, in bytes, including header */ \ |
| u8 revision; /* ACPI Specification minor version # */ \ |
| u8 checksum; /* To make sum of entire table == 0 */ \ |
| u8 oem_id [6]; /* OEM identification */ \ |
| u8 oem_table_id [8]; /* OEM table identification */ \ |
| u32 oem_revision; /* OEM revision number */ \ |
| u8 asl_compiler_id [4]; /* ASL compiler vendor ID */ \ |
| u32 asl_compiler_revision; /* ASL compiler revision number */ |
| |
| |
| /* |
| * ACPI 1.0 Fixed ACPI Description Table (FADT) |
| */ |
| #define FACP_SIGNATURE 0x50434146 // FACP |
| struct fadt_descriptor_rev1 |
| { |
| ACPI_TABLE_HEADER_DEF /* ACPI common table header */ |
| u32 firmware_ctrl; /* Physical address of FACS */ |
| u32 dsdt; /* Physical address of DSDT */ |
| u8 model; /* System Interrupt Model */ |
| u8 reserved1; /* Reserved */ |
| u16 sci_int; /* System vector of SCI interrupt */ |
| u32 smi_cmd; /* Port address of SMI command port */ |
| u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */ |
| u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */ |
| u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */ |
| u8 reserved2; /* Reserved - must be zero */ |
| u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */ |
| u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */ |
| u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ |
| u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ |
| u32 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */ |
| u32 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */ |
| u32 gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */ |
| u32 gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */ |
| u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */ |
| u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */ |
| u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */ |
| u8 pm_tmr_len; /* Byte Length of ports at pm_tm_blk */ |
| u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ |
| u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ |
| u8 gpe1_base; /* Offset in gpe model where gpe1 events start */ |
| u8 reserved3; /* Reserved */ |
| u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */ |
| u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */ |
| u16 flush_size; /* Size of area read to flush caches */ |
| u16 flush_stride; /* Stride used in flushing caches */ |
| u8 duty_offset; /* Bit location of duty cycle field in p_cnt reg */ |
| u8 duty_width; /* Bit width of duty cycle field in p_cnt reg */ |
| u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */ |
| u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */ |
| u8 century; /* Index to century in RTC CMOS RAM */ |
| u8 reserved4; /* Reserved */ |
| u8 reserved4a; /* Reserved */ |
| u8 reserved4b; /* Reserved */ |
| #if 0 |
| u32 wb_invd : 1; /* The wbinvd instruction works properly */ |
| u32 wb_invd_flush : 1; /* The wbinvd flushes but does not invalidate */ |
| u32 proc_c1 : 1; /* All processors support C1 state */ |
| u32 plvl2_up : 1; /* C2 state works on MP system */ |
| u32 pwr_button : 1; /* Power button is handled as a generic feature */ |
| u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */ |
| u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */ |
| u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */ |
| u32 tmr_val_ext : 1; /* The tmr_val width is 32 bits (0 = 24 bits) */ |
| u32 reserved5 : 23; /* Reserved - must be zero */ |
| #else |
| u32 flags; |
| #endif |
| } PACKED; |
| |
| #endif // acpi.h |
