| /* |
| * NOTE: Autogenerated file using genpinctrl.py |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <dt-bindings/pinctrl/stm32-pinctrl.h> |
| |
| / { |
| soc { |
| pinctrl: pin-controller@48000000 { |
| |
| /* ADC_IN / ADC_INN / ADC_INP */ |
| |
| adc1_in1_pa0: adc1_in1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, ANALOG)>; |
| }; |
| |
| adc1_in2_pa1: adc1_in2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, ANALOG)>; |
| }; |
| |
| adc1_in3_pa2: adc1_in3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, ANALOG)>; |
| }; |
| |
| adc1_in4_pa3: adc1_in4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, ANALOG)>; |
| }; |
| |
| adc1_in5_pa4: adc1_in5_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| adc1_in10_pa6: adc1_in10_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, ANALOG)>; |
| }; |
| |
| adc1_in15_pa7: adc1_in15_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, ANALOG)>; |
| }; |
| |
| adc1_in11_pb0: adc1_in11_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, ANALOG)>; |
| }; |
| |
| adc1_in12_pb1: adc1_in12_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, ANALOG)>; |
| }; |
| |
| adc1_in14_pb11: adc1_in14_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, ANALOG)>; |
| }; |
| |
| adc1_in13_pb13: adc1_in13_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, ANALOG)>; |
| }; |
| |
| /* DAC_OUT */ |
| |
| dac_out1_pa4: dac_out1_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| /* I2C_SCL */ |
| |
| i2c1_scl_pa15: i2c1_scl_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_scl_pb6: i2c1_scl_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_scl_pb8: i2c1_scl_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pa9: i2c2_scl_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pf1: i2c2_scl_pf1 { |
| pinmux = <STM32_PINMUX('F', 1, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_scl_pa8: i2c3_scl_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF3)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* I2C_SDA */ |
| |
| i2c1_sda_pa14: i2c1_sda_pa14 { |
| pinmux = <STM32_PINMUX('A', 14, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_sda_pb7: i2c1_sda_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_sda_pb9: i2c1_sda_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_sda_pa10: i2c2_sda_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_sda_pf0: i2c2_sda_pf0 { |
| pinmux = <STM32_PINMUX('F', 0, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_sda_pb5: i2c3_sda_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* I2S_CK */ |
| |
| i2s2_ck_pb13: i2s2_ck_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s2_ck_pf1: i2s2_ck_pf1 { |
| pinmux = <STM32_PINMUX('F', 1, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s3_ck_pb3: i2s3_ck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF6)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* I2S_SD */ |
| |
| i2s2_sd_pa11: i2s2_sd_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF5)>; |
| }; |
| |
| i2s2_sd_pb15: i2s2_sd_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF5)>; |
| }; |
| |
| i2s3_sd_pb5: i2s3_sd_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF6)>; |
| }; |
| |
| /* I2S_WS */ |
| |
| i2s2_ws_pb12: i2s2_ws_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF5)>; |
| }; |
| |
| i2s2_ws_pf0: i2s2_ws_pf0 { |
| pinmux = <STM32_PINMUX('F', 0, AF5)>; |
| }; |
| |
| i2s3_ws_pa4: i2s3_ws_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF6)>; |
| }; |
| |
| i2s3_ws_pa15: i2s3_ws_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF6)>; |
| }; |
| |
| /* SPI_MISO */ |
| |
| spi2_miso_pa10: spi2_miso_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_miso_pb14: spi2_miso_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi3_miso_pb4: spi3_miso_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF6)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_MOSI */ |
| |
| spi2_mosi_pa11: spi2_mosi_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_mosi_pb15: spi2_mosi_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi3_mosi_pb5: spi3_mosi_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF6)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_NSS */ |
| |
| spi2_nss_pb12: spi2_nss_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pf0: spi2_nss_pf0 { |
| pinmux = <STM32_PINMUX('F', 0, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi3_nss_pa4: spi3_nss_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF6)>; |
| bias-pull-up; |
| }; |
| |
| spi3_nss_pa15: spi3_nss_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF6)>; |
| bias-pull-up; |
| }; |
| |
| /* SPI_SCK */ |
| |
| spi2_sck_pb13: spi2_sck_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pf1: spi2_sck_pf1 { |
| pinmux = <STM32_PINMUX('F', 1, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi3_sck_pb3: spi3_sck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF6)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* TIM_CH / TIM_CHN */ |
| |
| tim1_ch1n_pa7: tim1_ch1n_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF6)>; |
| }; |
| |
| tim1_ch1_pa8: tim1_ch1_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF6)>; |
| }; |
| |
| tim1_ch2_pa9: tim1_ch2_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF6)>; |
| }; |
| |
| tim1_ch3_pa10: tim1_ch3_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF6)>; |
| }; |
| |
| tim1_ch1n_pa11: tim1_ch1n_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF6)>; |
| }; |
| |
| tim1_ch4_pa11: tim1_ch4_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF11)>; |
| }; |
| |
| tim1_ch2n_pa12: tim1_ch2n_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF6)>; |
| }; |
| |
| tim1_ch2n_pb0: tim1_ch2n_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF6)>; |
| }; |
| |
| tim1_ch3n_pb1: tim1_ch3n_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF6)>; |
| }; |
| |
| tim1_ch1n_pb13: tim1_ch1n_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF6)>; |
| }; |
| |
| tim1_ch2n_pb14: tim1_ch2n_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF6)>; |
| }; |
| |
| tim1_ch3n_pb15: tim1_ch3n_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF4)>; |
| }; |
| |
| tim1_ch1n_pc13: tim1_ch1n_pc13 { |
| pinmux = <STM32_PINMUX('C', 13, AF4)>; |
| }; |
| |
| tim1_ch3n_pf0: tim1_ch3n_pf0 { |
| pinmux = <STM32_PINMUX('F', 0, AF6)>; |
| }; |
| |
| tim2_ch1_pa0: tim2_ch1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF1)>; |
| }; |
| |
| tim2_ch2_pa1: tim2_ch2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF1)>; |
| }; |
| |
| tim2_ch3_pa2: tim2_ch3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF1)>; |
| }; |
| |
| tim2_ch4_pa3: tim2_ch4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF1)>; |
| }; |
| |
| tim2_ch1_pa5: tim2_ch1_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF1)>; |
| }; |
| |
| tim2_ch3_pa9: tim2_ch3_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF10)>; |
| }; |
| |
| tim2_ch4_pa10: tim2_ch4_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF10)>; |
| }; |
| |
| tim2_ch1_pa15: tim2_ch1_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF1)>; |
| }; |
| |
| tim2_ch2_pb3: tim2_ch2_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF1)>; |
| }; |
| |
| tim2_ch3_pb10: tim2_ch3_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF1)>; |
| }; |
| |
| tim2_ch4_pb11: tim2_ch4_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF1)>; |
| }; |
| |
| tim15_ch1n_pa1: tim15_ch1n_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF9)>; |
| }; |
| |
| tim15_ch1_pa2: tim15_ch1_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF9)>; |
| }; |
| |
| tim15_ch2_pa3: tim15_ch2_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF9)>; |
| }; |
| |
| tim15_ch1_pb14: tim15_ch1_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF1)>; |
| }; |
| |
| tim15_ch1n_pb15: tim15_ch1n_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF2)>; |
| }; |
| |
| tim15_ch2_pb15: tim15_ch2_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF1)>; |
| }; |
| |
| tim16_ch1_pa6: tim16_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF1)>; |
| }; |
| |
| tim16_ch1_pa12: tim16_ch1_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF1)>; |
| }; |
| |
| tim16_ch1n_pa13: tim16_ch1n_pa13 { |
| pinmux = <STM32_PINMUX('A', 13, AF1)>; |
| }; |
| |
| tim16_ch1_pb4: tim16_ch1_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF1)>; |
| }; |
| |
| tim16_ch1n_pb6: tim16_ch1n_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF1)>; |
| }; |
| |
| tim16_ch1_pb8: tim16_ch1_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF1)>; |
| }; |
| |
| tim17_ch1_pa7: tim17_ch1_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF1)>; |
| }; |
| |
| tim17_ch1_pb5: tim17_ch1_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF10)>; |
| }; |
| |
| tim17_ch1n_pb7: tim17_ch1n_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF1)>; |
| }; |
| |
| tim17_ch1_pb9: tim17_ch1_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF1)>; |
| }; |
| |
| /* UART_CTS / USART_CTS / LPUART_CTS */ |
| |
| usart1_cts_pa11: usart1_cts_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_cts_pa0: usart2_cts_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pa13: usart3_cts_pa13 { |
| pinmux = <STM32_PINMUX('A', 13, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pb13: usart3_cts_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RTS / USART_RTS / LPUART_RTS */ |
| |
| usart1_rts_pa12: usart1_rts_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_rts_pa1: usart2_rts_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pb14: usart3_rts_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RX / USART_RX / LPUART_RX */ |
| |
| usart1_rx_pa10: usart1_rx_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF7)>; |
| }; |
| |
| usart1_rx_pb7: usart1_rx_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF7)>; |
| }; |
| |
| usart2_rx_pa3: usart2_rx_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF7)>; |
| }; |
| |
| usart2_rx_pa15: usart2_rx_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF7)>; |
| }; |
| |
| usart2_rx_pb4: usart2_rx_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF7)>; |
| }; |
| |
| usart3_rx_pb8: usart3_rx_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF7)>; |
| }; |
| |
| usart3_rx_pb11: usart3_rx_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF7)>; |
| }; |
| |
| /* UART_TX / USART_TX / LPUART_TX */ |
| |
| usart1_tx_pa9: usart1_tx_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pb6: usart1_tx_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pa2: usart2_tx_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pa14: usart2_tx_pa14 { |
| pinmux = <STM32_PINMUX('A', 14, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pb3: usart2_tx_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pb9: usart3_tx_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pb10: usart3_tx_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF7)>; |
| bias-pull-up; |
| }; |
| |
| }; |
| }; |
| }; |
