sim-fcvtas-xd-trace-arm64.h

// Copyright 2015, VIXL authors
// All rights reserved.
//
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// modification, are permitted provided that the following conditions are met:
//
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//     this list of conditions and the following disclaimer.
//   * Redistributions in binary form must reproduce the above copyright notice,
//     this list of conditions and the following disclaimer in the documentation
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//     specific prior written permission.
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// ---------------------------------------------------------------------
// This file is auto generated using tools/generate_simulator_traces.py.
//
// PLEASE DO NOT EDIT.
// ---------------------------------------------------------------------

#ifndef VIXL_SIM_FCVTAS_XD_TRACE_AARCH64_H_
#define VIXL_SIM_FCVTAS_XD_TRACE_AARCH64_H_

const int64_t kExpected_fcvtas_xd[] = {
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(2),
  INT64_C(10),
  INT64_C(9223372036854775807),
  INT64_C(9223372036854775807),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(9223372036854775807),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(2),
  -INT64_C(10),
  -INT64_C(9223372036854775807) - 1,
  -INT64_C(9223372036854775807) - 1,
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  -INT64_C(9223372036854775807) - 1,
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(9223372036854775807),
  INT64_C(0),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(1),
  INT64_C(9223372036854775807),
  INT64_C(9223372036854775807),
  INT64_C(9223372036854775807),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  -INT64_C(9223372036854775807) - 1,
  INT64_C(0),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(1),
  -INT64_C(9223372036854775807) - 1,
  -INT64_C(9223372036854775807) - 1,
  -INT64_C(9223372036854775807) - 1,
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(0),
  INT64_C(4503599627370496),
  INT64_C(4503599627370497),
  INT64_C(4503599627370498),
  INT64_C(4503599627370499),
  INT64_C(8987183256397123),
  INT64_C(9007199254740988),
  INT64_C(9007199254740989),
  INT64_C(9007199254740990),
  INT64_C(9007199254740991),
  INT64_C(2251799813685248),
  INT64_C(2251799813685249),
  INT64_C(2251799813685249),
  INT64_C(2251799813685250),
  INT64_C(4493591628198562),
  INT64_C(4503599627370494),
  INT64_C(4503599627370495),
  INT64_C(4503599627370495),
  INT64_C(4503599627370496),
  INT64_C(1125899906842624),
  INT64_C(1125899906842624),
  INT64_C(1125899906842625),
  INT64_C(1125899906842625),
  INT64_C(2246795814099281),
  INT64_C(2251799813685247),
  INT64_C(2251799813685247),
  INT64_C(2251799813685248),
  INT64_C(2251799813685248),
  -INT64_C(4503599627370496),
  -INT64_C(4503599627370497),
  -INT64_C(4503599627370498),
  -INT64_C(4503599627370499),
  -INT64_C(8987183256397123),
  -INT64_C(9007199254740988),
  -INT64_C(9007199254740989),
  -INT64_C(9007199254740990),
  -INT64_C(9007199254740991),
  -INT64_C(2251799813685248),
  -INT64_C(2251799813685249),
  -INT64_C(2251799813685249),
  -INT64_C(2251799813685250),
  -INT64_C(4493591628198562),
  -INT64_C(4503599627370494),
  -INT64_C(4503599627370495),
  -INT64_C(4503599627370495),
  -INT64_C(4503599627370496),
  -INT64_C(1125899906842624),
  -INT64_C(1125899906842624),
  -INT64_C(1125899906842625),
  -INT64_C(1125899906842625),
  -INT64_C(2246795814099281),
  -INT64_C(2251799813685247),
  -INT64_C(2251799813685247),
  -INT64_C(2251799813685248),
  -INT64_C(2251799813685248),
  -INT64_C(9223372036854775807) - 1,
  -INT64_C(9223372036854775807) - 1,
  -INT64_C(9223372036854774784),
  INT64_C(9223372036854774784),
  INT64_C(9223372036854775807),
  INT64_C(9223372036854775807),
  INT64_C(9223372036854775807),
  -INT64_C(2147483649),
  -INT64_C(2147483649),
  -INT64_C(2147483649),
  -INT64_C(2147483649),
  -INT64_C(2147483649),
  -INT64_C(2147483648),
  -INT64_C(2147483648),
  -INT64_C(2147483648),
  -INT64_C(2147483648),
  -INT64_C(2147483648),
  -INT64_C(2147483648),
  -INT64_C(2147483647),
  INT64_C(2147483646),
  INT64_C(2147483646),
  INT64_C(2147483646),
  INT64_C(2147483646),
  INT64_C(2147483647),
  INT64_C(2147483647),
  INT64_C(2147483647),
  INT64_C(2147483647),
  INT64_C(2147483647),
  INT64_C(2147483647),
  INT64_C(2147483648),
  INT64_C(2147483648),
  INT64_C(4294967294),
  INT64_C(4294967294),
  INT64_C(4294967294),
  INT64_C(4294967294),
  INT64_C(4294967295),
  INT64_C(4294967295),
  INT64_C(4294967295),
  INT64_C(4294967295),
  INT64_C(4294967295),
  INT64_C(4294967295),
  INT64_C(4294967296),
  INT64_C(4294967296),
};
const unsigned kExpectedCount_fcvtas_xd = 207;

#endif  // VIXL_SIM_FCVTAS_XD_TRACE_AARCH64_H_