| ;;; TOOL: run-objdump |
| ;;; ARGS0: -v |
| (module |
| (func |
| i32.const 0 |
| i32.const 0 |
| i32.rotr |
| i32.const 0 |
| i32.rotl |
| i32.const 0 |
| i32.shr_s |
| i32.const 0 |
| i32.shr_u |
| i32.const 0 |
| i32.shl |
| i32.const 0 |
| i32.xor |
| i32.const 0 |
| i32.or |
| i32.const 0 |
| i32.and |
| i32.const 0 |
| i32.rem_u |
| i32.const 0 |
| i32.rem_s |
| i32.const 0 |
| i32.div_u |
| i32.const 0 |
| i32.div_s |
| i32.const 0 |
| i32.mul |
| i32.const 0 |
| i32.sub |
| i32.const 0 |
| i32.add |
| drop |
| i64.const 0 |
| i64.const 0 |
| i64.rotr |
| i64.const 0 |
| i64.rotl |
| i64.const 0 |
| i64.shr_s |
| i64.const 0 |
| i64.shr_u |
| i64.const 0 |
| i64.shl |
| i64.const 0 |
| i64.xor |
| i64.const 0 |
| i64.or |
| i64.const 0 |
| i64.and |
| i64.const 0 |
| i64.rem_u |
| i64.const 0 |
| i64.rem_s |
| i64.const 0 |
| i64.div_u |
| i64.const 0 |
| i64.div_s |
| i64.const 0 |
| i64.mul |
| i64.const 0 |
| i64.sub |
| i64.const 0 |
| i64.add |
| drop |
| f32.const 0 |
| f32.const 0 |
| f32.copysign |
| f32.const 0 |
| f32.max |
| f32.const 0 |
| f32.min |
| f32.const 0 |
| f32.div |
| f32.const 0 |
| f32.mul |
| f32.const 0 |
| f32.sub |
| f32.const 0 |
| f32.add |
| drop |
| f64.const 0 |
| f64.const 0 |
| f64.copysign |
| f64.const 0 |
| f64.max |
| f64.const 0 |
| f64.min |
| f64.const 0 |
| f64.div |
| f64.const 0 |
| f64.mul |
| f64.const 0 |
| f64.sub |
| f64.const 0 |
| f64.add |
| drop |
| |
| )) |
| |
| (;; STDERR ;;; |
| 0000000: 0061 736d ; WASM_BINARY_MAGIC |
| 0000004: 0100 0000 ; WASM_BINARY_VERSION |
| ; section "Type" (1) |
| 0000008: 01 ; section code |
| 0000009: 00 ; section size (guess) |
| 000000a: 01 ; num types |
| ; func type 0 |
| 000000b: 60 ; func |
| 000000c: 00 ; num params |
| 000000d: 00 ; num results |
| 0000009: 04 ; FIXUP section size |
| ; section "Function" (3) |
| 000000e: 03 ; section code |
| 000000f: 00 ; section size (guess) |
| 0000010: 01 ; num functions |
| 0000011: 00 ; function 0 signature index |
| 000000f: 02 ; FIXUP section size |
| ; section "Code" (10) |
| 0000012: 0a ; section code |
| 0000013: 00 ; section size (guess) |
| 0000014: 01 ; num functions |
| ; function body 0 |
| 0000015: 00 ; func body size (guess) |
| 0000016: 00 ; local decl count |
| 0000017: 41 ; i32.const |
| 0000018: 00 ; i32 literal |
| 0000019: 41 ; i32.const |
| 000001a: 00 ; i32 literal |
| 000001b: 78 ; i32.rotr |
| 000001c: 41 ; i32.const |
| 000001d: 00 ; i32 literal |
| 000001e: 77 ; i32.rotl |
| 000001f: 41 ; i32.const |
| 0000020: 00 ; i32 literal |
| 0000021: 75 ; i32.shr_s |
| 0000022: 41 ; i32.const |
| 0000023: 00 ; i32 literal |
| 0000024: 76 ; i32.shr_u |
| 0000025: 41 ; i32.const |
| 0000026: 00 ; i32 literal |
| 0000027: 74 ; i32.shl |
| 0000028: 41 ; i32.const |
| 0000029: 00 ; i32 literal |
| 000002a: 73 ; i32.xor |
| 000002b: 41 ; i32.const |
| 000002c: 00 ; i32 literal |
| 000002d: 72 ; i32.or |
| 000002e: 41 ; i32.const |
| 000002f: 00 ; i32 literal |
| 0000030: 71 ; i32.and |
| 0000031: 41 ; i32.const |
| 0000032: 00 ; i32 literal |
| 0000033: 70 ; i32.rem_u |
| 0000034: 41 ; i32.const |
| 0000035: 00 ; i32 literal |
| 0000036: 6f ; i32.rem_s |
| 0000037: 41 ; i32.const |
| 0000038: 00 ; i32 literal |
| 0000039: 6e ; i32.div_u |
| 000003a: 41 ; i32.const |
| 000003b: 00 ; i32 literal |
| 000003c: 6d ; i32.div_s |
| 000003d: 41 ; i32.const |
| 000003e: 00 ; i32 literal |
| 000003f: 6c ; i32.mul |
| 0000040: 41 ; i32.const |
| 0000041: 00 ; i32 literal |
| 0000042: 6b ; i32.sub |
| 0000043: 41 ; i32.const |
| 0000044: 00 ; i32 literal |
| 0000045: 6a ; i32.add |
| 0000046: 1a ; drop |
| 0000047: 42 ; i64.const |
| 0000048: 00 ; i64 literal |
| 0000049: 42 ; i64.const |
| 000004a: 00 ; i64 literal |
| 000004b: 8a ; i64.rotr |
| 000004c: 42 ; i64.const |
| 000004d: 00 ; i64 literal |
| 000004e: 89 ; i64.rotl |
| 000004f: 42 ; i64.const |
| 0000050: 00 ; i64 literal |
| 0000051: 87 ; i64.shr_s |
| 0000052: 42 ; i64.const |
| 0000053: 00 ; i64 literal |
| 0000054: 88 ; i64.shr_u |
| 0000055: 42 ; i64.const |
| 0000056: 00 ; i64 literal |
| 0000057: 86 ; i64.shl |
| 0000058: 42 ; i64.const |
| 0000059: 00 ; i64 literal |
| 000005a: 85 ; i64.xor |
| 000005b: 42 ; i64.const |
| 000005c: 00 ; i64 literal |
| 000005d: 84 ; i64.or |
| 000005e: 42 ; i64.const |
| 000005f: 00 ; i64 literal |
| 0000060: 83 ; i64.and |
| 0000061: 42 ; i64.const |
| 0000062: 00 ; i64 literal |
| 0000063: 82 ; i64.rem_u |
| 0000064: 42 ; i64.const |
| 0000065: 00 ; i64 literal |
| 0000066: 81 ; i64.rem_s |
| 0000067: 42 ; i64.const |
| 0000068: 00 ; i64 literal |
| 0000069: 80 ; i64.div_u |
| 000006a: 42 ; i64.const |
| 000006b: 00 ; i64 literal |
| 000006c: 7f ; i64.div_s |
| 000006d: 42 ; i64.const |
| 000006e: 00 ; i64 literal |
| 000006f: 7e ; i64.mul |
| 0000070: 42 ; i64.const |
| 0000071: 00 ; i64 literal |
| 0000072: 7d ; i64.sub |
| 0000073: 42 ; i64.const |
| 0000074: 00 ; i64 literal |
| 0000075: 7c ; i64.add |
| 0000076: 1a ; drop |
| 0000077: 43 ; f32.const |
| 0000078: 0000 0000 ; f32 literal |
| 000007c: 43 ; f32.const |
| 000007d: 0000 0000 ; f32 literal |
| 0000081: 98 ; f32.copysign |
| 0000082: 43 ; f32.const |
| 0000083: 0000 0000 ; f32 literal |
| 0000087: 97 ; f32.max |
| 0000088: 43 ; f32.const |
| 0000089: 0000 0000 ; f32 literal |
| 000008d: 96 ; f32.min |
| 000008e: 43 ; f32.const |
| 000008f: 0000 0000 ; f32 literal |
| 0000093: 95 ; f32.div |
| 0000094: 43 ; f32.const |
| 0000095: 0000 0000 ; f32 literal |
| 0000099: 94 ; f32.mul |
| 000009a: 43 ; f32.const |
| 000009b: 0000 0000 ; f32 literal |
| 000009f: 93 ; f32.sub |
| 00000a0: 43 ; f32.const |
| 00000a1: 0000 0000 ; f32 literal |
| 00000a5: 92 ; f32.add |
| 00000a6: 1a ; drop |
| 00000a7: 44 ; f64.const |
| 00000a8: 0000 0000 0000 0000 ; f64 literal |
| 00000b0: 44 ; f64.const |
| 00000b1: 0000 0000 0000 0000 ; f64 literal |
| 00000b9: a6 ; f64.copysign |
| 00000ba: 44 ; f64.const |
| 00000bb: 0000 0000 0000 0000 ; f64 literal |
| 00000c3: a5 ; f64.max |
| 00000c4: 44 ; f64.const |
| 00000c5: 0000 0000 0000 0000 ; f64 literal |
| 00000cd: a4 ; f64.min |
| 00000ce: 44 ; f64.const |
| 00000cf: 0000 0000 0000 0000 ; f64 literal |
| 00000d7: a3 ; f64.div |
| 00000d8: 44 ; f64.const |
| 00000d9: 0000 0000 0000 0000 ; f64 literal |
| 00000e1: a2 ; f64.mul |
| 00000e2: 44 ; f64.const |
| 00000e3: 0000 0000 0000 0000 ; f64 literal |
| 00000eb: a1 ; f64.sub |
| 00000ec: 44 ; f64.const |
| 00000ed: 0000 0000 0000 0000 ; f64 literal |
| 00000f5: a0 ; f64.add |
| 00000f6: 1a ; drop |
| 00000f7: 0b ; end |
| ; move data: [16, f8) -> [17, f9) |
| 0000015: e201 ; FIXUP func body size |
| ; move data: [14, f9) -> [15, fa) |
| 0000013: e501 ; FIXUP section size |
| ;;; STDERR ;;) |
| (;; STDOUT ;;; |
| |
| binary.wasm: file format wasm 0x1 |
| |
| Code Disassembly: |
| |
| 000018 func[0]: |
| 000019: 41 00 | i32.const 0 |
| 00001b: 41 00 | i32.const 0 |
| 00001d: 78 | i32.rotr |
| 00001e: 41 00 | i32.const 0 |
| 000020: 77 | i32.rotl |
| 000021: 41 00 | i32.const 0 |
| 000023: 75 | i32.shr_s |
| 000024: 41 00 | i32.const 0 |
| 000026: 76 | i32.shr_u |
| 000027: 41 00 | i32.const 0 |
| 000029: 74 | i32.shl |
| 00002a: 41 00 | i32.const 0 |
| 00002c: 73 | i32.xor |
| 00002d: 41 00 | i32.const 0 |
| 00002f: 72 | i32.or |
| 000030: 41 00 | i32.const 0 |
| 000032: 71 | i32.and |
| 000033: 41 00 | i32.const 0 |
| 000035: 70 | i32.rem_u |
| 000036: 41 00 | i32.const 0 |
| 000038: 6f | i32.rem_s |
| 000039: 41 00 | i32.const 0 |
| 00003b: 6e | i32.div_u |
| 00003c: 41 00 | i32.const 0 |
| 00003e: 6d | i32.div_s |
| 00003f: 41 00 | i32.const 0 |
| 000041: 6c | i32.mul |
| 000042: 41 00 | i32.const 0 |
| 000044: 6b | i32.sub |
| 000045: 41 00 | i32.const 0 |
| 000047: 6a | i32.add |
| 000048: 1a | drop |
| 000049: 42 00 | i64.const 0 |
| 00004b: 42 00 | i64.const 0 |
| 00004d: 8a | i64.rotr |
| 00004e: 42 00 | i64.const 0 |
| 000050: 89 | i64.rotl |
| 000051: 42 00 | i64.const 0 |
| 000053: 87 | i64.shr_s |
| 000054: 42 00 | i64.const 0 |
| 000056: 88 | i64.shr_u |
| 000057: 42 00 | i64.const 0 |
| 000059: 86 | i64.shl |
| 00005a: 42 00 | i64.const 0 |
| 00005c: 85 | i64.xor |
| 00005d: 42 00 | i64.const 0 |
| 00005f: 84 | i64.or |
| 000060: 42 00 | i64.const 0 |
| 000062: 83 | i64.and |
| 000063: 42 00 | i64.const 0 |
| 000065: 82 | i64.rem_u |
| 000066: 42 00 | i64.const 0 |
| 000068: 81 | i64.rem_s |
| 000069: 42 00 | i64.const 0 |
| 00006b: 80 | i64.div_u |
| 00006c: 42 00 | i64.const 0 |
| 00006e: 7f | i64.div_s |
| 00006f: 42 00 | i64.const 0 |
| 000071: 7e | i64.mul |
| 000072: 42 00 | i64.const 0 |
| 000074: 7d | i64.sub |
| 000075: 42 00 | i64.const 0 |
| 000077: 7c | i64.add |
| 000078: 1a | drop |
| 000079: 43 00 00 00 00 | f32.const 0x0p+0 |
| 00007e: 43 00 00 00 00 | f32.const 0x0p+0 |
| 000083: 98 | f32.copysign |
| 000084: 43 00 00 00 00 | f32.const 0x0p+0 |
| 000089: 97 | f32.max |
| 00008a: 43 00 00 00 00 | f32.const 0x0p+0 |
| 00008f: 96 | f32.min |
| 000090: 43 00 00 00 00 | f32.const 0x0p+0 |
| 000095: 95 | f32.div |
| 000096: 43 00 00 00 00 | f32.const 0x0p+0 |
| 00009b: 94 | f32.mul |
| 00009c: 43 00 00 00 00 | f32.const 0x0p+0 |
| 0000a1: 93 | f32.sub |
| 0000a2: 43 00 00 00 00 | f32.const 0x0p+0 |
| 0000a7: 92 | f32.add |
| 0000a8: 1a | drop |
| 0000a9: 44 00 00 00 00 00 00 00 00 | f64.const 0x0p+0 |
| 0000b2: 44 00 00 00 00 00 00 00 00 | f64.const 0x0p+0 |
| 0000bb: a6 | f64.copysign |
| 0000bc: 44 00 00 00 00 00 00 00 00 | f64.const 0x0p+0 |
| 0000c5: a5 | f64.max |
| 0000c6: 44 00 00 00 00 00 00 00 00 | f64.const 0x0p+0 |
| 0000cf: a4 | f64.min |
| 0000d0: 44 00 00 00 00 00 00 00 00 | f64.const 0x0p+0 |
| 0000d9: a3 | f64.div |
| 0000da: 44 00 00 00 00 00 00 00 00 | f64.const 0x0p+0 |
| 0000e3: a2 | f64.mul |
| 0000e4: 44 00 00 00 00 00 00 00 00 | f64.const 0x0p+0 |
| 0000ed: a1 | f64.sub |
| 0000ee: 44 00 00 00 00 00 00 00 00 | f64.const 0x0p+0 |
| 0000f7: a0 | f64.add |
| 0000f8: 1a | drop |
| 0000f9: 0b | end |
| ;;; STDOUT ;;) |
