commit bb5e35833fe722a24a31ce691e6c340ddc2fc4ae
author Simon Moll <simon.moll@emea.nec.com> Mon Oct 25 11:55:22 2021
committer Simon Moll <simon.moll@emea.nec.com> Mon Oct 25 11:55:58 2021
tree c5c222d3fe41155dd308b197188f553f04c677bd
parent 176a0ea535d4403b3a8482153f366e55141c7e50

[VE][NFC] correct bitmasking in popcnt expansion test

llvm/test/CodeGen/VE/Scalar/cttz.ll

diff --git a/llvm/test/CodeGen/VE/Scalar/cttz.ll b/llvm/test/CodeGen/VE/Scalar/cttz.ll
index aa9987e..85ee135 100644
--- a/llvm/test/CodeGen/VE/Scalar/cttz.ll
+++ b/llvm/test/CodeGen/VE/Scalar/cttz.ll
@@ -64,7 +64,7 @@
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    adds.w.sx %s1, -1, %s0
 ; CHECK-NEXT:    nnd %s0, %s0, %s1
-; CHECK-NEXT:    and %s0, %s0, (32)0
+; CHECK-NEXT:    and %s0, %s0, (48)0
 ; CHECK-NEXT:    pcnt %s0, %s0
 ; CHECK-NEXT:    b.l.t (, %s10)
   %r = tail call i16 @llvm.cttz.i16(i16 %p, i1 true)
@@ -76,7 +76,7 @@
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    adds.w.sx %s1, -1, %s0
 ; CHECK-NEXT:    nnd %s0, %s0, %s1
-; CHECK-NEXT:    and %s0, %s0, (32)0
+; CHECK-NEXT:    and %s0, %s0, (48)0
 ; CHECK-NEXT:    pcnt %s0, %s0
 ; CHECK-NEXT:    b.l.t (, %s10)
   %r = tail call i16 @llvm.cttz.i16(i16 %p, i1 true)
@@ -88,7 +88,7 @@
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    adds.w.sx %s1, -1, %s0
 ; CHECK-NEXT:    nnd %s0, %s0, %s1
-; CHECK-NEXT:    and %s0, %s0, (32)0
+; CHECK-NEXT:    and %s0, %s0, (56)0
 ; CHECK-NEXT:    pcnt %s0, %s0
 ; CHECK-NEXT:    b.l.t (, %s10)
   %r = tail call i8 @llvm.cttz.i8(i8 %p, i1 true)
@@ -100,7 +100,7 @@
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    adds.w.sx %s1, -1, %s0
 ; CHECK-NEXT:    nnd %s0, %s0, %s1
-; CHECK-NEXT:    and %s0, %s0, (32)0
+; CHECK-NEXT:    and %s0, %s0, (56)0
 ; CHECK-NEXT:    pcnt %s0, %s0
 ; CHECK-NEXT:    b.l.t (, %s10)
   %r = tail call i8 @llvm.cttz.i8(i8 %p, i1 true)