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| <pending_commit branch="master" change_id="Id622ba9c8a6a23e161044a48ad92fedc23abce46" commit="f4aa6ac6d78e3d8ef759a3ad2c2cb75e9e4f7f50" commit_message="cidb: teach slaves to record the pass/fail subsystems into cidb Teach slaves to parse run_suite json summary to determine passed and failed subsystems, and record them as a dictionary into CIDB buildMessageTable. If subsystem logic hasn't been used in a build_run, the 'message_value' column in buildMessageTable will be 'None'. BUG=None TEST=unittest and trybot, trybot cmds: "./cbuildbot -g 307035 --remote lumpy-pre-cq --hwtest" "./cbuildbot -g '307035 304856' --remote lumpy-pre-cq --hwtest" Change-Id: Id622ba9c8a6a23e161044a48ad92fedc23abce46 Reviewed-on: https://chromium-review.googlesource.com/307035 Commit-Ready: Shuqian Zhao <shuqianz@chromium.org> Tested-by: Shuqian Zhao <shuqianz@chromium.org> Reviewed-by: Shuqian Zhao <shuqianz@chromium.org> " fail_count="0" gerrit_number="307035" owner_email="shuqianz@chromium.org" pass_count="0" patch_number="17" project="chromiumos/chromite" project_url="https://chromium-review.googlesource.com/chromiumos/chromite" ref="refs/changes/35/307035/17" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I0a9ffc48dbb72796534b63e065e536e756b22352" commit="32eded7f17fb403d3b8525fd5dbdd41afc5b0e70" commit_message="platform_FullyChargedPowerStatus: Fix battery report issue Some batteries still report Discharging even though current is 0 and they are done charging. This checks the current when the battery reports discharging to prevent invalid test failures in the lab. BUG=chromium:540951 TEST=Watch test runs in the lab Change-Id: I0a9ffc48dbb72796534b63e065e536e756b22352 Reviewed-on: https://chromium-review.googlesource.com/312954 Commit-Ready: Derek Basehore <dbasehore@chromium.org> Tested-by: Derek Basehore <dbasehore@chromium.org> Reviewed-by: Kalin Stoyanov <kalin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> " fail_count="0" gerrit_number="312954" owner_email="dbasehore@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/54/312954/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2015.07" change_id="I28f5decabcbaf1e61c9b4e549b11e568dace8c09" commit="2c14ec410362f6af360bbbb1f94b250190324991" commit_message="archive: build archive tool with HOSTCC BUG=chromium:502066 BRANCH=tot TEST=Tested on Jerry Change-Id: I28f5decabcbaf1e61c9b4e549b11e568dace8c09 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/312902 Reviewed-by: Aaron Durbin <adurbin@chromium.org> " fail_count="1" gerrit_number="312902" owner_email="dnojiri@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/02/312902/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2015.07" change_id="I2d54d3087ecd3536469866f30e4eb2d8b1acd5c1" commit="686091a0be4a2bad7037d369551f05b36cd7d91c" commit_message="Mickey: Update LPDDR3 configuration This makes the same changes to the LPDDR3 configuration that were made for Samsung modules: - Enable ODT function - Change DS to 40 from 34.3 BUG=chrome-os-partner:47416 BRANCH=firmware-veyron-6588.B TEST=Boot on mickey elpida board Change-Id: I2d54d3087ecd3536469866f30e4eb2d8b1acd5c1 Signed-off-by: jiazi Yang <Tomato_Yang@asus.com> Reviewed-on: https://chromium-review.googlesource.com/311153 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/311855 Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> " fail_count="0" gerrit_number="311855" owner_email="dhendrix@chromium.org" pass_count="0" patch_number="5" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/55/311855/5" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-3.18" change_id="I0bd2617afe476603479f8f1984674ae279221419" commit="73876224c1d26488433c91f5444cc85407836b56" commit_message="ANDROID: usb: phy: fix dual role sysfs class compilation Fix the missing semi-colon which was breaking compilation when the kernel modules (CONFIG_MODULES) are enabled. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=none TEST=build kernel with CONFIG_MODULES=y Change-Id: I0bd2617afe476603479f8f1984674ae279221419 Reviewed-on: https://chromium-review.googlesource.com/312798 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> " fail_count="3" gerrit_number="312798" owner_email="vpalatin@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/98/312798/1" remote="cros" total_fail_count="3"/><pending_commit branch="chromeos-3.18" change_id="I9f7206d2823707a14c4915313b71fca35c75633a" commit="cfff57faef2e734abcfc09593cf9e21087b1193e" commit_message="UPSTREAM: drm/i915: use pch backlight override on hsw too Currently the difference between backlight control on HSW vs. BDW/SKL is that on HSW we modify the duty cycle on the CPU register, and have the hardware pass the changes on to the PCH registers. We still drive the PCH PWM on both. While HSW and BDW use the same LPT PCH, BDW does not pass these messages on to the PCH. Therefore on BDW we need to enable the PCH override bit, and program the PCH directly. (On SPT PCH, this mode is the default.) We could as well do this on HSW too, and in fact I've been told this is what a certain other operating system does. So use PCH backlight override on HSW too. This simplifies some follow-up code, but it does have the danger of breaking backlight on HSW machines. It should work, but mysterious are the ways of backlight. While at it, name the related backlight hooks according to the PCH rather than the CPU for clarity. Cc: Clint Taylor <clinton.a.taylor@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> BUG=chrome-os-partner:43071 TEST=Enable normal mode - /usr/share/vboot/bin/set_gbb_flags.sh 0x0 Change-Id: I9f7206d2823707a14c4915313b71fca35c75633a Link: git://anongit.freedesktop.org/drm-intel ref:drm-intel-next (cherry picked from commit 437b15b8017e0d946453c10794b0c5d4591cf180) Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Reviewed-on: https://chromium-review.googlesource.com/308577 Tested-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Joe Konno <joe.konno@linux.intel.com> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Reviewed-by: James Ausmus <james.ausmus@intel.com> " fail_count="0" gerrit_number="308577" owner_email="shobhit.kumar@intel.com" pass_count="0" patch_number="3" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/77/308577/3" remote="cros" total_fail_count="0"/><lkgm version="7651.0.0-rc3"/></manifest> |
