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| <pending_commit branch="master" change_id="I65c9596396254ab5cc5f85e24958a612e55e15e1" commit="cf9e8d89e8782019a92b319760a6fc871e7ddcc5" commit_message="arc: Mount '/' with nodev for extra security and least privilege BUG=None TEST=cheets_ContainerSmokeTest, cheets_ContainerMount, and cheets_FileSystemPermissions pass CQ-DEPEND=CL:*578182 Change-Id: I65c9596396254ab5cc5f85e24958a612e55e15e1 Reviewed-on: https://chromium-review.googlesource.com/937817 Commit-Ready: Yusuke Sato <yusukes@chromium.org> Tested-by: Yusuke Sato <yusukes@chromium.org> Reviewed-by: Yusuke Sato <yusukes@chromium.org> " fail_count="0" gerrit_number="937817" owner_email="yusukes@chromium.org" pass_count="0" patch_number="5" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/17/937817/5" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I92a2216999337cf9831fb5dfc2797ab1cce71a8f" commit="d305c207f6d73a266858c9fd12b2052644496846" commit_message="stm32: crank up CPU PLL frequency to 400Mhz on STM32H743 Set the PLL frequency to 400 Mhz (max value) and the AHB frequency to 200 Mhz. Fix the PLL clocking code for STM32H7 : - fix the frequency computation. - adjust the timer divider depending on the system clock. - the 64Mhz HSI is already setup properly at startup, takes it into account. - set the SPI ports on the fixed 64-Mhz HSI, so clocking changes don't mess up their frequencies or stability. Note: this is just modifying the CPU frequency when the system is clocked by the PLL, by default the system is still clocked by the 64-Mhz HSI. Currently, one have to use the 'clock pll' console command to test this PLL mode, some code will be added soon to switch on-demand for heavy computations. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=b:67081508, b:72879097 TEST=On ZerbleBarn, do 'clock pll', check 'gettime' against wall clock, run image capture and enrollment. TEST=on ZerbleBarn, verify on the scope that the SPI master frequency is 4 Mhz in both configuration. Change-Id: I92a2216999337cf9831fb5dfc2797ab1cce71a8f Reviewed-on: https://chromium-review.googlesource.com/941226 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> " fail_count="0" gerrit_number="941226" owner_email="vpalatin@chromium.org" pass_count="0" patch_number="8" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/26/941226/8" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I2aef3ad673ddbffd6fc64c591c54297e94896fa6" commit="e724b20ebe99d8982c0d8eb462c15d4e6542be40" commit_message="stm32h7: enable the fast PLL on-demand Add a new module ID 'MODULE_FAST_CPU'. When it is enabled with clock_enable_module(MODULE_FAST_CPU, 1), switch the system clocking to the fast 400-Mhz PLL. For now, I consider that a single task/user is calling clock_enable_module(MODULE_FAST_CPU, x), so we don't need to count users (in a complicated atomic fashion). It's good enough for the current use-case and we can add the complexity later if we have a real need. BRANCH=none BUG=b:67081508 TEST=on ZerbleBarn, with follow-up CL setting clock_enable_module(MODULE_FAST_CPU,x) around the computation block, see that computations are fast and the clock goes back to HSI after. Change-Id: I2aef3ad673ddbffd6fc64c591c54297e94896fa6 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/945688 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> " fail_count="0" gerrit_number="945688" owner_email="vpalatin@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/88/945688/3" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I731fde7699f6e9fa4ffb4883f81a85a53b04f802" commit="dbd98ea6211a63df62233de264dd876db0ff67fa" commit_message="generic_run_in: Add wait_secs to StressAppTest in StressGroup. Since both WebGLAquarium and Camera (in e2e mode) would use some decent amount of memory, the StressAppTest should be delayed for some time to make the memory usage stable. BUG=b:73898702 TEST=make test Change-Id: I731fde7699f6e9fa4ffb4883f81a85a53b04f802 Reviewed-on: https://chromium-review.googlesource.com/945349 Commit-Ready: Pi-Hsun Shih <pihsun@chromium.org> Tested-by: Pi-Hsun Shih <pihsun@chromium.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> " fail_count="2" gerrit_number="945349" owner_email="pihsun@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/factory" project_url="https://chromium-review.googlesource.com/chromiumos/platform/factory" ref="refs/changes/49/945349/1" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="Id0a07945f0f888b6a36c422c596b56c5aa5065c0" commit="39b9ba0818296d9423141faed0cb24dd7c64b80b" commit_message="Introduce CONFIG_USB_PD_5V_CHARGER_CTRL Add a new config for the boards using charger (e.g. rt946x) to report if VBUS source is enabled instead of using GPIO. BUG=b:65446459 BRANCH=none TEST=Charge Scarlet rev3 with SDP and DCP. Change-Id: Id0a07945f0f888b6a36c422c596b56c5aa5065c0 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/905400 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> " fail_count="1" gerrit_number="905400" owner_email="philipchen@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/00/905400/3" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ib5d6b0cd1074a5ffbeb1d7595bd71fdecba13235" commit="d2a48991cfceaf7ec243a611a2136dfe0ed04d20" commit_message="Apply autotest capability to video_VDAPerf video_VDAPerf is one of the first tests that run with static file configuration. Because video_VDAPerf suite is crosbolt_perf_perbuild, its failure will not block CQ, PFQ and canary build. I set the corrsponding static capability to each test case. 720@50fps : hw_dec_XXX_1080_30 1080@50fps: hw_dec_XXX_1080_60 2160@60fps: hw_dec_XXX_2160_60 In addition to the above, I unify control files to "control". After this change, "video_VDAPerf" runs autotest following static capability on DUT. BUG=chromium:789866 TEST=video_VDAPerf on veyron_minnie and eve Change-Id: Ib5d6b0cd1074a5ffbeb1d7595bd71fdecba13235 Reviewed-on: https://chromium-review.googlesource.com/923609 Commit-Ready: Hirokazu Honda <hiroh@chromium.org> Tested-by: Hirokazu Honda <hiroh@chromium.org> Reviewed-by: Kuang-che Wu <kcwu@chromium.org> " fail_count="2" gerrit_number="923609" owner_email="hiroh@chromium.org" pass_count="0" patch_number="4" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/09/923609/4" remote="cros" total_fail_count="2"/><lkgm version="10460.0.0-rc2"/></manifest> |
