blob: 32eab52adbdf67f5f9b1835d9956b6bbe1a935b6 [file] [log] [blame]
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |
define void @f32toi32() {entry: ret void}
define void @f64toi32() {entry: ret void}
...
---
name: f32toi32
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: f32toi32
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
; FP32: [[TRUNC_W_S:%[0-9]+]]:fgr32 = TRUNC_W_S [[COPY]]
; FP32: [[MFC1_:%[0-9]+]]:gpr32 = MFC1 [[TRUNC_W_S]]
; FP32: $v0 = COPY [[MFC1_]]
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f32toi32
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
; FP64: [[TRUNC_W_S:%[0-9]+]]:fgr32 = TRUNC_W_S [[COPY]]
; FP64: [[MFC1_:%[0-9]+]]:gpr32 = MFC1 [[TRUNC_W_S]]
; FP64: $v0 = COPY [[MFC1_]]
; FP64: RetRA implicit $v0
%0:fprb(s32) = COPY $f12
%1:gprb(s32) = G_FPTOSI %0(s32)
$v0 = COPY %1(s32)
RetRA implicit $v0
...
---
name: f64toi32
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: f64toi32
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
; FP32: [[TRUNC_W_D32_:%[0-9]+]]:fgr32 = TRUNC_W_D32 [[COPY]]
; FP32: [[MFC1_:%[0-9]+]]:gpr32 = MFC1 [[TRUNC_W_D32_]]
; FP32: $v0 = COPY [[MFC1_]]
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f64toi32
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
; FP64: [[TRUNC_W_D64_:%[0-9]+]]:fgr32 = TRUNC_W_D64 [[COPY]]
; FP64: [[MFC1_:%[0-9]+]]:gpr32 = MFC1 [[TRUNC_W_D64_]]
; FP64: $v0 = COPY [[MFC1_]]
; FP64: RetRA implicit $v0
%0:fprb(s64) = COPY $d6
%1:gprb(s32) = G_FPTOSI %0(s64)
$v0 = COPY %1(s32)
RetRA implicit $v0
...