test/CodeGen/Mips/GlobalISel/instruction-select/icmp.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |

  define void @eq_i32() {entry: ret void}
  define void @ne_i32() {entry: ret void}
  define void @sgt_i32() {entry: ret void}
  define void @sge_i32() {entry: ret void}
  define void @slt_i32() {entry: ret void}
  define void @sle_i32() {entry: ret void}
  define void @ugt_i32() {entry: ret void}
  define void @uge_i32() {entry: ret void}
  define void @ult_i32() {entry: ret void}
  define void @ule_i32() {entry: ret void}
  define void @eq_ptr() {entry: ret void}


...
---
name:            eq_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: eq_i32
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
    ; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY]], [[COPY1]]
    ; MIPS32: [[SLTiu:%[0-9]+]]:gpr32 = SLTiu [[XOR]], 1
    ; MIPS32: $v0 = COPY [[SLTiu]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(s32) = COPY $a0
    %1:gprb(s32) = COPY $a1
    %4:gprb(s32) = G_ICMP intpred(eq), %0(s32), %1
    %3:gprb(s32) = COPY %4(s32)
    $v0 = COPY %3(s32)
    RetRA implicit $v0

...
---
name:            ne_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: ne_i32
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
    ; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY]], [[COPY1]]
    ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu $zero, [[XOR]]
    ; MIPS32: $v0 = COPY [[SLTu]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(s32) = COPY $a0
    %1:gprb(s32) = COPY $a1
    %4:gprb(s32) = G_ICMP intpred(ne), %0(s32), %1
    %3:gprb(s32) = COPY %4(s32)
    $v0 = COPY %3(s32)
    RetRA implicit $v0

...
---
name:            sgt_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: sgt_i32
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
    ; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY1]], [[COPY]]
    ; MIPS32: $v0 = COPY [[SLT]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(s32) = COPY $a0
    %1:gprb(s32) = COPY $a1
    %4:gprb(s32) = G_ICMP intpred(sgt), %0(s32), %1
    %3:gprb(s32) = COPY %4(s32)
    $v0 = COPY %3(s32)
    RetRA implicit $v0

...
---
name:            sge_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: sge_i32
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
    ; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY]], [[COPY1]]
    ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLT]], 1
    ; MIPS32: $v0 = COPY [[XORi]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(s32) = COPY $a0
    %1:gprb(s32) = COPY $a1
    %4:gprb(s32) = G_ICMP intpred(sge), %0(s32), %1
    %3:gprb(s32) = COPY %4(s32)
    $v0 = COPY %3(s32)
    RetRA implicit $v0

...
---
name:            slt_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: slt_i32
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
    ; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY]], [[COPY1]]
    ; MIPS32: $v0 = COPY [[SLT]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(s32) = COPY $a0
    %1:gprb(s32) = COPY $a1
    %4:gprb(s32) = G_ICMP intpred(slt), %0(s32), %1
    %3:gprb(s32) = COPY %4(s32)
    $v0 = COPY %3(s32)
    RetRA implicit $v0

...
---
name:            sle_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: sle_i32
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
    ; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY1]], [[COPY]]
    ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLT]], 1
    ; MIPS32: $v0 = COPY [[XORi]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(s32) = COPY $a0
    %1:gprb(s32) = COPY $a1
    %4:gprb(s32) = G_ICMP intpred(sle), %0(s32), %1
    %3:gprb(s32) = COPY %4(s32)
    $v0 = COPY %3(s32)
    RetRA implicit $v0

...
---
name:            ugt_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: ugt_i32
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
    ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY1]], [[COPY]]
    ; MIPS32: $v0 = COPY [[SLTu]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(s32) = COPY $a0
    %1:gprb(s32) = COPY $a1
    %4:gprb(s32) = G_ICMP intpred(ugt), %0(s32), %1
    %3:gprb(s32) = COPY %4(s32)
    $v0 = COPY %3(s32)
    RetRA implicit $v0

...
---
name:            uge_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: uge_i32
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
    ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY]], [[COPY1]]
    ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLTu]], 1
    ; MIPS32: $v0 = COPY [[XORi]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(s32) = COPY $a0
    %1:gprb(s32) = COPY $a1
    %4:gprb(s32) = G_ICMP intpred(uge), %0(s32), %1
    %3:gprb(s32) = COPY %4(s32)
    $v0 = COPY %3(s32)
    RetRA implicit $v0

...
---
name:            ult_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: ult_i32
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
    ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY]], [[COPY1]]
    ; MIPS32: $v0 = COPY [[SLTu]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(s32) = COPY $a0
    %1:gprb(s32) = COPY $a1
    %4:gprb(s32) = G_ICMP intpred(ult), %0(s32), %1
    %3:gprb(s32) = COPY %4(s32)
    $v0 = COPY %3(s32)
    RetRA implicit $v0

...
---
name:            ule_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: ule_i32
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
    ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY1]], [[COPY]]
    ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLTu]], 1
    ; MIPS32: $v0 = COPY [[XORi]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(s32) = COPY $a0
    %1:gprb(s32) = COPY $a1
    %4:gprb(s32) = G_ICMP intpred(ule), %0(s32), %1
    %3:gprb(s32) = COPY %4(s32)
    $v0 = COPY %3(s32)
    RetRA implicit $v0

...
---
name:            eq_ptr
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: eq_ptr
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
    ; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY]], [[COPY1]]
    ; MIPS32: [[SLTiu:%[0-9]+]]:gpr32 = SLTiu [[XOR]], 1
    ; MIPS32: $v0 = COPY [[SLTiu]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(p0) = COPY $a0
    %1:gprb(p0) = COPY $a1
    %4:gprb(s32) = G_ICMP intpred(eq), %0(p0), %1
    %3:gprb(s32) = COPY %4(s32)
    $v0 = COPY %3(s32)
    RetRA implicit $v0

...