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| <pending_commit branch="chromeos-2016.05" change_id="I8ca300ca0428d5db690546d143619f06743f0473" commit="b410266893964527e12c32dcb53a1a7b036d89d8" commit_message="UPSTREAM: drivers/i2c/tpm/cr50: Simplify and increase init delay to 30 seconds The Cr50 i2c driver provides separate entry points for probing and initialization, but probing function does not really do much. It also claims and releases locality on every coreboot stage, but there is no need for this - locality should be definitely claimed after reset and then it could be retained through the boot process. On top of that the driver does not properly account for long time it could take the Cr50 chip to come around to reset processing if TPM reset request was posted during a lengthy TPM operation. This patch addresses the issues as follows: - tpm_vendor_probe() and tpm_vendor_cleanup() become noops, kept around to conform to the expected driver API. - tpm_vendor_init() invokes a function to process TPM reset only in the first stage using TPM (typically verstage), the function checks if locality is claimed and if so - waits for it to be released, which indicates that TPM reset processing is over. - before claiming locality check if it is already taken, and if so - just proceed. BRANCH=none BUG=b:65867313, b:68729265 TEST=Verified that reef no longer hangs during EC reboot and firmware_Cr50ClearTPMOwner (not yet merged) tests. Change-Id: I8ca300ca0428d5db690546d143619f06743f0473 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 2bc6ad3ff1a376ca6f67e2aca2440f34acdf9b99 Original-Change-Id: Iba8445caf1342e3a5fefcb2664b0759a1a8e84e3 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://review.coreboot.org/22554 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/786019 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="786019" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/19/786019/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Iaa5d856e39fdcea230de7d513d0b4c416ab8ddbe" commit="35ea1ad1585bc4bdf71e4109b136a6b7569d5071" commit_message="UPSTREAM: build system: drop duplicate rule for $(objutil)/blobtool/blobtool There's already one in util/blobtool/Makefile.inc BUG=chromium:787042 TEST=no more warning about duplicate rules Change-Id: Iaa5d856e39fdcea230de7d513d0b4c416ab8ddbe Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: db7b8afc912d28cc368b89f86435f2c8a6e11cf1 Original-Change-Id: I8bc17d3b182369cf5b67bdcf392db7932e5389bf Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-on: https://review.coreboot.org/22555 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/786020 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="786020" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/20/786020/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I1481c81d107087a8e1e677c3707d73f9e610e191" commit="b8ff324880bfcb02b02c93c7b6b8b03f370a6762" commit_message="UPSTREAM: Create SOC description file soc.asl Request from commit 519680948b (move carrizo_fch.asl code to soc), merge several includes into a single file in soc directory. Rename soc_fch.asl to sb_fch.asl. Rename fch.asl to sb_pci0_fch.asl. Then copy the required section from dsdt.asl into a new soc.asl. Affected boards: amd/gardenia and google/kahlee. BUG=b:69368752 Change-Id: I1481c81d107087a8e1e677c3707d73f9e610e191 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 2983c708155466d88776338b3a7faec9f80f0134 Original-Change-Id: I83d850cf9457f7c2c787336823d993ae2e9d28ce Original-Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Original-Reviewed-on: https://review.coreboot.org/22541 Original-Reviewed-by: Martin Roth <martinroth@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/786021 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="786021" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/21/786021/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic6e11e745e4136457ab159f173fd6f0704c72373" commit="670e7badb0f8dd8e24482ba0c450e401fa921e4e" commit_message="UPSTREAM: vendorcode/amd/pi/00670F00: Remove direct AGESA header includes Update amdlib to pull in the AGESA headers through agesa_headers.h BUG=b:66818758 TEST=Build gardenia; Build & boot kahlee Change-Id: Ic6e11e745e4136457ab159f173fd6f0704c72373 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 4d13307030eb26d92b1516e9d63cbf3397a7e047 Original-Change-Id: I3a2a2fde9738a9fe7a0b55cb91c29416cdc227a2 Original-Signed-off-by: Martin Roth <martinroth@google.com> Original-Reviewed-on: https://review.coreboot.org/22550 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/786022 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="786022" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/22/786022/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0f33c3dd2826f7cb265be782257cf851e130240e" commit="71d8eaecb4ec977e1ddbe4ad679dcdf71bfac04e" commit_message="UPSTREAM: vendorcode/amd/pi/00670F00: Halt build if headers aren't wrapped Make sure that AGESA headers don't get pulled directly into coreboot files again. BUG=b:66818758 TEST=Build gardenia; Build & boot kahlee; Include AGESA.h into files verify that the build fails. Change-Id: I0f33c3dd2826f7cb265be782257cf851e130240e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: ae01634e47326f83f74e5d3d729130343eb78f32 Original-Change-Id: I8d6d94872ebf76a9df2850ed0452cf6b1a446ffd Original-Signed-off-by: Martin Roth <martinroth@google.com> Original-Reviewed-on: https://review.coreboot.org/22500 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/786023 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="786023" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/23/786023/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I91eec8b8caf2a7ab6d3800bfeedd8d0d32830f7f" commit="36ec1ea9de71a2fa051d4b7e4eacd2db827c0b09" commit_message="UPSTREAM: google/gru: Add support for rainier Rainier is a scarlet-derived board but uses eDP as opposed to MIPI. Using GRU_BASEBOARD_SCARLET is enough, except for display related logic. In those cases, use board specific logic instead of baseboard. BUG=none BRANCH=none TEST=none Change-Id: I91eec8b8caf2a7ab6d3800bfeedd8d0d32830f7f Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: beb0468fced261ced7ddbb8a1f982edcaf6cce8c Original-Change-Id: I596f7ca6bc26312ecaeb261c96cebd46974c2cdf Original-Signed-off-by: Ege Mihmanli <egemih@google.com> Original-Reviewed-on: https://review.coreboot.org/22542 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/786024 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="786024" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/24/786024/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I9dd36b41d2a69a3db40fc7a3377b0a1f3d0457ae" commit="edd99de1981511302304ee057f9e092dddf42814" commit_message="UPSTREAM: chromeec: Change the API for hostevent/wake masks to handle 64-bit ChromeEC is getting ready to bump up the hostevents and wake masks to 64-bits. The current commands to program hostevents/wake masks will still operate on 32-bits only. A new EC host command will be added to handle 64-bit hostevents/wake masks. In order to prevent individual callers in coreboot from worrying about 32-bit/64-bit, the same API provided by google/chromeec will be updated to accept 64-bit parameters and return 64-bit values. Internally, host command handlers will take care of masking these parameters/return values to appropriate 32-bit/64-bit values. BUG=b:69329196 Change-Id: I9dd36b41d2a69a3db40fc7a3377b0a1f3d0457ae Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 8788fd63952b50e4692efbf75a21bf0608e4c01c Original-Change-Id: If59f3f2b1a2aa5ce95883df3e72efc4a32de1190 Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-on: https://review.coreboot.org/22551 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/786025 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="786025" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/25/786025/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia63139dcba2b17e5e31082396223785c932dab2b" commit="bc6f921a4c8f9b81884d858a6e0cc56f605e4fc5" commit_message="UPSTREAM: soc/amd/stoneyridge: Get entire DDR4 SPD Set the SPD size to 512 to get the entire DDR4 SPD. BUG=none BRANCH=none TEST=none Change-Id: Ia63139dcba2b17e5e31082396223785c932dab2b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 17431abab00a0f4bd68edb0abab5e9980a1434e5 Original-Change-Id: I0bdf8101de22533b2f4337d3c9e4423d62e6c66d Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Reviewed-on: https://review.coreboot.org/22484 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/786026 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="786026" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/26/786026/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I1dc20a8bdc52dc83f65efe183b1f0f9f2a1e3508" commit="e15b401281a887b2106c4dc5b2fe00f6353ac441" commit_message="UPSTREAM: soc/amd/common: Include appropriate headers in dimm_spd.h BUG=none BRANCH=none TEST=none Change-Id: I1dc20a8bdc52dc83f65efe183b1f0f9f2a1e3508 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: cae58f130673b132758efbac771213badc2d27df Original-Change-Id: I69e8eaffefbda4fdfb89264a55762558950aa5e2 Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Reviewed-on: https://review.coreboot.org/22547 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/786027 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="786027" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/27/786027/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="If94bda700105e6615a9df5d026b5d438995164e3" commit="90c33a17292fd4dd94d9a581cffeb042ecdf2023" commit_message="UPSTREAM: google/fizz: Define smbios_mainboard_sku to return OEM IDs Currently, mosys just returns "fizz" as model/chassis values. Returning proper OEM IDs so that mosys can return the proper variant. BUG=b:67732053 BRANCH=None TEST=mosys platform model; mosys platform chassis; Make sure returns the right variant string and not fizz. Change-Id: If94bda700105e6615a9df5d026b5d438995164e3 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: a35ad0e6ee7826dc1f171291116f306099c99e72 Original-Change-Id: I42e293e833b0f7c9870dc275561ad13256836e60 Original-Signed-off-by: Shelley Chen <shchen@chromium.org> Original-Reviewed-on: https://review.coreboot.org/22557 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/786028 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="786028" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/28/786028/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia970d78a16624ad7940ce7cf78f6abc20ca0f35b" commit="526cf2ce0df9e56d0f16e99a6a07c53df98d4d11" commit_message="UPSTREAM: sb/intel/i82801ix: fetch initial timestamp in bootblock TESTED on Thinkpad x200 BUG=none BRANCH=none TEST=none Change-Id: Ia970d78a16624ad7940ce7cf78f6abc20ca0f35b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: f1c8ede1a5bcf26f938b3f5a8cfefa8acd156505 Original-Change-Id: I3cd286709f8734793dc6ae303215433eff29d25b Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/22077 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/786029 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="786029" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/29/786029/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia7acae96ccf70a835541fb4df31687a8e62afd53" commit="203774cb9066893073b8f66c134fdf38eb6847ab" commit_message="UPSTREAM: sb/intel/i82801jx: Store initial timestamp in bootblock The function to fetch this timestamp is already present. BUG=none BRANCH=none TEST=none Change-Id: Ia7acae96ccf70a835541fb4df31687a8e62afd53 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 46234ea36be69b89c42b550838092ecc0f0bf972 Original-Change-Id: I760aea8a867339764be9ca627b2ccdff4fd18e30 Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/22100 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/787190 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="787190" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/90/787190/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I435d6ff35f21c32c0a760e2795ea99a76c094b1a" commit="3c82410e57a2bc8d1f8a9423f55af13d718d0a38" commit_message="UPSTREAM: Constify struct cpu_device_id instances There is currently no case where a struct cpu_device_id instance needs to be modified. Thus, declare all instances as const. BUG=none BRANCH=none TEST=none Change-Id: I435d6ff35f21c32c0a760e2795ea99a76c094b1a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 8f06ce35125869f631a3c7a072503103feca227c Original-Change-Id: I5ec7460b56d75d255b3451d76a46df76a51d6365 Original-Signed-off-by: Jonathan Neuschfer <j.neuschaefer@gmx.net> Original-Reviewed-on: https://review.coreboot.org/22526 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/787191 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="787191" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/91/787191/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I93bf2a3ea48558a70f9811f24084bba4ba1192af" commit="4c94ee84e867fcbe6c1153d7cb482fc705fe5b7e" commit_message="UPSTREAM: soc/intel/cannonlake: Invoke pmc and hard reset only if CSE fails to reset If CSE fails to do a global reset with the calling sequence of heci reset/send/receive, then invoke pmc and hard reset. TEST= Force global reset from early or late romstage. The function send_heci_reset_message has the calling sequence of heci reset/send/receive. It is observed timed out error (associated with heci_receive) occurs only if global reset is forced during early romstage. If global reset is trigged at late stage (i.e, after fsp_memory_init), then no timed out error and CSE handles reset properly. Change-Id: I93bf2a3ea48558a70f9811f24084bba4ba1192af Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: bfd62fabc9b7b52a2ec5de93749ab01f697a01a7 Original-Change-Id: I5bb12554e5745d7704a1b684a3a51034bb35f787 Original-Signed-off-by: John Zhao <john.zhao@intel.com> Original-Reviewed-on: https://review.coreboot.org/22549 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/787192 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="787192" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/92/787192/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ie128227f55d7bed6ea896ad3fc5f07258ec21eb5" commit="eeab88b9ead02b57ba82c3a4efd3a3082241b7ab" commit_message="UPSTREAM: src/mainboard: Fix various typos These typos were found through manual review and grep. BUG=none BRANCH=none TEST=none Change-Id: Ie128227f55d7bed6ea896ad3fc5f07258ec21eb5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 482d16fb0ab1899da856b083f35b682917b0ed96 Original-Change-Id: Ia5a9acae4fbe2627017743106d9326a14c99a225 Original-Signed-off-by: Jonathan Neuschfer <j.neuschaefer@gmx.net> Original-Reviewed-on: https://review.coreboot.org/22525 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/787193 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="787193" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/93/787193/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic75fce0036d71da958387df535a831ee8008cd1f" commit="941bf0ae0cfe95ee15459971a988c8e648ddead5" commit_message="UPSTREAM: google mainboards: select SYSTEM_TYPE_LAPTOP where appropriate Some Google boards are missing this selection, leading them to being incorrectly identified as type 'Desktop' in SMBIOS type 3 table. Correct this by adding 'select SYSTEM_TYPE_LAPTOP' to the boards' Kconfigs. TEST: boot Linux and check correct chassis type listed via dmidecode BUG=none BRANCH=none TEST=none Change-Id: Ic75fce0036d71da958387df535a831ee8008cd1f Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: d18db73d4997b08606d5186eee58f38c400281b6 Original-Change-Id: Ib1145e314812a3f300cfd1a435a687aa0862158a Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Original-Reviewed-on: https://review.coreboot.org/22340 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Jonathan Neuschfer <j.neuschaefer@gmx.net> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/787194 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="787194" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/94/787194/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I9e9a502c1a66b256813dd54459258783f158cc58" commit="54f81a508cb917b485b37efc12aa45b09a7c424b" commit_message="UPSTREAM: soc/intel/cannonlake: Add PM methods to power gate SD card controller When system enters S0ix, system fails to power gate SD card controller. This patch implements PM methods to put the SD card controller in D3 during S0ix entry. TEST=Suspend and resume using 'echo freeze > /sys/power/state'. The System should not be blocked by sd card controller. Change-Id: I9e9a502c1a66b256813dd54459258783f158cc58 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 6fd5a79d476b54f1670d0a06227b446ab003b2a1 Original-Change-Id: I9a9fe14fb6cd3b76ee95c565b3359cdae1a3c445 Original-Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com> Original-Reviewed-on: https://review.coreboot.org/22487 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/787195 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="787195" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/95/787195/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Iad629233a2c89c7b513f16d6b8e761a3eedabe3b" commit="b3b544c11117044e1efebfbbc86abb93ccd459ac" commit_message="hammerd: retry updating touchpad firmware when failed to transmit. If the image transmission fails, we should retry again instead of terminating the process. BUG=b:69444674 TEST=FEATURES=test emerge-poppy hammerd Change-Id: Iad629233a2c89c7b513f16d6b8e761a3eedabe3b Reviewed-on: https://chromium-review.googlesource.com/787270 Commit-Ready: Chih-Yu Huang <akahuang@chromium.org> Tested-by: Chih-Yu Huang <akahuang@chromium.org> Reviewed-by: Chun-ta Lin <itspeter@chromium.org> " fail_count="0" gerrit_number="787270" owner_email="akahuang@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/70/787270/3" remote="cros" total_fail_count="0"/><lkgm version="10154.0.0-rc1"/></manifest> |
